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r31317 Friday 18th July, 2014 at 22:31:24 UTC by Alex Jackson
dec0.c: convert slyspy tilemap protection to use bankdev [Alex Jackson]
[src/mame/drivers]dec0.c
[src/mame/includes]dec0.h

trunk/src/mame/drivers/dec0.c
r31316r31317
166166#include "sound/2203intf.h"
167167#include "sound/3812intf.h"
168168#include "sound/okim6295.h"
169#include "sound/msm5205.h"
170169
171170
172171/******************************************************************************/
r31316r31317
396395
397396*/
398397
399WRITE16_MEMBER(dec0_state::unmapped_w)
400{
401   // fall through for unmapped protection areas
402   logerror("unmapped memory write to %04x = %04x in mode %d\n", 0x240000+offset*2, data, m_slyspy_state);
403}
404
405void slyspy_set_protection_map(running_machine& machine, int type);
406
407398WRITE16_MEMBER(dec0_state::slyspy_state_w)
408399{
409   m_slyspy_state=0;
410   slyspy_set_protection_map(m_slyspy_state);
400   m_slyspy_state = 0;
401   m_pfprotect->set_bank(m_slyspy_state);
411402}
412403
413404READ16_MEMBER(dec0_state::slyspy_state_r)
414405{
415   m_slyspy_state++;
416   m_slyspy_state=m_slyspy_state%4;
417   slyspy_set_protection_map(m_slyspy_state);
406   m_slyspy_state = (m_slyspy_state + 1) % 4;
407   m_pfprotect->set_bank(m_slyspy_state);
418408
419409   return 0; /* Value doesn't mater */
420410}
421411
422void dec0_state::slyspy_set_protection_map( int type)
423{
424   address_space& space = m_maincpu->space(AS_PROGRAM);
425412
426   space.install_write_handler( 0x240000, 0x24ffff, write16_delegate(FUNC(dec0_state::unmapped_w),this));
413static ADDRESS_MAP_START( slyspy_protection_map, AS_PROGRAM, 16, dec0_state )
414   AM_RANGE(0x04000, 0x04001) AM_MIRROR(0x30000) AM_READ(slyspy_state_r)
415   AM_RANGE(0x0a000, 0x0a001) AM_MIRROR(0x30000) AM_WRITE(slyspy_state_w)
416   // Default state (called by Traps 1, 3, 4, 7, C)
417   AM_RANGE(0x00000, 0x00007) AM_DEVWRITE("tilegen2", deco_bac06_device, pf_control_0_w)
418   AM_RANGE(0x00010, 0x00017) AM_DEVWRITE("tilegen2", deco_bac06_device, pf_control_1_w)
419   AM_RANGE(0x02000, 0x0207f) AM_DEVWRITE("tilegen2", deco_bac06_device, pf_colscroll_w)
420   AM_RANGE(0x02400, 0x027ff) AM_DEVWRITE("tilegen2", deco_bac06_device, pf_rowscroll_w)
421   AM_RANGE(0x06000, 0x07fff) AM_DEVWRITE("tilegen2", deco_bac06_device, pf_data_w)
422   AM_RANGE(0x08000, 0x08007) AM_DEVWRITE("tilegen1", deco_bac06_device, pf_control_0_w)
423   AM_RANGE(0x08010, 0x08017) AM_DEVWRITE("tilegen1", deco_bac06_device, pf_control_1_w)
424   AM_RANGE(0x0c000, 0x0c07f) AM_DEVWRITE("tilegen1", deco_bac06_device, pf_colscroll_w)
425   AM_RANGE(0x0c400, 0x0c7ff) AM_DEVWRITE("tilegen1", deco_bac06_device, pf_rowscroll_w)
426   AM_RANGE(0x0e000, 0x0ffff) AM_DEVWRITE("tilegen1", deco_bac06_device, pf_data_w)
427   // State 1 (Called by Trap 9)
428   AM_RANGE(0x18000, 0x19fff) AM_DEVWRITE("tilegen1", deco_bac06_device, pf_data_w)
429   AM_RANGE(0x1c000, 0x1dfff) AM_DEVWRITE("tilegen2", deco_bac06_device, pf_data_w)
430   // State 2 (Called by Trap A)
431   AM_RANGE(0x20000, 0x21fff) AM_DEVWRITE("tilegen2", deco_bac06_device, pf_data_w)
432   AM_RANGE(0x22000, 0x23fff) AM_DEVWRITE("tilegen1", deco_bac06_device, pf_data_w)
433   AM_RANGE(0x2e000, 0x2ffff) AM_DEVWRITE("tilegen1", deco_bac06_device, pf_data_w)
434   // State 3 (Called by Trap B)
435   AM_RANGE(0x30000, 0x31fff) AM_DEVWRITE("tilegen1", deco_bac06_device, pf_data_w)
436   AM_RANGE(0x38000, 0x39fff) AM_DEVWRITE("tilegen2", deco_bac06_device, pf_data_w)
437ADDRESS_MAP_END
427438
428   space.install_write_handler( 0x24a000, 0x24a001, write16_delegate(FUNC(dec0_state::slyspy_state_w),this));
429   space.install_read_handler( 0x244000, 0x244001, read16_delegate(FUNC(dec0_state::slyspy_state_r),this));
430
431   switch (type)
432   {
433      case 0:
434         space.install_write_handler(0x240000, 0x240007, write16_delegate(FUNC(deco_bac06_device::pf_control_0_w), (deco_bac06_device*)m_tilegen2));
435         space.install_write_handler(0x240010, 0x240017, write16_delegate(FUNC(deco_bac06_device::pf_control_1_w), (deco_bac06_device*)m_tilegen2));
436
437         space.install_write_handler(0x242000, 0x24207f, write16_delegate(FUNC(deco_bac06_device::pf_colscroll_w), (deco_bac06_device*)m_tilegen2));
438         space.install_write_handler(0x242400, 0x2427ff, write16_delegate(FUNC(deco_bac06_device::pf_rowscroll_w), (deco_bac06_device*)m_tilegen2));
439
440         space.install_write_handler(0x246000, 0x247fff, write16_delegate(FUNC(deco_bac06_device::pf_data_w), (deco_bac06_device*)m_tilegen2));
441
442         space.install_write_handler(0x248000, 0x280007, write16_delegate(FUNC(deco_bac06_device::pf_control_0_w), (deco_bac06_device*)m_tilegen1));
443         space.install_write_handler(0x248010, 0x280017, write16_delegate(FUNC(deco_bac06_device::pf_control_1_w), (deco_bac06_device*)m_tilegen1));
444
445         space.install_write_handler(0x24c000, 0x24c07f, write16_delegate(FUNC(deco_bac06_device::pf_colscroll_w), (deco_bac06_device*)m_tilegen1));
446         space.install_write_handler(0x24c400, 0x24c7ff, write16_delegate(FUNC(deco_bac06_device::pf_rowscroll_w), (deco_bac06_device*)m_tilegen1));
447
448         space.install_write_handler(0x24e000, 0x24ffff, write16_delegate(FUNC(deco_bac06_device::pf_data_w), (deco_bac06_device*)m_tilegen1));
449
450         break;
451
452      case 1:
453         // 0x240000 - 0x241fff not mapped
454         // 0x242000 - 0x243fff not mapped
455         // 0x246000 - 0x247fff not mapped
456         space.install_write_handler(0x248000, 0x249fff, write16_delegate(FUNC(deco_bac06_device::pf_data_w), (deco_bac06_device*)m_tilegen1));
457         space.install_write_handler(0x24c000, 0x24dfff, write16_delegate(FUNC(deco_bac06_device::pf_data_w), (deco_bac06_device*)m_tilegen2));
458         // 0x24e000 - 0x24ffff not mapped
459         break;
460
461      case 2:
462         space.install_write_handler(0x240000, 0x241fff, write16_delegate(FUNC(deco_bac06_device::pf_data_w), (deco_bac06_device*)m_tilegen2));
463         space.install_write_handler(0x242000, 0x243fff, write16_delegate(FUNC(deco_bac06_device::pf_data_w), (deco_bac06_device*)m_tilegen1));
464         // 0x242000 - 0x243fff not mapped
465         // 0x246000 - 0x247fff not mapped
466         // 0x248000 - 0x249fff not mapped
467         // 0x24c000 - 0x24dfff not mapped
468         space.install_write_handler(0x24e000, 0x24ffff, write16_delegate(FUNC(deco_bac06_device::pf_data_w), (deco_bac06_device*)m_tilegen1));
469         break;
470
471      case 3:
472         space.install_write_handler(0x240000, 0x241fff, write16_delegate(FUNC(deco_bac06_device::pf_data_w), (deco_bac06_device*)m_tilegen1));
473         // 0x242000 - 0x243fff not mapped
474         // 0x246000 - 0x247fff not mapped
475         space.install_write_handler(0x248000, 0x249fff, write16_delegate(FUNC(deco_bac06_device::pf_data_w), (deco_bac06_device*)m_tilegen2));
476         // 0x24c000 - 0x24dfff not mapped
477         // 0x24e000 - 0x24ffff not mapped
478         break;
479   }
480
481}
482
483
484
485
486
487
488
489439static ADDRESS_MAP_START( slyspy_map, AS_PROGRAM, 16, dec0_state )
490440   AM_RANGE(0x000000, 0x05ffff) AM_ROM
491441
492   /* The location of p1 & pf2 can change in the 240000 - 24ffff region according to protection */
442   /* The location of pf1 & pf2 can change in the 240000 - 24ffff region according to protection */
443   AM_RANGE(0x240000, 0x24ffff) AM_DEVICE("pfprotect", address_map_bank_device, amap16)
493444
494445   /* Pf3 is unaffected by protection */
495446   AM_RANGE(0x300000, 0x300007) AM_DEVWRITE("tilegen3", deco_bac06_device, pf_control_0_w)
r31316r31317
16181569MACHINE_RESET_MEMBER(dec0_state,slyspy)
16191570{
16201571   // set initial memory map
1621   slyspy_set_protection_map(0);
1572   m_slyspy_state = 0;
1573   m_pfprotect->set_bank(m_slyspy_state);
16221574}
16231575
16241576static MACHINE_CONFIG_DERIVED( slyspy, dec1 )
r31316r31317
16311583   MCFG_CPU_ADD("audiocpu", H6280, XTAL_12MHz/2/3) /* verified on pcb (6Mhz is XIN on pin 10 of H6280, verified on pcb */
16321584   MCFG_CPU_PROGRAM_MAP(slyspy_s_map)
16331585
1586   MCFG_DEVICE_ADD("pfprotect", ADDRESS_MAP_BANK, 0)
1587   MCFG_DEVICE_PROGRAM_MAP(slyspy_protection_map)
1588   MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
1589   MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
1590   MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(18)
1591   MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000)
1592
16341593   /* video hardware */
16351594   MCFG_SCREEN_MODIFY("screen")
16361595   MCFG_SCREEN_UPDATE_DRIVER(dec0_state, screen_update_slyspy)
trunk/src/mame/includes/dec0.h
r31316r31317
1#include "machine/bankdev.h"
12#include "video/decbac06.h"
23#include "video/decmxc06.h"
34#include "sound/msm5205.h"
r31316r31317
1617      m_tilegen2(*this, "tilegen2"),
1718      m_tilegen3(*this, "tilegen3"),
1819      m_spritegen(*this, "spritegen"),
20      m_pfprotect(*this, "pfprotect"),
1921      m_maincpu(*this, "maincpu"),
2022      m_audiocpu(*this, "audiocpu"),
2123      m_subcpu(*this, "sub"),
r31316r31317
3436   optional_device<deco_bac06_device> m_tilegen3;
3537   optional_device<deco_mxc06_device> m_spritegen;
3638
39   optional_device<address_map_bank_device> m_pfprotect;
40
3741   int m_GAME;
3842   int m_i8751_return;
3943   int m_i8751_command;
r31316r31317
4751   DECLARE_WRITE16_MEMBER(dec0_control_w);
4852   DECLARE_WRITE16_MEMBER(slyspy_control_w);
4953   DECLARE_WRITE16_MEMBER(midres_sound_w);
50   DECLARE_WRITE16_MEMBER(unmapped_w);
5154   DECLARE_READ16_MEMBER(slyspy_controls_r);
5255   DECLARE_READ16_MEMBER(slyspy_protection_r);
5356   DECLARE_WRITE16_MEMBER(slyspy_state_w);
r31316r31317
9194   void dec0_i8751_write(int data);
9295   void dec0_i8751_reset();
9396   void h6280_decrypt(const char *cputag);
94   void slyspy_set_protection_map( int type);
9597   DECLARE_WRITE_LINE_MEMBER(sound_irq);
9698   DECLARE_WRITE_LINE_MEMBER(sound_irq2);
9799   required_device<cpu_device> m_maincpu;

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