trunk/src/mame/drivers/dreamwld.c
| r31308 | r31309 | |
|---|
| 9 | 9 | transparent pen modification. This makes it rather hard to |
| 10 | 10 | merge with psikyo.c and it should probably be left separate. |
| 11 | 11 | |
| 12 | | Dream World |
| 13 | | SemiCom, 2000 |
| 14 | 12 | |
| 15 | | PCB Layout |
| 16 | | ---------- |
| 17 | | |
| 18 | | |-------------------------------------------------| |
| 19 | | | M6295 ROM5 62256 ACTEL ROM10 | |
| 20 | | |VOL M6295 ROM6 62256 A40MX04 | |
| 21 | | | PAL PAL 32MHz | |
| 22 | | | 62256 62256 PAL | |
| 23 | | | ROM1 ROM3 68EC020 PAL PAL | |
| 24 | | | ROM2 ROM4 PAL PAL | |
| 25 | | |J 62256 62256 PAL | |
| 26 | | |A PAL 27MHz | |
| 27 | | |M PAL | |
| 28 | | |M ACTEL M5M44260 | |
| 29 | | |A 6116 A40MX04 M5M44260 | |
| 30 | | | 6116 | |
| 31 | | | PAL | |
| 32 | | | 6264 PAL | |
| 33 | | | 6264 | |
| 34 | | | DSW1 ROM11 | |
| 35 | | | 8752 ROM7 ROM9 | |
| 36 | | | DSW2 ROM8 | |
| 37 | | |-------------------------------------------------| |
| 38 | | Notes: |
| 39 | | 68020 @ 16.0MHz [32/2] |
| 40 | | M6295 (both) @ 1.0MHz [32/32]. pin 7 LOW |
| 41 | | 8752 @ 16.0MHz [32/2] |
| 42 | | HSync @ 15.2kHz |
| 43 | | VSync @ 58Hz |
| 44 | | |
| 45 | | |
| 46 | 13 | Stephh's notes (based on the game M68EC020 code and some tests) : |
| 47 | 14 | |
| 48 | 15 | - Don't trust the "test mode" as it displays Dip Switches infos |
| r31308 | r31309 | |
|---|
| 119 | 86 | #include "cpu/m68000/m68000.h" |
| 120 | 87 | #include "sound/okim6295.h" |
| 121 | 88 | |
| 122 | | #define MASTER_CLOCK 32000000 |
| 123 | 89 | |
| 124 | 90 | class dreamwld_state : public driver_device |
| 125 | 91 | { |
| r31308 | r31309 | |
|---|
| 529 | 495 | INPUT_PORTS_END |
| 530 | 496 | |
| 531 | 497 | |
| 498 | static INPUT_PORTS_START( baryon ) |
| 499 | PORT_INCLUDE(dreamwld) |
| 500 | |
| 501 | PORT_MODIFY("DSW") |
| 502 | PORT_DIPNAME( 0x0004, 0x0004, "Bomb Stock" ) PORT_DIPLOCATION("SW2:3") |
| 503 | PORT_DIPSETTING( 0x0004, "2" ) |
| 504 | PORT_DIPSETTING( 0x0000, "3" ) |
| 505 | PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:1") |
| 506 | PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) |
| 507 | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 508 | INPUT_PORTS_END |
| 509 | |
| 510 | |
| 532 | 511 | static INPUT_PORTS_START( rolcrush ) |
| 533 | 512 | PORT_START("INPUTS") |
| 534 | 513 | PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 ) |
| r31308 | r31309 | |
|---|
| 556 | 535 | PORT_BIT( 0xffff0000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, driver_device,custom_port_read, "DSW") |
| 557 | 536 | |
| 558 | 537 | PORT_START("DSW") |
| 559 | | PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) |
| 560 | | PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) |
| 561 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 562 | | PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) |
| 563 | | PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) |
| 564 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 565 | | PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) |
| 566 | | PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) |
| 567 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 568 | | PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) |
| 569 | | PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) |
| 570 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 571 | | PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) |
| 572 | | PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) |
| 573 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 574 | | PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) |
| 575 | | PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) |
| 576 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 577 | | PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) |
| 578 | | PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) |
| 579 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 580 | | PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) |
| 538 | PORT_DIPUNUSED_DIPLOC( 0x0001, IP_ACTIVE_LOW, "SW2:1" ) /* As listed in service mode, but tested */ |
| 539 | PORT_DIPUNUSED_DIPLOC( 0x0002, IP_ACTIVE_LOW, "SW2:2" ) /* These might have some use, requires investigation of code */ |
| 540 | PORT_DIPUNUSED_DIPLOC( 0x0004, IP_ACTIVE_LOW, "SW2:3" ) |
| 541 | PORT_DIPUNUSED_DIPLOC( 0x0008, IP_ACTIVE_LOW, "SW2:4" ) |
| 542 | PORT_DIPUNUSED_DIPLOC( 0x0010, IP_ACTIVE_LOW, "SW2:5" ) |
| 543 | PORT_DIPUNUSED_DIPLOC( 0x0020, IP_ACTIVE_LOW, "SW2:6" ) |
| 544 | PORT_DIPUNUSED_DIPLOC( 0x0040, IP_ACTIVE_LOW, "SW2:7" ) |
| 545 | PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW2:8") |
| 581 | 546 | PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) |
| 582 | 547 | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 583 | | PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) ) |
| 548 | PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:1") |
| 584 | 549 | PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) |
| 585 | 550 | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 586 | | PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) |
| 587 | | PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) |
| 588 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 589 | | PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) |
| 590 | | PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) |
| 591 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 592 | | PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) |
| 593 | | PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) |
| 594 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 595 | | PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) |
| 596 | | PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) |
| 597 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 598 | | PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) |
| 599 | | PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) |
| 600 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 601 | | PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) |
| 602 | | PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) |
| 603 | | PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) |
| 551 | PORT_DIPNAME( 0x0e00, 0x0e00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:2,3,4") |
| 552 | PORT_DIPSETTING( 0x0000, DEF_STR( 5C_1C ) ) |
| 553 | PORT_DIPSETTING( 0x0200, DEF_STR( 4C_1C ) ) |
| 554 | PORT_DIPSETTING( 0x0400, DEF_STR( 3C_1C ) ) |
| 555 | PORT_DIPSETTING( 0x0600, DEF_STR( 2C_1C ) ) |
| 556 | PORT_DIPSETTING( 0x0e00, DEF_STR( 1C_1C ) ) |
| 557 | PORT_DIPSETTING( 0x0a00, DEF_STR( 2C_3C ) ) |
| 558 | PORT_DIPSETTING( 0x0c00, DEF_STR( 1C_2C ) ) |
| 559 | PORT_DIPSETTING( 0x0800, DEF_STR( 1C_3C ) ) |
| 560 | PORT_DIPNAME( 0x7000, 0x7000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:5,6,7") |
| 561 | PORT_DIPSETTING( 0x2000, "Level 1" ) |
| 562 | PORT_DIPSETTING( 0x1000, "Level 2" ) |
| 563 | PORT_DIPSETTING( 0x0000, "Level 3" ) |
| 564 | PORT_DIPSETTING( 0x7000, "Level 4" ) |
| 565 | PORT_DIPSETTING( 0x6000, "Level 5" ) |
| 566 | PORT_DIPSETTING( 0x5000, "Level 6" ) |
| 567 | PORT_DIPSETTING( 0x4000, "Level 7" ) |
| 568 | PORT_DIPSETTING( 0x3000, "Level 8" ) |
| 604 | 569 | PORT_SERVICE_DIPLOC( 0x8000, IP_ACTIVE_LOW, "SW1:8" ) |
| 605 | 570 | INPUT_PORTS_END |
| 606 | 571 | |
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| 624 | 589 | GFXDECODE_END |
| 625 | 590 | |
| 626 | 591 | |
| 627 | | |
| 628 | 592 | void dreamwld_state::machine_start() |
| 629 | 593 | { |
| 630 | 594 | save_item(NAME(m_protindex)); |
| r31308 | r31309 | |
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| 640 | 604 | } |
| 641 | 605 | |
| 642 | 606 | |
| 643 | | |
| 644 | | |
| 645 | 607 | static MACHINE_CONFIG_START( baryon, dreamwld_state ) |
| 646 | 608 | |
| 647 | 609 | /* basic machine hardware */ |
| 648 | | MCFG_CPU_ADD("maincpu", M68EC020, MASTER_CLOCK/2) |
| 610 | MCFG_CPU_ADD("maincpu", M68EC020, XTAL_32MHz/2) /* 16MHz verified */ |
| 649 | 611 | MCFG_CPU_PROGRAM_MAP(baryon_map) |
| 650 | 612 | MCFG_CPU_VBLANK_INT_DRIVER("screen", dreamwld_state, irq4_line_hold) |
| 651 | 613 | |
| r31308 | r31309 | |
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| 668 | 630 | |
| 669 | 631 | MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") |
| 670 | 632 | |
| 671 | | MCFG_OKIM6295_ADD("oki1", MASTER_CLOCK/32, OKIM6295_PIN7_LOW) |
| 633 | MCFG_OKIM6295_ADD("oki1", XTAL_32MHz/32, OKIM6295_PIN7_LOW) /* 1MHz verified */ |
| 672 | 634 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.50) |
| 673 | 635 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.50) |
| 674 | 636 | MACHINE_CONFIG_END |
| r31308 | r31309 | |
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| 680 | 642 | MCFG_CPU_PROGRAM_MAP(dreamwld_map) |
| 681 | 643 | MCFG_CPU_VBLANK_INT_DRIVER("screen", dreamwld_state, irq4_line_hold) |
| 682 | 644 | |
| 683 | | MCFG_OKIM6295_ADD("oki2", MASTER_CLOCK/32, OKIM6295_PIN7_LOW) |
| 645 | MCFG_OKIM6295_ADD("oki2", XTAL_32MHz/32, OKIM6295_PIN7_LOW) /* 1MHz verified */ |
| 684 | 646 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.50) |
| 685 | 647 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.50) |
| 686 | 648 | MACHINE_CONFIG_END |
| 687 | 649 | |
| 650 | |
| 651 | /* |
| 652 | |
| 653 | Dream World |
| 654 | SemiCom, 2000 |
| 655 | |
| 656 | PCB Layout |
| 657 | ---------- |
| 658 | |
| 659 | |-------------------------------------------------| |
| 660 | | M6295 ROM5 62256 ACTEL ROM10 | |
| 661 | |VOL M6295 ROM6 62256 A40MX04 | |
| 662 | | PAL PAL 32MHz | |
| 663 | | 62256 62256 PAL | |
| 664 | | ROM1 ROM3 68EC020 PAL PAL | |
| 665 | | ROM2 ROM4 PAL PAL | |
| 666 | |J 62256 62256 PAL | |
| 667 | |A PAL 27MHz | |
| 668 | |M PAL | |
| 669 | |M ACTEL M5M44260 | |
| 670 | |A 6116 A40MX04 M5M44260 | |
| 671 | | 6116 | |
| 672 | | PAL | |
| 673 | | 6264 PAL | |
| 674 | | 6264 | |
| 675 | | DSW1 ROM11 | |
| 676 | | 8752 ROM7 ROM9 27C160* | |
| 677 | | DSW2 ROM8 27C160* 27C160* | |
| 678 | |-------------------------------------------------| |
| 679 | |
| 680 | * denotes unpopulated components |
| 681 | |
| 682 | Notes: |
| 683 | 68020 @ 16.0MHz [32/2] |
| 684 | M6295 (both) @ 1.0MHz [32/32]. pin 7 LOW |
| 685 | 8752 @ 16.0MHz [32/2] |
| 686 | HSync @ 15.2kHz |
| 687 | VSync @ 58Hz |
| 688 | */ |
| 689 | |
| 688 | 690 | ROM_START( dreamwld ) |
| 689 | 691 | ROM_REGION( 0x200000, "maincpu", 0 ) |
| 690 | 692 | ROM_LOAD32_BYTE( "3.bin", 0x000000, 0x040000, CRC(e8f7ae78) SHA1(cfd393cec6dec967c82e1131547b7e7fdc5d814f) ) |
| r31308 | r31309 | |
|---|
| 727 | 729 | |
| 728 | 730 | /* |
| 729 | 731 | |
| 730 | | Rolling Crush - this is the same PCB as Dream World with one of the OKIs positions left unpopulated. |
| 732 | Rolling Crush |
| 733 | Trust / Semicom, 1999 |
| 731 | 734 | |
| 732 | | Here are the dumps from a (original???) Rolling Crush (version 1.07.E 1999/02/11) PCB.Game seems to be a rip-off |
| 733 | | of Puzz Loop from Mitchell, infact there is a piece of tape on the solder side which says 'P. LOOP' and a sticker with 02/1999 date.Manifacturer is TRUST. |
| 734 | | All EPROMS four 27C2000 (program code), one 27C4000 (6295 samples), |
| 735 | | one MASK 27C512(GFX), two 27C160(GFX) and two 27C010 (GFX) are not labeled. |
| 736 | | Main CPU is a 68EC020FG16 in QFP package |
| 737 | | There are also a Atmel AT89C52 MCU (secured) and two Actel A40MX04 FPGAs as well as a lot of PLDs (three GAL22V10B and nine PALCE20V8H), don't know |
| 738 | | if secured. |
| 735 | PCB Layout |
| 736 | ---------- |
| 739 | 737 | |
| 738 | |-------------------------------------------------| |
| 739 | | M6295* 27C40* 62256 ACTEL ROM10 | |
| 740 | |VOL M6295 ROM6 62256 A40MX04 | |
| 741 | | PAL PAL 32MHz | |
| 742 | | 62256 62256 PAL | |
| 743 | | ROM2 ROM4 68EC020 PAL PAL | |
| 744 | | ROM1 ROM3 PAL PAL | |
| 745 | |J 62256 62256 PAL | |
| 746 | |A PAL 27MHz | |
| 747 | |M PAL | |
| 748 | |M ACTEL M5M44260 | |
| 749 | |A 6116 A40MX04 M5M44260 | |
| 750 | | 6116 | |
| 751 | | PAL | |
| 752 | | 6264 PAL | |
| 753 | | 6264 | |
| 754 | | DSW1 ROM9 | |
| 755 | | 8752 ROM7 ROM8 27C160* | |
| 756 | | DSW2 ROM6 27C160* 27C160* | |
| 757 | |-------------------------------------------------| |
| 758 | |
| 759 | Same PCB as Dream World except one OKI M6295 and it's sample rom are unpopulated |
| 760 | |
| 761 | * denotes unpopulated components |
| 762 | |
| 740 | 763 | Main CPU 68EC020FG16 @ 16MHz |
| 741 | 764 | AD-65 (OKI MSM6295 rebadged) @ 1MHz |
| 742 | | Atmel AT89C52 MCU @ 16MHZ |
| 765 | Atmel AT89C52 MCU (secured) @ 16MHZ |
| 743 | 766 | |
| 744 | | |
| 745 | 767 | V-SYNC @57.793 Hz |
| 746 | 768 | H-SYNC @ (floating) 15.19 - 15.27KHz |
| 747 | 769 | |
| 748 | | |
| 749 | | |
| 750 | 770 | */ |
| 751 | 771 | |
| 752 | 772 | ROM_START( rolcrush ) |
| r31308 | r31309 | |
|---|
| 783 | 803 | ROM_LOAD( "mx27c512.9.bin", 0x000000, 0x10000, CRC(0da8db45) SHA1(7d5bd71c5b0b28ff74c732edd7c662f46f2ab25b) ) |
| 784 | 804 | ROM_END |
| 785 | 805 | |
| 786 | | /* Baryon is a slightly different PCB, doesn't have a position for the 2nd OKI */ |
| 806 | /* |
| 787 | 807 | |
| 808 | Baryon |
| 809 | Semicom, 1997 |
| 810 | |
| 811 | PCB Layout |
| 812 | ---------- |
| 813 | |
| 814 | |-------------------------------------------------| |
| 815 | | ROM1 62256 ACTEL ROM2 | |
| 816 | |VOL M6295 62256 A40MX04 | |
| 817 | | PAL PAL 32MHz | |
| 818 | | 62256 62256 PAL | |
| 819 | | ROM3 ROM4 68EC020 PAL PAL | |
| 820 | | ROM5 ROM6 PAL PAL | |
| 821 | |J 62256 62256 PAL | |
| 822 | |A PAL 27MHz | |
| 823 | |M PAL | |
| 824 | |M ACTEL M5M44260 | |
| 825 | |A 6116 A40MX04 M5M44260 | |
| 826 | | 6116 | |
| 827 | | PAL | |
| 828 | | 6264 PAL | |
| 829 | | 6264 | |
| 830 | | DSW1 ROM7 | |
| 831 | | P87C52 ROM8 ROM9 27C160* | |
| 832 | | DSW2 ROM10 ROM11 27C160* | |
| 833 | |-------------------------------------------------| |
| 834 | |
| 835 | Baryon is a slightly different PCB, doesn't have a position for a 2nd OKI |
| 836 | |
| 837 | * denotes unpopulated components |
| 838 | |
| 839 | */ |
| 840 | |
| 788 | 841 | ROM_START( baryon ) |
| 789 | 842 | ROM_REGION( 0x100000, "maincpu", 0 ) |
| 843 | ROM_LOAD32_BYTE( "4.bin", 0x000000, 0x040000, CRC(59e0df20) SHA1(ff12f4adcf731f6984db7d0fbdd7fcc71ce66aa4) ) |
| 844 | ROM_LOAD32_BYTE( "6.bin", 0x000001, 0x040000, CRC(abccbb3d) SHA1(01524f094543d872d775306024f51258a11e9240) ) |
| 790 | 845 | ROM_LOAD32_BYTE( "3.bin", 0x000002, 0x040000, CRC(046d4231) SHA1(05056efe5fec7f43c400f05278de516b01be0fdf) ) |
| 791 | | ROM_LOAD32_BYTE( "4.bin", 0x000000, 0x040000, CRC(59e0df20) SHA1(ff12f4adcf731f6984db7d0fbdd7fcc71ce66aa4) ) |
| 792 | 846 | ROM_LOAD32_BYTE( "5.bin", 0x000003, 0x040000, CRC(63d5e7cb) SHA1(269bf5ffe10f2464f823c4d377921e19cfb8bc46) ) |
| 793 | | ROM_LOAD32_BYTE( "6.bin", 0x000001, 0x040000, CRC(abccbb3d) SHA1(01524f094543d872d775306024f51258a11e9240) ) |
| 794 | 847 | |
| 795 | 848 | ROM_REGION( 0x10000, "cpu1", 0 ) /* 87C52 MCU Code */ |
| 796 | 849 | ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) /* can't be dumped. */ |
| r31308 | r31309 | |
|---|
| 818 | 871 | ROM_END |
| 819 | 872 | |
| 820 | 873 | |
| 821 | | |
| 822 | | |
| 823 | | GAME( 1997, baryon, 0, baryon, dreamwld, driver_device, 0, ROT270, "SemiCom", "Baryon - Future Assault", GAME_SUPPORTS_SAVE ) |
| 824 | | GAME( 2000, dreamwld, 0, dreamwld, dreamwld, driver_device, 0, ROT0, "SemiCom", "Dream World", GAME_SUPPORTS_SAVE ) |
| 825 | | GAME( 1999, rolcrush, 0, baryon, rolcrush, driver_device, 0, ROT0, "Trust / Semicom", "Rolling Crush (version 1.07.E - 1999/02/11)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS ) // wrong linescroll |
| 874 | GAME( 1997, baryon, 0, baryon, baryon, driver_device, 0, ROT270, "SemiCom", "Baryon - Future Assault", GAME_SUPPORTS_SAVE ) |
| 875 | GAME( 2000, dreamwld, 0, dreamwld, dreamwld, driver_device, 0, ROT0, "SemiCom", "Dream World", GAME_SUPPORTS_SAVE ) |
| 876 | GAME( 1999, rolcrush, 0, baryon, rolcrush, driver_device, 0, ROT0, "Trust / Semicom", "Rolling Crush (version 1.07.E - 1999/02/11)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS ) // wrong linescroll |