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r31263 Saturday 12th July, 2014 at 03:37:25 UTC by Carl
i186: interrupt level triggering and simplify timers (nw)
(mess) rmnimbus: start to fix scsi (nw)
[src/emu/cpu/i86]i186.c i186.h
[src/mess/drivers]rmnimbus.c
[src/mess/includes]rmnimbus.h
[src/mess/machine]rmnimbus.c

trunk/src/emu/cpu/i86/i186.c
r31262r31263
55#include "debugger.h"
66#include "i86inline.h"
77
8#define LATCH_INTS          1
98#define LOG_PORTS           0
109#define LOG_INTERRUPTS      0
1110#define LOG_INTERRUPTS_EXT  0
r31262r31263
561560   save_item(NAME(m_timer[0].maxB));
562561   save_item(NAME(m_timer[0].active_count));
563562   save_item(NAME(m_timer[0].count));
564   save_item(NAME(m_timer[0].time_timer_active));
565   save_item(NAME(m_timer[0].last_time));
566563   save_item(NAME(m_timer[1].control));
567564   save_item(NAME(m_timer[1].maxA));
568565   save_item(NAME(m_timer[1].maxB));
569566   save_item(NAME(m_timer[1].active_count));
570567   save_item(NAME(m_timer[1].count));
571   save_item(NAME(m_timer[1].time_timer_active));
572   save_item(NAME(m_timer[1].last_time));
573568   save_item(NAME(m_timer[2].control));
574569   save_item(NAME(m_timer[2].maxA));
575570   save_item(NAME(m_timer[2].count));
576   save_item(NAME(m_timer[2].time_timer_active));
577   save_item(NAME(m_timer[2].last_time));
578571   save_item(NAME(m_dma[0].source));
579572   save_item(NAME(m_dma[0].dest));
580573   save_item(NAME(m_dma[0].count));
r31262r31263
593586   save_item(NAME(m_intr.timer));
594587   save_item(NAME(m_intr.dma));
595588   save_item(NAME(m_intr.ext));
589   save_item(NAME(m_intr.ext_state));
596590   save_item(NAME(m_mem.lower));
597591   save_item(NAME(m_mem.upper));
598592   save_item(NAME(m_mem.middle));
r31262r31263
603597   m_timer[0].int_timer = timer_alloc(TIMER_INT0);
604598   m_timer[1].int_timer = timer_alloc(TIMER_INT1);
605599   m_timer[2].int_timer = timer_alloc(TIMER_INT2);
606   m_timer[0].time_timer = timer_alloc(TIMER_TIME0);
607   m_timer[1].time_timer = timer_alloc(TIMER_TIME1);
608   m_timer[2].time_timer = timer_alloc(TIMER_TIME2);
609600
610601   m_out_tmrout0_func.resolve_safe();
611602   m_out_tmrout1_func.resolve_safe();
r31262r31263
632623   m_intr.request           = 0x0000;
633624   m_intr.status            = 0x0000;
634625   m_intr.poll_status       = 0x0000;
626   m_intr.ext_state         = 0x00;
635627   m_reloc = 0x20ff;
636628   m_dma[0].drq_state = false;
637629   m_dma[1].drq_state = false;
638630   for(int i = 0; i < ARRAY_LENGTH(m_timer); ++i)
639631   {
640632      m_timer[i].control = 0;
641      m_timer[i].time_timer_active = 0;
642633      m_timer[i].maxA = 0;
643634      m_timer[i].maxB = 0;
644635      m_timer[i].count = 0;
r31262r31263
714705   oldreq=m_intr.request;
715706
716707   /* clear the request and set the in-service bit */
717#if LATCH_INTS
718   m_intr.request &= ~m_intr.ack_mask;
719#else
720   m_intr.request &= ~(m_intr.ack_mask & 0x0f);
721#endif
708   if(m_intr.ack_mask & 0xf0)
709   {
710      int i;
711      for(i = 0; i < 4; i++)
712         if((m_intr.ack_mask >> (i + 4)) & 1)
713            break;
714      if(!(m_intr.ext[i] & EXTINT_CTRL_LTM))
715         m_intr.request &= ~m_intr.ack_mask;
716   }
717   else
718      m_intr.request &= ~m_intr.ack_mask;
722719
723720   if((LOG_INTERRUPTS) && (m_intr.request!=oldreq))
724721      logerror("intr.request changed from %02X to %02X\n",oldreq,m_intr.request);
r31262r31263
927924}
928925
929926/* Trigger an external interrupt, optionally supplying the vector to take */
930void i80186_cpu_device::external_int(UINT16 intno, int state, UINT8 vector)
927void i80186_cpu_device::external_int(UINT16 intno, int state)
931928{
932   if (LOG_INTERRUPTS_EXT) logerror("generating external int %02X, vector %02X\n",intno,vector);
929   if(!(m_intr.ext_state & (1 << intno)) == !state)
930      return;
933931
932   if (LOG_INTERRUPTS_EXT) logerror("generating external int %02X\n",intno);
933
934934   if(!state)
935935   {
936936      m_intr.request &= ~(0x010 << intno);
937937      m_intr.ack_mask &= ~(0x0010 << intno);
938      m_intr.ext_state &= ~(1 << intno);
938939   }
939940   else // Turn on the requested request bit and handle interrupt
941   {
940942      m_intr.request |= (0x010 << intno);
941
943      m_intr.ext_state |= (1 << intno);
944   }
942945   update_interrupt_state();
943946}
944947
r31262r31263
10141017               count = t->maxA;
10151018
10161019            count = count ? count : 0x10000;
1017            t->int_timer->adjust((attotime::from_hz(clock()/8) * count), which);
1020            if(!(t->control & 4))
1021               t->int_timer->adjust((attotime::from_hz(clock()/8) * count), which);
10181022            t->count = 0;
10191023            if (LOG_TIMER) logerror("  Repriming interrupt\n");
10201024         }
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10221026            t->int_timer->adjust(attotime::never, which);
10231027         break;
10241028      }
1025      case TIMER_TIME0:
1026      case TIMER_TIME1:
1027      case TIMER_TIME2:
10281029      default:
10291030         break;
10301031   }
r31262r31263
10361037   struct timer_state *t = &m_timer[which];
10371038
10381039   /* if we have a timing timer running, adjust the count */
1039   if (t->time_timer_active && !(t->control & 0x0c))
1040   {
1041      attotime current_time = t->time_timer->elapsed();
1042      int net_clocks = ((current_time - t->last_time) * (clock()/8)).seconds;
1043      t->last_time = current_time;
1044
1045      t->count = t->count + net_clocks;
1046   }
1040   if ((t->control & 0x8000) && !(t->control & 0x0c))
1041      t->count = (((which != 2) && t->active_count) ? t->maxB : t->maxA) - t->int_timer->remaining().as_ticks(clock() / 8);
10471042}
10481043
10491044void i80186_cpu_device::inc_timer(int which)
r31262r31263
11391134         {
11401135            /* compute the final count */
11411136            internal_timer_sync(which);
1142
1143            /* nuke the timer and force the interrupt timer to be recomputed */
1144            t->time_timer->adjust(attotime::never, which);
1145            t->time_timer_active = 0;
11461137            update_int_timer = 1;
11471138         }
11481139
11491140         /* if we're going on, start the timers running except with external clock or prescale */
11501141         else if ((diff & 0x8000) && (new_control & 0x8000) && !(new_control & 0xc))
11511142         {
1152            /* start the timing */
1153            t->time_timer->adjust(attotime::never, which);
1154            t->time_timer_active = 1;
11551143            update_int_timer = 1;
11561144         }
11571145
r31262r31263
15281516      case 0x19:
15291517         if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X\n", pc(), data);
15301518         m_intr.timer = data & 0x000f;
1519         update_interrupt_state();
15311520         break;
15321521
15331522      case 0x1a:
15341523         if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X\n", pc(), data);
15351524         m_intr.dma[0] = data & 0x000f;
1525         update_interrupt_state();
15361526         break;
15371527
15381528      case 0x1b:
15391529         if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X\n", pc(), data);
15401530         m_intr.dma[1] = data & 0x000f;
1531         update_interrupt_state();
15411532         break;
15421533
15431534      case 0x1c:
15441535         if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X\n", pc(), data);
15451536         m_intr.ext[0] = data & 0x007f;
1537         update_interrupt_state();
15461538         break;
15471539
15481540      case 0x1d:
15491541         if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X\n", pc(), data);
15501542         m_intr.ext[1] = data & 0x007f;
1543         update_interrupt_state();
15511544         break;
15521545
15531546      case 0x1e:
15541547         if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X\n", pc(), data);
15551548         m_intr.ext[2] = data & 0x001f;
1549         update_interrupt_state();
15561550         break;
15571551
15581552      case 0x1f:
15591553         if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X\n", pc(), data);
15601554         m_intr.ext[3] = data & 0x001f;
1555         update_interrupt_state();
15611556         break;
15621557
15631558      case 0x28:
trunk/src/emu/cpu/i86/i186.h
r31262r31263
2424   DECLARE_WRITE_LINE_MEMBER(drq1_w) { if(state) drq_callback(1); m_dma[1].drq_state = state; }
2525   DECLARE_WRITE_LINE_MEMBER(tmrin0_w) { if(state && (m_timer[0].control & 0x8004) == 0x8004) { inc_timer(0); } }
2626   DECLARE_WRITE_LINE_MEMBER(tmrin1_w) { if(state && (m_timer[1].control & 0x8004) == 0x8004) { inc_timer(1); } }
27   DECLARE_WRITE_LINE_MEMBER(int0_w) { external_int(0, state, 0); }
28   DECLARE_WRITE_LINE_MEMBER(int1_w) { external_int(1, state, 0); }
29   DECLARE_WRITE_LINE_MEMBER(int2_w) { external_int(2, state, 0); }
30   DECLARE_WRITE_LINE_MEMBER(int3_w) { external_int(3, state, 0); }
27   DECLARE_WRITE_LINE_MEMBER(int0_w) { external_int(0, state); }
28   DECLARE_WRITE_LINE_MEMBER(int1_w) { external_int(1, state); }
29   DECLARE_WRITE_LINE_MEMBER(int2_w) { external_int(2, state); }
30   DECLARE_WRITE_LINE_MEMBER(int3_w) { external_int(3, state); }
3131
3232   // device_memory_interface overrides
3333   virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
r31262r31263
5555private:
5656   void update_interrupt_state();
5757   void handle_eoi(int data);
58   void external_int(UINT16 intno, int state, UINT8 vector);
58   void external_int(UINT16 intno, int state);
5959   void internal_timer_sync(int which);
6060   void internal_timer_update(int which,int new_count,int new_maxA,int new_maxB,int new_control);
6161   void update_dma_control(int which, int new_control);
r31262r31263
8181      bool        active_count;
8282      UINT16      count;
8383      emu_timer   *int_timer;
84      emu_timer   *time_timer;
85      UINT8       time_timer_active;
86      attotime    last_time;
8784   };
8885
8986   struct dma_state
r31262r31263
108105      UINT16  timer;
109106      UINT16  dma[2];
110107      UINT16  ext[4];
108      UINT8   ext_state;
111109   };
112110
113111   static const device_timer_id TIMER_INT0 = 0;
trunk/src/mess/machine/rmnimbus.c
r31262r31263
108108
109109#define MOUSE_INT_ENABLED(state)     (((state)->m_iou_reg092 & MOUSE_INT_ENABLE) ? 1 : 0)
110110
111#define VIA_INT                 0x03
112
113111#define LINEAR_ADDR(seg,ofs)    ((seg<<4)+ofs)
114112
115113#define OUTPUT_SEGOFS(mess,seg,ofs)  logerror("%s=%04X:%04X [%08X]\n",mess,seg,ofs,((seg<<4)+ofs))
r31262r31263
168166};
169167
170168
171static void execute_debug_irq(running_machine &machine, int ref, int params, const char *param[]);
172169static void nimbus_debug(running_machine &machine, int ref, int params, const char *param[]);
173170
174171static int instruction_hook(device_t &device, offs_t curpc);
r31262r31263
181178static void decode_dssi_f_plonk_char(device_t *device,UINT16  ds, UINT16 si, UINT8 raw_flag);
182179static void decode_dssi_f_rw_sectors(device_t *device,UINT16  ds, UINT16 si, UINT8 raw_flag);
183180
184void rmnimbus_state::external_int(UINT16 intno, UINT8 vector)
181void rmnimbus_state::external_int(UINT8 vector, bool state)
185182{
183
184   if(!state && (vector != m_vector))
185      return;
186
186187   m_vector = vector;
187   switch(intno)
188   {
189      case 0:
190         m_maincpu->int0_w(1);
191         break;
192      case 1:
193         m_maincpu->int1_w(1);
194         break;
195      case 2:
196         m_maincpu->int2_w(1);
197         break;
198      case 3:
199         m_maincpu->int3_w(1);
200         break;
201      default:
202         return;
203   }
188
189   m_maincpu->int0_w(state);
204190}
205191
206192READ8_MEMBER(rmnimbus_state::cascade_callback)
207193{
194   m_maincpu->int0_w(0);
208195   return m_vector;
209196}
210197
r31262r31263
237224   /* setup debug commands */
238225   if (machine().debug_flags & DEBUG_FLAG_ENABLED)
239226   {
240      debug_console_register_command(machine(), "nimbus_irq", CMDFLAG_NONE, 0, 0, 2, execute_debug_irq);
241227      debug_console_register_command(machine(), "nimbus_debug", CMDFLAG_NONE, 0, 0, 1, nimbus_debug);
242228
243229      /* set up the instruction hook */
r31262r31263
248234   m_fdc->dden_w(0);
249235}
250236
251static void execute_debug_irq(running_machine &machine, int ref, int params, const char *param[])
252{
253   rmnimbus_state *state = machine.driver_data<rmnimbus_state>();
254   int IntNo;
255   int Vector;
256
257   if(params>1)
258   {
259      sscanf(param[0],"%X",&IntNo);
260      sscanf(param[1],"%X",&Vector);
261
262      debug_console_printf(machine,"triggering IRQ%d, Vector=%02X\n",IntNo,Vector);
263      state->external_int(IntNo,Vector);
264   }
265   else
266   {
267      debug_console_printf(machine,"Error, you must supply an intno and vector to trigger\n");
268   }
269}
270
271237static void nimbus_debug(running_machine &machine, int ref, int params, const char *param[])
272238{
273239   rmnimbus_state *state = machine.driver_data<rmnimbus_state>();
r31262r31263
655621   }
656622}
657623
658void *rmnimbus_state::get_dssi_ptr(address_space &space, UINT16   ds, UINT16 si)
624static inline void *get_dssi_ptr(address_space &space, UINT16   ds, UINT16 si)
659625{
660626   int             addr;
661627
r31262r31263
675641   if(raw_flag)
676642      return;
677643
678   params=(UINT16  *)state->get_dssi_ptr(space,ds,si);
644   params=(UINT16  *)get_dssi_ptr(space,ds,si);
679645
680646   for(count=0; count<10; count++)
681647      logerror("%04X ",params[count]);
r31262r31263
694660   t_nimbus_brush  *brush;
695661   int             cocount;
696662
697   area_params = (t_area_params   *)state->get_dssi_ptr(space,ds,si);
663   area_params = (t_area_params   *)get_dssi_ptr(space,ds,si);
698664
699665   if (!raw_flag)
700666      OUTPUT_SEGOFS("SegBrush:OfsBrush",area_params->seg_brush,area_params->ofs_brush);
r31262r31263
750716   if(raw_flag)
751717      return;
752718
753   plot_string_params=(t_plot_string_params   *)state->get_dssi_ptr(space,ds,si);
719   plot_string_params=(t_plot_string_params   *)get_dssi_ptr(space,ds,si);
754720
755721   OUTPUT_SEGOFS("SegFont:OfsFont",plot_string_params->seg_font,plot_string_params->ofs_font);
756722   OUTPUT_SEGOFS("SegData:OfsData",plot_string_params->seg_data,plot_string_params->ofs_data);
r31262r31263
774740   address_space &space = state->m_maincpu->space(AS_PROGRAM);
775741   UINT16  *new_colours;
776742   int     colour;
777   new_colours=(UINT16  *)state->get_dssi_ptr(space,ds,si);
743   new_colours=(UINT16  *)get_dssi_ptr(space,ds,si);
778744
779745   if(raw_flag)
780746      return;
r31262r31263
791757   rmnimbus_state  *state = device->machine().driver_data<rmnimbus_state>();
792758   address_space &space = state->m_maincpu->space(AS_PROGRAM);
793759   UINT16  *params;
794   params=(UINT16  *)state->get_dssi_ptr(space,ds,si);
760   params=(UINT16  *)get_dssi_ptr(space,ds,si);
795761
796762   if(raw_flag)
797763      return;
r31262r31263
811777   if(raw_flag)
812778      return;
813779
814   params=(UINT16  *)state->get_dssi_ptr(space,ds,si);
780   params=(UINT16  *)get_dssi_ptr(space,ds,si);
815781
816782   for(param_no=0;param_no<16;param_no++)
817783      logerror("%04X ",params[param_no]);
r31262r31263
10351001   if(LOG_SIO)
10361002      logerror("SIO Interrupt state=%02X\n",state);
10371003
1038   // Don't re-trigger if already active !
1039   if(state!=m_sio_int_state)
1040   {
1041      m_sio_int_state=state;
1042
1043      if(state)
1044         external_int(0, m_z80sio->m1_r());
1045   }
1004   external_int(m_z80sio->m1_r(), state);
10461005}
10471006
10481007/* Floppy disk */
r31262r31263
10511010{
10521011   m_nimbus_drives.reg400=0;
10531012   m_scsi_ctrl_out->write(0);
1054   m_nimbus_drives.int_ff=0;
10551013}
10561014
10571015WRITE_LINE_MEMBER(rmnimbus_state::nimbus_fdc_intrq_w)
r31262r31263
10611019
10621020   if(m_iou_reg092 & DISK_INT_ENABLE)
10631021   {
1064      m_nimbus_drives.int_ff=state;
1065
1066      if(state)
1067         external_int(0,EXTERNAL_INT_DISK);
1022      external_int(EXTERNAL_INT_DISK,state);
10681023   }
10691024}
10701025
r31262r31263
11191074   switch(offset*2)
11201075   {
11211076      case 0x00 :
1122         result |= !m_scsi_req << 7;
1123         result |= !m_scsi_cd << 6;
1124         result |= !m_scsi_io << 5;
1125         result |= !m_scsi_bsy << 4;
1077         result |= m_scsi_req << 7;
1078         result |= m_scsi_cd << 6;
1079         result |= m_scsi_io << 5;
1080         result |= m_scsi_bsy << 4;
11261081         result |= m_scsi_msg << 3;
11271082         if(floppy)
11281083         {
r31262r31263
11961151
11971152   switch(offset*2)
11981153   {
1199      case 0x10 :
1154      case 0x00 :
12001155         m_scsi_ctrl_out->write(data);
12011156         break;
12021157
1203      case 0x18 :
1158      case 0x08 :
12041159         m_scsi_data_out->write(data);
12051160         hdc_post_rw();
12061161         break;
r31262r31263
12101165void rmnimbus_state::hdc_reset()
12111166{
12121167   m_nimbus_drives.drq_ff=0;
1168   m_scsi_iena = 0;
1169   m_scsi_msg = 0;
1170   m_scsi_bsy = 0;
1171   m_scsi_io = 0;
1172   m_scsi_cd = 0;
1173   m_scsi_req = 0;
12131174}
12141175
1176void rmnimbus_state::check_scsi_irq()
1177{
1178   nimbus_fdc_intrq_w(m_scsi_io && m_scsi_cd && m_scsi_req && m_scsi_iena);
1179}
1180
12151181WRITE_LINE_MEMBER(rmnimbus_state::write_scsi_iena)
12161182{
1217   int last = m_scsi_iena;
12181183   m_scsi_iena = state;
1219
1220   // If we enable the HDC interupt, and an interrupt is pending, go deal with it.
1221   if (m_scsi_iena && !last && !m_scsi_io && !m_scsi_cd && !m_scsi_req)
1222      nimbus_fdc_intrq_w(1);
1184   check_scsi_irq();
12231185}
12241186
12251187void rmnimbus_state::hdc_post_rw()
12261188{
1227   if(!m_scsi_req)
1189   if(m_scsi_req)
12281190      m_scsibus->write_ack(1);
12291191
12301192   m_nimbus_drives.drq_ff=0;
r31262r31263
12461208WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_cd )
12471209{
12481210   m_scsi_cd = state;
1211   check_scsi_irq();
12491212}
12501213
12511214WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_io )
r31262r31263
12561219   {
12571220      m_scsi_data_out->write(0);
12581221   }
1222   check_scsi_irq();
12591223}
12601224
12611225WRITE_LINE_MEMBER( rmnimbus_state::write_scsi_msg )
r31262r31263
12801244   {
12811245      m_scsibus->write_ack(0);
12821246   }
1247   check_scsi_irq();
12831248}
12841249
12851250/* 8031/8051 Peripheral controler 80186 side */
r31262r31263
13691334   }
13701335
13711336   if(((offset==2) || (offset==3)) && (m_iou_reg092 & PC8031_INT_ENABLE))
1372      external_int(0,EXTERNAL_INT_PC8031_8C);
1337      external_int(EXTERNAL_INT_PC8031_8C, true);
13731338
13741339   if(LOG_PC8031)
13751340      logerror("8031: PCIOR %04X read of %04X returns %02X\n",pc,offset,result);
r31262r31263
14031368                  m_ipc_interface.status_out  &= ~IPC_OUT_ADDR;
14041369                  m_ipc_interface.status_in   |= IPC_IN_READ_PEND;
14051370                  if(m_iou_reg092 & PC8031_INT_ENABLE)
1406                  external_int(0,EXTERNAL_INT_PC8031_8F);
1371                     external_int(EXTERNAL_INT_PC8031_8F, true);
14071372                  break;
14081373
14091374      case 0x03   : m_ipc_interface.ipc_out=data;
r31262r31263
14111376                  m_ipc_interface.status_out   |= IPC_OUT_ADDR;
14121377                  m_ipc_interface.status_in    |= IPC_IN_READ_PEND;
14131378                  if(m_iou_reg092 & PC8031_INT_ENABLE)
1414                  external_int(0,EXTERNAL_INT_PC8031_8E);
1379                     external_int(EXTERNAL_INT_PC8031_8E, true);
14151380                  break;
14161381   }
14171382}
r31262r31263
15451510WRITE_LINE_MEMBER(rmnimbus_state::nimbus_msm5205_vck)
15461511{
15471512   if(m_iou_reg092 & MSM5205_INT_ENABLE)
1548      external_int(0,EXTERNAL_INT_MSM5205);
1513      external_int(EXTERNAL_INT_MSM5205,state);
15491514}
15501515
15511516static const int MOUSE_XYA[3][4] = { { 0, 0, 0, 0 }, { 1, 1, 0, 0 }, { 0, 1, 1, 0 } };
r31262r31263
16631628      {
16641629         xint=mxa ? EXTERNAL_INT_MOUSE_XR : EXTERNAL_INT_MOUSE_XL;
16651630
1666         external_int(0,xint);
1631         external_int(xint, true);
16671632
16681633//            logerror("Xint:%02X, mxb=%02X\n",xint,mxb);
16691634      }
r31262r31263
16731638      {
16741639         yint=myb ? EXTERNAL_INT_MOUSE_YU : EXTERNAL_INT_MOUSE_YD;
16751640
1676         external_int(0,yint);
1641         external_int(yint, true);
16771642//            logerror("Yint:%02X, myb=%02X\n",yint,myb);
16781643      }
16791644   }
r31262r31263
17511716WRITE8_MEMBER(rmnimbus_state::nimbus_via_write_portb)
17521717{
17531718}
1754
1755WRITE_LINE_MEMBER(rmnimbus_state::nimbus_via_irq_w)
1756{
1757   if(state)
1758      external_int(VIA_INT,0x00);
1759}
trunk/src/mess/includes/rmnimbus.h
r31262r31263
9090   UINT8 m_iou_reg092;
9191   UINT8 m_last_playmode;
9292   UINT8 m_ay8910_a;
93   UINT8 m_sio_int_state;
9493   UINT16 m_x, m_y, m_yline;
9594   UINT8 m_colours, m_mode, m_op;
9695   UINT32 m_debug_video;
r31262r31263
126125   DECLARE_WRITE_LINE_MEMBER(nimbus_fdc_intrq_w);
127126   DECLARE_WRITE_LINE_MEMBER(nimbus_fdc_drq_w);
128127   DECLARE_WRITE8_MEMBER(nimbus_via_write_portb);
129   DECLARE_WRITE_LINE_MEMBER(nimbus_via_irq_w);
130128   DECLARE_WRITE_LINE_MEMBER(write_scsi_bsy);
131129   DECLARE_WRITE_LINE_MEMBER(write_scsi_cd);
132130   DECLARE_WRITE_LINE_MEMBER(write_scsi_io);
r31262r31263
144142   void move_pixel_line(UINT16 x, UINT16 y, UINT8 width);
145143   void write_pixel_data(UINT16 x, UINT16 y, UINT16    data);
146144   void change_palette(UINT8 bank, UINT16 colours);
147   void external_int(UINT16 intno, UINT8 vector);
145   void external_int(UINT8 vector, bool state);
148146   DECLARE_READ8_MEMBER(cascade_callback);
149   void *get_dssi_ptr(address_space &space, UINT16   ds, UINT16 si);
150147   void nimbus_bank_memory();
151148   void memory_reset();
152149   void fdc_reset();
r31262r31263
160157   void iou_reset();
161158   void rmni_sound_reset();
162159   void mouse_js_reset();
160   void check_scsi_irq();
163161
164162   int m_scsi_iena;
165163   int m_scsi_msg;
r31262r31263
182180      UINT8   reg418;
183181
184182      UINT8   drq_ff;
185      UINT8   int_ff;
186183   } m_nimbus_drives;
187184
188185   /* 8031 Peripheral controler */
trunk/src/mess/drivers/rmnimbus.c
r31262r31263
176176   MCFG_VIA6522_WRITEPA_HANDLER(DEVWRITE8("cent_data_out", output_latch_device, write))
177177   MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(rmnimbus_state,nimbus_via_write_portb))
178178   MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(CENTRONICS_TAG, centronics_device, write_strobe))
179   MCFG_VIA6522_IRQ_HANDLER(WRITELINE(rmnimbus_state,nimbus_via_irq_w))
179   MCFG_VIA6522_IRQ_HANDLER(DEVWRITELINE(MAINCPU_TAG, i80186_cpu_device, int3_w))
180180
181181   MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_printers, "printer")
182182   MCFG_CENTRONICS_ACK_HANDLER(DEVWRITELINE(VIA_TAG, via6522_device, write_ca1)) MCFG_DEVCB_INVERT

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