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r31252 Thursday 10th July, 2014 at 19:47:57 UTC by Wilbert Pol
minx.c: Get rid of pointers to member functions (nw)

[src/emu/cpu/minx]

minx.c minx.h minxfunc.h minxopce.h minxopcf.h minxops.h

trunk/src/emu/cpu/minx/minxopce.h

r31251	r31252
1		#undef OP
2		#define OP(nn) void minx_cpu_device::minx_CE_##nn()
3	1
4		OP(00) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
5		OP(01) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
6		OP(02) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
7		OP(03) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
8		OP(04) { AD1_IHL; WR( addr1, ADD8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
9		OP(05) { AD1_IHL; WR( addr1, ADD8( RD( addr1 ), rdop() ) ); }
10		OP(06) { AD1_IHL; AD2_XIX; WR( addr1, ADD8( RD( addr1 ), RD( addr2 ) ) ); }
11		OP(07) { AD1_IHL; AD2_YIY; WR( addr1, ADD8( RD( addr1 ), RD( addr2 ) ) ); }
12		OP(08) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
13		OP(09) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
14		OP(0A) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
15		OP(0B) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
16		OP(0C) { AD1_IHL; WR( addr1, ADDC8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
17		OP(0D) { AD1_IHL; WR( addr1, ADDC8( RD( addr1 ), rdop() ) ); }
18		OP(0E) { AD1_IHL; AD2_XIX; WR( addr1, ADDC8( RD( addr1 ), RD( addr2 ) ) ); }
19		OP(0F) { AD1_IHL; AD2_YIY; WR( addr1, ADDC8( RD( addr1 ), RD( addr2 ) ) ); }
	2	void minx_cpu_device::execute_one_ce()
	3	{
	4	const UINT8 opcode = rdop();
20	5
21		OP(10) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
22		OP(11) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
23		OP(12) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
24		OP(13) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
25		OP(14) { AD1_IHL; WR( addr1, SUB8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
26		OP(15) { AD1_IHL; WR( addr1, SUB8( RD( addr1 ), rdop() ) ); }
27		OP(16) { AD1_IHL; AD2_XIX; WR( addr1, SUB8( RD( addr1 ), RD( addr2 ) ) ); }
28		OP(17) { AD1_IHL; AD2_YIY; WR( addr1, SUB8( RD( addr1 ), RD( addr2 ) ) ); }
29		OP(18) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
30		OP(19) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
31		OP(1A) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
32		OP(1B) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
33		OP(1C) { AD1_IHL; WR( addr1, SUBC8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
34		OP(1D) { AD1_IHL; WR( addr1, SUBC8( RD( addr1 ), rdop() ) ); }
35		OP(1E) { AD1_IHL; AD2_XIX; WR( addr1, SUBC8( RD( addr1 ), RD( addr2 ) ) ); }
36		OP(1F) { AD1_IHL; AD2_YIY; WR( addr1, SUBC8( RD( addr1 ), RD( addr2 ) ) ); }
	6	switch (opcode)
	7	{
	8	case 0x00: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	9	break;
	10	case 0x01: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	11	break;
	12	case 0x02: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	13	break;
	14	case 0x03: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	15	break;
	16	case 0x04: { AD1_IHL; WR( addr1, ADD8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	17	break;
	18	case 0x05: { AD1_IHL; WR( addr1, ADD8( RD( addr1 ), rdop() ) ); }
	19	break;
	20	case 0x06: { AD1_IHL; AD2_XIX; WR( addr1, ADD8( RD( addr1 ), RD( addr2 ) ) ); }
	21	break;
	22	case 0x07: { AD1_IHL; AD2_YIY; WR( addr1, ADD8( RD( addr1 ), RD( addr2 ) ) ); }
	23	break;
	24	case 0x08: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	25	break;
	26	case 0x09: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	27	break;
	28	case 0x0A: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	29	break;
	30	case 0x0B: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	31	break;
	32	case 0x0C: { AD1_IHL; WR( addr1, ADDC8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	33	break;
	34	case 0x0D: { AD1_IHL; WR( addr1, ADDC8( RD( addr1 ), rdop() ) ); }
	35	break;
	36	case 0x0E: { AD1_IHL; AD2_XIX; WR( addr1, ADDC8( RD( addr1 ), RD( addr2 ) ) ); }
	37	break;
	38	case 0x0F: { AD1_IHL; AD2_YIY; WR( addr1, ADDC8( RD( addr1 ), RD( addr2 ) ) ); }
	39	break;
37	40
38		OP(20) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
39		OP(21) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
40		OP(22) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
41		OP(23) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
42		OP(24) { AD1_IHL; WR( addr1, AND8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
43		OP(25) { AD1_IHL; WR( addr1, AND8( RD( addr1 ), rdop() ) ); }
44		OP(26) { AD1_IHL; AD2_XIX; WR( addr1, AND8( RD( addr1 ), RD( addr2 ) ) ); }
45		OP(27) { AD1_IHL; AD2_YIY; WR( addr1, AND8( RD( addr1 ), RD( addr2 ) ) ); }
46		OP(28) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
47		OP(29) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
48		OP(2A) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
49		OP(2B) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
50		OP(2C) { AD1_IHL; WR( addr1, OR8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
51		OP(2D) { AD1_IHL; WR( addr1, OR8( RD( addr1 ), rdop() ) ); }
52		OP(2E) { AD1_IHL; AD2_XIX; WR( addr1, OR8( RD( addr1 ), RD( addr2 ) ) ); }
53		OP(2F) { AD1_IHL; AD2_YIY; WR( addr1, OR8( RD( addr1 ), RD( addr2 ) ) ); }
	41	case 0x10: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	42	break;
	43	case 0x11: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	44	break;
	45	case 0x12: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	46	break;
	47	case 0x13: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	48	break;
	49	case 0x14: { AD1_IHL; WR( addr1, SUB8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	50	break;
	51	case 0x15: { AD1_IHL; WR( addr1, SUB8( RD( addr1 ), rdop() ) ); }
	52	break;
	53	case 0x16: { AD1_IHL; AD2_XIX; WR( addr1, SUB8( RD( addr1 ), RD( addr2 ) ) ); }
	54	break;
	55	case 0x17: { AD1_IHL; AD2_YIY; WR( addr1, SUB8( RD( addr1 ), RD( addr2 ) ) ); }
	56	break;
	57	case 0x18: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	58	break;
	59	case 0x19: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	60	break;
	61	case 0x1A: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	62	break;
	63	case 0x1B: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	64	break;
	65	case 0x1C: { AD1_IHL; WR( addr1, SUBC8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	66	break;
	67	case 0x1D: { AD1_IHL; WR( addr1, SUBC8( RD( addr1 ), rdop() ) ); }
	68	break;
	69	case 0x1E: { AD1_IHL; AD2_XIX; WR( addr1, SUBC8( RD( addr1 ), RD( addr2 ) ) ); }
	70	break;
	71	case 0x1F: { AD1_IHL; AD2_YIY; WR( addr1, SUBC8( RD( addr1 ), RD( addr2 ) ) ); }
	72	break;
54	73
55		OP(30) { AD2_X8; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
56		OP(31) { AD2_Y8; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
57		OP(32) { AD2_XL; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
58		OP(33) { AD2_YL; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
59		OP(34) { AD1_IHL; SUB8( RD( addr1 ), ( m_BA & 0x00FF ) ); }
60		OP(35) { AD1_IHL; SUB8( RD( addr1 ), rdop() ); }
61		OP(36) { AD1_IHL; AD2_XIX; SUB8( RD( addr1 ), RD( addr2 ) ); }
62		OP(37) { AD1_IHL; AD2_YIY; SUB8( RD( addr1 ), RD( addr2 ) ); }
63		OP(38) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
64		OP(39) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
65		OP(3A) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
66		OP(3B) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
67		OP(3C) { AD1_IHL; WR( addr1, XOR8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
68		OP(3D) { AD1_IHL; WR( addr1, XOR8( RD( addr1 ), rdop() ) ); }
69		OP(3E) { AD1_IHL; AD2_XIX; WR( addr1, XOR8( RD( addr1 ), RD( addr2 ) ) ); }
70		OP(3F) { AD1_IHL; AD2_YIY; WR( addr1, XOR8( RD( addr1 ), RD( addr2 ) ) ); }
	74	case 0x20: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	75	break;
	76	case 0x21: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	77	break;
	78	case 0x22: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	79	break;
	80	case 0x23: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	81	break;
	82	case 0x24: { AD1_IHL; WR( addr1, AND8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	83	break;
	84	case 0x25: { AD1_IHL; WR( addr1, AND8( RD( addr1 ), rdop() ) ); }
	85	break;
	86	case 0x26: { AD1_IHL; AD2_XIX; WR( addr1, AND8( RD( addr1 ), RD( addr2 ) ) ); }
	87	break;
	88	case 0x27: { AD1_IHL; AD2_YIY; WR( addr1, AND8( RD( addr1 ), RD( addr2 ) ) ); }
	89	break;
	90	case 0x28: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	91	break;
	92	case 0x29: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	93	break;
	94	case 0x2A: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	95	break;
	96	case 0x2B: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	97	break;
	98	case 0x2C: { AD1_IHL; WR( addr1, OR8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	99	break;
	100	case 0x2D: { AD1_IHL; WR( addr1, OR8( RD( addr1 ), rdop() ) ); }
	101	break;
	102	case 0x2E: { AD1_IHL; AD2_XIX; WR( addr1, OR8( RD( addr1 ), RD( addr2 ) ) ); }
	103	break;
	104	case 0x2F: { AD1_IHL; AD2_YIY; WR( addr1, OR8( RD( addr1 ), RD( addr2 ) ) ); }
	105	break;
71	106
72		OP(40) { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
73		OP(41) { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
74		OP(42) { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
75		OP(43) { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
76		OP(44) { AD1_X8; WR( addr1, ( m_BA & 0x00FF ) ); }
77		OP(45) { AD1_Y8; WR( addr1, ( m_BA & 0x00FF ) ); }
78		OP(46) { AD1_XL; WR( addr1, ( m_BA & 0x00FF ) ); }
79		OP(47) { AD1_YL; WR( addr1, ( m_BA & 0x00FF ) ); }
80		OP(48) { AD2_X8; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
81		OP(49) { AD2_Y8; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
82		OP(4A) { AD2_XL; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
83		OP(4B) { AD2_YL; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
84		OP(4C) { AD1_X8; WR( addr1, ( m_BA >> 8 ) ); }
85		OP(4D) { AD1_Y8; WR( addr1, ( m_BA >> 8 ) ); }
86		OP(4E) { AD1_XL; WR( addr1, ( m_BA >> 8 ) ); }
87		OP(4F) { AD1_YL; WR( addr1, ( m_BA >> 8 ) ); }
	107	case 0x30: { AD2_X8; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	108	break;
	109	case 0x31: { AD2_Y8; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	110	break;
	111	case 0x32: { AD2_XL; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	112	break;
	113	case 0x33: { AD2_YL; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	114	break;
	115	case 0x34: { AD1_IHL; SUB8( RD( addr1 ), ( m_BA & 0x00FF ) ); }
	116	break;
	117	case 0x35: { AD1_IHL; SUB8( RD( addr1 ), rdop() ); }
	118	break;
	119	case 0x36: { AD1_IHL; AD2_XIX; SUB8( RD( addr1 ), RD( addr2 ) ); }
	120	break;
	121	case 0x37: { AD1_IHL; AD2_YIY; SUB8( RD( addr1 ), RD( addr2 ) ); }
	122	break;
	123	case 0x38: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	124	break;
	125	case 0x39: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	126	break;
	127	case 0x3A: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	128	break;
	129	case 0x3B: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	130	break;
	131	case 0x3C: { AD1_IHL; WR( addr1, XOR8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
	132	break;
	133	case 0x3D: { AD1_IHL; WR( addr1, XOR8( RD( addr1 ), rdop() ) ); }
	134	break;
	135	case 0x3E: { AD1_IHL; AD2_XIX; WR( addr1, XOR8( RD( addr1 ), RD( addr2 ) ) ); }
	136	break;
	137	case 0x3F: { AD1_IHL; AD2_YIY; WR( addr1, XOR8( RD( addr1 ), RD( addr2 ) ) ); }
	138	break;
88	139
89		OP(50) { AD2_X8; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
90		OP(51) { AD2_Y8; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
91		OP(52) { AD2_XL; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
92		OP(53) { AD2_YL; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
93		OP(54) { AD1_X8; WR( addr1, ( m_HL & 0x00FF ) ); }
94		OP(55) { AD1_Y8; WR( addr1, ( m_HL & 0x00FF ) ); }
95		OP(56) { AD1_XL; WR( addr1, ( m_HL & 0x00FF ) ); }
96		OP(57) { AD1_YL; WR( addr1, ( m_HL & 0x00FF ) ); }
97		OP(58) { AD2_X8; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
98		OP(59) { AD2_Y8; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
99		OP(5A) { AD2_XL; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
100		OP(5B) { AD2_YL; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
101		OP(5C) { AD1_X8; WR( addr1, ( m_HL >> 8 ) ); }
102		OP(5D) { AD1_Y8; WR( addr1, ( m_HL >> 8 ) ); }
103		OP(5E) { AD1_XL; WR( addr1, ( m_HL >> 8 ) ); }
104		OP(5F) { AD1_YL; WR( addr1, ( m_HL >> 8 ) ); }
	140	case 0x40: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	141	break;
	142	case 0x41: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	143	break;
	144	case 0x42: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	145	break;
	146	case 0x43: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	147	break;
	148	case 0x44: { AD1_X8; WR( addr1, ( m_BA & 0x00FF ) ); }
	149	break;
	150	case 0x45: { AD1_Y8; WR( addr1, ( m_BA & 0x00FF ) ); }
	151	break;
	152	case 0x46: { AD1_XL; WR( addr1, ( m_BA & 0x00FF ) ); }
	153	break;
	154	case 0x47: { AD1_YL; WR( addr1, ( m_BA & 0x00FF ) ); }
	155	break;
	156	case 0x48: { AD2_X8; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	157	break;
	158	case 0x49: { AD2_Y8; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	159	break;
	160	case 0x4A: { AD2_XL; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	161	break;
	162	case 0x4B: { AD2_YL; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	163	break;
	164	case 0x4C: { AD1_X8; WR( addr1, ( m_BA >> 8 ) ); }
	165	break;
	166	case 0x4D: { AD1_Y8; WR( addr1, ( m_BA >> 8 ) ); }
	167	break;
	168	case 0x4E: { AD1_XL; WR( addr1, ( m_BA >> 8 ) ); }
	169	break;
	170	case 0x4F: { AD1_YL; WR( addr1, ( m_BA >> 8 ) ); }
	171	break;
105	172
106		OP(60) { AD1_IHL; AD2_X8; WR( addr1, RD( addr2 ) ); }
107		OP(61) { AD1_IHL; AD2_Y8; WR( addr1, RD( addr2 ) ); }
108		OP(62) { AD1_IHL; AD2_XL; WR( addr1, RD( addr2 ) ); }
109		OP(63) { AD1_IHL; AD2_YL; WR( addr1, RD( addr2 ) ); }
110		OP(64) { /* illegal operation? */ }
111		OP(65) { /* illegal operation? */ }
112		OP(66) { /* illegal operation? */ }
113		OP(67) { /* illegal operation? */ }
114		OP(68) { AD1_XIX; AD2_X8; WR( addr1, RD( addr2 ) ); }
115		OP(69) { AD1_XIX; AD2_Y8; WR( addr1, RD( addr2 ) ); }
116		OP(6A) { AD1_XIX; AD2_XL; WR( addr1, RD( addr2 ) ); }
117		OP(6B) { AD1_XIX; AD2_YL; WR( addr1, RD( addr2 ) ); }
118		OP(6C) { /* illegal operation? */ }
119		OP(6D) { /* illegal operation? */ }
120		OP(6E) { /* illegal operation? */ }
121		OP(6F) { /* illegal operation? */ }
	173	case 0x50: { AD2_X8; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	174	break;
	175	case 0x51: { AD2_Y8; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	176	break;
	177	case 0x52: { AD2_XL; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	178	break;
	179	case 0x53: { AD2_YL; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	180	break;
	181	case 0x54: { AD1_X8; WR( addr1, ( m_HL & 0x00FF ) ); }
	182	break;
	183	case 0x55: { AD1_Y8; WR( addr1, ( m_HL & 0x00FF ) ); }
	184	break;
	185	case 0x56: { AD1_XL; WR( addr1, ( m_HL & 0x00FF ) ); }
	186	break;
	187	case 0x57: { AD1_YL; WR( addr1, ( m_HL & 0x00FF ) ); }
	188	break;
	189	case 0x58: { AD2_X8; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	190	break;
	191	case 0x59: { AD2_Y8; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	192	break;
	193	case 0x5A: { AD2_XL; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	194	break;
	195	case 0x5B: { AD2_YL; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	196	break;
	197	case 0x5C: { AD1_X8; WR( addr1, ( m_HL >> 8 ) ); }
	198	break;
	199	case 0x5D: { AD1_Y8; WR( addr1, ( m_HL >> 8 ) ); }
	200	break;
	201	case 0x5E: { AD1_XL; WR( addr1, ( m_HL >> 8 ) ); }
	202	break;
	203	case 0x5F: { AD1_YL; WR( addr1, ( m_HL >> 8 ) ); }
	204	break;
122	205
123		OP(70) { /* illegal operation? */ }
124		OP(71) { /* illegal operation? */ }
125		OP(72) { /* illegal operation? */ }
126		OP(73) { /* illegal operation? */ }
127		OP(74) { /* illegal operation? */ }
128		OP(75) { /* illegal operation? */ }
129		OP(76) { /* illegal operation? */ }
130		OP(77) { /* illegal operation? */ }
131		OP(78) { AD1_YIY; AD2_X8; WR( addr1, RD( addr2 ) ); }
132		OP(79) { AD1_YIY; AD2_Y8; WR( addr1, RD( addr2 ) ); }
133		OP(7A) { AD1_YIY; AD2_XL; WR( addr1, RD( addr2 ) ); }
134		OP(7B) { AD1_YIY; AD2_YL; WR( addr1, RD( addr2 ) ); }
135		OP(7C) { /* illegal operation? */ }
136		OP(7D) { /* illegal operation? */ }
137		OP(7E) { /* illegal operation? */ }
138		OP(7F) { /* illegal operation? */ }
	206	case 0x60: { AD1_IHL; AD2_X8; WR( addr1, RD( addr2 ) ); }
	207	break;
	208	case 0x61: { AD1_IHL; AD2_Y8; WR( addr1, RD( addr2 ) ); }
	209	break;
	210	case 0x62: { AD1_IHL; AD2_XL; WR( addr1, RD( addr2 ) ); }
	211	break;
	212	case 0x63: { AD1_IHL; AD2_YL; WR( addr1, RD( addr2 ) ); }
	213	break;
	214	case 0x64: { /* illegal operation? */ }
	215	break;
	216	case 0x65: { /* illegal operation? */ }
	217	break;
	218	case 0x66: { /* illegal operation? */ }
	219	break;
	220	case 0x67: { /* illegal operation? */ }
	221	break;
	222	case 0x68: { AD1_XIX; AD2_X8; WR( addr1, RD( addr2 ) ); }
	223	break;
	224	case 0x69: { AD1_XIX; AD2_Y8; WR( addr1, RD( addr2 ) ); }
	225	break;
	226	case 0x6A: { AD1_XIX; AD2_XL; WR( addr1, RD( addr2 ) ); }
	227	break;
	228	case 0x6B: { AD1_XIX; AD2_YL; WR( addr1, RD( addr2 ) ); }
	229	break;
	230	case 0x6C: { /* illegal operation? */ }
	231	break;
	232	case 0x6D: { /* illegal operation? */ }
	233	break;
	234	case 0x6E: { /* illegal operation? */ }
	235	break;
	236	case 0x6F: { /* illegal operation? */ }
	237	break;
139	238
140		OP(80) { m_BA = ( m_BA & 0xFF00 ) | SAL8( m_BA & 0x00FF ); }
141		OP(81) { m_BA = ( m_BA & 0x00FF ) | ( SAL8( m_BA >> 8 )<< 8 ); }
142		OP(82) { AD1_IN8; WR( addr1, SAL8( RD( addr1 ) ) ); }
143		OP(83) { AD1_IHL; WR( addr1, SAL8( RD( addr1 ) ) ); }
144		OP(84) { m_BA = ( m_BA & 0xFF00 ) | SHL8( m_BA & 0x00FF ); }
145		OP(85) { m_BA = ( m_BA & 0x00FF ) | ( SHL8( m_BA >> 8 ) << 8 ); }
146		OP(86) { AD1_IN8; WR( addr1, SHL8( RD( addr1 ) ) ); }
147		OP(87) { AD1_IHL; WR( addr1, SHL8( RD( addr1 ) ) ); }
148		OP(88) { m_BA = ( m_BA & 0xFF00 ) | SAR8( m_BA & 0x00FF ); }
149		OP(89) { m_BA = ( m_BA & 0x00FF ) | ( SAR8( m_BA >> 8 ) << 8 ); }
150		OP(8A) { AD1_IN8; WR( addr1, SAR8( RD( addr1 ) ) ); }
151		OP(8B) { AD1_IHL; WR( addr1, SAR8( RD( addr1 ) ) ); }
152		OP(8C) { m_BA = ( m_BA & 0xFF00 ) | SHR8( m_BA & 0x00FF ); }
153		OP(8D) { m_BA = ( m_BA & 0x00FF ) | ( SHR8( m_BA >> 8 ) << 8 ); }
154		OP(8E) { AD1_IN8; WR( addr1, SHR8( RD( addr1 ) ) ); }
155		OP(8F) { AD1_IHL; WR( addr1, SHR8( RD( addr1 ) ) ); }
	239	case 0x70: { /* illegal operation? */ }
	240	break;
	241	case 0x71: { /* illegal operation? */ }
	242	break;
	243	case 0x72: { /* illegal operation? */ }
	244	break;
	245	case 0x73: { /* illegal operation? */ }
	246	break;
	247	case 0x74: { /* illegal operation? */ }
	248	break;
	249	case 0x75: { /* illegal operation? */ }
	250	break;
	251	case 0x76: { /* illegal operation? */ }
	252	break;
	253	case 0x77: { /* illegal operation? */ }
	254	break;
	255	case 0x78: { AD1_YIY; AD2_X8; WR( addr1, RD( addr2 ) ); }
	256	break;
	257	case 0x79: { AD1_YIY; AD2_Y8; WR( addr1, RD( addr2 ) ); }
	258	break;
	259	case 0x7A: { AD1_YIY; AD2_XL; WR( addr1, RD( addr2 ) ); }
	260	break;
	261	case 0x7B: { AD1_YIY; AD2_YL; WR( addr1, RD( addr2 ) ); }
	262	break;
	263	case 0x7C: { /* illegal operation? */ }
	264	break;
	265	case 0x7D: { /* illegal operation? */ }
	266	break;
	267	case 0x7E: { /* illegal operation? */ }
	268	break;
	269	case 0x7F: { /* illegal operation? */ }
	270	break;
156	271
157		OP(90) { m_BA = ( m_BA & 0xFF00 ) | ROLC8( m_BA & 0x00FF ); }
158		OP(91) { m_BA = ( m_BA & 0x00FF ) | ( ROLC8( m_BA >> 8 ) << 8 ); }
159		OP(92) { AD1_IN8; WR( addr1, ROLC8( RD( addr1 ) ) ); }
160		OP(93) { AD1_IHL; WR( addr1, ROLC8( RD( addr1 ) ) ); }
161		OP(94) { m_BA = ( m_BA & 0xFF00 ) | ROL8( m_BA & 0x00FF ); }
162		OP(95) { m_BA = ( m_BA & 0x00FF ) | ( ROL8( m_BA >> 8 ) << 8 ); }
163		OP(96) { AD1_IN8; WR( addr1, ROL8( RD( addr1 ) ) ); }
164		OP(97) { AD1_IHL; WR( addr1, ROL8( RD( addr1 ) ) ); }
165		OP(98) { m_BA = ( m_BA & 0xFF00 ) | RORC8( m_BA & 0x00FF ); }
166		OP(99) { m_BA = ( m_BA & 0x00FF ) | ( RORC8( m_BA >> 8 ) << 8 ); }
167		OP(9A) { AD1_IN8; WR( addr1, RORC8( RD( addr1 ) ) ); }
168		OP(9B) { AD1_IHL; WR( addr1, RORC8( RD( addr1 ) ) ); }
169		OP(9C) { m_BA = ( m_BA & 0xFF00 ) | ROR8( m_BA & 0x00FF ); }
170		OP(9D) { m_BA = ( m_BA & 0x00FF ) | ( ROR8( m_BA >> 8 ) << 8 ); }
171		OP(9E) { AD1_IN8; WR( addr1, ROR8( RD( addr1 ) ) ); }
172		OP(9F) { AD1_IHL; WR( addr1, ROR8( RD( addr1 ) ) ); }
	272	case 0x80: { m_BA = ( m_BA & 0xFF00 ) | SAL8( m_BA & 0x00FF ); }
	273	break;
	274	case 0x81: { m_BA = ( m_BA & 0x00FF ) | ( SAL8( m_BA >> 8 )<< 8 ); }
	275	break;
	276	case 0x82: { AD1_IN8; WR( addr1, SAL8( RD( addr1 ) ) ); }
	277	break;
	278	case 0x83: { AD1_IHL; WR( addr1, SAL8( RD( addr1 ) ) ); }
	279	break;
	280	case 0x84: { m_BA = ( m_BA & 0xFF00 ) | SHL8( m_BA & 0x00FF ); }
	281	break;
	282	case 0x85: { m_BA = ( m_BA & 0x00FF ) | ( SHL8( m_BA >> 8 ) << 8 ); }
	283	break;
	284	case 0x86: { AD1_IN8; WR( addr1, SHL8( RD( addr1 ) ) ); }
	285	break;
	286	case 0x87: { AD1_IHL; WR( addr1, SHL8( RD( addr1 ) ) ); }
	287	break;
	288	case 0x88: { m_BA = ( m_BA & 0xFF00 ) | SAR8( m_BA & 0x00FF ); }
	289	break;
	290	case 0x89: { m_BA = ( m_BA & 0x00FF ) | ( SAR8( m_BA >> 8 ) << 8 ); }
	291	break;
	292	case 0x8A: { AD1_IN8; WR( addr1, SAR8( RD( addr1 ) ) ); }
	293	break;
	294	case 0x8B: { AD1_IHL; WR( addr1, SAR8( RD( addr1 ) ) ); }
	295	break;
	296	case 0x8C: { m_BA = ( m_BA & 0xFF00 ) | SHR8( m_BA & 0x00FF ); }
	297	break;
	298	case 0x8D: { m_BA = ( m_BA & 0x00FF ) | ( SHR8( m_BA >> 8 ) << 8 ); }
	299	break;
	300	case 0x8E: { AD1_IN8; WR( addr1, SHR8( RD( addr1 ) ) ); }
	301	break;
	302	case 0x8F: { AD1_IHL; WR( addr1, SHR8( RD( addr1 ) ) ); }
	303	break;
173	304
174		OP(A0) { m_BA = ( m_BA & 0xFF00 ) | NOT8( m_BA & 0x00FF ); }
175		OP(A1) { m_BA = ( m_BA & 0x00FF ) | ( NOT8( m_BA >> 8 ) << 8 ); }
176		OP(A2) { AD1_IN8; WR( addr1, NOT8( RD( addr1 ) ) ); }
177		OP(A3) { AD1_IHL; WR( addr1, NOT8( RD( addr1 ) ) ); }
178		OP(A4) { m_BA = ( m_BA & 0xFF00 ) | NEG8( m_BA & 0x00FF ); }
179		OP(A5) { m_BA = ( m_BA & 0x00FF ) | ( NEG8( m_BA >> 8 ) << 8 ); }
180		OP(A6) { AD1_IN8; WR( addr1, NEG8( RD( addr1 ) ) ); }
181		OP(A7) { AD1_IHL; WR( addr1, NEG8( RD( addr1 ) ) ); }
182		OP(A8) { m_BA = ( ( m_BA & 0x0080 ) ? ( 0xFF00 | m_BA ) : ( m_BA & 0x00FF ) ); }
183		OP(A9) { /* illegal operation? */ }
184		OP(AA) { /* illegal operation? */ }
185		OP(AB) { /* illegal operation? */ }
186		OP(AC) { /* illegal operation? */ }
187		OP(AD) { /* illegal operation? */ }
188		OP(AE) { /* HALT */ m_halted = 1; }
189		OP(AF) { }
	305	case 0x90: { m_BA = ( m_BA & 0xFF00 ) | ROLC8( m_BA & 0x00FF ); }
	306	break;
	307	case 0x91: { m_BA = ( m_BA & 0x00FF ) | ( ROLC8( m_BA >> 8 ) << 8 ); }
	308	break;
	309	case 0x92: { AD1_IN8; WR( addr1, ROLC8( RD( addr1 ) ) ); }
	310	break;
	311	case 0x93: { AD1_IHL; WR( addr1, ROLC8( RD( addr1 ) ) ); }
	312	break;
	313	case 0x94: { m_BA = ( m_BA & 0xFF00 ) | ROL8( m_BA & 0x00FF ); }
	314	break;
	315	case 0x95: { m_BA = ( m_BA & 0x00FF ) | ( ROL8( m_BA >> 8 ) << 8 ); }
	316	break;
	317	case 0x96: { AD1_IN8; WR( addr1, ROL8( RD( addr1 ) ) ); }
	318	break;
	319	case 0x97: { AD1_IHL; WR( addr1, ROL8( RD( addr1 ) ) ); }
	320	break;
	321	case 0x98: { m_BA = ( m_BA & 0xFF00 ) | RORC8( m_BA & 0x00FF ); }
	322	break;
	323	case 0x99: { m_BA = ( m_BA & 0x00FF ) | ( RORC8( m_BA >> 8 ) << 8 ); }
	324	break;
	325	case 0x9A: { AD1_IN8; WR( addr1, RORC8( RD( addr1 ) ) ); }
	326	break;
	327	case 0x9B: { AD1_IHL; WR( addr1, RORC8( RD( addr1 ) ) ); }
	328	break;
	329	case 0x9C: { m_BA = ( m_BA & 0xFF00 ) | ROR8( m_BA & 0x00FF ); }
	330	break;
	331	case 0x9D: { m_BA = ( m_BA & 0x00FF ) | ( ROR8( m_BA >> 8 ) << 8 ); }
	332	break;
	333	case 0x9E: { AD1_IN8; WR( addr1, ROR8( RD( addr1 ) ) ); }
	334	break;
	335	case 0x9F: { AD1_IHL; WR( addr1, ROR8( RD( addr1 ) ) ); }
	336	break;
190	337
191		OP(B0) { m_BA = ( m_BA & 0x00FF ) | ( AND8( ( m_BA >> 8 ), rdop() ) << 8 ); }
192		OP(B1) { m_HL = ( m_HL & 0xFF00 ) | AND8( ( m_HL & 0x00FF ), rdop() ); }
193		OP(B2) { m_HL = ( m_HL & 0x00FF ) | ( AND8( ( m_HL >> 8 ), rdop() ) << 8 ); }
194		OP(B3) { /* illegal operation? */ }
195		OP(B4) { m_BA = ( m_BA & 0x00FF ) | ( OR8( ( m_BA >> 8 ), rdop() ) << 8 ); }
196		OP(B5) { m_HL = ( m_HL & 0xFF00 ) | OR8( ( m_HL & 0x00FF ), rdop() ); }
197		OP(B6) { m_HL = ( m_HL & 0x00FF ) | ( OR8( ( m_HL >> 8 ), rdop() ) << 8 ); }
198		OP(B7) { /* illegal operation? */ }
199		OP(B8) { m_BA = ( m_BA & 0x00FF ) | ( XOR8( ( m_BA >> 8 ), rdop() ) << 8 ); }
200		OP(B9) { m_HL = ( m_HL & 0xFF00 ) | XOR8( ( m_HL & 0x00FF ), rdop() ); }
201		OP(BA) { m_HL = ( m_HL & 0x00FF ) | ( XOR8( ( m_HL >> 8 ), rdop() ) << 8 ); }
202		OP(BB) { /* illegal operation? */ }
203		OP(BC) { SUB8( ( m_BA >> 8 ), rdop() ); }
204		OP(BD) { SUB8( ( m_HL & 0x00FF), rdop() ); }
205		OP(BE) { SUB8( ( m_HL >> 8 ), rdop() ); }
206		OP(BF) { SUB8( m_N, rdop() ); }
	338	case 0xA0: { m_BA = ( m_BA & 0xFF00 ) | NOT8( m_BA & 0x00FF ); }
	339	break;
	340	case 0xA1: { m_BA = ( m_BA & 0x00FF ) | ( NOT8( m_BA >> 8 ) << 8 ); }
	341	break;
	342	case 0xA2: { AD1_IN8; WR( addr1, NOT8( RD( addr1 ) ) ); }
	343	break;
	344	case 0xA3: { AD1_IHL; WR( addr1, NOT8( RD( addr1 ) ) ); }
	345	break;
	346	case 0xA4: { m_BA = ( m_BA & 0xFF00 ) | NEG8( m_BA & 0x00FF ); }
	347	break;
	348	case 0xA5: { m_BA = ( m_BA & 0x00FF ) | ( NEG8( m_BA >> 8 ) << 8 ); }
	349	break;
	350	case 0xA6: { AD1_IN8; WR( addr1, NEG8( RD( addr1 ) ) ); }
	351	break;
	352	case 0xA7: { AD1_IHL; WR( addr1, NEG8( RD( addr1 ) ) ); }
	353	break;
	354	case 0xA8: { m_BA = ( ( m_BA & 0x0080 ) ? ( 0xFF00 | m_BA ) : ( m_BA & 0x00FF ) ); }
	355	break;
	356	case 0xA9: { /* illegal operation? */ }
	357	break;
	358	case 0xAA: { /* illegal operation? */ }
	359	break;
	360	case 0xAB: { /* illegal operation? */ }
	361	break;
	362	case 0xAC: { /* illegal operation? */ }
	363	break;
	364	case 0xAD: { /* illegal operation? */ }
	365	break;
	366	case 0xAE: { /* HALT */ m_halted = 1; }
	367	break;
	368	case 0xAF: { }
	369	break;
207	370
208		OP(C0) { m_BA = ( m_BA & 0xFF00 ) | m_N; }
209		OP(C1) { m_BA = ( m_BA & 0xFF00 ) | m_F; }
210		OP(C2) { m_N = ( m_BA & 0x00FF ); }
211		OP(C3) { m_F = ( m_BA & 0x00FF ); }
212		OP(C4) { m_U = rdop(); }
213		OP(C5) { m_I = rdop(); }
214		OP(C6) { m_XI = rdop(); }
215		OP(C7) { m_YI = rdop(); }
216		OP(C8) { m_BA = ( m_BA & 0xFF00 ) | m_V; }
217		OP(C9) { m_BA = ( m_BA & 0xFF00 ) | m_I; }
218		OP(CA) { m_BA = ( m_BA & 0xFF00 ) | m_XI; }
219		OP(CB) { m_BA = ( m_BA & 0xFF00 ) | m_YI; }
220		OP(CC) { m_U = ( m_BA & 0x00FF ); }
221		OP(CD) { m_I = ( m_BA & 0x00FF ); }
222		OP(CE) { m_XI = ( m_BA & 0x00FF ); }
223		OP(CF) { m_YI = ( m_BA & 0x00FF ); }
	371	case 0xB0: { m_BA = ( m_BA & 0x00FF ) | ( AND8( ( m_BA >> 8 ), rdop() ) << 8 ); }
	372	break;
	373	case 0xB1: { m_HL = ( m_HL & 0xFF00 ) | AND8( ( m_HL & 0x00FF ), rdop() ); }
	374	break;
	375	case 0xB2: { m_HL = ( m_HL & 0x00FF ) | ( AND8( ( m_HL >> 8 ), rdop() ) << 8 ); }
	376	break;
	377	case 0xB3: { /* illegal operation? */ }
	378	break;
	379	case 0xB4: { m_BA = ( m_BA & 0x00FF ) | ( OR8( ( m_BA >> 8 ), rdop() ) << 8 ); }
	380	break;
	381	case 0xB5: { m_HL = ( m_HL & 0xFF00 ) | OR8( ( m_HL & 0x00FF ), rdop() ); }
	382	break;
	383	case 0xB6: { m_HL = ( m_HL & 0x00FF ) | ( OR8( ( m_HL >> 8 ), rdop() ) << 8 ); }
	384	break;
	385	case 0xB7: { /* illegal operation? */ }
	386	break;
	387	case 0xB8: { m_BA = ( m_BA & 0x00FF ) | ( XOR8( ( m_BA >> 8 ), rdop() ) << 8 ); }
	388	break;
	389	case 0xB9: { m_HL = ( m_HL & 0xFF00 ) | XOR8( ( m_HL & 0x00FF ), rdop() ); }
	390	break;
	391	case 0xBA: { m_HL = ( m_HL & 0x00FF ) | ( XOR8( ( m_HL >> 8 ), rdop() ) << 8 ); }
	392	break;
	393	case 0xBB: { /* illegal operation? */ }
	394	break;
	395	case 0xBC: { SUB8( ( m_BA >> 8 ), rdop() ); }
	396	break;
	397	case 0xBD: { SUB8( ( m_HL & 0x00FF), rdop() ); }
	398	break;
	399	case 0xBE: { SUB8( ( m_HL >> 8 ), rdop() ); }
	400	break;
	401	case 0xBF: { SUB8( m_N, rdop() ); }
	402	break;
224	403
225		OP(D0) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
226		OP(D1) { AD2_I16; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
227		OP(D2) { AD2_I16; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
228		OP(D3) { AD2_I16; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
229		OP(D4) { AD1_I16; WR( addr1, ( m_BA & 0x00FF ) ); }
230		OP(D5) { AD1_I16; WR( addr1, ( m_BA >> 8 ) ); }
231		OP(D6) { AD1_I16; WR( addr1, ( m_HL & 0x00FF ) ); }
232		OP(D7) { AD1_I16; WR( addr1, ( m_HL >> 8 ) ); }
233		OP(D8) { m_HL = ( m_HL & 0x00FF ) * ( m_BA & 0x00FF );  }
234		OP(D9) { int d = m_HL / ( m_BA & 0x00FF ); m_HL = ( ( m_HL - ( ( m_BA & 0x00FF ) * d ) ) << 8 ) | d; }
235		OP(DA) { /* illegal operation? */ }
236		OP(DB) { /* illegal operation? */ }
237		OP(DC) { /* illegal operation? */ }
238		OP(DD) { /* illegal operation? */ }
239		OP(DE) { /* illegal operation? */ }
240		OP(DF) { /* illegal operation? */ }
	404	case 0xC0: { m_BA = ( m_BA & 0xFF00 ) | m_N; }
	405	break;
	406	case 0xC1: { m_BA = ( m_BA & 0xFF00 ) | m_F; }
	407	break;
	408	case 0xC2: { m_N = ( m_BA & 0x00FF ); }
	409	break;
	410	case 0xC3: { m_F = ( m_BA & 0x00FF ); }
	411	break;
	412	case 0xC4: { m_U = rdop(); }
	413	break;
	414	case 0xC5: { m_I = rdop(); }
	415	break;
	416	case 0xC6: { m_XI = rdop(); }
	417	break;
	418	case 0xC7: { m_YI = rdop(); }
	419	break;
	420	case 0xC8: { m_BA = ( m_BA & 0xFF00 ) | m_V; }
	421	break;
	422	case 0xC9: { m_BA = ( m_BA & 0xFF00 ) | m_I; }
	423	break;
	424	case 0xCA: { m_BA = ( m_BA & 0xFF00 ) | m_XI; }
	425	break;
	426	case 0xCB: { m_BA = ( m_BA & 0xFF00 ) | m_YI; }
	427	break;
	428	case 0xCC: { m_U = ( m_BA & 0x00FF ); }
	429	break;
	430	case 0xCD: { m_I = ( m_BA & 0x00FF ); }
	431	break;
	432	case 0xCE: { m_XI = ( m_BA & 0x00FF ); }
	433	break;
	434	case 0xCF: { m_YI = ( m_BA & 0x00FF ); }
	435	break;
241	436
242		OP(E0) { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
243		OP(E1) { INT8 d8 = rdop(); if ( ( m_F & FLAG_Z ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
244		OP(E2) { INT8 d8 = rdop(); if ( !( m_F & FLAG_Z ) && ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { JMP( m_PC + d8 - 1 ); } }
245		OP(E3) { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { JMP( m_PC + d8 - 1 ); } }
246		OP(E4) { INT8 d8 = rdop(); if ( ( m_F & FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
247		OP(E5) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
248		OP(E6) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_S ) ) { JMP( m_PC + d8 - 1 ); } }
249		OP(E7) { INT8 d8 = rdop(); if ( ( m_F & FLAG_S ) ) { JMP( m_PC + d8 - 1 ); } }
250		OP(E8) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X0 ) ) { JMP( m_PC + d8 - 1 ); } }
251		OP(E9) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X1 ) ) { JMP( m_PC + d8 - 1 ); } }
252		OP(EA) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X2 ) ) { JMP( m_PC + d8 - 1 ); } }
253		OP(EB) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_DZ ) ) { JMP( m_PC + d8 - 1 ); } }
254		OP(EC) { INT8 d8 = rdop(); if ( ( m_E & EXEC_X0 ) ) { JMP( m_PC + d8 - 1 ); } }
255		OP(ED) { INT8 d8 = rdop(); if ( ( m_E & EXEC_X1 ) ) { JMP( m_PC + d8 - 1 ); } }
256		OP(EE) { INT8 d8 = rdop(); if ( ( m_E & EXEC_X2 ) ) { JMP( m_PC + d8 - 1 ); } }
257		OP(EF) { INT8 d8 = rdop(); if ( ( m_E & EXEC_DZ ) ) { JMP( m_PC + d8 - 1 ); } }
	437	case 0xD0: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	438	break;
	439	case 0xD1: { AD2_I16; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	440	break;
	441	case 0xD2: { AD2_I16; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	442	break;
	443	case 0xD3: { AD2_I16; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	444	break;
	445	case 0xD4: { AD1_I16; WR( addr1, ( m_BA & 0x00FF ) ); }
	446	break;
	447	case 0xD5: { AD1_I16; WR( addr1, ( m_BA >> 8 ) ); }
	448	break;
	449	case 0xD6: { AD1_I16; WR( addr1, ( m_HL & 0x00FF ) ); }
	450	break;
	451	case 0xD7: { AD1_I16; WR( addr1, ( m_HL >> 8 ) ); }
	452	break;
	453	case 0xD8: { m_HL = ( m_HL & 0x00FF ) * ( m_BA & 0x00FF );  }
	454	break;
	455	case 0xD9: { int d = m_HL / ( m_BA & 0x00FF ); m_HL = ( ( m_HL - ( ( m_BA & 0x00FF ) * d ) ) << 8 ) | d; }
	456	break;
	457	case 0xDA: { /* illegal operation? */ }
	458	break;
	459	case 0xDB: { /* illegal operation? */ }
	460	break;
	461	case 0xDC: { /* illegal operation? */ }
	462	break;
	463	case 0xDD: { /* illegal operation? */ }
	464	break;
	465	case 0xDE: { /* illegal operation? */ }
	466	break;
	467	case 0xDF: { /* illegal operation? */ }
	468	break;
258	469
259		OP(F0) { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
260		OP(F1) { INT8 d8 = rdop(); if ( ( m_F & FLAG_Z ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
261		OP(F2) { INT8 d8 = rdop(); if ( !( m_F & FLAG_Z ) && ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
262		OP(F3) { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { CALL( m_PC + d8 - 1 ); } }
263		OP(F4) { INT8 d8 = rdop(); if ( ( m_F & FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
264		OP(F5) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
265		OP(F6) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_S ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
266		OP(F7) { INT8 d8 = rdop(); if ( ( m_F & FLAG_S ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
267		OP(F8) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X0 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
268		OP(F9) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X1 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
269		OP(FA) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X2 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
270		OP(FB) { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_DZ ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
271		OP(FC) { INT8 d8 = rdop(); if ( ( m_E & EXEC_X0 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
272		OP(FD) { INT8 d8 = rdop(); if ( ( m_E & EXEC_X1 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
273		OP(FE) { INT8 d8 = rdop(); if ( ( m_E & EXEC_X2 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
274		OP(FF) { INT8 d8 = rdop(); if ( ( m_E & EXEC_DZ ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	470	case 0xE0: { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
	471	break;
	472	case 0xE1: { INT8 d8 = rdop(); if ( ( m_F & FLAG_Z ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
	473	break;
	474	case 0xE2: { INT8 d8 = rdop(); if ( !( m_F & FLAG_Z ) && ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { JMP( m_PC + d8 - 1 ); } }
	475	break;
	476	case 0xE3: { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { JMP( m_PC + d8 - 1 ); } }
	477	break;
	478	case 0xE4: { INT8 d8 = rdop(); if ( ( m_F & FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
	479	break;
	480	case 0xE5: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
	481	break;
	482	case 0xE6: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_S ) ) { JMP( m_PC + d8 - 1 ); } }
	483	break;
	484	case 0xE7: { INT8 d8 = rdop(); if ( ( m_F & FLAG_S ) ) { JMP( m_PC + d8 - 1 ); } }
	485	break;
	486	case 0xE8: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X0 ) ) { JMP( m_PC + d8 - 1 ); } }
	487	break;
	488	case 0xE9: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X1 ) ) { JMP( m_PC + d8 - 1 ); } }
	489	break;
	490	case 0xEA: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X2 ) ) { JMP( m_PC + d8 - 1 ); } }
	491	break;
	492	case 0xEB: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_DZ ) ) { JMP( m_PC + d8 - 1 ); } }
	493	break;
	494	case 0xEC: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X0 ) ) { JMP( m_PC + d8 - 1 ); } }
	495	break;
	496	case 0xED: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X1 ) ) { JMP( m_PC + d8 - 1 ); } }
	497	break;
	498	case 0xEE: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X2 ) ) { JMP( m_PC + d8 - 1 ); } }
	499	break;
	500	case 0xEF: { INT8 d8 = rdop(); if ( ( m_E & EXEC_DZ ) ) { JMP( m_PC + d8 - 1 ); } }
	501	break;
275	502
276		const minx_cpu_device::op_func minx_cpu_device::insnminx_CE[256] = {
277		&minx_cpu_device::minx_CE_00, &minx_cpu_device::minx_CE_01, &minx_cpu_device::minx_CE_02, &minx_cpu_device::minx_CE_03, &minx_cpu_device::minx_CE_04, &minx_cpu_device::minx_CE_05, &minx_cpu_device::minx_CE_06, &minx_cpu_device::minx_CE_07,
278		&minx_cpu_device::minx_CE_08, &minx_cpu_device::minx_CE_09, &minx_cpu_device::minx_CE_0A, &minx_cpu_device::minx_CE_0B, &minx_cpu_device::minx_CE_0C, &minx_cpu_device::minx_CE_0D, &minx_cpu_device::minx_CE_0E, &minx_cpu_device::minx_CE_0F,
279		&minx_cpu_device::minx_CE_10, &minx_cpu_device::minx_CE_11, &minx_cpu_device::minx_CE_12, &minx_cpu_device::minx_CE_13, &minx_cpu_device::minx_CE_14, &minx_cpu_device::minx_CE_15, &minx_cpu_device::minx_CE_16, &minx_cpu_device::minx_CE_17,
280		&minx_cpu_device::minx_CE_18, &minx_cpu_device::minx_CE_19, &minx_cpu_device::minx_CE_1A, &minx_cpu_device::minx_CE_1B, &minx_cpu_device::minx_CE_1C, &minx_cpu_device::minx_CE_1D, &minx_cpu_device::minx_CE_1E, &minx_cpu_device::minx_CE_1F,
281		&minx_cpu_device::minx_CE_20, &minx_cpu_device::minx_CE_21, &minx_cpu_device::minx_CE_22, &minx_cpu_device::minx_CE_23, &minx_cpu_device::minx_CE_24, &minx_cpu_device::minx_CE_25, &minx_cpu_device::minx_CE_26, &minx_cpu_device::minx_CE_27,
282		&minx_cpu_device::minx_CE_28, &minx_cpu_device::minx_CE_29, &minx_cpu_device::minx_CE_2A, &minx_cpu_device::minx_CE_2B, &minx_cpu_device::minx_CE_2C, &minx_cpu_device::minx_CE_2D, &minx_cpu_device::minx_CE_2E, &minx_cpu_device::minx_CE_2F,
283		&minx_cpu_device::minx_CE_30, &minx_cpu_device::minx_CE_31, &minx_cpu_device::minx_CE_32, &minx_cpu_device::minx_CE_33, &minx_cpu_device::minx_CE_34, &minx_cpu_device::minx_CE_35, &minx_cpu_device::minx_CE_36, &minx_cpu_device::minx_CE_37,
284		&minx_cpu_device::minx_CE_38, &minx_cpu_device::minx_CE_39, &minx_cpu_device::minx_CE_3A, &minx_cpu_device::minx_CE_3B, &minx_cpu_device::minx_CE_3C, &minx_cpu_device::minx_CE_3D, &minx_cpu_device::minx_CE_3E, &minx_cpu_device::minx_CE_3F,
285		&minx_cpu_device::minx_CE_40, &minx_cpu_device::minx_CE_41, &minx_cpu_device::minx_CE_42, &minx_cpu_device::minx_CE_43, &minx_cpu_device::minx_CE_44, &minx_cpu_device::minx_CE_45, &minx_cpu_device::minx_CE_46, &minx_cpu_device::minx_CE_47,
286		&minx_cpu_device::minx_CE_48, &minx_cpu_device::minx_CE_49, &minx_cpu_device::minx_CE_4A, &minx_cpu_device::minx_CE_4B, &minx_cpu_device::minx_CE_4C, &minx_cpu_device::minx_CE_4D, &minx_cpu_device::minx_CE_4E, &minx_cpu_device::minx_CE_4F,
287		&minx_cpu_device::minx_CE_50, &minx_cpu_device::minx_CE_51, &minx_cpu_device::minx_CE_52, &minx_cpu_device::minx_CE_53, &minx_cpu_device::minx_CE_54, &minx_cpu_device::minx_CE_55, &minx_cpu_device::minx_CE_56, &minx_cpu_device::minx_CE_57,
288		&minx_cpu_device::minx_CE_58, &minx_cpu_device::minx_CE_59, &minx_cpu_device::minx_CE_5A, &minx_cpu_device::minx_CE_5B, &minx_cpu_device::minx_CE_5C, &minx_cpu_device::minx_CE_5D, &minx_cpu_device::minx_CE_5E, &minx_cpu_device::minx_CE_5F,
289		&minx_cpu_device::minx_CE_60, &minx_cpu_device::minx_CE_61, &minx_cpu_device::minx_CE_62, &minx_cpu_device::minx_CE_63, &minx_cpu_device::minx_CE_64, &minx_cpu_device::minx_CE_65, &minx_cpu_device::minx_CE_66, &minx_cpu_device::minx_CE_67,
290		&minx_cpu_device::minx_CE_68, &minx_cpu_device::minx_CE_69, &minx_cpu_device::minx_CE_6A, &minx_cpu_device::minx_CE_6B, &minx_cpu_device::minx_CE_6C, &minx_cpu_device::minx_CE_6D, &minx_cpu_device::minx_CE_6E, &minx_cpu_device::minx_CE_6F,
291		&minx_cpu_device::minx_CE_70, &minx_cpu_device::minx_CE_71, &minx_cpu_device::minx_CE_72, &minx_cpu_device::minx_CE_73, &minx_cpu_device::minx_CE_74, &minx_cpu_device::minx_CE_75, &minx_cpu_device::minx_CE_76, &minx_cpu_device::minx_CE_77,
292		&minx_cpu_device::minx_CE_78, &minx_cpu_device::minx_CE_79, &minx_cpu_device::minx_CE_7A, &minx_cpu_device::minx_CE_7B, &minx_cpu_device::minx_CE_7C, &minx_cpu_device::minx_CE_7D, &minx_cpu_device::minx_CE_7E, &minx_cpu_device::minx_CE_7F,
293		&minx_cpu_device::minx_CE_80, &minx_cpu_device::minx_CE_81, &minx_cpu_device::minx_CE_82, &minx_cpu_device::minx_CE_83, &minx_cpu_device::minx_CE_84, &minx_cpu_device::minx_CE_85, &minx_cpu_device::minx_CE_86, &minx_cpu_device::minx_CE_87,
294		&minx_cpu_device::minx_CE_88, &minx_cpu_device::minx_CE_89, &minx_cpu_device::minx_CE_8A, &minx_cpu_device::minx_CE_8B, &minx_cpu_device::minx_CE_8C, &minx_cpu_device::minx_CE_8D, &minx_cpu_device::minx_CE_8E, &minx_cpu_device::minx_CE_8F,
295		&minx_cpu_device::minx_CE_90, &minx_cpu_device::minx_CE_91, &minx_cpu_device::minx_CE_92, &minx_cpu_device::minx_CE_93, &minx_cpu_device::minx_CE_94, &minx_cpu_device::minx_CE_95, &minx_cpu_device::minx_CE_96, &minx_cpu_device::minx_CE_97,
296		&minx_cpu_device::minx_CE_98, &minx_cpu_device::minx_CE_99, &minx_cpu_device::minx_CE_9A, &minx_cpu_device::minx_CE_9B, &minx_cpu_device::minx_CE_9C, &minx_cpu_device::minx_CE_9D, &minx_cpu_device::minx_CE_9E, &minx_cpu_device::minx_CE_9F,
297		&minx_cpu_device::minx_CE_A0, &minx_cpu_device::minx_CE_A1, &minx_cpu_device::minx_CE_A2, &minx_cpu_device::minx_CE_A3, &minx_cpu_device::minx_CE_A4, &minx_cpu_device::minx_CE_A5, &minx_cpu_device::minx_CE_A6, &minx_cpu_device::minx_CE_A7,
298		&minx_cpu_device::minx_CE_A8, &minx_cpu_device::minx_CE_A9, &minx_cpu_device::minx_CE_AA, &minx_cpu_device::minx_CE_AB, &minx_cpu_device::minx_CE_AC, &minx_cpu_device::minx_CE_AD, &minx_cpu_device::minx_CE_AE, &minx_cpu_device::minx_CE_AF,
299		&minx_cpu_device::minx_CE_B0, &minx_cpu_device::minx_CE_B1, &minx_cpu_device::minx_CE_B2, &minx_cpu_device::minx_CE_B3, &minx_cpu_device::minx_CE_B4, &minx_cpu_device::minx_CE_B5, &minx_cpu_device::minx_CE_B6, &minx_cpu_device::minx_CE_B7,
300		&minx_cpu_device::minx_CE_B8, &minx_cpu_device::minx_CE_B9, &minx_cpu_device::minx_CE_BA, &minx_cpu_device::minx_CE_BB, &minx_cpu_device::minx_CE_BC, &minx_cpu_device::minx_CE_BD, &minx_cpu_device::minx_CE_BE, &minx_cpu_device::minx_CE_BF,
301		&minx_cpu_device::minx_CE_C0, &minx_cpu_device::minx_CE_C1, &minx_cpu_device::minx_CE_C2, &minx_cpu_device::minx_CE_C3, &minx_cpu_device::minx_CE_C4, &minx_cpu_device::minx_CE_C5, &minx_cpu_device::minx_CE_C6, &minx_cpu_device::minx_CE_C7,
302		&minx_cpu_device::minx_CE_C8, &minx_cpu_device::minx_CE_C9, &minx_cpu_device::minx_CE_CA, &minx_cpu_device::minx_CE_CB, &minx_cpu_device::minx_CE_CC, &minx_cpu_device::minx_CE_CD, &minx_cpu_device::minx_CE_CE, &minx_cpu_device::minx_CE_CF,
303		&minx_cpu_device::minx_CE_D0, &minx_cpu_device::minx_CE_D1, &minx_cpu_device::minx_CE_D2, &minx_cpu_device::minx_CE_D3, &minx_cpu_device::minx_CE_D4, &minx_cpu_device::minx_CE_D5, &minx_cpu_device::minx_CE_D6, &minx_cpu_device::minx_CE_D7,
304		&minx_cpu_device::minx_CE_D8, &minx_cpu_device::minx_CE_D9, &minx_cpu_device::minx_CE_DA, &minx_cpu_device::minx_CE_DB, &minx_cpu_device::minx_CE_DC, &minx_cpu_device::minx_CE_DD, &minx_cpu_device::minx_CE_DE, &minx_cpu_device::minx_CE_DF,
305		&minx_cpu_device::minx_CE_E0, &minx_cpu_device::minx_CE_E1, &minx_cpu_device::minx_CE_E2, &minx_cpu_device::minx_CE_E3, &minx_cpu_device::minx_CE_E4, &minx_cpu_device::minx_CE_E5, &minx_cpu_device::minx_CE_E6, &minx_cpu_device::minx_CE_E7,
306		&minx_cpu_device::minx_CE_E8, &minx_cpu_device::minx_CE_E9, &minx_cpu_device::minx_CE_EA, &minx_cpu_device::minx_CE_EB, &minx_cpu_device::minx_CE_EC, &minx_cpu_device::minx_CE_ED, &minx_cpu_device::minx_CE_EE, &minx_cpu_device::minx_CE_EF,
307		&minx_cpu_device::minx_CE_F0, &minx_cpu_device::minx_CE_F1, &minx_cpu_device::minx_CE_F2, &minx_cpu_device::minx_CE_F3, &minx_cpu_device::minx_CE_F4, &minx_cpu_device::minx_CE_F5, &minx_cpu_device::minx_CE_F6, &minx_cpu_device::minx_CE_F7,
308		&minx_cpu_device::minx_CE_F8, &minx_cpu_device::minx_CE_F9, &minx_cpu_device::minx_CE_FA, &minx_cpu_device::minx_CE_FB, &minx_cpu_device::minx_CE_FC, &minx_cpu_device::minx_CE_FD, &minx_cpu_device::minx_CE_FE, &minx_cpu_device::minx_CE_FF
309		};
	503	case 0xF0: { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	504	break;
	505	case 0xF1: { INT8 d8 = rdop(); if ( ( m_F & FLAG_Z ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	506	break;
	507	case 0xF2: { INT8 d8 = rdop(); if ( !( m_F & FLAG_Z ) && ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	508	break;
	509	case 0xF3: { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { CALL( m_PC + d8 - 1 ); } }
	510	break;
	511	case 0xF4: { INT8 d8 = rdop(); if ( ( m_F & FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	512	break;
	513	case 0xF5: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	514	break;
	515	case 0xF6: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_S ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	516	break;
	517	case 0xF7: { INT8 d8 = rdop(); if ( ( m_F & FLAG_S ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	518	break;
	519	case 0xF8: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X0 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	520	break;
	521	case 0xF9: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X1 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	522	break;
	523	case 0xFA: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X2 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	524	break;
	525	case 0xFB: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_DZ ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	526	break;
	527	case 0xFC: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X0 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	528	break;
	529	case 0xFD: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X1 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	530	break;
	531	case 0xFE: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X2 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	532	break;
	533	case 0xFF: { INT8 d8 = rdop(); if ( ( m_E & EXEC_DZ ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	534	break;
	535	}
310	536
	537	m_icount -= insnminx_cycles_CE[opcode];
	538	}
	539
	540
311	541	const int minx_cpu_device::insnminx_cycles_CE[256] = {
312	542	16, 16, 16, 16, 16, 20, 20, 20, 16, 16, 16, 16, 16, 20, 20, 20,
313	543	16, 16, 16, 16, 16, 20, 20, 20, 16, 16, 16, 16, 16, 20, 20, 20,

trunk/src/emu/cpu/minx/minxopcf.h

r31251	r31252
1		#undef OP
2		#define OP(nn) void minx_cpu_device::minx_CF_##nn()
3	1
4		OP(00) { m_BA = ADD16( m_BA, m_BA ); }
5		OP(01) { m_BA = ADD16( m_BA, m_HL ); }
6		OP(02) { m_BA = ADD16( m_BA, m_X ); }
7		OP(03) { m_BA = ADD16( m_BA, m_Y ); }
8		OP(04) { m_BA = ADDC16( m_BA, m_BA ); }
9		OP(05) { m_BA = ADDC16( m_BA, m_HL ); }
10		OP(06) { m_BA = ADDC16( m_BA, m_X ); }
11		OP(07) { m_BA = ADDC16( m_BA, m_Y ); }
12		OP(08) { m_BA = SUB16( m_BA, m_BA ); }
13		OP(09) { m_BA = SUB16( m_BA, m_HL ); }
14		OP(0A) { m_BA = SUB16( m_BA, m_X ); }
15		OP(0B) { m_BA = SUB16( m_BA, m_Y ); }
16		OP(0C) { m_BA = SUBC16( m_BA, m_BA ); }
17		OP(0D) { m_BA = SUBC16( m_BA, m_HL ); }
18		OP(0E) { m_BA = SUBC16( m_BA, m_X ); }
19		OP(0F) { m_BA = SUBC16( m_BA, m_Y ); }
	2	void minx_cpu_device::execute_one_cf()
	3	{
	4	const UINT8 opcode = rdop();
20	5
21		OP(10) { /* illegal instruction? */ }
22		OP(11) { /* illegal instruction? */ }
23		OP(12) { /* illegal instruction? */ }
24		OP(13) { /* illegal instruction? */ }
25		OP(14) { /* illegal instruction? */ }
26		OP(15) { /* illegal instruction? */ }
27		OP(16) { /* illegal instruction? */ }
28		OP(17) { /* illegal instruction? */ }
29		OP(18) { SUB16( m_BA, m_BA ); }
30		OP(19) { SUB16( m_BA, m_HL ); }
31		OP(1A) { SUB16( m_BA, m_X ); }
32		OP(1B) { SUB16( m_BA, m_Y ); }
33		OP(1C) { /* illegal instruction? */ }
34		OP(1D) { /* illegal instruction? */ }
35		OP(1E) { /* illegal instruction? */ }
36		OP(1F) { /* illegal instruction? */ }
	6	switch (opcode)
	7	{
	8	case 0x00: { m_BA = ADD16( m_BA, m_BA ); }
	9	break;
	10	case 0x01: { m_BA = ADD16( m_BA, m_HL ); }
	11	break;
	12	case 0x02: { m_BA = ADD16( m_BA, m_X ); }
	13	break;
	14	case 0x03: { m_BA = ADD16( m_BA, m_Y ); }
	15	break;
	16	case 0x04: { m_BA = ADDC16( m_BA, m_BA ); }
	17	break;
	18	case 0x05: { m_BA = ADDC16( m_BA, m_HL ); }
	19	break;
	20	case 0x06: { m_BA = ADDC16( m_BA, m_X ); }
	21	break;
	22	case 0x07: { m_BA = ADDC16( m_BA, m_Y ); }
	23	break;
	24	case 0x08: { m_BA = SUB16( m_BA, m_BA ); }
	25	break;
	26	case 0x09: { m_BA = SUB16( m_BA, m_HL ); }
	27	break;
	28	case 0x0A: { m_BA = SUB16( m_BA, m_X ); }
	29	break;
	30	case 0x0B: { m_BA = SUB16( m_BA, m_Y ); }
	31	break;
	32	case 0x0C: { m_BA = SUBC16( m_BA, m_BA ); }
	33	break;
	34	case 0x0D: { m_BA = SUBC16( m_BA, m_HL ); }
	35	break;
	36	case 0x0E: { m_BA = SUBC16( m_BA, m_X ); }
	37	break;
	38	case 0x0F: { m_BA = SUBC16( m_BA, m_Y ); }
	39	break;
37	40
38		OP(20) { m_HL = ADD16( m_HL, m_BA ); }
39		OP(21) { m_HL = ADD16( m_HL, m_HL ); }
40		OP(22) { m_HL = ADD16( m_HL, m_X ); }
41		OP(23) { m_HL = ADD16( m_HL, m_Y ); }
42		OP(24) { m_HL = ADDC16( m_HL, m_BA ); }
43		OP(25) { m_HL = ADDC16( m_HL, m_HL ); }
44		OP(26) { m_HL = ADDC16( m_HL, m_X ); }
45		OP(27) { m_HL = ADDC16( m_HL, m_Y ); }
46		OP(28) { m_HL = SUB16( m_HL, m_BA ); }
47		OP(29) { m_HL = SUB16( m_HL, m_HL ); }
48		OP(2A) { m_HL = SUB16( m_HL, m_X ); }
49		OP(2B) { m_HL = SUB16( m_HL, m_Y ); }
50		OP(2C) { m_HL = SUBC16( m_HL, m_BA ); }
51		OP(2D) { m_HL = SUBC16( m_HL, m_HL ); }
52		OP(2E) { m_HL = SUBC16( m_HL, m_X ); }
53		OP(2F) { m_HL = SUBC16( m_HL, m_Y ); }
	41	case 0x10: { /* illegal instruction? */ }
	42	break;
	43	case 0x11: { /* illegal instruction? */ }
	44	break;
	45	case 0x12: { /* illegal instruction? */ }
	46	break;
	47	case 0x13: { /* illegal instruction? */ }
	48	break;
	49	case 0x14: { /* illegal instruction? */ }
	50	break;
	51	case 0x15: { /* illegal instruction? */ }
	52	break;
	53	case 0x16: { /* illegal instruction? */ }
	54	break;
	55	case 0x17: { /* illegal instruction? */ }
	56	break;
	57	case 0x18: { SUB16( m_BA, m_BA ); }
	58	break;
	59	case 0x19: { SUB16( m_BA, m_HL ); }
	60	break;
	61	case 0x1A: { SUB16( m_BA, m_X ); }
	62	break;
	63	case 0x1B: { SUB16( m_BA, m_Y ); }
	64	break;
	65	case 0x1C: { /* illegal instruction? */ }
	66	break;
	67	case 0x1D: { /* illegal instruction? */ }
	68	break;
	69	case 0x1E: { /* illegal instruction? */ }
	70	break;
	71	case 0x1F: { /* illegal instruction? */ }
	72	break;
54	73
55		OP(30) { /* illegal instruction? */ }
56		OP(31) { /* illegal instruction? */ }
57		OP(32) { /* illegal instruction? */ }
58		OP(33) { /* illegal instruction? */ }
59		OP(34) { /* illegal instruction? */ }
60		OP(35) { /* illegal instruction? */ }
61		OP(36) { /* illegal instruction? */ }
62		OP(37) { /* illegal instruction? */ }
63		OP(38) { SUB16( m_HL, m_BA ); }
64		OP(39) { SUB16( m_HL, m_HL ); }
65		OP(3A) { SUB16( m_HL, m_X ); }
66		OP(3B) { SUB16( m_HL, m_Y ); }
67		OP(3C) { /* illegal instruction? */ }
68		OP(3D) { /* illegal instruction? */ }
69		OP(3E) { /* illegal instruction? */ }
70		OP(3F) { /* illegal instruction? */ }
	74	case 0x20: { m_HL = ADD16( m_HL, m_BA ); }
	75	break;
	76	case 0x21: { m_HL = ADD16( m_HL, m_HL ); }
	77	break;
	78	case 0x22: { m_HL = ADD16( m_HL, m_X ); }
	79	break;
	80	case 0x23: { m_HL = ADD16( m_HL, m_Y ); }
	81	break;
	82	case 0x24: { m_HL = ADDC16( m_HL, m_BA ); }
	83	break;
	84	case 0x25: { m_HL = ADDC16( m_HL, m_HL ); }
	85	break;
	86	case 0x26: { m_HL = ADDC16( m_HL, m_X ); }
	87	break;
	88	case 0x27: { m_HL = ADDC16( m_HL, m_Y ); }
	89	break;
	90	case 0x28: { m_HL = SUB16( m_HL, m_BA ); }
	91	break;
	92	case 0x29: { m_HL = SUB16( m_HL, m_HL ); }
	93	break;
	94	case 0x2A: { m_HL = SUB16( m_HL, m_X ); }
	95	break;
	96	case 0x2B: { m_HL = SUB16( m_HL, m_Y ); }
	97	break;
	98	case 0x2C: { m_HL = SUBC16( m_HL, m_BA ); }
	99	break;
	100	case 0x2D: { m_HL = SUBC16( m_HL, m_HL ); }
	101	break;
	102	case 0x2E: { m_HL = SUBC16( m_HL, m_X ); }
	103	break;
	104	case 0x2F: { m_HL = SUBC16( m_HL, m_Y ); }
	105	break;
71	106
72		OP(40) { m_X = ADD16( m_X, m_BA ); }
73		OP(41) { m_X = ADD16( m_X, m_HL ); }
74		OP(42) { m_Y = ADD16( m_Y, m_BA ); }
75		OP(43) { m_Y = ADD16( m_Y, m_HL ); }
76		OP(44) { m_SP = ADD16( m_SP, m_BA ); }
77		OP(45) { m_SP = ADD16( m_SP, m_HL ); }
78		OP(46) { /* illegal instruction? */ }
79		OP(47) { /* illegal instruction? */ }
80		OP(48) { m_X = SUB16( m_X, m_BA ); }
81		OP(49) { m_X = SUB16( m_X, m_HL ); }
82		OP(4A) { m_Y = SUB16( m_Y, m_BA ); }
83		OP(4B) { m_Y = SUB16( m_Y, m_HL ); }
84		OP(4C) { m_SP = SUB16( m_SP, m_BA ); }
85		OP(4D) { m_SP = SUB16( m_SP, m_HL ); }
86		OP(4E) { /* illegal instruction? */ }
87		OP(4F) { /* illegal instruction? */ }
	107	case 0x30: { /* illegal instruction? */ }
	108	break;
	109	case 0x31: { /* illegal instruction? */ }
	110	break;
	111	case 0x32: { /* illegal instruction? */ }
	112	break;
	113	case 0x33: { /* illegal instruction? */ }
	114	break;
	115	case 0x34: { /* illegal instruction? */ }
	116	break;
	117	case 0x35: { /* illegal instruction? */ }
	118	break;
	119	case 0x36: { /* illegal instruction? */ }
	120	break;
	121	case 0x37: { /* illegal instruction? */ }
	122	break;
	123	case 0x38: { SUB16( m_HL, m_BA ); }
	124	break;
	125	case 0x39: { SUB16( m_HL, m_HL ); }
	126	break;
	127	case 0x3A: { SUB16( m_HL, m_X ); }
	128	break;
	129	case 0x3B: { SUB16( m_HL, m_Y ); }
	130	break;
	131	case 0x3C: { /* illegal instruction? */ }
	132	break;
	133	case 0x3D: { /* illegal instruction? */ }
	134	break;
	135	case 0x3E: { /* illegal instruction? */ }
	136	break;
	137	case 0x3F: { /* illegal instruction? */ }
	138	break;
88	139
89		OP(50) { /* illegal instruction? */ }
90		OP(51) { /* illegal instruction? */ }
91		OP(52) { /* illegal instruction? */ }
92		OP(53) { /* illegal instruction? */ }
93		OP(54) { /* illegal instruction? */ }
94		OP(55) { /* illegal instruction? */ }
95		OP(56) { /* illegal instruction? */ }
96		OP(57) { /* illegal instruction? */ }
97		OP(58) { /* illegal instruction? */ }
98		OP(59) { /* illegal instruction? */ }
99		OP(5A) { /* illegal instruction? */ }
100		OP(5B) { /* illegal instruction? */ }
101		OP(5C) { SUB16( m_SP, m_BA ); }
102		OP(5D) { SUB16( m_SP, m_HL ); }
103		OP(5E) { /* illegal instruction? */ }
104		OP(5F) { /* illegal instruction? */ }
	140	case 0x40: { m_X = ADD16( m_X, m_BA ); }
	141	break;
	142	case 0x41: { m_X = ADD16( m_X, m_HL ); }
	143	break;
	144	case 0x42: { m_Y = ADD16( m_Y, m_BA ); }
	145	break;
	146	case 0x43: { m_Y = ADD16( m_Y, m_HL ); }
	147	break;
	148	case 0x44: { m_SP = ADD16( m_SP, m_BA ); }
	149	break;
	150	case 0x45: { m_SP = ADD16( m_SP, m_HL ); }
	151	break;
	152	case 0x46: { /* illegal instruction? */ }
	153	break;
	154	case 0x47: { /* illegal instruction? */ }
	155	break;
	156	case 0x48: { m_X = SUB16( m_X, m_BA ); }
	157	break;
	158	case 0x49: { m_X = SUB16( m_X, m_HL ); }
	159	break;
	160	case 0x4A: { m_Y = SUB16( m_Y, m_BA ); }
	161	break;
	162	case 0x4B: { m_Y = SUB16( m_Y, m_HL ); }
	163	break;
	164	case 0x4C: { m_SP = SUB16( m_SP, m_BA ); }
	165	break;
	166	case 0x4D: { m_SP = SUB16( m_SP, m_HL ); }
	167	break;
	168	case 0x4E: { /* illegal instruction? */ }
	169	break;
	170	case 0x4F: { /* illegal instruction? */ }
	171	break;
105	172
106		OP(60) { ADDC16( m_BA, rdop16() ); /* ??? */ }
107		OP(61) { ADDC16( m_HL, rdop16() ); /* ??? */ }
108		OP(62) { ADDC16( m_X, rdop16() ); /* ??? */ }
109		OP(63) { ADDC16( m_Y, rdop16() ); /* ??? */ }
110		OP(64) { /* illegal instruction? */ }
111		OP(65) { /* illegal instruction? */ }
112		OP(66) { /* illegal instruction? */ }
113		OP(67) { /* illegal instruction? */ }
114		OP(68) { m_SP = ADD16( m_SP, rdop16() ); }
115		OP(69) { /* illegal instruction? */ }
116		OP(6A) { m_SP = SUB16( m_SP, rdop16() ); }
117		OP(6B) { /* illegal instruction? */ }
118		OP(6C) { SUB16( m_SP, rdop16() ); }
119		OP(6D) { /* illegal instruction? */ }
120		OP(6E) { m_SP = rdop16(); }
121		OP(6F) { /* illegal instruction? */ }
	173	case 0x50: { /* illegal instruction? */ }
	174	break;
	175	case 0x51: { /* illegal instruction? */ }
	176	break;
	177	case 0x52: { /* illegal instruction? */ }
	178	break;
	179	case 0x53: { /* illegal instruction? */ }
	180	break;
	181	case 0x54: { /* illegal instruction? */ }
	182	break;
	183	case 0x55: { /* illegal instruction? */ }
	184	break;
	185	case 0x56: { /* illegal instruction? */ }
	186	break;
	187	case 0x57: { /* illegal instruction? */ }
	188	break;
	189	case 0x58: { /* illegal instruction? */ }
	190	break;
	191	case 0x59: { /* illegal instruction? */ }
	192	break;
	193	case 0x5A: { /* illegal instruction? */ }
	194	break;
	195	case 0x5B: { /* illegal instruction? */ }
	196	break;
	197	case 0x5C: { SUB16( m_SP, m_BA ); }
	198	break;
	199	case 0x5D: { SUB16( m_SP, m_HL ); }
	200	break;
	201	case 0x5E: { /* illegal instruction? */ }
	202	break;
	203	case 0x5F: { /* illegal instruction? */ }
	204	break;
122	205
123		OP(70) { UINT8 ofs8 = rdop(); m_BA = rd16( m_SP + ofs8 ); }
124		OP(71) { UINT8 ofs8 = rdop(); m_HL = rd16( m_SP + ofs8 ); }
125		OP(72) { UINT8 ofs8 = rdop(); m_X = rd16( m_SP + ofs8 ); }
126		OP(73) { UINT8 ofs8 = rdop(); m_Y = rd16( m_SP + ofs8 ); }
127		OP(74) { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_BA ); }
128		OP(75) { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_HL ); }
129		OP(76) { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_X ); }
130		OP(77) { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_Y ); }
131		OP(78) { AD2_I16; m_SP = rd16( addr2 ); }
132		OP(79) { /* illegal instruction? */ }
133		OP(7A) { /* illegal instruction? */ }
134		OP(7B) { /* illegal instruction? */ }
135		OP(7C) { AD1_I16; wr16( addr1, m_SP ); }
136		OP(7D) { /* illegal instruction? */ }
137		OP(7E) { /* illegal instruction? */ }
138		OP(7F) { /* illegal instruction? */ }
	206	case 0x60: { ADDC16( m_BA, rdop16() ); /* ??? */ }
	207	break;
	208	case 0x61: { ADDC16( m_HL, rdop16() ); /* ??? */ }
	209	break;
	210	case 0x62: { ADDC16( m_X, rdop16() ); /* ??? */ }
	211	break;
	212	case 0x63: { ADDC16( m_Y, rdop16() ); /* ??? */ }
	213	break;
	214	case 0x64: { /* illegal instruction? */ }
	215	break;
	216	case 0x65: { /* illegal instruction? */ }
	217	break;
	218	case 0x66: { /* illegal instruction? */ }
	219	break;
	220	case 0x67: { /* illegal instruction? */ }
	221	break;
	222	case 0x68: { m_SP = ADD16( m_SP, rdop16() ); }
	223	break;
	224	case 0x69: { /* illegal instruction? */ }
	225	break;
	226	case 0x6A: { m_SP = SUB16( m_SP, rdop16() ); }
	227	break;
	228	case 0x6B: { /* illegal instruction? */ }
	229	break;
	230	case 0x6C: { SUB16( m_SP, rdop16() ); }
	231	break;
	232	case 0x6D: { /* illegal instruction? */ }
	233	break;
	234	case 0x6E: { m_SP = rdop16(); }
	235	break;
	236	case 0x6F: { /* illegal instruction? */ }
	237	break;
139	238
140		OP(80) { /* illegal instruction? */ }
141		OP(81) { /* illegal instruction? */ }
142		OP(82) { /* illegal instruction? */ }
143		OP(83) { /* illegal instruction? */ }
144		OP(84) { /* illegal instruction? */ }
145		OP(85) { /* illegal instruction? */ }
146		OP(86) { /* illegal instruction? */ }
147		OP(87) { /* illegal instruction? */ }
148		OP(88) { /* illegal instruction? */ }
149		OP(89) { /* illegal instruction? */ }
150		OP(8A) { /* illegal instruction? */ }
151		OP(8B) { /* illegal instruction? */ }
152		OP(8C) { /* illegal instruction? */ }
153		OP(8D) { /* illegal instruction? */ }
154		OP(8E) { /* illegal instruction? */ }
155		OP(8F) { /* illegal instruction? */ }
	239	case 0x70: { UINT8 ofs8 = rdop(); m_BA = rd16( m_SP + ofs8 ); }
	240	break;
	241	case 0x71: { UINT8 ofs8 = rdop(); m_HL = rd16( m_SP + ofs8 ); }
	242	break;
	243	case 0x72: { UINT8 ofs8 = rdop(); m_X = rd16( m_SP + ofs8 ); }
	244	break;
	245	case 0x73: { UINT8 ofs8 = rdop(); m_Y = rd16( m_SP + ofs8 ); }
	246	break;
	247	case 0x74: { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_BA ); }
	248	break;
	249	case 0x75: { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_HL ); }
	250	break;
	251	case 0x76: { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_X ); }
	252	break;
	253	case 0x77: { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_Y ); }
	254	break;
	255	case 0x78: { AD2_I16; m_SP = rd16( addr2 ); }
	256	break;
	257	case 0x79: { /* illegal instruction? */ }
	258	break;
	259	case 0x7A: { /* illegal instruction? */ }
	260	break;
	261	case 0x7B: { /* illegal instruction? */ }
	262	break;
	263	case 0x7C: { AD1_I16; wr16( addr1, m_SP ); }
	264	break;
	265	case 0x7D: { /* illegal instruction? */ }
	266	break;
	267	case 0x7E: { /* illegal instruction? */ }
	268	break;
	269	case 0x7F: { /* illegal instruction? */ }
	270	break;
156	271
157		OP(90) { /* illegal instruction? */ }
158		OP(91) { /* illegal instruction? */ }
159		OP(92) { /* illegal instruction? */ }
160		OP(93) { /* illegal instruction? */ }
161		OP(94) { /* illegal instruction? */ }
162		OP(95) { /* illegal instruction? */ }
163		OP(96) { /* illegal instruction? */ }
164		OP(97) { /* illegal instruction? */ }
165		OP(98) { /* illegal instruction? */ }
166		OP(99) { /* illegal instruction? */ }
167		OP(9A) { /* illegal instruction? */ }
168		OP(9B) { /* illegal instruction? */ }
169		OP(9C) { /* illegal instruction? */ }
170		OP(9D) { /* illegal instruction? */ }
171		OP(9E) { /* illegal instruction? */ }
172		OP(9F) { /* illegal instruction? */ }
	272	case 0x80: { /* illegal instruction? */ }
	273	break;
	274	case 0x81: { /* illegal instruction? */ }
	275	break;
	276	case 0x82: { /* illegal instruction? */ }
	277	break;
	278	case 0x83: { /* illegal instruction? */ }
	279	break;
	280	case 0x84: { /* illegal instruction? */ }
	281	break;
	282	case 0x85: { /* illegal instruction? */ }
	283	break;
	284	case 0x86: { /* illegal instruction? */ }
	285	break;
	286	case 0x87: { /* illegal instruction? */ }
	287	break;
	288	case 0x88: { /* illegal instruction? */ }
	289	break;
	290	case 0x89: { /* illegal instruction? */ }
	291	break;
	292	case 0x8A: { /* illegal instruction? */ }
	293	break;
	294	case 0x8B: { /* illegal instruction? */ }
	295	break;
	296	case 0x8C: { /* illegal instruction? */ }
	297	break;
	298	case 0x8D: { /* illegal instruction? */ }
	299	break;
	300	case 0x8E: { /* illegal instruction? */ }
	301	break;
	302	case 0x8F: { /* illegal instruction? */ }
	303	break;
173	304
174		OP(A0) { /* illegal instruction? */ }
175		OP(A1) { /* illegal instruction? */ }
176		OP(A2) { /* illegal instruction? */ }
177		OP(A3) { /* illegal instruction? */ }
178		OP(A4) { /* illegal instruction? */ }
179		OP(A5) { /* illegal instruction? */ }
180		OP(A6) { /* illegal instruction? */ }
181		OP(A7) { /* illegal instruction? */ }
182		OP(A8) { /* illegal instruction? */ }
183		OP(A9) { /* illegal instruction? */ }
184		OP(AA) { /* illegal instruction? */ }
185		OP(AB) { /* illegal instruction? */ }
186		OP(AC) { /* illegal instruction? */ }
187		OP(AD) { /* illegal instruction? */ }
188		OP(AE) { /* illegal instruction? */ }
189		OP(AF) { /* illegal instruction? */ }
	305	case 0x90: { /* illegal instruction? */ }
	306	break;
	307	case 0x91: { /* illegal instruction? */ }
	308	break;
	309	case 0x92: { /* illegal instruction? */ }
	310	break;
	311	case 0x93: { /* illegal instruction? */ }
	312	break;
	313	case 0x94: { /* illegal instruction? */ }
	314	break;
	315	case 0x95: { /* illegal instruction? */ }
	316	break;
	317	case 0x96: { /* illegal instruction? */ }
	318	break;
	319	case 0x97: { /* illegal instruction? */ }
	320	break;
	321	case 0x98: { /* illegal instruction? */ }
	322	break;
	323	case 0x99: { /* illegal instruction? */ }
	324	break;
	325	case 0x9A: { /* illegal instruction? */ }
	326	break;
	327	case 0x9B: { /* illegal instruction? */ }
	328	break;
	329	case 0x9C: { /* illegal instruction? */ }
	330	break;
	331	case 0x9D: { /* illegal instruction? */ }
	332	break;
	333	case 0x9E: { /* illegal instruction? */ }
	334	break;
	335	case 0x9F: { /* illegal instruction? */ }
	336	break;
190	337
191		OP(B0) { PUSH8( m_BA & 0x00FF ); }
192		OP(B1) { PUSH8( m_BA >> 8 ); }
193		OP(B2) { PUSH8( m_HL & 0x00FF ); }
194		OP(B3) { PUSH8( m_HL >> 8 ); }
195		OP(B4) { m_BA = ( m_BA & 0xFF00 ) | POP8(); }
196		OP(B5) { m_BA = ( m_BA & 0x00FF ) | ( POP8() << 8 ); }
197		OP(B6) { m_HL = ( m_HL & 0xFF00 ) | POP8(); }
198		OP(B7) { m_HL = ( m_HL & 0x00FF ) | ( POP8() << 8 ); }
199		OP(B8) { PUSH16( m_BA ); PUSH16( m_HL ); PUSH16( m_X ); PUSH16( m_Y ); PUSH8( m_N ); }
200		OP(B9) { PUSH16( m_BA ); PUSH16( m_HL ); PUSH16( m_X ); PUSH16( m_Y ); PUSH8( m_N ); PUSH8( m_I ); PUSH8( m_XI ); PUSH8( m_YI ); }
201		OP(BA) { /* illegal instruction? */ }
202		OP(BB) { /* illegal instruction? */ }
203		OP(BC) { m_N = POP8(); m_Y = POP16(); m_X = POP16(); m_HL = POP16(); m_BA = POP16(); }
204		OP(BD) { m_YI = POP8(); m_XI = POP8(); m_I = POP8(); m_N = POP8(); m_Y = POP16(); m_X = POP16(); m_HL = POP16(); m_BA = POP16(); }
205		OP(BE) { /* illegal instruction? */ }
206		OP(BF) { /* illegal instruction? */ }
	338	case 0xA0: { /* illegal instruction? */ }
	339	break;
	340	case 0xA1: { /* illegal instruction? */ }
	341	break;
	342	case 0xA2: { /* illegal instruction? */ }
	343	break;
	344	case 0xA3: { /* illegal instruction? */ }
	345	break;
	346	case 0xA4: { /* illegal instruction? */ }
	347	break;
	348	case 0xA5: { /* illegal instruction? */ }
	349	break;
	350	case 0xA6: { /* illegal instruction? */ }
	351	break;
	352	case 0xA7: { /* illegal instruction? */ }
	353	break;
	354	case 0xA8: { /* illegal instruction? */ }
	355	break;
	356	case 0xA9: { /* illegal instruction? */ }
	357	break;
	358	case 0xAA: { /* illegal instruction? */ }
	359	break;
	360	case 0xAB: { /* illegal instruction? */ }
	361	break;
	362	case 0xAC: { /* illegal instruction? */ }
	363	break;
	364	case 0xAD: { /* illegal instruction? */ }
	365	break;
	366	case 0xAE: { /* illegal instruction? */ }
	367	break;
	368	case 0xAF: { /* illegal instruction? */ }
	369	break;
207	370
208		OP(C0) { AD2_IHL; m_BA = rd16( addr2 ); }
209		OP(C1) { AD2_IHL; m_HL = rd16( addr2 ); }
210		OP(C2) { AD2_IHL; m_X = rd16( addr2 ); }
211		OP(C3) { AD2_IHL; m_Y = rd16( addr2 ); }
212		OP(C4) { AD1_IHL; wr16( addr1, m_BA ); }
213		OP(C5) { AD1_IHL; wr16( addr1, m_HL ); }
214		OP(C6) { AD1_IHL; wr16( addr1, m_X ); }
215		OP(C7) { AD1_IHL; wr16( addr1, m_Y ); }
216		OP(C8) { /* illegal instruction? */ }
217		OP(C9) { /* illegal instruction? */ }
218		OP(CA) { /* illegal instruction? */ }
219		OP(CB) { /* illegal instruction? */ }
220		OP(CC) { /* illegal instruction? */ }
221		OP(CD) { /* illegal instruction? */ }
222		OP(CE) { /* illegal instruction? */ }
223		OP(CF) { /* illegal instruction? */ }
	371	case 0xB0: { PUSH8( m_BA & 0x00FF ); }
	372	break;
	373	case 0xB1: { PUSH8( m_BA >> 8 ); }
	374	break;
	375	case 0xB2: { PUSH8( m_HL & 0x00FF ); }
	376	break;
	377	case 0xB3: { PUSH8( m_HL >> 8 ); }
	378	break;
	379	case 0xB4: { m_BA = ( m_BA & 0xFF00 ) | POP8(); }
	380	break;
	381	case 0xB5: { m_BA = ( m_BA & 0x00FF ) | ( POP8() << 8 ); }
	382	break;
	383	case 0xB6: { m_HL = ( m_HL & 0xFF00 ) | POP8(); }
	384	break;
	385	case 0xB7: { m_HL = ( m_HL & 0x00FF ) | ( POP8() << 8 ); }
	386	break;
	387	case 0xB8: { PUSH16( m_BA ); PUSH16( m_HL ); PUSH16( m_X ); PUSH16( m_Y ); PUSH8( m_N ); }
	388	break;
	389	case 0xB9: { PUSH16( m_BA ); PUSH16( m_HL ); PUSH16( m_X ); PUSH16( m_Y ); PUSH8( m_N ); PUSH8( m_I ); PUSH8( m_XI ); PUSH8( m_YI ); }
	390	break;
	391	case 0xBA: { /* illegal instruction? */ }
	392	break;
	393	case 0xBB: { /* illegal instruction? */ }
	394	break;
	395	case 0xBC: { m_N = POP8(); m_Y = POP16(); m_X = POP16(); m_HL = POP16(); m_BA = POP16(); }
	396	break;
	397	case 0xBD: { m_YI = POP8(); m_XI = POP8(); m_I = POP8(); m_N = POP8(); m_Y = POP16(); m_X = POP16(); m_HL = POP16(); m_BA = POP16(); }
	398	break;
	399	case 0xBE: { /* illegal instruction? */ }
	400	break;
	401	case 0xBF: { /* illegal instruction? */ }
	402	break;
224	403
225		OP(D0) { AD2_XIX; m_BA = rd16( addr2 ); }
226		OP(D1) { AD2_XIX; m_HL = rd16( addr2 ); }
227		OP(D2) { AD2_XIX; m_X = rd16( addr2 ); }
228		OP(D3) { AD2_XIX; m_Y = rd16( addr2 ); }
229		OP(D4) { AD1_XIX; wr16( addr1, m_BA ); }
230		OP(D5) { AD1_XIX; wr16( addr1, m_HL ); }
231		OP(D6) { AD1_XIX; wr16( addr1, m_X ); }
232		OP(D7) { AD1_XIX; wr16( addr1, m_Y ); }
233		OP(D8) { AD2_YIY; m_BA = rd16( addr2 ); }
234		OP(D9) { AD2_YIY; m_HL = rd16( addr2 ); }
235		OP(DA) { AD2_YIY; m_X = rd16( addr2 ); }
236		OP(DB) { AD2_YIY; m_Y = rd16( addr2 ); }
237		OP(DC) { AD1_YIY; wr16( addr1, m_BA ); }
238		OP(DD) { AD1_YIY; wr16( addr1, m_HL ); }
239		OP(DE) { AD1_YIY; wr16( addr1, m_X ); }
240		OP(DF) { AD1_YIY; wr16( addr1, m_Y ); }
	404	case 0xC0: { AD2_IHL; m_BA = rd16( addr2 ); }
	405	break;
	406	case 0xC1: { AD2_IHL; m_HL = rd16( addr2 ); }
	407	break;
	408	case 0xC2: { AD2_IHL; m_X = rd16( addr2 ); }
	409	break;
	410	case 0xC3: { AD2_IHL; m_Y = rd16( addr2 ); }
	411	break;
	412	case 0xC4: { AD1_IHL; wr16( addr1, m_BA ); }
	413	break;
	414	case 0xC5: { AD1_IHL; wr16( addr1, m_HL ); }
	415	break;
	416	case 0xC6: { AD1_IHL; wr16( addr1, m_X ); }
	417	break;
	418	case 0xC7: { AD1_IHL; wr16( addr1, m_Y ); }
	419	break;
	420	case 0xC8: { /* illegal instruction? */ }
	421	break;
	422	case 0xC9: { /* illegal instruction? */ }
	423	break;
	424	case 0xCA: { /* illegal instruction? */ }
	425	break;
	426	case 0xCB: { /* illegal instruction? */ }
	427	break;
	428	case 0xCC: { /* illegal instruction? */ }
	429	break;
	430	case 0xCD: { /* illegal instruction? */ }
	431	break;
	432	case 0xCE: { /* illegal instruction? */ }
	433	break;
	434	case 0xCF: { /* illegal instruction? */ }
	435	break;
241	436
242		OP(E0) { } //{ m_BA = m_BA; }
243		OP(E1) { m_BA = m_HL; }
244		OP(E2) { m_BA = m_X; }
245		OP(E3) { m_BA = m_Y; }
246		OP(E4) { m_HL = m_BA; }
247		OP(E5) { } //{ m_HL = m_HL; }
248		OP(E6) { m_HL = m_X; }
249		OP(E7) { m_HL = m_Y; }
250		OP(E8) { m_X = m_BA; }
251		OP(E9) { m_X = m_HL; }
252		OP(EA) { } //{ m_X = m_X; }
253		OP(EB) { m_X = m_Y; }
254		OP(EC) { m_Y = m_BA; }
255		OP(ED) { m_Y = m_HL; }
256		OP(EE) { m_Y = m_X; }
257		OP(EF) { } //{ m_Y = m_Y; }
	437	case 0xD0: { AD2_XIX; m_BA = rd16( addr2 ); }
	438	break;
	439	case 0xD1: { AD2_XIX; m_HL = rd16( addr2 ); }
	440	break;
	441	case 0xD2: { AD2_XIX; m_X = rd16( addr2 ); }
	442	break;
	443	case 0xD3: { AD2_XIX; m_Y = rd16( addr2 ); }
	444	break;
	445	case 0xD4: { AD1_XIX; wr16( addr1, m_BA ); }
	446	break;
	447	case 0xD5: { AD1_XIX; wr16( addr1, m_HL ); }
	448	break;
	449	case 0xD6: { AD1_XIX; wr16( addr1, m_X ); }
	450	break;
	451	case 0xD7: { AD1_XIX; wr16( addr1, m_Y ); }
	452	break;
	453	case 0xD8: { AD2_YIY; m_BA = rd16( addr2 ); }
	454	break;
	455	case 0xD9: { AD2_YIY; m_HL = rd16( addr2 ); }
	456	break;
	457	case 0xDA: { AD2_YIY; m_X = rd16( addr2 ); }
	458	break;
	459	case 0xDB: { AD2_YIY; m_Y = rd16( addr2 ); }
	460	break;
	461	case 0xDC: { AD1_YIY; wr16( addr1, m_BA ); }
	462	break;
	463	case 0xDD: { AD1_YIY; wr16( addr1, m_HL ); }
	464	break;
	465	case 0xDE: { AD1_YIY; wr16( addr1, m_X ); }
	466	break;
	467	case 0xDF: { AD1_YIY; wr16( addr1, m_Y ); }
	468	break;
258	469
259		OP(F0) { m_SP = m_BA; }
260		OP(F1) { m_SP = m_HL; }
261		OP(F2) { m_SP = m_X; }
262		OP(F3) { m_SP = m_Y; }
263		OP(F4) { m_HL = m_SP; }
264		OP(F5) { m_HL = m_PC; }
265		OP(F6) { /* illegal instruction? */ }
266		OP(F7) { /* illegal instruction? */ }
267		OP(F8) { m_BA = m_SP; }
268		OP(F9) { m_BA = m_PC; }
269		OP(FA) { m_X = m_SP; }
270		OP(FB) { /* illegal instruction? */ }
271		OP(FC) { /* illegal instruction? */ }
272		OP(FD) { /* illegal instruction? */ }
273		OP(FE) { m_Y = m_SP; }
274		OP(FF) { /* illegal instruction? */ }
	470	case 0xE0: { } //{ m_BA = m_BA; }
	471	break;
	472	case 0xE1: { m_BA = m_HL; }
	473	break;
	474	case 0xE2: { m_BA = m_X; }
	475	break;
	476	case 0xE3: { m_BA = m_Y; }
	477	break;
	478	case 0xE4: { m_HL = m_BA; }
	479	break;
	480	case 0xE5: { } //{ m_HL = m_HL; }
	481	break;
	482	case 0xE6: { m_HL = m_X; }
	483	break;
	484	case 0xE7: { m_HL = m_Y; }
	485	break;
	486	case 0xE8: { m_X = m_BA; }
	487	break;
	488	case 0xE9: { m_X = m_HL; }
	489	break;
	490	case 0xEA: { } //{ m_X = m_X; }
	491	break;
	492	case 0xEB: { m_X = m_Y; }
	493	break;
	494	case 0xEC: { m_Y = m_BA; }
	495	break;
	496	case 0xED: { m_Y = m_HL; }
	497	break;
	498	case 0xEE: { m_Y = m_X; }
	499	break;
	500	case 0xEF: { } //{ m_Y = m_Y; }
	501	break;
275	502
276		const minx_cpu_device::op_func minx_cpu_device::insnminx_CF[256] = {
277		&minx_cpu_device::minx_CF_00, &minx_cpu_device::minx_CF_01, &minx_cpu_device::minx_CF_02, &minx_cpu_device::minx_CF_03, &minx_cpu_device::minx_CF_04, &minx_cpu_device::minx_CF_05, &minx_cpu_device::minx_CF_06, &minx_cpu_device::minx_CF_07,
278		&minx_cpu_device::minx_CF_08, &minx_cpu_device::minx_CF_09, &minx_cpu_device::minx_CF_0A, &minx_cpu_device::minx_CF_0B, &minx_cpu_device::minx_CF_0C, &minx_cpu_device::minx_CF_0D, &minx_cpu_device::minx_CF_0E, &minx_cpu_device::minx_CF_0F,
279		&minx_cpu_device::minx_CF_10, &minx_cpu_device::minx_CF_11, &minx_cpu_device::minx_CF_12, &minx_cpu_device::minx_CF_13, &minx_cpu_device::minx_CF_14, &minx_cpu_device::minx_CF_15, &minx_cpu_device::minx_CF_16, &minx_cpu_device::minx_CF_17,
280		&minx_cpu_device::minx_CF_18, &minx_cpu_device::minx_CF_19, &minx_cpu_device::minx_CF_1A, &minx_cpu_device::minx_CF_1B, &minx_cpu_device::minx_CF_1C, &minx_cpu_device::minx_CF_1D, &minx_cpu_device::minx_CF_1E, &minx_cpu_device::minx_CF_1F,
281		&minx_cpu_device::minx_CF_20, &minx_cpu_device::minx_CF_21, &minx_cpu_device::minx_CF_22, &minx_cpu_device::minx_CF_23, &minx_cpu_device::minx_CF_24, &minx_cpu_device::minx_CF_25, &minx_cpu_device::minx_CF_26, &minx_cpu_device::minx_CF_27,
282		&minx_cpu_device::minx_CF_28, &minx_cpu_device::minx_CF_29, &minx_cpu_device::minx_CF_2A, &minx_cpu_device::minx_CF_2B, &minx_cpu_device::minx_CF_2C, &minx_cpu_device::minx_CF_2D, &minx_cpu_device::minx_CF_2E, &minx_cpu_device::minx_CF_2F,
283		&minx_cpu_device::minx_CF_30, &minx_cpu_device::minx_CF_31, &minx_cpu_device::minx_CF_32, &minx_cpu_device::minx_CF_33, &minx_cpu_device::minx_CF_34, &minx_cpu_device::minx_CF_35, &minx_cpu_device::minx_CF_36, &minx_cpu_device::minx_CF_37,
284		&minx_cpu_device::minx_CF_38, &minx_cpu_device::minx_CF_39, &minx_cpu_device::minx_CF_3A, &minx_cpu_device::minx_CF_3B, &minx_cpu_device::minx_CF_3C, &minx_cpu_device::minx_CF_3D, &minx_cpu_device::minx_CF_3E, &minx_cpu_device::minx_CF_3F,
285		&minx_cpu_device::minx_CF_40, &minx_cpu_device::minx_CF_41, &minx_cpu_device::minx_CF_42, &minx_cpu_device::minx_CF_43, &minx_cpu_device::minx_CF_44, &minx_cpu_device::minx_CF_45, &minx_cpu_device::minx_CF_46, &minx_cpu_device::minx_CF_47,
286		&minx_cpu_device::minx_CF_48, &minx_cpu_device::minx_CF_49, &minx_cpu_device::minx_CF_4A, &minx_cpu_device::minx_CF_4B, &minx_cpu_device::minx_CF_4C, &minx_cpu_device::minx_CF_4D, &minx_cpu_device::minx_CF_4E, &minx_cpu_device::minx_CF_4F,
287		&minx_cpu_device::minx_CF_50, &minx_cpu_device::minx_CF_51, &minx_cpu_device::minx_CF_52, &minx_cpu_device::minx_CF_53, &minx_cpu_device::minx_CF_54, &minx_cpu_device::minx_CF_55, &minx_cpu_device::minx_CF_56, &minx_cpu_device::minx_CF_57,
288		&minx_cpu_device::minx_CF_58, &minx_cpu_device::minx_CF_59, &minx_cpu_device::minx_CF_5A, &minx_cpu_device::minx_CF_5B, &minx_cpu_device::minx_CF_5C, &minx_cpu_device::minx_CF_5D, &minx_cpu_device::minx_CF_5E, &minx_cpu_device::minx_CF_5F,
289		&minx_cpu_device::minx_CF_60, &minx_cpu_device::minx_CF_61, &minx_cpu_device::minx_CF_62, &minx_cpu_device::minx_CF_63, &minx_cpu_device::minx_CF_64, &minx_cpu_device::minx_CF_65, &minx_cpu_device::minx_CF_66, &minx_cpu_device::minx_CF_67,
290		&minx_cpu_device::minx_CF_68, &minx_cpu_device::minx_CF_69, &minx_cpu_device::minx_CF_6A, &minx_cpu_device::minx_CF_6B, &minx_cpu_device::minx_CF_6C, &minx_cpu_device::minx_CF_6D, &minx_cpu_device::minx_CF_6E, &minx_cpu_device::minx_CF_6F,
291		&minx_cpu_device::minx_CF_70, &minx_cpu_device::minx_CF_71, &minx_cpu_device::minx_CF_72, &minx_cpu_device::minx_CF_73, &minx_cpu_device::minx_CF_74, &minx_cpu_device::minx_CF_75, &minx_cpu_device::minx_CF_76, &minx_cpu_device::minx_CF_77,
292		&minx_cpu_device::minx_CF_78, &minx_cpu_device::minx_CF_79, &minx_cpu_device::minx_CF_7A, &minx_cpu_device::minx_CF_7B, &minx_cpu_device::minx_CF_7C, &minx_cpu_device::minx_CF_7D, &minx_cpu_device::minx_CF_7E, &minx_cpu_device::minx_CF_7F,
293		&minx_cpu_device::minx_CF_80, &minx_cpu_device::minx_CF_81, &minx_cpu_device::minx_CF_82, &minx_cpu_device::minx_CF_83, &minx_cpu_device::minx_CF_84, &minx_cpu_device::minx_CF_85, &minx_cpu_device::minx_CF_86, &minx_cpu_device::minx_CF_87,
294		&minx_cpu_device::minx_CF_88, &minx_cpu_device::minx_CF_89, &minx_cpu_device::minx_CF_8A, &minx_cpu_device::minx_CF_8B, &minx_cpu_device::minx_CF_8C, &minx_cpu_device::minx_CF_8D, &minx_cpu_device::minx_CF_8E, &minx_cpu_device::minx_CF_8F,
295		&minx_cpu_device::minx_CF_90, &minx_cpu_device::minx_CF_91, &minx_cpu_device::minx_CF_92, &minx_cpu_device::minx_CF_93, &minx_cpu_device::minx_CF_94, &minx_cpu_device::minx_CF_95, &minx_cpu_device::minx_CF_96, &minx_cpu_device::minx_CF_97,
296		&minx_cpu_device::minx_CF_98, &minx_cpu_device::minx_CF_99, &minx_cpu_device::minx_CF_9A, &minx_cpu_device::minx_CF_9B, &minx_cpu_device::minx_CF_9C, &minx_cpu_device::minx_CF_9D, &minx_cpu_device::minx_CF_9E, &minx_cpu_device::minx_CF_9F,
297		&minx_cpu_device::minx_CF_A0, &minx_cpu_device::minx_CF_A1, &minx_cpu_device::minx_CF_A2, &minx_cpu_device::minx_CF_A3, &minx_cpu_device::minx_CF_A4, &minx_cpu_device::minx_CF_A5, &minx_cpu_device::minx_CF_A6, &minx_cpu_device::minx_CF_A7,
298		&minx_cpu_device::minx_CF_A8, &minx_cpu_device::minx_CF_A9, &minx_cpu_device::minx_CF_AA, &minx_cpu_device::minx_CF_AB, &minx_cpu_device::minx_CF_AC, &minx_cpu_device::minx_CF_AD, &minx_cpu_device::minx_CF_AE, &minx_cpu_device::minx_CF_AF,
299		&minx_cpu_device::minx_CF_B0, &minx_cpu_device::minx_CF_B1, &minx_cpu_device::minx_CF_B2, &minx_cpu_device::minx_CF_B3, &minx_cpu_device::minx_CF_B4, &minx_cpu_device::minx_CF_B5, &minx_cpu_device::minx_CF_B6, &minx_cpu_device::minx_CF_B7,
300		&minx_cpu_device::minx_CF_B8, &minx_cpu_device::minx_CF_B9, &minx_cpu_device::minx_CF_BA, &minx_cpu_device::minx_CF_BB, &minx_cpu_device::minx_CF_BC, &minx_cpu_device::minx_CF_BD, &minx_cpu_device::minx_CF_BE, &minx_cpu_device::minx_CF_BF,
301		&minx_cpu_device::minx_CF_C0, &minx_cpu_device::minx_CF_C1, &minx_cpu_device::minx_CF_C2, &minx_cpu_device::minx_CF_C3, &minx_cpu_device::minx_CF_C4, &minx_cpu_device::minx_CF_C5, &minx_cpu_device::minx_CF_C6, &minx_cpu_device::minx_CF_C7,
302		&minx_cpu_device::minx_CF_C8, &minx_cpu_device::minx_CF_C9, &minx_cpu_device::minx_CF_CA, &minx_cpu_device::minx_CF_CB, &minx_cpu_device::minx_CF_CC, &minx_cpu_device::minx_CF_CD, &minx_cpu_device::minx_CF_CE, &minx_cpu_device::minx_CF_CF,
303		&minx_cpu_device::minx_CF_D0, &minx_cpu_device::minx_CF_D1, &minx_cpu_device::minx_CF_D2, &minx_cpu_device::minx_CF_D3, &minx_cpu_device::minx_CF_D4, &minx_cpu_device::minx_CF_D5, &minx_cpu_device::minx_CF_D6, &minx_cpu_device::minx_CF_D7,
304		&minx_cpu_device::minx_CF_D8, &minx_cpu_device::minx_CF_D9, &minx_cpu_device::minx_CF_DA, &minx_cpu_device::minx_CF_DB, &minx_cpu_device::minx_CF_DC, &minx_cpu_device::minx_CF_DD, &minx_cpu_device::minx_CF_DE, &minx_cpu_device::minx_CF_DF,
305		&minx_cpu_device::minx_CF_E0, &minx_cpu_device::minx_CF_E1, &minx_cpu_device::minx_CF_E2, &minx_cpu_device::minx_CF_E3, &minx_cpu_device::minx_CF_E4, &minx_cpu_device::minx_CF_E5, &minx_cpu_device::minx_CF_E6, &minx_cpu_device::minx_CF_E7,
306		&minx_cpu_device::minx_CF_E8, &minx_cpu_device::minx_CF_E9, &minx_cpu_device::minx_CF_EA, &minx_cpu_device::minx_CF_EB, &minx_cpu_device::minx_CF_EC, &minx_cpu_device::minx_CF_ED, &minx_cpu_device::minx_CF_EE, &minx_cpu_device::minx_CF_EF,
307		&minx_cpu_device::minx_CF_F0, &minx_cpu_device::minx_CF_F1, &minx_cpu_device::minx_CF_F2, &minx_cpu_device::minx_CF_F3, &minx_cpu_device::minx_CF_F4, &minx_cpu_device::minx_CF_F5, &minx_cpu_device::minx_CF_F6, &minx_cpu_device::minx_CF_F7,
308		&minx_cpu_device::minx_CF_F8, &minx_cpu_device::minx_CF_F9, &minx_cpu_device::minx_CF_FA, &minx_cpu_device::minx_CF_FB, &minx_cpu_device::minx_CF_FC, &minx_cpu_device::minx_CF_FD, &minx_cpu_device::minx_CF_FE, &minx_cpu_device::minx_CF_FF
309		};
	503	case 0xF0: { m_SP = m_BA; }
	504	break;
	505	case 0xF1: { m_SP = m_HL; }
	506	break;
	507	case 0xF2: { m_SP = m_X; }
	508	break;
	509	case 0xF3: { m_SP = m_Y; }
	510	break;
	511	case 0xF4: { m_HL = m_SP; }
	512	break;
	513	case 0xF5: { m_HL = m_PC; }
	514	break;
	515	case 0xF6: { /* illegal instruction? */ }
	516	break;
	517	case 0xF7: { /* illegal instruction? */ }
	518	break;
	519	case 0xF8: { m_BA = m_SP; }
	520	break;
	521	case 0xF9: { m_BA = m_PC; }
	522	break;
	523	case 0xFA: { m_X = m_SP; }
	524	break;
	525	case 0xFB: { /* illegal instruction? */ }
	526	break;
	527	case 0xFC: { /* illegal instruction? */ }
	528	break;
	529	case 0xFD: { /* illegal instruction? */ }
	530	break;
	531	case 0xFE: { m_Y = m_SP; }
	532	break;
	533	case 0xFF: { /* illegal instruction? */ }
	534	break;
	535	}
310	536
	537	m_icount -= insnminx_cycles_CF[opcode];
	538	}
	539
	540
311	541	const int minx_cpu_device::insnminx_cycles_CF[256] = {
312	542	16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
313	543	1,  1,  1,  1,  1,  1,  1,  1, 16, 16, 16, 16,  1,  1,  1,  1,

trunk/src/emu/cpu/minx/minx.c

r31251	r31252
177	177
178	178	void minx_cpu_device::execute_run()
179	179	{
180		//  UINT32  oldpc;
181		UINT8   op;
182	180
183	181	do
184	182	{
185	183	m_curpc = GET_MINX_PC;
186	184	debugger_instruction_hook(this, m_curpc);
187		//      oldpc = GET_MINX_PC;
188	185
189	186	if ( m_interrupt_pending )
190	187	{
r31251	r31252
210	207	}
211	208	else
212	209	{
213		op = rdop();
214		(this->*insnminx[op])();
215		m_icount -= insnminx_cycles[op];
	210	execute_one();
216	211	}
217	212	} while ( m_icount > 0 );
218	213	}

trunk/src/emu/cpu/minx/minxfunc.h

r31251	r31252
360	360	#define AD2_Y8  UINT32 addr2 = ( m_YI << 16 ) | ( m_Y + rdop() )
361	361	#define AD2_XL  UINT32 addr2 = ( m_XI << 16 ) | ( m_X + ( m_HL & 0x00FF ) )
362	362	#define AD2_YL  UINT32 addr2 = ( m_YI << 16 ) | ( m_Y + ( m_HL & 0x00FF ) )
	363

trunk/src/emu/cpu/minx/minx.h

r31251	r31252
102	102	void JMP( UINT16 arg );
103	103	void CALL( UINT16 arg );
104	104
105		void minx_00();
106		void minx_01();
107		void minx_02();
108		void minx_03();
109		void minx_04();
110		void minx_05();
111		void minx_06();
112		void minx_07();
113		void minx_08();
114		void minx_09();
115		void minx_0A();
116		void minx_0B();
117		void minx_0C();
118		void minx_0D();
119		void minx_0E();
120		void minx_0F();
121		void minx_10();
122		void minx_11();
123		void minx_12();
124		void minx_13();
125		void minx_14();
126		void minx_15();
127		void minx_16();
128		void minx_17();
129		void minx_18();
130		void minx_19();
131		void minx_1A();
132		void minx_1B();
133		void minx_1C();
134		void minx_1D();
135		void minx_1E();
136		void minx_1F();
137		void minx_20();
138		void minx_21();
139		void minx_22();
140		void minx_23();
141		void minx_24();
142		void minx_25();
143		void minx_26();
144		void minx_27();
145		void minx_28();
146		void minx_29();
147		void minx_2A();
148		void minx_2B();
149		void minx_2C();
150		void minx_2D();
151		void minx_2E();
152		void minx_2F();
153		void minx_30();
154		void minx_31();
155		void minx_32();
156		void minx_33();
157		void minx_34();
158		void minx_35();
159		void minx_36();
160		void minx_37();
161		void minx_38();
162		void minx_39();
163		void minx_3A();
164		void minx_3B();
165		void minx_3C();
166		void minx_3D();
167		void minx_3E();
168		void minx_3F();
169		void minx_40();
170		void minx_41();
171		void minx_42();
172		void minx_43();
173		void minx_44();
174		void minx_45();
175		void minx_46();
176		void minx_47();
177		void minx_48();
178		void minx_49();
179		void minx_4A();
180		void minx_4B();
181		void minx_4C();
182		void minx_4D();
183		void minx_4E();
184		void minx_4F();
185		void minx_50();
186		void minx_51();
187		void minx_52();
188		void minx_53();
189		void minx_54();
190		void minx_55();
191		void minx_56();
192		void minx_57();
193		void minx_58();
194		void minx_59();
195		void minx_5A();
196		void minx_5B();
197		void minx_5C();
198		void minx_5D();
199		void minx_5E();
200		void minx_5F();
201		void minx_60();
202		void minx_61();
203		void minx_62();
204		void minx_63();
205		void minx_64();
206		void minx_65();
207		void minx_66();
208		void minx_67();
209		void minx_68();
210		void minx_69();
211		void minx_6A();
212		void minx_6B();
213		void minx_6C();
214		void minx_6D();
215		void minx_6E();
216		void minx_6F();
217		void minx_70();
218		void minx_71();
219		void minx_72();
220		void minx_73();
221		void minx_74();
222		void minx_75();
223		void minx_76();
224		void minx_77();
225		void minx_78();
226		void minx_79();
227		void minx_7A();
228		void minx_7B();
229		void minx_7C();
230		void minx_7D();
231		void minx_7E();
232		void minx_7F();
233		void minx_80();
234		void minx_81();
235		void minx_82();
236		void minx_83();
237		void minx_84();
238		void minx_85();
239		void minx_86();
240		void minx_87();
241		void minx_88();
242		void minx_89();
243		void minx_8A();
244		void minx_8B();
245		void minx_8C();
246		void minx_8D();
247		void minx_8E();
248		void minx_8F();
249		void minx_90();
250		void minx_91();
251		void minx_92();
252		void minx_93();
253		void minx_94();
254		void minx_95();
255		void minx_96();
256		void minx_97();
257		void minx_98();
258		void minx_99();
259		void minx_9A();
260		void minx_9B();
261		void minx_9C();
262		void minx_9D();
263		void minx_9E();
264		void minx_9F();
265		void minx_A0();
266		void minx_A1();
267		void minx_A2();
268		void minx_A3();
269		void minx_A4();
270		void minx_A5();
271		void minx_A6();
272		void minx_A7();
273		void minx_A8();
274		void minx_A9();
275		void minx_AA();
276		void minx_AB();
277		void minx_AC();
278		void minx_AD();
279		void minx_AE();
280		void minx_AF();
281		void minx_B0();
282		void minx_B1();
283		void minx_B2();
284		void minx_B3();
285		void minx_B4();
286		void minx_B5();
287		void minx_B6();
288		void minx_B7();
289		void minx_B8();
290		void minx_B9();
291		void minx_BA();
292		void minx_BB();
293		void minx_BC();
294		void minx_BD();
295		void minx_BE();
296		void minx_BF();
297		void minx_C0();
298		void minx_C1();
299		void minx_C2();
300		void minx_C3();
301		void minx_C4();
302		void minx_C5();
303		void minx_C6();
304		void minx_C7();
305		void minx_C8();
306		void minx_C9();
307		void minx_CA();
308		void minx_CB();
309		void minx_CC();
310		void minx_CD();
311		void minx_CE();
312		void minx_CF();
313		void minx_D0();
314		void minx_D1();
315		void minx_D2();
316		void minx_D3();
317		void minx_D4();
318		void minx_D5();
319		void minx_D6();
320		void minx_D7();
321		void minx_D8();
322		void minx_D9();
323		void minx_DA();
324		void minx_DB();
325		void minx_DC();
326		void minx_DD();
327		void minx_DE();
328		void minx_DF();
329		void minx_E0();
330		void minx_E1();
331		void minx_E2();
332		void minx_E3();
333		void minx_E4();
334		void minx_E5();
335		void minx_E6();
336		void minx_E7();
337		void minx_E8();
338		void minx_E9();
339		void minx_EA();
340		void minx_EB();
341		void minx_EC();
342		void minx_ED();
343		void minx_EE();
344		void minx_EF();
345		void minx_F0();
346		void minx_F1();
347		void minx_F2();
348		void minx_F3();
349		void minx_F4();
350		void minx_F5();
351		void minx_F6();
352		void minx_F7();
353		void minx_F8();
354		void minx_F9();
355		void minx_FA();
356		void minx_FB();
357		void minx_FC();
358		void minx_FD();
359		void minx_FE();
360		void minx_FF();
	105	void execute_one();
	106	void execute_one_ce();
	107	void execute_one_cf();
361	108
362		void minx_CE_00();
363		void minx_CE_01();
364		void minx_CE_02();
365		void minx_CE_03();
366		void minx_CE_04();
367		void minx_CE_05();
368		void minx_CE_06();
369		void minx_CE_07();
370		void minx_CE_08();
371		void minx_CE_09();
372		void minx_CE_0A();
373		void minx_CE_0B();
374		void minx_CE_0C();
375		void minx_CE_0D();
376		void minx_CE_0E();
377		void minx_CE_0F();
378		void minx_CE_10();
379		void minx_CE_11();
380		void minx_CE_12();
381		void minx_CE_13();
382		void minx_CE_14();
383		void minx_CE_15();
384		void minx_CE_16();
385		void minx_CE_17();
386		void minx_CE_18();
387		void minx_CE_19();
388		void minx_CE_1A();
389		void minx_CE_1B();
390		void minx_CE_1C();
391		void minx_CE_1D();
392		void minx_CE_1E();
393		void minx_CE_1F();
394		void minx_CE_20();
395		void minx_CE_21();
396		void minx_CE_22();
397		void minx_CE_23();
398		void minx_CE_24();
399		void minx_CE_25();
400		void minx_CE_26();
401		void minx_CE_27();
402		void minx_CE_28();
403		void minx_CE_29();
404		void minx_CE_2A();
405		void minx_CE_2B();
406		void minx_CE_2C();
407		void minx_CE_2D();
408		void minx_CE_2E();
409		void minx_CE_2F();
410		void minx_CE_30();
411		void minx_CE_31();
412		void minx_CE_32();
413		void minx_CE_33();
414		void minx_CE_34();
415		void minx_CE_35();
416		void minx_CE_36();
417		void minx_CE_37();
418		void minx_CE_38();
419		void minx_CE_39();
420		void minx_CE_3A();
421		void minx_CE_3B();
422		void minx_CE_3C();
423		void minx_CE_3D();
424		void minx_CE_3E();
425		void minx_CE_3F();
426		void minx_CE_40();
427		void minx_CE_41();
428		void minx_CE_42();
429		void minx_CE_43();
430		void minx_CE_44();
431		void minx_CE_45();
432		void minx_CE_46();
433		void minx_CE_47();
434		void minx_CE_48();
435		void minx_CE_49();
436		void minx_CE_4A();
437		void minx_CE_4B();
438		void minx_CE_4C();
439		void minx_CE_4D();
440		void minx_CE_4E();
441		void minx_CE_4F();
442		void minx_CE_50();
443		void minx_CE_51();
444		void minx_CE_52();
445		void minx_CE_53();
446		void minx_CE_54();
447		void minx_CE_55();
448		void minx_CE_56();
449		void minx_CE_57();
450		void minx_CE_58();
451		void minx_CE_59();
452		void minx_CE_5A();
453		void minx_CE_5B();
454		void minx_CE_5C();
455		void minx_CE_5D();
456		void minx_CE_5E();
457		void minx_CE_5F();
458		void minx_CE_60();
459		void minx_CE_61();
460		void minx_CE_62();
461		void minx_CE_63();
462		void minx_CE_64();
463		void minx_CE_65();
464		void minx_CE_66();
465		void minx_CE_67();
466		void minx_CE_68();
467		void minx_CE_69();
468		void minx_CE_6A();
469		void minx_CE_6B();
470		void minx_CE_6C();
471		void minx_CE_6D();
472		void minx_CE_6E();
473		void minx_CE_6F();
474		void minx_CE_70();
475		void minx_CE_71();
476		void minx_CE_72();
477		void minx_CE_73();
478		void minx_CE_74();
479		void minx_CE_75();
480		void minx_CE_76();
481		void minx_CE_77();
482		void minx_CE_78();
483		void minx_CE_79();
484		void minx_CE_7A();
485		void minx_CE_7B();
486		void minx_CE_7C();
487		void minx_CE_7D();
488		void minx_CE_7E();
489		void minx_CE_7F();
490		void minx_CE_80();
491		void minx_CE_81();
492		void minx_CE_82();
493		void minx_CE_83();
494		void minx_CE_84();
495		void minx_CE_85();
496		void minx_CE_86();
497		void minx_CE_87();
498		void minx_CE_88();
499		void minx_CE_89();
500		void minx_CE_8A();
501		void minx_CE_8B();
502		void minx_CE_8C();
503		void minx_CE_8D();
504		void minx_CE_8E();
505		void minx_CE_8F();
506		void minx_CE_90();
507		void minx_CE_91();
508		void minx_CE_92();
509		void minx_CE_93();
510		void minx_CE_94();
511		void minx_CE_95();
512		void minx_CE_96();
513		void minx_CE_97();
514		void minx_CE_98();
515		void minx_CE_99();
516		void minx_CE_9A();
517		void minx_CE_9B();
518		void minx_CE_9C();
519		void minx_CE_9D();
520		void minx_CE_9E();
521		void minx_CE_9F();
522		void minx_CE_A0();
523		void minx_CE_A1();
524		void minx_CE_A2();
525		void minx_CE_A3();
526		void minx_CE_A4();
527		void minx_CE_A5();
528		void minx_CE_A6();
529		void minx_CE_A7();
530		void minx_CE_A8();
531		void minx_CE_A9();
532		void minx_CE_AA();
533		void minx_CE_AB();
534		void minx_CE_AC();
535		void minx_CE_AD();
536		void minx_CE_AE();
537		void minx_CE_AF();
538		void minx_CE_B0();
539		void minx_CE_B1();
540		void minx_CE_B2();
541		void minx_CE_B3();
542		void minx_CE_B4();
543		void minx_CE_B5();
544		void minx_CE_B6();
545		void minx_CE_B7();
546		void minx_CE_B8();
547		void minx_CE_B9();
548		void minx_CE_BA();
549		void minx_CE_BB();
550		void minx_CE_BC();
551		void minx_CE_BD();
552		void minx_CE_BE();
553		void minx_CE_BF();
554		void minx_CE_C0();
555		void minx_CE_C1();
556		void minx_CE_C2();
557		void minx_CE_C3();
558		void minx_CE_C4();
559		void minx_CE_C5();
560		void minx_CE_C6();
561		void minx_CE_C7();
562		void minx_CE_C8();
563		void minx_CE_C9();
564		void minx_CE_CA();
565		void minx_CE_CB();
566		void minx_CE_CC();
567		void minx_CE_CD();
568		void minx_CE_CE();
569		void minx_CE_CF();
570		void minx_CE_D0();
571		void minx_CE_D1();
572		void minx_CE_D2();
573		void minx_CE_D3();
574		void minx_CE_D4();
575		void minx_CE_D5();
576		void minx_CE_D6();
577		void minx_CE_D7();
578		void minx_CE_D8();
579		void minx_CE_D9();
580		void minx_CE_DA();
581		void minx_CE_DB();
582		void minx_CE_DC();
583		void minx_CE_DD();
584		void minx_CE_DE();
585		void minx_CE_DF();
586		void minx_CE_E0();
587		void minx_CE_E1();
588		void minx_CE_E2();
589		void minx_CE_E3();
590		void minx_CE_E4();
591		void minx_CE_E5();
592		void minx_CE_E6();
593		void minx_CE_E7();
594		void minx_CE_E8();
595		void minx_CE_E9();
596		void minx_CE_EA();
597		void minx_CE_EB();
598		void minx_CE_EC();
599		void minx_CE_ED();
600		void minx_CE_EE();
601		void minx_CE_EF();
602		void minx_CE_F0();
603		void minx_CE_F1();
604		void minx_CE_F2();
605		void minx_CE_F3();
606		void minx_CE_F4();
607		void minx_CE_F5();
608		void minx_CE_F6();
609		void minx_CE_F7();
610		void minx_CE_F8();
611		void minx_CE_F9();
612		void minx_CE_FA();
613		void minx_CE_FB();
614		void minx_CE_FC();
615		void minx_CE_FD();
616		void minx_CE_FE();
617		void minx_CE_FF();
618
619		void minx_CF_00();
620		void minx_CF_01();
621		void minx_CF_02();
622		void minx_CF_03();
623		void minx_CF_04();
624		void minx_CF_05();
625		void minx_CF_06();
626		void minx_CF_07();
627		void minx_CF_08();
628		void minx_CF_09();
629		void minx_CF_0A();
630		void minx_CF_0B();
631		void minx_CF_0C();
632		void minx_CF_0D();
633		void minx_CF_0E();
634		void minx_CF_0F();
635		void minx_CF_10();
636		void minx_CF_11();
637		void minx_CF_12();
638		void minx_CF_13();
639		void minx_CF_14();
640		void minx_CF_15();
641		void minx_CF_16();
642		void minx_CF_17();
643		void minx_CF_18();
644		void minx_CF_19();
645		void minx_CF_1A();
646		void minx_CF_1B();
647		void minx_CF_1C();
648		void minx_CF_1D();
649		void minx_CF_1E();
650		void minx_CF_1F();
651		void minx_CF_20();
652		void minx_CF_21();
653		void minx_CF_22();
654		void minx_CF_23();
655		void minx_CF_24();
656		void minx_CF_25();
657		void minx_CF_26();
658		void minx_CF_27();
659		void minx_CF_28();
660		void minx_CF_29();
661		void minx_CF_2A();
662		void minx_CF_2B();
663		void minx_CF_2C();
664		void minx_CF_2D();
665		void minx_CF_2E();
666		void minx_CF_2F();
667		void minx_CF_30();
668		void minx_CF_31();
669		void minx_CF_32();
670		void minx_CF_33();
671		void minx_CF_34();
672		void minx_CF_35();
673		void minx_CF_36();
674		void minx_CF_37();
675		void minx_CF_38();
676		void minx_CF_39();
677		void minx_CF_3A();
678		void minx_CF_3B();
679		void minx_CF_3C();
680		void minx_CF_3D();
681		void minx_CF_3E();
682		void minx_CF_3F();
683		void minx_CF_40();
684		void minx_CF_41();
685		void minx_CF_42();
686		void minx_CF_43();
687		void minx_CF_44();
688		void minx_CF_45();
689		void minx_CF_46();
690		void minx_CF_47();
691		void minx_CF_48();
692		void minx_CF_49();
693		void minx_CF_4A();
694		void minx_CF_4B();
695		void minx_CF_4C();
696		void minx_CF_4D();
697		void minx_CF_4E();
698		void minx_CF_4F();
699		void minx_CF_50();
700		void minx_CF_51();
701		void minx_CF_52();
702		void minx_CF_53();
703		void minx_CF_54();
704		void minx_CF_55();
705		void minx_CF_56();
706		void minx_CF_57();
707		void minx_CF_58();
708		void minx_CF_59();
709		void minx_CF_5A();
710		void minx_CF_5B();
711		void minx_CF_5C();
712		void minx_CF_5D();
713		void minx_CF_5E();
714		void minx_CF_5F();
715		void minx_CF_60();
716		void minx_CF_61();
717		void minx_CF_62();
718		void minx_CF_63();
719		void minx_CF_64();
720		void minx_CF_65();
721		void minx_CF_66();
722		void minx_CF_67();
723		void minx_CF_68();
724		void minx_CF_69();
725		void minx_CF_6A();
726		void minx_CF_6B();
727		void minx_CF_6C();
728		void minx_CF_6D();
729		void minx_CF_6E();
730		void minx_CF_6F();
731		void minx_CF_70();
732		void minx_CF_71();
733		void minx_CF_72();
734		void minx_CF_73();
735		void minx_CF_74();
736		void minx_CF_75();
737		void minx_CF_76();
738		void minx_CF_77();
739		void minx_CF_78();
740		void minx_CF_79();
741		void minx_CF_7A();
742		void minx_CF_7B();
743		void minx_CF_7C();
744		void minx_CF_7D();
745		void minx_CF_7E();
746		void minx_CF_7F();
747		void minx_CF_80();
748		void minx_CF_81();
749		void minx_CF_82();
750		void minx_CF_83();
751		void minx_CF_84();
752		void minx_CF_85();
753		void minx_CF_86();
754		void minx_CF_87();
755		void minx_CF_88();
756		void minx_CF_89();
757		void minx_CF_8A();
758		void minx_CF_8B();
759		void minx_CF_8C();
760		void minx_CF_8D();
761		void minx_CF_8E();
762		void minx_CF_8F();
763		void minx_CF_90();
764		void minx_CF_91();
765		void minx_CF_92();
766		void minx_CF_93();
767		void minx_CF_94();
768		void minx_CF_95();
769		void minx_CF_96();
770		void minx_CF_97();
771		void minx_CF_98();
772		void minx_CF_99();
773		void minx_CF_9A();
774		void minx_CF_9B();
775		void minx_CF_9C();
776		void minx_CF_9D();
777		void minx_CF_9E();
778		void minx_CF_9F();
779		void minx_CF_A0();
780		void minx_CF_A1();
781		void minx_CF_A2();
782		void minx_CF_A3();
783		void minx_CF_A4();
784		void minx_CF_A5();
785		void minx_CF_A6();
786		void minx_CF_A7();
787		void minx_CF_A8();
788		void minx_CF_A9();
789		void minx_CF_AA();
790		void minx_CF_AB();
791		void minx_CF_AC();
792		void minx_CF_AD();
793		void minx_CF_AE();
794		void minx_CF_AF();
795		void minx_CF_B0();
796		void minx_CF_B1();
797		void minx_CF_B2();
798		void minx_CF_B3();
799		void minx_CF_B4();
800		void minx_CF_B5();
801		void minx_CF_B6();
802		void minx_CF_B7();
803		void minx_CF_B8();
804		void minx_CF_B9();
805		void minx_CF_BA();
806		void minx_CF_BB();
807		void minx_CF_BC();
808		void minx_CF_BD();
809		void minx_CF_BE();
810		void minx_CF_BF();
811		void minx_CF_C0();
812		void minx_CF_C1();
813		void minx_CF_C2();
814		void minx_CF_C3();
815		void minx_CF_C4();
816		void minx_CF_C5();
817		void minx_CF_C6();
818		void minx_CF_C7();
819		void minx_CF_C8();
820		void minx_CF_C9();
821		void minx_CF_CA();
822		void minx_CF_CB();
823		void minx_CF_CC();
824		void minx_CF_CD();
825		void minx_CF_CE();
826		void minx_CF_CF();
827		void minx_CF_D0();
828		void minx_CF_D1();
829		void minx_CF_D2();
830		void minx_CF_D3();
831		void minx_CF_D4();
832		void minx_CF_D5();
833		void minx_CF_D6();
834		void minx_CF_D7();
835		void minx_CF_D8();
836		void minx_CF_D9();
837		void minx_CF_DA();
838		void minx_CF_DB();
839		void minx_CF_DC();
840		void minx_CF_DD();
841		void minx_CF_DE();
842		void minx_CF_DF();
843		void minx_CF_E0();
844		void minx_CF_E1();
845		void minx_CF_E2();
846		void minx_CF_E3();
847		void minx_CF_E4();
848		void minx_CF_E5();
849		void minx_CF_E6();
850		void minx_CF_E7();
851		void minx_CF_E8();
852		void minx_CF_E9();
853		void minx_CF_EA();
854		void minx_CF_EB();
855		void minx_CF_EC();
856		void minx_CF_ED();
857		void minx_CF_EE();
858		void minx_CF_EF();
859		void minx_CF_F0();
860		void minx_CF_F1();
861		void minx_CF_F2();
862		void minx_CF_F3();
863		void minx_CF_F4();
864		void minx_CF_F5();
865		void minx_CF_F6();
866		void minx_CF_F7();
867		void minx_CF_F8();
868		void minx_CF_F9();
869		void minx_CF_FA();
870		void minx_CF_FB();
871		void minx_CF_FC();
872		void minx_CF_FD();
873		void minx_CF_FE();
874		void minx_CF_FF();
875
876		typedef void (minx_cpu_device::*op_func)();
877		static const op_func insnminx[256];
878	109	static const int insnminx_cycles[256];
879
880		static const op_func insnminx_CE[256];
881	110	static const int insnminx_cycles_CE[256];
882
883		static const op_func insnminx_CF[256];
884	111	static const int insnminx_cycles_CF[256];
885	112
886	113	};

trunk/src/emu/cpu/minx/minxops.h

r31251	r31252
1		#undef OP
2		#define OP(nn) void minx_cpu_device::minx_##nn()
3	1
4		OP(00) { m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
5		OP(01) { m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
6		OP(02) { m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), rdop() ); }
7		OP(03) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
8		OP(04) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
9		OP(05) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
10		OP(06) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
11		OP(07) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
12		OP(08) { m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
13		OP(09) { m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
14		OP(0A) { m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), rdop() ); }
15		OP(0B) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
16		OP(0C) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
17		OP(0D) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
18		OP(0E) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
19		OP(0F) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	2	void minx_cpu_device::execute_one()
	3	{
	4	const UINT8 opcode = rdop();
20	5
21		OP(10) { m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
22		OP(11) { m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
23		OP(12) { m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), rdop() ); }
24		OP(13) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
25		OP(14) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
26		OP(15) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
27		OP(16) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
28		OP(17) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
29		OP(18) { m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
30		OP(19) { m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
31		OP(1A) { m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), rdop() ); }
32		OP(1B) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
33		OP(1C) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
34		OP(1D) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
35		OP(1E) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
36		OP(1F) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	6	switch (opcode)
	7	{
	8	case 0x00: { m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	9	break;
	10	case 0x01: { m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	11	break;
	12	case 0x02: { m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), rdop() ); }
	13	break;
	14	case 0x03: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	15	break;
	16	case 0x04: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	17	break;
	18	case 0x05: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	19	break;
	20	case 0x06: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	21	break;
	22	case 0x07: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	23	break;
	24	case 0x08: { m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	25	break;
	26	case 0x09: { m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	27	break;
	28	case 0x0A: { m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), rdop() ); }
	29	break;
	30	case 0x0B: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	31	break;
	32	case 0x0C: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	33	break;
	34	case 0x0D: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	35	break;
	36	case 0x0E: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	37	break;
	38	case 0x0F: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	39	break;
37	40
38		OP(20) { m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
39		OP(21) { m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
40		OP(22) { m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), rdop() ); }
41		OP(23) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
42		OP(24) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
43		OP(25) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
44		OP(26) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
45		OP(27) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
46		OP(28) { m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
47		OP(29) { m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
48		OP(2A) { m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), rdop() ); }
49		OP(2B) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
50		OP(2C) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
51		OP(2D) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
52		OP(2E) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
53		OP(2F) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	41	case 0x10: { m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	42	break;
	43	case 0x11: { m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	44	break;
	45	case 0x12: { m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), rdop() ); }
	46	break;
	47	case 0x13: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	48	break;
	49	case 0x14: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	50	break;
	51	case 0x15: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	52	break;
	53	case 0x16: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	54	break;
	55	case 0x17: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	56	break;
	57	case 0x18: { m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	58	break;
	59	case 0x19: { m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	60	break;
	61	case 0x1A: { m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), rdop() ); }
	62	break;
	63	case 0x1B: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	64	break;
	65	case 0x1C: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	66	break;
	67	case 0x1D: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	68	break;
	69	case 0x1E: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	70	break;
	71	case 0x1F: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	72	break;
54	73
55		OP(30) { SUB8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
56		OP(31) { SUB8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
57		OP(32) { SUB8( ( m_BA & 0x00FF ), rdop() ); }
58		OP(33) { AD2_IHL; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
59		OP(34) { AD2_IN8; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
60		OP(35) { AD2_I16; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
61		OP(36) { AD2_XIX; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
62		OP(37) { AD2_YIY; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
63		OP(38) { m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
64		OP(39) { m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
65		OP(3A) { m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), rdop() ); }
66		OP(3B) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
67		OP(3C) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
68		OP(3D) { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
69		OP(3E) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
70		OP(3F) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	74	case 0x20: { m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	75	break;
	76	case 0x21: { m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	77	break;
	78	case 0x22: { m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), rdop() ); }
	79	break;
	80	case 0x23: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	81	break;
	82	case 0x24: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	83	break;
	84	case 0x25: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	85	break;
	86	case 0x26: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	87	break;
	88	case 0x27: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	89	break;
	90	case 0x28: { m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	91	break;
	92	case 0x29: { m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	93	break;
	94	case 0x2A: { m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), rdop() ); }
	95	break;
	96	case 0x2B: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	97	break;
	98	case 0x2C: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	99	break;
	100	case 0x2D: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	101	break;
	102	case 0x2E: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	103	break;
	104	case 0x2F: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	105	break;
71	106
72		OP(40) { m_BA = ( m_BA & 0xFF00 ) | ( m_BA & 0x00FF); }
73		OP(41) { m_BA = ( m_BA & 0xFF00 ) | ( m_BA >> 8 ); }
74		OP(42) { m_BA = ( m_BA & 0xFF00 ) | ( m_HL & 0x00FF); }
75		OP(43) { m_BA = ( m_BA & 0xFF00 ) | ( m_HL >> 8 ); }
76		OP(44) { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
77		OP(45) { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
78		OP(46) { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
79		OP(47) { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
80		OP(48) { m_BA = ( m_BA & 0x00FF ) | ( ( m_BA & 0x00FF) << 8 ); }
81		OP(49) { m_BA = ( m_BA & 0x00FF ) | ( ( m_BA >> 8 ) << 8 ); }
82		OP(4A) { m_BA = ( m_BA & 0x00FF ) | ( ( m_HL & 0x00FF) << 8 ); }
83		OP(4B) { m_BA = ( m_BA & 0x00FF ) | ( ( m_HL >> 8 ) << 8 ); }
84		OP(4C) { AD2_IN8; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
85		OP(4D) { AD2_IHL; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
86		OP(4E) { AD2_XIX; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
87		OP(4F) { AD2_YIY; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	107	case 0x30: { SUB8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	108	break;
	109	case 0x31: { SUB8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	110	break;
	111	case 0x32: { SUB8( ( m_BA & 0x00FF ), rdop() ); }
	112	break;
	113	case 0x33: { AD2_IHL; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	114	break;
	115	case 0x34: { AD2_IN8; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	116	break;
	117	case 0x35: { AD2_I16; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	118	break;
	119	case 0x36: { AD2_XIX; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	120	break;
	121	case 0x37: { AD2_YIY; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	122	break;
	123	case 0x38: { m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
	124	break;
	125	case 0x39: { m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
	126	break;
	127	case 0x3A: { m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), rdop() ); }
	128	break;
	129	case 0x3B: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	130	break;
	131	case 0x3C: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	132	break;
	133	case 0x3D: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	134	break;
	135	case 0x3E: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	136	break;
	137	case 0x3F: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
	138	break;
88	139
89		OP(50) { m_HL = ( m_HL & 0xFF00 ) | ( m_BA & 0x00FF); }
90		OP(51) { m_HL = ( m_HL & 0xFF00 ) | ( m_BA >> 8 ); }
91		OP(52) { m_HL = ( m_HL & 0xFF00 ) | ( m_HL & 0x00FF); }
92		OP(53) { m_HL = ( m_HL & 0xFF00 ) | ( m_HL >> 8 ); }
93		OP(54) { AD2_IN8; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
94		OP(55) { AD2_IHL; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
95		OP(56) { AD2_XIX; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
96		OP(57) { AD2_YIY; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
97		OP(58) { m_HL = ( m_HL & 0x00FF ) | ( ( m_BA & 0x00FF) << 8 ); }
98		OP(59) { m_HL = ( m_HL & 0x00FF ) | ( ( m_BA >> 8 ) << 8 ); }
99		OP(5A) { m_HL = ( m_HL & 0x00FF ) | ( ( m_HL & 0x00FF) << 8 ); }
100		OP(5B) { m_HL = ( m_HL & 0x00FF ) | ( ( m_HL >> 8 ) << 8 ); }
101		OP(5C) { AD2_IN8; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
102		OP(5D) { AD2_IHL; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
103		OP(5E) { AD2_XIX; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
104		OP(5F) { AD2_YIY; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	140	case 0x40: { m_BA = ( m_BA & 0xFF00 ) | ( m_BA & 0x00FF); }
	141	break;
	142	case 0x41: { m_BA = ( m_BA & 0xFF00 ) | ( m_BA >> 8 ); }
	143	break;
	144	case 0x42: { m_BA = ( m_BA & 0xFF00 ) | ( m_HL & 0x00FF); }
	145	break;
	146	case 0x43: { m_BA = ( m_BA & 0xFF00 ) | ( m_HL >> 8 ); }
	147	break;
	148	case 0x44: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	149	break;
	150	case 0x45: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	151	break;
	152	case 0x46: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	153	break;
	154	case 0x47: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
	155	break;
	156	case 0x48: { m_BA = ( m_BA & 0x00FF ) | ( ( m_BA & 0x00FF) << 8 ); }
	157	break;
	158	case 0x49: { m_BA = ( m_BA & 0x00FF ) | ( ( m_BA >> 8 ) << 8 ); }
	159	break;
	160	case 0x4A: { m_BA = ( m_BA & 0x00FF ) | ( ( m_HL & 0x00FF) << 8 ); }
	161	break;
	162	case 0x4B: { m_BA = ( m_BA & 0x00FF ) | ( ( m_HL >> 8 ) << 8 ); }
	163	break;
	164	case 0x4C: { AD2_IN8; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	165	break;
	166	case 0x4D: { AD2_IHL; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	167	break;
	168	case 0x4E: { AD2_XIX; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	169	break;
	170	case 0x4F: { AD2_YIY; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	171	break;
105	172
106		OP(60) { AD1_XIX; WR( addr1, ( m_BA & 0x00FF ) ); }
107		OP(61) { AD1_XIX; WR( addr1, ( m_BA >> 8 ) ); }
108		OP(62) { AD1_XIX; WR( addr1, ( m_HL & 0x00FF ) ); }
109		OP(63) { AD1_XIX; WR( addr1, ( m_HL >> 8 ) ); }
110		OP(64) { AD1_XIX; AD2_IN8; WR( addr1, RD( addr2 ) ); }
111		OP(65) { AD1_XIX; AD2_IHL; WR( addr1, RD( addr2 ) ); }
112		OP(66) { AD1_XIX; AD2_XIX; WR( addr1, RD( addr2 ) ); }
113		OP(67) { AD1_XIX; AD2_YIY; WR( addr1, RD( addr2 ) ); }
114		OP(68) { AD1_IHL; WR( addr1, ( m_BA & 0x00FF ) ); }
115		OP(69) { AD1_IHL; WR( addr1, ( m_BA >> 8 ) ); }
116		OP(6A) { AD1_IHL; WR( addr1, ( m_HL & 0x00FF ) ); }
117		OP(6B) { AD1_IHL; WR( addr1, ( m_HL >> 8 ) ); }
118		OP(6C) { AD1_IHL; AD2_IN8; WR( addr1, RD( addr2 ) ); }
119		OP(6D) { AD1_IHL; AD2_IHL; WR( addr1, RD( addr2 ) ); }
120		OP(6E) { AD1_IHL; AD2_XIX; WR( addr1, RD( addr2 ) ); }
121		OP(6F) { AD1_IHL; AD2_YIY; WR( addr1, RD( addr2 ) ); }
	173	case 0x50: { m_HL = ( m_HL & 0xFF00 ) | ( m_BA & 0x00FF); }
	174	break;
	175	case 0x51: { m_HL = ( m_HL & 0xFF00 ) | ( m_BA >> 8 ); }
	176	break;
	177	case 0x52: { m_HL = ( m_HL & 0xFF00 ) | ( m_HL & 0x00FF); }
	178	break;
	179	case 0x53: { m_HL = ( m_HL & 0xFF00 ) | ( m_HL >> 8 ); }
	180	break;
	181	case 0x54: { AD2_IN8; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	182	break;
	183	case 0x55: { AD2_IHL; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	184	break;
	185	case 0x56: { AD2_XIX; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	186	break;
	187	case 0x57: { AD2_YIY; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
	188	break;
	189	case 0x58: { m_HL = ( m_HL & 0x00FF ) | ( ( m_BA & 0x00FF) << 8 ); }
	190	break;
	191	case 0x59: { m_HL = ( m_HL & 0x00FF ) | ( ( m_BA >> 8 ) << 8 ); }
	192	break;
	193	case 0x5A: { m_HL = ( m_HL & 0x00FF ) | ( ( m_HL & 0x00FF) << 8 ); }
	194	break;
	195	case 0x5B: { m_HL = ( m_HL & 0x00FF ) | ( ( m_HL >> 8 ) << 8 ); }
	196	break;
	197	case 0x5C: { AD2_IN8; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	198	break;
	199	case 0x5D: { AD2_IHL; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	200	break;
	201	case 0x5E: { AD2_XIX; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	202	break;
	203	case 0x5F: { AD2_YIY; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
	204	break;
122	205
123		OP(70) { AD1_YIY; WR( addr1, ( m_BA & 0x00FF ) ); }
124		OP(71) { AD1_YIY; WR( addr1, ( m_BA >> 8 ) ); }
125		OP(72) { AD1_YIY; WR( addr1, ( m_HL & 0x00FF ) ); }
126		OP(73) { AD1_YIY; WR( addr1, ( m_HL >> 8 ) ); }
127		OP(74) { AD1_YIY; AD2_IN8; WR( addr1, RD( addr2 ) ); }
128		OP(75) { AD1_YIY; AD2_IHL; WR( addr1, RD( addr2 ) ); }
129		OP(76) { AD1_YIY; AD2_XIX; WR( addr1, RD( addr2 ) ); }
130		OP(77) { AD1_YIY; AD2_YIY; WR( addr1, RD( addr2 ) ); }
131		OP(78) { AD1_IN8; WR( addr1, ( m_BA & 0x00FF ) ); }
132		OP(79) { AD1_IN8; WR( addr1, ( m_BA >> 8 ) ); }
133		OP(7A) { AD1_IN8; WR( addr1, ( m_HL & 0x00FF ) ); }
134		OP(7B) { AD1_IN8; WR( addr1, ( m_HL >> 8 ) ); }
135		OP(7C) { /* illegal operation? */ }
136		OP(7D) { AD1_IN8; AD2_IHL; WR( addr1, RD( addr2 ) ); }
137		OP(7E) { AD1_IN8; AD2_XIX; WR( addr1, RD( addr2 ) ); }
138		OP(7F) { AD1_IN8; AD2_YIY; WR( addr1, RD( addr2 ) ); }
	206	case 0x60: { AD1_XIX; WR( addr1, ( m_BA & 0x00FF ) ); }
	207	break;
	208	case 0x61: { AD1_XIX; WR( addr1, ( m_BA >> 8 ) ); }
	209	break;
	210	case 0x62: { AD1_XIX; WR( addr1, ( m_HL & 0x00FF ) ); }
	211	break;
	212	case 0x63: { AD1_XIX; WR( addr1, ( m_HL >> 8 ) ); }
	213	break;
	214	case 0x64: { AD1_XIX; AD2_IN8; WR( addr1, RD( addr2 ) ); }
	215	break;
	216	case 0x65: { AD1_XIX; AD2_IHL; WR( addr1, RD( addr2 ) ); }
	217	break;
	218	case 0x66: { AD1_XIX; AD2_XIX; WR( addr1, RD( addr2 ) ); }
	219	break;
	220	case 0x67: { AD1_XIX; AD2_YIY; WR( addr1, RD( addr2 ) ); }
	221	break;
	222	case 0x68: { AD1_IHL; WR( addr1, ( m_BA & 0x00FF ) ); }
	223	break;
	224	case 0x69: { AD1_IHL; WR( addr1, ( m_BA >> 8 ) ); }
	225	break;
	226	case 0x6A: { AD1_IHL; WR( addr1, ( m_HL & 0x00FF ) ); }
	227	break;
	228	case 0x6B: { AD1_IHL; WR( addr1, ( m_HL >> 8 ) ); }
	229	break;
	230	case 0x6C: { AD1_IHL; AD2_IN8; WR( addr1, RD( addr2 ) ); }
	231	break;
	232	case 0x6D: { AD1_IHL; AD2_IHL; WR( addr1, RD( addr2 ) ); }
	233	break;
	234	case 0x6E: { AD1_IHL; AD2_XIX; WR( addr1, RD( addr2 ) ); }
	235	break;
	236	case 0x6F: { AD1_IHL; AD2_YIY; WR( addr1, RD( addr2 ) ); }
	237	break;
139	238
140		OP(80) { m_BA = ( m_BA & 0xFF00 ) | INC8( m_BA & 0x00FF ); }
141		OP(81) { m_BA = ( m_BA & 0x00FF ) | ( INC8( m_BA >> 8 ) << 8 ); }
142		OP(82) { m_HL = ( m_HL & 0xFF00 ) | INC8( m_HL & 0x00FF ); }
143		OP(83) { m_HL = ( m_HL & 0x00FF ) | ( INC8( m_HL >> 8 ) << 8 ); }
144		OP(84) { m_N = INC8( m_N ); }
145		OP(85) { AD1_IN8; WR( addr1, INC8( RD( addr1 ) ) ); }
146		OP(86) { AD1_IHL; WR( addr1, INC8( RD( addr1 ) ) ); }
147		OP(87) { m_SP = INC16( m_SP ); }
148		OP(88) { m_BA = ( m_BA & 0xFF00 ) | DEC8( m_BA & 0x00FF ); }
149		OP(89) { m_BA = ( m_BA & 0x00FF ) | ( DEC8( m_BA >> 8 ) << 8 ); }
150		OP(8A) { m_HL = ( m_HL & 0xFF00 ) | DEC8( m_HL & 0x00FF ); }
151		OP(8B) { m_HL = ( m_HL & 0x00FF ) | ( DEC8( m_HL >> 8 ) << 8 ); }
152		OP(8C) { m_N = DEC8( m_N ); }
153		OP(8D) { AD1_IN8; WR( addr1, DEC8( RD( addr1 ) ) ); }
154		OP(8E) { AD1_IHL; WR( addr1, DEC8( RD( addr1 ) ) ); }
155		OP(8F) { m_SP = DEC8( m_SP ); }
	239	case 0x70: { AD1_YIY; WR( addr1, ( m_BA & 0x00FF ) ); }
	240	break;
	241	case 0x71: { AD1_YIY; WR( addr1, ( m_BA >> 8 ) ); }
	242	break;
	243	case 0x72: { AD1_YIY; WR( addr1, ( m_HL & 0x00FF ) ); }
	244	break;
	245	case 0x73: { AD1_YIY; WR( addr1, ( m_HL >> 8 ) ); }
	246	break;
	247	case 0x74: { AD1_YIY; AD2_IN8; WR( addr1, RD( addr2 ) ); }
	248	break;
	249	case 0x75: { AD1_YIY; AD2_IHL; WR( addr1, RD( addr2 ) ); }
	250	break;
	251	case 0x76: { AD1_YIY; AD2_XIX; WR( addr1, RD( addr2 ) ); }
	252	break;
	253	case 0x77: { AD1_YIY; AD2_YIY; WR( addr1, RD( addr2 ) ); }
	254	break;
	255	case 0x78: { AD1_IN8; WR( addr1, ( m_BA & 0x00FF ) ); }
	256	break;
	257	case 0x79: { AD1_IN8; WR( addr1, ( m_BA >> 8 ) ); }
	258	break;
	259	case 0x7A: { AD1_IN8; WR( addr1, ( m_HL & 0x00FF ) ); }
	260	break;
	261	case 0x7B: { AD1_IN8; WR( addr1, ( m_HL >> 8 ) ); }
	262	break;
	263	case 0x7C: { /* illegal operation? */ }
	264	break;
	265	case 0x7D: { AD1_IN8; AD2_IHL; WR( addr1, RD( addr2 ) ); }
	266	break;
	267	case 0x7E: { AD1_IN8; AD2_XIX; WR( addr1, RD( addr2 ) ); }
	268	break;
	269	case 0x7F: { AD1_IN8; AD2_YIY; WR( addr1, RD( addr2 ) ); }
	270	break;
156	271
157		OP(90) { m_BA = INC16( m_BA ); }
158		OP(91) { m_HL = INC16( m_HL ); }
159		OP(92) { m_X = INC16( m_X ); }
160		OP(93) { m_Y = INC16( m_Y ); }
161		OP(94) { m_F = ( AND8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z;}
162		OP(95) { AD1_IHL; m_F = ( AND8( RD( addr1 ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
163		OP(96) { m_F = ( AND8( ( m_BA & 0x00FF ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
164		OP(97) { m_F = ( AND8( ( m_BA >> 8 ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
165		OP(98) { m_BA = DEC16( m_BA ); }
166		OP(99) { m_HL = DEC16( m_HL ); }
167		OP(9A) { m_X = DEC16( m_X ); }
168		OP(9B) { m_Y = DEC16( m_Y ); }
169		OP(9C) { m_F = m_F & rdop(); }
170		OP(9D) { m_F = m_F | rdop(); }
171		OP(9E) { m_F = m_F ^ rdop(); }
172		OP(9F) { m_F = rdop(); }
	272	case 0x80: { m_BA = ( m_BA & 0xFF00 ) | INC8( m_BA & 0x00FF ); }
	273	break;
	274	case 0x81: { m_BA = ( m_BA & 0x00FF ) | ( INC8( m_BA >> 8 ) << 8 ); }
	275	break;
	276	case 0x82: { m_HL = ( m_HL & 0xFF00 ) | INC8( m_HL & 0x00FF ); }
	277	break;
	278	case 0x83: { m_HL = ( m_HL & 0x00FF ) | ( INC8( m_HL >> 8 ) << 8 ); }
	279	break;
	280	case 0x84: { m_N = INC8( m_N ); }
	281	break;
	282	case 0x85: { AD1_IN8; WR( addr1, INC8( RD( addr1 ) ) ); }
	283	break;
	284	case 0x86: { AD1_IHL; WR( addr1, INC8( RD( addr1 ) ) ); }
	285	break;
	286	case 0x87: { m_SP = INC16( m_SP ); }
	287	break;
	288	case 0x88: { m_BA = ( m_BA & 0xFF00 ) | DEC8( m_BA & 0x00FF ); }
	289	break;
	290	case 0x89: { m_BA = ( m_BA & 0x00FF ) | ( DEC8( m_BA >> 8 ) << 8 ); }
	291	break;
	292	case 0x8A: { m_HL = ( m_HL & 0xFF00 ) | DEC8( m_HL & 0x00FF ); }
	293	break;
	294	case 0x8B: { m_HL = ( m_HL & 0x00FF ) | ( DEC8( m_HL >> 8 ) << 8 ); }
	295	break;
	296	case 0x8C: { m_N = DEC8( m_N ); }
	297	break;
	298	case 0x8D: { AD1_IN8; WR( addr1, DEC8( RD( addr1 ) ) ); }
	299	break;
	300	case 0x8E: { AD1_IHL; WR( addr1, DEC8( RD( addr1 ) ) ); }
	301	break;
	302	case 0x8F: { m_SP = DEC8( m_SP ); }
	303	break;
173	304
174		OP(A0) { PUSH16( m_BA ); }
175		OP(A1) { PUSH16( m_HL ); }
176		OP(A2) { PUSH16( m_X ); }
177		OP(A3) { PUSH16( m_Y ); }
178		OP(A4) { PUSH8( m_N ); }
179		OP(A5) { PUSH8( m_I ); }
180		OP(A6) { PUSH8( m_XI ); PUSH8( m_YI ); }
181		OP(A7) { PUSH8( m_F ); }
182		OP(A8) { m_BA = POP16(); }
183		OP(A9) { m_HL = POP16();}
184		OP(AA) { m_X = POP16(); }
185		OP(AB) { m_Y = POP16(); }
186		OP(AC) { m_N = POP8(); }
187		OP(AD) { m_I = POP8(); }
188		OP(AE) { m_YI = POP8(); m_XI = POP8(); }
189		OP(AF) { m_F = POP8(); }
	305	case 0x90: { m_BA = INC16( m_BA ); }
	306	break;
	307	case 0x91: { m_HL = INC16( m_HL ); }
	308	break;
	309	case 0x92: { m_X = INC16( m_X ); }
	310	break;
	311	case 0x93: { m_Y = INC16( m_Y ); }
	312	break;
	313	case 0x94: { m_F = ( AND8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z;}
	314	break;
	315	case 0x95: { AD1_IHL; m_F = ( AND8( RD( addr1 ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
	316	break;
	317	case 0x96: { m_F = ( AND8( ( m_BA & 0x00FF ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
	318	break;
	319	case 0x97: { m_F = ( AND8( ( m_BA >> 8 ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
	320	break;
	321	case 0x98: { m_BA = DEC16( m_BA ); }
	322	break;
	323	case 0x99: { m_HL = DEC16( m_HL ); }
	324	break;
	325	case 0x9A: { m_X = DEC16( m_X ); }
	326	break;
	327	case 0x9B: { m_Y = DEC16( m_Y ); }
	328	break;
	329	case 0x9C: { m_F = m_F & rdop(); }
	330	break;
	331	case 0x9D: { m_F = m_F | rdop(); }
	332	break;
	333	case 0x9E: { m_F = m_F ^ rdop(); }
	334	break;
	335	case 0x9F: { m_F = rdop(); }
	336	break;
190	337
191		OP(B0) { UINT8 op = rdop(); m_BA = ( m_BA & 0xFF00 ) | op; }
192		OP(B1) { UINT8 op = rdop(); m_BA = ( m_BA & 0x00FF ) | ( op << 8 ); }
193		OP(B2) { UINT8 op = rdop(); m_HL = ( m_HL & 0xFF00 ) | op; }
194		OP(B3) { UINT8 op = rdop(); m_HL = ( m_HL & 0x00FF ) | ( op << 8 ); }
195		OP(B4) { UINT8 op = rdop(); m_N = op; }
196		OP(B5) { AD1_IHL; UINT8 op = rdop(); WR( addr1, op); }
197		OP(B6) { AD1_XIX; UINT8 op = rdop(); WR( addr1, op ); }
198		OP(B7) { AD1_YIY; UINT8 op = rdop(); WR( addr1, op ); }
199		OP(B8) { AD2_I16; m_BA = rd16( addr2 ); }
200		OP(B9) { AD2_I16; m_HL = rd16( addr2 ); }
201		OP(BA) { AD2_I16; m_X = rd16( addr2 ); }
202		OP(BB) { AD2_I16; m_Y = rd16( addr2 ); }
203		OP(BC) { AD1_I16; wr16( addr1, m_BA ); }
204		OP(BD) { AD1_I16; wr16( addr1, m_HL ); }
205		OP(BE) { AD1_I16; wr16( addr1, m_X ); }
206		OP(BF) { AD1_I16; wr16( addr1, m_Y ); }
	338	case 0xA0: { PUSH16( m_BA ); }
	339	break;
	340	case 0xA1: { PUSH16( m_HL ); }
	341	break;
	342	case 0xA2: { PUSH16( m_X ); }
	343	break;
	344	case 0xA3: { PUSH16( m_Y ); }
	345	break;
	346	case 0xA4: { PUSH8( m_N ); }
	347	break;
	348	case 0xA5: { PUSH8( m_I ); }
	349	break;
	350	case 0xA6: { PUSH8( m_XI ); PUSH8( m_YI ); }
	351	break;
	352	case 0xA7: { PUSH8( m_F ); }
	353	break;
	354	case 0xA8: { m_BA = POP16(); }
	355	break;
	356	case 0xA9: { m_HL = POP16();}
	357	break;
	358	case 0xAA: { m_X = POP16(); }
	359	break;
	360	case 0xAB: { m_Y = POP16(); }
	361	break;
	362	case 0xAC: { m_N = POP8(); }
	363	break;
	364	case 0xAD: { m_I = POP8(); }
	365	break;
	366	case 0xAE: { m_YI = POP8(); m_XI = POP8(); }
	367	break;
	368	case 0xAF: { m_F = POP8(); }
	369	break;
207	370
208		OP(C0) { m_BA = ADD16( m_BA, rdop16() ); }
209		OP(C1) { m_HL = ADD16( m_HL, rdop16() ); }
210		OP(C2) { m_X = ADD16( m_X, rdop16() ); }
211		OP(C3) { m_Y = ADD16( m_Y, rdop16() ); }
212		OP(C4) { m_BA = rdop16(); }
213		OP(C5) { m_HL = rdop16(); }
214		OP(C6) { m_X = rdop16(); }
215		OP(C7) { m_Y = rdop16(); }
216		OP(C8) { UINT16 t = m_BA; m_BA = m_HL; m_HL = t; }
217		OP(C9) { UINT16 t = m_BA; m_BA = m_X; m_X = t; }
218		OP(CA) { UINT16 t = m_BA; m_BA = m_Y; m_Y = t; }
219		OP(CB) { UINT16 t = m_BA; m_BA = m_SP; m_SP = t; }
220		OP(CC) { m_BA = ( m_BA >> 8 ) | ( ( m_BA & 0x00FF ) << 8 ); }
221		OP(CD) { UINT8 t; AD2_IHL; t = RD( addr2 ); WR( addr2, ( m_BA & 0x00FF ) ); m_BA = ( m_BA & 0xFF00 ) | t; }
222		OP(CE) { UINT8 op = rdop(); (this->*insnminx_CE[op])(); m_icount -= insnminx_cycles_CE[op]; }
223		OP(CF) { UINT8 op = rdop(); (this->*insnminx_CF[op])(); m_icount -= insnminx_cycles_CF[op]; }
	371	case 0xB0: { UINT8 op = rdop(); m_BA = ( m_BA & 0xFF00 ) | op; }
	372	break;
	373	case 0xB1: { UINT8 op = rdop(); m_BA = ( m_BA & 0x00FF ) | ( op << 8 ); }
	374	break;
	375	case 0xB2: { UINT8 op = rdop(); m_HL = ( m_HL & 0xFF00 ) | op; }
	376	break;
	377	case 0xB3: { UINT8 op = rdop(); m_HL = ( m_HL & 0x00FF ) | ( op << 8 ); }
	378	break;
	379	case 0xB4: { UINT8 op = rdop(); m_N = op; }
	380	break;
	381	case 0xB5: { AD1_IHL; UINT8 op = rdop(); WR( addr1, op); }
	382	break;
	383	case 0xB6: { AD1_XIX; UINT8 op = rdop(); WR( addr1, op ); }
	384	break;
	385	case 0xB7: { AD1_YIY; UINT8 op = rdop(); WR( addr1, op ); }
	386	break;
	387	case 0xB8: { AD2_I16; m_BA = rd16( addr2 ); }
	388	break;
	389	case 0xB9: { AD2_I16; m_HL = rd16( addr2 ); }
	390	break;
	391	case 0xBA: { AD2_I16; m_X = rd16( addr2 ); }
	392	break;
	393	case 0xBB: { AD2_I16; m_Y = rd16( addr2 ); }
	394	break;
	395	case 0xBC: { AD1_I16; wr16( addr1, m_BA ); }
	396	break;
	397	case 0xBD: { AD1_I16; wr16( addr1, m_HL ); }
	398	break;
	399	case 0xBE: { AD1_I16; wr16( addr1, m_X ); }
	400	break;
	401	case 0xBF: { AD1_I16; wr16( addr1, m_Y ); }
	402	break;
224	403
225		OP(D0) { m_BA = SUB16( m_BA, rdop16() ); }
226		OP(D1) { m_HL = SUB16( m_HL, rdop16() ); }
227		OP(D2) { m_X = SUB16( m_X, rdop16() ); }
228		OP(D3) { m_Y = SUB16( m_Y, rdop16() ); }
229		OP(D4) { SUB16( m_BA, rdop16() ); }
230		OP(D5) { SUB16( m_HL, rdop16() ); }
231		OP(D6) { SUB16( m_X, rdop16() ); }
232		OP(D7) { SUB16( m_Y, rdop16() ); }
233		OP(D8) { AD1_IN8; WR( addr1, AND8( RD( addr1 ), rdop() ) ); }
234		OP(D9) { AD1_IN8; WR( addr1, OR8( RD( addr1 ), rdop() ) ); }
235		OP(DA) { AD1_IN8; WR( addr1, XOR8( RD( addr1 ), rdop() ) ); }
236		OP(DB) { AD1_IN8; SUB8( RD( addr1 ), rdop() ); }
237		OP(DC) { AD1_IN8; m_F = ( AND8( RD( addr1 ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
238		OP(DD) { AD1_IN8; WR( addr1, rdop() ); }
239		OP(DE) { m_BA = ( m_BA & 0xFF00 ) | ( ( m_BA & 0x000F ) | ( ( m_BA & 0x0F00 ) >> 4 ) ); }
240		OP(DF) { m_BA = ( ( m_BA & 0x0080 ) ? 0xFF00 : 0x0000 ) | ( m_BA & 0x000F ); }
	404	case 0xC0: { m_BA = ADD16( m_BA, rdop16() ); }
	405	break;
	406	case 0xC1: { m_HL = ADD16( m_HL, rdop16() ); }
	407	break;
	408	case 0xC2: { m_X = ADD16( m_X, rdop16() ); }
	409	break;
	410	case 0xC3: { m_Y = ADD16( m_Y, rdop16() ); }
	411	break;
	412	case 0xC4: { m_BA = rdop16(); }
	413	break;
	414	case 0xC5: { m_HL = rdop16(); }
	415	break;
	416	case 0xC6: { m_X = rdop16(); }
	417	break;
	418	case 0xC7: { m_Y = rdop16(); }
	419	break;
	420	case 0xC8: { UINT16 t = m_BA; m_BA = m_HL; m_HL = t; }
	421	break;
	422	case 0xC9: { UINT16 t = m_BA; m_BA = m_X; m_X = t; }
	423	break;
	424	case 0xCA: { UINT16 t = m_BA; m_BA = m_Y; m_Y = t; }
	425	break;
	426	case 0xCB: { UINT16 t = m_BA; m_BA = m_SP; m_SP = t; }
	427	break;
	428	case 0xCC: { m_BA = ( m_BA >> 8 ) | ( ( m_BA & 0x00FF ) << 8 ); }
	429	break;
	430	case 0xCD: { UINT8 t; AD2_IHL; t = RD( addr2 ); WR( addr2, ( m_BA & 0x00FF ) ); m_BA = ( m_BA & 0xFF00 ) | t; }
	431	break;
	432	case 0xCE: { execute_one_ce(); }
	433	break;
	434	case 0xCF: { execute_one_cf(); }
	435	break;
241	436
242		OP(E0) { INT8 d8 = rdop(); if ( m_F & FLAG_C ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
243		OP(E1) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_C ) ) { CALL( m_PC + d8- 1  ); m_icount -= 12; } }
244		OP(E2) { INT8 d8 = rdop(); if ( m_F & FLAG_Z ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
245		OP(E3) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_Z ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
246		OP(E4) { INT8 d8 = rdop(); if ( m_F & FLAG_C ) { JMP( m_PC + d8 - 1 ); } }
247		OP(E5) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_C ) ) { JMP( m_PC + d8 - 1 ); } }
248		OP(E6) { INT8 d8 = rdop(); if ( m_F & FLAG_Z ) { JMP( m_PC + d8 - 1 ); } }
249		OP(E7) { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_Z ) ) { JMP( m_PC + d8 - 1 ); } }
250		OP(E8) { UINT16 d16 = rdop16(); if ( m_F & FLAG_C ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
251		OP(E9) { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_C ) ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
252		OP(EA) { UINT16 d16 = rdop16(); if ( m_F & FLAG_Z ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
253		OP(EB) { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_Z ) ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
254		OP(EC) { UINT16 d16 = rdop16(); if ( m_F & FLAG_C ) { JMP( m_PC + d16 - 1 ); } }
255		OP(ED) { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_C ) ) { JMP( m_PC + d16 - 1 ); } }
256		OP(EE) { UINT16 d16 = rdop16(); if ( m_F & FLAG_Z ) { JMP( m_PC + d16 - 1 ); } }
257		OP(EF) { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_Z ) ) { JMP( m_PC + d16 - 1 ); } }
	437	case 0xD0: { m_BA = SUB16( m_BA, rdop16() ); }
	438	break;
	439	case 0xD1: { m_HL = SUB16( m_HL, rdop16() ); }
	440	break;
	441	case 0xD2: { m_X = SUB16( m_X, rdop16() ); }
	442	break;
	443	case 0xD3: { m_Y = SUB16( m_Y, rdop16() ); }
	444	break;
	445	case 0xD4: { SUB16( m_BA, rdop16() ); }
	446	break;
	447	case 0xD5: { SUB16( m_HL, rdop16() ); }
	448	break;
	449	case 0xD6: { SUB16( m_X, rdop16() ); }
	450	break;
	451	case 0xD7: { SUB16( m_Y, rdop16() ); }
	452	break;
	453	case 0xD8: { AD1_IN8; WR( addr1, AND8( RD( addr1 ), rdop() ) ); }
	454	break;
	455	case 0xD9: { AD1_IN8; WR( addr1, OR8( RD( addr1 ), rdop() ) ); }
	456	break;
	457	case 0xDA: { AD1_IN8; WR( addr1, XOR8( RD( addr1 ), rdop() ) ); }
	458	break;
	459	case 0xDB: { AD1_IN8; SUB8( RD( addr1 ), rdop() ); }
	460	break;
	461	case 0xDC: { AD1_IN8; m_F = ( AND8( RD( addr1 ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
	462	break;
	463	case 0xDD: { AD1_IN8; WR( addr1, rdop() ); }
	464	break;
	465	case 0xDE: { m_BA = ( m_BA & 0xFF00 ) | ( ( m_BA & 0x000F ) | ( ( m_BA & 0x0F00 ) >> 4 ) ); }
	466	break;
	467	case 0xDF: { m_BA = ( ( m_BA & 0x0080 ) ? 0xFF00 : 0x0000 ) | ( m_BA & 0x000F ); }
	468	break;
258	469
259		OP(F0) { INT8 d8 = rdop(); CALL( m_PC + d8 - 1 ); }
260		OP(F1) { INT8 d8 = rdop(); JMP( m_PC + d8 - 1 ); }
261		OP(F2) { UINT16 d16 = rdop16(); CALL( m_PC + d16 - 1 ); }
262		OP(F3) { UINT16 d16 = rdop16(); JMP( m_PC + d16 - 1 ); }
263		OP(F4) { JMP( m_HL ); }
264		OP(F5) { INT8 d8 = rdop(); m_BA = m_BA - 0x0100; if ( m_BA & 0xFF00 ) { JMP( m_PC + d8 - 1 ); } }
265		OP(F6) { m_BA = ( m_BA & 0xFF00 ) | ( ( m_BA & 0x00F0 ) >> 4 ) | ( ( m_BA & 0x000F ) << 4 ); }
266		OP(F7) { UINT8 d; AD1_IHL; d = RD( addr1 ); WR( addr1, ( ( d & 0xF0 ) >> 4 ) | ( ( d & 0x0F ) << 4 ) ); }
267		OP(F8) { m_PC = POP16(); m_V = POP8(); m_U = m_V; }
268		OP(F9) { m_F = POP8(); m_PC = POP16(); m_V = POP8(); m_U = m_V; }
269		OP(FA) { m_PC = POP16() + 2; m_V = POP8(); m_U = m_V; }
270		OP(FB) { AD1_I16; CALL( rd16( addr1 ) ); }
271		OP(FC) { UINT8 i = rdop() & 0xFE; CALL( rd16( i ) ); PUSH8( m_F ); }
272		OP(FD) { UINT8 i = rdop() & 0xFE; JMP( rd16( i ) ); /* PUSH8( m_F );?? */ }
273		OP(FE) { /* illegal operation? */ }
274		OP(FF) { }
	470	case 0xE0: { INT8 d8 = rdop(); if ( m_F & FLAG_C ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	471	break;
	472	case 0xE1: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_C ) ) { CALL( m_PC + d8- 1  ); m_icount -= 12; } }
	473	break;
	474	case 0xE2: { INT8 d8 = rdop(); if ( m_F & FLAG_Z ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	475	break;
	476	case 0xE3: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_Z ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
	477	break;
	478	case 0xE4: { INT8 d8 = rdop(); if ( m_F & FLAG_C ) { JMP( m_PC + d8 - 1 ); } }
	479	break;
	480	case 0xE5: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_C ) ) { JMP( m_PC + d8 - 1 ); } }
	481	break;
	482	case 0xE6: { INT8 d8 = rdop(); if ( m_F & FLAG_Z ) { JMP( m_PC + d8 - 1 ); } }
	483	break;
	484	case 0xE7: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_Z ) ) { JMP( m_PC + d8 - 1 ); } }
	485	break;
	486	case 0xE8: { UINT16 d16 = rdop16(); if ( m_F & FLAG_C ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
	487	break;
	488	case 0xE9: { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_C ) ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
	489	break;
	490	case 0xEA: { UINT16 d16 = rdop16(); if ( m_F & FLAG_Z ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
	491	break;
	492	case 0xEB: { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_Z ) ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
	493	break;
	494	case 0xEC: { UINT16 d16 = rdop16(); if ( m_F & FLAG_C ) { JMP( m_PC + d16 - 1 ); } }
	495	break;
	496	case 0xED: { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_C ) ) { JMP( m_PC + d16 - 1 ); } }
	497	break;
	498	case 0xEE: { UINT16 d16 = rdop16(); if ( m_F & FLAG_Z ) { JMP( m_PC + d16 - 1 ); } }
	499	break;
	500	case 0xEF: { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_Z ) ) { JMP( m_PC + d16 - 1 ); } }
	501	break;
275	502
276		const minx_cpu_device::op_func minx_cpu_device::insnminx[256] = {
277		&minx_cpu_device::minx_00, &minx_cpu_device::minx_01, &minx_cpu_device::minx_02, &minx_cpu_device::minx_03, &minx_cpu_device::minx_04, &minx_cpu_device::minx_05, &minx_cpu_device::minx_06, &minx_cpu_device::minx_07,
278		&minx_cpu_device::minx_08, &minx_cpu_device::minx_09, &minx_cpu_device::minx_0A, &minx_cpu_device::minx_0B, &minx_cpu_device::minx_0C, &minx_cpu_device::minx_0D, &minx_cpu_device::minx_0E, &minx_cpu_device::minx_0F,
279		&minx_cpu_device::minx_10, &minx_cpu_device::minx_11, &minx_cpu_device::minx_12, &minx_cpu_device::minx_13, &minx_cpu_device::minx_14, &minx_cpu_device::minx_15, &minx_cpu_device::minx_16, &minx_cpu_device::minx_17,
280		&minx_cpu_device::minx_18, &minx_cpu_device::minx_19, &minx_cpu_device::minx_1A, &minx_cpu_device::minx_1B, &minx_cpu_device::minx_1C, &minx_cpu_device::minx_1D, &minx_cpu_device::minx_1E, &minx_cpu_device::minx_1F,
281		&minx_cpu_device::minx_20, &minx_cpu_device::minx_21, &minx_cpu_device::minx_22, &minx_cpu_device::minx_23, &minx_cpu_device::minx_24, &minx_cpu_device::minx_25, &minx_cpu_device::minx_26, &minx_cpu_device::minx_27,
282		&minx_cpu_device::minx_28, &minx_cpu_device::minx_29, &minx_cpu_device::minx_2A, &minx_cpu_device::minx_2B, &minx_cpu_device::minx_2C, &minx_cpu_device::minx_2D, &minx_cpu_device::minx_2E, &minx_cpu_device::minx_2F,
283		&minx_cpu_device::minx_30, &minx_cpu_device::minx_31, &minx_cpu_device::minx_32, &minx_cpu_device::minx_33, &minx_cpu_device::minx_34, &minx_cpu_device::minx_35, &minx_cpu_device::minx_36, &minx_cpu_device::minx_37,
284		&minx_cpu_device::minx_38, &minx_cpu_device::minx_39, &minx_cpu_device::minx_3A, &minx_cpu_device::minx_3B, &minx_cpu_device::minx_3C, &minx_cpu_device::minx_3D, &minx_cpu_device::minx_3E, &minx_cpu_device::minx_3F,
285		&minx_cpu_device::minx_40, &minx_cpu_device::minx_41, &minx_cpu_device::minx_42, &minx_cpu_device::minx_43, &minx_cpu_device::minx_44, &minx_cpu_device::minx_45, &minx_cpu_device::minx_46, &minx_cpu_device::minx_47,
286		&minx_cpu_device::minx_48, &minx_cpu_device::minx_49, &minx_cpu_device::minx_4A, &minx_cpu_device::minx_4B, &minx_cpu_device::minx_4C, &minx_cpu_device::minx_4D, &minx_cpu_device::minx_4E, &minx_cpu_device::minx_4F,
287		&minx_cpu_device::minx_50, &minx_cpu_device::minx_51, &minx_cpu_device::minx_52, &minx_cpu_device::minx_53, &minx_cpu_device::minx_54, &minx_cpu_device::minx_55, &minx_cpu_device::minx_56, &minx_cpu_device::minx_57,
288		&minx_cpu_device::minx_58, &minx_cpu_device::minx_59, &minx_cpu_device::minx_5A, &minx_cpu_device::minx_5B, &minx_cpu_device::minx_5C, &minx_cpu_device::minx_5D, &minx_cpu_device::minx_5E, &minx_cpu_device::minx_5F,
289		&minx_cpu_device::minx_60, &minx_cpu_device::minx_61, &minx_cpu_device::minx_62, &minx_cpu_device::minx_63, &minx_cpu_device::minx_64, &minx_cpu_device::minx_65, &minx_cpu_device::minx_66, &minx_cpu_device::minx_67,
290		&minx_cpu_device::minx_68, &minx_cpu_device::minx_69, &minx_cpu_device::minx_6A, &minx_cpu_device::minx_6B, &minx_cpu_device::minx_6C, &minx_cpu_device::minx_6D, &minx_cpu_device::minx_6E, &minx_cpu_device::minx_6F,
291		&minx_cpu_device::minx_70, &minx_cpu_device::minx_71, &minx_cpu_device::minx_72, &minx_cpu_device::minx_73, &minx_cpu_device::minx_74, &minx_cpu_device::minx_75, &minx_cpu_device::minx_76, &minx_cpu_device::minx_77,
292		&minx_cpu_device::minx_78, &minx_cpu_device::minx_79, &minx_cpu_device::minx_7A, &minx_cpu_device::minx_7B, &minx_cpu_device::minx_7C, &minx_cpu_device::minx_7D, &minx_cpu_device::minx_7E, &minx_cpu_device::minx_7F,
293		&minx_cpu_device::minx_80, &minx_cpu_device::minx_81, &minx_cpu_device::minx_82, &minx_cpu_device::minx_83, &minx_cpu_device::minx_84, &minx_cpu_device::minx_85, &minx_cpu_device::minx_86, &minx_cpu_device::minx_87,
294		&minx_cpu_device::minx_88, &minx_cpu_device::minx_89, &minx_cpu_device::minx_8A, &minx_cpu_device::minx_8B, &minx_cpu_device::minx_8C, &minx_cpu_device::minx_8D, &minx_cpu_device::minx_8E, &minx_cpu_device::minx_8F,
295		&minx_cpu_device::minx_90, &minx_cpu_device::minx_91, &minx_cpu_device::minx_92, &minx_cpu_device::minx_93, &minx_cpu_device::minx_94, &minx_cpu_device::minx_95, &minx_cpu_device::minx_96, &minx_cpu_device::minx_97,
296		&minx_cpu_device::minx_98, &minx_cpu_device::minx_99, &minx_cpu_device::minx_9A, &minx_cpu_device::minx_9B, &minx_cpu_device::minx_9C, &minx_cpu_device::minx_9D, &minx_cpu_device::minx_9E, &minx_cpu_device::minx_9F,
297		&minx_cpu_device::minx_A0, &minx_cpu_device::minx_A1, &minx_cpu_device::minx_A2, &minx_cpu_device::minx_A3, &minx_cpu_device::minx_A4, &minx_cpu_device::minx_A5, &minx_cpu_device::minx_A6, &minx_cpu_device::minx_A7,
298		&minx_cpu_device::minx_A8, &minx_cpu_device::minx_A9, &minx_cpu_device::minx_AA, &minx_cpu_device::minx_AB, &minx_cpu_device::minx_AC, &minx_cpu_device::minx_AD, &minx_cpu_device::minx_AE, &minx_cpu_device::minx_AF,
299		&minx_cpu_device::minx_B0, &minx_cpu_device::minx_B1, &minx_cpu_device::minx_B2, &minx_cpu_device::minx_B3, &minx_cpu_device::minx_B4, &minx_cpu_device::minx_B5, &minx_cpu_device::minx_B6, &minx_cpu_device::minx_B7,
300		&minx_cpu_device::minx_B8, &minx_cpu_device::minx_B9, &minx_cpu_device::minx_BA, &minx_cpu_device::minx_BB, &minx_cpu_device::minx_BC, &minx_cpu_device::minx_BD, &minx_cpu_device::minx_BE, &minx_cpu_device::minx_BF,
301		&minx_cpu_device::minx_C0, &minx_cpu_device::minx_C1, &minx_cpu_device::minx_C2, &minx_cpu_device::minx_C3, &minx_cpu_device::minx_C4, &minx_cpu_device::minx_C5, &minx_cpu_device::minx_C6, &minx_cpu_device::minx_C7,
302		&minx_cpu_device::minx_C8, &minx_cpu_device::minx_C9, &minx_cpu_device::minx_CA, &minx_cpu_device::minx_CB, &minx_cpu_device::minx_CC, &minx_cpu_device::minx_CD, &minx_cpu_device::minx_CE, &minx_cpu_device::minx_CF,
303		&minx_cpu_device::minx_D0, &minx_cpu_device::minx_D1, &minx_cpu_device::minx_D2, &minx_cpu_device::minx_D3, &minx_cpu_device::minx_D4, &minx_cpu_device::minx_D5, &minx_cpu_device::minx_D6, &minx_cpu_device::minx_D7,
304		&minx_cpu_device::minx_D8, &minx_cpu_device::minx_D9, &minx_cpu_device::minx_DA, &minx_cpu_device::minx_DB, &minx_cpu_device::minx_DC, &minx_cpu_device::minx_DD, &minx_cpu_device::minx_DE, &minx_cpu_device::minx_DF,
305		&minx_cpu_device::minx_E0, &minx_cpu_device::minx_E1, &minx_cpu_device::minx_E2, &minx_cpu_device::minx_E3, &minx_cpu_device::minx_E4, &minx_cpu_device::minx_E5, &minx_cpu_device::minx_E6, &minx_cpu_device::minx_E7,
306		&minx_cpu_device::minx_E8, &minx_cpu_device::minx_E9, &minx_cpu_device::minx_EA, &minx_cpu_device::minx_EB, &minx_cpu_device::minx_EC, &minx_cpu_device::minx_ED, &minx_cpu_device::minx_EE, &minx_cpu_device::minx_EF,
307		&minx_cpu_device::minx_F0, &minx_cpu_device::minx_F1, &minx_cpu_device::minx_F2, &minx_cpu_device::minx_F3, &minx_cpu_device::minx_F4, &minx_cpu_device::minx_F5, &minx_cpu_device::minx_F6, &minx_cpu_device::minx_F7,
308		&minx_cpu_device::minx_F8, &minx_cpu_device::minx_F9, &minx_cpu_device::minx_FA, &minx_cpu_device::minx_FB, &minx_cpu_device::minx_FC, &minx_cpu_device::minx_FD, &minx_cpu_device::minx_FE, &minx_cpu_device::minx_FF
309		};
	503	case 0xF0: { INT8 d8 = rdop(); CALL( m_PC + d8 - 1 ); }
	504	break;
	505	case 0xF1: { INT8 d8 = rdop(); JMP( m_PC + d8 - 1 ); }
	506	break;
	507	case 0xF2: { UINT16 d16 = rdop16(); CALL( m_PC + d16 - 1 ); }
	508	break;
	509	case 0xF3: { UINT16 d16 = rdop16(); JMP( m_PC + d16 - 1 ); }
	510	break;
	511	case 0xF4: { JMP( m_HL ); }
	512	break;
	513	case 0xF5: { INT8 d8 = rdop(); m_BA = m_BA - 0x0100; if ( m_BA & 0xFF00 ) { JMP( m_PC + d8 - 1 ); } }
	514	break;
	515	case 0xF6: { m_BA = ( m_BA & 0xFF00 ) | ( ( m_BA & 0x00F0 ) >> 4 ) | ( ( m_BA & 0x000F ) << 4 ); }
	516	break;
	517	case 0xF7: { UINT8 d; AD1_IHL; d = RD( addr1 ); WR( addr1, ( ( d & 0xF0 ) >> 4 ) | ( ( d & 0x0F ) << 4 ) ); }
	518	break;
	519	case 0xF8: { m_PC = POP16(); m_V = POP8(); m_U = m_V; }
	520	break;
	521	case 0xF9: { m_F = POP8(); m_PC = POP16(); m_V = POP8(); m_U = m_V; }
	522	break;
	523	case 0xFA: { m_PC = POP16() + 2; m_V = POP8(); m_U = m_V; }
	524	break;
	525	case 0xFB: { AD1_I16; CALL( rd16( addr1 ) ); }
	526	break;
	527	case 0xFC: { UINT8 i = rdop() & 0xFE; CALL( rd16( i ) ); PUSH8( m_F ); }
	528	break;
	529	case 0xFD: { UINT8 i = rdop() & 0xFE; JMP( rd16( i ) ); /* PUSH8( m_F );?? */ }
	530	break;
	531	case 0xFE: { /* illegal operation? */ }
	532	break;
	533	case 0xFF: { }
	534	break;
	535	}
310	536
	537	m_icount -= insnminx_cycles[opcode];
	538	}
	539
	540
311	541	const int minx_cpu_device::insnminx_cycles[256] = {
312	542	8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
313	543	8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
r31251	r31252
329	559	8,  8,  8,  8,  8,  8,  8,  8, 12, 12, 12, 12, 12, 12, 12, 12,
330	560	20,  8, 24, 12,  8,  1,  8, 12,  8,  8,  8, 20, 20,  1,  1,  8
331	561	};
	562

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