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r31182 Friday 4th July, 2014 at 04:20:18 UTC by R. Belmont
sh2: fix and enable memory system bypass for SH-1 & SH-2 DRC. [R. Belmont]

nw: The speedup is only really gaudy on CPS-3 where the SH-2 is a major percentage of the frame time (800% -> 1250% unthrottled).  SKNS games that access spriteram a lot (cyvern) get a decent speedup as well.  Saturn/ST-V and Cool Riders are dominated by the rendering in profiles and get around 10% improvement depending on the game.
[src/emu/cpu/sh2]sh2drc.c
[src/mame/drivers]cps3.c stv.c suprnova.c
[src/mess/drivers]saturn.c

trunk/src/mame/drivers/suprnova.c
r31181r31182
946946{
947947   // init DRC to fastest options
948948   m_maincpu->sh2drc_set_options(SH2DRC_FASTEST_OPTIONS);
949   m_maincpu->sh2drc_add_fastram(0x02000000, 0x02003fff, 0, &m_spriteram[0]);
950   m_maincpu->sh2drc_add_fastram(0x02100000, 0x0210003f, 0, &m_spc_regs[0]);
951   m_maincpu->sh2drc_add_fastram(0x02600000, 0x02607fff, 0, &m_v3slc_ram[0]);
949952}
950953
951954void skns_state::set_drc_pcflush(UINT32 addr)
trunk/src/mame/drivers/stv.c
r31181r31182
393393   m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x00400000, 0x0040003f, read32_delegate(FUNC(stv_state::stv_ioga_r32),this), write32_delegate(FUNC(stv_state::stv_ioga_w32),this));
394394   m_slave->space(AS_PROGRAM).install_readwrite_handler(0x00400000, 0x0040003f, read32_delegate(FUNC(stv_state::stv_ioga_r32),this), write32_delegate(FUNC(stv_state::stv_ioga_w32),this));
395395
396   m_maincpu->sh2drc_add_fastram(0x00000000, 0x0007ffff, 1, &m_rom[0]);
397   m_maincpu->sh2drc_add_fastram(0x00200000, 0x002fffff, 0, &m_workram_l[0]);
398   m_maincpu->sh2drc_add_fastram(0x06000000, 0x060fffff, 0, &m_workram_h[0]);
399   m_slave->sh2drc_add_fastram(0x00000000, 0x0007ffff, 1, &m_rom[0]);
400   m_slave->sh2drc_add_fastram(0x00200000, 0x002fffff, 0, &m_workram_l[0]);
401   m_slave->sh2drc_add_fastram(0x06000000, 0x060fffff, 0, &m_workram_h[0]);
402
396403   m_vdp2.pal = 0;
397404}
398405
trunk/src/mame/drivers/cps3.c
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801801
802802   // set strict verify
803803   m_maincpu->sh2drc_set_options(SH2DRC_STRICT_VERIFY);
804   m_maincpu->sh2drc_add_fastram(0x02000000, 0x0207ffff, 0, &m_mainram[0]);
805   m_maincpu->sh2drc_add_fastram(0x04000000, 0x0407ffff, 0, &m_spriteram[0]);
806   m_maincpu->sh2drc_add_fastram(0x040C0020, 0x040C002b, 0, &m_tilemap20_regs_base[0]);
807   m_maincpu->sh2drc_add_fastram(0x040C0030, 0x040C003b, 0, &m_tilemap30_regs_base[0]);
804808
805809   cps3_decrypt_bios();
806810   m_decrypted_gamerom = auto_alloc_array(machine(), UINT32, 0x1000000/4);
trunk/src/emu/cpu/sh2/sh2drc.c
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934934
935935   UML_LABEL(block, label++);              // label:
936936
937#if 0   // DO NOT ENABLE - SEVERE AARON DAMAGE
938937   for (int ramnum = 0; ramnum < SH2_MAX_FASTRAM; ramnum++)
939938   {
940939      if (m_fastram[ramnum].base != NULL && (!iswrite || !m_fastram[ramnum].readonly))
r31181r31182
956955         {
957956            if (size == 1)
958957            {
959               UML_XOR(block, I0, I0, BYTE4_XOR_LE(0));
958               UML_XOR(block, I0, I0, BYTE4_XOR_BE(0));
960959               UML_LOAD(block, I0, fastbase, I0, SIZE_BYTE, SCALE_x1);             // load    i0,fastbase,i0,byte
961960            }
962961            else if (size == 2)
963962            {
964               UML_XOR(block, I0, I0, WORD_XOR_LE(0));
963               UML_XOR(block, I0, I0, WORD_XOR_BE(0));
965964               UML_LOAD(block, I0, fastbase, I0, SIZE_WORD, SCALE_x1);         // load    i0,fastbase,i0,word_x1
966965            }
967966            else if (size == 4)
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974973         {
975974            if (size == 1)
976975            {
977               UML_XOR(block, I0, I0, BYTE4_XOR_LE(0));
976               UML_XOR(block, I0, I0, BYTE4_XOR_BE(0));
978977               UML_STORE(block, fastbase, I0, I1, SIZE_BYTE, SCALE_x1);// store   fastbase,i0,i1,byte
979978            }
980979            else if (size == 2)
981980            {
982               UML_XOR(block, I0, I0, WORD_XOR_LE(0));
981               UML_XOR(block, I0, I0, WORD_XOR_BE(0));
983982               UML_STORE(block, fastbase, I0, I1, SIZE_WORD, SCALE_x1);// store   fastbase,i0,i1,word_x1
984983            }
985984            else if (size == 4)
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992991         UML_LABEL(block, skip);                                             // skip:
993992      }
994993   }
995#endif
996994
997995   if (iswrite)
998996   {
trunk/src/mess/drivers/saturn.c
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99    Many thanks to Guru, Fabien, Runik and Charles MacDonald for the help given.
1010
1111===================================================================================================
12
12
1313Notes:
1414-To enter into an Advanced Test Mode,keep pressed the Test Button (F2) on the start-up.
1515-Memo: Some tests done on the original & working PCB,to be implemented:
r31181r31182
809809   m_maincpu->sh2drc_set_options(SH2DRC_STRICT_VERIFY|SH2DRC_STRICT_PCREL);
810810   m_slave->sh2drc_set_options(SH2DRC_STRICT_VERIFY|SH2DRC_STRICT_PCREL);
811811
812   m_maincpu->sh2drc_add_fastram(0x00000000, 0x0007ffff, 1, &m_rom[0]);
813   m_maincpu->sh2drc_add_fastram(0x00200000, 0x002fffff, 0, &m_workram_l[0]);
814   m_maincpu->sh2drc_add_fastram(0x06000000, 0x060fffff, 0, &m_workram_h[0]);
815   m_slave->sh2drc_add_fastram(0x00000000, 0x0007ffff, 1, &m_rom[0]);
816   m_slave->sh2drc_add_fastram(0x00200000, 0x002fffff, 0, &m_workram_l[0]);
817   m_slave->sh2drc_add_fastram(0x06000000, 0x060fffff, 0, &m_workram_h[0]);
818
812819   /* amount of time to boost interleave for on MINIT / SINIT, needed for communication to work */
813820   m_minit_boost = 400;
814821   m_sinit_boost = 400;

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