Previous

199869 Revisions

Next

r31171 Thursday 3rd July, 2014 at 00:52:15 UTC by hap
use devcb instead of a fake memmap for tms7000 i/o ports

[src/emu/cpu/tms7000]	tms7000.c tms7000.h
[src/mess/drivers]	exelv.c

trunk/src/emu/cpu/tms7000/tms7000.c

r31170	r31171
25	25	*  This source implements the MC pin at Vss and mode bits in single chip mode.
26	26	*****************************************************************************/
27	27
28		#include "emu.h"
29	28	#include "debugger.h"
30	29	#include "tms7000.h"
31	30
r31170	r31171
73	72
74	73
75	74	tms7000_device::tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
76		: cpu_device(mconfig, TMS7000, "TMS7000", tag, owner, clock, "tms7000", __FILE__)
77		, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, ADDRESS_MAP_NAME(tms7000_mem))
78		, m_io_config("io", ENDIANNESS_BIG, 8, 8, 0)
79		, m_opcode(s_opfn)
	75	: cpu_device(mconfig, TMS7000, "TMS7000", tag, owner, clock, "tms7000", __FILE__),
	76	m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, ADDRESS_MAP_NAME(tms7000_mem)),
	77	m_opcode(s_opfn),
	78	m_inportsa(*this),
	79	m_inportsc(*this),
	80	m_inportsd(*this),
	81	m_outportsb(*this),
	82	m_outportsc(*this),
	83	m_outportsd(*this)
80	84	{
81	85	}
82	86
83	87	tms7000_device::tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, const opcode_func *opcode, const char *shortname, const char *source)
84		: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
85		, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal)
86		, m_io_config("io", ENDIANNESS_BIG, 8, 8, 0)
87		, m_opcode(opcode)
	88	: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
	89	m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal),
	90	m_opcode(opcode),
	91	m_inportsa(*this),
	92	m_inportsc(*this),
	93	m_inportsd(*this),
	94	m_outportsb(*this),
	95	m_outportsc(*this),
	96	m_outportsd(*this)
88	97	{
89	98	}
90	99
r31170	r31171
186	195	{
187	196	m_program = &space(AS_PROGRAM);
188	197	m_direct = &m_program->direct();
189		m_io = &space(AS_IO);
190	198
	199	// resolve callbacks
	200	m_inportsa.resolve_safe(0xff);
	201	m_inportsc.resolve_safe(0xff);
	202	m_inportsd.resolve_safe(0xff);
	203
	204	m_outportsb.resolve_safe();
	205	m_outportsc.resolve_safe();
	206	m_outportsd.resolve_safe();
	207
191	208	memset(m_pf, 0, 0x100);
192	209	m_cycles_per_INT2 = 0;
193	210	m_t1_capture_latch = 0;
r31170	r31171
475	492	break;
476	493
477	494	case 0x06: /* Port B write */
478		m_io->write_byte( TMS7000_PORTB, data );
	495	m_outportsb(data);
479	496	m_pf[ 0x06 ] = data;
480	497	break;
481	498
482	499	case 0x08: /* Port C write */
483	500	temp1 = data & m_pf[ 0x09 ];    /* Mask off input bits */
484		m_io->write_byte( TMS7000_PORTC, temp1 );
	501	m_outportsc(temp1);
485	502	m_pf[ 0x08 ] = temp1;
486	503	break;
487	504
488	505	case 0x0a: /* Port D write */
489	506	temp1 = data & m_pf[ 0x0b ];    /* Mask off input bits */
490		m_io->write_byte( TMS7000_PORTD, temp1 );
	507	m_outportsd(temp1);
491	508	m_pf[ 0x0a ] = temp1;
492	509	break;
493	510
r31170	r31171
522	539	break;
523	540
524	541	case 0x04: /* Port A read */
525		result = m_io->read_byte( TMS7000_PORTA );
	542	result = m_inportsa();
526	543	break;
527	544
528	545
r31170	r31171
533	550
534	551	case 0x08: /* Port C read */
535	552	temp1 = m_pf[ 0x08 ] & m_pf[ 0x09 ];    /* Get previous output bits */
536		temp2 = m_io->read_byte( TMS7000_PORTC );           /* Read port */
	553	temp2 = m_inportsc();           /* Read port */
537	554	temp3 = temp2 & (~m_pf[ 0x09 ]);                /* Mask off output bits */
538	555	result = temp1 | temp3;                             /* OR together */
539	556	break;
540	557
541	558	case 0x0a: /* Port D read */
542	559	temp1 = m_pf[ 0x0a ] & m_pf[ 0x0b ];    /* Get previous output bits */
543		temp2 = m_io->read_byte( TMS7000_PORTD );           /* Read port */
	560	temp2 = m_inportsd();           /* Read port */
544	561	temp3 = temp2 & (~m_pf[ 0x0b ]);                /* Mask off output bits */
545	562	result = temp1 | temp3;                             /* OR together */
546	563	break;

trunk/src/emu/cpu/tms7000/tms7000.h

r31170	r31171
22	22	#ifndef __TMS7000_H__
23	23	#define __TMS7000_H__
24	24
	25	#include "emu.h"
25	26
26	27	enum { TMS7000_PC=1, TMS7000_SP, TMS7000_ST, TMS7000_IDLE, TMS7000_T1_CL, TMS7000_T1_PS, TMS7000_T1_DEC };
27	28
r31170	r31171
33	34	TMS7000_IRQNONE = 255
34	35	};
35	36
36		enum
37		{
38		TMS7000_PORTA = 0,
39		TMS7000_PORTB,
40		TMS7000_PORTC,
41		TMS7000_PORTD
42		};
43	37
	38	/***************************************************************************
	39	DEVICE CONFIGURATION MACROS
	40	***************************************************************************/
44	41
	42	// I/O callbacks
	43
	44	// (port A is read-only)
	45	#define MCFG_TMS7000_PORTA_READ_CB(_devcb) \
	46	devcb = &tms7000_device::set_inportsa_cb(*device, DEVCB_##_devcb);
	47
	48	#define MCFG_TMS7000_PORTC_READ_CB(_devcb) \
	49	devcb = &tms7000_device::set_inportsc_cb(*device, DEVCB_##_devcb);
	50
	51	#define MCFG_TMS7000_PORTD_READ_CB(_devcb) \
	52	devcb = &tms7000_device::set_inportsd_cb(*device, DEVCB_##_devcb);
	53
	54	// (port B is write-only)
	55	#define MCFG_TMS7000_PORTB_WRITE_CB(_devcb) \
	56	devcb = &tms7000_device::set_outportsb_cb(*device, DEVCB_##_devcb);
	57
	58	#define MCFG_TMS7000_PORTC_WRITE_CB(_devcb) \
	59	devcb = &tms7000_device::set_outportsc_cb(*device, DEVCB_##_devcb);
	60
	61	#define MCFG_TMS7000_PORTD_WRITE_CB(_devcb) \
	62	devcb = &tms7000_device::set_outportsd_cb(*device, DEVCB_##_devcb);
	63
	64
	65	/***************************************************************************
	66	TYPE DEFINITIONS
	67	***************************************************************************/
	68
45	69	class tms7000_device : public cpu_device
46	70	{
47	71	public:
r31170	r31171
53	77	tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
54	78	tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, const opcode_func *opcode, const char *shortname, const char *source);
55	79
	80	// static configuration helpers
	81	template<class _Object> static devcb_base & set_inportsa_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_inportsa.set_callback(object); }
	82	template<class _Object> static devcb_base & set_inportsc_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_inportsc.set_callback(object); }
	83	template<class _Object> static devcb_base & set_inportsd_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_inportsd.set_callback(object); }
	84
	85	template<class _Object> static devcb_base & set_outportsb_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_outportsb.set_callback(object); }
	86	template<class _Object> static devcb_base & set_outportsc_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_outportsc.set_callback(object); }
	87	template<class _Object> static devcb_base & set_outportsd_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_outportsd.set_callback(object); }
	88
56	89	DECLARE_WRITE8_MEMBER( tms70x0_pf_w );
57	90	DECLARE_READ8_MEMBER( tms70x0_pf_r );
58	91
r31170	r31171
69	102	virtual void execute_set_input(int inputnum, int state);
70	103
71	104	// device_memory_interface overrides
72		virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
	105	virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; }
73	106
74	107	// device_state_interface overrides
75	108	void state_string_export(const device_state_entry &entry, astring &string);
r31170	r31171
81	114
82	115	private:
83	116	address_space_config m_program_config;
84		address_space_config m_io_config;
85	117
86	118	const opcode_func *m_opcode;
87	119
r31170	r31171
104	136
105	137	address_space *m_program;
106	138	direct_read_data *m_direct;
107		address_space *m_io;
108	139
	140	// callbacks
	141	devcb_read8 m_inportsa;
	142	devcb_read8 m_inportsc;
	143	devcb_read8 m_inportsd;
	144
	145	devcb_write8 m_outportsb;
	146	devcb_write8 m_outportsc;
	147	devcb_write8 m_outportsd;
	148
	149	/////////////////////////////////////////////////////////
	150
109	151	inline UINT16 RM16( UINT32 mAddr );
110	152	inline UINT16 RRF16( UINT32 mAddr );
111	153	inline void WRF16( UINT32 mAddr, PAIR p );

trunk/src/mess/drivers/exelv.c

r31170	r31171
78	78	DECLARE_READ8_MEMBER( mailbox_wx319_r );
79	79	DECLARE_WRITE8_MEMBER( mailbox_wx318_w );
80	80	DECLARE_READ8_MEMBER( tms7020_porta_r );
81		DECLARE_WRITE8_MEMBER( tms7020_porta_w );
82		DECLARE_READ8_MEMBER( tms7020_portb_r );
83	81	DECLARE_WRITE8_MEMBER( tms7020_portb_w );
84	82	DECLARE_READ8_MEMBER( tms7041_porta_r );
85		DECLARE_WRITE8_MEMBER( tms7041_porta_w );
86		DECLARE_READ8_MEMBER( tms7041_portb_r );
87	83	DECLARE_WRITE8_MEMBER( tms7041_portb_w );
88	84	DECLARE_READ8_MEMBER( tms7041_portc_r );
89	85	DECLARE_WRITE8_MEMBER( tms7041_portc_w );
r31170	r31171
91	87	DECLARE_WRITE8_MEMBER( tms7041_portd_w );
92	88
93	89	/* tms7020 i/o ports */
94		UINT8   m_tms7020_porta;
95	90	UINT8   m_tms7020_portb;
96	91
97	92	/* tms7041 i/o ports */
98		UINT8   m_tms7041_porta;
99	93	UINT8   m_tms7041_portb;
100	94	UINT8   m_tms7041_portc;
101	95	UINT8   m_tms7041_portd;
r31170	r31171
259	253	}
260	254
261	255
262		WRITE8_MEMBER(exelv_state::tms7020_porta_w)
263		{
264		logerror("tms7020_porta_w: data = 0x%02x\n", data);
265		m_tms7020_porta = data;
266		}
267
268
269	256	/*
270	257	TMS7020 PORT B
271	258	B0 - W - TMS7041 port A bit 2 (REV2)
r31170	r31171
277	264	B6 -
278	265	B7 -
279	266	*/
280		READ8_MEMBER(exelv_state::tms7020_portb_r)
281		{
282		logerror("tms7020_portb_r\n");
283		return 0x00;
284		}
285
286
287	267	WRITE8_MEMBER(exelv_state::tms7020_portb_w)
288	268	{
289	269	logerror("tms7020_portb_w: data = 0x%02x\n", data);
r31170	r31171
326	306	}
327	307
328	308
329		WRITE8_MEMBER(exelv_state::tms7041_porta_w)
330		{
331		logerror("tms7041_porta_w: data = 0x%02x\n", data);
332		m_tms7041_porta = data;
333		}
334
335
336	309	/*
337	310	TMS7041 PORT B
338	311	B0 - W - TMS5220 W
r31170	r31171
344	317	B6 - W - REV6 WX319-11
345	318	B7 - W - TMS7020 port A bit 0 (REV3)
346	319	*/
347		READ8_MEMBER(exelv_state::tms7041_portb_r)
348		{
349		UINT8 data = 0xff;
350		logerror("tms7041_portb_r\n");
351		return data;
352		}
353
354
355	320	WRITE8_MEMBER(exelv_state::tms7041_portb_w)
356	321	{
357	322	logerror("tms7041_portb_w: data = 0x%02x\n", data);
r31170	r31171
465	430	ADDRESS_MAP_END
466	431
467	432
468		static ADDRESS_MAP_START(tms7020_port, AS_IO, 8, exelv_state)
469		AM_RANGE(TMS7000_PORTA, TMS7000_PORTA) AM_READWRITE(tms7020_porta_r, tms7020_porta_w)
470		AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_READWRITE(tms7020_portb_r, tms7020_portb_w)
471		ADDRESS_MAP_END
472
473
474	433	static ADDRESS_MAP_START(tms7041_map, AS_PROGRAM, 8, exelv_state)
475	434	AM_RANGE(0x0080, 0x00ff) AM_RAM
476	435	ADDRESS_MAP_END
477	436
478	437
479		static ADDRESS_MAP_START(tms7041_port, AS_IO, 8, exelv_state)
480		AM_RANGE(TMS7000_PORTA, TMS7000_PORTA)  AM_READWRITE(tms7041_porta_r, tms7041_porta_w)
481		AM_RANGE(TMS7000_PORTB, TMS7000_PORTB)  AM_READWRITE(tms7041_portb_r, tms7041_portb_w)
482		AM_RANGE(TMS7000_PORTC, TMS7000_PORTC)  AM_READWRITE(tms7041_portc_r, tms7041_portc_w)
483		AM_RANGE(TMS7000_PORTD, TMS7000_PORTD)  AM_READWRITE(tms7041_portd_r, tms7041_portd_w)
484		ADDRESS_MAP_END
485
486
487	438	static ADDRESS_MAP_START(tms7040_mem, AS_PROGRAM, 8, exelv_state)
488	439	AM_RANGE(0x0080, 0x00ff) AM_NOP
489	440	AM_RANGE(0x0124, 0x0124) AM_DEVREAD("tms3556", tms3556_device, vram_r)
r31170	r31171
536	487	membank("bank1")->set_entry(0);
537	488
538	489	/* register for state saving */
539		save_item(NAME(m_tms7020_porta));
540	490	save_item(NAME(m_tms7020_portb));
541		save_item(NAME(m_tms7041_porta));
542	491	save_item(NAME(m_tms7041_portb));
543	492	save_item(NAME(m_tms7041_portc));
544	493	save_item(NAME(m_tms7041_portd));
r31170	r31171
547	496	}
548	497
549	498	static MACHINE_CONFIG_START( exl100, exelv_state )
	499
550	500	/* basic machine hardware */
551	501	MCFG_CPU_ADD("maincpu", TMS7020_EXL, XTAL_4_9152MHz)
552	502	MCFG_CPU_PROGRAM_MAP(tms7020_mem)
553		MCFG_CPU_IO_MAP(tms7020_port)
	503	MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7020_porta_r))
	504	MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7020_portb_w))
554	505	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", exelv_state, exelv_hblank_interrupt, "screen", 0, 1)
555	506
556	507	MCFG_CPU_ADD("tms7041", TMS7040, XTAL_4_9152MHz) // should be TMS7041
557	508	MCFG_CPU_PROGRAM_MAP(tms7041_map)
558		MCFG_CPU_IO_MAP(tms7041_port)
	509	MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7041_porta_r))
	510	MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7041_portb_w))
	511	MCFG_TMS7000_PORTC_READ_CB(READ8(exelv_state, tms7041_portc_r))
	512	MCFG_TMS7000_PORTC_WRITE_CB(WRITE8(exelv_state, tms7041_portc_w))
	513	MCFG_TMS7000_PORTD_READ_CB(READ8(exelv_state, tms7041_portd_r))
	514	MCFG_TMS7000_PORTD_WRITE_CB(WRITE8(exelv_state, tms7041_portd_w))
559	515
560	516	MCFG_QUANTUM_PERFECT_CPU("maincpu")
561	517
r31170	r31171
598	554
599	555
600	556	static MACHINE_CONFIG_START( exeltel, exelv_state )
	557
601	558	/* basic machine hardware */
602	559	MCFG_CPU_ADD("maincpu", TMS7040, XTAL_4_9152MHz)
603	560	MCFG_CPU_PROGRAM_MAP(tms7040_mem)
604		MCFG_CPU_IO_MAP(tms7020_port)
	561	MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7020_porta_r))
	562	MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7020_portb_w))
605	563	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", exelv_state, exelv_hblank_interrupt, "screen", 0, 1)
606	564
607	565	MCFG_CPU_ADD("tms7042", TMS7040, XTAL_4_9152MHz) // should be TMS7042
608	566	MCFG_CPU_PROGRAM_MAP(tms7042_map)
609		MCFG_CPU_IO_MAP(tms7041_port)
	567	MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7041_porta_r))
	568	MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7041_portb_w))
	569	MCFG_TMS7000_PORTC_READ_CB(READ8(exelv_state, tms7041_portc_r))
	570	MCFG_TMS7000_PORTC_WRITE_CB(WRITE8(exelv_state, tms7041_portc_w))
	571	MCFG_TMS7000_PORTD_READ_CB(READ8(exelv_state, tms7041_portd_r))
	572	MCFG_TMS7000_PORTD_WRITE_CB(WRITE8(exelv_state, tms7041_portd_w))
610	573
611	574	MCFG_QUANTUM_PERFECT_CPU("maincpu")
612	575

Previous

199869 Revisions

Next

---

© 1997-2024 The MAME Team