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| r31152 Tuesday 1st July, 2014 at 07:55:38 UTC by Alex Jackson |
|---|
| Add width and endianness attributes to data areas in software lists (nw) Update neogeo.xml to take advantage of them. For regular rom loading we try to autodetect the appropriate endianness and width by matching the region tag to a device with a device_memory_interface; this is generally not doable for software lists because the regions are children of some slot device and thus not siblings of the devices in the root driver (i.e. "cartslot1:maincpu" rather than "maincpu") So you have to specify the width and endianness manually for now. Anyone who has spare time, feel welcome to byteswap every single entry in megadriv.xml and update them to use this :-) |
| [hash] | neogeo.xml |
| [src/emu] | softlist.c |
| [src/emu/bus/neogeo] | neogeo_slot.c |
| r31151 | r31152 | |
|---|---|---|
| 37 | 37 | <sharedfeat name="release" value="MVS,AES" /> |
| 38 | 38 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 39 | 39 | <part name="cart" interface="neo_cart"> |
| 40 | <dataarea name="maincpu" size="0x100000"> | |
| 40 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 41 | 41 | <rom loadflag="load16_word_swap" name="001-p1.p1" offset="0x000000" size="0x080000" crc="cc9fc951" sha1="92f4e6ddeeb825077d92dbb70b50afea985f15c0" /> |
| 42 | 42 | <!-- MB834200 --> |
| 43 | 43 | </dataarea> |
| r31151 | r31152 | |
| 97 | 97 | <sharedfeat name="release" value="MVS" /> |
| 98 | 98 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 99 | 99 | <part name="cart" interface="neo_cart"> |
| 100 | <dataarea name="maincpu" size="0x100000"> | |
| 100 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 101 | 101 | <rom loadflag="load16_word_swap" name="002-pg.p1" offset="0x000000" size="0x080000" crc="c100b5f5" sha1="4cea9f29ad67288c3eccfa4cf961ee9782e49165" /> |
| 102 | 102 | <!-- MB834200 --> |
| 103 | 103 | </dataarea> |
| r31151 | r31152 | |
| 148 | 148 | <sharedfeat name="release" value="AES" /> |
| 149 | 149 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 150 | 150 | <part name="cart" interface="neo_cart"> |
| 151 | <dataarea name="maincpu" size="0x100000"> | |
| 151 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 152 | 152 | <rom loadflag="load16_word_swap" name="002-p1.p1" offset="0x000000" size="0x080000" crc="3bc7790e" sha1="50b2fffb1278151bb4849fbe1f8cb23916019815" /> |
| 153 | 153 | <!-- MB834200 --> |
| 154 | 154 | </dataarea> |
| r31151 | r31152 | |
| 207 | 207 | <sharedfeat name="release" value="MVS,AES" /> |
| 208 | 208 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 209 | 209 | <part name="cart" interface="neo_cart"> |
| 210 | <dataarea name="maincpu" size="0x100000"> | |
| 210 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 211 | 211 | <rom loadflag="load16_word_swap" name="003-p1.p1" offset="0x000000" size="0x080000" crc="f75549ba" sha1="3f7bdf5e2964e921fe1dd87c51a79a1a501fc73f" /> |
| 212 | 212 | <!-- TC534200 --> |
| 213 | 213 | <rom loadflag="load16_word_swap" name="003-p2.p2" offset="0x080000" size="0x080000" crc="b7809a8f" sha1="1604c889592c9610668bff296de48a0d6906156d" /> |
| r31151 | r31152 | |
| 274 | 274 | <sharedfeat name="release" value="MVS,AES" /> |
| 275 | 275 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 276 | 276 | <part name="cart" interface="neo_cart"> |
| 277 | <dataarea name="maincpu" size="0x100000"> | |
| 277 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 278 | 278 | <rom loadflag="load16_word_swap" name="004-p1.p1" offset="0x000000" size="0x080000" crc="fc6f53db" sha1="64a62ca4c8fb68954e06121399c9402278bd0467" /> |
| 279 | 279 | <!-- TC534200 --> |
| 280 | 280 | </dataarea> |
| r31151 | r31152 | |
| 329 | 329 | <sharedfeat name="release" value="MVS" /> |
| 330 | 330 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 331 | 331 | <part name="cart" interface="neo_cart"> |
| 332 | <dataarea name="maincpu" size="0x100000"> | |
| 332 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 333 | 333 | <rom loadflag="load16_word_swap" name="005-pg1.p1" offset="0x000000" size="0x080000" crc="bd0a492d" sha1="d043d3710cf2b0d2b3798008e65e4c7c3ead1af3" /> |
| 334 | 334 | <!-- MB834200 --> |
| 335 | 335 | </dataarea> |
| r31151 | r31152 | |
| 376 | 376 | <sharedfeat name="release" value="AES" /> |
| 377 | 377 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 378 | 378 | <part name="cart" interface="neo_cart"> |
| 379 | <dataarea name="maincpu" size="0x100000"> | |
| 379 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 380 | 380 | <rom loadflag="load16_word_swap" name="005-p1.p1" offset="0x000000" size="0x080000" crc="599043c5" sha1="43f234b0f89b72b4c6050c40d9daa5c4e96b94ce" /> |
| 381 | 381 | <!-- MB834200 --> |
| 382 | 382 | </dataarea> |
| r31151 | r31152 | |
| 431 | 431 | <sharedfeat name="release" value="MVS,AES" /> |
| 432 | 432 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 433 | 433 | <part name="cart" interface="neo_cart"> |
| 434 | <dataarea name="maincpu" size="0x100000"> | |
| 434 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 435 | 435 | <rom loadflag="load16_word_swap" name="006-p1.p1" offset="0x000000" size="0x080000" crc="d4aaf597" sha1="34d35b71adb5bd06f4f1b50ffd9c58ab9c440a84" /> |
| 436 | 436 | <!-- MB834200 --> |
| 437 | 437 | </dataarea> |
| r31151 | r31152 | |
| 483 | 483 | <sharedfeat name="release" value="unknown" /> |
| 484 | 484 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 485 | 485 | <part name="cart" interface="neo_cart"> |
| 486 | <dataarea name="maincpu" size="0x100000"> | |
| 486 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 487 | 487 | <rom loadflag="load16_word_swap" name="006-pg1.p1" offset="0x000000" size="0x080000" status="baddump" crc="52445646" sha1="647bb31f2f68453c1366cb6e2e867e37d1df7a54" /> |
| 488 | 488 | <!-- Chip label p1h does not exist, renamed temporarly to pg1, marked BAD_DUMP. This needs to be verified. --> |
| 489 | 489 | </dataarea> |
| r31151 | r31152 | |
| 544 | 544 | <sharedfeat name="release" value="MVS,AES" /> |
| 545 | 545 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 546 | 546 | <part name="cart" interface="neo_cart"> |
| 547 | <dataarea name="maincpu" size="0x100000"> | |
| 547 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 548 | 548 | <rom loadflag="load16_word_swap" name="007-p1.p1" offset="0x000000" size="0x080000" crc="5b266f47" sha1="8afbf995989f47ad93fea1f31a884afc7228b53a" /> |
| 549 | 549 | <!-- TC534200 --> |
| 550 | 550 | <rom loadflag="load16_word_swap" name="007-p2.p2" offset="0x080000" size="0x020000" crc="eb9c1044" sha1="65d3416dcd96663bc4e7cefe90ecb7c1eafb2dda" /> |
| r31151 | r31152 | |
| 584 | 584 | <sharedfeat name="release" value="MVS" /> |
| 585 | 585 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 586 | 586 | <part name="cart" interface="neo_cart"> |
| 587 | <dataarea name="maincpu" size="0x100000"> | |
| 587 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 588 | 588 | <rom loadflag="load16_byte" name="proto_007-p1.p1" offset="0x000001" size="0x080000" crc="c763e52a" sha1="b24acbac255c5ee1a2e92e77cdde6620a24081cf" /> |
| 589 | 589 | <rom loadflag="load16_byte" name="proto_007-p2.p2" offset="0x000000" size="0x080000" crc="7a0b435c" sha1="40e6f42a92001d9f4e51898dd7489da143b6b74b" /> |
| 590 | 590 | </dataarea> |
| r31151 | r31152 | |
| 637 | 637 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 638 | 638 | <part name="cart" interface="neo_cart"> |
| 639 | 639 | <!-- MVS VERSION --> |
| 640 | <dataarea name="maincpu" size="0x100000"> | |
| 640 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 641 | 641 | <rom loadflag="load16_word_swap" name="009-p1.p1" offset="0x000000" size="0x080000" crc="b45fcfbf" sha1="3872147dda2d1ba905d35f4571065d87b1958b4a" /> |
| 642 | 642 | <!-- TC534200 --> |
| 643 | 643 | </dataarea> |
| r31151 | r31152 | |
| 686 | 686 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 687 | 687 | <part name="cart" interface="neo_cart"> |
| 688 | 688 | <!-- AES VERSION --> |
| 689 | <dataarea name="maincpu" size="0x100000"> | |
| 689 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 690 | 690 | <rom loadflag="load16_word_swap" name="009-pg1.p1" offset="0x000000" size="0x080000" crc="8e9f0add" sha1="d0b908a86a58f2537eea73a431038f1cd74a5a2f" /> |
| 691 | 691 | <!-- TC534200 --> |
| 692 | 692 | </dataarea> |
| r31151 | r31152 | |
| 742 | 742 | <!-- Unknown if it was also released on AES --> |
| 743 | 743 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 744 | 744 | <part name="cart" interface="neo_cart"> |
| 745 | <dataarea name="maincpu" size="0x100000"> | |
| 745 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 746 | 746 | <rom loadflag="load16_word_swap" name="010-p1.p1" offset="0x000000" size="0x080000" crc="69a6b42d" sha1="6e7cb089de83f1d22cc4a87db5b1a94bf76fb1e8" /> |
| 747 | 747 | <!-- TC534200 --> |
| 748 | 748 | </dataarea> |
| r31151 | r31152 | |
| 801 | 801 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 802 | 802 | <part name="cart" interface="neo_cart"> |
| 803 | 803 | <!-- MVS AND AES VERSION --> |
| 804 | <dataarea name="maincpu" size="0x100000"> | |
| 804 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 805 | 805 | <rom loadflag="load16_word_swap" name="011-p1.p1" offset="0x000000" size="0x080000" crc="c7f944b5" sha1="da7560e09187c68f1d9f7656218497b4464c56c9" /> |
| 806 | 806 | <!-- MB834200 --> |
| 807 | 807 | <rom loadflag="load16_word_swap" name="sp2.p2" offset="0x080000" size="0x020000" crc="811a4faf" sha1="8169dfaf79f52d80ecec402ce1b1ab9cafb7ebdd" /> |
| r31151 | r31152 | |
| 864 | 864 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 865 | 865 | <part name="cart" interface="neo_cart"> |
| 866 | 866 | <!-- MVS AND AES VERSION --> |
| 867 | <dataarea name="maincpu" size="0x100000"> | |
| 867 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 868 | 868 | <rom loadflag="load16_word_swap" name="014-p1.p1" offset="0x000000" size="0x080000" crc="6f1699c8" sha1="87206f67a619dede7959230f9ff3701b8b78957a" /> |
| 869 | 869 | <!-- CXK384500 --> |
| 870 | 870 | </dataarea> |
| r31151 | r31152 | |
| 917 | 917 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 918 | 918 | <part name="cart" interface="neo_cart"> |
| 919 | 919 | <!-- MVS VERSION --> |
| 920 | <dataarea name="maincpu" size="0x100000"> | |
| 920 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 921 | 921 | <rom loadflag="load16_word_swap" name="016-p1.p1" offset="0x000000" size="0x080000" crc="1b818731" sha1="b98b1b33c0301fd79aac908f6b635dd00d1cb08d" /> |
| 922 | 922 | <!-- TC534200 --> |
| 923 | 923 | <rom loadflag="load16_word_swap" name="016-p2.p2" offset="0x080000" size="0x020000" crc="12afdc2b" sha1="3a95f5910cbb9f17e63ddece995c6e120fa2f622" /> |
| r31151 | r31152 | |
| 958 | 958 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 959 | 959 | <part name="cart" interface="neo_cart"> |
| 960 | 960 | <!-- AES VERSION --> |
| 961 | <dataarea name="maincpu" size="0x100000"> | |
| 961 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 962 | 962 | <rom loadflag="load16_word_swap" name="016-hp1.p1" offset="0x080000" size="0x080000" crc="b774621e" sha1="7684b2e07163aec68cd083ef1d8900f855f6cb42" /> |
| 963 | 963 | <!-- TC534200 --> |
| 964 | 964 | <rom loadflag="load16_word_swap" name="016-p2.p2" offset="0x080000" size="0x020000" crc="12afdc2b" sha1="3a95f5910cbb9f17e63ddece995c6e120fa2f622" /> |
| r31151 | r31152 | |
| 1007 | 1007 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1008 | 1008 | <part name="cart" interface="neo_cart"> |
| 1009 | 1009 | <!-- MVS AND AES VERSION --> |
| 1010 | <dataarea name="maincpu" size="0x100000"> | |
| 1010 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1011 | 1011 | <rom loadflag="load16_word_swap" name="017-p1.p1" offset="0x000000" size="0x080000" crc="f8a63983" sha1="7a10ecb2f0fd8315641374c065d2602107b09e72" /> |
| 1012 | 1012 | <!-- TC534200 --> |
| 1013 | 1013 | <rom loadflag="load16_word_swap" name="017-p2.p2" offset="0x080000" size="0x020000" crc="3024bbb3" sha1="88892e1292dd60f35a76f9a22e623d4f0f9693cc" /> |
| r31151 | r31152 | |
| 1048 | 1048 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1049 | 1049 | <part name="cart" interface="neo_cart"> |
| 1050 | 1050 | <!-- AES VERSION (US) --> |
| 1051 | <dataarea name="maincpu" size="0x100000"> | |
| 1051 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1052 | 1052 | <rom loadflag="load16_word_swap" name="017-hp1.p1" offset="0x000000" size="0x080000" crc="33eccae0" sha1="000ccf9a9c73df75eeba3f2c367c3a1a9e0a3a6b" /> |
| 1053 | 1053 | <!-- TC534200 --> |
| 1054 | 1054 | <rom loadflag="load16_word_swap" name="017-p2.p2" offset="0x080000" size="0x020000" crc="3024bbb3" sha1="88892e1292dd60f35a76f9a22e623d4f0f9693cc" /> |
| r31151 | r31152 | |
| 1099 | 1099 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1100 | 1100 | <part name="cart" interface="neo_cart"> |
| 1101 | 1101 | <!-- MVS AND AES VERSION --> |
| 1102 | <dataarea name="maincpu" size="0x100000"> | |
| 1102 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1103 | 1103 | <rom loadflag="load16_word_swap" name="018-p1.p1" offset="0x000000" size="0x080000" crc="4092c8db" sha1="df194a4ad2c35e0e18bc053ff9284183444a4666" /> |
| 1104 | 1104 | <!-- HN62434 --> |
| 1105 | 1105 | </dataarea> |
| r31151 | r31152 | |
| 1138 | 1138 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1139 | 1139 | <part name="cart" interface="neo_cart"> |
| 1140 | 1140 | <!-- AES VERSION (US) --> |
| 1141 | <dataarea name="maincpu" size="0x100000"> | |
| 1141 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1142 | 1142 | <rom loadflag="load16_word_swap" name="018-hp1.p1" offset="0x000000" size="0x080000" crc="ddffcbf4" sha1="c646c4bbdb4e9b32df76c90f582ccd69fcc9f8e7" /> |
| 1143 | 1143 | <!-- HN62434 --> |
| 1144 | 1144 | </dataarea> |
| r31151 | r31152 | |
| 1177 | 1177 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1178 | 1178 | <part name="cart" interface="neo_cart"> |
| 1179 | 1179 | <!-- early prototype - all roms were hand labeled with CRCs, dumps verified against them --> |
| 1180 | <dataarea name="maincpu" size="0x100000"> | |
| 1180 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1181 | 1181 | <rom loadflag="load16_byte" name="proto_018-p1.p1" offset="0x000001" size="0x080000" crc="5b4032e7" sha1="55df91dad6f484d3d49c28ab5972700bf71a8662" /> |
| 1182 | 1182 | <rom loadflag="load16_byte" name="proto_018-p2.p2" offset="0x000000" size="0x080000" crc="78762f68" sha1="12170fc6efe75cb5d32624033d3d341032c97548" /> |
| 1183 | 1183 | </dataarea> |
| r31151 | r31152 | |
| 1224 | 1224 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1225 | 1225 | <part name="cart" interface="neo_cart"> |
| 1226 | 1226 | <!-- MVS AND AES VERSION --> |
| 1227 | <dataarea name="maincpu" size="0x100000"> | |
| 1227 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1228 | 1228 | <rom loadflag="load16_word_swap" name="019-p1.p1" offset="0x000000" size="0x080000" crc="a2de8445" sha1="893d7ae72b4644123469de143fa35fac1cbcd61e" /> |
| 1229 | 1229 | <!-- TC534200 --> |
| 1230 | 1230 | </dataarea> |
| r31151 | r31152 | |
| 1275 | 1275 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1276 | 1276 | <part name="cart" interface="neo_cart"> |
| 1277 | 1277 | <!-- MVS AND AES VERSION --> |
| 1278 | <dataarea name="maincpu" size="0x100000"> | |
| 1278 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1279 | 1279 | <rom loadflag="load16_word_swap" name="020-p1.p1" offset="0x000000" size="0x080000" crc="e6f2fe64" sha1="50ab82517e077727d97668a4df2b9b96d2e78ab6" /> |
| 1280 | 1280 | <!-- TC534200 --> |
| 1281 | 1281 | <rom loadflag="load16_word_swap" name="020-p2.p2" offset="0x080000" size="0x020000" crc="edcb22ac" sha1="505d2db38ae999b7d436e8f2ff56b81796d62b54" /> |
| r31151 | r31152 | |
| 1320 | 1320 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1321 | 1321 | <part name="cart" interface="neo_cart"> |
| 1322 | 1322 | <!-- AES VERSION (US) --> |
| 1323 | <dataarea name="maincpu" size="0x100000"> | |
| 1323 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1324 | 1324 | <rom loadflag="load16_word_swap" name="020-hp1.p1" offset="0x000000" size="0x080000" crc="7cdb01ce" sha1="32cae2ddf5e26fb7e8a09132e600220db82df3b8" /> |
| 1325 | 1325 | <!-- TC534200 --> |
| 1326 | 1326 | <rom loadflag="load16_word_swap" name="020-p2.p2" offset="0x080000" size="0x020000" crc="edcb22ac" sha1="505d2db38ae999b7d436e8f2ff56b81796d62b54" /> |
| r31151 | r31152 | |
| 1373 | 1373 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1374 | 1374 | <part name="cart" interface="neo_cart"> |
| 1375 | 1375 | <!-- MVS AND AES VERSION --> |
| 1376 | <dataarea name="maincpu" size="0x100000"> | |
| 1376 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1377 | 1377 | <rom loadflag="load16_word_swap" name="021-p1.p1" offset="0x000000" size="0x080000" crc="39c3478f" sha1="06ebe54c9c4e14c5c31e770013d58b7162359ecc" /> |
| 1378 | 1378 | <!-- MB834200 --> |
| 1379 | 1379 | </dataarea> |
| r31151 | r31152 | |
| 1418 | 1418 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1419 | 1419 | <part name="cart" interface="neo_cart"> |
| 1420 | 1420 | <!-- MVS AND AES VERSION --> |
| 1421 | <dataarea name="maincpu" size="0x100000"> | |
| 1421 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1422 | 1422 | <rom loadflag="load16_word_swap" name="022-p1.p1" offset="0x000000" size="0x100000" crc="6a2f6d4a" sha1="b8ca548e56f1c7abcdce415ba7329e0cf698ee13" /> |
| 1423 | 1423 | <!-- TC538200 --> |
| 1424 | 1424 | </dataarea> |
| r31151 | r31152 | |
| 1465 | 1465 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1466 | 1466 | <part name="cart" interface="neo_cart"> |
| 1467 | 1467 | <!-- MVS AND AES VERSION --> |
| 1468 | <dataarea name="maincpu" size="0x100000"> | |
| 1468 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1469 | 1469 | <rom loadflag="load16_word_swap" name="023-p1.p1" offset="0x000000" size="0x100000" crc="c488fda3" sha1="4cdf2f1837fffd720efef42f81f933bdf2ef1402" /> |
| 1470 | 1470 | <!-- TC538200 --> |
| 1471 | 1471 | </dataarea> |
| r31151 | r31152 | |
| 1499 | 1499 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1500 | 1500 | <part name="cart" interface="neo_cart"> |
| 1501 | 1501 | <!-- KOREAN VERSION --> |
| 1502 | <dataarea name="maincpu" size="0x100000"> | |
| 1502 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1503 | 1503 | <rom loadflag="load16_word_swap" name="123-p1.p1" offset="0x000000" size="0x100000" crc="a6f35eae" sha1="edd3fd5ba8eae2231e2b0a6605fa00e5c6de094a" /> |
| 1504 | 1504 | </dataarea> |
| 1505 | 1505 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
| 1532 | 1532 | <sharedfeat name="release" value="MVS,AES" /> |
| 1533 | 1533 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1534 | 1534 | <part name="cart" interface="neo_cart"> |
| 1535 | <dataarea name="maincpu" size="0x100000"> | |
| 1535 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1536 | 1536 | <rom loadflag="load16_word_swap" name="024-p1.p1" offset="0x000000" size="0x080000" crc="89c4ab97" sha1="3a1817c427185ea1b44fe52f009c00b0a9007c85" /> |
| 1537 | 1537 | <!-- TC534200 --> |
| 1538 | 1538 | </dataarea> |
| r31151 | r31152 | |
| 1579 | 1579 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1580 | 1580 | <part name="cart" interface="neo_cart"> |
| 1581 | 1581 | <!-- MVS AND AES VERSION --> |
| 1582 | <dataarea name="maincpu" size="0x100000"> | |
| 1582 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1583 | 1583 | <rom loadflag="load16_word_swap" name="025-p1.p1" offset="0x000000" size="0x080000" crc="43344cb0" sha1="29dfd699f35b0a74e20fedd6c9174c289f0ef6e0" /> |
| 1584 | 1584 | <!-- TC574200 --> |
| 1585 | 1585 | </dataarea> |
| r31151 | r31152 | |
| 1631 | 1631 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1632 | 1632 | <part name="cart" interface="neo_cart"> |
| 1633 | 1633 | <!-- MVS AND AES VERSION --> |
| 1634 | <dataarea name="maincpu" size="0x100000"> | |
| 1634 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1635 | 1635 | <rom loadflag="load16_word_swap" name="027-p1.p1" offset="0x000000" size="0x080000" crc="c8381327" sha1="c8f8be0ba276c6d12ef13d05af3cf83a2b924894" /> |
| 1636 | 1636 | <!-- HN62422PC --> |
| 1637 | 1637 | </dataarea> |
| r31151 | r31152 | |
| 1683 | 1683 | <sharedfeat name="release" value="MVS,AES" /> |
| 1684 | 1684 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1685 | 1685 | <part name="cart" interface="neo_cart"> |
| 1686 | <dataarea name="maincpu" size="0x100000"> | |
| 1686 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1687 | 1687 | <rom loadflag="load16_word_swap" name="029-p1.p1" offset="0x000000" size="0x080000" crc="9d563f19" sha1="9bff7bf9fdcf81a0a6c4ce3e196097d4f05e67b6" /> |
| 1688 | 1688 | <!-- TC534200 --> |
| 1689 | 1689 | </dataarea> |
| r31151 | r31152 | |
| 1727 | 1727 | <sharedfeat name="release" value="MVS,AES" /> |
| 1728 | 1728 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1729 | 1729 | <part name="cart" interface="neo_cart"> |
| 1730 | <dataarea name="maincpu" size="0x100000"> | |
| 1730 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1731 | 1731 | <rom loadflag="load16_word_swap" name="030-p1.p1" offset="0x000000" size="0x080000" crc="d396c9cb" sha1="47ba421d14d05b965a8d44e7475b227a208e5a07" /> |
| 1732 | 1732 | </dataarea> |
| 1733 | 1733 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
| 1765 | 1765 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1766 | 1766 | <part name="cart" interface="neo_cart"> |
| 1767 | 1767 | <!-- MVS AND AES VERSION --> |
| 1768 | <dataarea name="maincpu" size="0x100000"> | |
| 1768 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1769 | 1769 | <rom loadflag="load16_word_swap" name="030-epr.p1" offset="0x000000" size="0x080000" crc="c59be3dd" sha1="4fbd462c1c18e85a252c58b04b54fd3b82b46cb0" /> |
| 1770 | 1770 | <!-- TC574200 --> |
| 1771 | 1771 | <!-- P1 on eprom, correct chip label unknown --> |
| r31151 | r31152 | |
| 1804 | 1804 | <sharedfeat name="release" value="MVS,AES" /> |
| 1805 | 1805 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1806 | 1806 | <part name="cart" interface="neo_cart"> |
| 1807 | <dataarea name="maincpu" size="0x100000"> | |
| 1807 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1808 | 1808 | <rom loadflag="load16_word_swap" name="030-pg1.p1" offset="0x000000" size="0x080000" status="baddump" crc="12d048d7" sha1="ee0d03a565b11ca3bee2d24f62ff46a85ef18d90" /> |
| 1809 | 1809 | <!-- Chip label p1h does not exist, renamed temporarly to pg1, marked BAD_DUMP. This needs to be verified. --> |
| 1810 | 1810 | </dataarea> |
| r31151 | r31152 | |
| 1851 | 1851 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1852 | 1852 | <part name="cart" interface="neo_cart"> |
| 1853 | 1853 | <!-- MVS VERSION --> |
| 1854 | <dataarea name="maincpu" size="0x100000"> | |
| 1854 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1855 | 1855 | <rom loadflag="load16_word_swap" name="031-pg1.p1" offset="0x000000" size="0x080000" crc="17f034a7" sha1="2e66c7bd93a08efe63c4894494db50bbf58f60e4" /> |
| 1856 | 1856 | <!-- TC534200 --> |
| 1857 | 1857 | </dataarea> |
| r31151 | r31152 | |
| 1890 | 1890 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1891 | 1891 | <part name="cart" interface="neo_cart"> |
| 1892 | 1892 | <!-- AES VERSION --> |
| 1893 | <dataarea name="maincpu" size="0x100000"> | |
| 1893 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1894 | 1894 | <rom loadflag="load16_word_swap" name="031-p1.p1" offset="0x000000" size="0x080000" crc="a2801c24" sha1="627d76ff0740ca29586f37b268f47fb469822529" /> |
| 1895 | 1895 | <!-- TC534200 --> |
| 1896 | 1896 | </dataarea> |
| r31151 | r31152 | |
| 1936 | 1936 | <sharedfeat name="release" value="MVS,AES" /> |
| 1937 | 1937 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1938 | 1938 | <part name="cart" interface="neo_cart"> |
| 1939 | <dataarea name="maincpu" size="0x100000"> | |
| 1939 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1940 | 1940 | <rom loadflag="load16_word_swap" name="032-p1.p1" offset="0x000000" size="0x080000" crc="cd11cbd4" sha1="23163e3da2f07e830a7f4a02aea1cb01a54ccbf3" /> |
| 1941 | 1941 | <!-- TC534200 --> |
| 1942 | 1942 | </dataarea> |
| r31151 | r31152 | |
| 1984 | 1984 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 1985 | 1985 | <part name="cart" interface="neo_cart"> |
| 1986 | 1986 | <!-- MVS AND AES VERSION --> |
| 1987 | <dataarea name="maincpu" size="0x100000"> | |
| 1987 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 1988 | 1988 | <rom loadflag="load16_word_swap" name="033-p1.p1" offset="0x000000" size="0x080000" crc="47ebdc2f" sha1="d46786502920fb510f1999db00c5e09fb641c0bd" /> |
| 1989 | 1989 | <!-- TC534200 --> |
| 1990 | 1990 | <rom loadflag="load16_word_swap" name="033-p2.p2" offset="0x080000" size="0x020000" crc="c473af1c" sha1="4919eeca20abe807493872ca7c79a5d1f496fe68" /> |
| r31151 | r31152 | |
| 2035 | 2035 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2036 | 2036 | <part name="cart" interface="neo_cart"> |
| 2037 | 2037 | <!-- MVS AND AES VERSION --> |
| 2038 | <dataarea name="maincpu" size="0x100000"> | |
| 2038 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2039 | 2039 | <rom loadflag="load16_word_swap" name="034-p1.p1" offset="0x000000" size="0x080000" crc="cdef6b19" sha1="97482db0dffc6d625fb41fa38449c0a74d741a72" /> |
| 2040 | 2040 | <!-- TC534200 --> |
| 2041 | 2041 | </dataarea> |
| r31151 | r31152 | |
| 2087 | 2087 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2088 | 2088 | <part name="cart" interface="neo_cart"> |
| 2089 | 2089 | <!-- MVS AND AES VERSION --> |
| 2090 | <dataarea name="maincpu" size="0x100000"> | |
| 2090 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2091 | 2091 | <rom loadflag="load16_word_swap" name="036-p1.p1" offset="0x000000" size="0x080000" crc="1c66b6fa" sha1="6c50cc452971c46c763ae0b2def95792671a1798" /> |
| 2092 | 2092 | <!-- CXK384500 --> |
| 2093 | 2093 | </dataarea> |
| r31151 | r31152 | |
| 2134 | 2134 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2135 | 2135 | <part name="cart" interface="neo_cart"> |
| 2136 | 2136 | <!-- MVS AND AES VERSION --> |
| 2137 | <dataarea name="maincpu" size="0x100000"> | |
| 2137 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2138 | 2138 | <rom loadflag="load16_word_swap" name="037-p1.p1" offset="0x000000" size="0x080000" crc="e7f2553c" sha1="8469ecb900477feed05ae3311fe9515019bbec2a" /> |
| 2139 | 2139 | <!-- TC534200 --> |
| 2140 | 2140 | </dataarea> |
| r31151 | r31152 | |
| 2179 | 2179 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2180 | 2180 | <part name="cart" interface="neo_cart"> |
| 2181 | 2181 | <!-- MVS AND AES VERSION --> |
| 2182 | <dataarea name="maincpu" size="0x100000"> | |
| 2182 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2183 | 2183 | <rom loadflag="load16_word_swap" name="038-p1.p1" offset="0x000000" size="0x080000" crc="1e52a576" sha1="a1cb56354c3378e955b0cd482c3c41ae15add952" /> |
| 2184 | 2184 | <!-- TC534200 --> |
| 2185 | 2185 | <rom loadflag="load16_word_swap" name="038-p2.p2" offset="0x080000" size="0x080000" crc="a5193e2f" sha1="96803480439e90da23cdca70d59ff519ee85beeb" /> |
| r31151 | r31152 | |
| 2232 | 2232 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2233 | 2233 | <part name="cart" interface="neo_cart"> |
| 2234 | 2234 | <!-- MVS AND AES VERSION --> |
| 2235 | <dataarea name="maincpu" size="0x100000"> | |
| 2235 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2236 | 2236 | <rom loadflag="load16_word_swap" name="039-p1.p1" offset="0x000000" size="0x080000" crc="b372d54c" sha1="b70fc6f72e16a66b6e144cc01370548e3398b8b8" /> |
| 2237 | 2237 | <!-- TC534200 --> |
| 2238 | 2238 | <rom loadflag="load16_word_swap" name="039-p2.p2" offset="0x080000" size="0x080000" crc="28661afe" sha1="6c85ff6ab334b1ca744f726f42dac211537e7315" /> |
| r31151 | r31152 | |
| 2275 | 2275 | <sharedfeat name="release" value="MVS" /> |
| 2276 | 2276 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2277 | 2277 | <part name="cart" interface="neo_cart"> |
| 2278 | <dataarea name="maincpu" size="0x100000"> | |
| 2278 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2279 | 2279 | <rom loadflag="load16_byte" name="proto_039-p1.p1" offset="0x000001" size="0x080000" crc="3c1d17e7" sha1="aeaff465fafa46ded903ed4e8cb8cd05de8dc096" /> |
| 2280 | 2280 | <rom loadflag="load16_byte" name="proto_039-p2.p2" offset="0x000000" size="0x080000" crc="bc9691f0" sha1="3854659b952d4f8c2edd5d59858a61ce6d518604" /> |
| 2281 | 2281 | </dataarea> |
| r31151 | r31152 | |
| 2323 | 2323 | <sharedfeat name="release" value="MVS,AES" /> |
| 2324 | 2324 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2325 | 2325 | <part name="cart" interface="neo_cart"> |
| 2326 | <dataarea name="maincpu" size="0x100000"> | |
| 2326 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2327 | 2327 | <rom loadflag="load16_word_swap" name="040-p1.p1" offset="0x000000" size="0x100000" crc="6dde02c2" sha1="e432e63feb88c71629ec96aa84650dcfe356a551" /> |
| 2328 | 2328 | </dataarea> |
| 2329 | 2329 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
| 2362 | 2362 | <sharedfeat name="release" value="MVS,AES" /> |
| 2363 | 2363 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2364 | 2364 | <part name="cart" interface="neo_cart"> |
| 2365 | <dataarea name="maincpu" size="0x100000"> | |
| 2365 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2366 | 2366 | <rom loadflag="load16_word_swap" name="041-p1.p1" offset="0x000000" size="0x080000" crc="523567fd" sha1="f1e81eb4678f586b214ea102cde6effea1b0f768" /> |
| 2367 | 2367 | <!-- TC534200 --> |
| 2368 | 2368 | </dataarea> |
| r31151 | r31152 | |
| 2411 | 2411 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2412 | 2412 | <part name="cart" interface="neo_cart"> |
| 2413 | 2413 | <!-- MVS AND AES VERSION --> |
| 2414 | <dataarea name="maincpu" size="0x100000"> | |
| 2414 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2415 | 2415 | <rom loadflag="load16_word_swap" name="042-p1.p1" offset="0x000000" size="0x100000" crc="ed719dcf" sha1="12baf2601e86c0e4358517b9fa1c55f2f5835f1d" /> |
| 2416 | 2416 | <!-- TC538200 --> |
| 2417 | 2417 | </dataarea> |
| r31151 | r31152 | |
| 2458 | 2458 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2459 | 2459 | <part name="cart" interface="neo_cart"> |
| 2460 | 2460 | <!-- MVS AND AES VERSION --> |
| 2461 | <dataarea name="maincpu" size="0x100000"> | |
| 2461 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2462 | 2462 | <rom loadflag="load16_word_swap" name="043-p1.p1" offset="0x000000" size="0x100000" crc="ffbdd928" sha1="05b24655ca32723661adc5509b450824deb0c176" /> |
| 2463 | 2463 | <!-- TC538200 --> |
| 2464 | 2464 | <!-- The original p1 is 8mbit; also found sets with p1 / p2 4mbit on eprom. --> |
| r31151 | r31152 | |
| 2510 | 2510 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2511 | 2511 | <part name="cart" interface="neo_cart"> |
| 2512 | 2512 | <!-- MVS AND AES VERSION --> |
| 2513 | <dataarea name="maincpu" size="0x100000"> | |
| 2513 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2514 | 2514 | <rom loadflag="load16_word_swap" name="044-p1.p1" offset="0x000000" size="0x080000" crc="ca9f7a6d" sha1="4d28ef86696f7e832510a66d3e8eb6c93b5b91a1" /> |
| 2515 | 2515 | <!-- TC534200 --> |
| 2516 | 2516 | </dataarea> |
| r31151 | r31152 | |
| 2561 | 2561 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2562 | 2562 | <part name="cart" interface="neo_cart"> |
| 2563 | 2563 | <!-- MVS VERSION --> |
| 2564 | <dataarea name="maincpu" size="0x200000"> | |
| 2564 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 2565 | 2565 | <rom loadflag="load16_word_swap" name="045-p1.p1" offset="0x000000" size="0x100000" crc="dfe51bf0" sha1="2243af3770a516ae698b69bcd9daf53632d9128d" /> |
| 2566 | 2566 | <!-- TC538200 --> |
| 2567 | 2567 | <rom loadflag="load16_word_swap" name="045-pg2.sp2" offset="0x100000" size="0x100000" crc="46745b94" sha1="d9e959fd1f88c9402915c1d0dcdb4a9e3d49cdcb" /> |
| r31151 | r31152 | |
| 2606 | 2606 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2607 | 2607 | <part name="cart" interface="neo_cart"> |
| 2608 | 2608 | <!-- AES VERSION --> |
| 2609 | <dataarea name="maincpu" size="0x180000"> | |
| 2609 | <dataarea name="maincpu" width="16" endianness="big" size="0x180000"> | |
| 2610 | 2610 | <rom loadflag="load16_word_swap" name="045-p1.p1" offset="0x000000" size="0x100000" crc="dfe51bf0" sha1="2243af3770a516ae698b69bcd9daf53632d9128d" /> |
| 2611 | 2611 | <!-- TC538200 --> |
| 2612 | 2612 | <rom loadflag="load16_word_swap" name="045-p2.sp2" offset="0x100000" size="0x080000" crc="38ee9ba9" sha1="48190699a6be83cb6257365ae81f93fdd23abe09" /> |
| r31151 | r31152 | |
| 2659 | 2659 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2660 | 2660 | <part name="cart" interface="neo_cart"> |
| 2661 | 2661 | <!-- MVS VERSION --> |
| 2662 | <dataarea name="maincpu" size="0x200000"> | |
| 2662 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 2663 | 2663 | <rom loadflag="load16_word_swap" name="046-p1.p1" offset="0x000000" size="0x100000" crc="69fa9e29" sha1="9a40a16163193bb506a32bd34f6323b25ec69622" /> |
| 2664 | 2664 | <!-- mask rom TC538200 --> |
| 2665 | 2665 | <rom loadflag="load16_word_swap" name="046-p2.sp2" offset="0x100000" size="0x100000" crc="f182cb3e" sha1="6b4e0af5d4e623f0682f37ff5c69e5b705e20028" /> |
| r31151 | r31152 | |
| 2712 | 2712 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2713 | 2713 | <part name="cart" interface="neo_cart"> |
| 2714 | 2714 | <!-- AES VERSION --> |
| 2715 | <dataarea name="maincpu" size="0x200000"> | |
| 2715 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 2716 | 2716 | <rom loadflag="load16_word_swap" name="046-pg1.p1" offset="0x000000" size="0x100000" crc="771e39bc" sha1="c0e05fd1ca81926438bb75e2fa6894e40ab6521e" /> |
| 2717 | 2717 | <!-- mask rom TC538200 --> |
| 2718 | 2718 | <rom loadflag="load16_word_swap" name="046-p2.sp2" offset="0x100000" size="0x100000" crc="f182cb3e" sha1="6b4e0af5d4e623f0682f37ff5c69e5b705e20028" /> |
| r31151 | r31152 | |
| 2774 | 2774 | <part name="cart" interface="neo_cart"> |
| 2775 | 2775 | <!-- MVS AND AES VERSION --> |
| 2776 | 2776 | <feature name="slot" value="rom_fatfur2" /> |
| 2777 | <dataarea name="maincpu" size="0x100000"> | |
| 2777 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2778 | 2778 | <rom loadflag="load16_word_swap" name="047-p1.p1" offset="0x000000" size="0x100000" crc="ecfdbb69" sha1="59e2f137c6eaf043df4ddae865a9159a10265c60" /> |
| 2779 | 2779 | <!-- TC538200 --> |
| 2780 | 2780 | <!-- The original p1 is 8mbit; also found sets with p1 / p2 4mbit on eprom. --> |
| r31151 | r31152 | |
| 2824 | 2824 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2825 | 2825 | <part name="cart" interface="neo_cart"> |
| 2826 | 2826 | <!-- MVS ONLY RELEASE --> |
| 2827 | <dataarea name="maincpu" size="0x100000"> | |
| 2827 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2828 | 2828 | <rom loadflag="load16_word_swap" name="048-p1.p1" offset="0x000000" size="0x100000" crc="fa818cbb" sha1="afee2c897b766c84f13891fb52c574fb18df0951" /> |
| 2829 | 2829 | <!-- mask rom TC538200 --> |
| 2830 | 2830 | </dataarea> |
| r31151 | r31152 | |
| 2865 | 2865 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2866 | 2866 | <part name="cart" interface="neo_cart"> |
| 2867 | 2867 | <!-- MVS AND AES VERSION --> |
| 2868 | <dataarea name="maincpu" size="0x100000"> | |
| 2868 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2869 | 2869 | <rom loadflag="load16_word_swap" name="049-p1.p1" offset="0x000000" size="0x080000" crc="3b857da2" sha1="4dd86c739944696c16c3cdd85935d6dfa9fdc276" /> |
| 2870 | 2870 | <!-- CXK384500 --> |
| 2871 | 2871 | <rom loadflag="load16_word_swap" name="049-p2.p2" offset="0x080000" size="0x080000" crc="2f062209" sha1="991cf3e3677929b2cc0b2787b0c7b6ad3700f618" /> |
| r31151 | r31152 | |
| 2906 | 2906 | <sharedfeat name="release" value="MVS,AES" /> |
| 2907 | 2907 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2908 | 2908 | <part name="cart" interface="neo_cart"> |
| 2909 | <dataarea name="maincpu" size="0x100000"> | |
| 2909 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2910 | 2910 | <rom loadflag="load16_word_swap" name="050-p1.p1" offset="0x000000" size="0x100000" crc="4e097c40" sha1="43311a7ca14a14dcd4a99d8576a12e897b078643" /> |
| 2911 | 2911 | <!-- CXK388000 --> |
| 2912 | 2912 | </dataarea> |
| r31151 | r31152 | |
| 2951 | 2951 | <sharedfeat name="release" value="MVS,AES" /> |
| 2952 | 2952 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2953 | 2953 | <part name="cart" interface="neo_cart"> |
| 2954 | <dataarea name="maincpu" size="0x100000"> | |
| 2954 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 2955 | 2955 | <rom loadflag="load16_word_swap" name="051-p1.p1" offset="0x000000" size="0x100000" crc="17aa899d" sha1="674cd8ace7acdf4f407de741e3d0071bcb49c902" /> |
| 2956 | 2956 | <!-- CXK388002 --> |
| 2957 | 2957 | </dataarea> |
| r31151 | r31152 | |
| 2996 | 2996 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 2997 | 2997 | <part name="cart" interface="neo_cart"> |
| 2998 | 2998 | <feature name="slot" value="rom_fatfur2" /> |
| 2999 | <dataarea name="maincpu" size="0x100000"> | |
| 2999 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 3000 | 3000 | <rom loadflag="load16_word_swap" name="052-p1.p1" offset="0x000000" size="0x080000" crc="9cd97256" sha1="1c780b711137fd79cc81b01941e84f3d59e0071f" /> |
| 3001 | 3001 | <!-- TC534200 --> |
| 3002 | 3002 | </dataarea> |
| r31151 | r31152 | |
| 3039 | 3039 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3040 | 3040 | <part name="cart" interface="neo_cart"> |
| 3041 | 3041 | <!-- MVS VERSION --> |
| 3042 | <dataarea name="maincpu" size="0x100000"> | |
| 3042 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 3043 | 3043 | <rom loadflag="load16_word_swap" name="053-epr.p1" offset="0x000000" size="0x080000" crc="d42e1e9a" sha1="9d1911fe4bf6202466ec45557dd008cbf01ca9c6" /> |
| 3044 | 3044 | <!-- D27C4000 --> |
| 3045 | 3045 | <rom loadflag="load16_word_swap" name="053-epr.p2" offset="0x080000" size="0x080000" crc="0e33e8a3" sha1="4b7086edb504f3c30529d51ba8f453d48eba5164" /> |
| r31151 | r31152 | |
| 3083 | 3083 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3084 | 3084 | <part name="cart" interface="neo_cart"> |
| 3085 | 3085 | <!-- AES VERSION --> |
| 3086 | <dataarea name="maincpu" size="0x100000"> | |
| 3086 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 3087 | 3087 | <rom loadflag="load16_word_swap" name="053-p1.p1" offset="0x000000" size="0x080000" crc="95b574cb" sha1="b7b7af6a04c3d902e7f8852897741ecaf0b1062c" /> |
| 3088 | 3088 | <!-- TC534200 --> |
| 3089 | 3089 | <rom loadflag="load16_word_swap" name="053-p2.p2" offset="0x080000" size="0x080000" crc="f198ed45" sha1="24ccc091e97f63796562bb5b30df51f39bd504ef" /> |
| r31151 | r31152 | |
| 3125 | 3125 | <sharedfeat name="release" value="unknown" /> |
| 3126 | 3126 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3127 | 3127 | <part name="cart" interface="neo_cart"> |
| 3128 | <dataarea name="maincpu" size="0x100000"> | |
| 3128 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 3129 | 3129 | <rom loadflag="load16_word_swap" name="053-p1_a.p1" offset="0x000000" size="0x080000" crc="ed29fde2" sha1="52b8ca5b804f786f95e1dfb348d8c7b82f1d4ddf" /> |
| 3130 | 3130 | <rom loadflag="load16_word_swap" name="053-p2_a.p2" offset="0x080000" size="0x080000" crc="98f2b158" sha1="a64e1425970eb53cc910891db39973dee3d54ccc" /> |
| 3131 | 3131 | <!-- Correct chip labels for p1 and p2 unknown --> |
| r31151 | r31152 | |
| 3180 | 3180 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3181 | 3181 | <part name="cart" interface="neo_cart"> |
| 3182 | 3182 | <!-- MVS AND AES VERSION --> |
| 3183 | <dataarea name="maincpu" size="0x200000"> | |
| 3183 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 3184 | 3184 | <rom loadflag="load16_word_swap" name="055-p1.p1" offset="0x100000" size="0x100000" crc="f10a2042" sha1="d08a3f3c28be4b1793de7d362456281329fe1828" /> |
| 3185 | 3185 | <!-- mask rom TC5316200 --> |
| 3186 | 3186 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 3238 | 3238 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3239 | 3239 | <part name="cart" interface="neo_cart"> |
| 3240 | 3240 | <!-- MVS VERSION --> |
| 3241 | <dataarea name="maincpu" size="0x100000"> | |
| 3241 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 3242 | 3242 | <rom loadflag="load16_word_swap" name="056-p1.p1" offset="0x000000" size="0x100000" crc="a3b1d021" sha1="ee42f3ca4516226b0088d0303ed28e3ecdabcd71" /> |
| 3243 | 3243 | <!-- TC538200 --> |
| 3244 | 3244 | </dataarea> |
| r31151 | r31152 | |
| 3288 | 3288 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3289 | 3289 | <part name="cart" interface="neo_cart"> |
| 3290 | 3290 | <!-- AES VERSION --> |
| 3291 | <dataarea name="maincpu" size="0x100000"> | |
| 3291 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 3292 | 3292 | <rom loadflag="load16_word_swap" name="056-p1.p1" offset="0x000000" size="0x100000" crc="a3b1d021" sha1="ee42f3ca4516226b0088d0303ed28e3ecdabcd71" /> |
| 3293 | 3293 | <!-- TC538200 --> |
| 3294 | 3294 | <!-- the rom below acts as a patch to the program rom in the cart, replacing the first 512kb --> |
| r31151 | r31152 | |
| 3349 | 3349 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3350 | 3350 | <part name="cart" interface="neo_cart"> |
| 3351 | 3351 | <!-- MVS AND AES VERSION --> |
| 3352 | <dataarea name="maincpu" size="0x200000"> | |
| 3352 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 3353 | 3353 | <rom loadflag="load16_word_swap" name="057-p1.p1" offset="0x100000" size="0x100000" crc="65a891d9" sha1="ff8d5ccb0dd22c523902bb3db3c645583a335056" /> |
| 3354 | 3354 | <!-- TC5316200 --> |
| 3355 | 3355 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 3401 | 3401 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3402 | 3402 | <part name="cart" interface="neo_cart"> |
| 3403 | 3403 | <!-- MVS AND AES VERSION --> |
| 3404 | <dataarea name="maincpu" size="0x180000"> | |
| 3404 | <dataarea name="maincpu" width="16" endianness="big" size="0x180000"> | |
| 3405 | 3405 | <rom loadflag="load16_word_swap" name="058-p1.p1" offset="0x000000" size="0x100000" crc="2f585ba2" sha1="429b4bf43fb9b1082c15d645ca328f9d175b976b" /> |
| 3406 | 3406 | <!-- mask rom TC538200 --> |
| 3407 | 3407 | <rom loadflag="load16_word_swap" name="058-p2.sp2" offset="0x100000" size="0x080000" crc="d7c71a6b" sha1="b3428063031a2e5857da40a5d2ffa87fb550c1bb" /> |
| r31151 | r31152 | |
| 3448 | 3448 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3449 | 3449 | <part name="cart" interface="neo_cart"> |
| 3450 | 3450 | <!-- MVS AND AES VERSION --> |
| 3451 | <dataarea name="maincpu" size="0x180000"> | |
| 3451 | <dataarea name="maincpu" width="16" endianness="big" size="0x180000"> | |
| 3452 | 3452 | <rom loadflag="load16_word_swap" name="058-p1.p1" offset="0x000000" size="0x100000" crc="2f585ba2" sha1="429b4bf43fb9b1082c15d645ca328f9d175b976b" /> |
| 3453 | 3453 | <!-- mask rom TC538200 --> |
| 3454 | 3454 | <rom loadflag="load16_word_swap" name="058-p2.sp2" offset="0x100000" size="0x080000" crc="d7c71a6b" sha1="b3428063031a2e5857da40a5d2ffa87fb550c1bb" /> |
| r31151 | r31152 | |
| 3505 | 3505 | <sharedfeat name="release" value="MVS,AES" /> |
| 3506 | 3506 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3507 | 3507 | <part name="cart" interface="neo_cart"> |
| 3508 | <dataarea name="maincpu" size="0x200000"> | |
| 3508 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 3509 | 3509 | <rom loadflag="load16_word_swap" name="059-p1.p1" offset="0x100000" size="0x100000" crc="01d4e9c0" sha1="3179d2be59bf2de6918d506117cff50acf7e09f3" /> |
| 3510 | 3510 | <!-- TC5316200 --> |
| 3511 | 3511 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 3561 | 3561 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3562 | 3562 | <part name="cart" interface="neo_cart"> |
| 3563 | 3563 | <!-- MVS ONLY RELEASE --> |
| 3564 | <dataarea name="maincpu" size="0x100000"> | |
| 3564 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 3565 | 3565 | <rom loadflag="load16_word_swap" name="060-p1.p1" offset="0x000000" size="0x100000" crc="2a104b50" sha1="3eb663d3df7074e1cdf4c0e450a35c9cf55d8979" /> |
| 3566 | 3566 | <!-- VIC940800 --> |
| 3567 | 3567 | </dataarea> |
| r31151 | r31152 | |
| 3600 | 3600 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3601 | 3601 | <part name="cart" interface="neo_cart"> |
| 3602 | 3602 | <!-- MVS ONLY RELEASE --> |
| 3603 | <dataarea name="maincpu" size="0x100000"> | |
| 3603 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 3604 | 3604 | <rom loadflag="load16_word_swap" name="060-p1.p1" offset="0x000000" size="0x100000" crc="2a104b50" sha1="3eb663d3df7074e1cdf4c0e450a35c9cf55d8979" /> |
| 3605 | 3605 | <!-- VIC940800 --> |
| 3606 | 3606 | <!-- the rom below acts as a patch to the program rom in the cart, replacing the first 512kb --> |
| r31151 | r31152 | |
| 3650 | 3650 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3651 | 3651 | <part name="cart" interface="neo_cart"> |
| 3652 | 3652 | <!-- MVS AND AES VERSION --> |
| 3653 | <dataarea name="maincpu" size="0x100000"> | |
| 3653 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 3654 | 3654 | <rom loadflag="load16_word_swap" name="061-p1.p1" offset="0x000000" size="0x100000" crc="5969e0dc" sha1="78abea880c125ec5a85bef6404478512a34b5513" /> |
| 3655 | 3655 | <!-- mask rom TC538200 --> |
| 3656 | 3656 | </dataarea> |
| r31151 | r31152 | |
| 3696 | 3696 | <sharedfeat name="release" value="MVS,AES" /> |
| 3697 | 3697 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3698 | 3698 | <part name="cart" interface="neo_cart"> |
| 3699 | <dataarea name="maincpu" size="0x200000"> | |
| 3699 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 3700 | 3700 | <rom loadflag="load16_word_swap" name="062-p1.p1" offset="0x000000" size="0x100000" crc="37aba1aa" sha1="1a2ab9593371cc2f665121d554eec3f6bb4d09ff" /> |
| 3701 | 3701 | <!-- mask rom TC538200 --> |
| 3702 | 3702 | <rom loadflag="load16_word_swap" name="062-p2.sp2" offset="0x100000" size="0x100000" crc="f025ab77" sha1="4944be04648296d0b93cfe4c5ca7b9cede072cff" /> |
| r31151 | r31152 | |
| 3751 | 3751 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3752 | 3752 | <part name="cart" interface="neo_cart"> |
| 3753 | 3753 | <!-- MVS AND AES VERSION --> |
| 3754 | <dataarea name="maincpu" size="0x200000"> | |
| 3754 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 3755 | 3755 | <rom loadflag="load16_word_swap" name="063-p1.p1" offset="0x100000" size="0x100000" crc="22368892" sha1="0997f8284aa0f57a333be8a0fdea777d0d01afd6" /> |
| 3756 | 3756 | <!-- TC5316200 --> |
| 3757 | 3757 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 3805 | 3805 | <part name="cart" interface="neo_cart"> |
| 3806 | 3806 | <!-- KOREAN VERSION --> |
| 3807 | 3807 | <!-- This has corrupt text if used with the Japan bios due to the replacement of the s1 rom to contain the new logo --> |
| 3808 | <dataarea name="maincpu" size="0x200000"> | |
| 3808 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 3809 | 3809 | <rom loadflag="load16_word_swap" name="063-p1-kan.p1" offset="0x100000" size="0x100000" crc="147cc6d7" sha1="8e22305f41a0688786ff55437c25948e6c8fda58" /> |
| 3810 | 3810 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| 3811 | 3811 | <!-- the roms below apply as patch over the main program (I haven't checked what they change, the game boots as the Korean version even with just the above program) --> |
| r31151 | r31152 | |
| 3867 | 3867 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3868 | 3868 | <part name="cart" interface="neo_cart"> |
| 3869 | 3869 | <!-- MVS AND AES VERSION --> |
| 3870 | <dataarea name="maincpu" size="0x200000"> | |
| 3870 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 3871 | 3871 | <rom loadflag="load16_word_swap" name="064-p1.p1" offset="0x100000" size="0x100000" crc="385a2e86" sha1="cfde4a1aeae038a3d6ca9946065624f097682d3d" /> |
| 3872 | 3872 | <!-- TC5316200 --> |
| 3873 | 3873 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 3921 | 3921 | <sharedfeat name="release" value="MVS,AES" /> |
| 3922 | 3922 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3923 | 3923 | <part name="cart" interface="neo_cart"> |
| 3924 | <dataarea name="maincpu" size="0x100000"> | |
| 3924 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 3925 | 3925 | <rom loadflag="load16_word_swap" name="065-p1.p1" offset="0x000000" size="0x100000" crc="6692c140" sha1="5da574e906974fac92bb2f49bdeea257c014a897" /> |
| 3926 | 3926 | <!-- mask rom TC538200 --> |
| 3927 | 3927 | </dataarea> |
| r31151 | r31152 | |
| 3970 | 3970 | <sharedfeat name="release" value="MVS,AES" /> |
| 3971 | 3971 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 3972 | 3972 | <part name="cart" interface="neo_cart"> |
| 3973 | <dataarea name="maincpu" size="0x100000"> | |
| 3973 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 3974 | 3974 | <rom loadflag="load16_word_swap" name="066-p1.p1" offset="0x000000" size="0x100000" crc="8c86fd22" sha1="8cf97c6fb9c5717167ccc54bf5856248ccaf32c6" /> |
| 3975 | 3975 | <!-- TC538200 --> |
| 3976 | 3976 | </dataarea> |
| r31151 | r31152 | |
| 4017 | 4017 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4018 | 4018 | <part name="cart" interface="neo_cart"> |
| 4019 | 4019 | <!-- MVS ONLY RELEASE --> |
| 4020 | <dataarea name="maincpu" size="0x100000"> | |
| 4020 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 4021 | 4021 | <rom loadflag="load16_word_swap" name="067-p1.p1" offset="0x000000" size="0x080000" crc="4cea8a49" sha1="cea4a35db8de898e30eb40dd339b3cbe77ac0856" /> |
| 4022 | 4022 | <!-- UM8303B --> |
| 4023 | 4023 | </dataarea> |
| r31151 | r31152 | |
| 4056 | 4056 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4057 | 4057 | <part name="cart" interface="neo_cart"> |
| 4058 | 4058 | <!-- MVS ONLY RELEASE --> |
| 4059 | <dataarea name="maincpu" size="0x100000"> | |
| 4059 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 4060 | 4060 | <rom loadflag="load16_word_swap" name="068-pg1.p1" offset="0x000000" size="0x100000" crc="105a408f" sha1="2ee51defa1c24c66c63a6498ee542ac26de3cfbb" /> |
| 4061 | 4061 | <!-- mask rom TC538200 --> |
| 4062 | 4062 | </dataarea> |
| r31151 | r31152 | |
| 4109 | 4109 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4110 | 4110 | <part name="cart" interface="neo_cart"> |
| 4111 | 4111 | <!-- MVS AND AES VERSION --> |
| 4112 | <dataarea name="maincpu" size="0x300000"> | |
| 4112 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 4113 | 4113 | <rom loadflag="load16_word_swap" name="069-p1.p1" offset="0x000000" size="0x100000" crc="a8bcfbbc" sha1="519c4861151797e5f4d4f33432b83dfabed8e7c4" /> |
| 4114 | 4114 | <!-- TC538200 --> |
| 4115 | 4115 | <rom loadflag="load16_word_swap" name="069-sp2.sp2" offset="0x100000" size="0x200000" crc="dbe963ed" sha1="8ece7f663cfe8e563576a397e41161d392cee67e" /> |
| r31151 | r31152 | |
| 4164 | 4164 | <!-- Original Version - Encrypted GFX --> |
| 4165 | 4165 | <!-- MVS ONLY RELEASE --> |
| 4166 | 4166 | <feature name="slot" value="rom_cmc_zupapa" /> |
| 4167 | <dataarea name="maincpu" size="0x100000"> | |
| 4167 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 4168 | 4168 | <rom loadflag="load16_word_swap" name="070-p1.p1" offset="0x000000" size="0x100000" crc="5a96203e" sha1="49cddec9ca6cc51e5ecf8a34e447a23e1f8a15a1" /> |
| 4169 | 4169 | <!-- TC5316200 --> |
| 4170 | 4170 | </dataarea> |
| r31151 | r31152 | |
| 4224 | 4224 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4225 | 4225 | <part name="cart" interface="neo_cart"> |
| 4226 | 4226 | <!-- MVS ONLY RELEASE --> |
| 4227 | <dataarea name="maincpu" size="0x100000"> | |
| 4227 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 4228 | 4228 | <rom loadflag="load16_word_swap" name="073-p1.p1" offset="0x000000" size="0x080000" crc="adc356ad" sha1="801e0a54b65d7a3500e6cef2d6bba40c6356dc1f" /> |
| 4229 | 4229 | <!-- mask rom TC534200 --> |
| 4230 | 4230 | </dataarea> |
| r31151 | r31152 | |
| 4267 | 4267 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4268 | 4268 | <part name="cart" interface="neo_cart"> |
| 4269 | 4269 | <!-- MVS AND AES VERSION --> |
| 4270 | <dataarea name="maincpu" size="0x200000"> | |
| 4270 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 4271 | 4271 | <rom loadflag="load16_word_swap" name="074-p1.p1" offset="0x100000" size="0x100000" crc="62369553" sha1="ca4d561ee08d16fe6804249d1ba49188eb3bd606" /> |
| 4272 | 4272 | <!-- TC5316200 --> |
| 4273 | 4273 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 4321 | 4321 | <sharedfeat name="release" value="MVS,AES" /> |
| 4322 | 4322 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4323 | 4323 | <part name="cart" interface="neo_cart"> |
| 4324 | <dataarea name="maincpu" size="0x200000"> | |
| 4324 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 4325 | 4325 | <rom loadflag="load16_word_swap" name="075-p1.p1" offset="0x100000" size="0x100000" crc="92871738" sha1="fed040a7c1ff9e495109813a702d09fb1d2ecf3a" /> |
| 4326 | 4326 | <!-- mask rom TC5316200 --> |
| 4327 | 4327 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 4367 | 4367 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4368 | 4368 | <part name="cart" interface="neo_cart"> |
| 4369 | 4369 | <!-- MVS ONLY RELEASE --> |
| 4370 | <dataarea name="maincpu" size="0x100000"> | |
| 4370 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 4371 | 4371 | <rom loadflag="load16_word_swap" name="076-p1.p1" offset="0x000000" size="0x080000" crc="d7c1effd" sha1="485c2308a40baecd122be9ab4996044622bdcc7e" /> |
| 4372 | 4372 | <!-- mask rom TC538200 --> |
| 4373 | 4373 | </dataarea> |
| r31151 | r31152 | |
| 4419 | 4419 | <sharedfeat name="release" value="MVS,AES" /> |
| 4420 | 4420 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4421 | 4421 | <part name="cart" interface="neo_cart"> |
| 4422 | <dataarea name="maincpu" size="0x200000"> | |
| 4422 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 4423 | 4423 | <rom loadflag="load16_word_swap" name="078-p1.p1" offset="0x100000" size="0x100000" crc="45906309" sha1="cdcd96a564acf42e959193e139e149b29c103e25" /> |
| 4424 | 4424 | <!-- mask rom TC5316200 --> |
| 4425 | 4425 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 4477 | 4477 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4478 | 4478 | <part name="cart" interface="neo_cart"> |
| 4479 | 4479 | <!-- MVS AND AES VERSION --> |
| 4480 | <dataarea name="maincpu" size="0x100000"> | |
| 4480 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 4481 | 4481 | <rom loadflag="load16_word_swap" name="079-p1.p1" offset="0x000000" size="0x100000" crc="5e78328e" sha1="7a00b096ed6dd77afc3008c5a4c83686e475f323" /> |
| 4482 | 4482 | <!-- TC538200 --> |
| 4483 | 4483 | </dataarea> |
| r31151 | r31152 | |
| 4525 | 4525 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4526 | 4526 | <part name="cart" interface="neo_cart"> |
| 4527 | 4527 | <!-- MVS AND AES VERSION --> |
| 4528 | <dataarea name="maincpu" size="0x100000"> | |
| 4528 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 4529 | 4529 | <rom loadflag="load16_word_swap" name="080-p1.p1" offset="0x000000" size="0x100000" crc="4440315e" sha1="f4adba8e341d64a1f6280dfd98ebf6918c00608d" /> |
| 4530 | 4530 | <!-- mask rom TC538200 --> |
| 4531 | 4531 | </dataarea> |
| r31151 | r31152 | |
| 4569 | 4569 | <!-- KOREAN VERSION --> |
| 4570 | 4570 | <!-- Made by Viccom Corp.; proms have manufacturer stamp VICxxxxxx-xxx, chip labels same as quizkof; Cart ID 0080 --> |
| 4571 | 4571 | <!-- Due to parent set naming limitations, roms have been named vic-xxx --> |
| 4572 | <dataarea name="maincpu" size="0x100000"> | |
| 4572 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 4573 | 4573 | <rom loadflag="load16_word_swap" name="vic-080-p1.p1" offset="0x000000" size="0x100000" crc="2589488e" sha1="609f3095c1cf8b11335b56f23c5d955eebd66dd2" /> |
| 4574 | 4574 | </dataarea> |
| 4575 | 4575 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
| 4608 | 4608 | <sharedfeat name="release" value="MVS,AES" /> |
| 4609 | 4609 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4610 | 4610 | <part name="cart" interface="neo_cart"> |
| 4611 | <dataarea name="maincpu" size="0x200000"> | |
| 4611 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 4612 | 4612 | <rom loadflag="load16_word_swap" name="081-p1.p1" offset="0x100000" size="0x100000" crc="6bc27a3d" sha1="94692abe7343f9204a557acae4ab74d0af511ca3" /> |
| 4613 | 4613 | <!-- TC5316200 --> |
| 4614 | 4614 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 4662 | 4662 | <sharedfeat name="release" value="MVS,AES" /> |
| 4663 | 4663 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4664 | 4664 | <part name="cart" interface="neo_cart"> |
| 4665 | <dataarea name="maincpu" size="0x200000"> | |
| 4665 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 4666 | 4666 | <rom loadflag="load16_word_swap" name="082-p1.p1" offset="0x100000" size="0x100000" crc="34ab832a" sha1="fbb1bd195f5653f7b9c89648649f838eaf83cbe4" /> |
| 4667 | 4667 | <!-- TC5316200 --> |
| 4668 | 4668 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 4718 | 4718 | <!-- MVS ONLY RELEASE --> |
| 4719 | 4719 | <!-- This set uses CHA and PROG board from Power Spikes II. Six Power Spikes II prom's are replaced with |
| 4720 | 4720 | Puzzle Bobble prom's. Confirmed on several original carts. Do other layouts also exist? --> |
| 4721 | <dataarea name="maincpu" size="0x100000"> | |
| 4721 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 4722 | 4722 | <rom loadflag="load16_word_swap" name="d96-07.ep1" offset="0x000000" size="0x080000" crc="6102ca14" sha1="328429d11de5b327a0654ae0548da4d0025a2ae6" /> |
| 4723 | 4723 | <!-- 27C240 --> |
| 4724 | 4724 | </dataarea> |
| r31151 | r31152 | |
| 4780 | 4780 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4781 | 4781 | <part name="cart" interface="neo_cart"> |
| 4782 | 4782 | <!-- MVS VERSION --> |
| 4783 | <dataarea name="maincpu" size="0x200000"> | |
| 4783 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 4784 | 4784 | <rom loadflag="load16_word_swap" name="084-p1.p1" offset="0x100000" size="0x100000" crc="2cba2716" sha1="f6c2d0537c9c3e0938065c65b1797c47198fcff8" /> |
| 4785 | 4785 | <!-- TC5316200 --> |
| 4786 | 4786 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 4833 | 4833 | <part name="cart" interface="neo_cart"> |
| 4834 | 4834 | <!-- MVS AND AES VERSION --> |
| 4835 | 4835 | <!-- There also exists a MVS version with 4x eprom (EP1~EP4); board used is NEO-MVS PROGSM --> |
| 4836 | <dataarea name="maincpu" size="0x200000"> | |
| 4836 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 4837 | 4837 | <rom loadflag="load16_word_swap" name="084-pg1.p1" offset="0x100000" size="0x100000" crc="5e54cf95" sha1="41abe2042fdbb1526e92a0789976a9b1ac5e60f0" /> |
| 4838 | 4838 | <!-- TC5316200 --> |
| 4839 | 4839 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 4896 | 4896 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4897 | 4897 | <part name="cart" interface="neo_cart"> |
| 4898 | 4898 | <!-- MVS ONLY RELEASE --> |
| 4899 | <dataarea name="maincpu" size="0x100000"> | |
| 4899 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 4900 | 4900 | <rom loadflag="load16_word_swap" name="086-p1.p1" offset="0x000000" size="0x100000" crc="03e20ab6" sha1="3a0a5a54649178ce7a6158980cb4445084b40fb5" /> |
| 4901 | 4901 | <!-- mask rom TC538200 --> |
| 4902 | 4902 | </dataarea> |
| r31151 | r31152 | |
| 4943 | 4943 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 4944 | 4944 | <part name="cart" interface="neo_cart"> |
| 4945 | 4945 | <!-- MVS VERSION --> |
| 4946 | <dataarea name="maincpu" size="0x300000"> | |
| 4946 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 4947 | 4947 | <rom loadflag="load16_word_swap" name="087-epr.ep1" offset="0x000000" size="0x080000" crc="23e09bb8" sha1="79da99fa50a639fce9d1266699b5e53c9ac55642" /> |
| 4948 | 4948 | <!-- M27C4002 --> |
| 4949 | 4949 | <rom loadflag="load16_word_swap" name="087-epr.ep2" offset="0x080000" size="0x080000" crc="256f5302" sha1="e2d21b413a6059194a994b7902b2a7df98a15151" /> |
| r31151 | r31152 | |
| 4999 | 4999 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5000 | 5000 | <part name="cart" interface="neo_cart"> |
| 5001 | 5001 | <!-- AES VERSION --> |
| 5002 | <dataarea name="maincpu" size="0x300000"> | |
| 5002 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 5003 | 5003 | <rom loadflag="load16_word_swap" name="087-pg1.p1" offset="0x000000" size="0x100000" crc="282a336e" sha1="e062f1939d36a45f185b5dbd726cdd833dc7c28c" /> |
| 5004 | 5004 | <!-- mask rom TC538200 --> |
| 5005 | 5005 | <rom loadflag="load16_word_swap" name="087-p2.sp2" offset="0x100000" size="0x200000" crc="9bbe27e0" sha1="b18117102159903c8e8f4e4226e1cc91a400e816" /> |
| r31151 | r31152 | |
| 5049 | 5049 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5050 | 5050 | <part name="cart" interface="neo_cart"> |
| 5051 | 5051 | <!-- KOREAN VERSION --> |
| 5052 | <dataarea name="maincpu" size="0x300000"> | |
| 5052 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 5053 | 5053 | <rom loadflag="load16_word_swap" name="187-p1k.p1" offset="0x000000" size="0x100000" crc="c8e7c075" sha1="7b74f2917114460d79d8f46ee24829a4c08cbf2a" /> |
| 5054 | 5054 | <rom loadflag="load16_word_swap" name="087-p2.sp2" offset="0x100000" size="0x200000" crc="9bbe27e0" sha1="b18117102159903c8e8f4e4226e1cc91a400e816" /> |
| 5055 | 5055 | <!-- mask rom TC5316200 --> |
| r31151 | r31152 | |
| 5103 | 5103 | <sharedfeat name="release" value="MVS,AES" /> |
| 5104 | 5104 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5105 | 5105 | <part name="cart" interface="neo_cart"> |
| 5106 | <dataarea name="maincpu" size="0x200000"> | |
| 5106 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 5107 | 5107 | <rom loadflag="load16_word_swap" name="088-p1.p1" offset="0x100000" size="0x100000" crc="bd5814f6" sha1="95179a4dee61ae88bb5d9fd74af0c56c8c29f5ea" /> |
| 5108 | 5108 | <!-- TC5316200 --> |
| 5109 | 5109 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 5147 | 5147 | <sharedfeat name="release" value="MVS,AES" /> |
| 5148 | 5148 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5149 | 5149 | <part name="cart" interface="neo_cart"> |
| 5150 | <dataarea name="maincpu" size="0x300000"> | |
| 5150 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 5151 | 5151 | <rom loadflag="load16_word_swap" name="089-p1.p1" offset="0x000000" size="0x100000" crc="5e5847a2" sha1="b864d0ec4184b785569ddbf67c2115b5ab86ee3e" /> |
| 5152 | 5152 | <!-- mask rom TC538200 --> |
| 5153 | 5153 | <rom loadflag="load16_word_swap" name="089-p2.sp2" offset="0x100000" size="0x200000" crc="028b774c" sha1="fc5da2821a5072f2b78245fc59b6e3eeef116d16" /> |
| r31151 | r31152 | |
| 5202 | 5202 | <sharedfeat name="release" value="MVS,AES" /> |
| 5203 | 5203 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5204 | 5204 | <part name="cart" interface="neo_cart"> |
| 5205 | <dataarea name="maincpu" size="0x200000"> | |
| 5205 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 5206 | 5206 | <rom loadflag="load16_word_swap" name="090-p1.p1" offset="0x100000" size="0x100000" crc="afaa4702" sha1="83d122fddf17d4774353abf4a0655f3939f7b752" /> |
| 5207 | 5207 | <!-- mask rom TC5316200 --> |
| 5208 | 5208 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 5265 | 5265 | <sharedfeat name="release" value="MVS,AES" /> |
| 5266 | 5266 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5267 | 5267 | <part name="cart" interface="neo_cart"> |
| 5268 | <dataarea name="maincpu" size="0x200000"> | |
| 5268 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 5269 | 5269 | <rom loadflag="load16_word_swap" name="092-p1.p1" offset="0x100000" size="0x100000" crc="28ec9b77" sha1="7cdc789a99f8127f437d68cbc41278c926be9efd" /> |
| 5270 | 5270 | <!-- mask rom TC5316200 --> |
| 5271 | 5271 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 5315 | 5315 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5316 | 5316 | <part name="cart" interface="neo_cart"> |
| 5317 | 5317 | <!-- MVS ONLY RELEASE --> |
| 5318 | <dataarea name="maincpu" size="0x100000"> | |
| 5318 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 5319 | 5319 | <rom loadflag="load16_word_swap" name="093-p1.p1" offset="0x000000" size="0x100000" crc="a1a71d0d" sha1="059284c84f61a825923d86d2f29c91baa2c439cd" /> |
| 5320 | 5320 | <!-- TC538200 --> |
| 5321 | 5321 | </dataarea> |
| r31151 | r31152 | |
| 5360 | 5360 | <sharedfeat name="release" value="MVS,AES" /> |
| 5361 | 5361 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5362 | 5362 | <part name="cart" interface="neo_cart"> |
| 5363 | <dataarea name="maincpu" size="0x200000"> | |
| 5363 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 5364 | 5364 | <rom loadflag="load16_word_swap" name="094-p1.p1" offset="0x100000" size="0x100000" crc="33019545" sha1="213db6c0b7d24b74b809854f9c606dbea1d9ba00" /> |
| 5365 | 5365 | <!-- TC5316200 --> |
| 5366 | 5366 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 5418 | 5418 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5419 | 5419 | <part name="cart" interface="neo_cart"> |
| 5420 | 5420 | <!-- MVS AND AES VERSION --> |
| 5421 | <dataarea name="maincpu" size="0x300000"> | |
| 5421 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 5422 | 5422 | <rom loadflag="load16_word_swap" name="095-p1.p1" offset="0x000000" size="0x100000" crc="63b4d8ae" sha1="03aa9f6bab6aee685d1b57a52823797704eea845" /> |
| 5423 | 5423 | <!-- TC538200 --> |
| 5424 | 5424 | <rom loadflag="load16_word_swap" name="095-p2.sp2" offset="0x100000" size="0x200000" crc="cc15826e" sha1="44d6ac6c0ca697a6f367dcfd809b1e1771cb0635" /> |
| r31151 | r31152 | |
| 5471 | 5471 | <!-- MVS VERSION --> |
| 5472 | 5472 | <!-- This is a bug fixed revision applied over the original cart. The original P1 and P2 stayed in the cart and this --> |
| 5473 | 5473 | <!-- 512k ROM was added to replace the first 512k of P1. --> |
| 5474 | <dataarea name="maincpu" size="0x300000"> | |
| 5474 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 5475 | 5475 | <rom loadflag="load16_word_swap" name="095-p1.p1" offset="0x000000" size="0x100000" crc="63b4d8ae" sha1="03aa9f6bab6aee685d1b57a52823797704eea845" /> |
| 5476 | 5476 | <!-- TC538200 --> |
| 5477 | 5477 | <rom loadflag="load16_word_swap" name="095-p2.sp2" offset="0x100000" size="0x200000" crc="cc15826e" sha1="44d6ac6c0ca697a6f367dcfd809b1e1771cb0635" /> |
| r31151 | r31152 | |
| 5532 | 5532 | <sharedfeat name="release" value="MVS,AES" /> |
| 5533 | 5533 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5534 | 5534 | <part name="cart" interface="neo_cart"> |
| 5535 | <dataarea name="maincpu" size="0x300000"> | |
| 5535 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 5536 | 5536 | <rom loadflag="load16_word_swap" name="096-p1.p1" offset="0x000000" size="0x100000" crc="9edb420d" sha1="150d80707325ece351c72c21c6186cfb5996adba" /> |
| 5537 | 5537 | <!-- TC538200 --> |
| 5538 | 5538 | <rom loadflag="load16_word_swap" name="096-p2.sp2" offset="0x100000" size="0x200000" crc="4d5a2602" sha1="4c26d6135d2877d9c38169662033e9d0cc24d943" /> |
| r31151 | r31152 | |
| 5584 | 5584 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5585 | 5585 | <part name="cart" interface="neo_cart"> |
| 5586 | 5586 | <!-- KOREAN VERSION --> |
| 5587 | <dataarea name="maincpu" size="0x300000"> | |
| 5587 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 5588 | 5588 | <rom loadflag="load16_word_swap" name="196-p1k.p1" offset="0x000000" size="0x100000" crc="a0780789" sha1="83657922a9a3502653ef8cda45b15d9f935aa96a" /> |
| 5589 | 5589 | <rom loadflag="load16_word_swap" name="096-p2.sp2" offset="0x100000" size="0x200000" crc="4d5a2602" sha1="4c26d6135d2877d9c38169662033e9d0cc24d943" /> |
| 5590 | 5590 | <!-- TC5316200 --> |
| r31151 | r31152 | |
| 5640 | 5640 | <sharedfeat name="release" value="MVS,AES" /> |
| 5641 | 5641 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5642 | 5642 | <part name="cart" interface="neo_cart"> |
| 5643 | <dataarea name="maincpu" size="0x200000"> | |
| 5643 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 5644 | 5644 | <rom loadflag="load16_word_swap" name="097-p1.p1" offset="0x100000" size="0x100000" crc="0547121d" sha1="e0bb6c614f572b74ba9a9f0d3d5b69fbc91ebc52" /> |
| 5645 | 5645 | <!-- TC5316200 --> |
| 5646 | 5646 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 5714 | 5714 | <sharedfeat name="release" value="MVS,AES" /> |
| 5715 | 5715 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5716 | 5716 | <part name="cart" interface="neo_cart"> |
| 5717 | <dataarea name="maincpu" size="0x200000"> | |
| 5717 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 5718 | 5718 | <rom loadflag="load16_word_swap" name="200-p1.p1" offset="0x100000" size="0x100000" crc="28c83048" sha1="e7ef87e1de21d2bb17ef17bb08657e92363f0e9a" /> |
| 5719 | 5719 | <!-- mask rom TC5316200 --> |
| 5720 | 5720 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 5760 | 5760 | <sharedfeat name="release" value="MVS,AES" /> |
| 5761 | 5761 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5762 | 5762 | <part name="cart" interface="neo_cart"> |
| 5763 | <dataarea name="maincpu" size="0x200000"> | |
| 5763 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 5764 | 5764 | <rom loadflag="load16_word_swap" name="201-p1.p1" offset="0x100000" size="0x100000" crc="08d8daa5" sha1="b888993dbb7e9f0a28a01d7d2e1da00ef9cf6f38" /> |
| 5765 | 5765 | <!-- TC5316200 --> |
| 5766 | 5766 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 5806 | 5806 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5807 | 5807 | <part name="cart" interface="neo_cart"> |
| 5808 | 5808 | <!-- MVS ONLY RELEASE --> |
| 5809 | <dataarea name="maincpu" size="0x100000"> | |
| 5809 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 5810 | 5810 | <rom loadflag="load16_word_swap" name="202-p1.p1" offset="0x000000" size="0x080000" crc="2b61415b" sha1="0e3e4faf2fd6e63407425e1ac788003e75aeeb4f" /> |
| 5811 | 5811 | <!-- TC534200 --> |
| 5812 | 5812 | </dataarea> |
| r31151 | r31152 | |
| 5845 | 5845 | <sharedfeat name="release" value="MVS,AES" /> |
| 5846 | 5846 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5847 | 5847 | <part name="cart" interface="neo_cart"> |
| 5848 | <dataarea name="maincpu" size="0x100000"> | |
| 5848 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 5849 | 5849 | <rom loadflag="load16_word_swap" name="203-p1.p1" offset="0x000000" size="0x100000" crc="7ba70e2d" sha1="945f472cc3e7706f613c52df18de35c986d166e7" /> |
| 5850 | 5850 | <!-- TC538200 --> |
| 5851 | 5851 | </dataarea> |
| r31151 | r31152 | |
| 5894 | 5894 | <sharedfeat name="release" value="MVS,AES" /> |
| 5895 | 5895 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5896 | 5896 | <part name="cart" interface="neo_cart"> |
| 5897 | <dataarea name="maincpu" size="0x100000"> | |
| 5897 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 5898 | 5898 | <rom loadflag="load16_word_swap" name="206-p1.p1" offset="0x000000" size="0x100000" crc="c33ed21e" sha1="bffff0d17e587e67672227e60c0ebd3f3a7193e6" /> |
| 5899 | 5899 | <!-- mask rom TC538200 --> |
| 5900 | 5900 | </dataarea> |
| r31151 | r31152 | |
| 5939 | 5939 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5940 | 5940 | <part name="cart" interface="neo_cart"> |
| 5941 | 5941 | <!-- MVS ONLY RELEASE --> |
| 5942 | <dataarea name="maincpu" size="0x100000"> | |
| 5942 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 5943 | 5943 | <rom loadflag="load16_word_swap" name="207-p1.p1" offset="0x000000" size="0x100000" crc="334ea51e" sha1="0a642f8565ec6e9587ed767bcf177f4677547162" /> |
| 5944 | 5944 | <!-- TC538200 --> |
| 5945 | 5945 | </dataarea> |
| r31151 | r31152 | |
| 5978 | 5978 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 5979 | 5979 | <part name="cart" interface="neo_cart"> |
| 5980 | 5980 | <!-- MVS ONLY RELEASE --> |
| 5981 | <dataarea name="maincpu" size="0x200000"> | |
| 5981 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 5982 | 5982 | <rom loadflag="load16_word_swap" name="208-p1.p1" offset="0x100000" size="0x100000" crc="127f3d32" sha1="18e77b79b1197a89371533ef9b1e4d682c44d875" /> |
| 5983 | 5983 | <!-- TC5316200 --> |
| 5984 | 5984 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 6022 | 6022 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6023 | 6023 | <part name="cart" interface="neo_cart"> |
| 6024 | 6024 | <!-- MVS ONLY RELEASE --> |
| 6025 | <dataarea name="maincpu" size="0x200000"> | |
| 6025 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 6026 | 6026 | <rom loadflag="load16_word_swap" name="209-p1.p1" offset="0x100000" size="0x100000" crc="2a019a79" sha1="422a639e74284fef2e53e1b49cf8803b0a7e80c6" /> |
| 6027 | 6027 | <!-- mask rom TC5316200 --> |
| 6028 | 6028 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 6076 | 6076 | <sharedfeat name="release" value="MVS,AES" /> |
| 6077 | 6077 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6078 | 6078 | <part name="cart" interface="neo_cart"> |
| 6079 | <dataarea name="maincpu" size="0x200000"> | |
| 6079 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 6080 | 6080 | <rom loadflag="load16_word_swap" name="212-p1.p1" offset="0x100000" size="0x100000" crc="16c063a9" sha1="5432869f830eed816ee5ed71c7fd39f749d15619" /> |
| 6081 | 6081 | <!-- mask rom TC5316200 --> |
| 6082 | 6082 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 6124 | 6124 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6125 | 6125 | <part name="cart" interface="neo_cart"> |
| 6126 | 6126 | <!-- MVS ONLY RELEASE --> |
| 6127 | <dataarea name="maincpu" size="0x200000"> | |
| 6127 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 6128 | 6128 | <rom loadflag="load16_word_swap" name="213-p1.p1" offset="0x100000" size="0x100000" crc="e397d798" sha1="10f459111db4bab7aaa63ca47e83304a84300812" /> |
| 6129 | 6129 | <!-- mask rom TC5316200 --> |
| 6130 | 6130 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 6167 | 6167 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6168 | 6168 | <part name="cart" interface="neo_cart"> |
| 6169 | 6169 | <!-- MVS VERSION --> |
| 6170 | <dataarea name="maincpu" size="0x300000"> | |
| 6170 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 6171 | 6171 | <rom loadflag="load16_word_swap" name="214-p1.p1" offset="0x000000" size="0x100000" crc="52755d74" sha1="4232d627f1d2e6ea9fc8cf01571d77d4d5b8a1bb" /> |
| 6172 | 6172 | <!-- TC538200 --> |
| 6173 | 6173 | <rom loadflag="load16_word_swap" name="214-p2.sp2" offset="0x100000" size="0x200000" crc="002ccb73" sha1="3ae8df682c75027ca82db25491021eeba00a267e" /> |
| r31151 | r31152 | |
| 6217 | 6217 | <sharedfeat name="release" value="AES" /> |
| 6218 | 6218 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6219 | 6219 | <part name="cart" interface="neo_cart"> |
| 6220 | <dataarea name="maincpu" size="0x300000"> | |
| 6220 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 6221 | 6221 | <rom loadflag="load16_word_swap" name="214-pg1.p1" offset="0x000000" size="0x100000" crc="bd3757c9" sha1="35392a044117e46c088ff0fdd07d69a3faa4f96e" /> |
| 6222 | 6222 | <rom loadflag="load16_word_swap" name="214-p2.sp2" offset="0x100000" size="0x200000" crc="002ccb73" sha1="3ae8df682c75027ca82db25491021eeba00a267e" /> |
| 6223 | 6223 | <!-- TC5316200 --> |
| r31151 | r31152 | |
| 6273 | 6273 | <sharedfeat name="release" value="MVS,AES" /> |
| 6274 | 6274 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6275 | 6275 | <part name="cart" interface="neo_cart"> |
| 6276 | <dataarea name="maincpu" size="0x200000"> | |
| 6276 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 6277 | 6277 | <rom loadflag="load16_word_swap" name="215-p1.p1" offset="0x100000" size="0x100000" crc="519b4ba3" sha1="5aa59514b23aa663f2c4014ee94a31e9f59151de" /> |
| 6278 | 6278 | <!-- TC5316200 --> |
| 6279 | 6279 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 6323 | 6323 | <sharedfeat name="release" value="MVS,AES" /> |
| 6324 | 6324 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6325 | 6325 | <part name="cart" interface="neo_cart"> |
| 6326 | <dataarea name="maincpu" size="0x200000"> | |
| 6326 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 6327 | 6327 | <rom loadflag="load16_word_swap" name="216-p1.p1" offset="0x100000" size="0x100000" crc="75d2b3de" sha1="ee778656c26828935ee2a2bfd0ce5a22aa681c10" /> |
| 6328 | 6328 | <!-- mask rom TC5316200 --> |
| 6329 | 6329 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 6383 | 6383 | <sharedfeat name="release" value="MVS,AES" /> |
| 6384 | 6384 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6385 | 6385 | <part name="cart" interface="neo_cart"> |
| 6386 | <dataarea name="maincpu" size="0x300000"> | |
| 6386 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 6387 | 6387 | <rom loadflag="load16_word_swap" name="217-p1.p1" offset="0x000000" size="0x100000" crc="3e97ed69" sha1="336bcae375a5109945d11356503bf0d9f4a9a50a" /> |
| 6388 | 6388 | <!-- TC538200 --> |
| 6389 | 6389 | <rom loadflag="load16_word_swap" name="217-p2.sp2" offset="0x100000" size="0x200000" crc="191fca88" sha1="e318e5931704779bbe461719a5eeeba89bd83a5d" /> |
| r31151 | r31152 | |
| 6438 | 6438 | <sharedfeat name="release" value="MVS,AES" /> |
| 6439 | 6439 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6440 | 6440 | <part name="cart" interface="neo_cart"> |
| 6441 | <dataarea name="maincpu" size="0x200000"> | |
| 6441 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 6442 | 6442 | <rom loadflag="load16_word_swap" name="218-p1.p1" offset="0x100000" size="0x100000" crc="ca372303" sha1="67991e4fef9b36bc7d909810eebb857ac2f906f1" /> |
| 6443 | 6443 | <!-- mask rom TC5316200 --> |
| 6444 | 6444 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 6492 | 6492 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6493 | 6493 | <part name="cart" interface="neo_cart"> |
| 6494 | 6494 | <!-- MVS ONLY RELEASE --> |
| 6495 | <dataarea name="maincpu" size="0x200000"> | |
| 6495 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 6496 | 6496 | <rom loadflag="load16_word_swap" name="219-p1.p1" offset="0x100000" size="0x100000" crc="6af0e574" sha1="c3f0fed0d942e48c99c80b1713f271c033ce0f4f" /> |
| 6497 | 6497 | <!-- TC5316200 --> |
| 6498 | 6498 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 6535 | 6535 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6536 | 6536 | <part name="cart" interface="neo_cart"> |
| 6537 | 6537 | <!-- Prototype - crcs should match the ones of the unreleased dump. --> |
| 6538 | <dataarea name="maincpu" size="0x200000"> | |
| 6538 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 6539 | 6539 | <rom loadflag="load16_word_swap" name="proto_220-p1.p1" offset="0x100000" size="0x100000" crc="62a942c6" sha1="12aaa7d9bd84328d1bf4610e056b5c57d0252537" /> |
| 6540 | 6540 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| 6541 | 6541 | </dataarea> |
| r31151 | r31152 | |
| 6565 | 6565 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6566 | 6566 | <part name="cart" interface="neo_cart"> |
| 6567 | 6567 | <!-- Prototype - bootleg/hack based on later release. --> |
| 6568 | <dataarea name="maincpu" size="0x200000"> | |
| 6568 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 6569 | 6569 | <rom loadflag="load16_word_swap" name="proto_220-p1o.p1" offset="0x100000" size="0x100000" crc="ce37e3a0" sha1="488f95fa15f56eea6666dda13d96ec29dba18e19" /> |
| 6570 | 6570 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| 6571 | 6571 | </dataarea> |
| r31151 | r31152 | |
| 6601 | 6601 | <sharedfeat name="release" value="MVS,AES" /> |
| 6602 | 6602 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6603 | 6603 | <part name="cart" interface="neo_cart"> |
| 6604 | <dataarea name="maincpu" size="0x100000"> | |
| 6604 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 6605 | 6605 | <rom loadflag="load16_word_swap" name="221-p1.p1" offset="0x000000" size="0x080000" crc="7be82353" sha1="08ab39f52b893591c13a7d7aa26b20ce86e9ddf5" /> |
| 6606 | 6606 | <!-- mask rom TC534200 --> |
| 6607 | 6607 | </dataarea> |
| r31151 | r31152 | |
| 6642 | 6642 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6643 | 6643 | <part name="cart" interface="neo_cart"> |
| 6644 | 6644 | <!-- MVS AND AES VERSION --> |
| 6645 | <dataarea name="maincpu" size="0x500000"> | |
| 6645 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 6646 | 6646 | <rom loadflag="load16_word_swap" name="222-p1.p1" offset="0x000000" size="0x100000" crc="1a5cb56d" sha1="9a0a5a1c7c5d428829f22d3d17f7033d43a51b5b" /> |
| 6647 | 6647 | <!-- TC538200 --> |
| 6648 | 6648 | <rom loadflag="load16_word_swap" name="222-p2.sp2" offset="0x100000" size="0x400000" crc="b023cd8b" sha1="35b4cec9858225f90acdfa16ed8a3017d0d08327" /> |
| r31151 | r31152 | |
| 6694 | 6694 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6695 | 6695 | <part name="cart" interface="neo_cart"> |
| 6696 | 6696 | <!-- KOREAN VERSION --> |
| 6697 | <dataarea name="maincpu" size="0x500000"> | |
| 6697 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 6698 | 6698 | <rom loadflag="load16_word_swap" name="222-p1k.p1" offset="0x000000" size="0x100000" crc="06e0a25d" sha1="81e6727e0acb67ae41383518c0fc07f28d232979" /> |
| 6699 | 6699 | <rom loadflag="load16_word_swap" name="222-p2.sp2" offset="0x100000" size="0x400000" crc="b023cd8b" sha1="35b4cec9858225f90acdfa16ed8a3017d0d08327" /> |
| 6700 | 6700 | <!-- TC5332205 --> |
| r31151 | r31152 | |
| 6749 | 6749 | <sharedfeat name="release" value="MVS,AES" /> |
| 6750 | 6750 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6751 | 6751 | <part name="cart" interface="neo_cart"> |
| 6752 | <dataarea name="maincpu" size="0x500000"> | |
| 6752 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 6753 | 6753 | <rom loadflag="load16_word_swap" name="223-p1.p1" offset="0x000000" size="0x100000" crc="f84a2d1d" sha1="fc19225d9dbdb6bd0808023ee32c7829f6ffdef6" /> |
| 6754 | 6754 | <!-- TC538200 --> |
| 6755 | 6755 | <rom loadflag="load16_word_swap" name="223-p2.sp2" offset="0x100000" size="0x400000" crc="addd8f08" sha1="abaf5b86c8ec915c07ef2d83fce9ad03acaa4817" /> |
| r31151 | r31152 | |
| 6801 | 6801 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6802 | 6802 | <part name="cart" interface="neo_cart"> |
| 6803 | 6803 | <!-- KOREAN VERSION --> |
| 6804 | <dataarea name="maincpu" size="0x500000"> | |
| 6804 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 6805 | 6805 | <rom loadflag="load16_word_swap" name="223-p1k.p1" offset="0x000000" size="0x100000" crc="b78c8391" sha1="936b356ac135331b10a37bc10882ec2e4f6b400b" /> |
| 6806 | 6806 | <!-- Chip label is correct. They used Cart ID 0124 as 0123 was allready used by quizdaisk --> |
| 6807 | 6807 | <rom loadflag="load16_word_swap" name="223-p2.sp2" offset="0x100000" size="0x400000" crc="addd8f08" sha1="abaf5b86c8ec915c07ef2d83fce9ad03acaa4817" /> |
| r31151 | r31152 | |
| 6858 | 6858 | <sharedfeat name="release" value="MVS,AES" /> |
| 6859 | 6859 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6860 | 6860 | <part name="cart" interface="neo_cart"> |
| 6861 | <dataarea name="maincpu" size="0x200000"> | |
| 6861 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 6862 | 6862 | <rom loadflag="load16_word_swap" name="224-p1.p1" offset="0x100000" size="0x100000" crc="7697e445" sha1="5b55ca120f77a931d40719b14e0bfc8cac1d628c" /> |
| 6863 | 6863 | <!-- mask rom TC5316200 --> |
| 6864 | 6864 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 6904 | 6904 | <sharedfeat name="release" value="MVS,AES" /> |
| 6905 | 6905 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6906 | 6906 | <part name="cart" interface="neo_cart"> |
| 6907 | <dataarea name="maincpu" size="0x300000"> | |
| 6907 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 6908 | 6908 | <rom loadflag="load16_word_swap" name="225-p1.p1" offset="0x000000" size="0x100000" crc="b14da766" sha1="bdffd72ff705fc6b085a4026217bac1c4bc93163" /> |
| 6909 | 6909 | <!-- TC538200 --> |
| 6910 | 6910 | <rom loadflag="load16_word_swap" name="225-p2.sp2" offset="0x100000" size="0x200000" crc="fe190665" sha1="739d9a8fc2da34381654d9e291141eacc210ae5c" /> |
| r31151 | r31152 | |
| 6960 | 6960 | <sharedfeat name="release" value="MVS,AES" /> |
| 6961 | 6961 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 6962 | 6962 | <part name="cart" interface="neo_cart"> |
| 6963 | <dataarea name="maincpu" size="0x200000"> | |
| 6963 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 6964 | 6964 | <rom loadflag="load16_word_swap" name="227-p1.p1" offset="0x100000" size="0x100000" crc="daf101d2" sha1="96b90f884bae2969ebd8c04aba509928464e2433" /> |
| 6965 | 6965 | <!-- mask rom TC5316200 --> |
| 6966 | 6966 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 7005 | 7005 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7006 | 7006 | <part name="cart" interface="neo_cart"> |
| 7007 | 7007 | <!-- Prototype --> |
| 7008 | <dataarea name="maincpu" size="0x100000"> | |
| 7008 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 7009 | 7009 | <rom loadflag="load16_word_swap" name="proto_228-p1.p1" offset="0x000000" size="0x100000" crc="6033172e" sha1="f57fb706aa8dd9e5f9e992a5d35c1799578b59f8" /> |
| 7010 | 7010 | </dataarea> |
| 7011 | 7011 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
| 7047 | 7047 | <sharedfeat name="release" value="MVS,AES" /> |
| 7048 | 7048 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7049 | 7049 | <part name="cart" interface="neo_cart"> |
| 7050 | <dataarea name="maincpu" size="0x200000"> | |
| 7050 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 7051 | 7051 | <rom loadflag="load16_word_swap" name="230-p1.p1" offset="0x100000" size="0x100000" crc="ed24a6e6" sha1="3fb77ae696d92d2f9a5d589e08b708545c7cda0a" /> |
| 7052 | 7052 | <!-- TC5316200 --> |
| 7053 | 7053 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 7093 | 7093 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7094 | 7094 | <part name="cart" interface="neo_cart"> |
| 7095 | 7095 | <!-- MVS ONLY RELEASE --> |
| 7096 | <dataarea name="maincpu" size="0x100000"> | |
| 7096 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 7097 | 7097 | <rom loadflag="load16_word_swap" name="231-p1.p1" offset="0x000000" size="0x080000" crc="61be1810" sha1="1ab0e11352ca05329c6e3f5657b60e4a227fcbfb" /> |
| 7098 | 7098 | <!-- mask rom TC534200 --> |
| 7099 | 7099 | </dataarea> |
| r31151 | r31152 | |
| 7138 | 7138 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7139 | 7139 | <part name="cart" interface="neo_cart"> |
| 7140 | 7140 | <!-- MVS VERSION --> |
| 7141 | <dataarea name="maincpu" size="0x500000"> | |
| 7141 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 7142 | 7142 | <rom loadflag="load16_word_swap" name="232-p1.p1" offset="0x000000" size="0x100000" crc="7db81ad9" sha1="8bc42be872fd497eb198ca13bf004852b88eb1dc" /> |
| 7143 | 7143 | <!-- TC538200 --> |
| 7144 | 7144 | <rom loadflag="load16_word_swap" name="232-p2.sp2" offset="0x100000" size="0x400000" crc="158b23f6" sha1="9744620a70513490aaf9c5eda33e5ec31222be19" /> |
| r31151 | r31152 | |
| 7185 | 7185 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7186 | 7186 | <part name="cart" interface="neo_cart"> |
| 7187 | 7187 | <!-- AES VERSION --> |
| 7188 | <dataarea name="maincpu" size="0x500000"> | |
| 7188 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 7189 | 7189 | <rom loadflag="load16_word_swap" name="232-pg1.p1" offset="0x000000" size="0x100000" crc="5c2400b7" sha1="49e23f80c012c62146a1bb8f254a7597823de430" /> |
| 7190 | 7190 | <!-- TC538200 --> |
| 7191 | 7191 | <rom loadflag="load16_word_swap" name="232-p2.sp2" offset="0x100000" size="0x400000" crc="158b23f6" sha1="9744620a70513490aaf9c5eda33e5ec31222be19" /> |
| r31151 | r31152 | |
| 7233 | 7233 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7234 | 7234 | <part name="cart" interface="neo_cart"> |
| 7235 | 7235 | <!-- KOREAN VERSION --> |
| 7236 | <dataarea name="maincpu" size="0x500000"> | |
| 7236 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 7237 | 7237 | <rom loadflag="load16_word_swap" name="232-p1.p1" offset="0x000000" size="0x100000" crc="7db81ad9" sha1="8bc42be872fd497eb198ca13bf004852b88eb1dc" /> |
| 7238 | 7238 | <!-- TC538200 --> |
| 7239 | 7239 | <rom loadflag="load16_word_swap" name="232-p2.sp2" offset="0x100000" size="0x400000" crc="158b23f6" sha1="9744620a70513490aaf9c5eda33e5ec31222be19" /> |
| r31151 | r31152 | |
| 7285 | 7285 | <sharedfeat name="release" value="MVS,AES" /> |
| 7286 | 7286 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7287 | 7287 | <part name="cart" interface="neo_cart"> |
| 7288 | <dataarea name="maincpu" size="0x100000"> | |
| 7288 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 7289 | 7289 | <rom loadflag="load16_word_swap" name="233-p1.p1" offset="0x000000" size="0x100000" crc="931e17fa" sha1="4a95c4b79d0878485ce272e9f4c4f647bec0e070" /> |
| 7290 | 7290 | <!-- TC538200 --> |
| 7291 | 7291 | </dataarea> |
| r31151 | r31152 | |
| 7332 | 7332 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7333 | 7333 | <part name="cart" interface="neo_cart"> |
| 7334 | 7334 | <!-- MVS VERSION --> |
| 7335 | <dataarea name="maincpu" size="0x500000"> | |
| 7335 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 7336 | 7336 | <rom loadflag="load16_word_swap" name="234-p1.p1" offset="0x000000" size="0x100000" crc="e123a5a3" sha1="a3ddabc00feeb54272b145246612ad4632b0e413" /> |
| 7337 | 7337 | <!-- TC538200 --> |
| 7338 | 7338 | <rom loadflag="load16_word_swap" name="234-p2.sp2" offset="0x100000" size="0x400000" crc="0fdc289e" sha1="1ff31c0b0f4f9ddbedaf4bcf927faaae81892ec7" /> |
| r31151 | r31152 | |
| 7381 | 7381 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7382 | 7382 | <part name="cart" interface="neo_cart"> |
| 7383 | 7383 | <!-- AES VERSION --> |
| 7384 | <dataarea name="maincpu" size="0x500000"> | |
| 7384 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 7385 | 7385 | <rom loadflag="load16_word_swap" name="234-pg1.p1" offset="0x000000" size="0x100000" crc="cd01c06d" sha1="d66142571afe07c6191b52f319f1bc8bc8541c14" /> |
| 7386 | 7386 | <!-- TC538200 --> |
| 7387 | 7387 | <rom loadflag="load16_word_swap" name="234-p2.sp2" offset="0x100000" size="0x400000" crc="0fdc289e" sha1="1ff31c0b0f4f9ddbedaf4bcf927faaae81892ec7" /> |
| r31151 | r31152 | |
| 7431 | 7431 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7432 | 7432 | <part name="cart" interface="neo_cart"> |
| 7433 | 7433 | <!-- KOREAN VERSION --> |
| 7434 | <dataarea name="maincpu" size="0x500000"> | |
| 7434 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 7435 | 7435 | <rom loadflag="load16_word_swap" name="134-p1k.p1" offset="0x000000" size="0x100000" crc="906f3065" sha1="25167665f1b8e82e13f7fcf4d0e3c54a925c2a58" /> |
| 7436 | 7436 | <!-- TC538200 --> |
| 7437 | 7437 | <rom loadflag="load16_word_swap" name="234-p2.sp2" offset="0x100000" size="0x400000" crc="0fdc289e" sha1="1ff31c0b0f4f9ddbedaf4bcf927faaae81892ec7" /> |
| r31151 | r31152 | |
| 7486 | 7486 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7487 | 7487 | <part name="cart" interface="neo_cart"> |
| 7488 | 7488 | <!-- MVS ONLY RELEASE --> |
| 7489 | <dataarea name="maincpu" size="0x100000"> | |
| 7489 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 7490 | 7490 | <rom loadflag="load16_word_swap" name="235-p1.p1" offset="0x000000" size="0x080000" crc="afed5de2" sha1="a5d82c6dbe687505e8c8d7339908da45cd379a0b" /> |
| 7491 | 7491 | </dataarea> |
| 7492 | 7492 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
| 7531 | 7531 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7532 | 7532 | <part name="cart" interface="neo_cart"> |
| 7533 | 7533 | <!-- MVS ONLY RELEASE --> |
| 7534 | <dataarea name="maincpu" size="0x100000"> | |
| 7534 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 7535 | 7535 | <rom loadflag="load16_word_swap" name="237-p1.p1" offset="0x000000" size="0x100000" crc="be96e44f" sha1="43679da8664fbb491103a1108040ddf94d59fc2b" /> |
| 7536 | 7536 | <!-- TC538200 --> |
| 7537 | 7537 | </dataarea> |
| r31151 | r31152 | |
| 7570 | 7570 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7571 | 7571 | <part name="cart" interface="neo_cart"> |
| 7572 | 7572 | <!-- MVS ONLY RELEASE --> |
| 7573 | <dataarea name="maincpu" size="0x500000"> | |
| 7573 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 7574 | 7574 | <rom loadflag="load16_word_swap" name="238-p1.p1" offset="0x000000" size="0x100000" crc="5677456f" sha1="f76169fa5c90871d65e2a16fd1bb036c90533ac8" /> |
| 7575 | 7575 | <rom loadflag="load16_word_swap" name="238-p2.sp2" offset="0x100000" size="0x400000" crc="5b4a09c5" sha1="de04036cba2da4bb2da73d902d1822b82b4f67a9" /> |
| 7576 | 7576 | <!-- TC5332205 --> |
| r31151 | r31152 | |
| 7618 | 7618 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7619 | 7619 | <part name="cart" interface="neo_cart"> |
| 7620 | 7620 | <!-- MVS ONLY RELEASE --> |
| 7621 | <dataarea name="maincpu" size="0x500000"> | |
| 7621 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 7622 | 7622 | <rom loadflag="load16_word_swap" name="238-pg1.p1" offset="0x000000" size="0x100000" crc="efedf8dc" sha1="f638df9bf7aa7d514ee2bccfc7f2adbf39ca83fc" /> |
| 7623 | 7623 | <!-- mask rom TC538200 --> |
| 7624 | 7624 | <rom loadflag="load16_word_swap" name="238-p2.sp2" offset="0x100000" size="0x400000" crc="5b4a09c5" sha1="de04036cba2da4bb2da73d902d1822b82b4f67a9" /> |
| r31151 | r31152 | |
| 7673 | 7673 | <sharedfeat name="release" value="MVS,AES" /> |
| 7674 | 7674 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7675 | 7675 | <part name="cart" interface="neo_cart"> |
| 7676 | <dataarea name="maincpu" size="0x300000"> | |
| 7676 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 7677 | 7677 | <rom loadflag="load16_word_swap" name="239-p1.p1" offset="0x000000" size="0x100000" crc="183682f8" sha1="dcee1c2cf4a991ca1f9f2b40c4a738f21682807b" /> |
| 7678 | 7678 | <!-- TC538200 --> |
| 7679 | 7679 | <rom loadflag="load16_word_swap" name="239-p2.sp2" offset="0x100000" size="0x200000" crc="9a9f4154" sha1="f8805453d0995c8fa16cd9accfb7a990071ca630" /> |
| r31151 | r31152 | |
| 7730 | 7730 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7731 | 7731 | <part name="cart" interface="neo_cart"> |
| 7732 | 7732 | <!-- MVS VERSION --> |
| 7733 | <dataarea name="maincpu" size="0x500000"> | |
| 7733 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 7734 | 7734 | <rom loadflag="load16_word_swap" name="240-p1.p1" offset="0x000000" size="0x100000" crc="80e41205" sha1="8f83eb8ff54be4ec40f8a0dd2cbe56c54908d00a" /> |
| 7735 | 7735 | <!-- TC538200 --> |
| 7736 | 7736 | <rom loadflag="load16_word_swap" name="240-p2.sp2" offset="0x100000" size="0x400000" crc="960aa88d" sha1="3d9e785891871af90313f178dca2724633406674" /> |
| r31151 | r31152 | |
| 7779 | 7779 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7780 | 7780 | <part name="cart" interface="neo_cart"> |
| 7781 | 7781 | <!-- AES VERSION --> |
| 7782 | <dataarea name="maincpu" size="0x500000"> | |
| 7782 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 7783 | 7783 | <rom loadflag="load16_word_swap" name="240-pg1.p1" offset="0x000000" size="0x100000" crc="b6969780" sha1="e3373d18e0f0724d69efb8024a27cca121f1b5b2" /> |
| 7784 | 7784 | <!-- TC538200 --> |
| 7785 | 7785 | <rom loadflag="load16_word_swap" name="240-p2.sp2" offset="0x100000" size="0x400000" crc="960aa88d" sha1="3d9e785891871af90313f178dca2724633406674" /> |
| r31151 | r31152 | |
| 7829 | 7829 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7830 | 7830 | <part name="cart" interface="neo_cart"> |
| 7831 | 7831 | <!-- KOREAN VERSION --> |
| 7832 | <dataarea name="maincpu" size="0x500000"> | |
| 7832 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 7833 | 7833 | <rom loadflag="load16_word_swap" name="140-p1k.p1" offset="0x000000" size="0x100000" crc="965edee1" sha1="7f4b947b19ccfee32fc73e4fd89645eb313b5c77" /> |
| 7834 | 7834 | <!-- mask rom TC538200 --> |
| 7835 | 7835 | <rom loadflag="load16_word_swap" name="240-p2.sp2" offset="0x100000" size="0x400000" crc="960aa88d" sha1="3d9e785891871af90313f178dca2724633406674" /> |
| r31151 | r31152 | |
| 7885 | 7885 | <sharedfeat name="release" value="MVS,AES" /> |
| 7886 | 7886 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 7887 | 7887 | <part name="cart" interface="neo_cart"> |
| 7888 | <dataarea name="maincpu" size="0x300000"> | |
| 7888 | <dataarea name="maincpu" width="16" endianness="big" size="0x300000"> | |
| 7889 | 7889 | <rom loadflag="load16_word_swap" name="241-p1.p1" offset="0x000000" size="0x100000" crc="2a53c5da" sha1="5a6aba482cac588a6c2c51179c95b487c6e11899" /> |
| 7890 | 7890 | <!-- TC538200 --> |
| 7891 | 7891 | <rom loadflag="load16_word_swap" name="241-p2.sp2" offset="0x100000" size="0x200000" crc="38883f44" sha1="fcf34b8c6e37774741542393b963635412484a27" /> |
| r31151 | r31152 | |
| 7937 | 7937 | <!-- encrypted code + protection --> |
| 7938 | 7938 | <!-- MVS VERSION --> |
| 7939 | 7939 | <feature name="slot" value="rom_kof98" /> |
| 7940 | <dataarea name="maincpu" size="0x600000"> | |
| 7940 | <dataarea name="maincpu" width="16" endianness="big" size="0x600000"> | |
| 7941 | 7941 | <rom loadflag="load16_word_swap" name="242-p1.p1" offset="0x000000" size="0x200000" crc="8893df89" sha1="0452828785110601c65f667209fc2d2926cd3751" /> |
| 7942 | 7942 | <!-- mask rom 16mbit --> |
| 7943 | 7943 | <rom loadflag="load16_word_swap" name="242-p2.sp2" offset="0x200000" size="0x400000" crc="980aba4c" sha1="5e735929ec6c3ca5b2efae3c7de47bcbb8ade2c5" /> |
| r31151 | r31152 | |
| 7993 | 7993 | <!-- encrypted code + protection, only z80 rom is different to kof98 --> |
| 7994 | 7994 | <!-- KOREAN VERSION --> |
| 7995 | 7995 | <feature name="slot" value="rom_kof98" /> |
| 7996 | <dataarea name="maincpu" size="0x600000"> | |
| 7996 | <dataarea name="maincpu" width="16" endianness="big" size="0x600000"> | |
| 7997 | 7997 | <rom loadflag="load16_word_swap" name="242-p1.p1" offset="0x000000" size="0x200000" crc="8893df89" sha1="0452828785110601c65f667209fc2d2926cd3751" /> |
| 7998 | 7998 | <!-- mask rom 16mbit --> |
| 7999 | 7999 | <rom loadflag="load16_word_swap" name="242-p2.sp2" offset="0x200000" size="0x400000" crc="980aba4c" sha1="5e735929ec6c3ca5b2efae3c7de47bcbb8ade2c5" /> |
| r31151 | r31152 | |
| 8050 | 8050 | <!-- encrypted code + protection, only z80 rom is different to kof98 --> |
| 8051 | 8051 | <!-- KOREAN VERSION --> |
| 8052 | 8052 | <feature name="slot" value="rom_kof98" />> |
| 8053 | <dataarea name="maincpu" size="0x600000"> | |
| 8053 | <dataarea name="maincpu" width="16" endianness="big" size="0x600000"> | |
| 8054 | 8054 | <rom loadflag="load16_word_swap" name="242-p1.p1" offset="0x000000" size="0x200000" crc="8893df89" sha1="0452828785110601c65f667209fc2d2926cd3751" /> |
| 8055 | 8055 | <!-- mask rom 16mbit --> |
| 8056 | 8056 | <rom loadflag="load16_word_swap" name="242-p2.sp2" offset="0x200000" size="0x400000" crc="980aba4c" sha1="5e735929ec6c3ca5b2efae3c7de47bcbb8ade2c5" /> |
| r31151 | r31152 | |
| 8104 | 8104 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 8105 | 8105 | <part name="cart" interface="neo_cart"> |
| 8106 | 8106 | <!-- AES VERSION --> |
| 8107 | <dataarea name="maincpu" size="0x500000"> | |
| 8107 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 8108 | 8108 | <rom loadflag="load16_word_swap" name="242-pn1.p1" offset="0x000000" size="0x100000" crc="61ac868a" sha1="26577264aa72d6af272952a876fcd3775f53e3fa" /> |
| 8109 | 8109 | <!-- TC538200 --> |
| 8110 | 8110 | <rom loadflag="load16_word_swap" name="242-p2.sp2" offset="0x100000" size="0x400000" crc="980aba4c" sha1="5e735929ec6c3ca5b2efae3c7de47bcbb8ade2c5" /> |
| r31151 | r31152 | |
| 8166 | 8166 | <part name="cart" interface="neo_cart"> |
| 8167 | 8167 | <!-- MVS AND AES VERSION --> |
| 8168 | 8168 | <!-- later revision --> |
| 8169 | <dataarea name="maincpu" size="0x500000"> | |
| 8169 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 8170 | 8170 | <rom loadflag="load16_word_swap" name="243-pg1.p1" offset="0x000000" size="0x100000" crc="af1e6554" sha1="bd8526f60c2472937728a5d933fbd19d899f2cba" /> |
| 8171 | 8171 | <!-- TC538200 --> |
| 8172 | 8172 | <rom loadflag="load16_word_swap" name="243-pg2.sp2" offset="0x100000" size="0x400000" crc="add4a30b" sha1="7db62564db49fe0218cbb35b119d62582a24d658" /> |
| r31151 | r31152 | |
| 8221 | 8221 | <sharedfeat name="release" value="MVS,AES" /> |
| 8222 | 8222 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 8223 | 8223 | <part name="cart" interface="neo_cart"> |
| 8224 | <dataarea name="maincpu" size="0x200000"> | |
| 8224 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 8225 | 8225 | <rom loadflag="load16_word_swap" name="244-p1.p1" offset="0x100000" size="0x100000" crc="f8fdb7a5" sha1="f34ee5d1c24e70427d05ef488f46906dbd9f9950" /> |
| 8226 | 8226 | <!-- TC5316200 --> |
| 8227 | 8227 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 8263 | 8263 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 8264 | 8264 | <part name="cart" interface="neo_cart"> |
| 8265 | 8265 | <!-- MVS ONLY RELEASE --> |
| 8266 | <dataarea name="maincpu" size="0x200000"> | |
| 8266 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 8267 | 8267 | <rom loadflag="load16_word_swap" name="245-p1.p1" offset="0x100000" size="0x100000" crc="c828876d" sha1="1dcba850e5cf8219d0945612cfded6d20ca8682a" /> |
| 8268 | 8268 | <!-- mask rom TC5316200 --> |
| 8269 | 8269 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 8314 | 8314 | <sharedfeat name="release" value="MVS,AES" /> |
| 8315 | 8315 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 8316 | 8316 | <part name="cart" interface="neo_cart"> |
| 8317 | <dataarea name="maincpu" size="0x500000"> | |
| 8317 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 8318 | 8318 | <rom loadflag="load16_word_swap" name="246-p1.p1" offset="0x000000" size="0x100000" crc="6d4b7781" sha1="3c9d53d5da9842bfd45037c919064dda3fb2e089" /> |
| 8319 | 8319 | <!-- TC538200 --> |
| 8320 | 8320 | <rom loadflag="load16_word_swap" name="246-p2.sp2" offset="0x100000" size="0x400000" crc="72ea04c3" sha1="4fb1d22c30f5f3db4637dd92a4d2705c88de399d" /> |
| r31151 | r31152 | |
| 8367 | 8367 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 8368 | 8368 | <part name="cart" interface="neo_cart"> |
| 8369 | 8369 | <!-- MVS ONLY RELEASE --> |
| 8370 | <dataarea name="maincpu" size="0x100000"> | |
| 8370 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 8371 | 8371 | <rom loadflag="load16_word_swap" name="247-p1.p1" offset="0x000000" size="0x100000" crc="95779094" sha1="a985e033bc6f137fa65855d3eed245d66d5b244a" /> |
| 8372 | 8372 | <!-- mask rom TC538200 --> |
| 8373 | 8373 | </dataarea> |
| r31151 | r31152 | |
| 8406 | 8406 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 8407 | 8407 | <part name="cart" interface="neo_cart"> |
| 8408 | 8408 | <!-- MVS ONLY RELEASE --> |
| 8409 | <dataarea name="maincpu" size="0x100000"> | |
| 8409 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 8410 | 8410 | <rom loadflag="load16_word_swap" name="248-p1.p1" offset="0x000000" size="0x100000" crc="9d6c0754" sha1="95c70c2d51fc4de01e768e03cc800a850aaad5dc" /> |
| 8411 | 8411 | <!-- TC538200 --> |
| 8412 | 8412 | </dataarea> |
| r31151 | r31152 | |
| 8445 | 8445 | <sharedfeat name="release" value="MVS, AES" /> |
| 8446 | 8446 | <sharedfeat name="compatibility" value="MVS, AES" /> |
| 8447 | 8447 | <part name="cart" interface="neo_cart"> |
| 8448 | <dataarea name="maincpu" size="0x100000"> | |
| 8448 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 8449 | 8449 | <rom loadflag="load16_word_swap" name="071.p1" offset="0x000000" size="0x080000" crc="7687197d" sha1="4bb9cb7819807f7a7e1f85f1c4faac4a2f8761e8" /> |
| 8450 | 8450 | </dataarea> |
| 8451 | 8451 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
| 8471 | 8471 | <sharedfeat name="release" value="AES" /> |
| 8472 | 8472 | <sharedfeat name="compatibility" value="AES" /> |
| 8473 | 8473 | <part name="cart" interface="neo_cart"> |
| 8474 | <dataarea name="maincpu" size="0x100000"> | |
| 8474 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 8475 | 8475 | <rom loadflag="load16_word_swap" name="316.p1" offset="0x000000" size="0x100000" crc="99604539" sha1="88d5f4fe56516aa36496cafd2508f6864118f1e2" /> |
| 8476 | 8476 | </dataarea> |
| 8477 | 8477 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
| 8507 | 8507 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 8508 | 8508 | <part name="cart" interface="neo_cart"> |
| 8509 | 8509 | <!-- MVS ONLY RELEASE --> |
| 8510 | <dataarea name="maincpu" size="0x200000"> | |
| 8510 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 8511 | 8511 | <rom loadflag="load16_word_swap" name="249-p1.p1" offset="0x100000" size="0x100000" crc="c9386118" sha1="5554662c7bc8605889cac4a67fee05bbb4eb786f" /> |
| 8512 | 8512 | <!-- TC5316200 --> |
| 8513 | 8513 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 8551 | 8551 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 8552 | 8552 | <part name="cart" interface="neo_cart"> |
| 8553 | 8553 | <feature name="slot" value="rom_mslugx" /> |
| 8554 | <dataarea name="maincpu" size="0x500000"> | |
| 8554 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 8555 | 8555 | <rom loadflag="load16_word_swap" name="250-p1.p1" offset="0x000000" size="0x100000" crc="81f1f60b" sha1="4c19f2e9824e606178ac1c9d4b0516fbaa625035" /> |
| 8556 | 8556 | <!-- TC538200 --> |
| 8557 | 8557 | <rom loadflag="load16_word_swap" name="250-p2.ep1" offset="0x100000" size="0x400000" crc="1fda2e12" sha1="18aaa7a3ba8da99f78c430e9be69ccde04bc04d9" /> |
| r31151 | r31152 | |
| 8611 | 8611 | <!-- Original Version - Encrypted Code & GFX --> |
| 8612 | 8612 | <!-- MVS VERSION --> |
| 8613 | 8613 | <feature name="slot" value="rom_sma_kof99" /> |
| 8614 | <dataarea name="maincpu" size="0x900000"> | |
| 8614 | <dataarea name="maincpu" width="16" endianness="big" size="0x900000"> | |
| 8615 | 8615 | <rom loadflag="load16_word_swap" name="ka.neo-sma" offset="0x0c0000" size="0x040000" crc="7766d09e" sha1="4e0a49d1ad669a62676cb30f527c6590cde80194" /> |
| 8616 | 8616 | <!-- stored in the custom chip --> |
| 8617 | 8617 | <rom loadflag="load16_word_swap" name="251-p1.p1" offset="0x100000" size="0x400000" crc="006e4532" sha1="47791ab4044ad55988b1d3412d95b65b91a163c8" /> |
| r31151 | r31152 | |
| 8669 | 8669 | <!-- Original Version - Encrypted Code & GFX --> |
| 8670 | 8670 | <!-- AES VERSION --> |
| 8671 | 8671 | <feature name="slot" value="rom_sma_kof99" /> |
| 8672 | <dataarea name="maincpu" size="0x900000"> | |
| 8672 | <dataarea name="maincpu" width="16" endianness="big" size="0x900000"> | |
| 8673 | 8673 | <rom loadflag="load16_word_swap" name="kc.neo-sma" offset="0x0c0000" size="0x040000" crc="6c9d0647" sha1="2a0ce62ca6c18007e8fbe1b60475c7874ab79389" /> |
| 8674 | 8674 | <!-- stored in the custom chip --> |
| 8675 | 8675 | <rom loadflag="load16_word_swap" name="251-p1.p1" offset="0x100000" size="0x400000" crc="006e4532" sha1="47791ab4044ad55988b1d3412d95b65b91a163c8" /> |
| r31151 | r31152 | |
| 8726 | 8726 | <part name="cart" interface="neo_cart"> |
| 8727 | 8727 | <!-- Original Version - Encrypted Code & GFX --> |
| 8728 | 8728 | <feature name="slot" value="rom_sma_kof99" /> |
| 8729 | <dataarea name="maincpu" size="0x900000"> | |
| 8729 | <dataarea name="maincpu" width="16" endianness="big" size="0x900000"> | |
| 8730 | 8730 | <rom loadflag="load16_word_swap" name="ka.neo-sma" offset="0x0c0000" size="0x040000" crc="7766d09e" sha1="4e0a49d1ad669a62676cb30f527c6590cde80194" /> |
| 8731 | 8731 | <!-- stored in the custom chip --> |
| 8732 | 8732 | <!-- Is the SMA for this set correct? A set with this layout and a SMA.KB is known --> |
| r31151 | r31152 | |
| 8786 | 8786 | <!-- Original Version - Encrypted GFX --> |
| 8787 | 8787 | <!-- KOREAN VERSION --> |
| 8788 | 8788 | <feature name="slot" value="r_cmc_kof99k" /> |
| 8789 | <dataarea name="maincpu" size="0x500000"> | |
| 8789 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 8790 | 8790 | <rom loadflag="load16_word_swap" name="152-p1.p1" offset="0x000000" size="0x100000" crc="f2c7ddfa" sha1="d592eecc53d442c55c2f26a6a721fdf2924d2a5b" /> |
| 8791 | 8791 | <rom loadflag="load16_word_swap" name="152-p2.sp2" offset="0x100000" size="0x400000" crc="274ef47a" sha1="98654b68cc85c19d4a90b46f3110f551fa2e5357" /> |
| 8792 | 8792 | </dataarea> |
| r31151 | r31152 | |
| 8838 | 8838 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 8839 | 8839 | <part name="cart" interface="neo_cart"> |
| 8840 | 8840 | <!-- Prototype Version - Possibly Hacked --> |
| 8841 | <dataarea name="maincpu" size="0x500000"> | |
| 8841 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 8842 | 8842 | <rom loadflag="load16_word_swap" name="proto_251-p1.p1" offset="0x000000" size="0x100000" crc="f37929c4" sha1="226e7e3d629568399b88275e5bcd4e5b3839be95" /> |
| 8843 | 8843 | <rom loadflag="load16_word_swap" name="proto_251-p2.p2" offset="0x100000" size="0x400000" crc="739742ad" sha1="31acaf05a9bf186305888d3db7e4e8a83f7bb0a4" /> |
| 8844 | 8844 | </dataarea> |
| r31151 | r31152 | |
| 8891 | 8891 | <!-- Original Version - Encrypted GFX --> |
| 8892 | 8892 | <!-- MVS ONLY RELEASE --> |
| 8893 | 8893 | <feature name="slot" value="rom_cmc_ganryu" /> |
| 8894 | <dataarea name="maincpu" size="0x200000"> | |
| 8894 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 8895 | 8895 | <rom loadflag="load16_word_swap" name="252-p1.p1" offset="0x100000" size="0x100000" crc="4b8ac4fb" sha1="93d90271bff281862b03beba3809cf95a47a1e44" /> |
| 8896 | 8896 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| 8897 | 8897 | </dataarea> |
| r31151 | r31152 | |
| 8931 | 8931 | <!-- Original Version - Encrypted GFX --> |
| 8932 | 8932 | <!-- later revision --> |
| 8933 | 8933 | <feature name="slot" value="rom_sma_garou" /> |
| 8934 | <dataarea name="maincpu" size="0x900000"> | |
| 8934 | <dataarea name="maincpu" width="16" endianness="big" size="0x900000"> | |
| 8935 | 8935 | <rom loadflag="load16_word_swap" name="kf.neo-sma" offset="0x0c0000" size="0x040000" crc="98bc93dc" sha1="01fe3d18b50f770e131e8d8eeff4c630ba8c9551" /> |
| 8936 | 8936 | <!-- stored in the custom chip --> |
| 8937 | 8937 | <rom loadflag="load16_word_swap" name="253-ep1.p1" offset="0x100000" size="0x200000" crc="ea3171a4" sha1="bbda40f652baa0dc5fc6a006c001a1bdb0df43f6" /> |
| r31151 | r31152 | |
| 8993 | 8993 | <!-- Original Version - Encrypted GFX --> |
| 8994 | 8994 | <!-- earlier revision --> |
| 8995 | 8995 | <feature name="slot" value="rom_sma_garouh" /> |
| 8996 | <dataarea name="maincpu" size="0x900000"> | |
| 8996 | <dataarea name="maincpu" width="16" endianness="big" size="0x900000"> | |
| 8997 | 8997 | <rom loadflag="load16_word_swap" name="ke.neo-sma" offset="0x0c0000" size="0x040000" crc="96c72233" sha1="29e19effd40fdf7e5144332396857f4ad0eff13e" /> |
| 8998 | 8998 | <!-- stored in the custom chip --> |
| 8999 | 8999 | <rom loadflag="load16_word_swap" name="253-p1.p1" offset="0x100000" size="0x400000" crc="18ae5d7e" sha1="bdb58ec9137d8653979b47132f2d10e1cc6aaa24" /> |
| r31151 | r31152 | |
| 9049 | 9049 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 9050 | 9050 | <part name="cart" interface="neo_cart"> |
| 9051 | 9051 | <!-- Prototype Version, seems genuine --> |
| 9052 | <dataarea name="maincpu" size="0x500000"> | |
| 9052 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 9053 | 9053 | <rom loadflag="load16_word_swap" name="proto_253-p1.p1" offset="0x000000" size="0x100000" crc="c72f0c16" sha1="1ff6bb651682f93bef9ff02622c3cf63fe594986" /> |
| 9054 | 9054 | <rom loadflag="load16_word_swap" name="proto_253-p2.p2" offset="0x100000" size="0x400000" crc="bf8de565" sha1="0e24574168cd38138bed0aa4dca49849f6901ca2" /> |
| 9055 | 9055 | </dataarea> |
| r31151 | r31152 | |
| 9094 | 9094 | <!-- Original Version, Encrypted GFX Roms --> |
| 9095 | 9095 | <!-- MVS ONLY RELEASE --> |
| 9096 | 9096 | <feature name="slot" value="rom_cmc_s1945p" /> |
| 9097 | <dataarea name="maincpu" size="0x500000"> | |
| 9097 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 9098 | 9098 | <rom loadflag="load16_word_swap" name="254-p1.p1" offset="0x000000" size="0x100000" crc="ff8efcff" sha1="dcaeaca573385c172ecc43ee6bee355359091893" /> |
| 9099 | 9099 | <rom loadflag="load16_word_swap" name="254-p2.sp2" offset="0x100000" size="0x400000" crc="efdfd4dd" sha1="254f3e1b546eed788f7ae919be9d1bf9702148ce" /> |
| 9100 | 9100 | </dataarea> |
| r31151 | r31152 | |
| 9140 | 9140 | <!-- Original Version, Encrypted GFX --> |
| 9141 | 9141 | <!-- MVS ONLY RELEASE --> |
| 9142 | 9142 | <feature name="slot" value="r_cmc_preisle2" /> |
| 9143 | <dataarea name="maincpu" size="0x500000"> | |
| 9143 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 9144 | 9144 | <rom loadflag="load16_word_swap" name="255-p1.p1" offset="0x000000" size="0x100000" crc="dfa3c0f3" sha1="793c6a46f3a794536dc0327a3f3fad20e25ab661" /> |
| 9145 | 9145 | <rom loadflag="load16_word_swap" name="255-p2.sp2" offset="0x100000" size="0x400000" crc="42050b80" sha1="0981a8295d43b264c2b95e5d7568bdda4e64c976" /> |
| 9146 | 9146 | </dataarea> |
| r31151 | r31152 | |
| 9188 | 9188 | <!-- revision 2000.4.1 --> |
| 9189 | 9189 | <!-- MVS VERSION --> |
| 9190 | 9190 | <feature name="slot" value="rom_sma_mslug3" /> |
| 9191 | <dataarea name="maincpu" size="0x900000"> | |
| 9191 | <dataarea name="maincpu" width="16" endianness="big" size="0x900000"> | |
| 9192 | 9192 | <rom loadflag="load16_word_swap" name="neo-sma" offset="0x0c0000" size="0x040000" crc="9cd55736" sha1="d6efb2b313127c2911d47d9324626b3f1e7c6ccb" /> |
| 9193 | 9193 | <!-- stored in the custom chip --> |
| 9194 | 9194 | <!-- The SMA for this release has a green colour marking; the older revision has a white colour marking --> |
| r31151 | r31152 | |
| 9248 | 9248 | <!-- revision 2000.3.17 --> |
| 9249 | 9249 | <!-- AES VERSION --> |
| 9250 | 9250 | <feature name="slot" value="rom_cmc_mslug3h" /> |
| 9251 | <dataarea name="maincpu" size="0x500000"> | |
| 9251 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 9252 | 9252 | <rom loadflag="load16_word_swap" name="256-ph1.p1" offset="0x000000" size="0x100000" crc="9c42ca85" sha1="7a8f77a89867b889295ae9b9dfd4ba28f02d234d" /> |
| 9253 | 9253 | <rom loadflag="load16_word_swap" name="256-ph2.sp2" offset="0x100000" size="0x400000" crc="1f3d8ce8" sha1="08b05a8abfb86ec09a5e758d6273acf1489961f9" /> |
| 9254 | 9254 | </dataarea> |
| r31151 | r31152 | |
| 9313 | 9313 | <!-- Original Version, Encrypted Code + Sound + GFX Roms --> |
| 9314 | 9314 | <!-- MVS AND AES VERSION --> |
| 9315 | 9315 | <feature name="slot" value="rom_sma_kof2000" /> |
| 9316 | <dataarea name="maincpu" size="0x900000"> | |
| 9316 | <dataarea name="maincpu" width="16" endianness="big" size="0x900000"> | |
| 9317 | 9317 | <rom loadflag="load16_word_swap" name="neo-sma" offset="0x0c0000" size="0x040000" crc="71c6e6bb" sha1="1bd29ded4c6b29780db8e8b772c452189699ca89" /> |
| 9318 | 9318 | <!-- stored in the custom chip --> |
| 9319 | 9319 | <rom loadflag="load16_word_swap" name="257-p1.p1" offset="0x100000" size="0x400000" crc="60947b4c" sha1="5faa0a7ac7734d6c8e276589bd12dd574264647d" /> |
| r31151 | r31152 | |
| 9370 | 9370 | <part name="cart" interface="neo_cart"> |
| 9371 | 9371 | <!-- Original Version, Encrypted Sound + GFX Roms --> |
| 9372 | 9372 | <feature name="slot" value="r_cmc_kof2000n" /> |
| 9373 | <dataarea name="maincpu" size="0x500000"> | |
| 9373 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 9374 | 9374 | <rom loadflag="load16_word_swap" name="257-pg1.p1" offset="0x000000" size="0x100000" crc="5f809dbe" sha1="2bc233dcff5622de86d01e3b74b840c7caf12982" /> |
| 9375 | 9375 | <!-- mask rom TC538200 --> |
| 9376 | 9376 | <rom loadflag="load16_word_swap" name="257-pg2.sp2" offset="0x100000" size="0x400000" crc="693c2c5e" sha1="dc9121b7369ef46596343cac055a00aec81704d4" /> |
| r31151 | r31152 | |
| 9437 | 9437 | <!-- Original Version - Encrypted GFX --> |
| 9438 | 9438 | <!-- MVS ONLY RELEASE --> |
| 9439 | 9439 | <feature name="slot" value="r_cmc_bangbead" /> |
| 9440 | <dataarea name="maincpu" size="0x200000"> | |
| 9440 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 9441 | 9441 | <rom loadflag="load16_word_swap" name="259-p1.p1" offset="0x100000" size="0x100000" crc="88a37f8b" sha1="566db84850fad5e8fe822e8bba910a33e083b550" /> |
| 9442 | 9442 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| 9443 | 9443 | </dataarea> |
| r31151 | r31152 | |
| 9477 | 9477 | <!-- Original Version - Encrypted GFX --> |
| 9478 | 9478 | <!-- MVS ONLY RELEASE --> |
| 9479 | 9479 | <feature name="slot" value="rom_cmc_nitd" /> |
| 9480 | <dataarea name="maincpu" size="0x100000"> | |
| 9480 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 9481 | 9481 | <rom loadflag="load16_word_swap" name="260-p1.p1" offset="0x000000" size="0x080000" crc="61361082" sha1="441f3f41c1aa752c0e0a9a0b1d92711d9e636b85" /> |
| 9482 | 9482 | </dataarea> |
| 9483 | 9483 | <dataarea name="fixed" size="0x20000"> |
| r31151 | r31152 | |
| 9514 | 9514 | <part name="cart" interface="neo_cart"> |
| 9515 | 9515 | <!-- Original Version - Encrypted GFX --> |
| 9516 | 9516 | <feature name="slot" value="r_cmc_sengoku3" /> |
| 9517 | <dataarea name="maincpu" size="0x200000"> | |
| 9517 | <dataarea name="maincpu" width="16" endianness="big" size="0x200000"> | |
| 9518 | 9518 | <rom loadflag="load16_word_swap" name="261-ph1.p1" offset="0x100000" size="0x100000" crc="e0d4bc0a" sha1="8df366097f224771ca6d1aa5c1691cd46776cd12" /> |
| 9519 | 9519 | <!-- mask rom TC5316200 --> |
| 9520 | 9520 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 9569 | 9569 | <part name="cart" interface="neo_cart"> |
| 9570 | 9570 | <!-- MVS VERSION --> |
| 9571 | 9571 | <feature name="slot" value="r_cmc_kof2001" /> |
| 9572 | <dataarea name="maincpu" size="0x500000"> | |
| 9572 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 9573 | 9573 | <rom loadflag="load16_word_swap" name="262-p1-08-e0.p1" offset="0x000000" size="0x100000" crc="9381750d" sha1="dcfecd69e563ff52fe07d23c5372d0f748b07819" /> |
| 9574 | 9574 | <!-- mask rom TC538200 --> |
| 9575 | 9575 | <rom loadflag="load16_word_swap" name="262-p2-08-e0.sp2" offset="0x100000" size="0x400000" crc="8e0d8329" sha1="10dcc1baf0aaf1fc84c4d856bca6bcff85aed2bc" /> |
| r31151 | r31152 | |
| 9626 | 9626 | <part name="cart" interface="neo_cart"> |
| 9627 | 9627 | <!-- AES VERSION --> |
| 9628 | 9628 | <feature name="slot" value="r_cmc_kof2001" /> |
| 9629 | <dataarea name="maincpu" size="0x500000"> | |
| 9629 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 9630 | 9630 | <rom loadflag="load16_word_swap" name="262-pg1.p1" offset="0x000000" size="0x100000" crc="2af7e741" sha1="e41282d73ed6d521da056f1a16573bb61bfa3826" /> |
| 9631 | 9631 | <!-- mask rom TC538200 --> |
| 9632 | 9632 | <rom loadflag="load16_word_swap" name="262-pg2.sp2" offset="0x100000" size="0x400000" crc="91eea062" sha1="82bae42bbeedb9f3aa0c7c0b0a7a69be499cf98f" /> |
| r31151 | r31152 | |
| 9692 | 9692 | <!-- MVS VERSION --> |
| 9693 | 9693 | <feature name="slot" value="r_pc2_mslug4" /> |
| 9694 | 9694 | These carts were manufactured by Mega Enterprise, not SNK. --> |
| 9695 | <dataarea name="maincpu" size="0x500000"> | |
| 9695 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 9696 | 9696 | <rom loadflag="load16_word_swap" name="263-p1.p1" offset="0x000000" size="0x100000" crc="27e4def3" sha1="a08785e8145981bb6b5332a3b2df7eb321253cca" /> |
| 9697 | 9697 | <!-- mask rom TC538200 --> |
| 9698 | 9698 | <rom loadflag="load16_word_swap" name="263-p2.sp2" offset="0x100000" size="0x400000" crc="fdb7aed8" sha1="dbeaec38f44e58ffedba99e70fa1439c2bf0dfa3" /> |
| r31151 | r31152 | |
| 9742 | 9742 | <!-- Original Version - Encrypted GFX --> |
| 9743 | 9743 | <!-- AES VERSION --> |
| 9744 | 9744 | <feature name="slot" value="r_pc2_mslug4" /> |
| 9745 | <dataarea name="maincpu" size="0x500000"> | |
| 9745 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 9746 | 9746 | <rom loadflag="load16_word_swap" name="263-ph1.p1" offset="0x000000" size="0x100000" crc="c67f5c8d" sha1="12af74964843f103520d9f0825069ea2f67eeb2f" /> |
| 9747 | 9747 | <!-- mask rom TC538200 --> |
| 9748 | 9748 | <rom loadflag="load16_word_swap" name="263-ph2.sp2" offset="0x100000" size="0x400000" crc="bc3ec89e" sha1="2cb0626bc4fa57e1d25f208e04532b570d87b3fb" /> |
| r31151 | r31152 | |
| 9801 | 9801 | <!-- Encrypted Set --> |
| 9802 | 9802 | <!-- MVS VERSION --> |
| 9803 | 9803 | <feature name="slot" value="r_pc2_rotd" /> |
| 9804 | <dataarea name="maincpu" size="0x800000"> | |
| 9804 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 9805 | 9805 | <rom loadflag="load16_word_swap" name="264-p1.p1" offset="0x000000" size="0x800000" crc="b8cc969d" sha1="4f2205b4bdd32dd1522106ef4df10ac0eb1b852d" /> |
| 9806 | 9806 | <!-- mask rom TC5364205 --> |
| 9807 | 9807 | </dataarea> |
| r31151 | r31152 | |
| 9861 | 9861 | <!-- Encrypted Set --> |
| 9862 | 9862 | <!-- MVS AND AES VERSION --> |
| 9863 | 9863 | <feature name="slot" value="r_k2_kof2002" /> |
| 9864 | <dataarea name="maincpu" size="0x500000"> | |
| 9864 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 9865 | 9865 | <rom loadflag="load16_word_swap" name="265-p1.p1" offset="0x000000" size="0x100000" crc="9ede7323" sha1="ad9d45498777fda9fa58e75781f48e09aee705a6" /> |
| 9866 | 9866 | <!-- mask rom TC538200 --> |
| 9867 | 9867 | <rom loadflag="load16_word_swap" name="265-p2.sp2" offset="0x100000" size="0x400000" crc="327266b8" sha1="98f445cc0a94f8744d74bca71cb420277622b034" /> |
| r31151 | r31152 | |
| 9923 | 9923 | <!-- Encrypted Set --> |
| 9924 | 9924 | <!-- MVS AND AES VERSION --> |
| 9925 | 9925 | <feature name="slot" value="r_k2_matrim" /> |
| 9926 | <dataarea name="maincpu" size="0x500000"> | |
| 9926 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 9927 | 9927 | <rom loadflag="load16_word_swap" name="266-p1.p1" offset="0x000000" size="0x100000" crc="5d4c2dc7" sha1="8d723b0d28ec344eef26009b361a2b97d300dd51" /> |
| 9928 | 9928 | <!-- mask rom TC538200 --> |
| 9929 | 9929 | <rom loadflag="load16_word_swap" name="266-p2.sp2" offset="0x100000" size="0x400000" crc="a14b1906" sha1="1daa14d73512f760ef569b06f9facb279437d1db" /> |
| r31151 | r31152 | |
| 9983 | 9983 | <!-- Encrypted Set --> |
| 9984 | 9984 | <!-- MVS ONLY RELEASE --> |
| 9985 | 9985 | <feature name="slot" value="r_pc2_pnyaa" /> |
| 9986 | <dataarea name="maincpu" size="0x100000"> | |
| 9986 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 9987 | 9987 | <rom loadflag="load16_word_swap" name="267-p1.p1" offset="0x000000" size="0x100000" crc="112fe2c0" sha1="01420e051f0bdbd4f68ce306a3738161b96f8ba8" /> |
| 9988 | 9988 | <!-- mask rom TC538200 --> |
| 9989 | 9989 | </dataarea> |
| r31151 | r31152 | |
| 10028 | 10028 | <!-- Encrypted Set --> |
| 10029 | 10029 | <!-- MVS VERSION --> |
| 10030 | 10030 | <feature name="slot" value="r_pv_mslug5" /> |
| 10031 | <dataarea name="maincpu" size="0x800000"> | |
| 10031 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 10032 | 10032 | <rom loadflag="load32_word_swap" name="268-p1cr.p1" offset="0x000000" size="0x400000" crc="d0466792" sha1="880819933d997fab398f91061e9dbccb959ae8a1" /> |
| 10033 | 10033 | <!-- mask rom TC5332205 --> |
| 10034 | 10034 | <rom loadflag="load32_word_swap" name="268-p2cr.p2" offset="0x000002" size="0x400000" crc="fbf6b61e" sha1="9ec743d5988b5e3183f37f8edf45c72a8c0c893e" /> |
| r31151 | r31152 | |
| 10082 | 10082 | <!-- Encrypted Set --> |
| 10083 | 10083 | <!-- AES release of the game but is also found in later MVS carts --> |
| 10084 | 10084 | <feature name="slot" value="r_pv_mslug5" /> |
| 10085 | <dataarea name="maincpu" size="0x800000"> | |
| 10085 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 10086 | 10086 | <rom loadflag="load32_word_swap" name="268-p1c.p1" offset="0x000000" size="0x400000" crc="3636690a" sha1="e0da714b4bdc6efffe1250ded02ebddb3ab6d7b3" /> |
| 10087 | 10087 | <rom loadflag="load32_word_swap" name="268-p2c.p2" offset="0x000002" size="0x400000" crc="8dfc47a2" sha1="27d618cfbd0107a4d2a836797e967b39d2eb4851" /> |
| 10088 | 10088 | </dataarea> |
| r31151 | r31152 | |
| 10142 | 10142 | <!-- Encrypted Set --> |
| 10143 | 10143 | <!-- MVS AND AES VERSION --> |
| 10144 | 10144 | <feature name="slot" value="r_pv_svc" /> |
| 10145 | <dataarea name="maincpu" size="0x800000"> | |
| 10145 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 10146 | 10146 | <rom loadflag="load32_word_swap" name="269-p1.p1" offset="0x000000" size="0x400000" crc="38e2005e" sha1="1b902905916a30969282f1399a756e32ff069097" /> |
| 10147 | 10147 | <!-- mask rom TC5332205 --> |
| 10148 | 10148 | <rom loadflag="load32_word_swap" name="269-p2.p2" offset="0x000002" size="0x400000" crc="6d13797c" sha1="3cb71a95cea6b006b44cac0f547df88aec0007b7" /> |
| r31151 | r31152 | |
| 10205 | 10205 | <!-- Encrypted Set --> |
| 10206 | 10206 | <!-- MVS VERSION --> |
| 10207 | 10207 | <feature name="slot" value="r_k2_samsh5" /> |
| 10208 | <dataarea name="maincpu" size="0x800000"> | |
| 10208 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 10209 | 10209 | <rom loadflag="load16_word_swap" name="270-p1.p1" offset="0x000000" size="0x400000" crc="4a2a09e6" sha1="2644de02cdab8ccc605488a7c76b8c9cd1d5bcb9" /> |
| 10210 | 10210 | <!-- mask rom TC5332205 --> |
| 10211 | 10211 | <rom loadflag="load16_word_swap" name="270-p2.sp2" offset="0x400000" size="0x400000" crc="e0c74c85" sha1="df24a4ee76438e40c2f04a714175a7f85cacdfe0" /> |
| r31151 | r31152 | |
| 10259 | 10259 | <!-- Encrypted Set, Alternate Set --> |
| 10260 | 10260 | <!-- AES VERSION --> |
| 10261 | 10261 | <feature name="slot" value="r_k2_samsh5" /> |
| 10262 | <dataarea name="maincpu" size="0x800000"> | |
| 10262 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 10263 | 10263 | <rom loadflag="load16_word_swap" name="270-p1c.p1" offset="0x000000" size="0x400000" crc="bf956089" sha1="c538289069bf338b9fa7ecc5c9143763dbb776a8" /> |
| 10264 | 10264 | <!-- mask rom TC5332205 --> |
| 10265 | 10265 | <rom loadflag="load16_word_swap" name="270-p2c.sp2" offset="0x400000" size="0x400000" crc="943a6b1d" sha1="12bd02fc197456da6ee86f066086094cef0f4bf9" /> |
| r31151 | r31152 | |
| 10321 | 10321 | <!-- Encrypted Code + Sound + GFX Roms --> |
| 10322 | 10322 | <!-- MVS VERSION --> |
| 10323 | 10323 | <feature name="slot" value="r_pv_kf2k3" /> |
| 10324 | <dataarea name="maincpu" size="0x900000"> | |
| 10324 | <dataarea name="maincpu" width="16" endianness="big" size="0x900000"> | |
| 10325 | 10325 | <rom loadflag="load32_word_swap" name="271-p1c.p1" offset="0x000000" size="0x400000" crc="530ecc14" sha1="812cf7e9902af3f5e9e330b7c05c2171b139ad2b" /> |
| 10326 | 10326 | <!-- mask rom TC5332205 --> |
| 10327 | 10327 | <rom loadflag="load32_word_swap" name="271-p2c.p2" offset="0x000002" size="0x400000" crc="fd568da9" sha1="46364906a1e81dc251117e91a1a7b43af1373ada" /> |
| r31151 | r31152 | |
| 10378 | 10378 | <!-- AES VERSION --> |
| 10379 | 10379 | <feature name="slot" value="r_pv_kf2k3h" />> |
| 10380 | 10380 | <!-- All chip labels for this set are correct --> |
| 10381 | <dataarea name="maincpu" size="0x900000"> | |
| 10381 | <dataarea name="maincpu" width="16" endianness="big" size="0x900000"> | |
| 10382 | 10382 | <rom loadflag="load32_word_swap" name="271-p1k.p1" offset="0x000000" size="0x400000" crc="d0d0ae3e" sha1="538d054ac50c91694fbbfefcce548b063713e14e" /> |
| 10383 | 10383 | <!-- mask rom TC5332205 --> |
| 10384 | 10384 | <rom loadflag="load32_word_swap" name="271-p2k.p2" offset="0x000002" size="0x400000" crc="fb3f79d9" sha1="f253d10e732d6e23ae82d74ac9269d21f69ddb4d" /> |
| r31151 | r31152 | |
| 10441 | 10441 | <!-- Encrypted Set --> |
| 10442 | 10442 | <!-- MVS VERSION --> |
| 10443 | 10443 | <feature name="slot" value="r_k2_sams5s" /> |
| 10444 | <dataarea name="maincpu" size="0x800000"> | |
| 10444 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 10445 | 10445 | <!-- Uncensored --> |
| 10446 | 10446 | <rom loadflag="load16_word_swap" name="272-p1.p1" offset="0x000000" size="0x400000" crc="fb7a6bba" sha1="f68c527208d8a55ca44b0caaa8ab66b3a0ffdfe5" /> |
| 10447 | 10447 | <rom loadflag="load16_word_swap" name="272-p2.sp2" offset="0x400000" size="0x400000" crc="63492ea6" sha1="6ba946acb62c63ed61a42fe72b7fff3828883bcc" /> |
| r31151 | r31152 | |
| 10483 | 10483 | <!-- Encrypted Set --> |
| 10484 | 10484 | <!-- AES VERSION, 2nd bugfix release --> |
| 10485 | 10485 | <feature name="slot" value="r_k2_sams5s" /> |
| 10486 | <dataarea name="maincpu" size="0x800000"> | |
| 10486 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 10487 | 10487 | <!-- Less censored --> |
| 10488 | 10488 | <rom loadflag="load16_word_swap" name="272-p1ca.p1" offset="0x000000" size="0x400000" crc="c30a08dd" sha1="66864954017c841d7ca8490112c3aa7a71a4da70" /> |
| 10489 | 10489 | <rom loadflag="load16_word_swap" name="272-p2ca.sp2" offset="0x400000" size="0x400000" crc="bd64a518" sha1="aa259a168930f106377d680db444535411b3bce0" /> |
| r31151 | r31152 | |
| 10526 | 10526 | <!-- Encrypted Set --> |
| 10527 | 10527 | <!-- AES VERSION --> |
| 10528 | 10528 | <feature name="slot" value="r_k2_sams5s" /> |
| 10529 | <dataarea name="maincpu" size="0x800000"> | |
| 10529 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 10530 | 10530 | <!-- Censored --> |
| 10531 | 10531 | <rom loadflag="load16_word_swap" name="272-p1c.p1" offset="0x000000" size="0x400000" crc="9291794d" sha1="66588ff9b00ffad6508b03423548984e28a3209d" /> |
| 10532 | 10532 | <rom loadflag="load16_word_swap" name="272-p2c.sp2" offset="0x400000" size="0x400000" crc="fa1a7dd8" sha1="62443dad76d6c1e18f515d7d4ef8e1295a4b7f1d" /> |
| r31151 | r31152 | |
| 10644 | 10644 | <sharedfeat name="release" value="MVS" /> |
| 10645 | 10645 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 10646 | 10646 | <part name="cart" interface="neo_cart"> |
| 10647 | <dataarea name="maincpu" size="0x100000"> | |
| 10647 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 10648 | 10648 | <rom loadflag="load16_word_swap" name="zin-p1.bin" offset="0x000000" size="0x100000" crc="06c8fca7" sha1="b7bf38965c3d0db4d7a9684d14cac94a45b4a45b" /> |
| 10649 | 10649 | </dataarea> |
| 10650 | 10650 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
| 10672 | 10672 | <sharedfeat name="release" value="MVS" /> |
| 10673 | 10673 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 10674 | 10674 | <part name="cart" interface="neo_cart"> |
| 10675 | <dataarea name="maincpu" size="0x500000"> | |
| 10675 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 10676 | 10676 | <rom loadflag="load16_word_swap" name="kf97-p1p.bin" offset="0x000000" size="0x100000" crc="c01fda46" sha1="bc6402f5082efc80a8936364c657165f19b49415" /> |
| 10677 | 10677 | <rom loadflag="load16_word_swap" name="kf97-p2p.bin" offset="0x100000" size="0x400000" crc="5502b020" sha1="37c48198d8b3798910a44075782cd1a20b687b4a" /> |
| 10678 | 10678 | </dataarea> |
| r31151 | r31152 | |
| 10716 | 10716 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 10717 | 10717 | <part name="cart" interface="neo_cart"> |
| 10718 | 10718 | <feature name="slot" value="r_kog" /> |
| 10719 | <dataarea name="maincpu" size="0x600000"> | |
| 10719 | <dataarea name="maincpu" width="16" endianness="big" size="0x600000"> | |
| 10720 | 10720 | <rom loadflag="load16_word_swap" name="5232-p1.bin" offset="0x000000" size="0x200000" crc="d2413ec6" sha1="c0bf409d1e714cba5fdc6f79e4c2aec805316634" /> |
| 10721 | 10721 | <rom loadflag="load16_word_swap" name="232-p2.sp2" offset="0x200000" size="0x400000" crc="158b23f6" sha1="9744620a70513490aaf9c5eda33e5ec31222be19" /> |
| 10722 | 10722 | <!-- TC5332205 --> |
| r31151 | r31152 | |
| 10757 | 10757 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 10758 | 10758 | <part name="cart" interface="neo_cart"> |
| 10759 | 10759 | <feature name="slot" value="r_lans2004" /> |
| 10760 | <dataarea name="maincpu" size="0x600000"> | |
| 10760 | <dataarea name="maincpu" width="16" endianness="big" size="0x600000"> | |
| 10761 | 10761 | <rom loadflag="load16_word_swap" name="lnsq-p1.bin" offset="0x000000" size="0x200000" crc="b40a879a" sha1="379f3d44b0bae430b32157fd5f4018d77b243c58" /> |
| 10762 | 10762 | <rom loadflag="load16_word_swap" name="lnsq-p21.bin" offset="0x200000" size="0x200000" crc="ecdb2d42" sha1="0d930cd369dfbcab7778b144355e5f70874aa324" /> |
| 10763 | 10763 | <rom loadflag="load16_word_swap" name="lnsq-p22.bin" offset="0x400000" size="0x200000" crc="fac5e2e7" sha1="5cce7226c137da80c969df00e1cda41ef9c5082c" /> |
| r31151 | r31152 | |
| 10795 | 10795 | <part name="cart" interface="neo_cart"> |
| 10796 | 10796 | <!-- bootleg of garoup --> |
| 10797 | 10797 | <feature name="slot" value="r_garoubl" /> |
| 10798 | <dataarea name="maincpu" size="0x500000"> | |
| 10798 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 10799 | 10799 | <rom loadflag="load16_word_swap" name="garou-p1.bin" offset="0x000000" size="0x100000" crc="fd446d59" sha1="e37484673a935b2af76c84cd26977c751c0f8cff" /> |
| 10800 | 10800 | <rom loadflag="load16_word_swap" name="garou-p2.bin" offset="0x100000" size="0x400000" crc="3fb10a84" sha1="4e4a4f4cd7f0ad2520c938c64c8910e6f8805eaf" /> |
| 10801 | 10801 | </dataarea> |
| r31151 | r31152 | |
| 10832 | 10832 | <part name="cart" interface="neo_cart"> |
| 10833 | 10833 | <!-- This "Metal Slug 6" is a hack/bootleg of Metal Slug 3, the real Metal Slug 6 is on Atomiswave Hardware --> |
| 10834 | 10834 | <feature name="slot" value="r_mslug3b6" /> |
| 10835 | <dataarea name="maincpu" size="0x500000"> | |
| 10835 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 10836 | 10836 | <rom loadflag="load16_word_swap" name="299-p1.bin" offset="0x000000" size="0x200000" crc="5f2fe228" sha1="747775a2dfc0da87ad2ddd4f57ce5b2522f23fa5" /> |
| 10837 | 10837 | <rom loadflag="load16_word_swap" name="299-p2.bin" offset="0x100000" size="0x400000" crc="193fa835" sha1="fb1f26db7998b0bb6b1c8b92500c1596ec5dfc71" /> |
| 10838 | 10838 | </dataarea> |
| r31151 | r31152 | |
| 10884 | 10884 | <sharedfeat name="release" value="MVS" /> |
| 10885 | 10885 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 10886 | 10886 | <part name="cart" interface="neo_cart"> |
| 10887 | <dataarea name="maincpu" size="0x100000"> | |
| 10887 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 10888 | 10888 | <rom loadflag="load16_word_swap" name="nitd-p1.bin" offset="0x000000" size="0x080000" crc="1a05bd1b" sha1="7bbddef842d50b0778711063af695b168a76ff61" /> |
| 10889 | 10889 | </dataarea> |
| 10890 | 10890 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
| 10919 | 10919 | <part name="cart" interface="neo_cart"> |
| 10920 | 10920 | <!-- Protected hack/bootleg of kof2001 Phenixsoft --> |
| 10921 | 10921 | <feature name="slot" value="r_cthd2003" /> |
| 10922 | <dataarea name="maincpu" size="0x500000"> | |
| 10922 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 10923 | 10923 | <rom loadflag="load16_word_swap" name="5003-p1.bin" offset="0x000000" size="0x100000" crc="bb7602c1" sha1="abf329a40f34c88f7325b255e3bc090db1edaca4" /> |
| 10924 | 10924 | <rom loadflag="load16_word_swap" name="5003-p2.bin" offset="0x100000" size="0x400000" crc="adc1c22b" sha1="271e0629989257a0d21d280c05df53df259414b1" /> |
| 10925 | 10925 | </dataarea> |
| r31151 | r31152 | |
| 10964 | 10964 | <part name="cart" interface="neo_cart"> |
| 10965 | 10965 | <!-- Protected hack/bootleg of kof2001 Phenixsoft --> |
| 10966 | 10966 | <feature name="slot" value="r_cthd2003sp" /> |
| 10967 | <dataarea name="maincpu" size="0x500000"> | |
| 10967 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 10968 | 10968 | <rom loadflag="load16_word_swap" name="5003-p1sp.bin" offset="0x000000" size="0x100000" crc="ab5c4de0" sha1="ca9a6bfd4c32d791ecabb34ccbf2cbf0e84f97d5" /> |
| 10969 | 10969 | <rom loadflag="load16_word_swap" name="5003-p2.bin" offset="0x100000" size="0x400000" crc="adc1c22b" sha1="271e0629989257a0d21d280c05df53df259414b1" /> |
| 10970 | 10970 | </dataarea> |
| r31151 | r31152 | |
| 11009 | 11009 | <part name="cart" interface="neo_cart"> |
| 11010 | 11010 | <!-- Protected hack/bootleg of kof2001 Phenixsoft, alternate version --> |
| 11011 | 11011 | <feature name="slot" value="r_cthd2003sa" /> |
| 11012 | <dataarea name="maincpu" size="0x500000"> | |
| 11012 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 11013 | 11013 | <rom loadflag="load16_word_swap" name="5003-p1sa.bin" offset="0x000000" size="0x100000" crc="013a509d" sha1="c61c9b777e6e062b5f4ad87cdb78e9ca05e9bfb9" /> |
| 11014 | 11014 | <rom loadflag="load16_word_swap" name="5003-p2.bin" offset="0x100000" size="0x400000" crc="adc1c22b" sha1="271e0629989257a0d21d280c05df53df259414b1" /> |
| 11015 | 11015 | </dataarea> |
| r31151 | r31152 | |
| 11056 | 11056 | <sharedfeat name="compatibility" value="MVS" /> |
| 11057 | 11057 | <part name="cart" interface="neo_cart"> |
| 11058 | 11058 | <feature name="slot" value="r_ms4plus" /> |
| 11059 | <dataarea name="maincpu" size="0x500000"> | |
| 11059 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 11060 | 11060 | <rom loadflag="load16_word_swap" name="ms4-p1p.bin" offset="0x000000" size="0x100000" crc="806a6e04" sha1="df503772d607271ea51285154c9fd68e18b143ce" /> |
| 11061 | 11061 | <rom loadflag="load16_word_swap" name="263-p2.sp2" offset="0x100000" size="0x400000" crc="fdb7aed8" sha1="dbeaec38f44e58ffedba99e70fa1439c2bf0dfa3" /> |
| 11062 | 11062 | <!-- mask rom TC5332205 --> |
| r31151 | r31152 | |
| 11104 | 11104 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11105 | 11105 | <part name="cart" interface="neo_cart"> |
| 11106 | 11106 | <feature name="slot" value="r_kof2002b" /> |
| 11107 | <dataarea name="maincpu" size="0x500000"> | |
| 11107 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 11108 | 11108 | <rom loadflag="load16_word_swap" name="265-p1.p1" offset="0x000000" size="0x100000" crc="9ede7323" sha1="ad9d45498777fda9fa58e75781f48e09aee705a6" /> |
| 11109 | 11109 | <!-- mask rom TC538200 --> |
| 11110 | 11110 | <rom loadflag="load16_word_swap" name="2k2-p2.bin" offset="0x100000" size="0x400000" crc="6dbee4df" sha1="9a9646c81b233b44213c624b898c19f83e9a07f8" /> |
| r31151 | r31152 | |
| 11145 | 11145 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11146 | 11146 | <part name="cart" interface="neo_cart"> |
| 11147 | 11147 | <feature name="slot" value="r_kf2k2pls" /> |
| 11148 | <dataarea name="maincpu" size="0x500000"> | |
| 11148 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 11149 | 11149 | <rom loadflag="load16_word_swap" name="2k2-p1p.bin" offset="0x000000" size="0x100000" crc="3ab03781" sha1="86946c19f1c4d9ab5cde86688d698bf63118a39d" /> |
| 11150 | 11150 | <rom loadflag="load16_word_swap" name="265-p2.sp2" offset="0x100000" size="0x400000" crc="327266b8" sha1="98f445cc0a94f8744d74bca71cb420277622b034" /> |
| 11151 | 11151 | <!-- mask rom TC5332205 --> |
| r31151 | r31152 | |
| 11195 | 11195 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11196 | 11196 | <part name="cart" interface="neo_cart"> |
| 11197 | 11197 | <feature name="slot" value="r_kf2k2pls" /> |
| 11198 | <dataarea name="maincpu" size="0x500000"> | |
| 11198 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 11199 | 11199 | <rom loadflag="load16_word_swap" name="2k2-p1pa.bin" offset="0x000000" size="0x100000" crc="6a3a02f3" sha1="c9973b64e9a87fa38dde233ee3e9a73ba085b013" /> |
| 11200 | 11200 | <rom loadflag="load16_word_swap" name="265-p2.sp2" offset="0x100000" size="0x400000" crc="327266b8" sha1="98f445cc0a94f8744d74bca71cb420277622b034" /> |
| 11201 | 11201 | <!-- mask rom TC5332205 --> |
| r31151 | r31152 | |
| 11245 | 11245 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11246 | 11246 | <part name="cart" interface="neo_cart"> |
| 11247 | 11247 | <feature name="slot" value="r_kf2k2mp" /> |
| 11248 | <dataarea name="maincpu" size="0x800000"> | |
| 11248 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 11249 | 11249 | <rom loadflag="load16_word_swap" name="kf02m-p1.bin" offset="0x000000" size="0x400000" crc="ff7c6ec0" sha1="704c14d671dcb4cfed44d9f978a289cb7dd9d065" /> |
| 11250 | 11250 | <rom loadflag="load16_word_swap" name="kf02m-p2.bin" offset="0x400000" size="0x400000" crc="91584716" sha1="90da863037cf775957fa154cd42536e221df5740" /> |
| 11251 | 11251 | </dataarea> |
| r31151 | r31152 | |
| 11294 | 11294 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11295 | 11295 | <part name="cart" interface="neo_cart"> |
| 11296 | 11296 | <feature name="slot" value="r_kf2k2mp2" /> |
| 11297 | <dataarea name="maincpu" size="0x600000"> | |
| 11297 | <dataarea name="maincpu" width="16" endianness="big" size="0x600000"> | |
| 11298 | 11298 | <rom loadflag="load16_word_swap" name="k2k2m2p1.bin" offset="0x000000" size="0x200000" crc="1016806c" sha1="a583b45e9c0d6f67b95c52e44444aabe88f68d97" /> |
| 11299 | 11299 | <rom loadflag="load16_word_swap" name="k2k2m2p2.bin" offset="0x200000" size="0x400000" crc="432fdf53" sha1="d7e542cd84d948162c60768e40ee4ed33d8e7913" /> |
| 11300 | 11300 | </dataarea> |
| r31151 | r31152 | |
| 11343 | 11343 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11344 | 11344 | <part name="cart" interface="neo_cart"> |
| 11345 | 11345 | <feature name="slot" value="r_kof10th" /> |
| 11346 | <dataarea name="maincpu" size="0x900000"> | |
| 11346 | <dataarea name="maincpu" width="16" endianness="big" size="0x900000"> | |
| 11347 | 11347 | <rom loadflag="load16_word_swap" name="kf10-p1.bin" offset="0x000000" size="0x800000" crc="b1fd0c43" sha1="5f842a8a27be2d957fd4140d6431ae47154997bb" /> |
| 11348 | 11348 | </dataarea> |
| 11349 | 11349 | <dataarea name="fixed" size="0x40000"> |
| r31151 | r31152 | |
| 11388 | 11388 | <part name="cart" interface="neo_cart"> |
| 11389 | 11389 | <!-- this is a hack of kof2002 much like the various korean hacks / bootlegs of games --> |
| 11390 | 11390 | <feature name="slot" value="r_kf10thep" /> |
| 11391 | <dataarea name="maincpu" size="0x800000"> | |
| 11391 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 11392 | 11392 | <rom loadflag="load16_word_swap" name="5008-p1.bin" offset="0x000000" size="0x200000" crc="bf5469ba" sha1="f05236d8fffab5836c0d27becdeeb80def32ee49" /> |
| 11393 | 11393 | <rom loadflag="load16_word_swap" name="5008-p2.bin" offset="0x200000" size="0x400000" crc="a649ec38" sha1="5c63ed5e5c848940f587c966da4908d04cf1293c" /> |
| 11394 | 11394 | <rom loadflag="load16_word_swap" name="5008-p3.bin" offset="0x600000" size="0x200000" crc="e629e13c" sha1="6ebe080ce01c51064cb2f4d89315ba98a45ae727" /> |
| r31151 | r31152 | |
| 11433 | 11433 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11434 | 11434 | <part name="cart" interface="neo_cart"> |
| 11435 | 11435 | <feature name="slot" value="r_kf2k5uni" /> |
| 11436 | <dataarea name="maincpu" size="0x800000"> | |
| 11436 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 11437 | 11437 | <rom loadflag="load16_word_swap" name="5006-p2a.bin" offset="0x000000" size="0x400000" crc="ced883a2" sha1="f93db4d74ce0a73a3e9631966fee37be22470c89" /> |
| 11438 | 11438 | <rom loadflag="load16_word_swap" name="5006-p1.bin" offset="0x400000" size="0x400000" crc="72c39c46" sha1="4ba0657de20319c0bc30c7c3bba7d7331d0ce9a7" /> |
| 11439 | 11439 | </dataarea> |
| r31151 | r31152 | |
| 11477 | 11477 | <sharedfeat name="compatibility" value="MVS" /> |
| 11478 | 11478 | <part name="cart" interface="neo_cart"> |
| 11479 | 11479 | <feature name="slot" value="r_kf2k4se" /> |
| 11480 | <dataarea name="maincpu" size="0x500000"> | |
| 11480 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 11481 | 11481 | <rom loadflag="load16_word_swap" name="k2k4s-p2.bin" offset="0x000000" size="0x080000" crc="21a84084" sha1="973e8a0bffa0e1f055803f663f81a8e03701802d" /> |
| 11482 | 11482 | <rom loadflag="load16_word_swap" name="k2k4s-p3.bin" offset="0x080000" size="0x080000" crc="febb484e" sha1="4b1838795b84f22d578ad043641df0a7bf7d9774" /> |
| 11483 | 11483 | <rom loadflag="load16_word_swap" name="k2k4s-p1.bin" offset="0x100000" size="0x400000" crc="e6c50566" sha1="cc6a3489a3bfeb4dcc65b6ddae0030f7e66fbabe" /> |
| r31151 | r31152 | |
| 11515 | 11515 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11516 | 11516 | <part name="cart" interface="neo_cart"> |
| 11517 | 11517 | <feature name="slot" value="r_matrimbl" /> |
| 11518 | <dataarea name="maincpu" size="0x500000"> | |
| 11518 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 11519 | 11519 | <rom loadflag="load16_word_swap" name="266-p1.p1" offset="0x000000" size="0x100000" crc="5d4c2dc7" sha1="8d723b0d28ec344eef26009b361a2b97d300dd51" /> |
| 11520 | 11520 | <!-- mask rom TC538200 --> |
| 11521 | 11521 | <rom loadflag="load16_word_swap" name="266-p2.sp2" offset="0x100000" size="0x400000" crc="a14b1906" sha1="1daa14d73512f760ef569b06f9facb279437d1db" /> |
| r31151 | r31152 | |
| 11558 | 11558 | <sharedfeat name="compatibility" value="MVS" /> |
| 11559 | 11559 | <part name="cart" interface="neo_cart"> |
| 11560 | 11560 | <feature name="slot" value="r_ms5plus" /> |
| 11561 | <dataarea name="maincpu" size="0x500000"> | |
| 11561 | <dataarea name="maincpu" width="16" endianness="big" size="0x500000"> | |
| 11562 | 11562 | <rom loadflag="load16_word_swap" name="ms5-p1p.bin" offset="0x000000" size="0x100000" crc="106b276f" sha1="0e840df95f3813145e5043573483c7610d2d3e68" /> |
| 11563 | 11563 | <rom loadflag="load16_word_swap" name="ms5-p2p.bin" offset="0x100000" size="0x200000" crc="d6a458e8" sha1="c0a8bdae06d62859fb6734766ccc190eb2a809a4" /> |
| 11564 | 11564 | <rom loadflag="load16_word_swap" name="ms5-p3p.bin" offset="0x300000" size="0x200000" crc="439ec031" sha1="f0ad8f9be7d26bc504593c1321bd23c286a221f0" /> |
| r31151 | r31152 | |
| 11609 | 11609 | <sharedfeat name="release" value="MVS" /> |
| 11610 | 11610 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11611 | 11611 | <part name="cart" interface="neo_cart"> |
| 11612 | <dataarea name="maincpu" size="0x100000"> | |
| 11612 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 11613 | 11613 | <rom loadflag="load16_word_swap" name="u7" offset="0x000000" size="0x080000" crc="ac1e9ef3" sha1="a2b125ee70869667431ab125bc29e768500802ad" /> |
| 11614 | 11614 | </dataarea> |
| 11615 | 11615 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
| 11640 | 11640 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11641 | 11641 | <part name="cart" interface="neo_cart"> |
| 11642 | 11642 | <feature name="slot" value="r_svcboot" /> |
| 11643 | <dataarea name="maincpu" size="0x800000"> | |
| 11643 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 11644 | 11644 | <rom loadflag="load16_word_swap" name="svc-p1.bin" offset="0x000000" size="0x800000" crc="0348f162" sha1="c313351d68effd92aeb80ed320e4f8c26a3bb53e" /> |
| 11645 | 11645 | </dataarea> |
| 11646 | 11646 | <dataarea name="fixed" size="0x20000"> |
| r31151 | r31152 | |
| 11679 | 11679 | <sharedfeat name="compatibility" value="MVS" /> |
| 11680 | 11680 | <part name="cart" interface="neo_cart"> |
| 11681 | 11681 | <feature name="slot" value="r_svcplus" /> |
| 11682 | <dataarea name="maincpu" size="0x600000"> | |
| 11682 | <dataarea name="maincpu" width="16" endianness="big" size="0x600000"> | |
| 11683 | 11683 | <rom loadflag="load16_word_swap" name="svc-p1p.bin" offset="0x000000" size="0x200000" crc="a194d842" sha1="72b7bfa34a97632b1aa003488e074d766a6c2f08" /> |
| 11684 | 11684 | <rom loadflag="load16_word_swap" name="svc-p2p.bin" offset="0x200000" size="0x200000" crc="50c0e2b7" sha1="97b396415ab0e692e43ddf371091e5a456712f0a" /> |
| 11685 | 11685 | <rom loadflag="load16_word_swap" name="svc-p3p.bin" offset="0x400000" size="0x200000" crc="58cdc293" sha1="3c4f2418ec513bcc13ed33a727de11dfb98f7525" /> |
| r31151 | r31152 | |
| 11719 | 11719 | <sharedfeat name="compatibility" value="MVS" /> |
| 11720 | 11720 | <part name="cart" interface="neo_cart"> |
| 11721 | 11721 | <feature name="slot" value="r_svcplusa" />> |
| 11722 | <dataarea name="maincpu" size="0x600000"> | |
| 11722 | <dataarea name="maincpu" width="16" endianness="big" size="0x600000"> | |
| 11723 | 11723 | <rom loadflag="load16_word_swap" name="svc-p1pl.bin" offset="0x000000" size="0x200000" crc="16b44144" sha1="5eab530274b1b6f480a39a86c199da524cddfccc" /> |
| 11724 | 11724 | <rom loadflag="load16_word_swap" name="svc-p2pl.bin" offset="0x200000" size="0x400000" crc="7231ace2" sha1="d2f13ddd5d3ee29b4b9824e8663f7ee0241f30cf" /> |
| 11725 | 11725 | </dataarea> |
| r31151 | r31152 | |
| 11759 | 11759 | <sharedfeat name="compatibility" value="MVS" /> |
| 11760 | 11760 | <part name="cart" interface="neo_cart"> |
| 11761 | 11761 | <feature name="slot" value="r_svcsplus" /> |
| 11762 | <dataarea name="maincpu" size="0x800000"> | |
| 11762 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 11763 | 11763 | <rom loadflag="load16_word_swap" name="svc-p1sp.bin" offset="0x000000" size="0x400000" crc="2601902f" sha1="202348a13c6480f7de37a3ee983823838822fc98" /> |
| 11764 | 11764 | <rom loadflag="load16_word_swap" name="svc-p2sp.bin" offset="0x400000" size="0x400000" crc="0ca13305" sha1="ac8fbca71b754acbcdd11802161a62ae1cf32d88" /> |
| 11765 | 11765 | </dataarea> |
| r31151 | r31152 | |
| 11799 | 11799 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11800 | 11800 | <part name="cart" interface="neo_cart"> |
| 11801 | 11801 | <feature name="slot" value="r_samsho5b" /> |
| 11802 | <dataarea name="maincpu" size="0x800000"> | |
| 11802 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 11803 | 11803 | <rom loadflag="load16_word_swap" name="ssv-p2.bin" offset="0x000000" size="0x400000" crc="5023067f" sha1="b1d682fa7d158f19664356a919da6572e8cfeee0" /> |
| 11804 | 11804 | <rom loadflag="load16_word_swap" name="ssv-p1.bin" offset="0x400000" size="0x400000" crc="b6cbe386" sha1="99c2407361116c2b2c5fe72df53e05c5f99163c1" /> |
| 11805 | 11805 | </dataarea> |
| r31151 | r31152 | |
| 11834 | 11834 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11835 | 11835 | <part name="cart" interface="neo_cart"> |
| 11836 | 11836 | <feature name="slot" value="r_kf2k3bl" /> |
| 11837 | <dataarea name="maincpu" size="0x800000"> | |
| 11837 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 11838 | 11838 | <rom loadflag="load16_word_swap" name="2k3-p1.bin" offset="0x100000" size="0x400000" crc="92ed6ee3" sha1="5e7e21eb40dfcc453ba73808760d5ddedd49c58a" /> |
| 11839 | 11839 | <rom loadflag="load16_word_swap" name="2k3-p2.bin" offset="0x500000" size="0x200000" crc="5d3d8bb3" sha1="7f2341f14ca12ff5721eb038b3496228a1f34b60" /> |
| 11840 | 11840 | <rom size="0x100000" offset="0x000000" loadflag="continue" /> |
| r31151 | r31152 | |
| 11883 | 11883 | <sharedfeat name="compatibility" value="MVS,AES" /> |
| 11884 | 11884 | <part name="cart" interface="neo_cart"> |
| 11885 | 11885 | <feature name="slot" value="r_kf2k3pl" /> |
| 11886 | <dataarea name="maincpu" size="0x700000"> | |
| 11886 | <dataarea name="maincpu" width="16" endianness="big" size="0x700000"> | |
| 11887 | 11887 | <rom loadflag="load16_word_swap" name="2k3-p1bl.bin" offset="0x000000" size="0x100000" crc="4ea414dd" sha1="c242c9709c20a8cde3ad562adbe640a5dd5abcf1" /> |
| 11888 | 11888 | <rom loadflag="load16_word_swap" name="2k3-p3bl.bin" offset="0x100000" size="0x400000" crc="370acbff" sha1="e72544de1c5e2e4f7478fc003caba9e33a306c19" /> |
| 11889 | 11889 | <rom loadflag="load16_word_swap" name="2k3-p2bl.bin" offset="0x500000" size="0x200000" crc="9c04fc52" sha1="f41b53c79e4209373ec68276fa5941c91424bb15" /> |
| r31151 | r31152 | |
| 11932 | 11932 | <sharedfeat name="compatibility" value="MVS" /> |
| 11933 | 11933 | <part name="cart" interface="neo_cart"> |
| 11934 | 11934 | <feature name="slot" value="r_kf2k3pl" /> |
| 11935 | <dataarea name="maincpu" size="0x700000"> | |
| 11935 | <dataarea name="maincpu" width="16" endianness="big" size="0x700000"> | |
| 11936 | 11936 | <rom loadflag="load16_word_swap" name="2k3-p1pl.bin" offset="0x000000" size="0x100000" crc="07b84112" sha1="0b085a928a39ff9c0745a58bfa4ce6106b5f474a" /> |
| 11937 | 11937 | <rom loadflag="load16_word_swap" name="2k3-p3bl.bin" offset="0x100000" size="0x400000" crc="370acbff" sha1="e72544de1c5e2e4f7478fc003caba9e33a306c19" /> |
| 11938 | 11938 | <rom loadflag="load16_word_swap" name="2k3-p2bl.bin" offset="0x500000" size="0x200000" crc="9c04fc52" sha1="f41b53c79e4209373ec68276fa5941c91424bb15" /> |
| r31151 | r31152 | |
| 11981 | 11981 | <sharedfeat name="compatibility" value="MVS" /> |
| 11982 | 11982 | <part name="cart" interface="neo_cart"> |
| 11983 | 11983 | <feature name="slot" value="r_kf2k3upl" /> |
| 11984 | <dataarea name="maincpu" size="0x800000"> | |
| 11984 | <dataarea name="maincpu" width="16" endianness="big" size="0x800000"> | |
| 11985 | 11985 | <rom loadflag="load16_word_swap" name="2k3-p1up.bin" offset="0x000000" size="0x800000" crc="87294c01" sha1="21420415a6b2ba1b43ecc1934270dc085d6bd7d9" /> |
| 11986 | 11986 | </dataarea> |
| 11987 | 11987 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
| 12030 | 12030 | <sharedfeat name="compatibility" value="MVS" /> |
| 12031 | 12031 | <part name="cart" interface="neo_cart"> |
| 12032 | 12032 | <!-- Unlicensed Prototype, no official game ID # --> |
| 12033 | <dataarea name="maincpu" size="0x100000"> | |
| 12033 | <dataarea name="maincpu" width="16" endianness="big" size="0x100000"> | |
| 12034 | 12034 | <rom loadflag="load16_word_swap" name="dig-p1.bin" offset="0x000000" size="0x080000" crc="eda433d7" sha1="abb14c66777ab0fe4ac76a402e253a49df7178d8" /> |
| 12035 | 12035 | </dataarea> |
| 12036 | 12036 | <dataarea name="fixed" size="0x040000"> |
| r31151 | r31152 | |
|---|---|---|
| 1112 | 1112 | // <dataarea name='' size=''> |
| 1113 | 1113 | if (strcmp(tagname, "dataarea") == 0) |
| 1114 | 1114 | { |
| 1115 | static const char *attrnames[] = { "name", "size" }; | |
| 1115 | static const char *attrnames[] = { "name", "size", "width", "endianness" }; | |
| 1116 | 1116 | const char *attrvalues[ARRAY_LENGTH(attrnames)] = { 0 }; |
| 1117 | 1117 | parse_attributes(attributes, ARRAY_LENGTH(attrnames), attrnames, attrvalues); |
| 1118 | 1118 | |
| 1119 | 1119 | if (attrvalues[0] != NULL && attrvalues[1] != NULL && strcmp(attrvalues[0], "") != 0 && strcmp(attrvalues[1], "") != 0) |
| 1120 | add_rom_entry(attrvalues[0], NULL, 0, strtol(attrvalues[1], NULL, 0), ROMENTRYTYPE_REGION); | |
| 1120 | { | |
| 1121 | // handle region attributes | |
| 1122 | const char *width = attrvalues[2]; | |
| 1123 | const char *endianness = attrvalues[3]; | |
| 1124 | UINT32 regionflags = ROMENTRYTYPE_REGION; | |
| 1125 | ||
| 1126 | if (width != NULL) | |
| 1127 | { | |
| 1128 | if (strcmp(width, "8") == 0) | |
| 1129 | regionflags |= ROMREGION_8BIT; | |
| 1130 | else if (strcmp(width, "16") == 0) | |
| 1131 | regionflags |= ROMREGION_16BIT; | |
| 1132 | else if (strcmp(width, "32") == 0) | |
| 1133 | regionflags |= ROMREGION_32BIT; | |
| 1134 | else if (strcmp(width, "64") == 0) | |
| 1135 | regionflags |= ROMREGION_64BIT; | |
| 1136 | else | |
| 1137 | parse_error("Invalid dataarea width"); | |
| 1138 | } | |
| 1139 | if (endianness != NULL) | |
| 1140 | { | |
| 1141 | if (strcmp(endianness, "little") == 0) | |
| 1142 | regionflags |= ROMREGION_LE; | |
| 1143 | else if (strcmp(endianness, "big") == 0) | |
| 1144 | regionflags |= ROMREGION_BE; | |
| 1145 | else | |
| 1146 | parse_error("Invalid dataarea endianness"); | |
| 1147 | } | |
| 1148 | ||
| 1149 | add_rom_entry(attrvalues[0], NULL, 0, strtol(attrvalues[1], NULL, 0), regionflags); | |
| 1150 | } | |
| 1121 | 1151 | else |
| 1122 | 1152 | parse_error("Incomplete dataarea definition"); |
| 1123 | 1153 | } |
| r31151 | r31152 | |
|---|---|---|
| 79 | 79 | // create memory regions |
| 80 | 80 | len = get_software_region_length("maincpu"); |
| 81 | 81 | m_cart->rom_alloc(len); ROM = m_cart->get_rom_base(); |
| 82 | ||
| 83 | #ifdef LSB_FIRST | |
| 84 | // software list ROM loading currently does not fix up endianness for us, so we need to do it by hand | |
| 85 | UINT16 *src = (UINT16 *)get_software_region("maincpu"); | |
| 86 | UINT16 *dst = (UINT16 *)ROM; | |
| 87 | for (int i = 0; i < len / 2; i++) | |
| 88 | { | |
| 89 | dst[i] = FLIPENDIAN_INT16(src[i]); | |
| 90 | } | |
| 91 | #else | |
| 92 | 82 | memcpy(ROM, get_software_region("maincpu"), len); |
| 93 | #endif | |
| 94 | 83 | |
| 95 | 84 | len = get_software_region_length("fixed"); |
| 96 | 85 | m_cart->fixed_alloc(len); ROM8 = m_cart->get_fixed_base(); |
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