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r31069 Saturday 21st June, 2014 at 23:06:22 UTC by hap
added preliminary tmpz84c015, stupid daisy chain
[src/emu/cpu]cpu.mak
[src/emu/cpu/z80]tlcs_z80.c tmpz84c011.c tmpz84c011.h tmpz84c015.c* tmpz84c015.h* z80.h z80daisy.c
[src/mess/drivers]pve500.c

trunk/src/emu/cpu/z80/tlcs_z80.c
r31068r31069
1/*****************************************************************************
2 *
3 *   tlcs_z80.c
4 *   TOSHIBA TLCS Z80 emulation
5 */
6
7#include "emu.h"
8#include "z80.h"
9#include "machine/z80ctc.h"
10#include "machine/z80pio.h"
11#include "machine/z80dart.h"
12
13//TODO: These interfaces should default to DEVCB_NULL pointers and
14// the actual callbacks should be provided by the driver that instantiates the TLCS-Z80 CPU.
15// We need methods for the driver to provide these interface configurations to the CPU core.
16// something like:
17//  m_tlcsz80->set_internal_ctc_interface (ctc_intf);
18//  m_tlcsz80->set_internal_pio_interface (pio_intf);
19//  m_tlcsz80->set_internal_sio_interface (sio_intf);
20
21/* Daisy Chaining */
22
23#ifdef UNUSED
24static const z80_daisy_config tlcsz80_daisy_chain[] =
25{
26   { TLCSZ80_INTERNAL_CTC_TAG },
27   { TLCSZ80_INTERNAL_PIO_TAG },
28   { TLCSZ80_INTERNAL_SIO_TAG },
29   { NULL }
30};
31#endif
32
33static ADDRESS_MAP_START( tlcs_z80_internal_io_map, AS_IO, 8, tlcs_z80_device )
34   AM_RANGE(0x10, 0x13) AM_DEVREADWRITE(TLCSZ80_INTERNAL_CTC_TAG, z80ctc_device, read, write)
35   AM_RANGE(0x18, 0x1B) AM_DEVREADWRITE(TLCSZ80_INTERNAL_SIO_TAG, z80sio0_device, cd_ba_r, cd_ba_w)
36   AM_RANGE(0x1C, 0x1F) AM_DEVREADWRITE(TLCSZ80_INTERNAL_PIO_TAG, z80pio_device, read, write)
37//  AM_RANGE(0xF0, 0xF0) TODO: Watchdog Timer: Stand-by mode Register
38//  AM_RANGE(0xF1, 0xF1) TODO: Watchdog Timer: command Register
39//  AM_RANGE(0xF4, 0xF4) TODO: Daisy chain interrupt precedence Register
40ADDRESS_MAP_END
41
42//This is wrong!
43//We should use the same clock as declared in the TLCS_Z80 instantiation in the driver that uses it.
44#define TLCS_Z80_CLOCK 8000000
45
46static MACHINE_CONFIG_FRAGMENT( tlcs_z80 )
47   MCFG_DEVICE_ADD(TLCSZ80_INTERNAL_CTC_TAG, Z80CTC, TLCS_Z80_CLOCK)
48   MCFG_Z80CTC_INTR_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
49
50   MCFG_Z80SIO0_ADD(TLCSZ80_INTERNAL_SIO_TAG, TLCS_Z80_CLOCK, 0, 0, 0, 0)
51   MCFG_Z80DART_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
52
53   MCFG_DEVICE_ADD(TLCSZ80_INTERNAL_PIO_TAG, Z80PIO, TLCS_Z80_CLOCK)
54   MCFG_Z80PIO_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
55MACHINE_CONFIG_END
56
57tlcs_z80_device::tlcs_z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
58   : z80_device(mconfig, TLCS_Z80, "TLCS-Z80", tag, owner, clock, "tlcs_z80", __FILE__),
59      m_z80ctc(*this, TLCSZ80_INTERNAL_CTC_TAG),
60      m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 8, 0, ADDRESS_MAP_NAME( tlcs_z80_internal_io_map ) )
61   { }
62
63
64WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg0 ) { m_z80ctc->trg0(state ? 0 : 1); }
65WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg1 ) { m_z80ctc->trg1(state ? 0 : 1); }
66WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg2 ) { m_z80ctc->trg2(state ? 0 : 1); }
67WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg3 ) { m_z80ctc->trg3(state ? 0 : 1); }
68
69
70machine_config_constructor tlcs_z80_device::device_mconfig_additions() const
71{
72   return MACHINE_CONFIG_NAME( tlcs_z80 );
73}
74
75const device_type TLCS_Z80 = &device_creator<tlcs_z80_device>;
trunk/src/emu/cpu/z80/tmpz84c011.c
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3030
3131tmpz84c011_device::tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
3232   : z80_device(mconfig, TMPZ84C011, "TMPZ84C011", tag, owner, clock, "tmpz84c011", __FILE__),
33   m_ctc(*this, "ctc"),
3334   m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 16, 0, ADDRESS_MAP_NAME( tmpz84c011_internal_io_map ) ),
3435   m_outportsa(*this),
3536   m_outportsb(*this),
trunk/src/emu/cpu/z80/z80daisy.c
r31068r31069
7272      if (!target->interface(intf))
7373         fatalerror("Device '%s' does not implement the z80daisy interface!\n", daisy->devname);
7474
75      // append to the end
75      // append to the end, or overwrite existing entry
76      daisy_entry *next = (*tailptr) ? (*tailptr)->m_next : NULL;
77      if (*tailptr != NULL)
78         auto_free(cpudevice->machine(), *tailptr);
7679      *tailptr = auto_alloc(cpudevice->machine(), daisy_entry(target));
80      (*tailptr)->m_next = next;
7781      tailptr = &(*tailptr)->m_next;
7882   }
7983}
trunk/src/emu/cpu/z80/tmpz84c015.c
r0r31069
1/***************************************************************************
2
3    Toshiba TMPZ84C015, TLCS-Z80 ASSP Family
4    Z80 CPU, SIO, CTC, CGC(6/8MHz), PIO, WDT
5   
6    TODO:
7    - SIO configuration, or should that be up to the driver?
8    - CGC (clock generator/controller)
9    - WDT (watchdog timer)
10
11***************************************************************************/
12
13#include "tmpz84c015.h"
14
15const device_type TMPZ84C015 = &device_creator<tmpz84c015_device>;
16
17static ADDRESS_MAP_START( tmpz84c015_internal_io_map, AS_IO, 8, tmpz84c015_device )
18   AM_RANGE(0x10, 0x13) AM_MIRROR(0xff00) AM_DEVREADWRITE("ctc", z80ctc_device, read, write)
19   AM_RANGE(0x18, 0x1b) AM_MIRROR(0xff00) AM_DEVREADWRITE("sio", z80dart_device, ba_cd_r, ba_cd_w)
20   AM_RANGE(0x1c, 0x1f) AM_MIRROR(0xff00) AM_DEVREADWRITE("pio", z80pio_device, read_alt, write_alt)
21   AM_RANGE(0xf4, 0xf4) AM_MIRROR(0xff00) AM_WRITE(irq_priority_w)
22ADDRESS_MAP_END
23
24
25tmpz84c015_device::tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
26   : z80_device(mconfig, TMPZ84C015, "TMPZ84C015", tag, owner, clock, "tmpz84c015", __FILE__),
27   m_ctc(*this, "ctc"),
28   m_sio(*this, "sio"),
29   m_pio(*this, "pio"),
30   m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 16, 0, ADDRESS_MAP_NAME( tmpz84c015_internal_io_map ) ),
31   m_irq_priority(-1) // !
32{
33}
34
35
36//-------------------------------------------------
37//  device_start - device-specific startup
38//-------------------------------------------------
39
40void tmpz84c015_device::device_start()
41{
42   z80_device::device_start();
43}
44
45
46//-------------------------------------------------
47//  device_reset - device-specific reset
48//-------------------------------------------------
49
50void tmpz84c015_device::device_reset()
51{
52   irq_priority_w(*m_io, 0, 0);
53   z80_device::device_reset();
54}
55
56
57//-------------------------------------------------
58//  device_post_load - device-specific post-load
59//-------------------------------------------------
60
61void tmpz84c015_device::device_post_load()
62{
63   // reinit irq priority
64   UINT8 prio = m_irq_priority;
65   m_irq_priority = -1;
66   irq_priority_w(*m_io, 0, prio);
67}
68
69
70/* CPU interface */
71WRITE8_MEMBER(tmpz84c015_device::irq_priority_w)
72{
73   data &= 7;
74   
75   if (data > 5)
76   {
77      logerror("tmpz84c015: irq_priority_w undefined state %X\n", data);
78      data &= 3; // guess
79   }
80   
81   if (m_irq_priority != data)
82   {
83      static const char *dev[3] = { "ctc", "sio", "pio" };
84      static const int prio[6][3] =
85      {
86         { 0, 1, 2 }, // 0: ctc -> sio -> pio -> ext
87         { 1, 0, 2 }, // 1: sio -> ctc -> pio -> ext
88         { 0, 2, 1 }, // 2: ctc -> pio -> sio -> ext
89         { 2, 1, 0 }, // 3: pio -> sio -> ctc -> ext
90         { 2, 0, 1 }, // 4: pio -> ctc -> sio -> ext
91         { 1, 2, 0 }  // 5: sio -> pio -> ctc -> ext
92      };
93     
94      // reconfigure first 3 entries in daisy chain
95      const char *daisy[4] = { dev[prio[data][0]], dev[prio[data][1]], dev[prio[data][2]], NULL };
96      m_daisy.init(this, (const z80_daisy_config *)daisy);
97     
98      m_irq_priority = data;
99   }
100}
101
102static MACHINE_CONFIG_FRAGMENT( tmpz84c015 )
103   
104   /* basic machine hardware */
105   MCFG_DEVICE_ADD("ctc", Z80CTC, DERIVED_CLOCK(1,1) )
106   MCFG_Z80CTC_INTR_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
107
108   MCFG_Z80SIO0_ADD("sio", DERIVED_CLOCK(1,1), 0, 0, 0, 0)
109   MCFG_Z80DART_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
110
111   MCFG_DEVICE_ADD("pio", Z80PIO, DERIVED_CLOCK(1,1) )
112   MCFG_Z80PIO_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
113MACHINE_CONFIG_END
114
115machine_config_constructor tmpz84c015_device::device_mconfig_additions() const
116{
117   return MACHINE_CONFIG_NAME( tmpz84c015 );
118}
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trunk/src/emu/cpu/z80/tmpz84c011.h
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4848public:
4949   tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
5050
51   // static configuration helpers
5152   template<class _Object> static devcb_base & set_outportsa_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_outportsa.set_callback(object); }
5253   template<class _Object> static devcb_base & set_outportsb_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_outportsb.set_callback(object); }
5354   template<class _Object> static devcb_base & set_outportsc_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_outportsc.set_callback(object); }
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6061   template<class _Object> static devcb_base & set_inportsd_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_inportsd.set_callback(object); }
6162   template<class _Object> static devcb_base & set_inportse_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_inportse.set_callback(object); }
6263
64   // devices/pointers
65   required_device<z80ctc_device> m_ctc;
66
6367   DECLARE_READ8_MEMBER(tmpz84c011_pa_r);
6468   DECLARE_READ8_MEMBER(tmpz84c011_pb_r);
6569   DECLARE_READ8_MEMBER(tmpz84c011_pc_r);
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99103   }
100104
101105private:
106   // internal state
102107   UINT8 m_pio_dir[5];
103108   UINT8 m_pio_latch[5];
104109
105   devcb_write8      m_outportsa;
106   devcb_write8      m_outportsb;
107   devcb_write8      m_outportsc;
108   devcb_write8      m_outportsd;
109   devcb_write8      m_outportse;
110   // callbacks
111   devcb_write8 m_outportsa;
112   devcb_write8 m_outportsb;
113   devcb_write8 m_outportsc;
114   devcb_write8 m_outportsd;
115   devcb_write8 m_outportse;
110116
111   devcb_read8       m_inportsa;
112   devcb_read8       m_inportsb;
113   devcb_read8       m_inportsc;
114   devcb_read8       m_inportsd;
115   devcb_read8       m_inportse;
117   devcb_read8 m_inportsa;
118   devcb_read8 m_inportsb;
119   devcb_read8 m_inportsc;
120   devcb_read8 m_inportsd;
121   devcb_read8 m_inportse;
116122};
117123
118124extern const device_type TMPZ84C011;
trunk/src/emu/cpu/z80/tmpz84c015.h
r0r31069
1/***************************************************************************
2
3    Toshiba TMPZ84C015, TLCS-Z80 ASSP Family
4    Z80 CPU, SIO, CTC, CGC(6/8MHz), PIO, WDT
5
6***************************************************************************/
7
8#include "emu.h"
9#include "z80.h"
10#include "machine/z80dart.h"
11#include "machine/z80ctc.h"
12#include "machine/z80pio.h"
13
14// If an external daisy chain is used, insert this before your own device tags:
15#define TMPZ84C015_DAISY_INTERNAL { "ctc" }, { "sio" }, { "pio" }
16
17// NOTE: for callbacks, see machine/z80dart.h, machine/z80ctc.h, machine/z80pio.h
18
19
20class tmpz84c015_device : public z80_device
21{
22public:
23   tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
24
25   // devices/pointers
26   required_device<z80ctc_device> m_ctc;
27   required_device<z80dart_device> m_sio;
28   required_device<z80pio_device> m_pio;
29
30   DECLARE_WRITE8_MEMBER(irq_priority_w);
31
32protected:
33   // device-level overrides
34   virtual machine_config_constructor device_mconfig_additions() const;
35   virtual void device_start();
36   virtual void device_reset();
37   virtual void device_post_load();
38
39   const address_space_config m_io_space_config;
40
41   const address_space_config *memory_space_config(address_spacenum spacenum) const
42   {
43      switch (spacenum)
44      {
45         case AS_IO: return &m_io_space_config;
46         default: return z80_device::memory_space_config(spacenum);
47      }
48   }
49
50private:
51   UINT8 m_irq_priority;
52};
53
54extern const device_type TMPZ84C015;
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trunk/src/emu/cpu/z80/z80.h
r31068r31069
44#define __Z80_H__
55
66#include "z80daisy.h"
7#include "machine/z80ctc.h"
87
9#define TLCSZ80_INTERNAL_CTC_TAG      "tlcsz80_int_ctc"
10#define TLCSZ80_INTERNAL_PIO_TAG      "tlcsz80_int_pio"
11#define TLCSZ80_INTERNAL_SIO_TAG      "tlcsz80_int_sio"
12
138enum
149{
1510   NSC800_RSTA = INPUT_LINE_IRQ0 + 1,
r31068r31069
306301
307302extern const device_type NSC800;
308303
309class tlcs_z80_device : public z80_device
310{
311public:
312   tlcs_z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
313304
314   required_device<z80ctc_device> m_z80ctc;
315
316   DECLARE_WRITE8_MEMBER( ctc_w );
317   DECLARE_WRITE_LINE_MEMBER( ctc_trg0 );
318   DECLARE_WRITE_LINE_MEMBER( ctc_trg1 );
319   DECLARE_WRITE_LINE_MEMBER( ctc_trg2 );
320   DECLARE_WRITE_LINE_MEMBER( ctc_trg3 );
321
322protected:
323   virtual machine_config_constructor device_mconfig_additions() const;
324
325   const address_space_config m_io_space_config;
326
327   const address_space_config *memory_space_config(address_spacenum spacenum) const
328   {
329      switch (spacenum)
330      {
331         case AS_IO: return &m_io_space_config;
332         default: return z80_device::memory_space_config(spacenum);
333      }
334   }
335};
336
337
338
339extern const device_type TLCS_Z80;
340
341
342
343305#endif /* __Z80_H__ */
trunk/src/emu/cpu/cpu.mak
r31068r31069
22282228
22292229ifneq ($(filter Z80,$(CPUS)),)
22302230OBJDIRS += $(CPUOBJ)/z80
2231CPUOBJS += $(CPUOBJ)/z80/z80.o $(CPUOBJ)/z80/tlcs_z80.o $(CPUOBJ)/z80/z80daisy.o
2232CPUOBJS += $(CPUOBJ)/z80/tmpz84c011.o
2231CPUOBJS += $(CPUOBJ)/z80/z80.o \
2232   $(CPUOBJ)/z80/z80daisy.o \
2233   $(CPUOBJ)/z80/tmpz84c011.o \
2234   $(CPUOBJ)/z80/tmpz84c015.o
2235
22332236DASMOBJS += $(CPUOBJ)/z80/z80dasm.o
22342237endif
22352238
22362239$(CPUOBJ)/z80/z80.o:    $(CPUSRC)/z80/z80.c \
22372240                  $(CPUSRC)/z80/z80.h
22382241
2239$(CPUOBJ)/z80/tlcs_z80.o:    $(CPUSRC)/z80/tlcs_z80.c \
2240                  $(CPUSRC)/z80/z80.h
22412242
22422243#-------------------------------------------------
22432244# Sharp LR35902 (Game Boy CPU)
trunk/src/mess/drivers/pve500.c
r31068r31069
1515*/
1616
1717#include "emu.h"
18#include "cpu/z80/z80.h"
19#include "machine/z80ctc.h"
20#include "machine/z80dart.h"
18#include "cpu/z80/tmpz84c015.h"
2119#include "pve500.lh"
2220
2321#define IO_EXPANDER_PORTA 0
r31068r31069
4947
5048   virtual void machine_start();
5149   virtual void machine_reset();
52   required_device<tlcs_z80_device> m_maincpu;
53   required_device<tlcs_z80_device> m_subcpu;
50   required_device<tmpz84c015_device> m_maincpu;
51   required_device<tmpz84c015_device> m_subcpu;
5452   UINT8 io_SEL, io_LD, io_LE, io_SC, io_KY;
5553};
5654
5755
5856static const z80_daisy_config maincpu_daisy_chain[] =
5957{
58   TMPZ84C015_DAISY_INTERNAL,
6059   { "external_ctc" },
6160   { "external_sio" },
6261   { NULL }
r31068r31069
6463
6564
6665static ADDRESS_MAP_START(maincpu_io, AS_IO, 8, pve500_state)
66   ADDRESS_MAP_GLOBAL_MASK(0xff)
6767   AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("external_sio", z80sio0_device, cd_ba_r, cd_ba_w)
6868   AM_RANGE(0x08, 0x0B) AM_DEVREADWRITE("external_ctc", z80ctc_device, read, write)
6969ADDRESS_MAP_END
r31068r31069
196196READ8_MEMBER(pve500_state::dualport_ram_left_r)
197197{
198198   //printf("dualport_ram: Left READ\n");
199   m_subcpu->ctc_trg1(1); //(INT_Right)
199   m_subcpu->m_ctc->trg1(1); //(INT_Right)
200200   return dualport_7FE_data;
201201}
202202
r31068r31069
204204{
205205   //printf("dualport_ram: Left WRITE\n");
206206   dualport_7FF_data = data;
207   m_subcpu->ctc_trg1(0); //(INT_Right)
207   m_subcpu->m_ctc->trg1(0); //(INT_Right)
208208}
209209
210210READ8_MEMBER(pve500_state::dualport_ram_right_r)
211211{
212212   //printf("dualport_ram: Right READ\n");
213   m_maincpu->ctc_trg1(1); //(INT_Left)
213   m_maincpu->m_ctc->trg1(1); //(INT_Left)
214214   return dualport_7FF_data;
215215}
216216
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218218{
219219   //printf("dualport_ram: Right WRITE\n");
220220   dualport_7FE_data = data;
221   m_maincpu->ctc_trg1(0); //(INT_Left)
221   m_maincpu->m_ctc->trg1(0); //(INT_Left)
222222}
223223
224224READ8_MEMBER(pve500_state::io_expander_r)
r31068r31069
283283}
284284
285285static MACHINE_CONFIG_START( pve500, pve500_state )
286   MCFG_CPU_ADD("maincpu", TLCS_Z80, XTAL_12MHz / 2) /* TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */
286   MCFG_CPU_ADD("maincpu", TMPZ84C015, XTAL_12MHz / 2) /* TMPZ84C015BF-6 */
287287   MCFG_CPU_PROGRAM_MAP(maincpu_prg)
288288   MCFG_CPU_IO_MAP(maincpu_io)
289289   MCFG_CPU_CONFIG(maincpu_daisy_chain)
r31068r31069
294294   MCFG_Z80SIO0_ADD("external_sio", XTAL_12MHz / 2, 0, 0, 0, 0)
295295   MCFG_Z80DART_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
296296
297   MCFG_CPU_ADD("subcpu", TLCS_Z80, XTAL_12MHz / 2) /* TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */
297   MCFG_CPU_ADD("subcpu", TMPZ84C015, XTAL_12MHz / 2) /* TMPZ84C015BF-6 */
298298   MCFG_CPU_PROGRAM_MAP(subcpu_prg)
299299
300300/* TODO:

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