Previous

199869 Revisions

Next

r30981 Sunday 15th June, 2014 at 15:56:23 UTC by R. Belmont
Apollo updates [Hans Ostermeyer] - Fixed ISA bus endianness, it's the same as other 680x0 systems with ISA - Improved logging in several places - "20 years ago" option updated to now-necessary "25 years ago" - Fixed ISA high IRQ routing - Fixed 3c505 to have a 16 bit ISA interface - Fixed omti8621 and sc499 to have correct-endian ISA interfaces

[src/emu/bus/isa]	3c505.c 3c505.h omti8621.c sc499.c
[src/emu/machine]	mc68681.c
[src/mess/drivers]	apollo.c
[src/mess/includes]	apollo.h
[src/mess/machine]	apollo.c

trunk/src/emu/machine/mc68681.c

r30980	r30981
1007	1007	break;
1008	1008
1009	1009	case 3: // multidrop mode
1010		fatalerror("68681: multidrop parity not supported\n");
	1010	// fatalerror("68681: multidrop parity not supported\n");
	1011	// Apollo DEX CPU will test this; omit to abort the emulation
	1012	logerror("68681: multidrop parity not supported\n");
1011	1013	break;
1012	1014	}
1013	1015

trunk/src/emu/bus/isa/omti8621.c

r30980	r30981
974	974	{
975	975	UINT16 data = 0xff;
976	976	if (data_index < data_length) {
977		data = data_buffer[data_index++] << 8;
978		data |= data_buffer[data_index++];
	977	data = data_buffer[data_index++];
	978	data |= data_buffer[data_index++] << 8;
979	979	if (data_index >= data_length) {
980	980	omti_state = OMTI_STATE_STATUS;
981	981	status_port |= OMTI_STATUS_IO | OMTI_STATUS_CD;
r30980	r30981
994	994	void omti8621_device::set_data(UINT16 data)
995	995	{
996	996	if (data_index < data_length) {
	997	data_buffer[data_index++] = data & 0xff;
997	998	data_buffer[data_index++] = data >> 8;
998		data_buffer[data_index++] = data & 0xff;
999	999	if (data_index >= data_length) {
1000	1000	do_command(command_buffer, command_index);
1001	1001	}
r30980	r30981
1013	1013	switch (mem_mask)
1014	1014	{
1015	1015	case 0x00ff:
1016		write8(space, offset*2+1, data, mem_mask);
	1016	write8(space, offset*2, data, mem_mask);
1017	1017	break;
1018	1018
1019	1019	case 0xff00:
1020		write8(space, offset*2, data>>8, mem_mask>>8);
	1020	write8(space, offset*2+1, data>>8, mem_mask>>8);
1021	1021	break;
1022	1022
1023	1023	default:
r30980	r30981
1125	1125	switch (mem_mask)
1126	1126	{
1127	1127	case 0x00ff:
1128		return read8(space, offset*2+1, mem_mask);
	1128	return read8(space, offset*2, mem_mask);
1129	1129	case 0xff00:
1130		return read8(space, offset*2, mem_mask >> 8) << 8;
	1130	return read8(space, offset*2+1, mem_mask >> 8) << 8;
1131	1131	default:
1132	1132	return get_data();
1133	1133	}
r30980	r30981
1212	1212	}
1213	1213	else
1214	1214	{
1215		LOG1(("omti8621_get_sector %x on lun %d", diskaddr, lun));
	1215	//      LOG1(("omti8621_get_sector %x on lun %d", diskaddr, lun));
1216	1216
1217	1217	// restrict length to size of 1 sector (i.e. 1024 Byte)
1218	1218	length = length < OMTI_DISK_SECTOR_SIZE ? length  : OMTI_DISK_SECTOR_SIZE;

trunk/src/emu/bus/isa/3c505.c

r30980	r30981
12	12	*  - http://lxr.free-electrons.com/source/drivers/net/3c505.h
13	13	*  - http://lxr.free-electrons.com/source/drivers/net/3c505.c
14	14	*  - http://stason.org/TULARC/pc/network-cards/O/OLIVETTI-Ethernet-NPU-9144-3C505.html
15		*  - http://www.bitsavers.org/pdf/3Com/3C500_Mar83.pdf
	15	*  - http://www.bitsavers.org/pdf/3Com/3c505_Etherlink_Plus_Developers_Guide_May86.pdf'
16	16	*  - http://www.bitsavers.org/pdf/3Com/1569-03_EtherLink_Plus_Technical_Reference_Jan89.pdf
	17	*
17	18	*/
18	19
19	20	#include "3c505.h"
r30980	r30981
22	23
23	24	static int verbose = VERBOSE;
24	25
25		#define LOG(x)  { logerror x; logerror ("\n"); }
	26	#define LOG(x)  { logerror ("%s: ", cpu_context()); logerror x; logerror ("\n"); }
26	27	#define LOG1(x) { if (verbose > 0) LOG(x)}
27	28	#define LOG2(x) { if (verbose > 1) LOG(x)}
28	29
r30980	r30981
295	296	{
296	297	}
297	298
	299	threecom3c505_device::threecom3c505_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock)
	300	: device_t(mconfig, type, "3Com 3C505 Network Adaptor", tag, owner, clock, "3c505", __FILE__),
	301	device_network_interface(mconfig, *this, 10.0f),
	302	device_isa16_card_interface(mconfig, *this),
	303	m_iobase(*this, "IO_BASE"),
	304	m_irqdrq(*this, "IRQ_DRQ")
	305	{
	306	}
	307
298	308	ioport_constructor threecom3c505_device::device_input_ports() const
299	309	{
300	310	return INPUT_PORTS_NAME( tc3c505_port );
r30980	r30981
369	379	m_irq = m_irqdrq->read() & 0xf;
370	380	m_drq = (m_irqdrq->read() >> 4) & 0x7;
371	381
372		m_isa->install_device(base, base + ELP_IO_EXTENT - 1, 0, 0, read8_delegate(FUNC(threecom3c505_device::read), this), write8_delegate(FUNC(threecom3c505_device::write), this));
	382	m_isa->install16_device(base, base + ELP_IO_EXTENT - 1, 0, 0, read16_delegate(FUNC(threecom3c505_device::read), this), write16_delegate(FUNC(threecom3c505_device::write), this));
373	383
374	384	m_installed = true;
375	385	}
r30980	r30981
383	393	{
384	394	static char statebuf[64]; /* string buffer containing state description */
385	395
	396	device_t *cpu = machine().device(MAINCPU);
386	397	osd_ticks_t t = osd_ticks();
387	398	int s = t / osd_ticks_per_second();
388	399	int ms = (t % osd_ticks_per_second()) / 1000;
389	400
390		sprintf(statebuf, "%d.%03d:%s:", s, ms, tag());
	401	/* if we have an executing CPU, output data */
	402	if (cpu != NULL)
	403	{
	404	sprintf(statebuf, "%d.%03d %s pc=%08x - %s", s, ms, cpu->tag(),
	405	cpu->safe_pcbase(), tag());
	406	}
	407	else
	408	{
	409	sprintf(statebuf, "%d.%03d", s, ms);
	410	}
391	411	return statebuf;
392	412	}
393	413
r30980	r30981
548	568	memcpy(m_filter_list, m_station_address, ETHERNET_ADDR_SIZE);
549	569	memset(m_filter_list + ETHERNET_ADDR_SIZE, 0xff, ETHERNET_ADDR_SIZE);
550	570	memcpy(m_filter_list + ETHERNET_ADDR_SIZE * 2, m_multicast_list, sizeof(m_multicast_list));
	571
	572	int node_id = (((m_station_address[3] << 8) + m_station_address[4]) << 8) + m_station_address[5];
	573	LOG2(("set_filter_list node_id=%x",node_id));
	574
	575	setfilter(this, node_id);
551	576	}
552	577
553	578	/*-------------------------------------------------
r30980	r30981
1230	1255	LOG(("read_command_port(): !!! failed to send Ethernet packet"));
1231	1256	}
1232	1257
	1258	if (!tx_data(this, m_tx_data_buffer.get_data(), m_tx_data_buffer.get_length()))
	1259	{
	1260	// FIXME: failed to transmit the Ethernet packet
	1261	LOG(("read_command_port(): !!! failed to transmit Ethernet packet"));
	1262	}
	1263
1233	1264	m_tx_data_buffer.reset();
1234	1265	if (m_command_buffer[0] != CMD_TRANSMIT_PACKET_F9)
1235	1266	{
r30980	r30981
1347	1378	LOG(("write_data_port: unexpected command %02x data=%02x", m_command_buffer[0], data));
1348	1379	}
1349	1380
1350		if (m_tx_data_buffer.get_length() >= PORT_DATA_FIFO_SIZE
	1381	if (m_command_buffer[0] != CMD_DOWNLOAD_PROGRAM &&
	1382	m_tx_data_buffer.get_length() >= PORT_DATA_FIFO_SIZE
1351	1383	&& m_tx_data_buffer.get_length() >= m_tx_data_length)
1352	1384	{
1353	1385	m_status &= ~HRDY; /* data register not ready */
r30980	r30981
1505	1537	return data;
1506	1538	}
1507	1539
	1540
1508	1541	/***************************************************************************
1509	1542	write_port
1510	1543	***************************************************************************/
1511	1544
1512		WRITE8_MEMBER(threecom3c505_device::write)
	1545	WRITE16_MEMBER(threecom3c505_device::write)
1513	1546	{
	1547	// make byte offset
	1548	offset *= 2;
	1549
1514	1550	m_reg[offset & 0x0f] = data;
1515		LOG2(("writing 3C505 Register at offset %02x = %02x", offset, data));
	1551	LOG2(("writing 3C505 Register at offset=%02x with mem_mask=%04x = %04x", offset, mem_mask, data));
1516	1552
1517	1553	switch (offset)
1518	1554	{
r30980	r30981
1522	1558	case PORT_AUXDMA: /* 0x02 write only, 8-bit */
1523	1559	break;
1524	1560	case PORT_DATA: /* 0x04 read/write, 16-bit */
1525		case PORT_DATA + 1: /* 0x04 read/write, 16-bit */
1526		write_data_port(data);
	1561	write_data_port(data & 0xff);
	1562	write_data_port(data >> 8);
1527	1563	break;
1528	1564	case PORT_CONTROL: /* 0x06 read/write, 8-bit */
1529	1565	write_control_port(data);
r30980	r30981
1537	1573	read_port
1538	1574	***************************************************************************/
1539	1575
1540		READ8_MEMBER(threecom3c505_device::read)
	1576	READ16_MEMBER(threecom3c505_device::read)
1541	1577	{
1542	1578	// data to omit excessive logging
1543		static UINT8 last_data = 0xff;
	1579	static UINT16 last_data = 0xff;
1544	1580	static UINT32 last_pc = 0;
1545	1581
1546		UINT8 data = m_reg[offset & 0x0f];
	1582	// make byte offset
	1583	offset *= 2;
	1584
	1585	UINT16 data = m_reg[offset & 0x0f];
1547	1586	switch (offset)
1548	1587	{
1549	1588	case PORT_COMMAND: /* 0x00 read/write, 8-bit */
r30980	r30981
1555	1594	// omit excessive logging
1556	1595	if (data == last_data)
1557	1596	{
1558		UINT32 pc = machine().device(MAINCPU)->safe_pcbase();
	1597	UINT32 pc = space.device().safe_pcbase();
1559	1598	if (pc == last_pc)
1560	1599	{
1561	1600	return data;
r30980	r30981
1563	1602	last_pc = pc;
1564	1603	}
1565	1604	last_data = data;
1566
1567	1605	break;
1568	1606	case PORT_DATA: /* 0x04 read/write, 16-bit */
1569		case PORT_DATA + 1: /* 0x04 read/write, 16-bit */
1570	1607	data = read_data_port();
	1608	data |= (read_data_port() << 8);
1571	1609	break;
1572	1610	case PORT_CONTROL: /* 0x06 read/write, 8-bit */
1573	1611	data = m_control;
r30980	r30981
1576	1614	break;
1577	1615	}
1578	1616
1579		LOG2(("reading 3C505 Register at offset %02x = %02x", offset, data));
	1617	LOG2(("reading 3C505 Register at offset=%02x with mem_mask=%04x = %04x", offset, mem_mask, data));
	1618
1580	1619	return data;
1581	1620	}
	1621
	1622	void threecom3c505_device::set_verbose(int on_off)
	1623	{
	1624	verbose = on_off == 0 ? 0 : VERBOSE > 1 ? VERBOSE : 1;
	1625	}
	1626
	1627	int threecom3c505_device::tx_data(device_t *device, const UINT8 data[], int length)
	1628	{
	1629	LOG1(("threecom3c505_device::tx_data length=%d", length));
	1630	return 1;
	1631	}
	1632
	1633	int threecom3c505_device::setfilter(device_t *device, int node_id)
	1634	{
	1635	return 0;
	1636	}

trunk/src/emu/bus/isa/3c505.h

r30980	r30981
125	125	public:
126	126	// construction/destruction
127	127	threecom3c505_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	128	threecom3c505_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock);
128	129
129	130	// device register I/O
130		DECLARE_READ8_MEMBER(read);
131		DECLARE_WRITE8_MEMBER(write);
	131	virtual DECLARE_READ16_MEMBER(read);
	132	virtual DECLARE_WRITE16_MEMBER(write);
132	133
	134	static void set_verbose(int on_off);
	135
133	136	required_ioport m_iobase;
134	137	required_ioport m_irqdrq;
135	138
	139	virtual void recv_cb(UINT8 *data, int length);
	140
	141	protected:
	142	virtual int tx_data(device_t *, const UINT8 *, int);
	143	virtual int setfilter(device_t *, int);
	144
	145	const char *cpu_context();
	146
	147	// device-level overrides
	148	virtual void device_start();
	149
136	150	private:
137	151	// device-level overrides
138		virtual void device_start();
139	152	virtual void device_reset();
140	153	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
141	154	virtual ioport_constructor device_input_ports() const;
142	155
143		const char *cpu_context();
144
145	156	class data_buffer_fifo;
146	157
147	158	/* data buffer */
r30980	r30981
165	176	void log(const char *title) const;
166	177
167	178	private:
	179	const char *cpu_context() { return m_device->cpu_context(); }
	180
168	181	threecom3c505_device *m_device; // pointer back to our device
169	182	UINT16 m_length;
170	183	dynamic_buffer m_data;
r30980	r30981
183	196	int is_empty () { return m_get_index == m_put_index; }
184	197	int is_full () { return ((m_put_index + 1) % m_size) == m_get_index; }
185	198	private:
	199	const char *cpu_context() { return m_device->cpu_context(); }
	200
186	201	threecom3c505_device *m_device; // pointer back to our device
187	202	UINT16 m_size;
188	203	UINT16 m_count;
r30980	r30981
212	227	UINT8 read_status_port();
213	228
214	229	void do_command();
215		virtual void recv_cb(UINT8 *data, int length);
216	230
217	231	UINT8 m_reg[16];
218	232

trunk/src/emu/bus/isa/sc499.c

r30980	r30981
397	397
398	398	m_isa->install_device(base, base+7, 0, 0, read8_delegate(FUNC(sc499_device::read), this), write8_delegate(FUNC(sc499_device::write), this));
399	399	m_isa->set_dma_channel(m_drq, this, true);
	400
	401	m_installed = true;
400	402	}
401	403	}
402	404
r30980	r30981
1014	1016
1015	1017	WRITE8_MEMBER(sc499_device::write)
1016	1018	{
1017		switch (offset^1)
	1019	switch (offset)
1018	1020	{
1019	1021	case SC499_PORT_COMMAND: // write command
1020	1022	write_command_port(data);
r30980	r30981
1038	1040	{
1039	1041	UINT8 data = 0xff;
1040	1042
1041		switch (offset^1)
	1043	switch (offset)
1042	1044	{
1043	1045	case SC499_PORT_DATA: // read data (status data)
1044	1046	data = read_data_port();

trunk/src/mess/includes/apollo.h

r30980	r30981
29	29	#include "machine/clock.h"
30	30	#include "bus/isa/isa.h"
31	31	#include "bus/isa/isa_cards.h"
	32	#include "bus/isa/3c505.h"
32	33
33	34	#ifndef VERBOSE
34	35	#define VERBOSE 0
r30980	r30981
53	54	#define  MAINCPU "maincpu"
54	55
55	56	/*----------- machine/apollo_dbg.c -----------*/
	57
56	58	int apollo_debug_instruction_hook(m68000_base_device *device, offs_t curpc);
57	59
58	60	/*----------- drivers/apollo.c -----------*/
r30980	r30981
89	91	#define APOLLO_DMA1_TAG "dma8237_1"
90	92	#define APOLLO_DMA2_TAG "dma8237_2"
91	93	#define APOLLO_KBD_TAG  "kbd"
	94	#define APOLLO_STDIO_TAG "stdio"
92	95	#define APOLLO_PIC1_TAG "pic8259_master"
93	96	#define APOLLO_PIC2_TAG "pic8259_slave"
94	97	#define APOLLO_PTM_TAG  "ptm"
r30980	r30981
98	101	#define APOLLO_ETH_TAG  "3c505"
99	102	#define APOLLO_ISA_TAG "isabus"
100	103
	104	// forward declaration
	105	class apollo_sio;
	106
101	107	class apollo_state : public driver_device
102	108	{
103	109	public:
r30980	r30981
124	130	required_device<pic8259_device> m_pic8259_master;
125	131	required_device<pic8259_device> m_pic8259_slave;
126	132	required_device<ptm6840_device> m_ptm;
127		required_device<mc68681_device> m_sio;
128		optional_device<mc68681_device> m_sio2;
	133	required_device<apollo_sio> m_sio;
	134	optional_device<apollo_sio> m_sio2;
129	135	required_device<mc146818_device> m_rtc;
130	136	required_device<isa16_device> m_isa;
131	137
r30980	r30981
232	238
233	239	void apollo_pic_set_irq_line(int irq, int state);
234	240	void select_dma_channel(int channel, bool state);
235
	241
236	242	DECLARE_WRITE_LINE_MEMBER(apollo_reset_instr_callback);
237	243	DECLARE_READ32_MEMBER(apollo_instruction_hook);
238	244
r30980	r30981
258	264	#define APOLLO_CONF_MONO_15I     0x0008
259	265	#define APOLLO_CONF_MONO_19I     0x0010
260	266	#define APOLLO_CONF_GERMAN_KBD   0x0020
261		#define APOLLO_CONF_DATE_1990    0x0040
262		#define APOLLO_CONF_NODE_ID      0x0080
263		#define APOLLO_CONF_IDLE_SLEEP   0x0100
264		#define APOLLO_CONF_TRAP_TRACE   0x0200
265		#define APOLLO_CONF_FPU_TRACE    0x0400
266		#define APOLLO_CONF_DISK_TRACE   0x0800
267		#define APOLLO_CONF_NET_TRACE    0x1000
	267	#define APOLLO_CONF_20_YEARS_AGO 0x0040
	268	#define APOLLO_CONF_25_YEARS_AGO 0x0080
	269	#define APOLLO_CONF_NODE_ID      0x0100
	270	#define APOLLO_CONF_IDLE_SLEEP   0x0200
	271	#define APOLLO_CONF_TRAP_TRACE   0x0400
	272	#define APOLLO_CONF_FPU_TRACE    0x0800
	273	#define APOLLO_CONF_DISK_TRACE   0x1000
	274	#define APOLLO_CONF_NET_TRACE    0x2000
268	275
269	276	// check configuration setting
270	277	int apollo_config(int mask);
r30980	r30981
293	300	UINT16 apollo_csr_get_status_register(void);
294	301	void apollo_csr_set_status_register(UINT16 mask, UINT16 data);
295	302
	303	/*----------- machine/apollo_sio.c -----------*/
	304
	305	#define MCFG_APOLLO_SIO_ADD(_tag, _clock) \
	306	MCFG_DEVICE_ADD(_tag, APOLLO_SIO, _clock)
	307
	308	#define MCFG_APOLLO_SIO_IRQ_CALLBACK(_cb) \
	309	devcb = &apollo_sio::set_irq_cb(*device, DEVCB_##_cb);
	310
	311	#define MCFG_APOLLO_SIO_A_TX_CALLBACK(_cb) \
	312	devcb = &apollo_sio::set_a_tx_cb(*device, DEVCB_##_cb);
	313
	314	#define MCFG_APOLLO_SIO_B_TX_CALLBACK(_cb) \
	315	devcb = &apollo_sio::set_b_tx_cb(*device, DEVCB_##_cb);
	316
	317	#define MCFG_APOLLO_SIO_OUTPORT_CALLBACK(_cb) \
	318	devcb = &apollo_sio::set_outport_cb(*device, DEVCB_##_cb);
	319
	320	class apollo_sio: public mc68681_device
	321	{
	322	public:
	323	apollo_sio(const machine_config &mconfig, const char *tag,
	324	device_t *owner, UINT32 clock);
	325
	326	DECLARE_READ8_MEMBER(read);
	327	DECLARE_WRITE8_MEMBER(write);
	328
	329	protected:
	330	virtual void device_reset();
	331
	332	private:
	333	UINT8 m_csrb;
	334	UINT8 m_ip6;
	335	};
	336
	337	extern const device_type APOLLO_SIO;
	338
296	339	/*----------- video/apollo.c -----------*/
297	340
298	341	#define APOLLO_SCREEN_TAG "apollo_screen"
r30980	r30981
528	571	running_machine *m_machine;
529	572	};
530	573
531
532
533	574	extern const device_type APOLLO_GRAPHICS;
534	575
535	576	#define MCFG_APOLLO_GRAPHICS_ADD( _tag) \
r30980	r30981
559	600
560	601	MACHINE_CONFIG_EXTERN( apollo_mono19i );
561	602
562
563	603	#endif /* APOLLO_H_ */

trunk/src/mess/drivers/apollo.c

r30980	r30981
27	27	#define VERBOSE 0
28	28
29	29	#include "includes/apollo.h"
30		#include "machine/apollo_kbd.h"
31
32	30	#include "debugger.h"
33
34	31	#include "cpu/m68000/m68kcpu.h"
35
36	32	#include "sound/beep.h"
37
38	33	#include "apollo_dsp.lh"
39	34
	35	// we use set_verbose
	36	#include "bus/isa/omti8621.h"
	37	#include "bus/isa/3c505.h"
	38
40	39	#define TERMINAL_TAG "terminal"
41	40
42	41	// we use this to prevent excessive logging (if emulation runs amok)
r30980	r30981
56	55	#define ATBUS_MEMORY_BASE   0x080000
57	56	#define ATBUS_MEMORY_END    0xffffff
58	57
59		#define DN3500_RAM_SIZE     16 // 8 or 16 MB
	58	#define DN3500_RAM_SIZE     16 // 8, 16 or 32 MB
60	59
61	60	#if DN3500_RAM_SIZE == 8
62	61	#define DN3500_RAM_BASE     0x1000000
63	62	#define DN3500_RAM_END      0x17fffff
64		#define DN3500_RAM_CONFIG_BYTE  0x64 // or 0xe8
65		#else /* DN3500_RAM_SIZE == 16 */
	63	#define DN3500_RAM_CONFIG_BYTE  0x64 // 4-4-0-0
	64	#elif DN3500_RAM_SIZE == 16
66	65	#define DN3500_RAM_BASE     0x1000000
67	66	#define DN3500_RAM_END      0x1ffffff
68	67	#define DN3500_RAM_CONFIG_BYTE 0x60 // 4-4-4-4
69		//#define DN3500_RAM_CONFIG_BYTE 0x14 // 8-8-0-0
	68	#else /* DN3500_RAM_SIZE == 32 */
	69	#define DN3500_RAM_BASE     0x1000000
	70	#define DN3500_RAM_END      0x3ffffff
	71	#define DN3500_RAM_CONFIG_BYTE 0x20 // 8-8-8-8
70	72	#endif
71	73
72	74	#define DN3000_RAM_BASE     0x100000
73	75	#define DN3000_RAM_END      0x8fffff
74		#define DN3000_RAM_CONFIG_8MB  0xA8
	76	#define DN3000_RAM_CONFIG_8MB  0x20 // 2-2-2-2
75	77
76	78	#define DN5500_RAM_SIZE     32 // 16 or 32 MB
77	79
r30980	r30981
570	572
571	573	READ16_MEMBER(apollo_state::apollo_atbus_io_r)
572	574	{
573		UINT32 isa_addr = (offset & 3) + ((offset & ~0x1ff)>>7);
	575	UINT32 isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
574	576
575		return m_isa->io16_r(space, isa_addr, mem_mask);
	577	// Motorola CPU is MSB first, ISA Bus is LSB first
	578	UINT16 data = m_isa->io16_swap_r(space, isa_addr, mem_mask);
	579
	580	SLOG2(("apollo_atbus_io_r at %08x -> %04x = %04x & %04x", offset*2, isa_addr*2, data, mem_mask));
	581
	582	return data;
576	583	}
577	584
578	585	WRITE16_MEMBER(apollo_state::apollo_atbus_io_w)
579	586	{
580		UINT32 isa_addr = (offset & 3) + ((offset & ~0x1ff)>>7);
	587	UINT32 isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
581	588
582		m_isa->io16_w(space, isa_addr, data, mem_mask);
	589	SLOG2(("apollo_atbus_io_w at %08x -> %04x = %04x & %04x", offset*2, isa_addr*2, data, mem_mask));
	590
	591	// Motorola CPU is MSB first, ISA Bus is LSB first
	592	m_isa->io16_swap_w(space, isa_addr, data, mem_mask);
583	593	}
584	594
585	595	/***************************************************************************
r30980	r30981
671	681	AM_RANGE(0x010100, 0x0101ff) AM_READWRITE16(apollo_csr_control_register_r, apollo_csr_control_register_w, 0xffffffff)
672	682	AM_RANGE(0x010200, 0x0102ff) AM_READWRITE8(cache_status_register_r, cache_control_register_w, 0xffffffff )
673	683	AM_RANGE(0x010300, 0x0103ff) AM_READWRITE8(task_alias_register_r , task_alias_register_w , 0xffffffff )
674		AM_RANGE(0x010400, 0x0104ff) AM_DEVREADWRITE8(APOLLO_SIO_TAG, mc68681_device, read, write, 0x00ff00ff )
	684	AM_RANGE(0x010400, 0x0104ff) AM_DEVREADWRITE8(APOLLO_SIO_TAG, apollo_sio, read, write, 0xffffffff )
675	685	AM_RANGE(0x010500, 0x0105ff) AM_DEVREADWRITE8(APOLLO_SIO2_TAG, mc68681_device, read, write, 0x00ff00ff )
676	686	AM_RANGE(0x010800, 0x0108ff) AM_DEVREADWRITE8(APOLLO_PTM_TAG, ptm6840_device, read, write, 0x00ff00ff )
677	687	AM_RANGE(0x010900, 0x0109ff) AM_READWRITE8(apollo_rtc_r, apollo_rtc_w, 0xffffffff )
r30980	r30981
717	727	AM_RANGE(0x010100, 0x0101ff) AM_READWRITE16(apollo_csr_control_register_r, apollo_csr_control_register_w, 0xffffffff)
718	728	AM_RANGE(0x010200, 0x0102ff) AM_READWRITE8(cache_status_register_r, cache_control_register_w, 0xffffffff )
719	729	AM_RANGE(0x010300, 0x0103ff) AM_READWRITE8(task_alias_register_r , task_alias_register_w , 0xffffffff )
720		AM_RANGE(0x010400, 0x0104ff) AM_DEVREADWRITE8(APOLLO_SIO_TAG, mc68681_device, read, write, 0x00ff00ff )
	730	AM_RANGE(0x010400, 0x0104ff) AM_DEVREADWRITE8(APOLLO_SIO_TAG, apollo_sio, read, write, 0xffffffff )
721	731	AM_RANGE(0x010500, 0x0105ff) AM_DEVREADWRITE8(APOLLO_SIO2_TAG, mc68681_device, read, write, 0x00ff00ff )
722	732	AM_RANGE(0x010800, 0x0108ff) AM_DEVREADWRITE8(APOLLO_PTM_TAG, ptm6840_device, read, write, 0x00ff00ff )
723	733	AM_RANGE(0x010900, 0x0109ff) AM_READWRITE8(apollo_rtc_r, apollo_rtc_w, 0xffffffff )
r30980	r30981
749	759	AM_RANGE(0x000000, 0x007fff) AM_WRITE(apollo_rom_w)
750	760	AM_RANGE(0x008000, 0x0080ff) AM_READWRITE16(apollo_csr_status_register_r, apollo_csr_status_register_w, 0xffffffff)
751	761	AM_RANGE(0x008100, 0x0081ff) AM_READWRITE16(apollo_csr_control_register_r, apollo_csr_control_register_w, 0xffffffff)
752		AM_RANGE(0x008400, 0x0087ff) AM_DEVREADWRITE8(APOLLO_SIO_TAG, mc68681_device, read, write, 0x00ff00ff )
	762	AM_RANGE(0x008400, 0x0087ff) AM_DEVREADWRITE8(APOLLO_SIO_TAG, apollo_sio, read, write, 0xffffffff )
753	763	AM_RANGE(0x008800, 0x0088ff) AM_DEVREADWRITE8(APOLLO_PTM_TAG, ptm6840_device, read, write, 0x00ff00ff )
754	764	AM_RANGE(0x008900, 0x0089ff) AM_READWRITE8(apollo_rtc_r, apollo_rtc_w, 0xffffffff )
755	765	AM_RANGE(0x009000, 0x0090ff) AM_READWRITE8(/*"dma1",*/apollo_dma_1_r, apollo_dma_1_w, 0xffffffff )
r30980	r30981
784	794	AM_RANGE(0x000000, 0x007fff) AM_WRITE(apollo_rom_w)
785	795	AM_RANGE(0x008000, 0x0080ff) AM_READWRITE16(apollo_csr_status_register_r, apollo_csr_status_register_w, 0xffffffff)
786	796	AM_RANGE(0x008100, 0x0081ff) AM_READWRITE16(apollo_csr_control_register_r, apollo_csr_control_register_w, 0xffffffff)
787		AM_RANGE(0x008400, 0x0087ff) AM_DEVREADWRITE8(APOLLO_SIO_TAG, mc68681_device, read, write, 0x00ff00ff )
	797	AM_RANGE(0x008400, 0x0087ff) AM_DEVREADWRITE8(APOLLO_SIO_TAG, apollo_sio, read, write, 0xffffffff )
788	798	AM_RANGE(0x008800, 0x0088ff) AM_DEVREADWRITE8(APOLLO_PTM_TAG, ptm6840_device, read, write, 0x00ff00ff )
789	799	AM_RANGE(0x008900, 0x0089ff) AM_READWRITE8(apollo_rtc_r, apollo_rtc_w, 0xffffffff )
790	800
r30980	r30981
817	827	AM_RANGE(0x010100, 0x0101ff) AM_READWRITE16(apollo_csr_control_register_r, apollo_csr_control_register_w, 0xffffffff)
818	828	AM_RANGE(0x010200, 0x0102ff) AM_READWRITE8(cache_status_register_r, cache_control_register_w, 0xffffffff )
819	829	AM_RANGE(0x010300, 0x0103ff) AM_READWRITE8(task_alias_register_r , task_alias_register_w , 0xffffffff )
820		AM_RANGE(0x010400, 0x0104ff) AM_DEVREADWRITE8(APOLLO_SIO_TAG, mc68681_device, read, write, 0x00ff00ff )
	830	AM_RANGE(0x010400, 0x0104ff) AM_DEVREADWRITE8(APOLLO_SIO_TAG, apollo_sio, read, write, 0xffffffff )
821	831	AM_RANGE(0x010500, 0x0105ff) AM_DEVREADWRITE8(APOLLO_SIO2_TAG, mc68681_device, read, write, 0x00ff00ff )
822	832	AM_RANGE(0x010800, 0x0108ff) AM_DEVREADWRITE8(APOLLO_PTM_TAG, ptm6840_device, read, write, 0x00ff00ff )
823	833	AM_RANGE(0x010900, 0x0109ff) AM_READWRITE8(apollo_rtc_r, apollo_rtc_w, 0xffffffff )
r30980	r30981
866	876	AM_RANGE(0x010100, 0x0101ff) AM_READWRITE16(apollo_csr_control_register_r, apollo_csr_control_register_w, 0xffffffff)
867	877	AM_RANGE(0x010200, 0x0102ff) AM_READWRITE8(cache_status_register_r, cache_control_register_w, 0xffffffff )
868	878	AM_RANGE(0x010300, 0x0103ff) AM_READWRITE8(task_alias_register_r , task_alias_register_w , 0xffffffff )
869		AM_RANGE(0x010400, 0x0104ff) AM_DEVREADWRITE8(APOLLO_SIO_TAG, mc68681_device, read, write, 0x00ff00ff )
	879	AM_RANGE(0x010400, 0x0104ff) AM_DEVREADWRITE8(APOLLO_SIO_TAG, apollo_sio, read, write, 0xffffffff )
870	880	AM_RANGE(0x010500, 0x0105ff) AM_DEVREADWRITE8(APOLLO_SIO2_TAG, mc68681_device, read, write, 0x00ff00ff )
871	881	AM_RANGE(0x010800, 0x0108ff) AM_DEVREADWRITE8(APOLLO_PTM_TAG, ptm6840_device, read, write, 0x00ff00ff )
872	882	AM_RANGE(0x010900, 0x0109ff) AM_READWRITE8(apollo_rtc_r, apollo_rtc_w, 0xffffffff )
r30980	r30981
1096	1106	/* video hardware 19" monochrome */
1097	1107	MCFG_APOLLO_MONO19I_ADD(APOLLO_SCREEN_TAG)
1098	1108	MCFG_DEVICE_ADD(APOLLO_KBD_TAG, APOLLO_KBD, 0)
1099		MCFG_APOLLO_KBD_TX_CALLBACK(DEVWRITELINE(APOLLO_SIO_TAG, mc68681_device, rx_a_w))
	1109	MCFG_APOLLO_KBD_TX_CALLBACK(DEVWRITELINE(APOLLO_SIO_TAG, apollo_sio, rx_a_w))
1100	1110	MCFG_APOLLO_KBD_GERMAN_CALLBACK(READLINE(apollo_state, apollo_kbd_is_german))
1101	1111	MACHINE_CONFIG_END
1102	1112
r30980	r30981
1104	1114	/* video hardware is 15" monochrome or color */
1105	1115	MCFG_APOLLO_GRAPHICS_ADD(APOLLO_SCREEN_TAG)
1106	1116	MCFG_DEVICE_ADD(APOLLO_KBD_TAG, APOLLO_KBD, 0)
1107		MCFG_APOLLO_KBD_TX_CALLBACK(DEVWRITELINE(APOLLO_SIO_TAG, mc68681_device, rx_a_w))
	1117	MCFG_APOLLO_KBD_TX_CALLBACK(DEVWRITELINE(APOLLO_SIO_TAG, apollo_sio, rx_a_w))
1108	1118	MCFG_APOLLO_KBD_GERMAN_CALLBACK(READLINE(apollo_state, apollo_kbd_is_german))
1109	1119	MACHINE_CONFIG_END
1110	1120
r30980	r30981
1147	1157	/* video hardware 19" monochrome */
1148	1158	MCFG_APOLLO_MONO19I_ADD(APOLLO_SCREEN_TAG)
1149	1159	MCFG_DEVICE_ADD(APOLLO_KBD_TAG, APOLLO_KBD, 0)
1150		MCFG_APOLLO_KBD_TX_CALLBACK(DEVWRITELINE(APOLLO_SIO_TAG, mc68681_device, rx_a_w))
	1160	MCFG_APOLLO_KBD_TX_CALLBACK(DEVWRITELINE(APOLLO_SIO_TAG, apollo_sio, rx_a_w))
1151	1161	MCFG_APOLLO_KBD_GERMAN_CALLBACK(READLINE(apollo_state, apollo_kbd_is_german))
1152	1162	MACHINE_CONFIG_END
1153	1163
r30980	r30981
1155	1165	/* video hardware 15" monochrome */
1156	1166	MCFG_APOLLO_GRAPHICS_ADD(APOLLO_SCREEN_TAG)
1157	1167	MCFG_DEVICE_ADD(APOLLO_KBD_TAG, APOLLO_KBD, 0)
1158		MCFG_APOLLO_KBD_TX_CALLBACK(DEVWRITELINE(APOLLO_SIO_TAG, mc68681_device, rx_a_w))
	1168	MCFG_APOLLO_KBD_TX_CALLBACK(DEVWRITELINE(APOLLO_SIO_TAG, apollo_sio, rx_a_w))
1159	1169	MCFG_APOLLO_KBD_GERMAN_CALLBACK(READLINE(apollo_state, apollo_kbd_is_german))
1160	1170	MACHINE_CONFIG_END
1161	1171
r30980	r30981
1185	1195	/* video hardware 19" monochrome */
1186	1196	MCFG_APOLLO_MONO19I_ADD(APOLLO_SCREEN_TAG)
1187	1197	MCFG_DEVICE_ADD(APOLLO_KBD_TAG, APOLLO_KBD, 0)
1188		MCFG_APOLLO_KBD_TX_CALLBACK(DEVWRITELINE(APOLLO_SIO_TAG, mc68681_device, rx_a_w))
	1198	MCFG_APOLLO_KBD_TX_CALLBACK(DEVWRITELINE(APOLLO_SIO_TAG, apollo_sio, rx_a_w))
1189	1199	MCFG_APOLLO_KBD_GERMAN_CALLBACK(READLINE(apollo_state, apollo_kbd_is_german))
1190	1200	MACHINE_CONFIG_END
1191	1201
r30980	r30981
1193	1203	/* video hardware 15" monochrome */
1194	1204	MCFG_APOLLO_GRAPHICS_ADD(APOLLO_SCREEN_TAG)
1195	1205	MCFG_DEVICE_ADD(APOLLO_KBD_TAG, APOLLO_KBD, 0)
1196		MCFG_APOLLO_KBD_TX_CALLBACK(DEVWRITELINE(APOLLO_SIO_TAG, mc68681_device, rx_a_w))
	1206	MCFG_APOLLO_KBD_TX_CALLBACK(DEVWRITELINE(APOLLO_SIO_TAG, apollo_sio, rx_a_w))
1197	1207	MCFG_APOLLO_KBD_GERMAN_CALLBACK(READLINE(apollo_state, apollo_kbd_is_german))
1198	1208	MACHINE_CONFIG_END
1199	1209

trunk/src/mess/machine/apollo.c

r30980	r30981
16	16	* - apollo_rtc.c - APOLLO DS3500 RTC MC146818
17	17	* - apollo_sio.c - APOLLO DS3500 SIO
18	18	* - apollo_sio2.c - APOLLO DS3500 SIO2
19		* - apollo_fdc.c - APOLLO DS3500 Floppy disk controller
	19	* - apollo_stdio.c - stdio terminal for mess
	20	* - apollo_3c505.h - Apollo 3C505 Ethernet controller
20	21	*
21	22	* see also:
22	23	* - http://www.bitsavers.org/pdf/apollo/008778-03_DOMAIN_Series_3000_4000_Technical_Reference_Aug87.pdf
r30980	r30981
88	89	PORT_CONFSETTING(0x00, DEF_STR ( Off ) )
89	90	PORT_CONFSETTING(APOLLO_CONF_GERMAN_KBD, DEF_STR ( On ) )
90	91
91		PORT_CONFNAME(APOLLO_CONF_DATE_1990, APOLLO_CONF_DATE_1990, "20 Years Ago ...")
	92	PORT_CONFNAME(APOLLO_CONF_20_YEARS_AGO, APOLLO_CONF_20_YEARS_AGO, "20 Years Ago ...")
92	93	PORT_CONFSETTING(0x00, DEF_STR ( Off ) )
93		PORT_CONFSETTING(APOLLO_CONF_DATE_1990, DEF_STR ( On ) )
	94	PORT_CONFSETTING(APOLLO_CONF_20_YEARS_AGO, DEF_STR ( On ) )
94	95
	96	PORT_CONFNAME(APOLLO_CONF_25_YEARS_AGO, APOLLO_CONF_25_YEARS_AGO, "25 Years Ago ...")
	97	PORT_CONFSETTING(0x00, DEF_STR ( Off ) )
	98	PORT_CONFSETTING(APOLLO_CONF_25_YEARS_AGO, DEF_STR ( On ) )
	99
95	100	PORT_CONFNAME(APOLLO_CONF_NODE_ID, APOLLO_CONF_NODE_ID, "Node ID from Disk")
96	101	PORT_CONFSETTING(0x00, DEF_STR ( Off ) )
97	102	PORT_CONFSETTING(APOLLO_CONF_NODE_ID, DEF_STR ( On ) )
98	103
99		PORT_CONFNAME(APOLLO_CONF_IDLE_SLEEP, 0x00, "Idle Sleep")
100		PORT_CONFSETTING(0x00, DEF_STR ( Off ) )
101		PORT_CONFSETTING(APOLLO_CONF_IDLE_SLEEP, DEF_STR ( On ) )
	104	//      PORT_CONFNAME(APOLLO_CONF_IDLE_SLEEP, 0x00, "Idle Sleep")
	105	//      PORT_CONFSETTING(0x00, DEF_STR ( Off ) )
	106	//      PORT_CONFSETTING(APOLLO_CONF_IDLE_SLEEP, DEF_STR ( On ) )
102	107
103	108	PORT_CONFNAME(APOLLO_CONF_TRAP_TRACE, 0x00, "Trap Trace")
104	109	PORT_CONFSETTING(0x00, DEF_STR ( Off ) )
r30980	r30981
631	636	}
632	637	}
633	638
634
635	639	//##########################################################################
636	640	// machine/apollo_ptm.c - APOLLO DS3500 Programmable Timer 6840
637	641	//##########################################################################
r30980	r30981
713	717	}
714	718
715	719	//##########################################################################
716		// machine/apollo_sio.c - APOLLO DS3500 SIO
	720	// machine/apollo_sio.c - DN3000/DS3500 SIO at 0x8400/0x10400
717	721	//##########################################################################
718	722
	723	#undef VERBOSE
	724	#define VERBOSE 0
	725
	726	apollo_sio::apollo_sio(const machine_config &mconfig, const char *tag,
	727	device_t *owner, UINT32 clock) :
	728	mc68681_device(mconfig, tag, owner, clock),
	729	m_csrb(0),
	730	m_ip6(0)
	731	{
	732	}
	733
	734	void apollo_sio::device_reset()
	735	{
	736	UINT8 input_data = apollo_get_ram_config_byte();
	737	ip0_w((input_data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
	738	ip1_w((input_data & 0x02) ? ASSERT_LINE : CLEAR_LINE);
	739	ip2_w((input_data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
	740	ip3_w((input_data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	741	ip4_w((input_data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
	742	ip5_w((input_data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
	743	//   ip6_w((input_data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
	744
	745	// MC2681 has IP[6] (instead of /IACK on MC68681)
	746	m_ip6 = (input_data & 0x40) ? ASSERT_LINE : CLEAR_LINE;
	747	}
	748
	749	READ8_MEMBER( apollo_sio::read )
	750	{
	751	static int last_read8_offset[2] = { -1, -1 };
	752	static int last_read8_value[2] = { -1, -1 };
	753
	754	static const char * const duart68681_reg_read_names[0x10] = { "MRA", "SRA",
	755	"BRG Test", "RHRA", "IPCR", "ISR", "CTU", "CTL", "MRB", "SRB",
	756	"1X/16X Test", "RHRB", "IVR", "Input Ports", "Start Counter",
	757	"Stop Counter" };
	758
	759	int data = mc68681_device::read(space, offset/2, mem_mask);
	760
	761	switch (offset / 2)
	762	{
	763	case 0x0b: /* RHRB */
	764	if (m_csrb == 0x77 && data == 0xfe)
	765	{
	766	// special fix for the MD ROM baudrate recognition
	767	// fix data only if CR is entered while baudrate is set to 2000 Baud
	768
	769	// Receive and transmit clock in diserial.c are not precise enough
	770	// to support the baudrate recognition done in the Apollo MD ROM
	771	// use 0xff instead of 0xfe to set the baudrate recognition for 9600 Bd
	772	// (to prevent that the MD selftest or SK command will hang in Service mode)
	773	data = 0xff;
	774	}
	775	break;
	776	case 0x0d: /* IP */
	777	// MC2681 has IP[6] (instead of /IACK on MC68681)
	778	data = (data & ~0x40) | (m_ip6 ? 0x40 : 0);
	779	break;
	780	}
	781
	782	// omit logging if sio is being polled from the boot rom
	783	if ((offset != last_read8_offset[1] || data != last_read8_value[1]) && \
	784	(offset != last_read8_offset[0] || data != last_read8_value[0]))
	785	{
	786	last_read8_offset[0] = last_read8_offset[1];
	787	last_read8_value[0] = last_read8_value[1];
	788	last_read8_offset[1] = offset;
	789	last_read8_value[1] = data;
	790	CLOG2(("reading MC2681 reg %02x (%s) returned %02x",
	791	offset, duart68681_reg_read_names[(offset/2) & 15], data));
	792	}
	793
	794	return data;
	795	}
	796
	797	WRITE8_MEMBER( apollo_sio::write )
	798	{
	799	static const char * const duart68681_reg_write_names[0x10] = { "MRA",
	800	"CSRA", "CRA", "THRA", "ACR", "IMR", "CRUR", "CTLR", "MRB", "CSRB",
	801	"CRB", "THRB", "IVR", "OPCR", "Set OP Bits", "Reset OP Bits" };
	802
	803	CLOG2(("writing MC2681 reg %02x (%s) with %02x",
	804	offset, duart68681_reg_write_names[(offset/2) & 15], data));
	805
	806	switch (offset / 2) {
	807	case 0x09: /* CSRB */
	808	// remember CSRB to handle MD selftest or SK command
	809	m_csrb = data;
	810	break;
	811	#if 0
	812	case 0x0b: /* THRB */
	813	// tee output of SIO1 to stdout
	814	// sad: ceterm will get confused from '\r'
	815	if (apollo_is_dsp3x00() && data != '\r') ::putchar(data);
	816	break;
	817	#endif
	818	}
	819	mc68681_device::write(space, offset/2, data, mem_mask);
	820	}
	821
	822	// device type definition
	823	const device_type APOLLO_SIO = &device_creator<apollo_sio>;
	824
719	825	WRITE_LINE_MEMBER(apollo_state::sio_irq_handler)
720	826	{
721	827	apollo_pic_set_irq_line(APOLLO_IRQ_SIO1, state);
r30980	r30981
723	829
724	830	WRITE8_MEMBER(apollo_state::sio_output)
725	831	{
	832	//   CLOG2(("apollo_sio - sio_output %02x", data));
	833
726	834	if ((data & 0x80) != (sio_output_data & 0x80))
727	835	{
728	836	apollo_pic_set_irq_line(APOLLO_IRQ_DIAG, (data & 0x80) ? 1 : 0);
729		sio_output_data = data;
730	837	}
731		}
732		// The counter/timer on the SIO chip is used for the refresh count.
733		// This is set up in the timer mode to  produce a square wave output on output OP3.
	838
	839	// The counter/timer on the SIO chip is used for the RAM refresh count.
	840	// This is set up in the timer mode to produce a square wave output on output OP3.
734	841	// The period of the output is 15 microseconds.
735	842
736		// toggle memory refresh counter
737		//  sio_input_data ^= 0x01;
	843	if ((data & 0x08) != (sio_output_data & 0x08))
	844	{
	845	m_sio->ip0_w((data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	846	}
738	847
	848	sio_output_data = data;
	849	}
	850
739	851	//##########################################################################
740	852	// machine/apollo_sio2.c - APOLLO DS3500 SIO2
741	853	//##########################################################################
r30980	r30981
755	867	static SLOT_INTERFACE_START(apollo_isa_cards)
756	868	SLOT_INTERFACE("wdc", ISA16_OMTI8621)   // Combo ESDI/AT floppy controller
757	869	SLOT_INTERFACE("ctape", ISA8_SC499)     // Archive SC499 cartridge tape
758		SLOT_INTERFACE("3c505", ISA16_3C505)    // 3Com 3C505 Ethernet card
	870	SLOT_INTERFACE("3c505", ISA16_3C505)   // 3Com 3C505 Ethernet card
759	871	SLOT_INTERFACE_END
760	872
761	873	MACHINE_CONFIG_FRAGMENT( common )
r30980	r30981
806	918	MCFG_MC146818_ADD( APOLLO_RTC_TAG, XTAL_32_768kHz )
807	919	MCFG_MC146818_UTC( true )
808	920
809		MCFG_MC68681_ADD( APOLLO_SIO2_TAG, XTAL_3_6864MHz )
810		MCFG_MC68681_IRQ_CALLBACK(WRITELINE(apollo_state, sio2_irq_handler))
	921	MCFG_APOLLO_SIO_ADD( APOLLO_SIO2_TAG, XTAL_3_6864MHz )
	922	MCFG_APOLLO_SIO_IRQ_CALLBACK(WRITELINE(apollo_state, sio2_irq_handler))
811	923
812	924	MCFG_DEVICE_ADD(APOLLO_ISA_TAG, ISA16, 0)
813	925	MCFG_ISA16_CPU(":"MAINCPU)
r30980	r30981
818	930	MCFG_ISA_OUT_IRQ5_CB(DEVWRITELINE(APOLLO_PIC1_TAG, pic8259_device, ir5_w))
819	931	MCFG_ISA_OUT_IRQ6_CB(DEVWRITELINE(APOLLO_PIC1_TAG, pic8259_device, ir6_w))
820	932	MCFG_ISA_OUT_IRQ7_CB(DEVWRITELINE(APOLLO_PIC1_TAG, pic8259_device, ir7_w))
821		MCFG_ISA_OUT_IRQ10_CB(DEVWRITELINE(APOLLO_PIC2_TAG, pic8259_device, ir3_w))
822		MCFG_ISA_OUT_IRQ11_CB(DEVWRITELINE(APOLLO_PIC2_TAG, pic8259_device, ir4_w))
823		MCFG_ISA_OUT_IRQ12_CB(DEVWRITELINE(APOLLO_PIC2_TAG, pic8259_device, ir5_w))
	933	MCFG_ISA_OUT_IRQ10_CB(DEVWRITELINE(APOLLO_PIC2_TAG, pic8259_device, ir2_w))
	934	MCFG_ISA_OUT_IRQ11_CB(DEVWRITELINE(APOLLO_PIC2_TAG, pic8259_device, ir3_w))
	935	MCFG_ISA_OUT_IRQ12_CB(DEVWRITELINE(APOLLO_PIC2_TAG, pic8259_device, ir4_w))
824	936	MCFG_ISA_OUT_IRQ14_CB(DEVWRITELINE(APOLLO_PIC2_TAG, pic8259_device, ir6_w))
825	937	MCFG_ISA_OUT_IRQ15_CB(DEVWRITELINE(APOLLO_PIC2_TAG, pic8259_device, ir7_w))
826	938	MCFG_ISA_OUT_DRQ0_CB(DEVWRITELINE(APOLLO_DMA1_TAG, am9517a_device, dreq0_w))
r30980	r30981
842	954	// for machines with the keyboard and a graphics head
843	955	MACHINE_CONFIG_FRAGMENT( apollo )
844	956	MCFG_FRAGMENT_ADD(common)
845
846		MCFG_MC68681_ADD( APOLLO_SIO_TAG, XTAL_3_6864MHz )
847		MCFG_MC68681_IRQ_CALLBACK(WRITELINE(apollo_state, sio_irq_handler))
848		MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(apollo_state, sio_output))
849		MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE(APOLLO_KBD_TAG, apollo_kbd_device, rx_w))
	957	MCFG_APOLLO_SIO_ADD( APOLLO_SIO_TAG, XTAL_3_6864MHz )
	958	MCFG_APOLLO_SIO_IRQ_CALLBACK(WRITELINE(apollo_state, sio_irq_handler))
	959	MCFG_APOLLO_SIO_OUTPORT_CALLBACK(WRITE8(apollo_state, sio_output))
	960	MCFG_APOLLO_SIO_A_TX_CALLBACK(DEVWRITELINE(APOLLO_KBD_TAG, apollo_kbd_device, rx_w))
850	961	MACHINE_CONFIG_END
851	962
852	963	static DEVICE_INPUT_DEFAULTS_START( apollo_terminal )
r30980	r30981
861	972	// for headless machines using a serial console
862	973	MACHINE_CONFIG_FRAGMENT( apollo_terminal )
863	974	MCFG_FRAGMENT_ADD(common)
	975	MCFG_APOLLO_SIO_ADD( APOLLO_SIO_TAG, XTAL_3_6864MHz )
	976	MCFG_APOLLO_SIO_IRQ_CALLBACK(WRITELINE(apollo_state, sio_irq_handler))
	977	MCFG_APOLLO_SIO_OUTPORT_CALLBACK(WRITE8(apollo_state, sio_output))
	978	MCFG_APOLLO_SIO_B_TX_CALLBACK(DEVWRITELINE("rs232", rs232_port_device, write_txd))
864	979
865		MCFG_MC68681_ADD( APOLLO_SIO_TAG, XTAL_3_6864MHz )
866		MCFG_MC68681_IRQ_CALLBACK(WRITELINE(apollo_state, sio_irq_handler))
867		MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(apollo_state, sio_output))
868		MCFG_MC68681_B_TX_CALLBACK(DEVWRITELINE("rs232", rs232_port_device, write_txd))
	980	MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
	981	MCFG_RS232_RXD_HANDLER(DEVWRITELINE(APOLLO_SIO_TAG, apollo_sio, rx_b_w))
869	982
870		MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
871		MCFG_RS232_RXD_HANDLER(DEVWRITELINE(APOLLO_SIO_TAG, mc68681_device, rx_b_w))
872	983	MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", apollo_terminal)
873	984	MACHINE_CONFIG_END
874	985
875	986	DRIVER_INIT_MEMBER(apollo_state,apollo)
876	987	{
877		//MLOG1(("driver_init_apollo"));
	988	MLOG1(("driver_init_apollo"));
878	989	}
879	990
880	991	MACHINE_START_MEMBER(apollo_state,apollo)
881	992	{
882		//MLOG1(("machine_start_apollo"));
	993	MLOG1(("machine_start_apollo"));
883	994
884	995	if (apollo_is_dn3000())
885	996	{
r30980	r30981
897	1008	m_dma_channel = -1;
898	1009	m_cur_eop = false;
899	1010
900		//MLOG1(("machine_reset_apollo"));
	1011	MLOG1(("machine_reset_apollo"));
901	1012
902	1013	// set configuration
903	1014	apollo_csr_set_servicemode(apollo_config(APOLLO_CONF_SERVICE_MODE));
904	1015
905	1016	// change year according to configuration settings
906		if (year < 20 && apollo_config(APOLLO_CONF_DATE_1990))
	1017	if (year < 20 && apollo_config(APOLLO_CONF_20_YEARS_AGO))
907	1018	{
908	1019	year+=80;
909	1020	apollo_rtc_w(space, 9, year);
910	1021	}
911		else if (year >= 80 && !apollo_config(APOLLO_CONF_DATE_1990))
	1022	else if (year < 25 && apollo_config(APOLLO_CONF_25_YEARS_AGO))
912	1023	{
	1024	year += 75;
	1025	apollo_rtc_w(space, 9, year);
	1026	}
	1027	else if (year >= 80 && !apollo_config(APOLLO_CONF_20_YEARS_AGO)
	1028	&& !apollo_config(APOLLO_CONF_25_YEARS_AGO))
	1029	{
913	1030	year -=80;
914	1031	apollo_rtc_w(space, 9, year);
915	1032	}

Previous

199869 Revisions

Next

---

© 1997-2024 The MAME Team