trunk/src/emu/bus/ql/qubide.c
| r30953 | r30954 | |
| 9 | 9 | |
| 10 | 10 | **********************************************************************/ |
| 11 | 11 | |
| 12 | /* |
| 13 | ------------------------------------------------------------------- |
| 14 | | This side goes into the QL | |
| 15 | | | |
| 16 | +---------------------------------------------------------------------+ |
| 17 | | o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o | |
| 18 | | +-------+ +---------+ | |
| 19 | | |o o|o o| |o|o|o|o|o| +--------------------------+ | |
| 20 | | +-------+ |o|o|o|o|o| | | | |
| 21 | | J6 J7 +---------+ | | | |
| 22 | |+----------+-- J1J2J3J4J5 |) EPROM | | |
| 23 | || | | | | | |
| 24 | || |7805 |-- +---------------+ | | | |
| 25 | || | | | | +--------------------------+ | |
| 26 | |+----------+-- |) 74HCT688 | | |
| 27 | | | | | |
| 28 | | +---------------+ | |
| 29 | |+-------------------+ +-------------------+ +--------------------+ | |
| 30 | || | | | | | | |
| 31 | ||) GAL 1 | |) GAL 2 | |) 74HCT646 | | |
| 32 | || | | | | | | |
| 33 | |+-------------------+ +-------------------+ +--------------------+ | |
| 34 | | | |
| 35 | | +-----------------------------------------+ +--------------------+ | |
| 36 | | | o o o o o o o o o o o o o o o o o o o o | | | | |
| 37 | | | o o o o o o o o o o o o o o o o o o o o | |) 74HCT646 | | |
| 38 | | +-----------------------------------------+ | | | |
| 39 | | +--------------------+ | |
| 40 | | +---+ +-----------+ | |
| 41 | | |o o| + |o o o o o o| Exp. Conn. | |
| 42 | | +---+ +-----------+ | |
| 43 | | LED | |
| 44 | | | |
| 45 | | o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o | |
| 46 | +---------------------------------------------------------------------+ |
| 47 | | | |
| 48 | | Through Connector | |
| 49 | ------------------------------------------------------------------- |
| 50 | */ |
| 51 | |
| 12 | 52 | #include "qubide.h" |
| 13 | 53 | |
| 14 | 54 | |
| r30953 | r30954 | |
| 29 | 69 | ROM_DEFAULT_BIOS("v201") |
| 30 | 70 | ROM_SYSTEM_BIOS( 0, "v201", "v2.01" ) |
| 31 | 71 | ROMX_LOAD( "qb201_16k.rom", 0x0000, 0x4000, CRC(6f1d62a6) SHA1(1708d85397422e2024daa1a3406cac685f46730d), ROM_BIOS(1) ) |
| 72 | |
| 73 | ROM_REGION( 0x22e, "plds", 0 ) |
| 74 | ROM_LOAD( "gal 1a", 0x000, 0x117, CRC(cfb889ba) SHA1(657a2c61e4d372b84eaff78055ddeac6d2ee4d68) ) // old GAL (< v2.0) |
| 75 | ROM_LOAD( "gal 2a", 0x117, 0x117, CRC(53d01e17) SHA1(4cf0da7ff5c7a950e8e13f8ed7125fff10ddda0d) ) // old GAL (< v2.0) |
| 32 | 76 | ROM_END |
| 33 | 77 | |
| 34 | 78 | |
| r30953 | r30954 | |
| 42 | 86 | } |
| 43 | 87 | |
| 44 | 88 | |
| 89 | //------------------------------------------------- |
| 90 | // MACHINE_CONFIG_FRAGMENT( qubide ) |
| 91 | //------------------------------------------------- |
| 45 | 92 | |
| 93 | static MACHINE_CONFIG_FRAGMENT( qubide ) |
| 94 | MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, false) |
| 95 | MACHINE_CONFIG_END |
| 96 | |
| 97 | |
| 98 | //------------------------------------------------- |
| 99 | // machine_config_additions - device-specific |
| 100 | // machine configurations |
| 101 | //------------------------------------------------- |
| 102 | |
| 103 | machine_config_constructor qubide_t::device_mconfig_additions() const |
| 104 | { |
| 105 | return MACHINE_CONFIG_NAME( qubide ); |
| 106 | } |
| 107 | |
| 108 | |
| 109 | //------------------------------------------------- |
| 110 | // INPUT_PORTS( qubide ) |
| 111 | //------------------------------------------------- |
| 112 | |
| 113 | INPUT_PORTS_START( qubide ) |
| 114 | PORT_START("J1-J5") |
| 115 | PORT_DIPNAME( 0x1f, 0x03, "Base Address" ) |
| 116 | PORT_DIPSETTING( 0x00, "00000h" ) |
| 117 | PORT_DIPSETTING( 0x01, "04000h" ) |
| 118 | PORT_DIPSETTING( 0x02, "08000h" ) |
| 119 | PORT_DIPSETTING( 0x03, "0c000h" ) |
| 120 | PORT_DIPSETTING( 0x04, "10000h" ) |
| 121 | PORT_DIPSETTING( 0x05, "14000h" ) |
| 122 | PORT_DIPSETTING( 0x06, "18000h" ) |
| 123 | PORT_DIPSETTING( 0x07, "1c000h" ) |
| 124 | PORT_DIPSETTING( 0x08, "20000h" ) |
| 125 | PORT_DIPSETTING( 0x09, "24000h" ) |
| 126 | PORT_DIPSETTING( 0x0a, "28000h" ) |
| 127 | PORT_DIPSETTING( 0x0b, "2c000h" ) |
| 128 | PORT_DIPSETTING( 0x0c, "30000h" ) |
| 129 | PORT_DIPSETTING( 0x0d, "34000h" ) |
| 130 | PORT_DIPSETTING( 0x0e, "38000h" ) |
| 131 | PORT_DIPSETTING( 0x0f, "3c000h" ) |
| 132 | PORT_DIPSETTING( 0x10, "c0000h" ) |
| 133 | PORT_DIPSETTING( 0x11, "c4000h" ) |
| 134 | PORT_DIPSETTING( 0x12, "c8000h" ) |
| 135 | PORT_DIPSETTING( 0x13, "cc000h" ) |
| 136 | PORT_DIPSETTING( 0x14, "d0000h" ) |
| 137 | PORT_DIPSETTING( 0x15, "d4000h" ) |
| 138 | PORT_DIPSETTING( 0x16, "d8000h" ) |
| 139 | PORT_DIPSETTING( 0x17, "dc000h" ) |
| 140 | PORT_DIPSETTING( 0x18, "e0000h" ) |
| 141 | PORT_DIPSETTING( 0x19, "e4000h" ) |
| 142 | PORT_DIPSETTING( 0x1a, "e8000h" ) |
| 143 | PORT_DIPSETTING( 0x1b, "ec000h" ) |
| 144 | PORT_DIPSETTING( 0x1c, "f0000h" ) |
| 145 | PORT_DIPSETTING( 0x1d, "f4000h" ) |
| 146 | PORT_DIPSETTING( 0x1e, "f8000h" ) |
| 147 | PORT_DIPSETTING( 0x1f, "fc000h" ) |
| 148 | INPUT_PORTS_END |
| 149 | |
| 150 | |
| 151 | //------------------------------------------------- |
| 152 | // input_ports - device-specific input ports |
| 153 | //------------------------------------------------- |
| 154 | |
| 155 | ioport_constructor qubide_t::device_input_ports() const |
| 156 | { |
| 157 | return INPUT_PORTS_NAME( qubide ); |
| 158 | } |
| 159 | |
| 160 | |
| 161 | |
| 46 | 162 | //************************************************************************** |
| 47 | 163 | // LIVE DEVICE |
| 48 | 164 | //************************************************************************** |
| r30953 | r30954 | |
| 53 | 169 | |
| 54 | 170 | qubide_t::qubide_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : |
| 55 | 171 | device_t(mconfig, QUBIDE, "QubIDE", tag, owner, clock, "ql_qubide", __FILE__), |
| 56 | | device_ql_expansion_card_interface(mconfig, *this) |
| 172 | device_ql_expansion_card_interface(mconfig, *this), |
| 173 | m_ata(*this, "ata"), |
| 174 | m_rom(*this, "rom"), |
| 175 | m_j1_j5(*this, "J1-J5"), |
| 176 | m_base(0xc000), |
| 177 | m_ata_data(0) |
| 57 | 178 | { |
| 58 | 179 | } |
| 59 | 180 | |
| r30953 | r30954 | |
| 68 | 189 | |
| 69 | 190 | |
| 70 | 191 | //------------------------------------------------- |
| 192 | // device_reset - device-specific reset |
| 193 | //------------------------------------------------- |
| 194 | |
| 195 | void qubide_t::device_reset() |
| 196 | { |
| 197 | int j1_j5 = m_j1_j5->read(); |
| 198 | |
| 199 | m_base = (j1_j5 & 0x0f) << 14; |
| 200 | |
| 201 | if (BIT(j1_j5, 4)) |
| 202 | { |
| 203 | m_base |= 0xc0000; |
| 204 | } |
| 205 | } |
| 206 | |
| 207 | |
| 208 | //------------------------------------------------- |
| 71 | 209 | // read - |
| 72 | 210 | //------------------------------------------------- |
| 73 | 211 | |
| 74 | 212 | UINT8 qubide_t::read(address_space &space, offs_t offset, UINT8 data) |
| 75 | 213 | { |
| 214 | if ((offset & 0xfc000) == m_base) |
| 215 | { |
| 216 | if ((offset & 0x3f00) == 0x3f00) |
| 217 | { |
| 218 | switch (offset & 0x0f) |
| 219 | { |
| 220 | case 0: |
| 221 | data = m_ata->read_cs1(space, 0x07, 0xff); |
| 222 | break; |
| 223 | |
| 224 | default: |
| 225 | data = m_ata->read_cs0(space, offset & 0x07, 0xff); |
| 226 | break; |
| 227 | |
| 228 | case 0x08: case 0x0a: case 0x0c: |
| 229 | m_ata_data = m_ata->read_cs0(space, 0x00, 0xffff); |
| 230 | |
| 231 | data = m_ata_data >> 8; |
| 232 | break; |
| 233 | |
| 234 | case 0x09: case 0x0b: case 0x0d: |
| 235 | data = m_ata_data & 0xff; |
| 236 | break; |
| 237 | |
| 238 | case 0x0e: case 0x0f: |
| 239 | data = m_ata->read_cs1(space, 0x05, 0xff); |
| 240 | break; |
| 241 | } |
| 242 | } |
| 243 | else |
| 244 | { |
| 245 | data = m_rom->base()[offset & 0x3fff]; |
| 246 | } |
| 247 | } |
| 248 | |
| 76 | 249 | return data; |
| 77 | 250 | } |
| 78 | 251 | |
| r30953 | r30954 | |
| 83 | 256 | |
| 84 | 257 | void qubide_t::write(address_space &space, offs_t offset, UINT8 data) |
| 85 | 258 | { |
| 259 | if ((offset & 0xfc000) == m_base) |
| 260 | { |
| 261 | if ((offset & 0x3f00) == 0x3f00) |
| 262 | { |
| 263 | switch (offset & 0x0f) |
| 264 | { |
| 265 | case 0: case 0x0e: case 0x0f: |
| 266 | m_ata->write_cs1(space, 0x05, data, 0xff); |
| 267 | break; |
| 268 | |
| 269 | case 0x08: case 0x0a: case 0x0c: |
| 270 | m_ata_data = (data << 8) | (m_ata_data & 0xff); |
| 271 | break; |
| 272 | |
| 273 | case 0x09: case 0x0b: case 0x0d: |
| 274 | m_ata_data = (m_ata_data & 0xff00) | data; |
| 275 | |
| 276 | m_ata->write_cs0(space, 0x00, m_ata_data, 0xffff); |
| 277 | break; |
| 278 | |
| 279 | default: |
| 280 | m_ata->write_cs0(space, offset & 0x07, data, 0xff); |
| 281 | break; |
| 282 | } |
| 283 | } |
| 284 | } |
| 86 | 285 | } |