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r30813 Tuesday 3rd June, 2014 at 17:08:51 UTC by Fabio Priuli

(MESS) nes.c: fixed WRAM banking for MMC5, so that Bandit Kings of Ancient China (and Suikoden - Tenmei no Chikai) can be considered as working. Also fixed wrong battery size for Aoki Ookami to Shiroki Mejika - Genchou Hishi in xml, which was causing a "Memory Over" error message ingame. [Fabio Priuli] out of whatsnew: apparently the current WRAM mirroring (based on nesdev wiki notes) causes glitches in some of these games. I hope to improve this soonish.

[hash]	nes.xml
[src/emu/bus/nes]	mmc5.c mmc5.h nes_slot.c
[src/mess/machine]	nes.c

trunk/src/emu/bus/nes/mmc5.c

r30812	r30813
83	83	save_item(NAME(m_split_bank));
84	84	save_item(NAME(m_vcount));
85	85	save_item(NAME(m_exram));
	86	save_item(NAME(m_ram_hi_banks));
	87
86	88	}
87	89
88	90	void nes_exrom_device::pcb_reset()
r30812	r30813
129	131	m_prg_ram_mapped[1] = 0;
130	132	m_prg_ram_mapped[2] = 0;
131	133	m_prg_ram_mapped[3] = 0;
	134
	135	m_ram_hi_banks[0] = 0;
	136	m_ram_hi_banks[1] = 0;
	137	m_ram_hi_banks[2] = 0;
	138	m_ram_hi_banks[3] = 0;
132	139	}
133	140
134	141
r30812	r30813
144	151
145	152	iNES: mapper 5
146	153
147		MESS status: Mostly Unsupported
	154	MESS status: Partially supported
148	155
149	156	-------------------------------------------------*/
150	157
151		/* MMC5 can map PRG RAM to 0x8000-0xdfff */
152		void nes_exrom_device::prgram_bank8_x(int start, int bank)
153		{
154		assert(start < 4);
155		assert(bank >= 0);
156		assert(m_prgram.count() + m_battery.count());
157
158		// currently we use 4x8k BWRAM + 4x8k WRAM banks, independently from the actual PRG-RAM size
159		// mirroring of the actual size is taken care of at bank setup (even if no known commercial game relies on it!)
160		//bank &= (m_prgram.count() / 0x2000) - 1;
161		if (!m_prgram.count() || !m_battery.count())
162		bank &= 3;
163
164		// PRG RAM is mapped after PRG ROM
165		m_prg_bank[start] = m_prg_chunks + bank;
166		m_prg_bank_mem[start]->set_entry(m_prg_bank[start]);
167		}
168
169
170	158	void nes_exrom_device::update_prg()
171	159	{
172	160	int bank0, bank1, bank2, bank3;
r30812	r30813
184	172
185	173	if (m_prg_ram_mapped[1])
186	174	{
187		prgram_bank8_x(0, ((bank1 << 1) & 0x07));
188		prgram_bank8_x(1, ((bank1 << 1) & 0x07) | 1);
	175	m_ram_hi_banks[0] = ((bank1 << 1) & 0x07);
	176	m_ram_hi_banks[1] = ((bank1 << 1) & 0x07) | 1;
189	177	}
190	178	else
191	179	prg16_89ab(bank1);
r30812	r30813
200	188
201	189	if (m_prg_ram_mapped[1])
202	190	{
203		prgram_bank8_x(0, ((bank1 << 1) & 0x07));
204		prgram_bank8_x(1, ((bank1 << 1) & 0x07) | 1);
	191	m_ram_hi_banks[0] = ((bank1 << 1) & 0x07);
	192	m_ram_hi_banks[1] = ((bank1 << 1) & 0x07) | 1;
205	193	}
206	194	else
207	195	prg16_89ab(bank1);
208	196
209	197	if (m_prg_ram_mapped[2])
210		prgram_bank8_x(2, bank2 & 0x07);
	198	m_ram_hi_banks[2] = (bank2 & 0x07);
211	199	else
212	200	prg8_cd(bank2);
213	201
r30812	r30813
221	209	bank3 = m_prg_regs[3];
222	210
223	211	if (m_prg_ram_mapped[0])
224		prgram_bank8_x(0, bank0 & 0x07);
	212	m_ram_hi_banks[0] = (bank0 & 0x07);
225	213	else
226	214	prg8_89(bank0);
227	215
228	216	if (m_prg_ram_mapped[1])
229		prgram_bank8_x(1, bank1 & 0x07);
	217	m_ram_hi_banks[1] = (bank1 & 0x07);
230	218	else
231	219	prg8_ab(bank1);
232	220
233	221	if (m_prg_ram_mapped[2])
234		prgram_bank8_x(2, bank2 & 0x07);
	222	m_ram_hi_banks[2] = (bank2 & 0x07);
235	223	else
236	224	prg8_cd(bank2);
237	225
r30812	r30813
631	619	// 3bits are used to access the "WRAM" banks
632	620	// bit3 select the chip (2 of them can be accessed, each up to 32KB)
633	621	// bit1 & bit2 select the 8KB banks inside the chip
634		// same mechanism is used also when "WRAM" is mapped in higher banks, but there we setup the bank map in a smart
635		// way so to access the correct bank as if the 3 bits were directly selecting the bank in a 64KB RAM area
	622	// same mechanism is used also when "WRAM" is mapped in higher banks
636	623	READ8_MEMBER(nes_exrom_device::read_m)
637	624	{
	625	LOG_MMC(("exrom read_m, offset: %04x\n", offset));
638	626	if (m_battery && m_prgram)  // 2 chips present: first is BWRAM, second is WRAM
639	627	{
640	628	if (m_wram_base & 0x04)
r30812	r30813
652	640
653	641	WRITE8_MEMBER(nes_exrom_device::write_m)
654	642	{
	643	LOG_MMC(("exrom write_m, offset: %04x, data: %02x\n", offset, data));
655	644	if (m_wram_protect_1 != 0x02 || m_wram_protect_2 != 0x01)
656	645	return;
657	646
r30812	r30813
662	651	}
663	652
664	653	// some games (e.g. Bandit Kings of Ancient China) write to PRG-RAM through 0x8000-0xdfff
665		// it does not work well yet!
	654	READ8_MEMBER(nes_exrom_device::read_h)
	655	{
	656	LOG_MMC(("exrom read_h, offset: %04x\n", offset));
	657	int bank = offset / 0x2000;
	658
	659	if (bank < 3 && offset >= bank * 0x2000 && offset < (bank + 1) * 0x2000 && m_prg_ram_mapped[bank])
	660	{
	661	if (m_battery && m_ram_hi_banks[bank] < 4)
	662	return m_battery[((m_ram_hi_banks[bank] * 0x2000) + (offset & 0x1fff)) & (m_battery.count() - 1)];
	663	else if (m_prgram)
	664	return m_prgram[(((m_ram_hi_banks[bank] & 3) * 0x2000) + (offset & 0x1fff)) & (m_prgram.count() - 1)];
	665	}
	666
	667	return hi_access_rom(offset);
	668	}
	669
666	670	WRITE8_MEMBER(nes_exrom_device::write_h)
667	671	{
	672	LOG_MMC(("exrom write_h, offset: %04x, data: %02x\n", offset, data));
668	673	int bank = offset / 0x2000;
669	674	if (m_wram_protect_1 != 0x02 || m_wram_protect_2 != 0x01 || bank == 3 || !m_prg_ram_mapped[bank])
670	675	return;
671	676
672		bank = m_prg_bank[bank] - m_prg_chunks;
673		if (m_battery && m_prg_bank[bank] < m_prg_chunks + 4)
674		m_battery[((bank * 0x2000) + (offset & 0x1fff)) & (m_battery.count() - 1)] = data;
	677	if (m_battery && m_ram_hi_banks[bank] < 4)
	678	m_battery[((m_ram_hi_banks[bank] * 0x2000) + (offset & 0x1fff)) & (m_battery.count() - 1)] = data;
675	679	else if (m_prgram)
676		m_prgram[(((bank & 3) * 0x2000) + (offset & 0x1fff)) & (m_prgram.count() - 1)] = data;
	680	m_prgram[(((m_ram_hi_banks[bank] & 3) * 0x2000) + (offset & 0x1fff)) & (m_prgram.count() - 1)] = data;
677	681	}

trunk/src/emu/bus/nes/mmc5.h

r30812	r30813
16	16	virtual void device_start();
17	17	virtual DECLARE_READ8_MEMBER(read_l);
18	18	virtual DECLARE_READ8_MEMBER(read_m);
	19	virtual DECLARE_READ8_MEMBER(read_h);
19	20	virtual DECLARE_WRITE8_MEMBER(write_l);
20	21	virtual DECLARE_WRITE8_MEMBER(write_m);
21	22	virtual DECLARE_WRITE8_MEMBER(write_h);
r30812	r30813
29	30
30	31	protected:
31	32	void set_mirror(int page, int src);
32		void prgram_bank8_x(int start, int bank);
33	33	void update_render_mode();
34	34	void update_prg();
35	35
r30812	r30813
78	78
79	79	// MMC-5 contains 1K of internal ram
80	80	UINT8 m_exram[0x400];
	81
	82	UINT8 m_ram_hi_banks[4];
81	83
82	84	//  int m_nes_vram_sprite[8];
83	85	};

trunk/src/emu/bus/nes/nes_slot.c

r30812	r30813
672	672	m_prg_bank_mem[3] = machine.root_device().membank("prg3");
673	673	for (int i = 0; i < 4; i++)
674	674	{
675		int next_bank = m_prg.count() / 0x2000;
676	675	m_prg_bank_mem[i]->configure_entries(0, m_prg.count() / 0x2000, m_prg, 0x2000);
677		// MMC5 (and a few other PCBs) can also map WRAM/BWRAM in these banks, so we add here 4x8K banks for each RAM chip
678		// No boards with 64Kb of WRAM/BWRAM has been found so far, otherwise the code has to be updated!
679		if (m_battery)
680		{
681		if (m_battery.count() / 0x2000 == 4)
682		{
683		m_prg_bank_mem[i]->configure_entries(next_bank, 4, m_battery, 0x2000);
684		}
685		if (m_battery.count() / 0x2000 == 2)
686		{
687		m_prg_bank_mem[i]->configure_entries(next_bank + 0, 2, m_battery, 0x2000);
688		m_prg_bank_mem[i]->configure_entries(next_bank + 2, 2, m_battery, 0x2000);
689		}
690		if (m_battery.count() / 0x2000 == 1)
691		{
692		m_prg_bank_mem[i]->configure_entries(next_bank + 0, 1, m_battery, 0x2000);
693		m_prg_bank_mem[i]->configure_entries(next_bank + 1, 1, m_battery, 0x2000);
694		m_prg_bank_mem[i]->configure_entries(next_bank + 2, 1, m_battery, 0x2000);
695		m_prg_bank_mem[i]->configure_entries(next_bank + 3, 1, m_battery, 0x2000);
696		}
697		next_bank += 4;
698		}
699		if (m_prgram)
700		{
701		if (m_prgram.count() / 0x2000 == 4)
702		{
703		m_prg_bank_mem[i]->configure_entries(next_bank, 4, m_prgram, 0x2000);
704		}
705		if (m_prgram.count() / 0x2000 == 2)
706		{
707		m_prg_bank_mem[i]->configure_entries(next_bank + 0, 2, m_prgram, 0x2000);
708		m_prg_bank_mem[i]->configure_entries(next_bank + 2, 2, m_prgram, 0x2000);
709		}
710		if (m_prgram.count() / 0x2000 == 1)
711		{
712		m_prg_bank_mem[i]->configure_entries(next_bank + 0, 1, m_prgram, 0x2000);
713		m_prg_bank_mem[i]->configure_entries(next_bank + 1, 1, m_prgram, 0x2000);
714		m_prg_bank_mem[i]->configure_entries(next_bank + 2, 1, m_prgram, 0x2000);
715		m_prg_bank_mem[i]->configure_entries(next_bank + 3, 1, m_prgram, 0x2000);
716		}
717		next_bank += 4;
718		}
719
720		// ...but we always map the banks to PRG at start
721	676	m_prg_bank_mem[i]->set_entry(i);
722	677	m_prg_bank[i] = i;
723	678	}

trunk/src/mess/machine/nes.c

r30812	r30813
158	158	m_ppu->set_latch(ppu2c0x_latch_delegate(FUNC(device_nes_cart_interface::ppu_latch),m_cartslot->m_cart));
159	159
160	160	// install additional handlers (read_h, read_ex, write_ex)
161		if (m_cartslot->get_pcb_id() == STD_NROM368 || m_cartslot->get_pcb_id() == GG_NROM || m_cartslot->get_pcb_id() == CAMERICA_ALADDIN || m_cartslot->get_pcb_id() == SUNSOFT_DCS
	161	if (m_cartslot->get_pcb_id() == STD_EXROM || m_cartslot->get_pcb_id() == STD_NROM368
	162	|| m_cartslot->get_pcb_id() == GG_NROM || m_cartslot->get_pcb_id() == CAMERICA_ALADDIN || m_cartslot->get_pcb_id() == SUNSOFT_DCS
162	163	|| m_cartslot->get_pcb_id() == BANDAI_DATACH || m_cartslot->get_pcb_id() == BANDAI_KARAOKE || m_cartslot->get_pcb_id() == BTL_2A03_PURITANS || m_cartslot->get_pcb_id() == AVE_MAXI15
163	164	|| m_cartslot->get_pcb_id() == KAISER_KS7022 || m_cartslot->get_pcb_id() == KAISER_KS7031 || m_cartslot->get_pcb_id() == BMC_VT5201
164	165	|| m_cartslot->get_pcb_id() == UNL_LH32 || m_cartslot->get_pcb_id() == UNL_LH10 || m_cartslot->get_pcb_id() == UNL_2708

trunk/hash/nes.xml

r30812	r30813
1701	1701	</part>
1702	1702	</software>
1703	1703
1704		<software name="genchohi" supported="no">
	1704	<software name="genchohi">
1705	1705	<description>Aoki Ookami to Shiroki Mejika - Genchou Hishi (Jpn)</description>
1706	1706	<year>1993</year>
1707	1707	<publisher>Koei</publisher>
r30812	r30813
1718	1718	<rom name="koe-gg-0 chr" size="262144" crc="28e1a2c7" sha1="3c644d6d11f7eef992c314d7822216cd00de9293" offset="00000" />
1719	1719	</dataarea>
1720	1720	<!-- 8k WRAM on cartridge, battery backed up -->
1721		<dataarea name="bwram" size="8192">
1722		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
	1721	<dataarea name="bwram" size="32768">
1723	1722	</dataarea>
1724	1723	<!-- 1k Internal RAM in the MMC5 chip (ExRAM) -->
1725	1724	<dataarea name="mapper_ram" size="1024">
r30812	r30813
2756	2755	</part>
2757	2756	</software>
2758	2757
2759		<software name="bandking" supported="no">
	2758	<software name="bandking">
2760	2759	<description>Bandit Kings of Ancient China (USA)</description>
2761	2760	<year>1990</year>
2762	2761	<publisher>Koei</publisher>
r30812	r30813
2773	2772	</dataarea>
2774	2773	<!-- 8k WRAM on cartridge, battery backed up -->
2775	2774	<dataarea name="bwram" size="8192">
2776		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
2777	2775	</dataarea>
2778	2776	<!-- 8k WRAM on cartridge -->
2779	2777	<dataarea name="wram" size="8192">
r30812	r30813
7638	7636	</dataarea>
7639	7637	<!-- 8k WRAM on cartridge, battery backed up -->
7640	7638	<dataarea name="bwram" size="8192">
7641		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
7642	7639	</dataarea>
7643	7640	<!-- 8k WRAM on cartridge -->
7644	7641	<dataarea name="wram" size="8192">
r30812	r30813
14040	14037	</dataarea>
14041	14038	<!-- 8k WRAM on cartridge, battery backed up -->
14042	14039	<dataarea name="bwram" size="8192">
14043		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
14044	14040	</dataarea>
14045	14041	<!-- 1k Internal RAM in the MMC5 chip (ExRAM) -->
14046	14042	<dataarea name="mapper_ram" size="1024">
r30812	r30813
18022	18018	</dataarea>
18023	18019	<!-- 8k WRAM on cartridge, battery backed up -->
18024	18020	<dataarea name="bwram" size="8192">
18025		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
18026	18021	</dataarea>
18027	18022	<!-- 8k WRAM on cartridge -->
18028	18023	<dataarea name="wram" size="8192">
r30812	r30813
19000	18995	</dataarea>
19001	18996	<!-- 8k WRAM on cartridge, battery backed up -->
19002	18997	<dataarea name="bwram" size="8192">
19003		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
19004	18998	</dataarea>
19005	18999	<!-- 1k Internal RAM in the MMC5 chip (ExRAM) -->
19006	19000	<dataarea name="mapper_ram" size="1024">
r30812	r30813
20918	20912	</dataarea>
20919	20913	<!-- 8k WRAM on cartridge, battery backed up -->
20920	20914	<dataarea name="bwram" size="8192">
20921		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
20922	20915	</dataarea>
20923	20916	<!-- 8k WRAM on cartridge -->
20924	20917	<dataarea name="wram" size="8192">
r30812	r30813
20947	20940	</dataarea>
20948	20941	<!-- 8k WRAM on cartridge, battery backed up -->
20949	20942	<dataarea name="bwram" size="8192">
20950		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
20951	20943	</dataarea>
20952	20944	<!-- 8k WRAM on cartridge -->
20953	20945	<dataarea name="wram" size="8192">
r30812	r30813
26680	26672	</dataarea>
26681	26673	<!-- 32k WRAM on cartridge, battery backed up -->
26682	26674	<dataarea name="bwram" size="32768">
26683		<rom value="0x00" size="32768" offset="0" loadflag="fill" />
26684	26675	</dataarea>
26685	26676	<!-- 1k Internal RAM in the MMC5 chip (ExRAM) -->
26686	26677	<dataarea name="mapper_ram" size="1024">
r30812	r30813
26706	26697	</dataarea>
26707	26698	<!-- 8k WRAM on cartridge, battery backed up -->
26708	26699	<dataarea name="bwram" size="8192">
26709		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
26710	26700	</dataarea>
26711	26701	<!-- 8k WRAM on cartridge -->
26712	26702	<dataarea name="wram" size="8192">
r30812	r30813
26787	26777	</dataarea>
26788	26778	<!-- 8k WRAM on cartridge, battery backed up -->
26789	26779	<dataarea name="bwram" size="8192">
26790		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
26791	26780	</dataarea>
26792	26781	<!-- 8k WRAM on cartridge -->
26793	26782	<dataarea name="wram" size="8192">
r30812	r30813
31162	31151	</dataarea>
31163	31152	<!-- 32k WRAM on cartridge, battery backed up -->
31164	31153	<dataarea name="bwram" size="32768">
31165		<rom value="0x00" size="32768" offset="0" loadflag="fill" />
31166	31154	</dataarea>
31167	31155	<!-- 1k Internal RAM in the MMC5 chip (ExRAM) -->
31168	31156	<dataarea name="mapper_ram" size="1024">
r30812	r30813
31933	31921	</dataarea>
31934	31922	<!-- 32k WRAM on cartridge, battery backed up -->
31935	31923	<dataarea name="bwram" size="32768">
31936		<rom value="0x00" size="32768" offset="0" loadflag="fill" />
31937	31924	</dataarea>
31938	31925	<!-- 1k Internal RAM in the MMC5 chip (ExRAM) -->
31939	31926	<dataarea name="mapper_ram" size="1024">
r30812	r30813
31959	31946	</dataarea>
31960	31947	<!-- 32k WRAM on cartridge, battery backed up -->
31961	31948	<dataarea name="bwram" size="32768">
31962		<rom value="0x00" size="32768" offset="0" loadflag="fill" />
31963	31949	</dataarea>
31964	31950	<!-- 1k Internal RAM in the MMC5 chip (ExRAM) -->
31965	31951	<dataarea name="mapper_ram" size="1024">
r30812	r30813
32957	32943	</dataarea>
32958	32944	<!-- 8k WRAM on cartridge, battery backed up -->
32959	32945	<dataarea name="bwram" size="8192">
32960		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
32961	32946	</dataarea>
32962	32947	<!-- 1k Internal RAM in the MMC5 chip (ExRAM) -->
32963	32948	<dataarea name="mapper_ram" size="1024">
r30812	r30813
35507	35492	</part>
35508	35493	</software>
35509	35494
35510		<software name="suikoden" cloneof="bandking" supported="no">
	35495	<software name="suikoden" cloneof="bandking">
35511	35496	<description>Suikoden - Tenmei no Chikai (Jpn)</description>
35512	35497	<year>1990</year>
35513	35498	<publisher>Koei</publisher>
r30812	r30813
35525	35510	</dataarea>
35526	35511	<!-- 8k WRAM on cartridge, battery backed up -->
35527	35512	<dataarea name="bwram" size="8192">
35528		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
35529	35513	</dataarea>
35530	35514	<!-- 8k WRAM on cartridge -->
35531	35515	<dataarea name="wram" size="8192">
r30812	r30813
40364	40348	</dataarea>
40365	40349	<!-- 8k WRAM on cartridge, battery backed up -->
40366	40350	<dataarea name="bwram" size="8192">
40367		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
40368	40351	</dataarea>
40369	40352	<!-- 8k WRAM on cartridge -->
40370	40353	<dataarea name="wram" size="8192">
r30812	r30813
43324	43307	</dataarea>
43325	43308	<!-- 32k WRAM on cartridge (or 40k? readme mentions 5x16k srams!) no batteries? -->
43326	43309	<dataarea name="bwram" size="32768">
43327		<rom value="0x00" size="32768" offset="0" loadflag="fill" />
43328	43310	</dataarea>
43329	43311	<dataarea name="wram" size="8192">
43330	43312	</dataarea>
r30812	r30813
47858	47840	</dataarea>
47859	47841	<!-- 8k WRAM on cartridge, battery backed up -->
47860	47842	<dataarea name="bwram" size="8192">
47861		<rom value="0x00" size="8192" offset="0" loadflag="fill" />
47862	47843	</dataarea>
47863	47844	<!-- 8k WRAM on cartridge -->
47864	47845	<dataarea name="wram" size="8192">

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