trunk/src/mame/drivers/goldstar.c
| r30785 | r30786 | |
| 115 | 115 | #include "sound/sn76496.h" |
| 116 | 116 | #include "machine/i8255.h" |
| 117 | 117 | #include "machine/nvram.h" |
| 118 | #include "video/ramdac.h" |
| 118 | 119 | #include "includes/goldstar.h" |
| 119 | 120 | |
| 120 | 121 | #include "goldstar.lh" |
| r30785 | r30786 | |
| 217 | 218 | AM_RANGE(0x10, 0x10) AM_READ_PORT("DSW6") |
| 218 | 219 | ADDRESS_MAP_END |
| 219 | 220 | |
| 221 | |
| 222 | static ADDRESS_MAP_START( star100_map, AS_PROGRAM, 8, goldstar_state ) |
| 223 | AM_RANGE(0x0000, 0xbfff) AM_ROM |
| 224 | |
| 225 | AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(sangho_fg_vidram_w ) AM_SHARE("fg_vidram") // videoram 1 |
| 226 | AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(sangho_fg_atrram_w ) AM_SHARE("fg_atrram") // atrram 1 |
| 227 | |
| 228 | AM_RANGE(0xd800, 0xd83f) AM_RAM AM_SHARE("reel1_scroll") |
| 229 | AM_RANGE(0xd840, 0xd9ff) AM_RAM |
| 230 | AM_RANGE(0xda00, 0xda3f) AM_RAM AM_SHARE("reel2_scroll") |
| 231 | AM_RANGE(0xda40, 0xdbff) AM_RAM |
| 232 | AM_RANGE(0xdc00, 0xdc3f) AM_RAM AM_SHARE("reel3_scroll") |
| 233 | AM_RANGE(0xdc40, 0xdfff) AM_RAM |
| 234 | |
| 235 | AM_RANGE(0xe000, 0xe1ff) AM_RAM_WRITE(goldstar_reel1_ram_w ) AM_SHARE("reel1_ram") |
| 236 | AM_RANGE(0xe200, 0xe3ff) AM_RAM_WRITE(goldstar_reel2_ram_w ) AM_SHARE("reel2_ram") |
| 237 | AM_RANGE(0xe400, 0xe5ff) AM_RAM_WRITE(goldstar_reel3_ram_w ) AM_SHARE("reel3_ram") |
| 238 | |
| 239 | AM_RANGE(0xe600, 0xe7ff) AM_RAM_WRITE(sangho_bg_vidram_w ) AM_SHARE("bg_vidram") // videoram 2 |
| 240 | |
| 241 | AM_RANGE(0xe800, 0xe9ff) AM_RAM_WRITE(sangho_reel1_attrram_w ) AM_SHARE("reel1_attrram") |
| 242 | AM_RANGE(0xea00, 0xebff) AM_RAM_WRITE(sangho_reel2_attrram_w ) AM_SHARE("reel2_attrram") |
| 243 | AM_RANGE(0xec00, 0xedff) AM_RAM_WRITE(sangho_reel3_attrram_w ) AM_SHARE("reel3_attrram") |
| 244 | |
| 245 | AM_RANGE(0xee00, 0xefff) AM_RAM_WRITE(sangho_bg_atrram_w ) AM_SHARE("bg_atrram") // atrram 2 |
| 246 | |
| 247 | AM_RANGE(0xf000, 0xf7ff) AM_RAM AM_SHARE("nvram") |
| 248 | AM_RANGE(0xf800, 0xffff) AM_RAM |
| 249 | |
| 250 | AM_RANGE(0xfb00, 0xfb00) AM_DEVREADWRITE("oki", okim6295_device, read, write) |
| 251 | |
| 252 | ADDRESS_MAP_END |
| 253 | |
| 254 | |
| 255 | WRITE8_MEMBER(goldstar_state::sangho_coincount_w) |
| 256 | { |
| 257 | /* |
| 258 | 7654 3210 |
| 259 | ---- ---x Coin Out counter. |
| 260 | ---- x--- Coin A counter.. |
| 261 | ---x ---- Coin B counter. |
| 262 | --x- ---- Key In counter. |
| 263 | -x-- ---- Coin C counter. |
| 264 | x--- -xx- Unknown. |
| 265 | |
| 266 | */ |
| 267 | coin_counter_w(machine(), 0, data & 0x08); /* counter1 coin a */ |
| 268 | coin_counter_w(machine(), 1, data & 0x10); /* counter2 coin b */ |
| 269 | coin_counter_w(machine(), 2, data & 0x20); /* counter3 key in */ |
| 270 | coin_counter_w(machine(), 3, data & 0x40); /* counter4 coin c */ |
| 271 | coin_counter_w(machine(), 4, data & 0x01); /* counter5 payout */ |
| 272 | } |
| 273 | |
| 274 | WRITE8_MEMBER(goldstar_state::sangho_enable_w) |
| 275 | { |
| 276 | m_sangho_enable_reg = data; |
| 277 | } |
| 278 | |
| 279 | static ADDRESS_MAP_START( star100_readport, AS_IO, 8, goldstar_state ) |
| 280 | ADDRESS_MAP_GLOBAL_MASK(0xff) |
| 281 | |
| 282 | AM_RANGE(0x08, 0x08) AM_DEVREADWRITE("aysnd", ay8910_device, data_r, data_w) |
| 283 | AM_RANGE(0x0c, 0x0c) AM_DEVWRITE("aysnd", ay8910_device, address_w) |
| 284 | |
| 285 | AM_RANGE(0x10, 0x10) AM_READ_PORT("IN0") |
| 286 | AM_RANGE(0x11, 0x11) AM_READ_PORT("IN1") |
| 287 | AM_RANGE(0x12, 0x12) AM_READ_PORT("IN2") |
| 288 | AM_RANGE(0x13, 0x13) AM_READ_PORT("IN3") |
| 289 | AM_RANGE(0x14, 0x14) AM_READ_PORT("DSW1") |
| 290 | |
| 291 | AM_RANGE(0x1c, 0x1c) AM_DEVWRITE("ramdac", ramdac_device, index_w) |
| 292 | AM_RANGE(0x1d ,0x1d) AM_DEVWRITE("ramdac", ramdac_device, pal_w) |
| 293 | AM_RANGE(0x1e ,0x1e) AM_DEVWRITE("ramdac", ramdac_device, mask_w) |
| 294 | |
| 295 | AM_RANGE(0x20, 0x20) AM_READ_PORT("DSW4-0") // the first 4 bits map to DSW4 1 to 4. |
| 296 | AM_RANGE(0x21, 0x21) AM_READ_PORT("DSW4-1") // the first 4 bits map to DSW4 5 to 8. |
| 297 | |
| 298 | AM_RANGE(0x24, 0x24) AM_WRITE(sangho_coincount_w) // coin counters. |
| 299 | |
| 300 | AM_RANGE(0x25, 0x25) AM_READ_PORT("DSW2") |
| 301 | AM_RANGE(0x26, 0x26) AM_READ_PORT("DSW3") |
| 302 | |
| 303 | AM_RANGE(0xe0, 0xe0) AM_WRITENOP // writting 0's and 1's constantly. seems watchdog feeder. |
| 304 | AM_RANGE(0xe1, 0xe1) AM_WRITE(sangho_enable_w) // enable/disable reels register. |
| 305 | |
| 306 | ADDRESS_MAP_END |
| 307 | |
| 308 | /* |
| 309 | 08: W (3F) AY8910 data |
| 310 | 0C: W (07) AY8910 address |
| 311 | |
| 312 | 10: R Input #0 |
| 313 | 11: R Input #1 |
| 314 | 12: R Input #2 |
| 315 | 13: R Input #3 |
| 316 | |
| 317 | 14: R DSW #1 |
| 318 | |
| 319 | 17: W |
| 320 | |
| 321 | 1C: W \ these looks like RAMDAC commands. After write to 1C, there are 3 writes to 1D. |
| 322 | 1D: W / bp: 6c5b. |
| 323 | 1E: W (FF) --> seems the RAMDAC mask. |
| 324 | |
| 325 | 20: R DSW #4-0 |
| 326 | 21: R DSW #4-1 |
| 327 | 22: W |
| 328 | 24: W |
| 329 | 25: R DSW #2 |
| 330 | 26: R DSW #3 |
| 331 | |
| 332 | 2F: W (9C) |
| 333 | |
| 334 | E0: W |
| 335 | E1: W Reels enable/disable register |
| 336 | */ |
| 337 | |
| 338 | static ADDRESS_MAP_START( ramdac_map, AS_0, 8, goldstar_state ) |
| 339 | AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac", ramdac_device, ramdac_pal_r, ramdac_rgb666_w) |
| 340 | ADDRESS_MAP_END |
| 341 | |
| 342 | /* |
| 343 | RAMDAC written commands: |
| 344 | |
| 345 | 1C 1D 1D 1D 1C 1D 1D 1D 1C 1D 1D 1D 1C 1D 1D 1D |
| 346 | ------------- ------------- ------------- ------------- |
| 347 | 00 00 00 00 10 00 00 00 20 00 00 00 30 00 00 00 |
| 348 | 01 E8 18 06 11 E8 18 06 21 E8 18 06 31 E8 18 06 |
| 349 | 02 FC EA 00 12 FC EA 00 22 FC EA 00 32 FC EA 00 |
| 350 | 03 FF FF 00 13 FF FF 00 23 FF FF 00 33 FF FF 00 |
| 351 | 04 FF 00 00 14 FF 00 00 24 FF 00 00 34 FF 00 00 |
| 352 | 05 00 00 FF 15 00 00 FF 25 00 00 FF 35 00 00 FF |
| 353 | 06 00 E6 00 16 00 E6 00 26 00 E6 00 36 00 E6 00 |
| 354 | 07 01 F0 02 17 01 F0 02 27 01 F0 02 37 01 F0 02 |
| 355 | 08 EF FF E8 18 EF FF E8 28 EF FF E8 38 EF FF E8 |
| 356 | 09 12 08 F2 19 12 08 F2 29 12 08 F2 39 12 08 F2 |
| 357 | 0A 1A 12 FF 1A 1A 12 FF 2A 1A 12 FF 3A 1A 12 FF |
| 358 | 0B 1F 1F F9 1B 1F 1F F9 2B 1F 1F F9 3B 1F 1F F9 |
| 359 | 0C F9 F9 F9 1C F9 F9 F9 2C F9 F9 F9 3C F9 F9 F9 |
| 360 | 0D EF 18 00 1D EF 18 00 2D EF 18 00 3D EF 18 00 |
| 361 | 0E F0 F0 F0 1E F0 F0 F0 2E F0 F0 F0 3E F0 F0 F0 |
| 362 | 0F FF FF FF 1F FF 00 00 2F 00 FF FF 3F 00 FF 00 |
| 363 | |
| 364 | |
| 365 | 1C 1D 1D 1D 1C 1D 1D 1D 1C 1D 1D 1D 1C 1D 1D 1D |
| 366 | ------------- ------------- ------------- ------------- |
| 367 | 40 00 00 00 50 00 00 00 60 00 00 00 70 00 00 00 |
| 368 | 41 E8 18 06 51 E8 18 06 61 E8 18 06 71 E8 18 06 |
| 369 | 42 FC EA 00 52 FC EA 00 62 FC EA 00 72 FC EA 00 |
| 370 | 43 FF FF 00 53 FF FF 00 63 FF FF 00 73 FF FF 00 |
| 371 | 44 FF 00 00 54 FF 00 00 64 FF 00 00 74 FF 00 00 |
| 372 | 45 00 00 FF 55 00 00 FF 65 00 00 FF 75 00 00 FF |
| 373 | 46 00 E6 00 56 00 E6 00 66 00 E6 00 76 00 E6 00 |
| 374 | 47 01 F0 02 57 01 F0 02 67 01 F0 02 77 01 F0 02 |
| 375 | 48 EF FF E8 58 EF FF E8 68 EF FF E8 78 EF FF E8 |
| 376 | 49 12 08 F2 59 12 08 F2 69 12 08 F2 79 12 08 F2 |
| 377 | 4A 1A 12 FF 5A 1A 12 FF 6A 1A 12 FF 7A 1A 12 FF |
| 378 | 4B 1F 1F F9 5B 1F 1F F9 6B 1F 1F F9 7B 1F 1F F9 |
| 379 | 4C F9 F9 F9 5C F9 F9 F9 6C F9 F9 F9 7C F9 F9 F9 |
| 380 | 4D EF 18 00 5D EF 18 00 6D EF 18 00 7D EF 18 00 |
| 381 | 4E F0 F0 F0 5E 01 EC FF 6E 00 00 00 7E 00 00 00 |
| 382 | 4F FF FF 00 5F 00 00 00 6F 01 EC FF 7F 00 00 00 |
| 383 | |
| 384 | |
| 385 | 1C 1D 1D 1D 1C 1D 1D 1D 1C 1D 1D 1D 1C 1D 1D 1D |
| 386 | ------------- ------------- ------------- ------------- |
| 387 | 80 28 28 28 90 28 28 28 A0 28 28 28 B0 28 28 28 |
| 388 | 81 FF ED E3 91 0B 00 00 A1 18 11 00 B1 02 16 00 |
| 389 | 82 FF F7 1E 92 13 00 00 A2 00 E1 00 B2 02 E1 00 |
| 390 | 83 FF F8 18 93 1C 00 00 A3 00 E8 00 B3 01 ED 02 |
| 391 | 84 14 0B 0B 94 E5 00 00 A4 13 F0 00 B4 02 FA 09 |
| 392 | 85 1F 10 0A 95 ED 00 00 A5 FF F7 1E B5 F1 1A 00 |
| 393 | 86 E3 13 08 96 F6 00 00 A6 FF F0 EE B6 F1 EA 00 |
| 394 | 87 E8 18 06 97 FF 05 0D A7 EF 18 00 B7 1F 00 00 |
| 395 | 88 EC 1E 03 98 FF 0C 13 A8 F4 1B 00 B8 F2 00 00 |
| 396 | 89 F0 E3 02 99 FF 13 19 A9 FD 1F 00 B9 FF 00 00 |
| 397 | 8A F5 E9 01 9A FF 1A 1F AA FF E3 00 BA FF 0C 02 |
| 398 | 8B FA EF 01 9B FF E2 E6 AB FF EA 00 BB FF 18 06 |
| 399 | 8C FF F6 00 9C FF E9 EC AC FF F1 00 BC FF E3 0A |
| 400 | 8D FF FF 00 9D FF F0 F2 AD FF F8 00 BD FF EC 19 |
| 401 | 8E FF FF 1F 9E FF F7 F8 AE FF FF 00 BE FF F4 1F |
| 402 | 8F FF FF FF 9F FF FF FF AF FF FF 1F BF FF FF FF |
| 403 | |
| 404 | |
| 405 | 1C 1D 1D 1D 1C 1D 1D 1D 1C 1D 1D 1D 1C 1D 1D 1D |
| 406 | ------------- ------------- ------------- ------------- |
| 407 | C0 28 28 28 D0 28 28 28 E0 28 28 28 F0 12 12 E0 |
| 408 | C1 F1 E6 00 D1 00 00 E4 E1 00 05 00 F1 1B 00 00 |
| 409 | C2 F8 F1 00 D2 00 00 FF E2 00 0A 00 F2 E0 10 04 |
| 410 | C3 FF FF 00 D3 00 13 FF E3 00 10 00 F3 E9 14 05 |
| 411 | C4 14 07 E7 D4 00 1A FF E4 00 15 00 F4 EF 1E 12 |
| 412 | C5 15 0C EF D5 00 E8 FF E5 00 1B 00 F5 EC E3 1A |
| 413 | C6 1A 12 FA D6 16 0B 00 E6 00 E0 00 F6 EE 05 04 |
| 414 | C7 1B 16 FA D7 19 0F 00 E7 00 E6 00 F7 F4 05 04 |
| 415 | C8 1D 1A FB D8 1D 14 00 E8 04 EC 05 F8 FE 04 04 |
| 416 | C9 1F 1E FC D9 E5 1A 00 E9 0C F2 0E F9 F6 E4 15 |
| 417 | CA E2 E2 FC DA EE E0 00 EA 15 F8 18 FA F8 EC E0 |
| 418 | CB E6 E7 FD DB F6 E6 00 EB E0 FF E3 FB FD F0 E4 |
| 419 | CC EA EC FE DC FF ED 00 EC FD 0C 02 FC FF F6 E7 |
| 420 | CD EF F1 FF DD FF F6 00 ED FD 12 0D FD FF FA EA |
| 421 | CE F6 F8 FF DE FF FF 00 EE FE 1A 18 FE FF FF F2 |
| 422 | CF FF FF FF DF FF FF FF EF FF E4 E4 FF FF FF FF |
| 423 | |
| 424 | |
| 425 | And set again.... |
| 426 | |
| 427 | 1C 1D 1D 1D 1C 1D 1D 1D |
| 428 | ------------- ------------- |
| 429 | 70 00 00 00 F0 12 12 E0 |
| 430 | 71 18 0C F6 F1 1B 00 00 |
| 431 | 72 1B 13 0B F2 E0 10 04 |
| 432 | 73 E1 15 1E F3 E9 14 05 |
| 433 | 74 F3 E9 E4 F4 EF 1E 12 |
| 434 | 75 F3 E7 00 F5 EC E3 1A |
| 435 | 76 FE 17 E3 F6 EE 05 04 |
| 436 | 77 FE 0C F1 F7 F4 05 04 |
| 437 | 78 FD E3 13 F8 FE 04 04 |
| 438 | 79 FE ED 05 F9 F6 E4 15 |
| 439 | 7A FF F5 03 FA F8 EC E0 |
| 440 | 7B FF FB 14 FB FD F0 E4 |
| 441 | 7C FC FB FA FC FF F6 E7 |
| 442 | 7D FF FC E0 FD FF FA EA |
| 443 | 7E FE FE FC FE FF FF F2 |
| 444 | 7F FF 00 FF FF FF FF FF |
| 445 | |
| 446 | */ |
| 447 | |
| 448 | |
| 449 | |
| 220 | 450 | WRITE8_MEMBER(goldstar_state::ncb3_port81_w) |
| 221 | 451 | { |
| 222 | 452 | // if (data!=0x00) |
| r30785 | r30786 | |
| 373 | 603 | AM_RANGE(0xfc80, 0xffff) AM_RAM |
| 374 | 604 | ADDRESS_MAP_END |
| 375 | 605 | |
| 606 | |
| 376 | 607 | static ADDRESS_MAP_START( nfm_map, AS_PROGRAM, 8, goldstar_state ) |
| 377 | 608 | AM_RANGE(0x0000, 0xd7ff) AM_ROM AM_WRITENOP |
| 378 | 609 | |
| 379 | 610 | AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE("nvram") |
| 380 | 611 | |
| 381 | | |
| 382 | 612 | AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_SHARE("fg_vidram") |
| 383 | 613 | AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_SHARE("fg_atrram") |
| 384 | 614 | |
| r30785 | r30786 | |
| 743 | 973 | |
| 744 | 974 | AM_RANGE(0x0000, 0xbfff) AM_ROM // ok |
| 745 | 975 | |
| 746 | | AM_RANGE(0xd000, 0xd7ff) AM_RAM //AM_SHARE("nvram") |
| 976 | AM_RANGE(0xd800, 0xdfff) AM_RAM //AM_SHARE("nvram") |
| 977 | AM_RANGE(0xf000, 0xffff) AM_RAM |
| 747 | 978 | |
| 748 | | AM_RANGE(0xd840, 0xd87f) AM_RAM AM_SHARE("reel1_scroll") |
| 749 | | AM_RANGE(0xd880, 0xd8bf) AM_RAM AM_SHARE("reel2_scroll") |
| 750 | | AM_RANGE(0xd900, 0xd93f) AM_RAM AM_SHARE("reel3_scroll") |
| 751 | | AM_RANGE(0xdfc0, 0xdfff) AM_RAM |
| 752 | | |
| 753 | 979 | AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(goldstar_fg_vidram_w) AM_SHARE("fg_vidram") |
| 754 | 980 | AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(goldstar_fg_atrram_w) AM_SHARE("fg_atrram") |
| 755 | 981 | |
| 982 | /* just placeholders */ |
| 756 | 983 | AM_RANGE(0xf000, 0xf1ff) AM_RAM_WRITE(goldstar_reel1_ram_w ) AM_SHARE("reel1_ram") |
| 757 | 984 | AM_RANGE(0xf200, 0xf3ff) AM_RAM_WRITE(goldstar_reel2_ram_w ) AM_SHARE("reel2_ram") |
| 758 | 985 | AM_RANGE(0xf400, 0xf5ff) AM_RAM_WRITE(goldstar_reel3_ram_w ) AM_SHARE("reel3_ram") |
| 759 | | AM_RANGE(0xf600, 0xf7ff) AM_RAM |
| 986 | |
| 987 | AM_RANGE(0xf640, 0xf67f) AM_RAM AM_SHARE("reel1_scroll") |
| 988 | AM_RANGE(0xf680, 0xf6bf) AM_RAM AM_SHARE("reel2_scroll") |
| 989 | AM_RANGE(0xf700, 0xf73f) AM_RAM AM_SHARE("reel3_scroll") |
| 990 | |
| 760 | 991 | AM_RANGE(0xf800, 0xf9ff) AM_RAM_WRITE(unkch_reel1_attrram_w ) AM_SHARE("reel1_attrram") |
| 761 | 992 | AM_RANGE(0xfa00, 0xfbff) AM_RAM_WRITE(unkch_reel2_attrram_w ) AM_SHARE("reel2_attrram") |
| 762 | 993 | AM_RANGE(0xfc00, 0xfdff) AM_RAM_WRITE(unkch_reel3_attrram_w ) AM_SHARE("reel3_attrram") |
| 763 | | AM_RANGE(0xfe00, 0xffff) AM_RAM |
| 764 | 994 | |
| 765 | 995 | ADDRESS_MAP_END |
| 766 | 996 | |
| 767 | 997 | /* Bonus Chance W-8 |
| 768 | 998 | |
| 999 | clean 20h, 30h & 40h |
| 1000 | |
| 769 | 1001 | 50h = SN76489 #1 |
| 770 | 1002 | 51h = SN76489 #2 |
| 771 | 1003 | 52h = SN76489 #3 |
| 772 | 1004 | 53h = SN76489 #4 |
| 773 | 1005 | |
| 1006 | 10h = RW |
| 1007 | 20h = RW |
| 1008 | 30h = W |
| 1009 | 40h = W |
| 1010 | |
| 1011 | 60h = R |
| 1012 | |
| 774 | 1013 | */ |
| 775 | 1014 | static ADDRESS_MAP_START( bonusch_portmap, AS_IO, 8, goldstar_state ) |
| 776 | 1015 | ADDRESS_MAP_GLOBAL_MASK(0xff) |
| 777 | | AM_RANGE(0x50, 0x50) AM_DEVWRITE("sn1", sn76489_device, write) /* SN76489 #1 */ |
| 778 | | AM_RANGE(0x51, 0x51) AM_DEVWRITE("sn2", sn76489_device, write) /* SN76489 #2 */ |
| 779 | | AM_RANGE(0x52, 0x52) AM_DEVWRITE("sn3", sn76489_device, write) /* SN76489 #3 */ |
| 780 | | AM_RANGE(0x53, 0x53) AM_DEVWRITE("sn4", sn76489_device, write) /* SN76489 #4 */ |
| 1016 | AM_RANGE(0x10, 0x10) AM_READ_PORT("IN0") |
| 1017 | AM_RANGE(0x20, 0x20) AM_READ_PORT("IN1") |
| 1018 | AM_RANGE(0x50, 0x50) AM_DEVWRITE("sn1", sn76489_device, write) /* SN76489 #1 */ |
| 1019 | AM_RANGE(0x51, 0x51) AM_DEVWRITE("sn2", sn76489_device, write) /* SN76489 #2 */ |
| 1020 | AM_RANGE(0x52, 0x52) AM_DEVWRITE("sn3", sn76489_device, write) /* SN76489 #3 */ |
| 1021 | AM_RANGE(0x53, 0x53) AM_DEVWRITE("sn4", sn76489_device, write) /* SN76489 #4 */ |
| 1022 | AM_RANGE(0x60, 0x60) AM_READ_PORT("IN3") |
| 781 | 1023 | ADDRESS_MAP_END |
| 782 | 1024 | |
| 783 | 1025 | |
| r30785 | r30786 | |
| 5899 | 6141 | INPUT_PORTS_END |
| 5900 | 6142 | |
| 5901 | 6143 | |
| 6144 | static INPUT_PORTS_START( star100 ) |
| 6145 | PORT_START("IN0") |
| 6146 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6147 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6148 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SLOT_STOP_ALL ) PORT_NAME("Stop All / Big") |
| 6149 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SLOT_STOP1 ) PORT_NAME("Stop 1 / D-UP") |
| 6150 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SLOT_STOP3 ) PORT_NAME("Stop 3 / Take / Select Card") |
| 6151 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Play (Bet)") |
| 6152 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SLOT_STOP2 ) PORT_NAME("Stop 2 / Small") |
| 6153 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start") |
| 6154 | |
| 6155 | // PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1) PORT_NAME("IN0-1") |
| 6156 | // PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2) PORT_NAME("IN0-2") |
| 6157 | // PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3) PORT_NAME("IN0-3: BIG") |
| 6158 | // PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4) PORT_NAME("IN0-4: DOUBLE UP") |
| 6159 | // PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5) PORT_NAME("IN0-5: TAKE") |
| 6160 | // PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6) PORT_NAME("IN0-6: BET") |
| 6161 | // PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7) PORT_NAME("IN0-7: SMALL") |
| 6162 | // PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8) PORT_NAME("IN0-8: START") |
| 6163 | |
| 6164 | PORT_START("IN1") |
| 6165 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6166 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6167 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6168 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6169 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* Coin A */ |
| 6170 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* Coin B */ |
| 6171 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) /* Key In */ |
| 6172 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(2) /* Coin C */ |
| 6173 | |
| 6174 | PORT_START("IN2") |
| 6175 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6176 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6177 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6178 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6179 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_W) PORT_NAME("Key Out / Attendant") |
| 6180 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_H) PORT_NAME("Hopper Limited Payout") |
| 6181 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_9) PORT_NAME("Settings / Test Mode") PORT_TOGGLE |
| 6182 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_0) PORT_NAME("Statistics") |
| 6183 | |
| 6184 | PORT_START("IN3") // reflected in test mode |
| 6185 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6186 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6187 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6188 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6189 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6190 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6191 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6192 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6193 | |
| 6194 | PORT_START("IN4") // reflected in test mode |
| 6195 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6196 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6197 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6198 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6199 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6200 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6201 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6202 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) |
| 6203 | |
| 6204 | PORT_START("DSW1") |
| 6205 | PORT_DIPNAME( 0x01, 0x00, "Key Out" ) PORT_DIPLOCATION("SW1:1") |
| 6206 | PORT_DIPSETTING( 0x00, "x1" ) |
| 6207 | PORT_DIPSETTING( 0x01, "x100" ) |
| 6208 | PORT_DIPNAME( 0x02, 0x02, "Bonus Rate" ) PORT_DIPLOCATION("SW1:2") |
| 6209 | PORT_DIPSETTING( 0x00, "1/24" ) |
| 6210 | PORT_DIPSETTING( 0x02, "1/32" ) |
| 6211 | PORT_DIPNAME( 0x04, 0x04, "Spin Rate" ) PORT_DIPLOCATION("SW1:3") |
| 6212 | PORT_DIPSETTING( 0x04, "Slow" ) |
| 6213 | PORT_DIPSETTING( 0x00, "Fast" ) |
| 6214 | PORT_DIPNAME( 0x18, 0x18, "Double Up Rate" ) PORT_DIPLOCATION("SW1:4,5") |
| 6215 | PORT_DIPSETTING( 0x18, "60%" ) |
| 6216 | PORT_DIPSETTING( 0x10, "70%" ) |
| 6217 | PORT_DIPSETTING( 0x08, "80%" ) |
| 6218 | PORT_DIPSETTING( 0x00, "90%" ) |
| 6219 | PORT_DIPNAME( 0xe0, 0xe0, "Game Rate" ) PORT_DIPLOCATION("SW1:6,7,8") |
| 6220 | PORT_DIPSETTING( 0xe0, "50%" ) |
| 6221 | PORT_DIPSETTING( 0xc0, "60%" ) |
| 6222 | PORT_DIPSETTING( 0xa0, "65%" ) |
| 6223 | PORT_DIPSETTING( 0x80, "70%" ) |
| 6224 | PORT_DIPSETTING( 0x60, "75%" ) |
| 6225 | PORT_DIPSETTING( 0x40, "80%" ) |
| 6226 | PORT_DIPSETTING( 0x20, "85%" ) |
| 6227 | PORT_DIPSETTING( 0x00, "90%" ) |
| 6228 | |
| 6229 | PORT_START("DSW2") |
| 6230 | PORT_DIPNAME( 0x01, 0x01, "Bonus Min Bet" ) PORT_DIPLOCATION("SW2:1") |
| 6231 | PORT_DIPSETTING( 0x01, "16" ) |
| 6232 | PORT_DIPSETTING( 0x00, "32" ) |
| 6233 | PORT_DIPNAME( 0x02, 0x02, "Number of Jackpot" ) PORT_DIPLOCATION("SW2:2") |
| 6234 | PORT_DIPSETTING( 0x00, "3 2" ) |
| 6235 | PORT_DIPSETTING( 0x02, "6 3" ) |
| 6236 | PORT_DIPNAME( 0x04, 0x04, "Double Up" ) PORT_DIPLOCATION("SW2:3") |
| 6237 | PORT_DIPSETTING( 0x04, DEF_STR( Yes ) ) |
| 6238 | PORT_DIPSETTING( 0x00, DEF_STR( No ) ) |
| 6239 | PORT_DIPNAME( 0x18, 0x18, "Payout Limit" ) PORT_DIPLOCATION("SW2:4,5") |
| 6240 | PORT_DIPSETTING( 0x18, "1000" ) |
| 6241 | PORT_DIPSETTING( 0x10, "2000" ) |
| 6242 | PORT_DIPSETTING( 0x08, "5000" ) |
| 6243 | PORT_DIPSETTING( 0x00, "No Limit" ) |
| 6244 | PORT_DIPNAME( 0x20, 0x20, "Bonus" ) PORT_DIPLOCATION("SW2:6") |
| 6245 | PORT_DIPSETTING( 0x20, "Normal" ) |
| 6246 | PORT_DIPSETTING( 0x00, "Random" ) |
| 6247 | PORT_DIPNAME( 0xc0, 0xc0, "Number of Clown" ) PORT_DIPLOCATION("SW2:7,8") |
| 6248 | PORT_DIPSETTING( 0xc0, "60%" ) |
| 6249 | PORT_DIPSETTING( 0x80, "70%" ) |
| 6250 | PORT_DIPSETTING( 0x40, "80%" ) |
| 6251 | PORT_DIPSETTING( 0x00, "90%" ) |
| 6252 | |
| 6253 | PORT_START("DSW3") |
| 6254 | PORT_DIPNAME( 0x07, 0x07, "Key In Rate" ) PORT_DIPLOCATION("SW3:1,2,3") |
| 6255 | PORT_DIPSETTING( 0x00, "100 Credits" ) |
| 6256 | PORT_DIPSETTING( 0x01, "110 Credits" ) |
| 6257 | PORT_DIPSETTING( 0x02, "120 Credits" ) |
| 6258 | PORT_DIPSETTING( 0x03, "130 Credits" ) |
| 6259 | PORT_DIPSETTING( 0x04, "200 Credits" ) |
| 6260 | PORT_DIPSETTING( 0x05, "400 Credits" ) |
| 6261 | PORT_DIPSETTING( 0x06, "500 Credits" ) |
| 6262 | PORT_DIPSETTING( 0x07, "1000 Credits" ) |
| 6263 | PORT_DIPNAME( 0x18, 0x00, "Bet Limit" ) PORT_DIPLOCATION("SW3:4,5") |
| 6264 | PORT_DIPSETTING( 0x18, "32 (Limit of Bonus: 1/4)" ) |
| 6265 | PORT_DIPSETTING( 0x10, "64 (Limit of Bonus: 1/2)" ) |
| 6266 | PORT_DIPSETTING( 0x08, "72 (Limit of Bonus: All)" ) |
| 6267 | PORT_DIPSETTING( 0x00, "80 (Limit of Bonus: All)" ) |
| 6268 | PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6") |
| 6269 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 6270 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6271 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7") |
| 6272 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 6273 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6274 | PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8") |
| 6275 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 6276 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6277 | |
| 6278 | PORT_START("DSW4-0") |
| 6279 | PORT_DIPNAME( 0x07, 0x07, "Coinage A, B & C" ) PORT_DIPLOCATION("SW4:1,2,3") |
| 6280 | PORT_DIPSETTING( 0x00, "1 Coin / 1 Credit" ) |
| 6281 | PORT_DIPSETTING( 0x01, "1 Coin / 5 Credits" ) |
| 6282 | PORT_DIPSETTING( 0x02, "1 Coin / 10 Credits" ) |
| 6283 | PORT_DIPSETTING( 0x03, "1 Coin / 20 Credits" ) |
| 6284 | PORT_DIPSETTING( 0x04, "1 Coin / 30 Credits" ) |
| 6285 | PORT_DIPSETTING( 0x05, "1 Coin / 40 Credits" ) |
| 6286 | PORT_DIPSETTING( 0x06, "1 Coin / 50 Credits" ) |
| 6287 | PORT_DIPSETTING( 0x07, "1 Coin / 100 Credit" ) |
| 6288 | |
| 6289 | /* the following two are 'bonus', and need conditional port since they are in different banks */ |
| 6290 | PORT_DIPNAME( 0x08, 0x08, "Bonus (switch-1)" ) PORT_DIPLOCATION("SW4:4") |
| 6291 | PORT_DIPSETTING( 0x08, "20000" ) PORT_CONDITION("DSW4-1", 0x01, NOTEQUALS, 0x00) |
| 6292 | PORT_DIPSETTING( 0x08, "40000" ) PORT_CONDITION("DSW4-1", 0x01, EQUALS, 0x00) |
| 6293 | PORT_DIPSETTING( 0x00, "30000" ) PORT_CONDITION("DSW4-1", 0x01, NOTEQUALS, 0x00) |
| 6294 | PORT_DIPSETTING( 0x00, "50000" ) PORT_CONDITION("DSW4-1", 0x01, EQUALS, 0x00) |
| 6295 | PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 6296 | |
| 6297 | PORT_START("DSW4-1") |
| 6298 | PORT_DIPNAME( 0x01, 0x01, "Bonus (switch-2)" ) PORT_DIPLOCATION("SW4:5") |
| 6299 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 6300 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6301 | |
| 6302 | PORT_DIPNAME( 0x02, 0x02, "Max Bonus" ) PORT_DIPLOCATION("SW4:6") |
| 6303 | PORT_DIPSETTING( 0x00, "100000" ) |
| 6304 | PORT_DIPSETTING( 0x02, "200000" ) |
| 6305 | PORT_DIPNAME( 0x0c, 0x0c, "Minimum Bet" ) PORT_DIPLOCATION("SW4:7,8") |
| 6306 | PORT_DIPSETTING( 0x0c, "0" ) |
| 6307 | PORT_DIPSETTING( 0x08, "8" ) |
| 6308 | PORT_DIPSETTING( 0x04, "16" ) |
| 6309 | PORT_DIPSETTING( 0x00, "32" ) |
| 6310 | PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 6311 | |
| 6312 | PORT_START("DSW5") // phisically tied to ay8910 port A, but unused... |
| 6313 | PORT_DIPNAME( 0x01, 0x01, "DSW5" ) PORT_DIPLOCATION("SW5:1") |
| 6314 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 6315 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6316 | PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:2") |
| 6317 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 6318 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6319 | PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:3") |
| 6320 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 6321 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6322 | PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:4") |
| 6323 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 6324 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6325 | PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:5") |
| 6326 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 6327 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6328 | PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:6") |
| 6329 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 6330 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6331 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:7") |
| 6332 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 6333 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6334 | PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:8") |
| 6335 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 6336 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6337 | |
| 6338 | PORT_START("DSW6") // phisically tied to ay8910 port B, but unused... |
| 6339 | PORT_DIPNAME( 0x01, 0x01, "DSW6" ) PORT_DIPLOCATION("SW6:1") |
| 6340 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 6341 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6342 | PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:2") |
| 6343 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 6344 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6345 | PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:3") |
| 6346 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 6347 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6348 | PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:4") |
| 6349 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 6350 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6351 | PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:5") |
| 6352 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 6353 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6354 | PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:6") |
| 6355 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 6356 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6357 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:7") |
| 6358 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 6359 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6360 | PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:8") |
| 6361 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 6362 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6363 | |
| 6364 | INPUT_PORTS_END |
| 6365 | |
| 6366 | |
| 6367 | static INPUT_PORTS_START( crazybon ) // to analyze... |
| 6368 | PORT_START("IN0") |
| 6369 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1) PORT_NAME("IN0-1") |
| 6370 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2) PORT_NAME("IN0-2") |
| 6371 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3) PORT_NAME("IN0-3: BIG") |
| 6372 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4) PORT_NAME("IN0-4: DOUBLE UP") |
| 6373 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5) PORT_NAME("IN0-5: TAKE") |
| 6374 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6) PORT_NAME("IN0-6: BET") |
| 6375 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7) PORT_NAME("IN0-7: SMALL") |
| 6376 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8) PORT_NAME("IN0-8: START") |
| 6377 | |
| 6378 | PORT_START("IN1") |
| 6379 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Q) PORT_NAME("IN1-1") |
| 6380 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_W) PORT_NAME("IN1-2") |
| 6381 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_E) PORT_NAME("IN1-3") |
| 6382 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_R) PORT_NAME("IN1-4") |
| 6383 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_T) PORT_NAME("IN1-5: COIN A") |
| 6384 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Y) PORT_NAME("IN1-6: COIN B") |
| 6385 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_U) PORT_NAME("IN1-7: NOTE IN") |
| 6386 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_I) PORT_NAME("IN1-8: COIN C") |
| 6387 | |
| 6388 | PORT_START("IN2") |
| 6389 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_A) PORT_NAME("IN2-1") |
| 6390 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_S) PORT_NAME("IN2-2") |
| 6391 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_D) PORT_NAME("IN2-3") |
| 6392 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_F) PORT_NAME("IN2-4") |
| 6393 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_G) PORT_NAME("IN2-5: KEYOUT") |
| 6394 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_H) PORT_NAME("IN2-6: HOPPER LIMITED PAYOUT") |
| 6395 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_F2) PORT_NAME("IN2-7: TEST MODE") PORT_TOGGLE |
| 6396 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_K) PORT_NAME("IN2-8: STATISTICS") |
| 6397 | |
| 6398 | PORT_START("IN3") |
| 6399 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_NAME("IN3-1") |
| 6400 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_NAME("IN3-2") |
| 6401 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_C) PORT_NAME("IN3-3") |
| 6402 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_V) PORT_NAME("IN3-4") |
| 6403 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_B) PORT_NAME("IN3-5") |
| 6404 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_N) PORT_NAME("IN3-6") |
| 6405 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_M) PORT_NAME("IN3-7") |
| 6406 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_L) PORT_NAME("IN3-8") |
| 6407 | |
| 6408 | PORT_START("IN4") |
| 6409 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("IN4-1") |
| 6410 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("IN4-2") |
| 6411 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("IN4-3") |
| 6412 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("IN4-4") |
| 6413 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("IN4-5") |
| 6414 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("IN4-6") |
| 6415 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("IN4-7") |
| 6416 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("IN4-8") |
| 6417 | |
| 6418 | PORT_START("DSW1") |
| 6419 | PORT_DIPNAME( 0x01, 0x01, "DSW1" ) PORT_DIPLOCATION("SW1:1") |
| 6420 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 6421 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6422 | PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2") |
| 6423 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 6424 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6425 | PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:3") |
| 6426 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 6427 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6428 | PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4") |
| 6429 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 6430 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6431 | PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:5") |
| 6432 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 6433 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6434 | PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:6") |
| 6435 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 6436 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6437 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:7") |
| 6438 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 6439 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6440 | PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:8") |
| 6441 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 6442 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6443 | |
| 6444 | PORT_START("DSW2") |
| 6445 | PORT_DIPNAME( 0x01, 0x01, "DSW2" ) PORT_DIPLOCATION("SW2:1") |
| 6446 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 6447 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6448 | PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2") |
| 6449 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 6450 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6451 | PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3") |
| 6452 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 6453 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6454 | PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4") |
| 6455 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 6456 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6457 | PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5") |
| 6458 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 6459 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6460 | PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6") |
| 6461 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 6462 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6463 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7") |
| 6464 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 6465 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6466 | PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8") |
| 6467 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 6468 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6469 | |
| 6470 | PORT_START("DSW3") |
| 6471 | PORT_DIPNAME( 0x01, 0x01, "DSW3" ) PORT_DIPLOCATION("SW3:1") |
| 6472 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 6473 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6474 | PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2") |
| 6475 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 6476 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6477 | PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3") |
| 6478 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 6479 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6480 | PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4") |
| 6481 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 6482 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6483 | PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5") |
| 6484 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 6485 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6486 | PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6") |
| 6487 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 6488 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6489 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7") |
| 6490 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 6491 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6492 | PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8") |
| 6493 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 6494 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6495 | |
| 6496 | PORT_START("DSW4-0") |
| 6497 | PORT_DIPNAME( 0x01, 0x01, "DSW4-0" ) PORT_DIPLOCATION("SW4:1") |
| 6498 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 6499 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6500 | PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:2") |
| 6501 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 6502 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6503 | PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:3") |
| 6504 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 6505 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6506 | PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:4") |
| 6507 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 6508 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6509 | PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) |
| 6510 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 6511 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6512 | PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) |
| 6513 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 6514 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6515 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) |
| 6516 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 6517 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6518 | PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) |
| 6519 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 6520 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6521 | |
| 6522 | PORT_START("DSW4-1") |
| 6523 | PORT_DIPNAME( 0x01, 0x01, "DSW4-1" ) PORT_DIPLOCATION("SW4:5") |
| 6524 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 6525 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6526 | PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:6") |
| 6527 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 6528 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6529 | PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:7") |
| 6530 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 6531 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6532 | PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:8") |
| 6533 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 6534 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6535 | PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) |
| 6536 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 6537 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6538 | PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) |
| 6539 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 6540 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6541 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) |
| 6542 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 6543 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6544 | PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) |
| 6545 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 6546 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6547 | |
| 6548 | PORT_START("DSW5") |
| 6549 | PORT_DIPNAME( 0x01, 0x01, "DSW5" ) PORT_DIPLOCATION("SW5:1") |
| 6550 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 6551 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6552 | PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:2") |
| 6553 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 6554 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6555 | PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:3") |
| 6556 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 6557 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6558 | PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:4") |
| 6559 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 6560 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6561 | PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:5") |
| 6562 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 6563 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6564 | PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:6") |
| 6565 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 6566 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6567 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:7") |
| 6568 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 6569 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6570 | PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW5:8") |
| 6571 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 6572 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6573 | |
| 6574 | PORT_START("DSW6") |
| 6575 | PORT_DIPNAME( 0x01, 0x01, "DSW6" ) PORT_DIPLOCATION("SW6:1") |
| 6576 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 6577 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6578 | PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:2") |
| 6579 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 6580 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6581 | PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:3") |
| 6582 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 6583 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6584 | PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:4") |
| 6585 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 6586 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6587 | PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:5") |
| 6588 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 6589 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6590 | PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:6") |
| 6591 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 6592 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6593 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:7") |
| 6594 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 6595 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6596 | PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:8") |
| 6597 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 6598 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 6599 | |
| 6600 | INPUT_PORTS_END |
| 6601 | |
| 6602 | |
| 5902 | 6603 | static const gfx_layout charlayout = |
| 5903 | 6604 | { |
| 5904 | 6605 | 8,8, /* 8*8 characters */ |
| r30785 | r30786 | |
| 6146 | 6847 | 8*8 /* every char takes 8 consecutive bytes */ |
| 6147 | 6848 | }; |
| 6148 | 6849 | |
| 6850 | static const gfx_layout sangho_tilelayout = |
| 6851 | { |
| 6852 | 8,32, /* 8*32 characters */ |
| 6853 | 1024, /* 256 tiles */ |
| 6854 | 4, /* 4 bits per pixel */ |
| 6855 | { 0, 2, 4, 6 }, |
| 6856 | { 0, 1, 1*8+0, 1*8+1, 2*8+0, 2*8+1, 3*8+0, 3*8+1 }, |
| 6857 | { 0*8, 4*8, 8*8, 12*8, 16*8, 20*8, 24*8, 28*8, |
| 6858 | 32*8, 36*8, 40*8, 44*8, 48*8, 52*8, 56*8, 60*8, |
| 6859 | 64*8, 68*8, 72*8, 76*8, 80*8, 84*8, 88*8, 92*8, |
| 6860 | 96*8, 100*8, 104*8, 108*8, 112*8, 116*8, 120*8, 124*8 }, |
| 6861 | 128*8 /* every char takes 128 consecutive bytes */ |
| 6862 | }; |
| 6149 | 6863 | |
| 6864 | |
| 6865 | |
| 6150 | 6866 | static GFXDECODE_START( goldstar ) |
| 6151 | 6867 | GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 16 ) |
| 6152 | 6868 | GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 128, 8 ) |
| r30785 | r30786 | |
| 6233 | 6949 | GFXDECODE_ENTRY( "gfx2", 0, tiles8x32x4_layout, 128, 8 ) |
| 6234 | 6950 | GFXDECODE_END |
| 6235 | 6951 | |
| 6952 | static GFXDECODE_START( sangho ) |
| 6953 | GFXDECODE_ENTRY( "gfx1", 0, charlayout, 24, 16 ) |
| 6954 | GFXDECODE_ENTRY( "gfx2", 0, sangho_tilelayout, 128 + (2 * 16), 16 ) |
| 6955 | /* 7*16,16 title girl in 1st color |
| 6956 | 6*16,16 watermelon in game |
| 6957 | 4*16,16 blueberry in game |
| 6958 | 3*16,16 cherries in game |
| 6959 | 2*16,16 oranges and title girl in game |
| 6960 | 1*16,16 nines in game |
| 6961 | */ |
| 6962 | GFXDECODE_END |
| 6236 | 6963 | |
| 6964 | |
| 6237 | 6965 | static const gfx_layout tiles8x32_4bpp_layout = |
| 6238 | 6966 | { |
| 6239 | 6967 | 8,32, |
| r30785 | r30786 | |
| 6476 | 7204 | MACHINE_CONFIG_END |
| 6477 | 7205 | |
| 6478 | 7206 | |
| 7207 | static MACHINE_CONFIG_START( star100, goldstar_state ) |
| 7208 | |
| 7209 | /* basic machine hardware */ |
| 7210 | MCFG_CPU_ADD("maincpu", Z80, CPU_CLOCK) |
| 7211 | MCFG_CPU_PROGRAM_MAP(star100_map) |
| 7212 | MCFG_CPU_IO_MAP(star100_readport) |
| 7213 | MCFG_CPU_VBLANK_INT_DRIVER("screen", goldstar_state, irq0_line_hold) |
| 7214 | |
| 7215 | /* video hardware */ |
| 7216 | MCFG_SCREEN_ADD("screen", RASTER) |
| 7217 | MCFG_SCREEN_REFRESH_RATE(60) |
| 7218 | MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) |
| 7219 | MCFG_SCREEN_SIZE(64*8, 32*8) |
| 7220 | MCFG_SCREEN_VISIBLE_AREA(0*8, 64*8-1, 2*8, 30*8-1) |
| 7221 | MCFG_SCREEN_UPDATE_DRIVER(goldstar_state, screen_update_sangho) |
| 7222 | MCFG_SCREEN_PALETTE("palette") |
| 7223 | |
| 7224 | MCFG_PALETTE_ADD("palette", 0x100) |
| 7225 | MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") |
| 7226 | |
| 7227 | MCFG_GFXDECODE_ADD("gfxdecode", "palette", sangho) |
| 7228 | |
| 7229 | MCFG_NVRAM_ADD_1FILL("nvram") |
| 7230 | |
| 7231 | MCFG_VIDEO_START_OVERRIDE(goldstar_state, sangho) |
| 7232 | |
| 7233 | /* sound hardware */ |
| 7234 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 7235 | MCFG_SOUND_ADD("aysnd", AY8910, AY_CLOCK) |
| 7236 | MCFG_AY8910_PORT_A_READ_CB(IOPORT("DSW5")) |
| 7237 | MCFG_AY8910_PORT_B_READ_CB(IOPORT("DSW6")) |
| 7238 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) |
| 7239 | |
| 7240 | MCFG_OKIM6295_ADD("oki", OKI_CLOCK, OKIM6295_PIN7_HIGH) /* clock frequency & pin 7 not verified */ |
| 7241 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) |
| 7242 | |
| 7243 | MACHINE_CONFIG_END |
| 7244 | |
| 7245 | |
| 6479 | 7246 | static MACHINE_CONFIG_START( moonlght, goldstar_state ) |
| 6480 | 7247 | |
| 6481 | 7248 | /* basic machine hardware */ |
| r30785 | r30786 | |
| 7813 | 8580 | |
| 7814 | 8581 | |
| 7815 | 8582 | /* |
| 8583 | Star 100, by Sang Ho. |
| 7816 | 8584 | |
| 8585 | PCB SANGHO PM-003 (VER-B2). |
| 8586 | Different hardware, but seems to be close to GoldStar. |
| 8587 | Also different memory map. |
| 8588 | |
| 8589 | 27C020 socket for OKI samples is unpopulated. |
| 8590 | |
| 8591 | */ |
| 8592 | ROM_START( star100 ) |
| 8593 | ROM_REGION( 0x80000, "maincpu", 0 ) |
| 8594 | ROM_LOAD( "str-100_051212__27c512.1e", 0x00000, 0x10000, CRC(6c73ae4e) SHA1(8476b77a190a653b2a47682072bc9b4db594c02e) ) |
| 8595 | |
| 8596 | ROM_REGION( 0x80000, "gfx1", 0 ) |
| 8597 | ROM_LOAD( "str_l3__flash29c011a-15.3l", 0x00000, 0x20000, CRC(89bf5935) SHA1(f8af107e21a9157ea5056eedbda36a1b99c5df5b) ) |
| 8598 | |
| 8599 | ROM_REGION( 0x80000, "gfx2", 0 ) |
| 8600 | ROM_LOAD( "str_m3__flash29c011a-15.3m", 0x00000, 0x20000, CRC(fff9ea0e) SHA1(6125c99e684ac639a0f85cbb00c26131a23324aa) ) |
| 8601 | |
| 8602 | ROM_REGION( 0x40000, "oki", 0 ) /* Audio ADPCM */ |
| 8603 | ROM_LOAD( "27c020.bin", 0x0000, 0x20000, NO_DUMP ) |
| 8604 | ROM_END |
| 8605 | |
| 8606 | |
| 8607 | /* |
| 8608 | Crazy Bonus, by Sang Ho. |
| 8609 | |
| 8610 | PCB SANGHO PM-001 SW-008. |
| 8611 | Close to star100 hardware, but with 5x DSW banks. |
| 8612 | |
| 8613 | 27C020 socket place for OKI samples is blind. |
| 8614 | |
| 8615 | */ |
| 8616 | ROM_START( crazybon ) |
| 8617 | ROM_REGION( 0x80000, "maincpu", 0 ) |
| 8618 | ROM_LOAD( "crazy_14_030418.bin", 0x00000, 0x10000, CRC(0071fb2a) SHA1(771b9b2b9fdf11dafc5ec0dbababc181d2ce4c75) ) |
| 8619 | |
| 8620 | ROM_REGION( 0x80000, "gfx1", 0 ) |
| 8621 | ROM_LOAD( "crazy_h3.bin", 0x00000, 0x20000, CRC(6b3692b5) SHA1(ffdcd4e59d7c009fd76a65e8f87642da35f996f4) ) |
| 8622 | |
| 8623 | ROM_REGION( 0x80000, "gfx2", 0 ) |
| 8624 | ROM_LOAD( "crazy_j3.bin", 0x00000, 0x20000, CRC(e375cd4b) SHA1(68888126ff9743cd589f3426205231bc3a896588) ) |
| 8625 | |
| 8626 | ROM_REGION( 0x40000, "oki", 0 ) /* Audio ADPCM */ |
| 8627 | ROM_LOAD( "27c020.bin", 0x0000, 0x20000, NO_DUMP ) |
| 8628 | ROM_END |
| 8629 | |
| 8630 | |
| 8631 | /* |
| 8632 | |
| 7817 | 8633 | Cherry I Gold |
| 7818 | 8634 | |
| 7819 | 8635 | Anno 1998 |
| r30785 | r30786 | |
| 11852 | 12668 | Board similar to Mega Lines, but with slightly |
| 11853 | 12669 | different layout and some extra additions... |
| 11854 | 12670 | |
| 11855 | | CPU: 1x Z80 |
| 11856 | | MCU: 1x M80C51F-711 Intel'80/OKI'83 (CMOS 8-Bit Microcontroller). |
| 12671 | CPU: 1x Z80 @ 6MHz. (measured) |
| 12672 | MCU: 1x M80C51F-711 (8-Bit Microcontroller) @ 12MHz. (measured). |
| 11857 | 12673 | |
| 11858 | | Sound: 4x SN76489. |
| 12674 | Sound: 4x SN76489 @ 3MHz. (measured). |
| 11859 | 12675 | |
| 11860 | 12676 | ROMs: 1x 27C512 for program. |
| 11861 | 12677 | 2x 27C512 for fg graphics. |
| r30785 | r30786 | |
| 11867 | 12683 | |
| 11868 | 12684 | |
| 11869 | 12685 | Other: 1x DIP-40 custom IC silkscreened '06B30P' (I/O?). |
| 11870 | | 1x DIP-28 custom IC silkscreened '06B49P' (clock divider). |
| 12686 | 1x DIP-28 custom IC silkscreened '06B49P' (clock divider, measured). |
| 11871 | 12687 | 2x DIP-28 custom IC silkscreened '06B53P' (video). |
| 11872 | 12688 | 1x 3.6V lithium battery. |
| 11873 | 12689 | 5x 8 DIP switches banks. |
| r30785 | r30786 | |
| 11898 | 12714 | ROM_LOAD( "3.1m", 0x00000, 0x10000, CRC(2acac012) SHA1(59d879214c4e473fa6fedb4a08dcd9b3c6a881a3) ) |
| 11899 | 12715 | ROM_LOAD( "4.1p", 0x10000, 0x10000, CRC(530bdec2) SHA1(2ce0993386fe6b165363a053b54fc66d8bf385d7) ) |
| 11900 | 12716 | |
| 11901 | | ROM_REGION( 0x200, "proms", 0 ) |
| 11902 | | ROM_LOAD( "u4.bin", 0x0000, 0x0100, BAD_DUMP CRC(23e81049) SHA1(78071dae70fad870e972d944642fb3a2374be5e4) ) |
| 11903 | | ROM_LOAD( "u5.bin", 0x0100, 0x0100, BAD_DUMP CRC(526cf9d3) SHA1(eb779d70f2507d0f26d225ac8f5de8f2243599ca) ) |
| 12717 | ROM_REGION( 0x300, "proms", 0 ) |
| 12718 | ROM_LOAD( "tbp24s10.3e", 0x0000, 0x0100, CRC(f8d160c5) SHA1(a3cb9c4337f4f030d62e74ccc882052959b1fa4f) ) |
| 12719 | ROM_LOAD( "tbp24s10.3f", 0x0100, 0x0100, CRC(bbc03eb2) SHA1(c0e44df0ec8268344f59965e3b9d62a4dca2ebb2) ) |
| 12720 | ROM_LOAD( "tbp24s10.3h", 0x0200, 0x0100, CRC(77b2585d) SHA1(898302f9a0bd8e354794087461f8f1103bb63783) ) |
| 11904 | 12721 | |
| 11905 | | ROM_REGION( 0x40, "proms2", 0 ) |
| 11906 | | ROM_LOAD( "u2.bin", 0x0000, 0x0020, BAD_DUMP CRC(c6b41352) SHA1(d7c3b5aa32e4e456c9432a13bede1db6d62eb270) ) |
| 12722 | ROM_REGION( 0x300, "proms2", 0 ) |
| 12723 | ROM_LOAD( "tbp24s10.4e", 0x0000, 0x0100, CRC(06fa2649) SHA1(b2f17d37826317ccad19d535cd5afeedb143778b) ) |
| 12724 | ROM_LOAD( "tbp24s10.4f", 0x0100, 0x0100, CRC(38000593) SHA1(e0113590cb2dc338d61ae2e7e92b1046c5c2d19f) ) |
| 12725 | ROM_LOAD( "tbp24s10.4h", 0x0200, 0x0100, CRC(cbf0062d) SHA1(f49dfca34d2eb86b5ff16872fab23d3e3a10be9a) ) |
| 11907 | 12726 | |
| 11908 | | ROM_REGION( 0x100, "unkprom", 0 ) |
| 11909 | | ROM_LOAD( "u3.bin", 0x0000, 0x0100, BAD_DUMP CRC(1d668d4a) SHA1(459117f78323ea264d3a29f1da2889bbabe9e4be) ) |
| 12727 | ROM_END |
| 11910 | 12728 | |
| 11911 | | ROM_REGION( 0x20, "unkprom2", 0 ) |
| 11912 | | ROM_LOAD( "u1.bin", 0x0000, 0x0020, BAD_DUMP CRC(6df3f972) SHA1(0096a7f7452b70cac6c0752cb62e24b643015b5c) ) |
| 11913 | 12729 | |
| 11914 | | ROM_END |
| 11915 | | |
| 11916 | 12730 | /* |
| 11917 | 12731 | Win Cherry (ver 0.16 - 19990219) |
| 11918 | 12732 | |
| r30785 | r30786 | |
| 12672 | 13486 | GAME( 199?, goldfrui, goldstar, goldfrui, goldstar, driver_device, 0, ROT0, "bootleg", "Gold Fruit", 0 ) // maybe fullname should be 'Gold Fruit (main 40%)' |
| 12673 | 13487 | GAME( 2001, super9, goldstar, super9, goldstar, goldstar_state, super9, ROT0, "Playmark", "Super Nove (Playmark)", GAME_NOT_WORKING) // need to decode gfx and see the program loops/reset... |
| 12674 | 13488 | GAME( 2001, wcherry, 0, wcherry, chrygld, goldstar_state, wcherry, ROT0, "bootleg", "Win Cherry (ver 0.16 - 19990219)", GAME_NOT_WORKING) |
| 13489 | GAME( 199?, star100, 0, star100, star100, driver_device, 0, ROT0, "Sang Ho", "Star 100", GAME_IMPERFECT_COLORS ) |
| 13490 | GAME( 1997, crazybon, 0, star100, crazybon, driver_device, 0, ROT0, "Sang Ho", "Crazy Bonus 2000", GAME_NOT_WORKING) |
| 12675 | 13491 | |
| 12676 | 13492 | |
| 12677 | 13493 | // are these really dyna, or bootlegs? |