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r30773 Monday 2nd June, 2014 at 13:42:24 UTC by David Haywood
confirm kenseim dipswitch ports by looking at code (nw)
[src/mame/drivers]kenseim.c

trunk/src/mame/drivers/kenseim.c
r30772r30773
4545   DECLARE_READ16_MEMBER(kensei_dsw_r);
4646   DECLARE_DRIVER_INIT(kenseim);
4747
48   DECLARE_READ8_MEMBER(porta_default_r) { logerror("%s read port A but no handler assigned\n", machine().describe_context()); return 0x00; }
49   DECLARE_READ8_MEMBER(portb_default_r) { logerror("%s read port B but no handler assigned\n", machine().describe_context()); return 0x00; }
48   // certain
49
50   DECLARE_READ8_MEMBER(porta_r); // dsw1
51   DECLARE_READ8_MEMBER(portb_r); // dsw2
52
53   DECLARE_WRITE8_MEMBER(i8255_portc_w); // 20x LEDs
54
55   // uncertain
56
5057//   DECLARE_READ8_MEMBER(portc_default_r) { logerror("%s read port C but no handler assigned\n", machine().describe_context()); return 0xff; }
5158   DECLARE_READ8_MEMBER(portc_r);
5259//   DECLARE_READ8_MEMBER(portd_default_r) { logerror("%s read port D but no handler assigned\n", machine().describe_context()); return 0xff; }
r30772r30773
5562
5663   DECLARE_WRITE8_MEMBER(porta_default_w) { logerror("%s write %02x to port A but no handler assigned\n", machine().describe_context(), data); }
5764   DECLARE_WRITE8_MEMBER(portb_default_w) { logerror("%s write %02x to port B but no handler assigned\n", machine().describe_context(), data); }
58   DECLARE_WRITE8_MEMBER(portc_default_w) { logerror("%s write %02x to port C but no handler assigned\n", machine().describe_context(), data); }
59   DECLARE_WRITE8_MEMBER(portd_default_w) { logerror("%s write %02x to port D but no handler assigned\n", machine().describe_context(), data); }
65//   DECLARE_WRITE8_MEMBER(portc_default_w) { logerror("%s write %02x to port C but no handler assigned\n", machine().describe_context(), data); }
66   DECLARE_WRITE8_MEMBER(portc_w);
67//   DECLARE_WRITE8_MEMBER(portd_default_w) { logerror("%s write %02x to port D but no handler assigned\n", machine().describe_context(), data); }
68   DECLARE_WRITE8_MEMBER(portd_w);
6069   DECLARE_WRITE8_MEMBER(porte_default_w) { logerror("%s write %02x to port E but no handler assigned\n", machine().describe_context(), data); }
6170
6271   DECLARE_READ8_MEMBER(i8255_porta_default_r) { logerror("%s i8255 read port A but no handler assigned\n", machine().describe_context()); return 0xff; }
r30772r30773
6574
6675   DECLARE_WRITE8_MEMBER(i8255_porta_default_w) { logerror("%s i8255 write %02x to port A but no handler assigned\n", machine().describe_context(), data); } // maybe molesa output? (6-bits?)
6776   DECLARE_WRITE8_MEMBER(i8255_portb_default_w) { logerror("%s i8255 write %02x to port B but no handler assigned\n", machine().describe_context(), data); } // maybe molesb output? (6-bits?)
68//   DECLARE_WRITE8_MEMBER(i8255_portc_default_w) { logerror("%s i8255 write %02x to port C but no handler assigned\n", machine().describe_context(), data); } // leds??
69   DECLARE_WRITE8_MEMBER(i8255_portc_w);
7077
7178   DECLARE_READ8_MEMBER(i8255_portd_default_r) { logerror("%s i8255 read port D but no handler assigned\n", machine().describe_context()); return 0xff; }
7279   DECLARE_READ8_MEMBER(i8255_porte_default_r) { logerror("%s i8255 read port E but no handler assigned\n", machine().describe_context()); return 0xff; }
r30772r30773
9299// could be wrong
93100WRITE8_MEMBER(kenseim_state::i8255_portc_w)
94101{
95   // I'm guessing these are the 20 'power meter' LEDs, 10 for each player? (it writes 42 tiles, with the last write being some terminator?)
102   // I'm guessing these are the 20 'power meter' LEDs, 10 for each player? (it writes 42 times, with the last write being some terminator?)
96103
97104//   printf("%s i8255 write %02x to port C but no handler assigned (serial data?)\n", machine().describe_context(), data);
98105
r30772r30773
127134
128135}
129136
137WRITE8_MEMBER(kenseim_state::portc_w)
138{
139   logerror("%s write %02x to port C\n", machine().describe_context(), data);
140}
130141
142WRITE8_MEMBER(kenseim_state::portd_w)
143{
144   logerror("%s write %02x to port D\n", machine().describe_context(), data);
145}
146
147
148
131149READ8_MEMBER(kenseim_state::portd_r)
132150{
133151   // comms port maybe? checks for 0x10 (bit 4,a) to be clear in a tight loop (092B) then for bit 0x80 to be set in another tight loop  (0933) then at (0947) it checks that bits 0xe0 aren't set.
134152   logerror("%s read port D\n", machine().describe_context());
135   return 0x00;// rand();// 0x80;
153   return rand();// rand();// 0x80;
136154}
137155
138156READ8_MEMBER(kenseim_state::portc_r)
r30772r30773
140158   // bits 0x09 checked at 1171
141159   logerror("%s read port C\n", machine().describe_context());
142160
143   return 0x00;//
161   return rand();//
144162   //return 0x09;// rand();
145163}
146164
165READ8_MEMBER(kenseim_state::porta_r)
166{
167   return ioport("DSW1")->read(); // confirmed by code
168}
147169
170READ8_MEMBER(kenseim_state::portb_r)
171{
172   return ioport("DSW2")->read(); // confirmed by code
173}
174
175
148176READ16_MEMBER(kenseim_state::cps1_kensei_r)
149177{
150178   //
r30772r30773
326354   MCFG_CPU_IO_MAP(kenseim_io_map)
327355   MCFG_TMPZ84C011_PORTA_WRITE_CALLBACK(WRITE8(kenseim_state, porta_default_w))
328356   MCFG_TMPZ84C011_PORTB_WRITE_CALLBACK(WRITE8(kenseim_state, portb_default_w))
329   MCFG_TMPZ84C011_PORTC_WRITE_CALLBACK(WRITE8(kenseim_state, portc_default_w))
330   MCFG_TMPZ84C011_PORTD_WRITE_CALLBACK(WRITE8(kenseim_state, portd_default_w))
357   MCFG_TMPZ84C011_PORTC_WRITE_CALLBACK(WRITE8(kenseim_state, portc_w))
358   MCFG_TMPZ84C011_PORTD_WRITE_CALLBACK(WRITE8(kenseim_state, portd_w))
331359   MCFG_TMPZ84C011_PORTE_WRITE_CALLBACK(WRITE8(kenseim_state, porte_default_w))   
332   MCFG_TMPZ84C011_PORTA_READ_CALLBACK(READ8(kenseim_state, porta_default_r))
333   MCFG_TMPZ84C011_PORTB_READ_CALLBACK(READ8(kenseim_state, portb_default_r))
360   MCFG_TMPZ84C011_PORTA_READ_CALLBACK(READ8(kenseim_state, porta_r))
361   MCFG_TMPZ84C011_PORTB_READ_CALLBACK(READ8(kenseim_state, portb_r))
334362   MCFG_TMPZ84C011_PORTC_READ_CALLBACK(READ8(kenseim_state, portc_r))
335363   MCFG_TMPZ84C011_PORTD_READ_CALLBACK(READ8(kenseim_state, portd_r))
336364   MCFG_TMPZ84C011_PORTE_READ_CALLBACK(READ8(kenseim_state, porte_default_r))
r30772r30773
408436
409437   // the extra board has 2 dip banks used for most game options
410438   PORT_START("DSW1")
411   PORT_DIPUNKNOWN( 0x01, 0x01 )
412   PORT_DIPUNKNOWN( 0x02, 0x02 )
413   PORT_DIPUNKNOWN( 0x04, 0x04 )
414   PORT_DIPUNKNOWN( 0x08, 0x08 )
415   PORT_DIPUNKNOWN( 0x10, 0x10 )
416   PORT_DIPUNKNOWN( 0x20, 0x20 )
417   PORT_DIPUNKNOWN( 0x40, 0x40 )
418   PORT_DIPUNKNOWN( 0x80, 0x80 )
439   PORT_DIPNAME( 0x03, 0x00, "Coinage" )                            PORT_DIPLOCATION("DRV SW(1):1,2")
440   PORT_DIPSETTING(    0x00, "0" )
441   PORT_DIPSETTING(    0x01, "1" )
442   PORT_DIPSETTING(    0x02, "2" )
443   PORT_DIPSETTING(    0x03, "3" )
444   PORT_DIPNAME( 0x0c, 0x00, "Head Appear Once Ratio" )             PORT_DIPLOCATION("DRV SW(1):3,4")
445   PORT_DIPSETTING(    0x00, "0" )
446   PORT_DIPSETTING(    0x04, "1" )
447   PORT_DIPSETTING(    0x08, "2" )
448   PORT_DIPSETTING(    0x0c, "3" )
449   PORT_DIPNAME( 0x30, 0x00, "Strength of Computer" )               PORT_DIPLOCATION("DRV SW(1):5,6")
450   PORT_DIPSETTING(    0x00, "0" )
451   PORT_DIPSETTING(    0x10, "1" )
452   PORT_DIPSETTING(    0x20, "2" )
453   PORT_DIPSETTING(    0x30, "3" )
454   PORT_DIPNAME( 0x40, 0x00, "Game Time" )                          PORT_DIPLOCATION("DRV SW(1):7")
455   PORT_DIPSETTING(    0x00, "0" )
456   PORT_DIPSETTING(    0x40, "1" )
457   PORT_DIPNAME( 0x80, 0x00, "VS Bison" )                           PORT_DIPLOCATION("DRV SW(1):8")
458   PORT_DIPSETTING(    0x00, "0" )
459   PORT_DIPSETTING(    0x80, "1" )
419460
420461   PORT_START("DSW2")
421   PORT_DIPUNUSED( 0x01, 0x01 )
422   PORT_DIPUNUSED( 0x02, 0x02 )
423   PORT_DIPUNUSED( 0x04, 0x04 )
424   PORT_DIPUNUSED( 0x08, 0x08 )
425   PORT_DIPUNUSED( 0x10, 0x10 )
426   PORT_DIPUNUSED( 0x20, 0x20 )
427   PORT_DIPUNUSED( 0x40, 0x40 )
428   PORT_DIPUNUSED( 0x80, 0x80 )
462   PORT_DIPNAME( 0x01, 0x00, "Unknown 1 (1-bit)" )                           PORT_DIPLOCATION("DRV SW(2):1")  // manual lists unused, but see code at  0x0E9E
463   PORT_DIPSETTING(    0x00, "0" )
464   PORT_DIPSETTING(    0x01, "1" )
465   PORT_DIPNAME( 0x06, 0x00, "Unknown 2 (2-bit)" )                           PORT_DIPLOCATION("DRV SW(2):2,3")  // ^^
466   PORT_DIPSETTING(    0x00, "0" )
467   PORT_DIPSETTING(    0x02, "1" )
468   PORT_DIPSETTING(    0x04, "2" )
469   PORT_DIPSETTING(    0x06, "3" )
470   PORT_DIPNAME( 0x18, 0x00, "Unknown 3 (2-bit)" )                           PORT_DIPLOCATION("DRV SW(2):4,5")  // ^^
471   PORT_DIPSETTING(    0x00, "0" )
472   PORT_DIPSETTING(    0x08, "1" )
473   PORT_DIPSETTING(    0x10, "2" )
474   PORT_DIPSETTING(    0x18, "3" )
475   PORT_DIPUNUSED( 0x20, 0x20 )                                      PORT_DIPLOCATION("DRV SW(2):6") // appears unused
476   PORT_DIPUNUSED( 0x40, 0x40 )                                      PORT_DIPLOCATION("DRV SW(2):7") // apeears unused
477   PORT_DIPNAME( 0x80, 0x00, "Test Mode" )                           PORT_DIPLOCATION("DRV SW(2):8")
478   PORT_DIPSETTING(    0x00, "0" )
479   PORT_DIPSETTING(    0x80, "1" )
429480INPUT_PORTS_END
430481
431482ROM_START( kenseim )

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