trunk/src/mame/drivers/kenseim.c
| r30742 | r30743 | |
| 28 | 28 | |
| 29 | 29 | #include "emu.h" |
| 30 | 30 | #include "cpu/z80/z80.h" |
| 31 | #include "machine/z80ctc.h" |
| 31 | 32 | #include "includes/cps1.h" |
| 32 | 33 | |
| 33 | 34 | class kenseim_state : public cps_state |
| r30742 | r30743 | |
| 39 | 40 | /* kenseim */ |
| 40 | 41 | DECLARE_READ16_MEMBER(cps1_kensei_r); |
| 41 | 42 | DECLARE_DRIVER_INIT(kenseim); |
| 43 | |
| 44 | DECLARE_READ8_MEMBER(porta_default_r) { logerror("%s read port A but no handler assigned\n", machine().describe_context()); return 0xff; } |
| 45 | DECLARE_READ8_MEMBER(portb_default_r) { logerror("%s read port B but no handler assigned\n", machine().describe_context()); return 0xff; } |
| 46 | DECLARE_READ8_MEMBER(portc_default_r) { logerror("%s read port C but no handler assigned\n", machine().describe_context()); return 0xff; } |
| 47 | DECLARE_READ8_MEMBER(portd_default_r) { logerror("%s read port D but no handler assigned\n", machine().describe_context()); return 0xff; } |
| 48 | DECLARE_READ8_MEMBER(porte_default_r) { logerror("%s read port E but no handler assigned\n", machine().describe_context()); return 0xff; } |
| 49 | |
| 50 | DECLARE_WRITE8_MEMBER(porta_default_w) { logerror("%s write %02x to port A but no handler assigned\n", machine().describe_context(), data); } |
| 51 | DECLARE_WRITE8_MEMBER(portb_default_w) { logerror("%s write %02x to port B but no handler assigned\n", machine().describe_context(), data); } |
| 52 | DECLARE_WRITE8_MEMBER(portc_default_w) { logerror("%s write %02x to port C but no handler assigned\n", machine().describe_context(), data); } |
| 53 | DECLARE_WRITE8_MEMBER(portd_default_w) { logerror("%s write %02x to port D but no handler assigned\n", machine().describe_context(), data); } |
| 54 | DECLARE_WRITE8_MEMBER(porte_default_w) { logerror("%s write %02x to port E but no handler assigned\n", machine().describe_context(), data); } |
| 55 | |
| 42 | 56 | }; |
| 43 | 57 | |
| 44 | 58 | |
| 59 | |
| 60 | |
| 45 | 61 | READ16_MEMBER(kenseim_state::cps1_kensei_r) |
| 46 | 62 | { |
| 47 | 63 | return rand(); |
| r30742 | r30743 | |
| 127 | 143 | |
| 128 | 144 | static ADDRESS_MAP_START( kenseim_io_map, AS_IO, 8, kenseim_state ) |
| 129 | 145 | ADDRESS_MAP_GLOBAL_MASK(0xff) |
| 130 | | |
| 131 | | // tmpz84c011 |
| 132 | | // AM_RANGE(0x50, 0x50) AM_READWRITE(tmpz84c011_0_pa_r,tmpz84c011_0_pa_w) |
| 133 | | // AM_RANGE(0x51, 0x51) AM_READWRITE(tmpz84c011_0_pb_r,tmpz84c011_0_pb_w) |
| 134 | | // AM_RANGE(0x52, 0x52) AM_READWRITE(tmpz84c011_0_pc_r,tmpz84c011_0_pc_w) |
| 135 | | // AM_RANGE(0x30, 0x30) AM_READWRITE(tmpz84c011_0_pd_r,tmpz84c011_0_pd_w) |
| 136 | | // AM_RANGE(0x40, 0x40) AM_READWRITE(tmpz84c011_0_pe_r,tmpz84c011_0_pe_w) |
| 137 | | // AM_RANGE(0x54, 0x54) AM_READWRITE(tmpz84c011_0_dir_pa_r,tmpz84c011_0_dir_pa_w) |
| 138 | | // AM_RANGE(0x55, 0x55) AM_READWRITE(tmpz84c011_0_dir_pb_r,tmpz84c011_0_dir_pb_w) |
| 139 | | // AM_RANGE(0x56, 0x56) AM_READWRITE(tmpz84c011_0_dir_pc_r,tmpz84c011_0_dir_pc_w) |
| 140 | | // AM_RANGE(0x34, 0x34) AM_READWRITE(tmpz84c011_0_dir_pd_r,tmpz84c011_0_dir_pd_w) |
| 141 | | // AM_RANGE(0x44, 0x44) AM_READWRITE(tmpz84c011_0_dir_pe_r,tmpz84c011_0_dir_pe_w) |
| 146 | AM_RANGE(0x10, 0x13) AM_DEVREADWRITE("gamecpu_ctc", z80ctc_device, read, write) |
| 142 | 147 | ADDRESS_MAP_END |
| 143 | 148 | |
| 144 | 149 | |
| 150 | static const z80_daisy_config daisy_chain_gamecpu[] = |
| 151 | { |
| 152 | { "gamecpu_ctc" }, |
| 153 | { NULL } |
| 154 | }; |
| 155 | |
| 156 | |
| 145 | 157 | static MACHINE_CONFIG_DERIVED_CLASS( kenseim, cps1_12MHz, kenseim_state ) |
| 146 | 158 | |
| 147 | | MCFG_CPU_ADD("gamecpu", TMPZ84C011, XTAL_16MHz) // tmpz84c011 - divider unknown |
| 159 | MCFG_CPU_ADD("gamecpu", TMPZ84C011, XTAL_16MHz/2) // tmpz84c011 - divider unknown |
| 148 | 160 | MCFG_CPU_PROGRAM_MAP(kenseim_map) |
| 149 | 161 | MCFG_CPU_IO_MAP(kenseim_io_map) |
| 162 | MCFG_TMPZ84C011_PORTA_WRITE_CALLBACK(WRITE8(kenseim_state, porta_default_w)) |
| 163 | MCFG_TMPZ84C011_PORTB_WRITE_CALLBACK(WRITE8(kenseim_state, portb_default_w)) |
| 164 | MCFG_TMPZ84C011_PORTC_WRITE_CALLBACK(WRITE8(kenseim_state, portc_default_w)) |
| 165 | MCFG_TMPZ84C011_PORTD_WRITE_CALLBACK(WRITE8(kenseim_state, portd_default_w)) |
| 166 | MCFG_TMPZ84C011_PORTE_WRITE_CALLBACK(WRITE8(kenseim_state, porte_default_w)) |
| 167 | MCFG_TMPZ84C011_PORTA_READ_CALLBACK(READ8(kenseim_state, porta_default_r)) |
| 168 | MCFG_TMPZ84C011_PORTB_READ_CALLBACK(READ8(kenseim_state, portb_default_r)) |
| 169 | MCFG_TMPZ84C011_PORTC_READ_CALLBACK(READ8(kenseim_state, portc_default_r)) |
| 170 | MCFG_TMPZ84C011_PORTD_READ_CALLBACK(READ8(kenseim_state, portd_default_r)) |
| 171 | MCFG_TMPZ84C011_PORTE_READ_CALLBACK(READ8(kenseim_state, porte_default_r)) |
| 172 | MCFG_CPU_CONFIG(daisy_chain_gamecpu) |
| 173 | |
| 174 | MCFG_DEVICE_ADD("gamecpu_ctc", Z80CTC, XTAL_16MHz/2 ) // part of the tmpz84? |
| 175 | MCFG_Z80CTC_INTR_CB(INPUTLINE("gamecpu", INPUT_LINE_IRQ0)) |
| 176 | |
| 150 | 177 | MACHINE_CONFIG_END |
| 151 | 178 | |
| 152 | 179 | static INPUT_PORTS_START( kenseim ) |