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r30736 Saturday 31st May, 2014 at 10:41:12 UTC by David Haywood
nbmj9195.c now uses the TMZ84C011 core with callbacks (nw)

[src/mame/drivers]	nbmj9195.c
[src/mame/includes]	nbmj9195.h

trunk/src/mame/includes/nbmj9195.h

r30735	r30736
28	28	int m_mscoutm_inputport;
29	29	UINT8 *m_nvram;
30	30	size_t m_nvram_size;
31		UINT8 m_pio_dir[5 * 2];
32		UINT8 m_pio_latch[5 * 2];
	31
33	32	int m_scrollx[VRAM_MAX];
34	33	int m_scrolly[VRAM_MAX];
35	34	int m_scrollx_raster[VRAM_MAX][SCANLINE_MAX];
r30735	r30736
65	64	DECLARE_WRITE8_MEMBER(nbmj9195_inputportsel_w);
66	65	DECLARE_READ8_MEMBER(mscoutm_dipsw_0_r);
67	66	DECLARE_READ8_MEMBER(mscoutm_dipsw_1_r);
68		DECLARE_READ8_MEMBER(tmpz84c011_pio_r);
69		DECLARE_WRITE8_MEMBER(tmpz84c011_pio_w);
70		DECLARE_READ8_MEMBER(tmpz84c011_0_pa_r);
71		DECLARE_READ8_MEMBER(tmpz84c011_0_pb_r);
72		DECLARE_READ8_MEMBER(tmpz84c011_0_pc_r);
73		DECLARE_READ8_MEMBER(tmpz84c011_0_pd_r);
74		DECLARE_READ8_MEMBER(tmpz84c011_0_pe_r);
75		DECLARE_WRITE8_MEMBER(tmpz84c011_0_pa_w);
76		DECLARE_WRITE8_MEMBER(tmpz84c011_0_pb_w);
77		DECLARE_WRITE8_MEMBER(tmpz84c011_0_pc_w);
78		DECLARE_WRITE8_MEMBER(tmpz84c011_0_pd_w);
79		DECLARE_WRITE8_MEMBER(tmpz84c011_0_pe_w);
80		DECLARE_READ8_MEMBER(tmpz84c011_0_dir_pa_r);
81		DECLARE_READ8_MEMBER(tmpz84c011_0_dir_pb_r);
82		DECLARE_READ8_MEMBER(tmpz84c011_0_dir_pc_r);
83		DECLARE_READ8_MEMBER(tmpz84c011_0_dir_pd_r);
84		DECLARE_READ8_MEMBER(tmpz84c011_0_dir_pe_r);
85		DECLARE_WRITE8_MEMBER(tmpz84c011_0_dir_pa_w);
86		DECLARE_WRITE8_MEMBER(tmpz84c011_0_dir_pb_w);
87		DECLARE_WRITE8_MEMBER(tmpz84c011_0_dir_pc_w);
88		DECLARE_WRITE8_MEMBER(tmpz84c011_0_dir_pd_w);
89		DECLARE_WRITE8_MEMBER(tmpz84c011_0_dir_pe_w);
90		DECLARE_READ8_MEMBER(tmpz84c011_1_pa_r);
91		DECLARE_READ8_MEMBER(tmpz84c011_1_pb_r);
92		DECLARE_READ8_MEMBER(tmpz84c011_1_pc_r);
93		DECLARE_READ8_MEMBER(tmpz84c011_1_pd_r);
94		DECLARE_READ8_MEMBER(tmpz84c011_1_pe_r);
95		DECLARE_WRITE8_MEMBER(tmpz84c011_1_pa_w);
96		DECLARE_WRITE8_MEMBER(tmpz84c011_1_pb_w);
97		DECLARE_WRITE8_MEMBER(tmpz84c011_1_pc_w);
98		DECLARE_WRITE8_MEMBER(tmpz84c011_1_pd_w);
99		DECLARE_WRITE8_MEMBER(tmpz84c011_1_pe_w);
100		DECLARE_READ8_MEMBER(tmpz84c011_1_dir_pa_r);
101		DECLARE_READ8_MEMBER(tmpz84c011_1_dir_pb_r);
102		DECLARE_READ8_MEMBER(tmpz84c011_1_dir_pc_r);
103		DECLARE_READ8_MEMBER(tmpz84c011_1_dir_pd_r);
104		DECLARE_READ8_MEMBER(tmpz84c011_1_dir_pe_r);
105		DECLARE_WRITE8_MEMBER(tmpz84c011_1_dir_pa_w);
106		DECLARE_WRITE8_MEMBER(tmpz84c011_1_dir_pb_w);
107		DECLARE_WRITE8_MEMBER(tmpz84c011_1_dir_pc_w);
108		DECLARE_WRITE8_MEMBER(tmpz84c011_1_dir_pd_w);
109		DECLARE_WRITE8_MEMBER(tmpz84c011_1_dir_pe_w);
	67
	68	DECLARE_READ8_MEMBER(mscoutm_cpu_porta_r);
	69	DECLARE_READ8_MEMBER(mscoutm_cpu_portb_r);
	70	DECLARE_READ8_MEMBER(mscoutm_cpu_portc_r);
	71	DECLARE_WRITE8_MEMBER(mscoutm_cpu_porta_w);
	72	DECLARE_WRITE8_MEMBER(mscoutm_cpu_portd_w);
	73	DECLARE_WRITE8_MEMBER(mscoutm_cpu_porte_w);
	74	DECLARE_READ8_MEMBER(others_cpu_porta_r);
	75	DECLARE_READ8_MEMBER(others_cpu_portb_r);
	76	DECLARE_READ8_MEMBER(others_cpu_portc_r);
	77	DECLARE_WRITE8_MEMBER(others_cpu_portc_w);
	78	DECLARE_WRITE8_MEMBER(others_cpu_portd_w);
	79	DECLARE_WRITE8_MEMBER(others_cpu_porte_w);
	80	DECLARE_READ8_MEMBER(soundcpu_portd_r);
	81	DECLARE_WRITE8_MEMBER(soundcpu_porta_w);
	82	DECLARE_WRITE8_MEMBER(soundcpu_dac1_w);
	83	DECLARE_WRITE8_MEMBER(soundcpu_dac2_w);
	84	DECLARE_WRITE8_MEMBER(mscoutm_soundcpu_portb_w);
	85	DECLARE_WRITE8_MEMBER(mscoutm_soundcpu_portc_w);
	86	DECLARE_WRITE8_MEMBER(soundcpu_porte_w);
	87
110	88	DECLARE_READ8_MEMBER(nbmj9195_palette_r);
111	89	DECLARE_WRITE8_MEMBER(nbmj9195_palette_w);
112	90	DECLARE_READ8_MEMBER(nbmj9195_nb22090_palette_r);

trunk/src/mame/drivers/nbmj9195.c

r30735	r30736
118	118
119	119	/* TMPZ84C011 PIO emulation */
120	120
121
122		READ8_MEMBER(nbmj9195_state::tmpz84c011_pio_r)
	121	// mscoutm, imekura, mjegolf
	122	READ8_MEMBER(nbmj9195_state::mscoutm_cpu_porta_r)
123	123	{
124		int portdata;
	124	// COIN IN, ETC...
	125	return  ioport("SYSTEM")->read();
	126	}
125	127
126		if ((!strcmp(machine().system().name, "mscoutm")) ||
127		(!strcmp(machine().system().name, "imekura")) ||
128		(!strcmp(machine().system().name, "mjegolf")))
	128	READ8_MEMBER(nbmj9195_state::mscoutm_cpu_portb_r)
	129	{
	130	// PLAYER1 KEY, DIPSW A/B
	131	switch (m_mscoutm_inputport)
129	132	{
130		switch (offset)
131		{
132		case 0:         /* PA_0 */
133		// COIN IN, ETC...
134		portdata = ioport("SYSTEM")->read();
135		break;
136		case 1:         /* PB_0 */
137		// PLAYER1 KEY, DIPSW A/B
138		switch (m_mscoutm_inputport)
139		{
140		case 0x01:
141		portdata = ioport("KEY0")->read();
142		break;
143		case 0x02:
144		portdata = ioport("KEY1")->read();
145		break;
146		case 0x04:
147		portdata = ioport("KEY2")->read();
148		break;
149		case 0x08:
150		portdata = ioport("KEY3")->read();
151		break;
152		case 0x10:
153		portdata = ioport("KEY4")->read();
154		break;
155		default:
156		portdata = (ioport("KEY0")->read() & ioport("KEY1")->read() & ioport("KEY2")->read()
157		& ioport("KEY3")->read() & ioport("KEY4")->read());
158		break;
159		}
160		break;
161		case 2:         /* PC_0 */
162		// PLAYER2 KEY
163		switch (m_mscoutm_inputport)
164		{
165		case 0x01:
166		portdata = ioport("KEY5")->read();
167		break;
168		case 0x02:
169		portdata = ioport("KEY6")->read();
170		break;
171		case 0x04:
172		portdata = ioport("KEY7")->read();
173		break;
174		case 0x08:
175		portdata = ioport("KEY8")->read();
176		break;
177		case 0x10:
178		portdata = ioport("KEY9")->read();
179		break;
180		default:
181		portdata = (ioport("KEY5")->read() & ioport("KEY6")->read() & ioport("KEY7")->read()
182		& ioport("KEY8")->read() & ioport("KEY9")->read());
183		break;
184		}
185		break;
186		case 3:         /* PD_0 */
187		portdata = 0xff;
188		break;
189		case 4:         /* PE_0 */
190		portdata = 0xff;
191		break;
192
193		case 5:         /* PA_1 */
194		portdata = 0xff;
195		break;
196		case 6:         /* PB_1 */
197		portdata = 0xff;
198		break;
199		case 7:         /* PC_1 */
200		portdata = 0xff;
201		break;
202		case 8:         /* PD_1 */
203		portdata = nbmj9195_sound_r(space, 0);
204		break;
205		case 9:         /* PE_1 */
206		portdata = 0xff;
207		break;
208
209		default:
210		logerror("%s: TMPZ84C011_PIO Unknown Port Read %02X\n", machine().describe_context(), offset);
211		portdata = 0xff;
212		break;
213		}
	133	case 0x01:
	134	return ioport("KEY0")->read();
	135	break;
	136	case 0x02:
	137	return ioport("KEY1")->read();
	138	break;
	139	case 0x04:
	140	return ioport("KEY2")->read();
	141	break;
	142	case 0x08:
	143	return ioport("KEY3")->read();
	144	break;
	145	case 0x10:
	146	return ioport("KEY4")->read();
	147	break;
	148	default:
	149	return (ioport("KEY0")->read() & ioport("KEY1")->read() & ioport("KEY2")->read()
	150	& ioport("KEY3")->read() & ioport("KEY4")->read());
	151	break;
214	152	}
215		else
216		{
217		switch (offset)
218		{
219		case 0:         /* PA_0 */
220		// COIN IN, ETC...
221		portdata = ((ioport("SYSTEM")->read() & 0xfe) | m_outcoin_flag);
222		break;
223		case 1:         /* PB_0 */
224		// PLAYER1 KEY, DIPSW A/B
225		switch (m_inputport)
226		{
227		case 0x01:
228		portdata = ioport("KEY0")->read();
229		break;
230		case 0x02:
231		portdata = ioport("KEY1")->read();
232		break;
233		case 0x04:
234		portdata = ioport("KEY2")->read();
235		break;
236		case 0x08:
237		portdata = ioport("KEY3")->read();
238		break;
239		case 0x10:
240		portdata = ((ioport("KEY4")->read() & 0x7f) | (nbmj9195_dipsw_r() << 7));
241		break;
242		default:
243		portdata = (ioport("KEY0")->read() & ioport("KEY1")->read() & ioport("KEY2")->read() & ioport("KEY3")->read() & (ioport("KEY4")->read() & 0x7f));
244		break;
245		}
246		break;
247		case 2:         /* PC_0 */
248		// PLAYER2 KEY
249		switch (m_inputport)
250		{
251		case 0x01:
252		portdata = ioport("KEY5")->read();
253		break;
254		case 0x02:
255		portdata = ioport("KEY6")->read();
256		break;
257		case 0x04:
258		portdata = ioport("KEY7")->read();
259		break;
260		case 0x08:
261		portdata = ioport("KEY8")->read();
262		break;
263		case 0x10:
264		portdata = ioport("KEY9")->read() & 0x7f;
265		break;
266		default:
267		portdata = (ioport("KEY5")->read() & ioport("KEY6")->read() & ioport("KEY7")->read() & ioport("KEY8")->read() & (ioport("KEY9")->read() & 0x7f));
268		break;
269		}
270		break;
271		case 3:         /* PD_0 */
272		portdata = 0xff;
273		break;
274		case 4:         /* PE_0 */
275		portdata = 0xff;
276		break;
277
278		case 5:         /* PA_1 */
279		portdata = 0xff;
280		break;
281		case 6:         /* PB_1 */
282		portdata = 0xff;
283		break;
284		case 7:         /* PC_1 */
285		portdata = 0xff;
286		break;
287		case 8:         /* PD_1 */
288		portdata = nbmj9195_sound_r(space, 0);
289		break;
290		case 9:         /* PE_1 */
291		portdata = 0xff;
292		break;
293
294		default:
295		logerror("%s: TMPZ84C011_PIO Unknown Port Read %02X\n", machine().describe_context(), offset);
296		portdata = 0xff;
297		break;
298		}
299		}
300
301		return portdata;
	153
	154	return 0xff;
302	155	}
303	156
304		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_pio_w)
	157	READ8_MEMBER(nbmj9195_state::mscoutm_cpu_portc_r)
305	158	{
306		if ((!strcmp(machine().system().name, "imekura")) ||
307		(!strcmp(machine().system().name, "mscoutm")) ||
308		(!strcmp(machine().system().name, "mjegolf")))
	159	// PLAYER2 KEY
	160	switch (m_mscoutm_inputport)
309	161	{
310		switch (offset)
311		{
312		case 0:         /* PA_0 */
313		mscoutm_inputportsel_w(data);    // NB22090
314		break;
315		case 1:         /* PB_0 */
316		break;
317		case 2:         /* PC_0 */
318		break;
319		case 3:         /* PD_0 */
320		nbmj9195_clutsel_w(data);
321		break;
322		case 4:         /* PE_0 */
323		nbmj9195_gfxflag2_w(data);       // NB22090
324		break;
325
326		case 5:         /* PA_1 */
327		nbmj9195_soundbank_w(space, 0, data);
328		break;
329		case 6:         /* PB_1 */
330		m_dac2->write_unsigned8(data);
331		break;
332		case 7:         /* PC_1 */
333		m_dac1->write_unsigned8(data);
334		break;
335		case 8:         /* PD_1 */
336		break;
337		case 9:         /* PE_1 */
338		if (!(data & 0x01)) nbmj9195_soundclr_w(space, 0, 0);
339		break;
340
341		default:
342		logerror("%s: TMPZ84C011_PIO Unknown Port Write %02X, %02X\n", machine().describe_context(), offset, data);
343		break;
344		}
	162	case 0x01:
	163	return ioport("KEY5")->read();
	164	break;
	165	case 0x02:
	166	return ioport("KEY6")->read();
	167	break;
	168	case 0x04:
	169	return ioport("KEY7")->read();
	170	break;
	171	case 0x08:
	172	return ioport("KEY8")->read();
	173	break;
	174	case 0x10:
	175	return ioport("KEY9")->read();
	176	break;
	177	default:
	178	return (ioport("KEY5")->read() & ioport("KEY6")->read() & ioport("KEY7")->read()
	179	& ioport("KEY8")->read() & ioport("KEY9")->read());
	180	break;
345	181	}
346		else
347		{
348		switch (offset)
349		{
350		case 0:         /* PA_0 */
351		break;
352		case 1:         /* PB_0 */
353		break;
354		case 2:         /* PC_0 */
355		nbmj9195_dipswbitsel_w(data);
356		break;
357		case 3:         /* PD_0 */
358		nbmj9195_clutsel_w(data);
359		break;
360		case 4:         /* PE_0 */
361		nbmj9195_outcoin_flag_w(data);
362		break;
363
364		case 5:         /* PA_1 */
365		nbmj9195_soundbank_w(space, 0, data);
366		break;
367		case 6:         /* PB_1 */
368		m_dac1->write_unsigned8(data);
369		break;
370		case 7:         /* PC_1 */
371		m_dac2->write_unsigned8(data);
372		break;
373		case 8:         /* PD_1 */
374		break;
375		case 9:         /* PE_1 */
376		if (!(data & 0x01)) nbmj9195_soundclr_w(space, 0, 0);
377		break;
378
379		default:
380		logerror("%s: TMPZ84C011_PIO Unknown Port Write %02X, %02X\n", machine().describe_context(), offset, data);
381		break;
382		}
383		}
	182	return 0xff;
384	183	}
385	184
386	185
387		/* CPU interface */
388	186
389		/* device 0 */
390		READ8_MEMBER(nbmj9195_state::tmpz84c011_0_pa_r)
	187	// mscoutm, imekura, mjegolf
	188	WRITE8_MEMBER(nbmj9195_state::mscoutm_cpu_porta_w)
391	189	{
392		return (tmpz84c011_pio_r(space,0) & ~m_pio_dir[0]) | (m_pio_latch[0] & m_pio_dir[0]);
	190	mscoutm_inputportsel_w(data);    // NB22090
393	191	}
394		READ8_MEMBER(nbmj9195_state::tmpz84c011_0_pb_r)
395		{
396		return (tmpz84c011_pio_r(space,1) & ~m_pio_dir[1]) | (m_pio_latch[1] & m_pio_dir[1]);
397		}
398	192
399		READ8_MEMBER(nbmj9195_state::tmpz84c011_0_pc_r)
	193	WRITE8_MEMBER(nbmj9195_state::mscoutm_cpu_portd_w)
400	194	{
401		return (tmpz84c011_pio_r(space,2) & ~m_pio_dir[2]) | (m_pio_latch[2] & m_pio_dir[2]);
	195	nbmj9195_clutsel_w(data);
402	196	}
403	197
404		READ8_MEMBER(nbmj9195_state::tmpz84c011_0_pd_r)
	198	WRITE8_MEMBER(nbmj9195_state::mscoutm_cpu_porte_w)
405	199	{
406		return (tmpz84c011_pio_r(space,3) & ~m_pio_dir[3]) | (m_pio_latch[3] & m_pio_dir[3]);
	200	nbmj9195_gfxflag2_w(data);      // NB22090
407	201	}
408	202
409		READ8_MEMBER(nbmj9195_state::tmpz84c011_0_pe_r)
410		{
411		return (tmpz84c011_pio_r(space,4) & ~m_pio_dir[4]) | (m_pio_latch[4] & m_pio_dir[4]);
412		}
	203	// other games
413	204
414
415		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_0_pa_w)
	205	READ8_MEMBER(nbmj9195_state::others_cpu_porta_r)
416	206	{
417		m_pio_latch[0] = data;
418		tmpz84c011_pio_w(space, 0, data);
	207	// COIN IN, ETC...
	208	return ((ioport("SYSTEM")->read() & 0xfe) | m_outcoin_flag);
419	209	}
420	210
421		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_0_pb_w)
	211	READ8_MEMBER(nbmj9195_state::others_cpu_portb_r)
422	212	{
423		m_pio_latch[1] = data;
424		tmpz84c011_pio_w(space, 1, data);
	213	// PLAYER1 KEY, DIPSW A/B
	214	switch (m_inputport)
	215	{
	216	case 0x01:
	217	return ioport("KEY0")->read();
	218	break;
	219	case 0x02:
	220	return ioport("KEY1")->read();
	221	break;
	222	case 0x04:
	223	return ioport("KEY2")->read();
	224	break;
	225	case 0x08:
	226	return ioport("KEY3")->read();
	227	break;
	228	case 0x10:
	229	return ((ioport("KEY4")->read() & 0x7f) | (nbmj9195_dipsw_r() << 7));
	230	break;
	231	default:
	232	return (ioport("KEY0")->read() & ioport("KEY1")->read() & ioport("KEY2")->read() & ioport("KEY3")->read() & (ioport("KEY4")->read() & 0x7f));
	233	break;
	234	}
	235	return 0xff;
425	236	}
426	237
427		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_0_pc_w)
	238	READ8_MEMBER(nbmj9195_state::others_cpu_portc_r)
428	239	{
429		m_pio_latch[2] = data;
430		tmpz84c011_pio_w(space, 2, data);
	240	// PLAYER2 KEY
	241	switch (m_inputport)
	242	{
	243	case 0x01:
	244	return ioport("KEY5")->read();
	245	break;
	246	case 0x02:
	247	return ioport("KEY6")->read();
	248	break;
	249	case 0x04:
	250	return ioport("KEY7")->read();
	251	break;
	252	case 0x08:
	253	return ioport("KEY8")->read();
	254	break;
	255	case 0x10:
	256	return ioport("KEY9")->read() & 0x7f;
	257	break;
	258	default:
	259	return (ioport("KEY5")->read() & ioport("KEY6")->read() & ioport("KEY7")->read() & ioport("KEY8")->read() & (ioport("KEY9")->read() & 0x7f));
	260	break;
	261	}
	262	return 0xff;;
431	263	}
432	264
433		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_0_pd_w)
434		{
435		m_pio_latch[3] = data;
436		tmpz84c011_pio_w(space, 3, data);
437		}
438	265
439		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_0_pe_w)
	266	WRITE8_MEMBER(nbmj9195_state::others_cpu_portc_w)
440	267	{
441		m_pio_latch[4] = data;
442		tmpz84c011_pio_w(space, 4, data);
	268	nbmj9195_dipswbitsel_w(data);
443	269	}
444	270
445
446		READ8_MEMBER(nbmj9195_state::tmpz84c011_0_dir_pa_r)
	271	WRITE8_MEMBER(nbmj9195_state::others_cpu_portd_w)
447	272	{
448		return m_pio_dir[0];
	273	nbmj9195_clutsel_w(data);
449	274	}
450	275
451		READ8_MEMBER(nbmj9195_state::tmpz84c011_0_dir_pb_r)
	276	WRITE8_MEMBER(nbmj9195_state::others_cpu_porte_w)
452	277	{
453		return m_pio_dir[1];
	278	nbmj9195_outcoin_flag_w(data);
454	279	}
455	280
456		READ8_MEMBER(nbmj9195_state::tmpz84c011_0_dir_pc_r)
457		{
458		return m_pio_dir[2];
459		}
460	281
461		READ8_MEMBER(nbmj9195_state::tmpz84c011_0_dir_pd_r)
462		{
463		return m_pio_dir[3];
464		}
	282	/* TMPZ84C011 sound CPU */
465	283
466		READ8_MEMBER(nbmj9195_state::tmpz84c011_0_dir_pe_r)
	284	READ8_MEMBER(nbmj9195_state::soundcpu_portd_r)
467	285	{
468		return m_pio_dir[4];
	286	return nbmj9195_sound_r(space, 0);
469	287	}
470	288
471
472		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_0_dir_pa_w)
	289	WRITE8_MEMBER(nbmj9195_state::soundcpu_porta_w)
473	290	{
474		m_pio_dir[0] = data;
	291	nbmj9195_soundbank_w(space, 0, data);
475	292	}
476	293
477		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_0_dir_pb_w)
	294	WRITE8_MEMBER(nbmj9195_state::soundcpu_dac1_w)
478	295	{
479		m_pio_dir[1] = data;
	296	m_dac1->write_unsigned8(data);
480	297	}
481	298
482		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_0_dir_pc_w)
	299	WRITE8_MEMBER(nbmj9195_state::soundcpu_dac2_w)
483	300	{
484		m_pio_dir[2] = data;
	301	m_dac2->write_unsigned8(data);
485	302	}
486	303
487		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_0_dir_pd_w)
	304	WRITE8_MEMBER(nbmj9195_state::mscoutm_soundcpu_portb_w)
488	305	{
489		m_pio_dir[3] = data;
	306	m_dac2->write_unsigned8(data);
490	307	}
491	308
492		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_0_dir_pe_w)
	309	WRITE8_MEMBER(nbmj9195_state::mscoutm_soundcpu_portc_w)
493	310	{
494		m_pio_dir[4] = data;
	311	m_dac1->write_unsigned8(data);
495	312	}
496	313
497	314
498		/* device 1 */
499		READ8_MEMBER(nbmj9195_state::tmpz84c011_1_pa_r)
	315	WRITE8_MEMBER(nbmj9195_state::soundcpu_porte_w)
500	316	{
501		return (tmpz84c011_pio_r(space,5) & ~m_pio_dir[5]) | (m_pio_latch[5] & m_pio_dir[5]);
	317	if (!(data & 0x01)) nbmj9195_soundclr_w(space, 0, 0);
502	318	}
503	319
504		READ8_MEMBER(nbmj9195_state::tmpz84c011_1_pb_r)
505		{
506		return (tmpz84c011_pio_r(space,6) & ~m_pio_dir[6]) | (m_pio_latch[6] & m_pio_dir[6]);
507		}
508	320
509		READ8_MEMBER(nbmj9195_state::tmpz84c011_1_pc_r)
510		{
511		return (tmpz84c011_pio_r(space,7) & ~m_pio_dir[7]) | (m_pio_latch[7] & m_pio_dir[7]);
512		}
513	321
514		READ8_MEMBER(nbmj9195_state::tmpz84c011_1_pd_r)
515		{
516		return (tmpz84c011_pio_r(space,8) & ~m_pio_dir[8]) | (m_pio_latch[8] & m_pio_dir[8]);
517		}
518	322
519		READ8_MEMBER(nbmj9195_state::tmpz84c011_1_pe_r)
520		{
521		return (tmpz84c011_pio_r(space,9) & ~m_pio_dir[9]) | (m_pio_latch[9] & m_pio_dir[9]);
522		}
523
524
525		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_1_pa_w)
526		{
527		m_pio_latch[5] = data;
528		tmpz84c011_pio_w(space, 5, data);
529		}
530
531		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_1_pb_w)
532		{
533		m_pio_latch[6] = data;
534		tmpz84c011_pio_w(space, 6, data);
535		}
536
537		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_1_pc_w)
538		{
539		m_pio_latch[7] = data;
540		tmpz84c011_pio_w(space, 7, data);
541		}
542
543		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_1_pd_w)
544		{
545		m_pio_latch[8] = data;
546		tmpz84c011_pio_w(space, 8, data);
547		}
548
549		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_1_pe_w)
550		{
551		m_pio_latch[9] = data;
552		tmpz84c011_pio_w(space, 9, data);
553		}
554
555
556		READ8_MEMBER(nbmj9195_state::tmpz84c011_1_dir_pa_r)
557		{
558		return m_pio_dir[5];
559		}
560
561		READ8_MEMBER(nbmj9195_state::tmpz84c011_1_dir_pb_r)
562		{
563		return m_pio_dir[6];
564		}
565
566		READ8_MEMBER(nbmj9195_state::tmpz84c011_1_dir_pc_r)
567		{
568		return m_pio_dir[7];
569		}
570
571		READ8_MEMBER(nbmj9195_state::tmpz84c011_1_dir_pd_r)
572		{
573		return m_pio_dir[8];
574		}
575
576		READ8_MEMBER(nbmj9195_state::tmpz84c011_1_dir_pe_r)
577		{
578		return m_pio_dir[9];
579		}
580
581
582		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_1_dir_pa_w)
583		{
584		m_pio_dir[5] = data;
585		}
586
587		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_1_dir_pb_w)
588		{
589		m_pio_dir[6] = data;
590		}
591
592		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_1_dir_pc_w)
593		{
594		m_pio_dir[7] = data;
595		}
596
597		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_1_dir_pd_w)
598		{
599		m_pio_dir[8] = data;
600		}
601
602		WRITE8_MEMBER(nbmj9195_state::tmpz84c011_1_dir_pe_w)
603		{
604		m_pio_dir[9] = data;
605		}
606
607	323	/* CTC of main cpu, ch0 trigger is vblank */
608	324	INTERRUPT_GEN_MEMBER(nbmj9195_state::ctc0_trg1)
609	325	{
r30735	r30736
614	330
615	331	void nbmj9195_state::machine_reset()
616	332	{
617		address_space &space = m_maincpu->space(AS_PROGRAM);
618		int i;
619
620		// initialize TMPZ84C011 PIO
621		for (i = 0; i < (5 * 2); i++)
622		{
623		m_pio_dir[i] = m_pio_latch[i] = 0;
624		tmpz84c011_pio_w(space, i, 0);
625		}
626	333	}
627	334
628	335	DRIVER_INIT_MEMBER(nbmj9195_state,nbmj9195)
r30735	r30736
640	347
641	348	static ADDRESS_MAP_START( tmpz84c011_regs, AS_IO, 8, nbmj9195_state )
642	349	AM_RANGE(0x10, 0x13) AM_DEVREADWRITE("main_ctc", z80ctc_device, read, write)
643		AM_RANGE(0x50, 0x50) AM_READWRITE(tmpz84c011_0_pa_r,tmpz84c011_0_pa_w)
644		AM_RANGE(0x51, 0x51) AM_READWRITE(tmpz84c011_0_pb_r,tmpz84c011_0_pb_w)
645		AM_RANGE(0x52, 0x52) AM_READWRITE(tmpz84c011_0_pc_r,tmpz84c011_0_pc_w)
646		AM_RANGE(0x30, 0x30) AM_READWRITE(tmpz84c011_0_pd_r,tmpz84c011_0_pd_w)
647		AM_RANGE(0x40, 0x40) AM_READWRITE(tmpz84c011_0_pe_r,tmpz84c011_0_pe_w)
648		AM_RANGE(0x54, 0x54) AM_READWRITE(tmpz84c011_0_dir_pa_r,tmpz84c011_0_dir_pa_w)
649		AM_RANGE(0x55, 0x55) AM_READWRITE(tmpz84c011_0_dir_pb_r,tmpz84c011_0_dir_pb_w)
650		AM_RANGE(0x56, 0x56) AM_READWRITE(tmpz84c011_0_dir_pc_r,tmpz84c011_0_dir_pc_w)
651		AM_RANGE(0x34, 0x34) AM_READWRITE(tmpz84c011_0_dir_pd_r,tmpz84c011_0_dir_pd_w)
652		AM_RANGE(0x44, 0x44) AM_READWRITE(tmpz84c011_0_dir_pe_r,tmpz84c011_0_dir_pe_w)
653	350	ADDRESS_MAP_END
654	351
655	352	static ADDRESS_MAP_START( sailorws_map, AS_PROGRAM, 8, nbmj9195_state )
r30735	r30736
1132	829	static ADDRESS_MAP_START( sailorws_sound_io_map, AS_IO, 8, nbmj9195_state )
1133	830	ADDRESS_MAP_GLOBAL_MASK(0xff)
1134	831	AM_RANGE(0x10, 0x13) AM_DEVREADWRITE("audio_ctc", z80ctc_device, read, write)
1135		AM_RANGE(0x50, 0x50) AM_READWRITE(tmpz84c011_1_pa_r,tmpz84c011_1_pa_w)
1136		AM_RANGE(0x51, 0x51) AM_READWRITE(tmpz84c011_1_pb_r,tmpz84c011_1_pb_w)
1137		AM_RANGE(0x52, 0x52) AM_READWRITE(tmpz84c011_1_pc_r,tmpz84c011_1_pc_w)
1138		AM_RANGE(0x30, 0x30) AM_READWRITE(tmpz84c011_1_pd_r,tmpz84c011_1_pd_w)
1139		AM_RANGE(0x40, 0x40) AM_READWRITE(tmpz84c011_1_pe_r,tmpz84c011_1_pe_w)
1140		AM_RANGE(0x54, 0x54) AM_READWRITE(tmpz84c011_1_dir_pa_r,tmpz84c011_1_dir_pa_w)
1141		AM_RANGE(0x55, 0x55) AM_READWRITE(tmpz84c011_1_dir_pb_r,tmpz84c011_1_dir_pb_w)
1142		AM_RANGE(0x56, 0x56) AM_READWRITE(tmpz84c011_1_dir_pc_r,tmpz84c011_1_dir_pc_w)
1143		AM_RANGE(0x34, 0x34) AM_READWRITE(tmpz84c011_1_dir_pd_r,tmpz84c011_1_dir_pd_w)
1144		AM_RANGE(0x44, 0x44) AM_READWRITE(tmpz84c011_1_dir_pe_r,tmpz84c011_1_dir_pe_w)
1145	832	AM_RANGE(0x80, 0x81) AM_DEVWRITE("ymsnd", ym3812_device, write)
1146	833	ADDRESS_MAP_END
1147	834
r30735	r30736
3136	2823	};
3137	2824
3138	2825
3139		static MACHINE_CONFIG_START( NBMJDRV1, nbmj9195_state )
	2826	// the only difference between these 2 setups is the DAC is swapped, is that intentional?
	2827	#define OTHERS_TMZ84C011_SOUND_PORTS \
	2828	MCFG_TMPZ84C011_PORTA_WRITE_CALLBACK(WRITE8(nbmj9195_state, soundcpu_porta_w)) \
	2829	MCFG_TMPZ84C011_PORTB_WRITE_CALLBACK(WRITE8(nbmj9195_state,soundcpu_dac1_w)) \
	2830	MCFG_TMPZ84C011_PORTC_WRITE_CALLBACK(WRITE8(nbmj9195_state,soundcpu_dac2_w)) \
	2831	MCFG_TMPZ84C011_PORTD_READ_CALLBACK(READ8(nbmj9195_state, soundcpu_portd_r)) \
	2832	MCFG_TMPZ84C011_PORTE_WRITE_CALLBACK(WRITE8(nbmj9195_state,soundcpu_porte_w)) \
3140	2833
	2834	#define MSCOUTM_TMZ84C011_SOUND_PORTS \
	2835	MCFG_TMPZ84C011_PORTA_WRITE_CALLBACK(WRITE8(nbmj9195_state, soundcpu_porta_w)) \
	2836	MCFG_TMPZ84C011_PORTB_WRITE_CALLBACK(WRITE8(nbmj9195_state,soundcpu_dac2_w)) \
	2837	MCFG_TMPZ84C011_PORTC_WRITE_CALLBACK(WRITE8(nbmj9195_state,soundcpu_dac1_w)) \
	2838	MCFG_TMPZ84C011_PORTD_READ_CALLBACK(READ8(nbmj9195_state, soundcpu_portd_r)) \
	2839	MCFG_TMPZ84C011_PORTE_WRITE_CALLBACK(WRITE8(nbmj9195_state,soundcpu_porte_w))
	2840
	2841
	2842	#define MSCOUTM_TMZ84C011_MAIN_PORTS \
	2843	MCFG_TMPZ84C011_PORTA_READ_CALLBACK(READ8(nbmj9195_state, mscoutm_cpu_porta_r)) \
	2844	MCFG_TMPZ84C011_PORTA_WRITE_CALLBACK(WRITE8(nbmj9195_state, mscoutm_cpu_porta_w)) \
	2845	MCFG_TMPZ84C011_PORTB_READ_CALLBACK(READ8(nbmj9195_state, mscoutm_cpu_portb_r)) \
	2846	MCFG_TMPZ84C011_PORTC_READ_CALLBACK(READ8(nbmj9195_state, mscoutm_cpu_portc_r)) \
	2847	MCFG_TMPZ84C011_PORTD_WRITE_CALLBACK(WRITE8(nbmj9195_state, mscoutm_cpu_portd_w)) \
	2848	MCFG_TMPZ84C011_PORTE_WRITE_CALLBACK(WRITE8(nbmj9195_state, mscoutm_cpu_porte_w)) \
	2849
	2850
	2851	#define OTHERS_TMZ84C011_MAIN_PORTS \
	2852	MCFG_TMPZ84C011_PORTA_READ_CALLBACK(READ8(nbmj9195_state, others_cpu_porta_r)) \
	2853	MCFG_TMPZ84C011_PORTB_READ_CALLBACK(READ8(nbmj9195_state, others_cpu_portb_r)) \
	2854	MCFG_TMPZ84C011_PORTC_READ_CALLBACK(READ8(nbmj9195_state, others_cpu_portc_r)) \
	2855	MCFG_TMPZ84C011_PORTC_WRITE_CALLBACK(WRITE8(nbmj9195_state, others_cpu_portc_w)) \
	2856	MCFG_TMPZ84C011_PORTD_WRITE_CALLBACK(WRITE8(nbmj9195_state, others_cpu_portd_w)) \
	2857	MCFG_TMPZ84C011_PORTE_WRITE_CALLBACK(WRITE8(nbmj9195_state, others_cpu_porte_w)) \
	2858
	2859
	2860	static MACHINE_CONFIG_START( NBMJDRV1_base, nbmj9195_state )
	2861
3141	2862	/* basic machine hardware */
3142		MCFG_CPU_ADD("maincpu", Z80, 12000000/2)        /* TMPZ84C011, 6.00 MHz */
	2863	MCFG_CPU_ADD("maincpu", TMPZ84C011, 12000000/2)        /* TMPZ84C011, 6.00 MHz */
3143	2864	MCFG_CPU_CONFIG(daisy_chain_main)
3144	2865	MCFG_CPU_PROGRAM_MAP(sailorws_map)
3145	2866	MCFG_CPU_IO_MAP(sailorws_io_map)
3146	2867	MCFG_CPU_VBLANK_INT_DRIVER("screen", nbmj9195_state,  ctc0_trg1)                /* vblank is connect to ctc triggfer */
3147	2868
3148		MCFG_CPU_ADD("audiocpu", Z80, 8000000)                  /* TMPZ84C011, 8.00 MHz */
	2869	MCFG_CPU_ADD("audiocpu", TMPZ84C011, 8000000)                  /* TMPZ84C011, 8.00 MHz */
3149	2870	MCFG_CPU_CONFIG(daisy_chain_sound)
3150	2871	MCFG_CPU_PROGRAM_MAP(sailorws_sound_map)
3151	2872	MCFG_CPU_IO_MAP(sailorws_sound_io_map)
r30735	r30736
3182	2903	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
3183	2904	MACHINE_CONFIG_END
3184	2905
	2906	static MACHINE_CONFIG_DERIVED( NBMJDRV1, NBMJDRV1_base )
3185	2907
3186		static MACHINE_CONFIG_DERIVED( NBMJDRV2, NBMJDRV1 )
	2908	/* basic machine hardware */
	2909	MCFG_CPU_MODIFY("maincpu")
	2910	OTHERS_TMZ84C011_MAIN_PORTS
3187	2911
	2912	MCFG_CPU_MODIFY("audiocpu")
	2913	OTHERS_TMZ84C011_SOUND_PORTS
	2914	MACHINE_CONFIG_END
	2915
	2916
	2917	static MACHINE_CONFIG_DERIVED( NBMJDRV2, NBMJDRV1_base )
	2918
3188	2919	/* basic machine hardware */
	2920	MCFG_CPU_MODIFY("maincpu")
	2921	OTHERS_TMZ84C011_MAIN_PORTS
3189	2922
	2923	MCFG_CPU_MODIFY("audiocpu")
	2924	OTHERS_TMZ84C011_SOUND_PORTS
	2925
3190	2926	/* video hardware */
3191	2927	MCFG_VIDEO_START_OVERRIDE(nbmj9195_state,nbmj9195_1layer)
3192	2928	MACHINE_CONFIG_END
3193	2929
3194	2930
3195		static MACHINE_CONFIG_DERIVED( NBMJDRV3, NBMJDRV1 )
	2931	static MACHINE_CONFIG_DERIVED( NBMJDRV3, NBMJDRV1_base )
3196	2932
3197	2933	/* basic machine hardware */
	2934	MCFG_CPU_MODIFY("maincpu")
	2935	MSCOUTM_TMZ84C011_MAIN_PORTS
3198	2936
	2937	MCFG_CPU_MODIFY("audiocpu")
	2938	MSCOUTM_TMZ84C011_SOUND_PORTS
	2939
3199	2940	/* video hardware */
3200	2941	MCFG_PALETTE_MODIFY("palette")
3201	2942	MCFG_PALETTE_ENTRIES(512)

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