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r30616 Friday 23rd May, 2014 at 07:39:36 UTC by smf
The official MIPS ABI doesn't have $ in front of the software names for the integer registers http://math-atlas.sourceforge.net/devel/assembly/007-2816-005.pdf & the debugger thinks you're entering a hex number when you're trying to use them. I've left the disassembler, but the official ABI doesn't use them in source either (the only supporting evidence I found for them is the Linux ABI). I also removed the space padding which hasn't had the intended effect since the new debugger was introduced. [smf]
[src/emu/cpu/mips]mips3com.c

trunk/src/emu/cpu/mips/mips3com.c
r30615r30616
556556
557557      case CPUINFO_STR_FLAGS:                         strcpy(info->s, " ");                   break;
558558
559      case CPUINFO_STR_REGISTER + MIPS3_PC:           sprintf(info->s, "PC: %08X", mips->pc); break;
560      case CPUINFO_STR_REGISTER + MIPS3_SR:           sprintf(info->s, "SR: %08X", (UINT32)mips->cpr[0][COP0_Status]); break;
559      case CPUINFO_STR_REGISTER + MIPS3_PC:           sprintf(info->s, "PC:%08X", mips->pc); break;
560      case CPUINFO_STR_REGISTER + MIPS3_SR:           sprintf(info->s, "SR:%08X", (UINT32)mips->cpr[0][COP0_Status]); break;
561561      case CPUINFO_STR_REGISTER + MIPS3_EPC:          sprintf(info->s, "EPC:%08X", (UINT32)mips->cpr[0][COP0_EPC]); break;
562562      case CPUINFO_STR_REGISTER + MIPS3_CAUSE:        sprintf(info->s, "Cause:%08X", (UINT32)mips->cpr[0][COP0_Cause]); break;
563563      case CPUINFO_STR_REGISTER + MIPS3_COUNT:        sprintf(info->s, "Count:%08X", (UINT32)((mips->device->total_cycles() - mips->count_zero_time) / 2)); break;
r30615r30616
572572      case CPUINFO_STR_REGISTER + MIPS3_BADVADDR:     sprintf(info->s, "BadVAddr:%08X", (UINT32)mips->cpr[0][COP0_BadVAddr]); break;
573573
574574#if USE_ABI_REG_NAMES
575      case CPUINFO_STR_REGISTER + MIPS3_R0:           sprintf(info->s, "$zero: %08X%08X", (UINT32)(mips->r[0] >> 32), (UINT32)mips->r[0]); break;
576      case CPUINFO_STR_REGISTER + MIPS3_R1:           sprintf(info->s, "  $at: %08X%08X", (UINT32)(mips->r[1] >> 32), (UINT32)mips->r[1]); break;
577      case CPUINFO_STR_REGISTER + MIPS3_R2:           sprintf(info->s, "  $v0: %08X%08X", (UINT32)(mips->r[2] >> 32), (UINT32)mips->r[2]); break;
578      case CPUINFO_STR_REGISTER + MIPS3_R3:           sprintf(info->s, "  $v1: %08X%08X", (UINT32)(mips->r[3] >> 32), (UINT32)mips->r[3]); break;
579      case CPUINFO_STR_REGISTER + MIPS3_R4:           sprintf(info->s, "  $a0: %08X%08X", (UINT32)(mips->r[4] >> 32), (UINT32)mips->r[4]); break;
580      case CPUINFO_STR_REGISTER + MIPS3_R5:           sprintf(info->s, "  $a1: %08X%08X", (UINT32)(mips->r[5] >> 32), (UINT32)mips->r[5]); break;
581      case CPUINFO_STR_REGISTER + MIPS3_R6:           sprintf(info->s, "  $a2: %08X%08X", (UINT32)(mips->r[6] >> 32), (UINT32)mips->r[6]); break;
582      case CPUINFO_STR_REGISTER + MIPS3_R7:           sprintf(info->s, "  $a3: %08X%08X", (UINT32)(mips->r[7] >> 32), (UINT32)mips->r[7]); break;
583      case CPUINFO_STR_REGISTER + MIPS3_R8:           sprintf(info->s, "  $t0: %08X%08X", (UINT32)(mips->r[8] >> 32), (UINT32)mips->r[8]); break;
584      case CPUINFO_STR_REGISTER + MIPS3_R9:           sprintf(info->s, "  $t1: %08X%08X", (UINT32)(mips->r[9] >> 32), (UINT32)mips->r[9]); break;
585      case CPUINFO_STR_REGISTER + MIPS3_R10:          sprintf(info->s, "  $t2:%08X%08X", (UINT32)(mips->r[10] >> 32), (UINT32)mips->r[10]); break;
586      case CPUINFO_STR_REGISTER + MIPS3_R11:          sprintf(info->s, "  $t3:%08X%08X", (UINT32)(mips->r[11] >> 32), (UINT32)mips->r[11]); break;
587      case CPUINFO_STR_REGISTER + MIPS3_R12:          sprintf(info->s, "  $t4:%08X%08X", (UINT32)(mips->r[12] >> 32), (UINT32)mips->r[12]); break;
588      case CPUINFO_STR_REGISTER + MIPS3_R13:          sprintf(info->s, "  $t5:%08X%08X", (UINT32)(mips->r[13] >> 32), (UINT32)mips->r[13]); break;
589      case CPUINFO_STR_REGISTER + MIPS3_R14:          sprintf(info->s, "  $t6:%08X%08X", (UINT32)(mips->r[14] >> 32), (UINT32)mips->r[14]); break;
590      case CPUINFO_STR_REGISTER + MIPS3_R15:          sprintf(info->s, "  $t7:%08X%08X", (UINT32)(mips->r[15] >> 32), (UINT32)mips->r[15]); break;
591      case CPUINFO_STR_REGISTER + MIPS3_R16:          sprintf(info->s, "  $s0:%08X%08X", (UINT32)(mips->r[16] >> 32), (UINT32)mips->r[16]); break;
592      case CPUINFO_STR_REGISTER + MIPS3_R17:          sprintf(info->s, "  $s1:%08X%08X", (UINT32)(mips->r[17] >> 32), (UINT32)mips->r[17]); break;
593      case CPUINFO_STR_REGISTER + MIPS3_R18:          sprintf(info->s, "  $s2:%08X%08X", (UINT32)(mips->r[18] >> 32), (UINT32)mips->r[18]); break;
594      case CPUINFO_STR_REGISTER + MIPS3_R19:          sprintf(info->s, "  $s3:%08X%08X", (UINT32)(mips->r[19] >> 32), (UINT32)mips->r[19]); break;
595      case CPUINFO_STR_REGISTER + MIPS3_R20:          sprintf(info->s, "  $s4:%08X%08X", (UINT32)(mips->r[20] >> 32), (UINT32)mips->r[20]); break;
596      case CPUINFO_STR_REGISTER + MIPS3_R21:          sprintf(info->s, "  $s5:%08X%08X", (UINT32)(mips->r[21] >> 32), (UINT32)mips->r[21]); break;
597      case CPUINFO_STR_REGISTER + MIPS3_R22:          sprintf(info->s, "  $s6:%08X%08X", (UINT32)(mips->r[22] >> 32), (UINT32)mips->r[22]); break;
598      case CPUINFO_STR_REGISTER + MIPS3_R23:          sprintf(info->s, "  $s7:%08X%08X", (UINT32)(mips->r[23] >> 32), (UINT32)mips->r[23]); break;
599      case CPUINFO_STR_REGISTER + MIPS3_R24:          sprintf(info->s, "  $t8:%08X%08X", (UINT32)(mips->r[24] >> 32), (UINT32)mips->r[24]); break;
600      case CPUINFO_STR_REGISTER + MIPS3_R25:          sprintf(info->s, "  $t9:%08X%08X", (UINT32)(mips->r[25] >> 32), (UINT32)mips->r[25]); break;
601      case CPUINFO_STR_REGISTER + MIPS3_R26:          sprintf(info->s, "  $k0:%08X%08X", (UINT32)(mips->r[26] >> 32), (UINT32)mips->r[26]); break;
602      case CPUINFO_STR_REGISTER + MIPS3_R27:          sprintf(info->s, "  $k1:%08X%08X", (UINT32)(mips->r[27] >> 32), (UINT32)mips->r[27]); break;
603      case CPUINFO_STR_REGISTER + MIPS3_R28:          sprintf(info->s, "  $gp:%08X%08X", (UINT32)(mips->r[28] >> 32), (UINT32)mips->r[28]); break;
604      case CPUINFO_STR_REGISTER + MIPS3_R29:          sprintf(info->s, "  $sp:%08X%08X", (UINT32)(mips->r[29] >> 32), (UINT32)mips->r[29]); break;
605      case CPUINFO_STR_REGISTER + MIPS3_R30:          sprintf(info->s, "  $fp:%08X%08X", (UINT32)(mips->r[30] >> 32), (UINT32)mips->r[30]); break;
606      case CPUINFO_STR_REGISTER + MIPS3_R31:          sprintf(info->s, "  $ra:%08X%08X", (UINT32)(mips->r[31] >> 32), (UINT32)mips->r[31]); break;
575      case CPUINFO_STR_REGISTER + MIPS3_R0:           sprintf(info->s, "zero:%08X%08X", (UINT32)(mips->r[0] >> 32), (UINT32)mips->r[0]); break;
576      case CPUINFO_STR_REGISTER + MIPS3_R1:           sprintf(info->s, "at:%08X%08X", (UINT32)(mips->r[1] >> 32), (UINT32)mips->r[1]); break;
577      case CPUINFO_STR_REGISTER + MIPS3_R2:           sprintf(info->s, "v0:%08X%08X", (UINT32)(mips->r[2] >> 32), (UINT32)mips->r[2]); break;
578      case CPUINFO_STR_REGISTER + MIPS3_R3:           sprintf(info->s, "v1:%08X%08X", (UINT32)(mips->r[3] >> 32), (UINT32)mips->r[3]); break;
579      case CPUINFO_STR_REGISTER + MIPS3_R4:           sprintf(info->s, "a0:%08X%08X", (UINT32)(mips->r[4] >> 32), (UINT32)mips->r[4]); break;
580      case CPUINFO_STR_REGISTER + MIPS3_R5:           sprintf(info->s, "a1:%08X%08X", (UINT32)(mips->r[5] >> 32), (UINT32)mips->r[5]); break;
581      case CPUINFO_STR_REGISTER + MIPS3_R6:           sprintf(info->s, "a2:%08X%08X", (UINT32)(mips->r[6] >> 32), (UINT32)mips->r[6]); break;
582      case CPUINFO_STR_REGISTER + MIPS3_R7:           sprintf(info->s, "a3:%08X%08X", (UINT32)(mips->r[7] >> 32), (UINT32)mips->r[7]); break;
583      case CPUINFO_STR_REGISTER + MIPS3_R8:           sprintf(info->s, "t0:%08X%08X", (UINT32)(mips->r[8] >> 32), (UINT32)mips->r[8]); break;
584      case CPUINFO_STR_REGISTER + MIPS3_R9:           sprintf(info->s, "t1:%08X%08X", (UINT32)(mips->r[9] >> 32), (UINT32)mips->r[9]); break;
585      case CPUINFO_STR_REGISTER + MIPS3_R10:          sprintf(info->s, "t2:%08X%08X", (UINT32)(mips->r[10] >> 32), (UINT32)mips->r[10]); break;
586      case CPUINFO_STR_REGISTER + MIPS3_R11:          sprintf(info->s, "t3:%08X%08X", (UINT32)(mips->r[11] >> 32), (UINT32)mips->r[11]); break;
587      case CPUINFO_STR_REGISTER + MIPS3_R12:          sprintf(info->s, "t4:%08X%08X", (UINT32)(mips->r[12] >> 32), (UINT32)mips->r[12]); break;
588      case CPUINFO_STR_REGISTER + MIPS3_R13:          sprintf(info->s, "t5:%08X%08X", (UINT32)(mips->r[13] >> 32), (UINT32)mips->r[13]); break;
589      case CPUINFO_STR_REGISTER + MIPS3_R14:          sprintf(info->s, "t6:%08X%08X", (UINT32)(mips->r[14] >> 32), (UINT32)mips->r[14]); break;
590      case CPUINFO_STR_REGISTER + MIPS3_R15:          sprintf(info->s, "t7:%08X%08X", (UINT32)(mips->r[15] >> 32), (UINT32)mips->r[15]); break;
591      case CPUINFO_STR_REGISTER + MIPS3_R16:          sprintf(info->s, "s0:%08X%08X", (UINT32)(mips->r[16] >> 32), (UINT32)mips->r[16]); break;
592      case CPUINFO_STR_REGISTER + MIPS3_R17:          sprintf(info->s, "s1:%08X%08X", (UINT32)(mips->r[17] >> 32), (UINT32)mips->r[17]); break;
593      case CPUINFO_STR_REGISTER + MIPS3_R18:          sprintf(info->s, "s2:%08X%08X", (UINT32)(mips->r[18] >> 32), (UINT32)mips->r[18]); break;
594      case CPUINFO_STR_REGISTER + MIPS3_R19:          sprintf(info->s, "s3:%08X%08X", (UINT32)(mips->r[19] >> 32), (UINT32)mips->r[19]); break;
595      case CPUINFO_STR_REGISTER + MIPS3_R20:          sprintf(info->s, "s4:%08X%08X", (UINT32)(mips->r[20] >> 32), (UINT32)mips->r[20]); break;
596      case CPUINFO_STR_REGISTER + MIPS3_R21:          sprintf(info->s, "s5:%08X%08X", (UINT32)(mips->r[21] >> 32), (UINT32)mips->r[21]); break;
597      case CPUINFO_STR_REGISTER + MIPS3_R22:          sprintf(info->s, "s6:%08X%08X", (UINT32)(mips->r[22] >> 32), (UINT32)mips->r[22]); break;
598      case CPUINFO_STR_REGISTER + MIPS3_R23:          sprintf(info->s, "s7:%08X%08X", (UINT32)(mips->r[23] >> 32), (UINT32)mips->r[23]); break;
599      case CPUINFO_STR_REGISTER + MIPS3_R24:          sprintf(info->s, "t8:%08X%08X", (UINT32)(mips->r[24] >> 32), (UINT32)mips->r[24]); break;
600      case CPUINFO_STR_REGISTER + MIPS3_R25:          sprintf(info->s, "t9:%08X%08X", (UINT32)(mips->r[25] >> 32), (UINT32)mips->r[25]); break;
601      case CPUINFO_STR_REGISTER + MIPS3_R26:          sprintf(info->s, "k0:%08X%08X", (UINT32)(mips->r[26] >> 32), (UINT32)mips->r[26]); break;
602      case CPUINFO_STR_REGISTER + MIPS3_R27:          sprintf(info->s, "k1:%08X%08X", (UINT32)(mips->r[27] >> 32), (UINT32)mips->r[27]); break;
603      case CPUINFO_STR_REGISTER + MIPS3_R28:          sprintf(info->s, "gp:%08X%08X", (UINT32)(mips->r[28] >> 32), (UINT32)mips->r[28]); break;
604      case CPUINFO_STR_REGISTER + MIPS3_R29:          sprintf(info->s, "sp:%08X%08X", (UINT32)(mips->r[29] >> 32), (UINT32)mips->r[29]); break;
605      case CPUINFO_STR_REGISTER + MIPS3_R30:          sprintf(info->s, "fp:%08X%08X", (UINT32)(mips->r[30] >> 32), (UINT32)mips->r[30]); break;
606      case CPUINFO_STR_REGISTER + MIPS3_R31:          sprintf(info->s, "ra:%08X%08X", (UINT32)(mips->r[31] >> 32), (UINT32)mips->r[31]); break;
607607#else
608      case CPUINFO_STR_REGISTER + MIPS3_R0:           sprintf(info->s, " R0: %08X%08X", (UINT32)(mips->r[0] >> 32), (UINT32)mips->r[0]); break;
609      case CPUINFO_STR_REGISTER + MIPS3_R1:           sprintf(info->s, " R1: %08X%08X", (UINT32)(mips->r[1] >> 32), (UINT32)mips->r[1]); break;
610      case CPUINFO_STR_REGISTER + MIPS3_R2:           sprintf(info->s, " R2: %08X%08X", (UINT32)(mips->r[2] >> 32), (UINT32)mips->r[2]); break;
611      case CPUINFO_STR_REGISTER + MIPS3_R3:           sprintf(info->s, " R3: %08X%08X", (UINT32)(mips->r[3] >> 32), (UINT32)mips->r[3]); break;
612      case CPUINFO_STR_REGISTER + MIPS3_R4:           sprintf(info->s, " R4: %08X%08X", (UINT32)(mips->r[4] >> 32), (UINT32)mips->r[4]); break;
613      case CPUINFO_STR_REGISTER + MIPS3_R5:           sprintf(info->s, " R5: %08X%08X", (UINT32)(mips->r[5] >> 32), (UINT32)mips->r[5]); break;
614      case CPUINFO_STR_REGISTER + MIPS3_R6:           sprintf(info->s, " R6: %08X%08X", (UINT32)(mips->r[6] >> 32), (UINT32)mips->r[6]); break;
615      case CPUINFO_STR_REGISTER + MIPS3_R7:           sprintf(info->s, " R7: %08X%08X", (UINT32)(mips->r[7] >> 32), (UINT32)mips->r[7]); break;
616      case CPUINFO_STR_REGISTER + MIPS3_R8:           sprintf(info->s, " R8: %08X%08X", (UINT32)(mips->r[8] >> 32), (UINT32)mips->r[8]); break;
617      case CPUINFO_STR_REGISTER + MIPS3_R9:           sprintf(info->s, " R9: %08X%08X", (UINT32)(mips->r[9] >> 32), (UINT32)mips->r[9]); break;
618      case CPUINFO_STR_REGISTER + MIPS3_R10:          sprintf(info->s, "R10: %08X%08X", (UINT32)(mips->r[10] >> 32), (UINT32)mips->r[10]); break;
619      case CPUINFO_STR_REGISTER + MIPS3_R11:          sprintf(info->s, "R11: %08X%08X", (UINT32)(mips->r[11] >> 32), (UINT32)mips->r[11]); break;
620      case CPUINFO_STR_REGISTER + MIPS3_R12:          sprintf(info->s, "R12: %08X%08X", (UINT32)(mips->r[12] >> 32), (UINT32)mips->r[12]); break;
621      case CPUINFO_STR_REGISTER + MIPS3_R13:          sprintf(info->s, "R13: %08X%08X", (UINT32)(mips->r[13] >> 32), (UINT32)mips->r[13]); break;
622      case CPUINFO_STR_REGISTER + MIPS3_R14:          sprintf(info->s, "R14: %08X%08X", (UINT32)(mips->r[14] >> 32), (UINT32)mips->r[14]); break;
623      case CPUINFO_STR_REGISTER + MIPS3_R15:          sprintf(info->s, "R15: %08X%08X", (UINT32)(mips->r[15] >> 32), (UINT32)mips->r[15]); break;
624      case CPUINFO_STR_REGISTER + MIPS3_R16:          sprintf(info->s, "R16: %08X%08X", (UINT32)(mips->r[16] >> 32), (UINT32)mips->r[16]); break;
625      case CPUINFO_STR_REGISTER + MIPS3_R17:          sprintf(info->s, "R17: %08X%08X", (UINT32)(mips->r[17] >> 32), (UINT32)mips->r[17]); break;
626      case CPUINFO_STR_REGISTER + MIPS3_R18:          sprintf(info->s, "R18: %08X%08X", (UINT32)(mips->r[18] >> 32), (UINT32)mips->r[18]); break;
627      case CPUINFO_STR_REGISTER + MIPS3_R19:          sprintf(info->s, "R19: %08X%08X", (UINT32)(mips->r[19] >> 32), (UINT32)mips->r[19]); break;
628      case CPUINFO_STR_REGISTER + MIPS3_R20:          sprintf(info->s, "R20: %08X%08X", (UINT32)(mips->r[20] >> 32), (UINT32)mips->r[20]); break;
629      case CPUINFO_STR_REGISTER + MIPS3_R21:          sprintf(info->s, "R21: %08X%08X", (UINT32)(mips->r[21] >> 32), (UINT32)mips->r[21]); break;
630      case CPUINFO_STR_REGISTER + MIPS3_R22:          sprintf(info->s, "R22: %08X%08X", (UINT32)(mips->r[22] >> 32), (UINT32)mips->r[22]); break;
631      case CPUINFO_STR_REGISTER + MIPS3_R23:          sprintf(info->s, "R23: %08X%08X", (UINT32)(mips->r[23] >> 32), (UINT32)mips->r[23]); break;
632      case CPUINFO_STR_REGISTER + MIPS3_R24:          sprintf(info->s, "R24: %08X%08X", (UINT32)(mips->r[24] >> 32), (UINT32)mips->r[24]); break;
633      case CPUINFO_STR_REGISTER + MIPS3_R25:          sprintf(info->s, "R25: %08X%08X", (UINT32)(mips->r[25] >> 32), (UINT32)mips->r[25]); break;
634      case CPUINFO_STR_REGISTER + MIPS3_R26:          sprintf(info->s, "R26: %08X%08X", (UINT32)(mips->r[26] >> 32), (UINT32)mips->r[26]); break;
635      case CPUINFO_STR_REGISTER + MIPS3_R27:          sprintf(info->s, "R27: %08X%08X", (UINT32)(mips->r[27] >> 32), (UINT32)mips->r[27]); break;
636      case CPUINFO_STR_REGISTER + MIPS3_R28:          sprintf(info->s, "R28: %08X%08X", (UINT32)(mips->r[28] >> 32), (UINT32)mips->r[28]); break;
637      case CPUINFO_STR_REGISTER + MIPS3_R29:          sprintf(info->s, "R29: %08X%08X", (UINT32)(mips->r[29] >> 32), (UINT32)mips->r[29]); break;
638      case CPUINFO_STR_REGISTER + MIPS3_R30:          sprintf(info->s, "R30: %08X%08X", (UINT32)(mips->r[30] >> 32), (UINT32)mips->r[30]); break;
639      case CPUINFO_STR_REGISTER + MIPS3_R31:          sprintf(info->s, "R31: %08X%08X", (UINT32)(mips->r[31] >> 32), (UINT32)mips->r[31]); break;
608      case CPUINFO_STR_REGISTER + MIPS3_R0:           sprintf(info->s, "R0:%08X%08X", (UINT32)(mips->r[0] >> 32), (UINT32)mips->r[0]); break;
609      case CPUINFO_STR_REGISTER + MIPS3_R1:           sprintf(info->s, "R1:%08X%08X", (UINT32)(mips->r[1] >> 32), (UINT32)mips->r[1]); break;
610      case CPUINFO_STR_REGISTER + MIPS3_R2:           sprintf(info->s, "R2:%08X%08X", (UINT32)(mips->r[2] >> 32), (UINT32)mips->r[2]); break;
611      case CPUINFO_STR_REGISTER + MIPS3_R3:           sprintf(info->s, "R3:%08X%08X", (UINT32)(mips->r[3] >> 32), (UINT32)mips->r[3]); break;
612      case CPUINFO_STR_REGISTER + MIPS3_R4:           sprintf(info->s, "R4:%08X%08X", (UINT32)(mips->r[4] >> 32), (UINT32)mips->r[4]); break;
613      case CPUINFO_STR_REGISTER + MIPS3_R5:           sprintf(info->s, "R5:%08X%08X", (UINT32)(mips->r[5] >> 32), (UINT32)mips->r[5]); break;
614      case CPUINFO_STR_REGISTER + MIPS3_R6:           sprintf(info->s, "R6:%08X%08X", (UINT32)(mips->r[6] >> 32), (UINT32)mips->r[6]); break;
615      case CPUINFO_STR_REGISTER + MIPS3_R7:           sprintf(info->s, "R7:%08X%08X", (UINT32)(mips->r[7] >> 32), (UINT32)mips->r[7]); break;
616      case CPUINFO_STR_REGISTER + MIPS3_R8:           sprintf(info->s, "R8:%08X%08X", (UINT32)(mips->r[8] >> 32), (UINT32)mips->r[8]); break;
617      case CPUINFO_STR_REGISTER + MIPS3_R9:           sprintf(info->s, "R9:%08X%08X", (UINT32)(mips->r[9] >> 32), (UINT32)mips->r[9]); break;
618      case CPUINFO_STR_REGISTER + MIPS3_R10:          sprintf(info->s, "R10:%08X%08X", (UINT32)(mips->r[10] >> 32), (UINT32)mips->r[10]); break;
619      case CPUINFO_STR_REGISTER + MIPS3_R11:          sprintf(info->s, "R11:%08X%08X", (UINT32)(mips->r[11] >> 32), (UINT32)mips->r[11]); break;
620      case CPUINFO_STR_REGISTER + MIPS3_R12:          sprintf(info->s, "R12:%08X%08X", (UINT32)(mips->r[12] >> 32), (UINT32)mips->r[12]); break;
621      case CPUINFO_STR_REGISTER + MIPS3_R13:          sprintf(info->s, "R13:%08X%08X", (UINT32)(mips->r[13] >> 32), (UINT32)mips->r[13]); break;
622      case CPUINFO_STR_REGISTER + MIPS3_R14:          sprintf(info->s, "R14:%08X%08X", (UINT32)(mips->r[14] >> 32), (UINT32)mips->r[14]); break;
623      case CPUINFO_STR_REGISTER + MIPS3_R15:          sprintf(info->s, "R15:%08X%08X", (UINT32)(mips->r[15] >> 32), (UINT32)mips->r[15]); break;
624      case CPUINFO_STR_REGISTER + MIPS3_R16:          sprintf(info->s, "R16:%08X%08X", (UINT32)(mips->r[16] >> 32), (UINT32)mips->r[16]); break;
625      case CPUINFO_STR_REGISTER + MIPS3_R17:          sprintf(info->s, "R17:%08X%08X", (UINT32)(mips->r[17] >> 32), (UINT32)mips->r[17]); break;
626      case CPUINFO_STR_REGISTER + MIPS3_R18:          sprintf(info->s, "R18:%08X%08X", (UINT32)(mips->r[18] >> 32), (UINT32)mips->r[18]); break;
627      case CPUINFO_STR_REGISTER + MIPS3_R19:          sprintf(info->s, "R19:%08X%08X", (UINT32)(mips->r[19] >> 32), (UINT32)mips->r[19]); break;
628      case CPUINFO_STR_REGISTER + MIPS3_R20:          sprintf(info->s, "R20:%08X%08X", (UINT32)(mips->r[20] >> 32), (UINT32)mips->r[20]); break;
629      case CPUINFO_STR_REGISTER + MIPS3_R21:          sprintf(info->s, "R21:%08X%08X", (UINT32)(mips->r[21] >> 32), (UINT32)mips->r[21]); break;
630      case CPUINFO_STR_REGISTER + MIPS3_R22:          sprintf(info->s, "R22:%08X%08X", (UINT32)(mips->r[22] >> 32), (UINT32)mips->r[22]); break;
631      case CPUINFO_STR_REGISTER + MIPS3_R23:          sprintf(info->s, "R23:%08X%08X", (UINT32)(mips->r[23] >> 32), (UINT32)mips->r[23]); break;
632      case CPUINFO_STR_REGISTER + MIPS3_R24:          sprintf(info->s, "R24:%08X%08X", (UINT32)(mips->r[24] >> 32), (UINT32)mips->r[24]); break;
633      case CPUINFO_STR_REGISTER + MIPS3_R25:          sprintf(info->s, "R25:%08X%08X", (UINT32)(mips->r[25] >> 32), (UINT32)mips->r[25]); break;
634      case CPUINFO_STR_REGISTER + MIPS3_R26:          sprintf(info->s, "R26:%08X%08X", (UINT32)(mips->r[26] >> 32), (UINT32)mips->r[26]); break;
635      case CPUINFO_STR_REGISTER + MIPS3_R27:          sprintf(info->s, "R27:%08X%08X", (UINT32)(mips->r[27] >> 32), (UINT32)mips->r[27]); break;
636      case CPUINFO_STR_REGISTER + MIPS3_R28:          sprintf(info->s, "R28:%08X%08X", (UINT32)(mips->r[28] >> 32), (UINT32)mips->r[28]); break;
637      case CPUINFO_STR_REGISTER + MIPS3_R29:          sprintf(info->s, "R29:%08X%08X", (UINT32)(mips->r[29] >> 32), (UINT32)mips->r[29]); break;
638      case CPUINFO_STR_REGISTER + MIPS3_R30:          sprintf(info->s, "R30:%08X%08X", (UINT32)(mips->r[30] >> 32), (UINT32)mips->r[30]); break;
639      case CPUINFO_STR_REGISTER + MIPS3_R31:          sprintf(info->s, "R31:%08X%08X", (UINT32)(mips->r[31] >> 32), (UINT32)mips->r[31]); break;
640640#endif
641      case CPUINFO_STR_REGISTER + MIPS3_HI:           sprintf(info->s, "HI: %08X%08X", (UINT32)(mips->r[REG_HI] >> 32), (UINT32)mips->r[REG_HI]); break;
642      case CPUINFO_STR_REGISTER + MIPS3_LO:           sprintf(info->s, "LO: %08X%08X", (UINT32)(mips->r[REG_LO] >> 32), (UINT32)mips->r[REG_LO]); break;
641      case CPUINFO_STR_REGISTER + MIPS3_HI:           sprintf(info->s, "HI:%08X%08X", (UINT32)(mips->r[REG_HI] >> 32), (UINT32)mips->r[REG_HI]); break;
642      case CPUINFO_STR_REGISTER + MIPS3_LO:           sprintf(info->s, "LO:%08X%08X", (UINT32)(mips->r[REG_LO] >> 32), (UINT32)mips->r[REG_LO]); break;
643643
644644      case CPUINFO_STR_REGISTER + MIPS3_CCR1_31:      sprintf(info->s, "CCR31:%08X", (UINT32)mips->ccr[1][31]); break;
645645
646      case CPUINFO_STR_REGISTER + MIPS3_FPR0:         sprintf(info->s, "FPR0: %08X%08X", (UINT32)(mips->cpr[1][0] >> 32), (UINT32)mips->cpr[1][0]); break;
647      case CPUINFO_STR_REGISTER + MIPS3_FPS0:         sprintf(info->s, "FPS0: !%16g", *(float *)&mips->cpr[1][0]); break;
648      case CPUINFO_STR_REGISTER + MIPS3_FPD0:         sprintf(info->s, "FPD0: !%16g", *(double *)&mips->cpr[1][0]); break;
649      case CPUINFO_STR_REGISTER + MIPS3_FPR1:         sprintf(info->s, "FPR1: %08X%08X", (UINT32)(mips->cpr[1][1] >> 32), (UINT32)mips->cpr[1][1]); break;
650      case CPUINFO_STR_REGISTER + MIPS3_FPS1:         sprintf(info->s, "FPS1: !%16g", *(float *)&mips->cpr[1][1]); break;
651      case CPUINFO_STR_REGISTER + MIPS3_FPD1:         sprintf(info->s, "FPD1: !%16g", *(double *)&mips->cpr[1][1]); break;
652      case CPUINFO_STR_REGISTER + MIPS3_FPR2:         sprintf(info->s, "FPR2: %08X%08X", (UINT32)(mips->cpr[1][2] >> 32), (UINT32)mips->cpr[1][2]); break;
653      case CPUINFO_STR_REGISTER + MIPS3_FPS2:         sprintf(info->s, "FPS2: !%16g", *(float *)&mips->cpr[1][2]); break;
654      case CPUINFO_STR_REGISTER + MIPS3_FPD2:         sprintf(info->s, "FPD2: !%16g", *(double *)&mips->cpr[1][2]); break;
655      case CPUINFO_STR_REGISTER + MIPS3_FPR3:         sprintf(info->s, "FPR3: %08X%08X", (UINT32)(mips->cpr[1][3] >> 32), (UINT32)mips->cpr[1][3]); break;
656      case CPUINFO_STR_REGISTER + MIPS3_FPS3:         sprintf(info->s, "FPS3: !%16g", *(float *)&mips->cpr[1][3]); break;
657      case CPUINFO_STR_REGISTER + MIPS3_FPD3:         sprintf(info->s, "FPD3: !%16g", *(double *)&mips->cpr[1][3]); break;
658      case CPUINFO_STR_REGISTER + MIPS3_FPR4:         sprintf(info->s, "FPR4: %08X%08X", (UINT32)(mips->cpr[1][4] >> 32), (UINT32)mips->cpr[1][4]); break;
659      case CPUINFO_STR_REGISTER + MIPS3_FPS4:         sprintf(info->s, "FPS4: !%16g", *(float *)&mips->cpr[1][4]); break;
660      case CPUINFO_STR_REGISTER + MIPS3_FPD4:         sprintf(info->s, "FPD4: !%16g", *(double *)&mips->cpr[1][4]); break;
661      case CPUINFO_STR_REGISTER + MIPS3_FPR5:         sprintf(info->s, "FPR5: %08X%08X", (UINT32)(mips->cpr[1][5] >> 32), (UINT32)mips->cpr[1][5]); break;
662      case CPUINFO_STR_REGISTER + MIPS3_FPS5:         sprintf(info->s, "FPS5: !%16g", *(float *)&mips->cpr[1][5]); break;
663      case CPUINFO_STR_REGISTER + MIPS3_FPD5:         sprintf(info->s, "FPD5: !%16g", *(double *)&mips->cpr[1][5]); break;
664      case CPUINFO_STR_REGISTER + MIPS3_FPR6:         sprintf(info->s, "FPR6: %08X%08X", (UINT32)(mips->cpr[1][6] >> 32), (UINT32)mips->cpr[1][6]); break;
665      case CPUINFO_STR_REGISTER + MIPS3_FPS6:         sprintf(info->s, "FPS6: !%16g", *(float *)&mips->cpr[1][6]); break;
666      case CPUINFO_STR_REGISTER + MIPS3_FPD6:         sprintf(info->s, "FPD6: !%16g", *(double *)&mips->cpr[1][6]); break;
667      case CPUINFO_STR_REGISTER + MIPS3_FPR7:         sprintf(info->s, "FPR7: %08X%08X", (UINT32)(mips->cpr[1][7] >> 32), (UINT32)mips->cpr[1][7]); break;
668      case CPUINFO_STR_REGISTER + MIPS3_FPS7:         sprintf(info->s, "FPS7: !%16g", *(float *)&mips->cpr[1][7]); break;
669      case CPUINFO_STR_REGISTER + MIPS3_FPD7:         sprintf(info->s, "FPD7: !%16g", *(double *)&mips->cpr[1][7]); break;
670      case CPUINFO_STR_REGISTER + MIPS3_FPR8:         sprintf(info->s, "FPR8: %08X%08X", (UINT32)(mips->cpr[1][8] >> 32), (UINT32)mips->cpr[1][8]); break;
671      case CPUINFO_STR_REGISTER + MIPS3_FPS8:         sprintf(info->s, "FPS8: !%16g", *(float *)&mips->cpr[1][8]); break;
672      case CPUINFO_STR_REGISTER + MIPS3_FPD8:         sprintf(info->s, "FPD8: !%16g", *(double *)&mips->cpr[1][8]); break;
673      case CPUINFO_STR_REGISTER + MIPS3_FPR9:         sprintf(info->s, "FPR9: %08X%08X", (UINT32)(mips->cpr[1][9] >> 32), (UINT32)mips->cpr[1][9]); break;
674      case CPUINFO_STR_REGISTER + MIPS3_FPS9:         sprintf(info->s, "FPS9: !%16g", *(float *)&mips->cpr[1][9]); break;
675      case CPUINFO_STR_REGISTER + MIPS3_FPD9:         sprintf(info->s, "FPD9: !%16g", *(double *)&mips->cpr[1][9]); break;
646      case CPUINFO_STR_REGISTER + MIPS3_FPR0:         sprintf(info->s, "FPR0:%08X%08X", (UINT32)(mips->cpr[1][0] >> 32), (UINT32)mips->cpr[1][0]); break;
647      case CPUINFO_STR_REGISTER + MIPS3_FPS0:         sprintf(info->s, "FPS0:!%16g", *(float *)&mips->cpr[1][0]); break;
648      case CPUINFO_STR_REGISTER + MIPS3_FPD0:         sprintf(info->s, "FPD0:!%16g", *(double *)&mips->cpr[1][0]); break;
649      case CPUINFO_STR_REGISTER + MIPS3_FPR1:         sprintf(info->s, "FPR1:%08X%08X", (UINT32)(mips->cpr[1][1] >> 32), (UINT32)mips->cpr[1][1]); break;
650      case CPUINFO_STR_REGISTER + MIPS3_FPS1:         sprintf(info->s, "FPS1:!%16g", *(float *)&mips->cpr[1][1]); break;
651      case CPUINFO_STR_REGISTER + MIPS3_FPD1:         sprintf(info->s, "FPD1:!%16g", *(double *)&mips->cpr[1][1]); break;
652      case CPUINFO_STR_REGISTER + MIPS3_FPR2:         sprintf(info->s, "FPR2:%08X%08X", (UINT32)(mips->cpr[1][2] >> 32), (UINT32)mips->cpr[1][2]); break;
653      case CPUINFO_STR_REGISTER + MIPS3_FPS2:         sprintf(info->s, "FPS2:!%16g", *(float *)&mips->cpr[1][2]); break;
654      case CPUINFO_STR_REGISTER + MIPS3_FPD2:         sprintf(info->s, "FPD2:!%16g", *(double *)&mips->cpr[1][2]); break;
655      case CPUINFO_STR_REGISTER + MIPS3_FPR3:         sprintf(info->s, "FPR3:%08X%08X", (UINT32)(mips->cpr[1][3] >> 32), (UINT32)mips->cpr[1][3]); break;
656      case CPUINFO_STR_REGISTER + MIPS3_FPS3:         sprintf(info->s, "FPS3:!%16g", *(float *)&mips->cpr[1][3]); break;
657      case CPUINFO_STR_REGISTER + MIPS3_FPD3:         sprintf(info->s, "FPD3:!%16g", *(double *)&mips->cpr[1][3]); break;
658      case CPUINFO_STR_REGISTER + MIPS3_FPR4:         sprintf(info->s, "FPR4:%08X%08X", (UINT32)(mips->cpr[1][4] >> 32), (UINT32)mips->cpr[1][4]); break;
659      case CPUINFO_STR_REGISTER + MIPS3_FPS4:         sprintf(info->s, "FPS4:!%16g", *(float *)&mips->cpr[1][4]); break;
660      case CPUINFO_STR_REGISTER + MIPS3_FPD4:         sprintf(info->s, "FPD4:!%16g", *(double *)&mips->cpr[1][4]); break;
661      case CPUINFO_STR_REGISTER + MIPS3_FPR5:         sprintf(info->s, "FPR5:%08X%08X", (UINT32)(mips->cpr[1][5] >> 32), (UINT32)mips->cpr[1][5]); break;
662      case CPUINFO_STR_REGISTER + MIPS3_FPS5:         sprintf(info->s, "FPS5:!%16g", *(float *)&mips->cpr[1][5]); break;
663      case CPUINFO_STR_REGISTER + MIPS3_FPD5:         sprintf(info->s, "FPD5:!%16g", *(double *)&mips->cpr[1][5]); break;
664      case CPUINFO_STR_REGISTER + MIPS3_FPR6:         sprintf(info->s, "FPR6:%08X%08X", (UINT32)(mips->cpr[1][6] >> 32), (UINT32)mips->cpr[1][6]); break;
665      case CPUINFO_STR_REGISTER + MIPS3_FPS6:         sprintf(info->s, "FPS6:!%16g", *(float *)&mips->cpr[1][6]); break;
666      case CPUINFO_STR_REGISTER + MIPS3_FPD6:         sprintf(info->s, "FPD6:!%16g", *(double *)&mips->cpr[1][6]); break;
667      case CPUINFO_STR_REGISTER + MIPS3_FPR7:         sprintf(info->s, "FPR7:%08X%08X", (UINT32)(mips->cpr[1][7] >> 32), (UINT32)mips->cpr[1][7]); break;
668      case CPUINFO_STR_REGISTER + MIPS3_FPS7:         sprintf(info->s, "FPS7:!%16g", *(float *)&mips->cpr[1][7]); break;
669      case CPUINFO_STR_REGISTER + MIPS3_FPD7:         sprintf(info->s, "FPD7:!%16g", *(double *)&mips->cpr[1][7]); break;
670      case CPUINFO_STR_REGISTER + MIPS3_FPR8:         sprintf(info->s, "FPR8:%08X%08X", (UINT32)(mips->cpr[1][8] >> 32), (UINT32)mips->cpr[1][8]); break;
671      case CPUINFO_STR_REGISTER + MIPS3_FPS8:         sprintf(info->s, "FPS8:!%16g", *(float *)&mips->cpr[1][8]); break;
672      case CPUINFO_STR_REGISTER + MIPS3_FPD8:         sprintf(info->s, "FPD8:!%16g", *(double *)&mips->cpr[1][8]); break;
673      case CPUINFO_STR_REGISTER + MIPS3_FPR9:         sprintf(info->s, "FPR9:%08X%08X", (UINT32)(mips->cpr[1][9] >> 32), (UINT32)mips->cpr[1][9]); break;
674      case CPUINFO_STR_REGISTER + MIPS3_FPS9:         sprintf(info->s, "FPS9:!%16g", *(float *)&mips->cpr[1][9]); break;
675      case CPUINFO_STR_REGISTER + MIPS3_FPD9:         sprintf(info->s, "FPD9:!%16g", *(double *)&mips->cpr[1][9]); break;
676676      case CPUINFO_STR_REGISTER + MIPS3_FPR10:        sprintf(info->s, "FPR10:%08X%08X", (UINT32)(mips->cpr[1][10] >> 32), (UINT32)mips->cpr[1][10]); break;
677677      case CPUINFO_STR_REGISTER + MIPS3_FPS10:        sprintf(info->s, "FPS10:!%16g", *(float *)&mips->cpr[1][10]); break;
678678      case CPUINFO_STR_REGISTER + MIPS3_FPD10:        sprintf(info->s, "FPD10:!%16g", *(double *)&mips->cpr[1][10]); break;

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