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r30579 Wednesday 21st May, 2014 at 08:01:56 UTC by Alex Jackson
m37710: support direct read [Alex Jackson]
[src/emu/cpu/m37710]m37710.c m37710.h m37710cm.h m37710op.h

trunk/src/emu/cpu/m37710/m37710.c
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990990   memset(m_m37710_regs, 0, sizeof(m_m37710_regs));
991991
992992   m_program = &space(AS_PROGRAM);
993   m_direct = &m_program->direct();
993994   m_io = &space(AS_IO);
994995
995996   m_ICount = 0;
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11921193/* ================================= MEMORY =============================== */
11931194/* ======================================================================== */
11941195
1195#define ADDRESS_37710(A) ((A)&0xffffff)
1196
11971196UINT32 m37710_cpu_device::m37710i_read_8_normal(UINT32 address)
11981197{
1199   address = ADDRESS_37710(address);
12001198   return m37710_read_8(address);
12011199}
12021200
12031201UINT32 m37710_cpu_device::m37710i_read_8_immediate(UINT32 address)
12041202{
1205   address = ADDRESS_37710(address);
12061203   return m37710_read_8_immediate(address);
12071204}
12081205
12091206UINT32 m37710_cpu_device::m37710i_read_8_direct(UINT32 address)
12101207{
1211   address = ADDRESS_37710(address);
12121208   return m37710_read_8(address);
12131209}
12141210
12151211void m37710_cpu_device::m37710i_write_8_normal(UINT32 address, UINT32 value)
12161212{
1217   address = ADDRESS_37710(address);
1218   m37710_write_8(address, MAKE_UINT_8(value));
1213   m37710_write_8(address, value);
12191214}
12201215
12211216void m37710_cpu_device::m37710i_write_8_direct(UINT32 address, UINT32 value)
12221217{
1223   address = ADDRESS_37710(address);
1224   m37710_write_8(address, MAKE_UINT_8(value));
1218   m37710_write_8(address, value);
12251219}
12261220
12271221UINT32 m37710_cpu_device::m37710i_read_16_normal(UINT32 address)
12281222{
1229   address = ADDRESS_37710(address);
12301223   if (address & 1)
1231      return m37710i_read_8_normal(address) | m37710i_read_8_normal(address+1)<<8;
1224      return m37710_read_8(address) | m37710_read_8(address+1)<<8;
12321225   else
12331226      return m37710_read_16(address);
12341227}
12351228
12361229UINT32 m37710_cpu_device::m37710i_read_16_immediate(UINT32 address)
12371230{
1238   address = ADDRESS_37710(address);
12391231   if (address & 1)
12401232      return m37710_read_8_immediate(address) | m37710_read_8_immediate(address+1)<<8;
12411233   else
1242      return m37710_read_16(address);
1234      return m37710_read_16_immediate(address);
12431235}
12441236
12451237UINT32 m37710_cpu_device::m37710i_read_16_direct(UINT32 address)
12461238{
1247   address = ADDRESS_37710(address);
12481239   if (address & 1)
12491240      return m37710_read_8(address) | m37710_read_8((address)+1)<<8;
12501241   else
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12531244
12541245void m37710_cpu_device::m37710i_write_16_normal(UINT32 address, UINT32 value)
12551246{
1256   address = ADDRESS_37710(address);
12571247   if (address & 1)
12581248   {
12591249      m37710_write_8(address, value);
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12651255
12661256void m37710_cpu_device::m37710i_write_16_direct(UINT32 address, UINT32 value)
12671257{
1268   address = ADDRESS_37710(address);
12691258   if (address & 1)
12701259   {
12711260      m37710_write_8(address, value);
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12771266
12781267UINT32 m37710_cpu_device::m37710i_read_24_normal(UINT32 address)
12791268{
1280   return   m37710i_read_16_normal(address)       |
1281         (m37710i_read_8_normal(address+2)<<16);
1269   return   m37710_read_16(address)       |
1270         (m37710_read_8(address+2)<<16);
12821271}
12831272
12841273UINT32 m37710_cpu_device::m37710i_read_24_immediate(UINT32 address)
12851274{
1286   return   m37710i_read_16_immediate(address)       |
1287         (m37710i_read_8_immediate(address+2)<<16);
1275   return   m37710_read_16_immediate(address)       |
1276         (m37710_read_8_immediate(address+2)<<16);
12881277}
12891278
12901279UINT32 m37710_cpu_device::m37710i_read_24_direct(UINT32 address)
12911280{
1292   return   m37710i_read_16_direct(address)         |
1293         (m37710i_read_8_direct(address+2)<<16);
1281   return   m37710_read_16(address)         |
1282         (m37710_read_8(address+2)<<16);
12941283}
12951284
12961285
trunk/src/emu/cpu/m37710/m37710op.h
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767767#define OP_LDM(MODE)                                                        \
768768         CLK(CLK_OP + CLK_R8 + CLK_##MODE);  \
769769         REG_IM2 = EA_##MODE();      \
770         REG_IM = read_8_NORM(REG_PB|REG_PC);        \
770         REG_IM = read_8_IMM(REG_PB | REG_PC);        \
771771         REG_PC++;               \
772772         write_8_##MODE(REG_IM2, REG_IM)
773773#else
774774#define OP_LDM(MODE)                                                        \
775775         CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
776776         REG_IM2 = EA_##MODE();      \
777         REG_IM = read_16_NORM(REG_PB|REG_PC);       \
777         REG_IM = read_16_IMM(REG_PB | REG_PC);       \
778778         REG_PC+=2;              \
779779         write_16_##MODE(REG_IM2, REG_IM)
780780#endif
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785785#define OP_BBS(MODE)                                                        \
786786         CLK(CLK_OP + CLK_R8 + CLK_##MODE);  \
787787         REG_IM2 = read_8_NORM(EA_##MODE());     \
788         REG_IM = read_8_NORM(REG_PB | REG_PC);      \
788         REG_IM = read_8_IMM(REG_PB | REG_PC);      \
789789         REG_PC++;               \
790790         DST = OPER_8_IMM();         \
791791         if ((REG_IM2 & REG_IM) == REG_IM)   \
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798798#define OP_BBS(MODE)                                                        \
799799         CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
800800         REG_IM2 = read_16_NORM(EA_##MODE());    \
801         REG_IM = read_16_NORM(REG_PB | REG_PC);     \
801         REG_IM = read_16_IMM(REG_PB | REG_PC);     \
802802         REG_PC++;               \
803803         REG_PC++;               \
804804         DST = OPER_8_IMM();         \
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816816#define OP_BBC(MODE)                                                        \
817817         CLK(CLK_OP + CLK_R8 + CLK_##MODE);  \
818818         REG_IM2 = read_8_NORM(EA_##MODE());     \
819         REG_IM = read_8_NORM(REG_PB | REG_PC);      \
819         REG_IM = read_8_IMM(REG_PB | REG_PC);      \
820820         REG_PC++;               \
821821         DST = OPER_8_IMM();         \
822822         if ((REG_IM2 & REG_IM) == 0)        \
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829829#define OP_BBC(MODE)                                                        \
830830         CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
831831         REG_IM2 = read_16_NORM(EA_##MODE());    \
832         REG_IM = read_16_NORM(REG_PB | REG_PC);     \
832         REG_IM = read_16_IMM(REG_PB | REG_PC);     \
833833         REG_PC++;               \
834834         REG_PC++;               \
835835         DST = OPER_8_IMM();         \
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18201820         CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE);                          \
18211821         DST    = EA_##MODE();                                           \
18221822         REG_IM = read_8_##MODE(DST);                                    \
1823         REG_IM2 = read_8_NORM(REG_PB | REG_PC); \
1823         REG_IM2 = read_8_IMM(REG_PB | REG_PC); \
18241824         REG_PC++;           \
18251825         write_8_##MODE(DST, REG_IM & ~REG_IM2);
18261826#else
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18281828         CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE);                         \
18291829         DST    = EA_##MODE();                                           \
18301830         REG_IM = read_16_##MODE(DST);                                   \
1831         REG_IM2 = read_16_NORM(REG_PB | REG_PC);    \
1831         REG_IM2 = read_16_IMM(REG_PB | REG_PC);    \
18321832         REG_PC+=2;          \
18331833         write_16_##MODE(DST, REG_IM & ~REG_IM2);
18341834#endif
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18401840         CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE);                          \
18411841         DST    = EA_##MODE();                                           \
18421842         REG_IM = read_8_##MODE(DST);                                    \
1843         REG_IM2 = read_8_NORM(REG_PB | REG_PC); \
1843         REG_IM2 = read_8_IMM(REG_PB | REG_PC); \
18441844         REG_PC++;           \
18451845         write_8_##MODE(DST, REG_IM | REG_IM2);
18461846#else
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18481848         CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE);                         \
18491849         DST    = EA_##MODE();                                           \
18501850         REG_IM = read_16_##MODE(DST);                                   \
1851         REG_IM2 = read_16_NORM(REG_PB | REG_PC);    \
1851         REG_IM2 = read_16_IMM(REG_PB | REG_PC);    \
18521852         REG_PC+=2;          \
18531853         write_16_##MODE(DST, REG_IM | REG_IM2);
18541854#endif
trunk/src/emu/cpu/m37710/m37710.h
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159159   UINT32 m_source;        /* temp register */
160160   UINT32 m_destination;   /* temp register */
161161   address_space *m_program;
162   direct_read_data *m_direct;
162163   address_space *m_io;
163164   UINT32 m_stopped;       /* Sets how the CPU is stopped */
164165
trunk/src/emu/cpu/m37710/m37710cm.h
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2424#define M37710_CALL_DEBUGGER(x)         debugger_instruction_hook(this, x)
2525#define m37710_read_8(addr)             m_program->read_byte(addr)
2626#define m37710_write_8(addr,data)       m_program->write_byte(addr,data)
27#define m37710_read_8_immediate(A)      m_program->read_byte(A)
27#define m37710_read_8_immediate(A)      m_direct->read_decrypted_byte(A, BYTE_XOR_LE(0))
2828#define m37710_read_16(addr)            m_program->read_word(addr)
2929#define m37710_write_16(addr,data)      m_program->write_word(addr,data)
30#define m37710_read_16_immediate(A)     m_direct->read_decrypted_word(A)
3031#define m37710_jumping(A)
3132#define m37710_branching(A)
3233
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6465/* ================================== CPU ================================= */
6566/* ======================================================================== */
6667
67
68extern UINT32 m37710i_adc_tbl[];
69extern UINT32 m37710i_sbc_tbl[];
70
71
7268#define REG_A           m_a     /* Accumulator */
7369#define REG_B           m_b     /* Accumulator hi byte */
7470#define REG_BA          m_ba        /* Secondary Accumulator */

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