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r29650 Tuesday 15th April, 2014 at 04:44:20 UTC by Angelo Salese
Attempt to fix Last Bronx booting, still uses a shitload of unsupported opcodes, fun ...
[src/emu/cpu/sharc]compute.inc sharc.c sharc.h sharcmem.inc sharcops.inc
[src/mame/drivers]model2.c
[src/mame/includes]model2.h

trunk/src/mame/includes/model2.h
r29649r29650
168168   DECLARE_READ32_MEMBER(copro_tgp_buffer_r);
169169   DECLARE_WRITE32_MEMBER(copro_tgp_buffer_w);
170170   DECLARE_READ8_MEMBER(tgpid_r);
171   DECLARE_READ32_MEMBER(copro_status_r);
172
171173   DECLARE_READ8_MEMBER(driveio_port_r);
172174   DECLARE_WRITE8_MEMBER(driveio_port_w);
173175   DECLARE_READ8_MEMBER(driveio_port_str_r);
trunk/src/mame/drivers/model2.c
r29649r29650
1313   - desert: several 3d bugs, presumably down to FIFO;
1414   - dynamcop: stalls at stage select screen;
1515   - fvipers: enables timers, but then irq register is empty, hence it crashes with an "interrupt halt" at POST (regression);
16   - lastbrnx: uses external DMA port 0 for uploading SHARC program, hook-up might not be 100% right;
17   - lastbrnx: uses a shitload of unsupported SHARC opcodes (compute_fmul_avg, shift operation 0x11, ALU operation 0x89);
1618   - manxtt: missing 3d;
1719   - motoraid: stalls after course select;
1820   - pltkidsa: after few secs of gameplay, background 3d disappears and everything reports a collision against the player;
r29649r29650
732734   }
733735   else
734736   {
737//      if(m_coprocnt == 0)
738//         return;
739
735740      //mame_printf_debug("copro_fifo_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
736741      if (m_dsp_type == DSP_TYPE_SHARC)
737742         copro_fifoin_push(machine().device("dsp"), data);
r29649r29650
742747
743748WRITE32_MEMBER(model2_state::copro_sharc_iop_w)
744749{
745   /* FIXME: clean this up */
750   /* FIXME: clean this mess */
746751   if ((strcmp(machine().system().name, "schamp" ) == 0) ||
747752      (strcmp(machine().system().name, "sfight" ) == 0) ||
748753      (strcmp(machine().system().name, "fvipers" ) == 0) ||
r29649r29650
751756      (strcmp(machine().system().name, "gunblade" ) == 0) ||
752757      (strcmp(machine().system().name, "von" ) == 0) ||
753758      (strcmp(machine().system().name, "vonj" ) == 0) ||
754      (strcmp(machine().system().name, "rchase2" ) == 0))
759      (strcmp(machine().system().name, "rchase2" ) == 0) ||
760      (strcmp(machine().system().name, "lastbrnx" ) == 0) ||
761      (strcmp(machine().system().name, "lastbrnxu" ) == 0) ||
762      (strcmp(machine().system().name, "lastbrnxj" ) == 0))
755763   {
756764      machine().device<adsp21062_device>("dsp")->external_iop_write(offset, data);
757765   }
r29649r29650
14481456
14491457   AM_RANGE(0x00900000, 0x0097ffff) AM_RAM AM_SHARE("bufferram")
14501458
1451
14521459   AM_RANGE(0x00980004, 0x00980007) AM_READ(fifoctl_r)
14531460   AM_RANGE(0x0098000c, 0x0098000f) AM_READWRITE(videoctl_r,videoctl_w)
14541461   AM_RANGE(0x00980030, 0x0098003f) AM_READ8(tgpid_r,0xffffffff)
r29649r29650
15421549   AM_IMPORT_FROM(model2_base_mem)
15431550ADDRESS_MAP_END
15441551
1552/* TODO: read by Sonic the Fighters (bit 1), unknown purpose */
1553READ32_MEMBER(model2_state::copro_status_r)
1554{
1555   if(m_coprocnt == 0)
1556      return -1;
1557
1558   return 0;
1559}
1560
15451561/* 2A-CRX overrides */
15461562static ADDRESS_MAP_START( model2a_crx_mem, AS_PROGRAM, 32, model2_state )
15471563   AM_RANGE(0x00200000, 0x0023ffff) AM_RAM
r29649r29650
15521568
15531569   AM_RANGE(0x00980000, 0x00980003) AM_READWRITE(copro_ctl1_r,copro_ctl1_w)
15541570   AM_RANGE(0x00980008, 0x0098000b) AM_WRITE(geo_ctl1_w)
1571   AM_RANGE(0x00980014, 0x00980017) AM_READ(copro_status_r)
15551572   AM_RANGE(0x009c0000, 0x009cffff) AM_READWRITE(model2_serial_r, model2_serial_w )
15561573
15571574   AM_RANGE(0x12000000, 0x121fffff) AM_RAM_WRITE(model2o_tex_w0) AM_MIRROR(0x200000) AM_SHARE("textureram0")   // texture RAM 0
r29649r29650
15831600   AM_RANGE(0x008c0000, 0x008c0fff) AM_WRITE(copro_sharc_iop_w)
15841601
15851602   AM_RANGE(0x00980000, 0x00980003) AM_READWRITE(copro_ctl1_r,copro_ctl1_w)
1586
15871603   AM_RANGE(0x00980008, 0x0098000b) AM_WRITE(geo_ctl1_w)
1604   AM_RANGE(0x00980014, 0x00980017) AM_READ(copro_status_r)
15881605   //AM_RANGE(0x00980008, 0x0098000b) AM_WRITE(geo_sharc_ctl1_w )
15891606
15901607   AM_RANGE(0x009c0000, 0x009cffff) AM_READWRITE(model2_serial_r, model2_serial_w )
r29649r29650
16161633
16171634   AM_RANGE(0x00980000, 0x00980003) AM_READWRITE(copro_ctl1_r,copro_ctl1_w)
16181635   AM_RANGE(0x00980008, 0x0098000b) AM_WRITE(geo_ctl1_w )
1636   AM_RANGE(0x00980014, 0x00980017) AM_READ(copro_status_r)
16191637   AM_RANGE(0x009c0000, 0x009cffff) AM_READWRITE(model2_serial_r, model2_serial_w )
16201638
16211639   AM_RANGE(0x11000000, 0x111fffff) AM_RAM AM_SHARE("textureram0") // texture RAM 0 (2b/2c)
trunk/src/emu/cpu/sharc/sharcops.inc
r29649r29650
586586         break;
587587      }
588588
589      case 0x11: /* TODO */
590         break;
591
589592      case 0x12:      /* FEXT Rx BY <bit6>:<len6> (Sign Extended) */
590593      {
591594         UINT32 ext = (REG(rx) & MAKE_EXTRACT_MASK(bit, len)) >> bit;
r29649r29650
761764            break;
762765         }
763766
767         case 0x1c: /* TODO! fmul_avg */
768         {
769            compute_fmul_avg(fm, fxm, fym, fa, fxa, fya);
770            break;
771         }
772
764773         case 0x1e:      /* Fm = Fxm * Fym,   Fa = MAX(Fxa, Fya) */
765774         {
766775            compute_fmul_fmax(fm, fxm, fym, fa, fxa, fya);
trunk/src/emu/cpu/sharc/sharc.c
r29649r29650
144144   {
145145      case 0x00: break;       // System configuration
146146      case 0x02: break;       // External Memory Wait State Configuration
147      case 0x04: // External port DMA buffer 0
148      /* TODO: Last Bronx uses this to init program, shift and in */
149      {
150         UINT64 r = pm_read48(m_dma[6].int_index);
147151
152         r &= ~((UINT64)(0xffff) << (m_extdma_shift*16));
153         r |= ((UINT64)data & 0xffff) << (m_extdma_shift*16);
154
155         pm_write48(m_dma[6].int_index, r);
156
157         m_extdma_shift++;
158         if (m_extdma_shift == 3)
159         {
160            m_extdma_shift = 0;
161            m_dma[6].int_index ++;
162         }
163      }
164      break;
165
148166      case 0x08: break;       // Message Register 0
149167      case 0x09: break;       // Message Register 1
150168      case 0x0a: break;       // Message Register 2
r29649r29650
154172      case 0x0e: break;       // Message Register 6
155173      case 0x0f: break;       // Message Register 7
156174
175      case 0x14: // reserved??? written by Last Bronx
176      case 0x17: break;
177
157178      // DMA 6
158179      case 0x1c:
159180      {
r29649r29650
636657   }
637658
638659   m_pc = 0x20004;
660   m_extdma_shift = 0;
639661   m_daddr = m_pc + 1;
640662   m_faddr = m_daddr + 1;
641663   m_nfaddr = m_faddr+1;
trunk/src/emu/cpu/sharc/compute.inc
r29649r29650
12361236   /* TODO: AV flag */
12371237
12381238   FREG(fm) = r_mul.f;
1239   REG(fa) = alu_i; // TODO: check this, should be RA?
1240   m_astat |= AF;
1241}
1242
1243void adsp21062_device::compute_fmul_avg(int fm, int fxm, int fym, int fa, int fxa, int fya)
1244{
1245   INT32 alu_i;
1246   SHARC_REG r_mul, r_alu;
1247   r_mul.f = FREG(fxm) * FREG(fym);
1248   r_alu.f = (FREG(fxa) * FREG(fya))/((float) 2.0);
1249
1250   /* TODO: are flags right for this? */
1251   if (m_mode1 & MODE1_TRUNCATE)
1252   {
1253      alu_i = (INT32)(r_alu.f);
1254   }
1255   else
1256   {
1257      alu_i = (INT32)(r_alu.f < 0 ? (r_alu.f - 0.5f) : (r_alu.f + 0.5f));
1258   }
1259
1260   CLEAR_MULTIPLIER_FLAGS();
1261   SET_FLAG_MN(r_mul.r);
1262   /* TODO: MV flag */
1263   /* TODO: MU flag */
1264   /* TODO: MI flag */
1265
1266   CLEAR_ALU_FLAGS();
1267   SET_FLAG_AN(alu_i);
1268   // AZ
1269   SET_FLAG_AZ(alu_i);
1270   // AU
1271   m_stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0;
1272   // AI
1273   m_astat |= (IS_FLOAT_NAN(REG(fxa))) ? AI : 0;
1274   /* TODO: AV flag */
1275
1276   FREG(fm) = r_mul.f;
12391277   REG(fa) = alu_i;
12401278   m_astat |= AF;
12411279}
12421280
1243
12441281/* Fm = Fxm * Fym,   Fa = MAX(Fxa, Fya) */
12451282void adsp21062_device::compute_fmul_fmax(int fm, int fxm, int fym, int fa, int fxa, int fya)
12461283{
trunk/src/emu/cpu/sharc/sharc.h
r29649r29650
142142   SHARC_LADDR m_laddr;
143143   UINT32 m_curlcntr;
144144   UINT32 m_lcntr;
145   UINT8 m_extdma_shift;
145146
146147   /* Data Address Generator (DAG) */
147148   SHARC_DAG m_dag1;     // (DM bus)
r29649r29650
339340   inline void compute_fmul_fsub(int fm, int fxm, int fym, int fa, int fxa, int fya);
340341   inline void compute_fmul_float_scaled(int fm, int fxm, int fym, int fa, int fxa, int fya);
341342   inline void compute_fmul_fix_scaled(int fm, int fxm, int fym, int fa, int fxa, int fya);
343   inline void compute_fmul_avg(int fm, int fxm, int fym, int fa, int fxa, int fya);
342344   inline void compute_fmul_fmax(int fm, int fxm, int fym, int fa, int fxa, int fya);
343345   inline void compute_fmul_fmin(int fm, int fxm, int fym, int fa, int fxa, int fya);
344346   inline void compute_fmul_dual_fadd_fsub(int fm, int fxm, int fym, int fa, int fs, int fxa, int fya);
trunk/src/emu/cpu/sharc/sharcmem.inc
r29649r29650
1818                  (m_internal_ram_block1[addr + 1]);
1919   }
2020   else {
21      fatalerror("SHARC: PM Bus Read %08X at %08X\n", address, m_pc);
21      fatalerror("SHARC: PM Bus Read32 %08X at %08X\n", address, m_pc);
2222   }
2323}
2424
r29649r29650
4242      return;
4343   }
4444   else {
45      fatalerror("SHARC: PM Bus Write %08X, %08X at %08X\n", address, data, m_pc);
45      fatalerror("SHARC: PM Bus Write32 %08X, %08X at %08X\n", address, data, m_pc);
4646   }
4747}
4848
4949UINT64 adsp21062_device::pm_read48(UINT32 address)
5050{
51   if (address >= 0x20000 && address < 0x28000)
51   if ((address >= 0 && address < 0x8000) || (address >= 0x20000 && address < 0x28000))
5252   {
5353      UINT32 addr = (address & 0x7fff) * 3;
5454
r29649r29650
6666            ((UINT64)(m_internal_ram_block1[addr + 2]) << 0);
6767   }
6868   else {
69      fatalerror("SHARC: PM Bus Read %08X at %08X\n", address, m_pc);
69      //fatalerror("SHARC: PM Bus Read48 %08X at %08X\n", address, m_pc);
7070   }
7171
7272   return 0;
r29649r29650
7474
7575void adsp21062_device::pm_write48(UINT32 address, UINT64 data)
7676{
77   if (address >= 0x20000 && address < 0x28000)
77   if ((address >= 0 && address < 0x8000) || (address >= 0x20000 && address < 0x28000))
7878   {
7979      UINT32 addr = (address & 0x7fff) * 3;
8080
r29649r29650
9494      return;
9595   }
9696   else {
97      fatalerror("SHARC: PM Bus Write %08X, %04X%08X at %08X\n", address, (UINT16)(data >> 32),(UINT32)data, m_pc);
97      //fatalerror("SHARC: PM Bus Write48 %08X, %04X%08X at %08X\n", address, (UINT16)(data >> 32),(UINT32)data, m_pc);
9898   }
9999}
100100

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