trunk/src/mame/drivers/model2.c
| r29618 | r29619 | |
| 361 | 361 | m_timers[tnum]->reset(); |
| 362 | 362 | |
| 363 | 363 | m_intreq |= (1<<bit); |
| 364 | if(m_intena & 1<<bit) |
| 365 | m_maincpu->set_input_line(I960_IRQ2, ASSERT_LINE); |
| 364 | 366 | //printf("%08x %08x (%08x)\n",m_intreq,m_intena,1<<bit); |
| 365 | 367 | model2_check_irq_state(); |
| 366 | 368 | |
| r29618 | r29619 | |
| 1027 | 1029 | |
| 1028 | 1030 | void model2_state::model2_check_irq_state() |
| 1029 | 1031 | { |
| 1032 | return; |
| 1033 | |
| 1034 | /* TODO: vf2 and fvipers hangs with an irq halt on POST, disabled for now */ |
| 1030 | 1035 | const int irq_type[12]= {I960_IRQ0,I960_IRQ1,I960_IRQ2,I960_IRQ2,I960_IRQ2,I960_IRQ2,I960_IRQ2,I960_IRQ2,I960_IRQ2,I960_IRQ2,I960_IRQ3,I960_IRQ3}; |
| 1031 | 1036 | |
| 1032 | 1037 | for(int i=0;i<12;i++) |
| r29618 | r29619 | |
| 1420 | 1425 | model2_3d_set_zclip( machine(), data & 0xFF ); |
| 1421 | 1426 | } |
| 1422 | 1427 | |
| 1428 | READ32_MEMBER(model2_state::tgpid_r) |
| 1429 | { |
| 1430 | popmessage("Read from TGP ID, contact MAMEdev"); |
| 1431 | return 0; |
| 1432 | } |
| 1433 | |
| 1423 | 1434 | /* common map for all Model 2 versions */ |
| 1424 | 1435 | static ADDRESS_MAP_START( model2_base_mem, AS_PROGRAM, 32, model2_state ) |
| 1425 | 1436 | AM_RANGE(0x00000000, 0x001fffff) AM_ROM AM_WRITENOP |
| r29618 | r29619 | |
| 1438 | 1449 | |
| 1439 | 1450 | AM_RANGE(0x00980004, 0x00980007) AM_READ(fifoctl_r) |
| 1440 | 1451 | AM_RANGE(0x0098000c, 0x0098000f) AM_READWRITE(videoctl_r,videoctl_w) |
| 1452 | AM_RANGE(0x00980030, 0x0098005f) AM_READ(tgpid_r) |
| 1441 | 1453 | |
| 1442 | 1454 | AM_RANGE(0x00e80000, 0x00e80007) AM_READWRITE(model2_irq_r, model2_irq_w) |
| 1443 | 1455 | |
| r29618 | r29619 | |
| 2009 | 2021 | if(scanline == 384) |
| 2010 | 2022 | { |
| 2011 | 2023 | m_intreq |= (1<<0); |
| 2024 | if(m_intena & 1<<0) |
| 2025 | m_maincpu->set_input_line(I960_IRQ0, ASSERT_LINE); |
| 2012 | 2026 | model2_check_irq_state(); |
| 2013 | 2027 | } |
| 2014 | 2028 | else if(scanline == 0) |
| 2015 | 2029 | { |
| 2016 | 2030 | /* From sound to main CPU (TODO: what enables this?) */ |
| 2017 | 2031 | m_intreq |= (1<<10); |
| 2032 | if(m_intena & 1<<10) |
| 2033 | m_maincpu->set_input_line(I960_IRQ3, ASSERT_LINE); |
| 2018 | 2034 | model2_check_irq_state(); |
| 2019 | 2035 | } |
| 2020 | 2036 | } |
| r29618 | r29619 | |
| 2026 | 2042 | if(scanline == 384) |
| 2027 | 2043 | { |
| 2028 | 2044 | m_intreq |= (1<<0); |
| 2045 | if(m_intena & 1<<0) |
| 2046 | m_maincpu->set_input_line(I960_IRQ0, ASSERT_LINE); |
| 2029 | 2047 | model2_check_irq_state(); |
| 2030 | 2048 | } |
| 2031 | 2049 | else if(scanline == 0) // 384 |
| 2032 | 2050 | { |
| 2033 | 2051 | m_intreq |= (1<<10); |
| 2052 | if(m_intena & 1<<10) |
| 2053 | m_maincpu->set_input_line(I960_IRQ3, ASSERT_LINE); |
| 2034 | 2054 | model2_check_irq_state(); |
| 2035 | 2055 | } |
| 2036 | 2056 | else if(scanline == 256) |
| 2037 | 2057 | { |
| 2038 | | /* TODO: irq source? Source allocation in dynamcopc? */ |
| 2058 | /* TODO: irq source? Scroll allocation in dynamcopc? */ |
| 2039 | 2059 | m_intreq |= (1<<2); |
| 2060 | if(m_intena & 1<<2) |
| 2061 | m_maincpu->set_input_line(I960_IRQ2, ASSERT_LINE); |
| 2040 | 2062 | model2_check_irq_state(); |
| 2041 | 2063 | } |
| 2042 | 2064 | |