trunk/src/emu/cpu/m68000/m68kcpu.c
| r29584 | r29585 | |
| 677 | 677 | static void m68k_postload(m68000_base_device *m68k) |
| 678 | 678 | { |
| 679 | 679 | m68ki_set_sr_noint_nosp(m68k, m68k->save_sr); |
| 680 | fprintf(stderr, "Reloaded, pc=%x\n", REG_PC(m68k)); |
| 680 | 681 | m68k->stopped = (m68k->save_stopped ? STOP_LEVEL_STOP : 0) | (m68k->save_halted ? STOP_LEVEL_HALT : 0); |
| 681 | 682 | m68ki_jump(m68k, REG_PC(m68k)); |
| 682 | 683 | } |
| r29584 | r29585 | |
| 991 | 992 | save_item(NAME(save_halted)); |
| 992 | 993 | save_item(NAME(pref_addr)); |
| 993 | 994 | save_item(NAME(pref_data)); |
| 995 | save_item(NAME(reset_cycles)); |
| 996 | save_item(NAME(nmi_pending)); |
| 997 | save_item(NAME(has_pmmu)); |
| 998 | save_item(NAME(has_hmmu)); |
| 999 | save_item(NAME(pmmu_enabled)); |
| 1000 | save_item(NAME(hmmu_enabled)); |
| 1001 | |
| 1002 | save_item(NAME(mmu_crp_aptr)); |
| 1003 | save_item(NAME(mmu_crp_limit)); |
| 1004 | save_item(NAME(mmu_srp_aptr)); |
| 1005 | save_item(NAME(mmu_srp_limit)); |
| 1006 | save_item(NAME(mmu_urp_aptr)); |
| 1007 | save_item(NAME(mmu_tc)); |
| 1008 | save_item(NAME(mmu_sr)); |
| 1009 | save_item(NAME(mmu_sr_040)); |
| 1010 | save_item(NAME(mmu_atc_rr)); |
| 1011 | save_item(NAME(mmu_tt0)); |
| 1012 | save_item(NAME(mmu_tt1)); |
| 1013 | save_item(NAME(mmu_itt0)); |
| 1014 | save_item(NAME(mmu_itt1)); |
| 1015 | save_item(NAME(mmu_dtt0)); |
| 1016 | save_item(NAME(mmu_dtt1)); |
| 1017 | save_item(NAME(mmu_acr0)); |
| 1018 | save_item(NAME(mmu_acr1)); |
| 1019 | save_item(NAME(mmu_acr2)); |
| 1020 | save_item(NAME(mmu_acr3)); |
| 1021 | |
| 1022 | for (int i=0; i<MMU_ATC_ENTRIES;i++) { |
| 1023 | save_item(NAME(mmu_atc_tag[i]), i); |
| 1024 | save_item(NAME(mmu_atc_data[i]), i); |
| 1025 | } |
| 1026 | |
| 994 | 1027 | machine().save().register_presave(save_prepost_delegate(FUNC(m68k_presave), this)); |
| 995 | 1028 | machine().save().register_postload(save_prepost_delegate(FUNC(m68k_postload), this)); |
| 996 | 1029 | |
trunk/src/mess/drivers/next.c
| r29584 | r29585 | |
| 824 | 824 | save_item(NAME(irq_level)); |
| 825 | 825 | save_item(NAME(phy)); |
| 826 | 826 | save_item(NAME(scsictrl)); |
| 827 | save_item(NAME(scsistat)); |
| 827 | 828 | save_item(NAME(timer_tbase)); |
| 828 | 829 | save_item(NAME(timer_vbase)); |
| 829 | 830 | save_item(NAME(timer_data)); |
| 831 | save_item(NAME(timer_next_data)); |
| 830 | 832 | save_item(NAME(timer_ctrl)); |
| 831 | 833 | save_item(NAME(eventc_latch)); |
| 834 | save_item(NAME(esp)); |
| 832 | 835 | |
| 836 | for(int i=0; i<0x20; i++) { |
| 837 | save_item(NAME(dma_slots[i].start), i); |
| 838 | save_item(NAME(dma_slots[i].limit), i); |
| 839 | save_item(NAME(dma_slots[i].chain_start), i); |
| 840 | save_item(NAME(dma_slots[i].chain_limit), i); |
| 841 | save_item(NAME(dma_slots[i].current), i); |
| 842 | save_item(NAME(dma_slots[i].state), i); |
| 843 | save_item(NAME(dma_slots[i].supdate), i); |
| 844 | save_item(NAME(dma_slots[i].restart), i); |
| 845 | save_item(NAME(dma_slots[i].drq), i); |
| 846 | } |
| 847 | |
| 833 | 848 | timer_tm = timer_alloc(0); |
| 834 | 849 | } |
| 835 | 850 | |
| r29584 | r29585 | |
| 841 | 856 | irq_level = 0; |
| 842 | 857 | esp = 0; |
| 843 | 858 | scsictrl = 0; |
| 859 | scsistat = 0; |
| 844 | 860 | phy[0] = phy[1] = 0; |
| 845 | 861 | eventc_latch = 0; |
| 846 | 862 | timer_vbase = 0; |