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r29575 Saturday 12th April, 2014 at 20:18:48 UTC by Fabio Priuli
k033906: converted to use inline configs. nw. k056230: converted to use inline configs. nw.

[src/emu/machine]	k033906.c k033906.h k056230.c k056230.h
[src/mame/drivers]	gticlub.c hornet.c nwk-tr.c zr107.c
[src/mame/machine]	konppc.c

trunk/src/emu/machine/k056230.c

r29574	r29575
20	20	//-------------------------------------------------
21	21
22	22	k056230_device::k056230_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
23		: device_t(mconfig, K056230, "Konami 056230", tag, owner, clock, "k056230", __FILE__)
	23	: device_t(mconfig, K056230, "Konami 056230", tag, owner, clock, "k056230", __FILE__),
	24	m_is_thunderh(0),
	25	m_cpu(*this)
24	26	{
25	27	}
26	28
27	29
28	30	//-------------------------------------------------
29		//  device_config_complete - perform any
30		//  operations now that the configuration is
31		//  complete
32		//-------------------------------------------------
33
34		void k056230_device::device_config_complete()
35		{
36		// inherit a copy of the static data
37		const k056230_interface *intf = reinterpret_cast<const k056230_interface *>(static_config());
38		if (intf != NULL)
39		{
40		*static_cast<k056230_interface *>(this) = *intf;
41		}
42
43		// or initialize to defaults if none provided
44		else
45		{
46		m_cpu_tag = NULL;
47		m_is_thunderh = false;
48		}
49		}
50
51
52		//-------------------------------------------------
53	31	//  device_start - device-specific startup
54	32	//-------------------------------------------------
55	33
56	34	void k056230_device::device_start()
57	35	{
58		if(m_cpu_tag)
59		{
60		m_cpu = machine().device(m_cpu_tag);
61		}
62		else
63		{
64		m_cpu = NULL;
65		}
66
67	36	save_item(NAME(m_ram));
68	37	}
69	38
70	39
71		READ8_MEMBER(k056230_device::k056230_r)
	40	READ8_MEMBER(k056230_device::read)
72	41	{
73	42	switch (offset)
74	43	{
r29574	r29575
90	59
91	60	void k056230_device::network_irq_clear()
92	61	{
93		if(m_cpu)
94		{
95		m_cpu->execute().set_input_line(INPUT_LINE_IRQ2, CLEAR_LINE);
96		}
	62	if (m_cpu)
	63	m_cpu->set_input_line(INPUT_LINE_IRQ2, CLEAR_LINE);
97	64	}
98	65
99	66
100		WRITE8_MEMBER(k056230_device::k056230_w)
	67	WRITE8_MEMBER(k056230_device::write)
101	68	{
102	69	switch(offset)
103	70	{
r29574	r29575
110	77	if(data & 0x20)
111	78	{
112	79	// Thunder Hurricane breaks otherwise...
113		if(!m_is_thunderh)
	80	if (!m_is_thunderh)
114	81	{
115		if(m_cpu)
116		{
117		m_cpu->execute().set_input_line(INPUT_LINE_IRQ2, ASSERT_LINE);
118		}
	82	if (m_cpu)
	83	m_cpu->set_input_line(INPUT_LINE_IRQ2, ASSERT_LINE);
	84
119	85	machine().scheduler().timer_set(attotime::from_usec(10), FUNC(network_irq_clear_callback), 0, (void*)this);
120	86	}
121	87	}
122	88	//          else
123		//              k056230->cpu->execute().set_input_line(INPUT_LINE_IRQ2, CLEAR_LINE);
	89	//              m_cpu->set_input_line(INPUT_LINE_IRQ2, CLEAR_LINE);
124	90	break;
125	91	}
126	92	case 2:     // Sub ID register

trunk/src/emu/machine/k056230.h

r29574	r29575
17	17	DEVICE CONFIGURATION MACROS
18	18	***************************************************************************/
19	19
20		#define MCFG_K056230_ADD(_tag, _config) \
21		MCFG_DEVICE_ADD(_tag, K056230, 0) \
22		MCFG_DEVICE_CONFIG(_config)
	20	#define MCFG_K056230_CPU(_tag) \
	21	k056230_device::set_cpu_tag(*device, "^"_tag);
23	22
	23	#define MCFG_K056230_HACK(_region) \
	24	k056230_device::set_thunderh_hack(*device, _region);
24	25
	26
25	27	/***************************************************************************
26	28	TYPE DEFINITIONS
27	29	***************************************************************************/
28	30
29
30		// ======================> k056230_interface
31
32		struct k056230_interface
33		{
34		const char         *m_cpu_tag;
35		bool                m_is_thunderh;
36		};
37
38
39
40	31	// ======================> k056230_device
41	32
42		class k056230_device :  public device_t,
43		public k056230_interface
	33	class k056230_device :  public device_t
44	34	{
45	35	public:
46	36	// construction/destruction
47	37	k056230_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
48	38
	39	static void set_cpu_tag(device_t &device, const char *tag) { downcast<k056230_device &>(device).m_cpu.set_tag(tag); }
	40	static void set_thunderh_hack(device_t &device, int thunderh) { downcast<k056230_device &>(device).m_is_thunderh = thunderh; }
	41
49	42	DECLARE_READ32_MEMBER(lanc_ram_r);
50	43	DECLARE_WRITE32_MEMBER(lanc_ram_w);
51	44
52		DECLARE_READ8_MEMBER(k056230_r);
53		DECLARE_WRITE8_MEMBER(k056230_w);
	45	DECLARE_READ8_MEMBER(read);
	46	DECLARE_WRITE8_MEMBER(write);
54	47
55	48	static TIMER_CALLBACK( network_irq_clear_callback );
56	49
57	50	protected:
58	51	// device-level overrides
59		virtual void device_config_complete();
60	52	virtual void device_start();
61	53	virtual void device_reset() { }
62	54	virtual void device_post_load() { }
r29574	r29575
65	57	private:
66	58
67	59	void network_irq_clear();
	60	int m_is_thunderh;
68	61
69		device_t *m_cpu;
	62	required_device<cpu_device> m_cpu;
70	63	UINT32 m_ram[0x2000];
71	64	};
72	65

trunk/src/emu/machine/k033906.c

r29574	r29575
26	26	}
27	27
28	28	//-------------------------------------------------
29		//  device_config_complete - perform any
30		//  operations now that the configuration is
31		//  complete
32		//-------------------------------------------------
33
34		void k033906_device::device_config_complete()
35		{
36		// inherit a copy of the static data
37		const k033906_interface *intf = reinterpret_cast<const k033906_interface *>(static_config());
38		if (intf != NULL)
39		{
40		*static_cast<k033906_interface *>(this) = *intf;
41		}
42
43		// or initialize to defaults if none provided
44		else
45		{
46		m_voodoo_tag = NULL;
47		}
48		}
49
50
51		//-------------------------------------------------
52	29	//  device_start - device-specific startup
53	30	//-------------------------------------------------
54	31
r29574	r29575
64	41	}
65	42
66	43
67		WRITE_LINE_MEMBER(k033906_device::k033906_set_reg)
	44	WRITE_LINE_MEMBER(k033906_device::set_reg)
68	45	{
69	46	m_reg_set = state & 1;
70	47	}
71	48
72		UINT32 k033906_device::k033906_reg_r(int reg)
	49	UINT32 k033906_device::reg_r(int reg)
73	50	{
74	51	switch (reg)
75	52	{
r29574	r29575
84	61	return 0;
85	62	}
86	63
87		void k033906_device::k033906_reg_w(int reg, UINT32 data)
	64	void k033906_device::reg_w(int reg, UINT32 data)
88	65	{
89	66	switch (reg)
90	67	{
r29574	r29575
131	108	}
132	109	}
133	110
134		READ32_MEMBER(k033906_device::k033906_r)
	111	READ32_MEMBER(k033906_device::read)
135	112	{
136		if(m_reg_set)
137		{
138		return k033906_reg_r(offset);
139		}
	113	if (m_reg_set)
	114	return reg_r(offset);
140	115	else
141		{
142	116	return m_ram[offset];
143		}
144	117	}
145	118
146		WRITE32_MEMBER(k033906_device::k033906_w)
	119	WRITE32_MEMBER(k033906_device::write)
147	120	{
148		if(m_reg_set)
149		{
150		k033906_reg_w(offset, data);
151		}
	121	if (m_reg_set)
	122	reg_w(offset, data);
152	123	else
153		{
154	124	m_ram[offset] = data;
155		}
156	125	}

trunk/src/emu/machine/k033906.h

r29574	r29575
17	17	DEVICE CONFIGURATION MACROS
18	18	***************************************************************************/
19	19
20		#define MCFG_K033906_ADD(_tag, _config) \
21		MCFG_DEVICE_ADD(_tag, K033906, 0) \
22		MCFG_DEVICE_CONFIG(_config)
	20	#define MCFG_K033906_VOODOO(_tag) \
	21	k033906_device::set_voodoo_tag(*device, _tag);
23	22
24
25	23	/***************************************************************************
26	24	TYPE DEFINITIONS
27	25	***************************************************************************/
28	26
29	27
30		// ======================> k033906_interface
31
32		struct k033906_interface
33		{
34		const char         *m_voodoo_tag;
35		};
36
37
38
39	28	// ======================> k033906_device
40	29
41		class k033906_device :  public device_t,
42		public k033906_interface
	30	class k033906_device :  public device_t
43	31	{
44	32	public:
45	33	// construction/destruction
46	34	k033906_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
47	35
48		DECLARE_READ32_MEMBER( k033906_r );
49		DECLARE_WRITE32_MEMBER( k033906_w );
50		DECLARE_WRITE_LINE_MEMBER( k033906_set_reg );
	36	static void set_voodoo_tag(device_t &device, const char *tag) { downcast<k033906_device &>(device).m_voodoo_tag = tag; }
51	37
	38	DECLARE_READ32_MEMBER( read );
	39	DECLARE_WRITE32_MEMBER( write );
	40	DECLARE_WRITE_LINE_MEMBER( set_reg );
	41
52	42	protected:
53	43	// device-level overrides
54		virtual void device_config_complete();
55	44	virtual void device_start();
56	45	virtual void device_reset() { }
57	46	virtual void device_post_load() { }
r29574	r29575
59	48
60	49	private:
61	50
62		UINT32 k033906_reg_r(int reg);
63		void k033906_reg_w(int reg, UINT32 data);
	51	UINT32 reg_r(int reg);
	52	void reg_w(int reg, UINT32 data);
64	53
65	54	/* i/o lines */
66	55
67	56	int          m_reg_set; // 1 = access reg / 0 = access ram
68	57
69		device_t *m_voodoo;
	58	const char   *m_voodoo_tag;
	59	device_t     *m_voodoo;
70	60
71	61	UINT32       m_reg[256];
72	62	UINT32       m_ram[32768];

trunk/src/mame/drivers/nwk-tr.c

r29574	r29575
709	709	};
710	710
711	711
712		static const k033906_interface nwktr_k033906_interface =
713		{
714		"voodoo"
715		};
716
717	712	void nwktr_state::machine_reset()
718	713	{
719	714	m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
r29574	r29575
747	742
748	743	MCFG_M48T58_ADD( "m48t58" )
749	744	MCFG_ADC12138_ADD( "adc12138", nwktr_adc_interface )
750		MCFG_K033906_ADD("k033906_1", nwktr_k033906_interface)
751	745
	746	MCFG_DEVICE_ADD("k033906_1", K033906, 0)
	747	MCFG_K033906_VOODOO("voodoo")
	748
752	749	/* video hardware */
753	750	MCFG_3DFX_VOODOO_1_ADD("voodoo", STD_VOODOO_1_CLOCK, voodoo_intf)
754	751

trunk/src/mame/drivers/hornet.c

r29574	r29575
948	948	adc12138_input_callback
949	949	};
950	950
951		static const k033906_interface hornet_k033906_intf_0 =
952		{
953		"voodoo0"
954		};
955
956		static const k033906_interface hornet_k033906_intf_1 =
957		{
958		"voodoo1"
959		};
960
961	951	static const voodoo_config hornet_voodoo_intf =
962	952	{
963	953	2, //               fbmem;
r29574	r29575
990	980
991	981	MCFG_3DFX_VOODOO_1_ADD("voodoo0", STD_VOODOO_1_CLOCK, hornet_voodoo_intf)
992	982
993		MCFG_K033906_ADD("k033906_1", hornet_k033906_intf_0)
	983	MCFG_DEVICE_ADD("k033906_1", K033906, 0)
	984	MCFG_K033906_VOODOO("voodoo0")
994	985
995	986	/* video hardware */
996	987	MCFG_SCREEN_ADD("screen", RASTER)
r29574	r29575
1086	1077	MCFG_3DFX_VOODOO_1_ADD("voodoo0", STD_VOODOO_1_CLOCK, voodoo_l_intf)
1087	1078	MCFG_3DFX_VOODOO_1_ADD("voodoo1", STD_VOODOO_1_CLOCK, voodoo_r_intf)
1088	1079
1089		MCFG_K033906_ADD("k033906_2", hornet_k033906_intf_1)
	1080	MCFG_DEVICE_ADD("k033906_2", K033906, 0)
	1081	MCFG_K033906_VOODOO("voodoo1")
1090	1082
1091	1083	/* video hardware */
1092	1084	MCFG_PALETTE_MODIFY("palette")

trunk/src/mame/drivers/zr107.c

r29574	r29575
449	449	AM_RANGE(0x78040000, 0x7804000f) AM_READWRITE_LEGACY(K001006_0_r, K001006_0_w)
450	450	AM_RANGE(0x780c0000, 0x780c0007) AM_READWRITE_LEGACY(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
451	451	AM_RANGE(0x7e000000, 0x7e003fff) AM_READWRITE8(sysreg_r, sysreg_w, 0xffffffff)
452		AM_RANGE(0x7e008000, 0x7e009fff) AM_DEVREADWRITE8("k056230", k056230_device, k056230_r, k056230_w, 0xffffffff)               /* LANC registers */
	452	AM_RANGE(0x7e008000, 0x7e009fff) AM_DEVREADWRITE8("k056230", k056230_device, read, write, 0xffffffff)               /* LANC registers */
453	453	AM_RANGE(0x7e00a000, 0x7e00bfff) AM_DEVREADWRITE("k056230", k056230_device, lanc_ram_r, lanc_ram_w)      /* LANC Buffer RAM (27E) */
454	454	AM_RANGE(0x7e00c000, 0x7e00c00f) AM_DEVREADWRITE8("k056800", k056800_device, host_r, host_w, 0xffffffff)
455	455	AM_RANGE(0x7f800000, 0x7f9fffff) AM_ROM AM_SHARE("share2")
r29574	r29575
476	476	AM_RANGE(0x78080000, 0x7808000f) AM_MIRROR(0x80000000) AM_READWRITE_LEGACY(K001006_1_r, K001006_1_w)
477	477	AM_RANGE(0x780c0000, 0x780c0007) AM_MIRROR(0x80000000) AM_READWRITE_LEGACY(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
478	478	AM_RANGE(0x7e000000, 0x7e003fff) AM_MIRROR(0x80000000) AM_READWRITE8(sysreg_r, sysreg_w, 0xffffffff)
479		AM_RANGE(0x7e008000, 0x7e009fff) AM_MIRROR(0x80000000) AM_DEVREADWRITE8("k056230", k056230_device, k056230_r, k056230_w, 0xffffffff)             /* LANC registers */
	479	AM_RANGE(0x7e008000, 0x7e009fff) AM_MIRROR(0x80000000) AM_DEVREADWRITE8("k056230", k056230_device, read, write, 0xffffffff)             /* LANC registers */
480	480	AM_RANGE(0x7e00a000, 0x7e00bfff) AM_MIRROR(0x80000000) AM_DEVREADWRITE("k056230", k056230_device, lanc_ram_r, lanc_ram_w)    /* LANC Buffer RAM (27E) */
481	481	AM_RANGE(0x7e00c000, 0x7e00c00f) AM_MIRROR(0x80000000) AM_DEVREADWRITE8("k056800", k056800_device, host_r, host_w, 0xffffffff)
482	482	AM_RANGE(0x7f000000, 0x7f3fffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION("user2", 0)
r29574	r29575
721	721	game_tile_callback, "none"
722	722	};
723	723
724		static const k056230_interface zr107_k056230_intf =
725		{
726		"maincpu",
727		0
728		};
729
730	724	/* PowerPC interrupts
731	725
732	726	IRQ0:  Vblank
r29574	r29575
762	756
763	757	MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
764	758
765		MCFG_K056230_ADD("k056230", zr107_k056230_intf)
	759	MCFG_DEVICE_ADD("k056230", K056230, 0)
	760	MCFG_K056230_CPU("maincpu")
766	761
767	762	/* video hardware */
768	763	MCFG_SCREEN_ADD("screen", RASTER)
r29574	r29575
818	813
819	814	MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
820	815
821		MCFG_K056230_ADD("k056230", zr107_k056230_intf)
	816	MCFG_DEVICE_ADD("k056230", K056230, 0)
	817	MCFG_K056230_CPU("maincpu")
822	818
823	819	/* video hardware */
824	820	MCFG_SCREEN_ADD("screen", RASTER)

trunk/src/mame/drivers/gticlub.c

r29574	r29575
480	480	AM_RANGE(0x78080000, 0x7808000f) AM_READWRITE_LEGACY(K001006_1_r, K001006_1_w)
481	481	AM_RANGE(0x780c0000, 0x780c0003) AM_READWRITE_LEGACY(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
482	482	AM_RANGE(0x7e000000, 0x7e003fff) AM_READWRITE8(sysreg_r, sysreg_w, 0xffffffff)
483		AM_RANGE(0x7e008000, 0x7e009fff) AM_DEVREADWRITE8("k056230", k056230_device, k056230_r, k056230_w, 0xffffffff)
	483	AM_RANGE(0x7e008000, 0x7e009fff) AM_DEVREADWRITE8("k056230", k056230_device, read, write, 0xffffffff)
484	484	AM_RANGE(0x7e00a000, 0x7e00bfff) AM_DEVREADWRITE("k056230", k056230_device, lanc_ram_r, lanc_ram_w)
485	485	AM_RANGE(0x7e00c000, 0x7e00c00f) AM_DEVREADWRITE8("k056800", k056800_device, host_r, host_w, 0xffffffff)
486	486	AM_RANGE(0x7f000000, 0x7f3fffff) AM_ROM AM_REGION("user2", 0)   /* Data ROM */
r29574	r29575
780	780	adc1038_input_callback
781	781	};
782	782
783		static const k056230_interface gticlub_k056230_intf =
784		{
785		"maincpu",
786		0
787		};
788	783
789		static const k056230_interface thunderh_k056230_intf =
790		{
791		"maincpu",
792		1
793		};
794
795
796	784	MACHINE_RESET_MEMBER(gticlub_state,gticlub)
797	785	{
798	786	m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
r29574	r29575
940	928
941	929	MCFG_ADC1038_ADD("adc1038", gticlub_adc1038_intf)
942	930
943		MCFG_K056230_ADD("k056230", gticlub_k056230_intf)
	931	MCFG_DEVICE_ADD("k056230", K056230, 0)
	932	MCFG_K056230_CPU("maincpu")
944	933
945	934	/* video hardware */
946	935	MCFG_SCREEN_ADD("screen", RASTER)
r29574	r29575
980	969	MCFG_ADC1038_ADD("adc1038", thunderh_adc1038_intf)
981	970
982	971	MCFG_DEVICE_REMOVE("k056230")
983		MCFG_K056230_ADD("k056230", thunderh_k056230_intf)
	972	MCFG_DEVICE_ADD("k056230", K056230, 0)
	973	MCFG_K056230_CPU("maincpu")
	974	MCFG_K056230_HACK(1)
984	975	MACHINE_CONFIG_END
985	976
986	977	static MACHINE_CONFIG_DERIVED( slrasslt, gticlub )
r29574	r29575
1001	992	MACHINE_CONFIG_END
1002	993
1003	994
1004		static const k033906_interface hangplt_k033906_intf_0 =
1005		{
1006		"voodoo0"
1007		};
1008
1009		static const k033906_interface hangplt_k033906_intf_1 =
1010		{
1011		"voodoo1"
1012		};
1013
1014	995	MACHINE_RESET_MEMBER(gticlub_state,hangplt)
1015	996	{
1016	997	m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
r29574	r29575
1064	1045	MCFG_MACHINE_RESET_OVERRIDE(gticlub_state,hangplt)
1065	1046
1066	1047	MCFG_ADC1038_ADD("adc1038", thunderh_adc1038_intf)
1067		MCFG_K056230_ADD("k056230", gticlub_k056230_intf)
1068	1048
	1049	MCFG_DEVICE_ADD("k056230", K056230, 0)
	1050	MCFG_K056230_CPU("maincpu")
	1051
1069	1052	MCFG_3DFX_VOODOO_1_ADD("voodoo0", STD_VOODOO_1_CLOCK, voodoo_l_intf)
1070	1053	MCFG_3DFX_VOODOO_1_ADD("voodoo1", STD_VOODOO_1_CLOCK, voodoo_r_intf)
1071	1054
1072		MCFG_K033906_ADD("k033906_1", hangplt_k033906_intf_0)
1073		MCFG_K033906_ADD("k033906_2", hangplt_k033906_intf_1)
	1055	MCFG_DEVICE_ADD("k033906_1", K033906, 0)
	1056	MCFG_K033906_VOODOO("voodoo0")
1074	1057
	1058	MCFG_DEVICE_ADD("k033906_2", K033906, 0)
	1059	MCFG_K033906_VOODOO("voodoo1")
	1060
1075	1061	/* video hardware */
1076	1062	MCFG_PALETTE_ADD("palette", 65536)
1077	1063

trunk/src/mame/machine/konppc.c

r29574	r29575
158	158	dsp_state[cgboard_id] |= 0x10;
159	159
160	160	if (k033906 != NULL)    /* zr107.c has no PCI and some games only have one PCI Bridge */
161		k033906->k033906_set_reg((data & 0x20000000) ? 1 : 0);
	161	k033906->set_reg((data & 0x20000000) ? 1 : 0);
162	162
163	163	if (data & 0x10000000)
164	164	dsp->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
r29574	r29575
413	413	if (nwk_device_sel[0] & 0x01)
414	414	return nwk_fifo_r(space, 0);
415	415	else
416		return k033906_1->k033906_r(space, offset, mem_mask);
	416	return k033906_1->read(space, offset, mem_mask);
417	417	}
418	418
419	419	WRITE32_HANDLER( K033906_0_w )
420	420	{
421	421	k033906_device *k033906_1 = space.machine().device<k033906_device>("k033906_1");
422		k033906_1->k033906_w(space, offset, data, mem_mask);
	422	k033906_1->write(space, offset, data, mem_mask);
423	423	}
424	424
425	425	READ32_HANDLER( K033906_1_r )
r29574	r29575
428	428	if (nwk_device_sel[1] & 0x01)
429	429	return nwk_fifo_r(space, 1);
430	430	else
431		return k033906_2->k033906_r(space, offset, mem_mask);
	431	return k033906_2->read(space, offset, mem_mask);
432	432	}
433	433
434	434	WRITE32_HANDLER(K033906_1_w)
435	435	{
436	436	k033906_device *k033906_2 = space.machine().device<k033906_device>("k033906_2");
437		k033906_2->k033906_w(space, offset, data, mem_mask);
	437	k033906_2->write(space, offset, data, mem_mask);
438	438	}
439	439
440	440	/*****************************************************************************/

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