trunk/src/mess/drivers/oric.c
| r29567 | r29568 | |
| 12 | 12 | Pravetz is a Bulgarian copy of the Oric Atmos and uses |
| 13 | 13 | Apple 2 disc drives for storage. |
| 14 | 14 | |
| 15 | | This driver originally by Paul Cook, rewritten by Kevin Thacker. |
| 15 | This driver originally by Paul Cook, rewritten by Kevin Thacker, |
| 16 | re-rewritten by Olivier Galibert. |
| 16 | 17 | |
| 17 | 18 | *********************************************************************/ |
| 18 | 19 | |
| 19 | | #include "includes/oric.h" |
| 20 | #include "emu.h" |
| 21 | #include "bus/oricext/oricext.h" |
| 22 | #include "cpu/m6502/m6502.h" |
| 23 | #include "sound/ay8910.h" |
| 24 | #include "sound/wave.h" |
| 25 | #include "machine/6522via.h" |
| 26 | #include "machine/mos6551.h" |
| 27 | #include "bus/centronics/ctronics.h" |
| 28 | #include "imagedev/floppy.h" |
| 29 | #include "imagedev/cassette.h" |
| 30 | #include "machine/wd_fdc.h" |
| 31 | #include "formats/oric_dsk.h" |
| 32 | #include "formats/oric_tap.h" |
| 20 | 33 | |
| 21 | | /* |
| 22 | | Explanation of memory regions: |
| 34 | class oric_state : public driver_device |
| 35 | { |
| 36 | public: |
| 37 | // Permanent attributes (kept from one line to the other) and line |
| 38 | // attributes (reset at start of line) |
| 39 | enum { |
| 40 | PATTR_50HZ = 0x02, |
| 41 | PATTR_HIRES = 0x04, |
| 42 | LATTR_ALT = 0x01, |
| 43 | LATTR_DSIZE = 0x02, |
| 44 | LATTR_BLINK = 0x04 |
| 45 | }; |
| 23 | 46 | |
| 24 | | I have split the memory region &c000-&ffff in this way because: |
| 47 | oric_state(const machine_config &mconfig, device_type type, const char *tag) |
| 48 | : driver_device(mconfig, type, tag), |
| 49 | m_maincpu(*this, "maincpu"), |
| 50 | m_psg(*this, "ay8912"), |
| 51 | m_centronics(*this, "centronics"), |
| 52 | m_cent_data_out(*this, "cent_data_out"), |
| 53 | m_cassette(*this, "cassette"), |
| 54 | m_via(*this, "via6522"), |
| 55 | m_ram(*this, "ram"), |
| 56 | m_rom(*this, "maincpu"), |
| 57 | m_bank_c000_r(*this, "bank_c000_r"), |
| 58 | m_bank_e000_r(*this, "bank_e000_r"), |
| 59 | m_bank_f800_r(*this, "bank_f800_r"), |
| 60 | m_bank_c000_w(*this, "bank_c000_w"), |
| 61 | m_bank_e000_w(*this, "bank_e000_w"), |
| 62 | m_bank_f800_w(*this, "bank_f800_w"), |
| 63 | m_config(*this, "CONFIG") { } |
| 25 | 64 | |
| 26 | | All roms (os, microdisc and jasmin) use the 6502 IRQ vectors at the end |
| 27 | | of memory &fff8-&ffff, but they are different sizes. The os is 16k, microdisc |
| 28 | | is 8k and jasmin is 2k. |
| 65 | DECLARE_INPUT_CHANGED_MEMBER(nmi_pressed); |
| 66 | DECLARE_WRITE8_MEMBER(via_a_w); |
| 67 | DECLARE_WRITE8_MEMBER(via_b_w); |
| 68 | DECLARE_WRITE_LINE_MEMBER(via_ca2_w); |
| 69 | DECLARE_WRITE_LINE_MEMBER(via_cb2_w); |
| 70 | DECLARE_WRITE_LINE_MEMBER(via_irq_w); |
| 71 | DECLARE_WRITE_LINE_MEMBER(ext_irq_w); |
| 72 | DECLARE_WRITE8_MEMBER(psg_a_w); |
| 73 | TIMER_DEVICE_CALLBACK_MEMBER(update_tape); |
| 29 | 74 | |
| 30 | | There is also 16k of ram at &c000-&ffff which is normally masked |
| 31 | | by the os rom, but when the microdisc or jasmin interfaces are used, |
| 32 | | this ram can be accessed. For the microdisc and jasmin, the ram not |
| 33 | | covered by the roms for these interfaces, can be accessed |
| 34 | | if it is enabled. |
| 75 | virtual void machine_start(); |
| 76 | virtual void video_start(); |
| 77 | UINT32 screen_update_oric(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 78 | void vblank_w(screen_device &screen, bool state); |
| 35 | 79 | |
| 36 | | SMH_BANK(1),SMH_BANK(2) and SMH_BANK(3) are used for a 16k rom. |
| 37 | | SMH_BANK(2) and SMH_BANK(3) are used for a 8k rom. |
| 38 | | SMH_BANK(3) is used for a 2k rom. |
| 80 | protected: |
| 81 | required_device<cpu_device> m_maincpu; |
| 82 | required_device<ay8910_device> m_psg; |
| 83 | required_device<centronics_device> m_centronics; |
| 84 | required_device<output_latch_device> m_cent_data_out; |
| 85 | required_device<cassette_image_device> m_cassette; |
| 86 | required_device<via6522_device> m_via; |
| 87 | required_shared_ptr<UINT8> m_ram; |
| 88 | optional_memory_region m_rom; |
| 89 | required_memory_bank m_bank_c000_r; |
| 90 | optional_memory_bank m_bank_e000_r; |
| 91 | optional_memory_bank m_bank_f800_r; |
| 92 | required_memory_bank m_bank_c000_w; |
| 93 | optional_memory_bank m_bank_e000_w; |
| 94 | optional_memory_bank m_bank_f800_w; |
| 95 | required_ioport m_config; |
| 96 | ioport_port *m_kbd_row[8]; |
| 39 | 97 | |
| 40 | | 0x0300-0x03ff is I/O access. It is not defined below because the |
| 41 | | memory is setup dynamically depending on hardware that has been selected (microdisc, jasmin, apple2) etc. |
| 98 | int m_blink_counter; |
| 99 | UINT8 m_pattr; |
| 100 | UINT8 m_via_a, m_via_b, m_psg_a; |
| 101 | bool m_via_ca2, m_via_cb2, m_via_irq; |
| 102 | bool m_ext_irq; |
| 42 | 103 | |
| 43 | | */ |
| 104 | virtual void update_irq(); |
| 105 | void update_psg(address_space &space); |
| 106 | void update_keyboard(); |
| 107 | void machine_start_common(); |
| 108 | }; |
| 44 | 109 | |
| 110 | class telestrat_state : public oric_state |
| 111 | { |
| 112 | public: |
| 113 | telestrat_state(const machine_config &mconfig, device_type type, const char *tag) : |
| 114 | oric_state(mconfig, type, tag), |
| 115 | m_via2(*this, "via6522_2"), |
| 116 | m_fdc(*this, "fdc"), |
| 117 | m_telmatic(*this, "telmatic"), |
| 118 | m_teleass(*this, "teleass"), |
| 119 | m_hyperbas(*this, "hyperbas"), |
| 120 | m_telmon24(*this, "telmon24"), |
| 121 | m_joy1(*this, "JOY1"), |
| 122 | m_joy2(*this, "JOY2") |
| 123 | { } |
| 45 | 124 | |
| 125 | DECLARE_WRITE8_MEMBER(via2_a_w); |
| 126 | DECLARE_WRITE8_MEMBER(via2_b_w); |
| 127 | DECLARE_WRITE_LINE_MEMBER(via2_ca2_w); |
| 128 | DECLARE_WRITE_LINE_MEMBER(via2_cb2_w); |
| 129 | DECLARE_WRITE_LINE_MEMBER(via2_irq_w); |
| 130 | DECLARE_WRITE8_MEMBER(port_314_w); |
| 131 | DECLARE_READ8_MEMBER(port_314_r); |
| 132 | DECLARE_READ8_MEMBER(port_318_r); |
| 133 | |
| 134 | DECLARE_WRITE_LINE_MEMBER(acia_irq_w); |
| 135 | |
| 136 | DECLARE_WRITE_LINE_MEMBER(fdc_irq_w); |
| 137 | DECLARE_WRITE_LINE_MEMBER(fdc_drq_w); |
| 138 | DECLARE_WRITE_LINE_MEMBER(fdc_hld_w); |
| 139 | |
| 140 | DECLARE_FLOPPY_FORMATS(floppy_formats); |
| 141 | |
| 142 | virtual void machine_start(); |
| 143 | virtual void machine_reset(); |
| 144 | |
| 145 | protected: |
| 146 | enum { |
| 147 | P_IRQEN = 0x01, |
| 148 | P_DDS = 0x04, |
| 149 | P_DDEN = 0x08, |
| 150 | P_SS = 0x10, |
| 151 | P_DRIVE = 0x60 |
| 152 | }; |
| 153 | |
| 154 | required_device<via6522_device> m_via2; |
| 155 | required_device<fd1793_t> m_fdc; |
| 156 | required_memory_region m_telmatic; |
| 157 | required_memory_region m_teleass; |
| 158 | required_memory_region m_hyperbas; |
| 159 | required_memory_region m_telmon24; |
| 160 | required_ioport m_joy1; |
| 161 | required_ioport m_joy2; |
| 162 | |
| 163 | floppy_image_device *m_floppies[4]; |
| 164 | UINT8 m_port_314; |
| 165 | UINT8 m_via2_a, m_via2_b; |
| 166 | bool m_via2_ca2, m_via2_cb2, m_via2_irq; |
| 167 | bool m_acia_irq; |
| 168 | bool m_fdc_irq, m_fdc_drq, m_fdc_hld; |
| 169 | |
| 170 | UINT8 m_junk_read[0x4000], m_junk_write[0x4000]; |
| 171 | |
| 172 | virtual void update_irq(); |
| 173 | void remap(); |
| 174 | }; |
| 175 | |
| 176 | /* Ram is 64K, with 16K hidden by the rom. The 300-3ff is also hidden by the i/o */ |
| 46 | 177 | static ADDRESS_MAP_START(oric_mem, AS_PROGRAM, 8, oric_state ) |
| 47 | | AM_RANGE( 0x0000, 0xbfff) AM_RAM AM_SHARE("ram") |
| 48 | | AM_RANGE( 0xc000, 0xdfff) AM_READ_BANK("bank1") AM_WRITE_BANK("bank5") |
| 49 | | AM_RANGE( 0xe000, 0xf7ff) AM_READ_BANK("bank2") AM_WRITE_BANK("bank6") |
| 50 | | AM_RANGE( 0xf800, 0xffff) AM_READ_BANK("bank3") AM_WRITE_BANK("bank7") |
| 178 | AM_RANGE( 0x0300, 0x030f) AM_DEVREADWRITE("via6522", via6522_device, read, write) AM_MIRROR(0xf0) |
| 179 | AM_RANGE( 0xc000, 0xdfff) AM_READ_BANK("bank_c000_r") AM_WRITE_BANK("bank_c000_w") |
| 180 | AM_RANGE( 0xe000, 0xf7ff) AM_READ_BANK("bank_e000_r") AM_WRITE_BANK("bank_e000_w") |
| 181 | AM_RANGE( 0xf800, 0xffff) AM_READ_BANK("bank_f800_r") AM_WRITE_BANK("bank_f800_w") |
| 182 | AM_RANGE( 0x0000, 0xffff) AM_RAM AM_SHARE("ram") |
| 51 | 183 | ADDRESS_MAP_END |
| 52 | 184 | |
| 53 | 185 | /* |
| 54 | 186 | The telestrat has the memory regions split into 16k blocks. |
| 55 | 187 | Memory region &c000-&ffff can be ram or rom. */ |
| 56 | | static ADDRESS_MAP_START(telestrat_mem, AS_PROGRAM, 8, oric_state ) |
| 57 | | AM_RANGE( 0x0000, 0x02ff) AM_RAM |
| 58 | | AM_RANGE( 0x0300, 0x030f) AM_DEVREADWRITE("via6522_0", via6522_device, read, write) |
| 59 | | AM_RANGE( 0x0310, 0x031b) AM_READWRITE(oric_microdisc_r, oric_microdisc_w ) |
| 188 | static ADDRESS_MAP_START(telestrat_mem, AS_PROGRAM, 8, telestrat_state ) |
| 189 | AM_RANGE( 0x0300, 0x030f) AM_DEVREADWRITE("via6522", via6522_device, read, write) |
| 190 | AM_RANGE( 0x0310, 0x0313) AM_DEVREADWRITE("fdc", fd1793_t, read, write) |
| 191 | AM_RANGE( 0x0314, 0x0314) AM_READWRITE(port_314_r, port_314_w) |
| 192 | AM_RANGE( 0x0318, 0x0318) AM_READ(port_318_r) |
| 60 | 193 | AM_RANGE( 0x031c, 0x031f) AM_DEVREADWRITE("acia", mos6551_device, read, write) |
| 61 | | AM_RANGE( 0x0320, 0x032f) AM_DEVREADWRITE("via6522_1", via6522_device, read, write) |
| 62 | | AM_RANGE( 0x0400, 0xbfff) AM_RAM |
| 63 | | AM_RANGE( 0xc000, 0xffff) AM_READ_BANK("bank1") AM_WRITE_BANK("bank2") |
| 194 | AM_RANGE( 0x0320, 0x032f) AM_DEVREADWRITE("via6522_2", via6522_device, read, write) |
| 195 | AM_RANGE( 0xc000, 0xffff) AM_READ_BANK("bank_c000_r") AM_WRITE_BANK("bank_c000_w") |
| 196 | AM_RANGE( 0x0000, 0xffff) AM_RAM AM_SHARE("ram") |
| 64 | 197 | ADDRESS_MAP_END |
| 65 | 198 | |
| 199 | UINT32 oric_state::screen_update_oric(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 200 | { |
| 201 | static const UINT32 colors[8] = { |
| 202 | 0x000000, |
| 203 | 0xff0000, |
| 204 | 0x00ff00, |
| 205 | 0xffff00, |
| 206 | 0x0000ff, |
| 207 | 0xff00ff, |
| 208 | 0x00ffff, |
| 209 | 0xffffff |
| 210 | }; |
| 66 | 211 | |
| 212 | bool blink_state = m_blink_counter & 0x20; |
| 213 | m_blink_counter = (m_blink_counter + 1) & 0x3f; |
| 214 | |
| 215 | UINT8 pattr = m_pattr; |
| 216 | |
| 217 | for(int y=0; y<224; y++) { |
| 218 | // Line attributes and current colors |
| 219 | UINT8 lattr = 0; |
| 220 | UINT32 fgcol = colors[7]; |
| 221 | UINT32 bgcol = colors[0]; |
| 222 | |
| 223 | UINT32 *p = &bitmap.pix32(y); |
| 224 | |
| 225 | for(int x=0; x<40; x++) { |
| 226 | // Lookup the byte and, if needed, the pattern data |
| 227 | UINT8 ch, pat; |
| 228 | if((pattr & PATTR_HIRES) && y < 200) |
| 229 | ch = pat = m_ram[0xa000 + y*40 + x]; |
| 230 | |
| 231 | else { |
| 232 | ch = m_ram[0xbb80 + (y>>3)*40 + x]; |
| 233 | int off = (lattr & LATTR_DSIZE ? y >> 1 : y ) & 7; |
| 234 | const UINT8 *base; |
| 235 | if(pattr & PATTR_HIRES) |
| 236 | if(lattr & LATTR_ALT) |
| 237 | base = m_ram + 0x9c00; |
| 238 | else |
| 239 | base = m_ram + 0x9800; |
| 240 | else |
| 241 | if(lattr & LATTR_ALT) |
| 242 | base = m_ram + 0xb800; |
| 243 | else |
| 244 | base = m_ram + 0xb400; |
| 245 | pat = base[((ch & 0x7f) << 3) | off]; |
| 246 | } |
| 247 | |
| 248 | // Handle state-chaging attributes |
| 249 | if(!(ch & 0x60)) { |
| 250 | pat = 0x00; |
| 251 | switch(ch & 0x18) { |
| 252 | case 0x00: fgcol = colors[ch & 7]; break; |
| 253 | case 0x08: lattr = ch & 7; break; |
| 254 | case 0x10: bgcol = colors[ch & 7]; break; |
| 255 | case 0x18: pattr = ch & 7; break; |
| 256 | } |
| 257 | } |
| 258 | |
| 259 | // Pick up the colors for the pattern |
| 260 | UINT32 c_fgcol = fgcol; |
| 261 | UINT32 c_bgcol = bgcol; |
| 262 | |
| 263 | // inverse video |
| 264 | if(ch & 0x80) { |
| 265 | c_bgcol = c_bgcol ^ 0xffffff; |
| 266 | c_fgcol = c_fgcol ^ 0xffffff; |
| 267 | } |
| 268 | // blink |
| 269 | if((lattr & LATTR_BLINK) && blink_state) |
| 270 | c_fgcol = c_bgcol; |
| 271 | |
| 272 | // Draw the pattern |
| 273 | *p++ = pat & 0x20 ? c_fgcol : c_bgcol; |
| 274 | *p++ = pat & 0x10 ? c_fgcol : c_bgcol; |
| 275 | *p++ = pat & 0x08 ? c_fgcol : c_bgcol; |
| 276 | *p++ = pat & 0x04 ? c_fgcol : c_bgcol; |
| 277 | *p++ = pat & 0x02 ? c_fgcol : c_bgcol; |
| 278 | *p++ = pat & 0x01 ? c_fgcol : c_bgcol; |
| 279 | } |
| 280 | } |
| 281 | |
| 282 | m_pattr = pattr; |
| 283 | |
| 284 | return 0; |
| 285 | } |
| 286 | |
| 287 | void oric_state::update_keyboard() |
| 288 | { |
| 289 | m_via->write_pb3((m_kbd_row[m_via_b & 7]->read() | m_psg_a) != 0xff); |
| 290 | } |
| 291 | |
| 292 | void oric_state::update_psg(address_space &space) |
| 293 | { |
| 294 | if(m_via_ca2) |
| 295 | if(m_via_cb2) |
| 296 | m_psg->address_w(space, 0, m_via_a); |
| 297 | else |
| 298 | m_via->write_pa(space, 0, m_psg->data_r(space, 0)); |
| 299 | else if(m_via_cb2) |
| 300 | m_psg->data_w(space, 0, m_via_a); |
| 301 | } |
| 302 | |
| 303 | void oric_state::update_irq() |
| 304 | { |
| 305 | m_maincpu->set_input_line(m6502_device::IRQ_LINE, m_via_irq || m_ext_irq ? ASSERT_LINE : CLEAR_LINE); |
| 306 | } |
| 307 | |
| 308 | INPUT_CHANGED_MEMBER(oric_state::nmi_pressed) |
| 309 | { |
| 310 | m_maincpu->set_input_line(m6502_device::NMI_LINE, newval ? ASSERT_LINE : CLEAR_LINE); |
| 311 | } |
| 312 | |
| 313 | WRITE8_MEMBER(oric_state::via_a_w) |
| 314 | { |
| 315 | m_via_a = data; |
| 316 | m_cent_data_out->write(space, 0, m_via_a); |
| 317 | update_psg(space); |
| 318 | } |
| 319 | |
| 320 | WRITE8_MEMBER(oric_state::via_b_w) |
| 321 | { |
| 322 | m_via_b = data; |
| 323 | update_keyboard(); |
| 324 | m_centronics->write_strobe(data & 0x10 ? 1 : 0); |
| 325 | m_cassette->change_state(data & 0x40 ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED, |
| 326 | CASSETTE_MOTOR_DISABLED); |
| 327 | m_cassette->output(data & 0x80 ? -1.0 : +1.0); |
| 328 | } |
| 329 | |
| 330 | WRITE_LINE_MEMBER(oric_state::via_ca2_w) |
| 331 | { |
| 332 | m_via_ca2 = state; |
| 333 | update_psg(m_maincpu->space(AS_PROGRAM)); |
| 334 | } |
| 335 | |
| 336 | WRITE_LINE_MEMBER(oric_state::via_cb2_w) |
| 337 | { |
| 338 | m_via_cb2 = state; |
| 339 | update_psg(m_maincpu->space(AS_PROGRAM)); |
| 340 | } |
| 341 | |
| 342 | WRITE_LINE_MEMBER(oric_state::via_irq_w) |
| 343 | { |
| 344 | m_via_irq = state; |
| 345 | update_irq(); |
| 346 | } |
| 347 | |
| 348 | WRITE_LINE_MEMBER(oric_state::ext_irq_w) |
| 349 | { |
| 350 | m_ext_irq = state; |
| 351 | update_irq(); |
| 352 | } |
| 353 | |
| 354 | WRITE8_MEMBER(oric_state::psg_a_w) |
| 355 | { |
| 356 | m_psg_a = data; |
| 357 | update_keyboard(); |
| 358 | } |
| 359 | |
| 360 | TIMER_DEVICE_CALLBACK_MEMBER(oric_state::update_tape) |
| 361 | { |
| 362 | if(!m_config->read()) |
| 363 | m_via->write_cb1(m_cassette->input() > 0.0038); |
| 364 | } |
| 365 | |
| 366 | void oric_state::vblank_w(screen_device &screen, bool state) |
| 367 | { |
| 368 | if(m_config->read()) |
| 369 | m_via->write_cb1(state); |
| 370 | } |
| 371 | |
| 372 | void oric_state::video_start() |
| 373 | { |
| 374 | m_blink_counter = 0; |
| 375 | m_pattr = 0; |
| 376 | } |
| 377 | |
| 378 | void oric_state::machine_start_common() |
| 379 | { |
| 380 | m_via_a = 0xff; |
| 381 | m_via_b = 0xff; |
| 382 | m_psg_a = 0x00; |
| 383 | m_via_ca2 = false; |
| 384 | m_via_cb2 = false; |
| 385 | m_via_irq = false; |
| 386 | m_ext_irq = false; |
| 387 | |
| 388 | for(int i=0; i<8; i++) { |
| 389 | char name[10]; |
| 390 | sprintf(name, "ROW%d", i); |
| 391 | m_kbd_row[i] = machine().root_device().ioport(name); |
| 392 | } |
| 393 | } |
| 394 | |
| 395 | void oric_state::machine_start() |
| 396 | { |
| 397 | machine_start_common(); |
| 398 | m_bank_c000_r->set_base(m_rom->base()); |
| 399 | m_bank_e000_r->set_base(m_rom->base() + 0x2000); |
| 400 | m_bank_f800_r->set_base(m_rom->base() + 0x3800); |
| 401 | } |
| 402 | |
| 403 | |
| 404 | void telestrat_state::machine_start() |
| 405 | { |
| 406 | machine_start_common(); |
| 407 | for(int i=0; i<4; i++) { |
| 408 | char name[32]; |
| 409 | sprintf(name, "fdc:%d", i); |
| 410 | m_floppies[i] = subdevice<floppy_connector>(name)->get_device(); |
| 411 | } |
| 412 | m_fdc_irq = m_fdc_drq = m_fdc_hld = false; |
| 413 | m_acia_irq = false; |
| 414 | |
| 415 | memset(m_junk_read, 0x00, sizeof(m_junk_read)); |
| 416 | memset(m_junk_write, 0x00, sizeof(m_junk_write)); |
| 417 | } |
| 418 | |
| 419 | void telestrat_state::machine_reset() |
| 420 | { |
| 421 | m_port_314 = 0x00; |
| 422 | m_via2_a = 0xff; |
| 423 | remap(); |
| 424 | } |
| 425 | |
| 426 | void telestrat_state::update_irq() |
| 427 | { |
| 428 | m_maincpu->set_input_line(m6502_device::IRQ_LINE, |
| 429 | m_via_irq || |
| 430 | m_ext_irq || |
| 431 | (m_fdc_irq && (m_port_314 & P_IRQEN)) || |
| 432 | m_via2_irq || |
| 433 | m_acia_irq ? ASSERT_LINE : CLEAR_LINE); |
| 434 | } |
| 435 | |
| 436 | WRITE8_MEMBER(telestrat_state::via2_a_w) |
| 437 | { |
| 438 | m_via2_a = data; |
| 439 | remap(); |
| 440 | } |
| 441 | |
| 442 | WRITE8_MEMBER(telestrat_state::via2_b_w) |
| 443 | { |
| 444 | m_via2_b = data; |
| 445 | UINT8 port = 0xff; |
| 446 | if(!(m_via2_b & 0x40)) |
| 447 | port &= m_joy1->read(); |
| 448 | if(!(m_via2_b & 0x80)) |
| 449 | port &= m_joy2->read(); |
| 450 | |
| 451 | m_via2->write_pb(space, 0, port); |
| 452 | } |
| 453 | |
| 454 | WRITE_LINE_MEMBER(telestrat_state::via2_ca2_w) |
| 455 | { |
| 456 | m_via2_ca2 = state; |
| 457 | } |
| 458 | |
| 459 | WRITE_LINE_MEMBER(telestrat_state::via2_cb2_w) |
| 460 | { |
| 461 | m_via2_cb2 = state; |
| 462 | } |
| 463 | |
| 464 | WRITE_LINE_MEMBER(telestrat_state::via2_irq_w) |
| 465 | { |
| 466 | m_via2_irq = state; |
| 467 | update_irq(); |
| 468 | } |
| 469 | |
| 470 | WRITE8_MEMBER(telestrat_state::port_314_w) |
| 471 | { |
| 472 | m_port_314 = data; |
| 473 | floppy_image_device *floppy = m_floppies[(m_port_314 >> 5) & 3]; |
| 474 | m_fdc->set_floppy(floppy); |
| 475 | m_fdc->dden_w(m_port_314 & P_DDEN); |
| 476 | if(floppy) { |
| 477 | floppy->ss_w(m_port_314 & P_SS ? 1 : 0); |
| 478 | floppy->mon_w(0); |
| 479 | } |
| 480 | update_irq(); |
| 481 | } |
| 482 | |
| 483 | READ8_MEMBER(telestrat_state::port_314_r) |
| 484 | { |
| 485 | return (m_fdc_irq && (m_port_314 & P_IRQEN)) ? 0x7f : 0xff; |
| 486 | } |
| 487 | |
| 488 | READ8_MEMBER(telestrat_state::port_318_r) |
| 489 | { |
| 490 | return m_fdc_drq ? 0x7f : 0xff; |
| 491 | } |
| 492 | |
| 493 | |
| 494 | WRITE_LINE_MEMBER(telestrat_state::acia_irq_w) |
| 495 | { |
| 496 | m_acia_irq = state; |
| 497 | update_irq(); |
| 498 | } |
| 499 | |
| 500 | WRITE_LINE_MEMBER(telestrat_state::fdc_irq_w) |
| 501 | { |
| 502 | m_fdc_irq = state; |
| 503 | update_irq(); |
| 504 | } |
| 505 | |
| 506 | WRITE_LINE_MEMBER(telestrat_state::fdc_drq_w) |
| 507 | { |
| 508 | m_fdc_drq = state; |
| 509 | } |
| 510 | |
| 511 | WRITE_LINE_MEMBER(telestrat_state::fdc_hld_w) |
| 512 | { |
| 513 | m_fdc_hld = state; |
| 514 | } |
| 515 | |
| 516 | void telestrat_state::remap() |
| 517 | { |
| 518 | // Theorically, these are cartridges. There's no real point to |
| 519 | // making them configurable, when only 4 existed and there are 7 |
| 520 | // slots. |
| 521 | |
| 522 | switch(m_via2_a & 7) { |
| 523 | case 0: |
| 524 | m_bank_c000_r->set_base(m_ram+0xc000); |
| 525 | m_bank_c000_w->set_base(m_ram+0xc000); |
| 526 | break; |
| 527 | case 1: |
| 528 | case 2: |
| 529 | case 3: |
| 530 | m_bank_c000_r->set_base(m_junk_read); |
| 531 | m_bank_c000_w->set_base(m_junk_write); |
| 532 | break; |
| 533 | case 4: |
| 534 | m_bank_c000_r->set_base(m_telmatic->base()); |
| 535 | m_bank_c000_w->set_base(m_junk_write); |
| 536 | break; |
| 537 | case 5: |
| 538 | m_bank_c000_r->set_base(m_teleass->base()); |
| 539 | m_bank_c000_w->set_base(m_junk_write); |
| 540 | break; |
| 541 | case 6: |
| 542 | m_bank_c000_r->set_base(m_hyperbas->base()); |
| 543 | m_bank_c000_w->set_base(m_junk_write); |
| 544 | break; |
| 545 | case 7: |
| 546 | m_bank_c000_r->set_base(m_telmon24->base()); |
| 547 | m_bank_c000_w->set_base(m_junk_write); |
| 548 | break; |
| 549 | } |
| 550 | } |
| 551 | |
| 552 | |
| 553 | |
| 67 | 554 | static INPUT_PORTS_START(oric) |
| 68 | 555 | PORT_START("ROW0") |
| 69 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') |
| 70 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') |
| 71 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') |
| 72 | | PORT_BIT(0x10, 0x00, IPT_UNUSED) |
| 73 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') |
| 74 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') |
| 75 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') |
| 76 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&') |
| 556 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') |
| 557 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') |
| 558 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') |
| 559 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) |
| 560 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') |
| 561 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') |
| 562 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') |
| 563 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&') |
| 77 | 564 | |
| 78 | 565 | PORT_START("ROW1") |
| 79 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') |
| 80 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') |
| 81 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR(UCHAR_MAMEKEY(ESC)) |
| 82 | | PORT_BIT(0x10, 0x00, IPT_UNUSED) |
| 83 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') |
| 84 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') |
| 85 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') |
| 86 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') |
| 566 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') |
| 567 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') |
| 568 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR(UCHAR_MAMEKEY(ESC)) |
| 569 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) |
| 570 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') |
| 571 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') |
| 572 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') |
| 573 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') |
| 87 | 574 | |
| 88 | 575 | PORT_START("ROW2") |
| 89 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') |
| 90 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@') |
| 91 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') |
| 92 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) |
| 93 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') |
| 94 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') |
| 95 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^') |
| 96 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') |
| 576 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') |
| 577 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@') |
| 578 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') |
| 579 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) |
| 580 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') |
| 581 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') |
| 582 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^') |
| 583 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') |
| 97 | 584 | |
| 98 | 585 | PORT_START("ROW3") |
| 99 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"') |
| 100 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR('\\') PORT_CHAR('|') |
| 101 | | PORT_BIT(0x20, 0x00, IPT_UNUSED) |
| 102 | | PORT_BIT(0x10, 0x00, IPT_UNUSED) |
| 103 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('\xA3') |
| 104 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') |
| 105 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(') |
| 106 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') |
| 586 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"') |
| 587 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR('\\') PORT_CHAR('|') |
| 588 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) |
| 589 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) |
| 590 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('\xA3') |
| 591 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') |
| 592 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(') |
| 593 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') |
| 107 | 594 | |
| 108 | 595 | PORT_START("ROW4") |
| 109 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) |
| 110 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) |
| 111 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) |
| 112 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_MAMEKEY(LSHIFT)) |
| 113 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) |
| 114 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') |
| 115 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') |
| 116 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') |
| 596 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) |
| 597 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) |
| 598 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) |
| 599 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_MAMEKEY(LSHIFT)) |
| 600 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) |
| 601 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') |
| 602 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') |
| 603 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') |
| 117 | 604 | |
| 118 | 605 | PORT_START("ROW5") |
| 119 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') |
| 120 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') |
| 121 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Del") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) |
| 122 | | PORT_BIT(0x10, 0x00, IPT_UNUSED) |
| 123 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') |
| 124 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') |
| 125 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') |
| 126 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') |
| 606 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') |
| 607 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') |
| 608 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Del") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) |
| 609 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) |
| 610 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') |
| 611 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') |
| 612 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') |
| 613 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') |
| 127 | 614 | |
| 128 | 615 | PORT_START("ROW6") |
| 129 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') |
| 130 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') |
| 131 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') |
| 132 | | PORT_BIT(0x10, 0x00, IPT_UNUSED) |
| 133 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') |
| 134 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') |
| 135 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') |
| 136 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') |
| 616 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') |
| 617 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') |
| 618 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') |
| 619 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) |
| 620 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') |
| 621 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') |
| 622 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') |
| 623 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') |
| 137 | 624 | |
| 138 | 625 | PORT_START("ROW7") |
| 139 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+') |
| 140 | | PORT_BIT(0x40, 0x00, IPT_UNUSED) |
| 141 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) |
| 142 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_MAMEKEY(RSHIFT)) |
| 143 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') |
| 144 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')') |
| 145 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') |
| 146 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*') |
| 626 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+') |
| 627 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) |
| 628 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) |
| 629 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_MAMEKEY(RSHIFT)) |
| 630 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') |
| 631 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')') |
| 632 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') |
| 633 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*') |
| 147 | 634 | |
| 148 | | PORT_START("FLOPPY") |
| 149 | | /* floppy interface */ |
| 150 | | PORT_CONFNAME( 0x03, 0x00, "Floppy disc interface" ) |
| 151 | | PORT_CONFSETTING( 0x00, DEF_STR( None ) ) |
| 152 | | PORT_CONFSETTING( 0x01, "Microdisc" ) |
| 153 | | PORT_CONFSETTING( 0x02, "Jasmin" ) |
| 154 | | /* PORT_CONFSETTING( 0x03, "Low 8D DOS" ) */ |
| 155 | | /* PORT_CONFSETTING( 0x04, "High 8D DOS" ) */ |
| 635 | PORT_START("NMI") |
| 636 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("NMI") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) PORT_CHANGED_MEMBER(DEVICE_SELF, oric_state, nmi_pressed, 0) |
| 156 | 637 | |
| 157 | 638 | /* vsync cable hardware. This is a simple cable connected to the video output |
| 158 | 639 | to the monitor/television. The sync signal is connected to the cassette input |
| 159 | 640 | allowing interrupts to be generated from the vsync signal. */ |
| 160 | | PORT_CONFNAME(0x08, 0x00, "Vsync cable hardware") |
| 161 | | PORT_CONFSETTING( 0x00, DEF_STR( Off ) ) |
| 162 | | PORT_CONFSETTING( 0x08, DEF_STR( On ) ) |
| 163 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_VBLANK("screen") |
| 641 | PORT_START("CONFIG") |
| 642 | PORT_CONFNAME(0x01, 0x00, "Tape input") |
| 643 | PORT_CONFSETTING( 0x00, "Tape") |
| 644 | PORT_CONFSETTING( 0x01, "VSync cable") |
| 164 | 645 | INPUT_PORTS_END |
| 165 | 646 | |
| 166 | 647 | static INPUT_PORTS_START(orica) |
| 167 | 648 | PORT_INCLUDE( oric ) |
| 168 | 649 | |
| 169 | 650 | PORT_MODIFY("ROW5") |
| 170 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Funct") PORT_CODE(KEYCODE_END) PORT_CHAR(UCHAR_MAMEKEY(F1)) |
| 651 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Funct") PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT)) |
| 171 | 652 | INPUT_PORTS_END |
| 172 | 653 | |
| 173 | 654 | static INPUT_PORTS_START(prav8d) |
| 174 | 655 | PORT_START("ROW0") |
| 175 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') |
| 176 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("X \xd0\xac") PORT_CODE(KEYCODE_X) PORT_CHAR('X') |
| 177 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') |
| 178 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED) |
| 179 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("V \xd0\x96") PORT_CODE(KEYCODE_V) PORT_CHAR('V') |
| 180 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') |
| 181 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("N \xd0\x9d") PORT_CODE(KEYCODE_N) PORT_CHAR('N') |
| 182 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') |
| 656 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') |
| 657 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("X \xd0\xac") PORT_CODE(KEYCODE_X) PORT_CHAR('X') |
| 658 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') |
| 659 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) |
| 660 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("V \xd0\x96") PORT_CODE(KEYCODE_V) PORT_CHAR('V') |
| 661 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') |
| 662 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("N \xd0\x9d") PORT_CODE(KEYCODE_N) PORT_CHAR('N') |
| 663 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') |
| 183 | 664 | |
| 184 | 665 | PORT_START("ROW1") |
| 185 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("D \xd0\x94") PORT_CODE(KEYCODE_D) PORT_CHAR('D') |
| 186 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Q \xd0\xaf") PORT_CODE(KEYCODE_Q) PORT_CHAR('Q') |
| 187 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Esc") PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) |
| 188 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED) |
| 189 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F \xd0\xa4") PORT_CODE(KEYCODE_F) PORT_CHAR('F') |
| 190 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("R \xd0\xa0") PORT_CODE(KEYCODE_R) PORT_CHAR('R') |
| 191 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("T \xd0\xa2") PORT_CODE(KEYCODE_T) PORT_CHAR('T') |
| 192 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("J \xd0\x99") PORT_CODE(KEYCODE_J) PORT_CHAR('J') |
| 666 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("D \xd0\x94") PORT_CODE(KEYCODE_D) PORT_CHAR('D') |
| 667 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Q \xd0\xaf") PORT_CODE(KEYCODE_Q) PORT_CHAR('Q') |
| 668 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Esc") PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) |
| 669 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) |
| 670 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F \xd0\xa4") PORT_CODE(KEYCODE_F) PORT_CHAR('F') |
| 671 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("R \xd0\xa0") PORT_CODE(KEYCODE_R) PORT_CHAR('R') |
| 672 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("T \xd0\xa2") PORT_CODE(KEYCODE_T) PORT_CHAR('T') |
| 673 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("J \xd0\x99") PORT_CODE(KEYCODE_J) PORT_CHAR('J') |
| 193 | 674 | |
| 194 | 675 | PORT_START("ROW2") |
| 195 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("C \xd0\xa6") PORT_CODE(KEYCODE_C) PORT_CHAR('C') |
| 196 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') |
| 197 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Z \xd0\x97") PORT_CODE(KEYCODE_Z) PORT_CHAR('Z') |
| 198 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("MK") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) |
| 199 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') |
| 200 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("B \xd0\x91") PORT_CODE(KEYCODE_B) PORT_CHAR('B') |
| 201 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') |
| 202 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("M \xd0\x9c") PORT_CODE(KEYCODE_M) PORT_CHAR('M') |
| 676 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("C \xd0\xa6") PORT_CODE(KEYCODE_C) PORT_CHAR('C') |
| 677 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') |
| 678 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Z \xd0\x97") PORT_CODE(KEYCODE_Z) PORT_CHAR('Z') |
| 679 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("MK") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) |
| 680 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') |
| 681 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("B \xd0\x91") PORT_CODE(KEYCODE_B) PORT_CHAR('B') |
| 682 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') |
| 683 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("M \xd0\x9c") PORT_CODE(KEYCODE_M) PORT_CHAR('M') |
| 203 | 684 | |
| 204 | 685 | PORT_START("ROW3") |
| 205 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("] \xd0\xa9") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(']') |
| 206 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR(';') PORT_CHAR('+') |
| 207 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("C/L") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) // this one is 5th line, 1st key from right |
| 208 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED) |
| 209 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR(':') PORT_CHAR('*') |
| 210 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("[ \xd0\xa8") PORT_CODE(KEYCODE_COLON) PORT_CHAR('[') |
| 211 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') |
| 212 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("K \xd0\x9a") PORT_CODE(KEYCODE_K) PORT_CHAR('K') |
| 686 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("] \xd0\xa9") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(']') |
| 687 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR(';') PORT_CHAR('+') |
| 688 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("C/L") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) // this one is 5th line, 1st key from right |
| 689 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) |
| 690 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR(':') PORT_CHAR('*') |
| 691 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("[ \xd0\xa8") PORT_CODE(KEYCODE_COLON) PORT_CHAR('[') |
| 692 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') |
| 693 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("K \xd0\x9a") PORT_CODE(KEYCODE_K) PORT_CHAR('K') |
| 213 | 694 | |
| 214 | 695 | PORT_START("ROW4") |
| 215 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) |
| 216 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_DOWN) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) |
| 217 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) |
| 218 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_MAMEKEY(LSHIFT)) |
| 219 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) |
| 220 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') |
| 221 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') |
| 222 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') |
| 696 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) |
| 697 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(UTF8_DOWN) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) |
| 698 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) |
| 699 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_MAMEKEY(LSHIFT)) |
| 700 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(UTF8_UP) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) |
| 701 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') |
| 702 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') |
| 703 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') |
| 223 | 704 | |
| 224 | 705 | PORT_START("ROW5") |
| 225 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("@ \xd0\xae") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@') |
| 226 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("\\ \xd0\xad") PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('\\') |
| 227 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Del") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) // this one is 5th line, 1st key from left |
| 228 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED) |
| 229 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("P \xd0\x9f") PORT_CODE(KEYCODE_P) PORT_CHAR('P') |
| 230 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("O \xd0\x9e") PORT_CODE(KEYCODE_O) PORT_CHAR('O') |
| 231 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("I \xd0\x98") PORT_CODE(KEYCODE_I) PORT_CHAR('I') |
| 232 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("U \xd0\xa3") PORT_CODE(KEYCODE_U) PORT_CHAR('U') |
| 706 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("@ \xd0\xae") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@') |
| 707 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("\\ \xd0\xad") PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('\\') |
| 708 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Del") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) // this one is 5th line, 1st key from left |
| 709 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) |
| 710 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("P \xd0\x9f") PORT_CODE(KEYCODE_P) PORT_CHAR('P') |
| 711 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("O \xd0\x9e") PORT_CODE(KEYCODE_O) PORT_CHAR('O') |
| 712 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("I \xd0\x98") PORT_CODE(KEYCODE_I) PORT_CHAR('I') |
| 713 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("U \xd0\xa3") PORT_CODE(KEYCODE_U) PORT_CHAR('U') |
| 233 | 714 | |
| 234 | 715 | PORT_START("ROW6") |
| 235 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("W \xd0\x92") PORT_CODE(KEYCODE_W) PORT_CHAR('W') |
| 236 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S \xd0\xa1") PORT_CODE(KEYCODE_S) PORT_CHAR('S') |
| 237 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("A \xd0\x90") PORT_CODE(KEYCODE_A) PORT_CHAR('A') |
| 238 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED) |
| 239 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("E \xd0\x95") PORT_CODE(KEYCODE_E) PORT_CHAR('E') |
| 240 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("G \xd0\x93") PORT_CODE(KEYCODE_G) PORT_CHAR('G') |
| 241 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("H \xd0\xa5") PORT_CODE(KEYCODE_H) PORT_CHAR('H') |
| 242 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Y \xd0\xaa") PORT_CODE(KEYCODE_Y) PORT_CHAR('Y') |
| 716 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("W \xd0\x92") PORT_CODE(KEYCODE_W) PORT_CHAR('W') |
| 717 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("S \xd0\xa1") PORT_CODE(KEYCODE_S) PORT_CHAR('S') |
| 718 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("A \xd0\x90") PORT_CODE(KEYCODE_A) PORT_CHAR('A') |
| 719 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) |
| 720 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("E \xd0\x95") PORT_CODE(KEYCODE_E) PORT_CHAR('E') |
| 721 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("G \xd0\x93") PORT_CODE(KEYCODE_G) PORT_CHAR('G') |
| 722 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("H \xd0\xa5") PORT_CODE(KEYCODE_H) PORT_CHAR('H') |
| 723 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Y \xd0\xaa") PORT_CODE(KEYCODE_Y) PORT_CHAR('Y') |
| 243 | 724 | |
| 244 | 725 | PORT_START("ROW7") |
| 245 | | PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('-') PORT_CHAR('=') |
| 246 | | PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("^ \xd0\xa7") PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('^') // this one would be on 2nd line, 3rd key from 'P' |
| 247 | | PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) |
| 248 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_MAMEKEY(RSHIFT)) |
| 249 | | PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') |
| 250 | | PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') |
| 251 | | PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("L \xd0\x9b") PORT_CODE(KEYCODE_L) PORT_CHAR('L') |
| 252 | | PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') |
| 726 | PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('-') PORT_CHAR('=') |
| 727 | PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("^ \xd0\xa7") PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('^') // this one would be on 2nd line, 3rd key from 'P' |
| 728 | PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) |
| 729 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_MAMEKEY(RSHIFT)) |
| 730 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') |
| 731 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') |
| 732 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("L \xd0\x9b") PORT_CODE(KEYCODE_L) PORT_CHAR('L') |
| 733 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') |
| 253 | 734 | |
| 254 | | PORT_START("FLOPPY") |
| 255 | | /* force apple2 disc interface for pravetz */ |
| 256 | | PORT_START("oric_floppy_interface") |
| 257 | | PORT_CONFNAME( 0x07, 0x00, "Floppy disc interface" ) |
| 258 | | PORT_CONFSETTING( 0x00, DEF_STR( None ) ) |
| 259 | | PORT_CONFSETTING( 0x03, "Low 8D DOS" ) |
| 260 | | PORT_CONFSETTING( 0x04, "High 8D DOS" ) |
| 735 | PORT_START("NMI") |
| 736 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("NMI") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) PORT_CHANGED_MEMBER(DEVICE_SELF, oric_state, nmi_pressed, 0) |
| 261 | 737 | |
| 262 | 738 | /* vsync cable hardware. This is a simple cable connected to the video output |
| 263 | 739 | to the monitor/television. The sync signal is connected to the cassette input |
| 264 | 740 | allowing interrupts to be generated from the vsync signal. */ |
| 265 | | PORT_CONFNAME(0x08, 0x00, "Vsync cable hardware") |
| 266 | | PORT_CONFSETTING( 0x00, DEF_STR( Off ) ) |
| 267 | | PORT_CONFSETTING( 0x08, DEF_STR( On ) ) |
| 268 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_VBLANK("screen") |
| 741 | PORT_START("CONFIG") |
| 742 | PORT_CONFNAME(0x01, 0x00, "Tape input") |
| 743 | PORT_CONFSETTING( 0x00, "Tape") |
| 744 | PORT_CONFSETTING( 0x01, "VSync cable") |
| 269 | 745 | INPUT_PORTS_END |
| 270 | 746 | |
| 271 | 747 | static INPUT_PORTS_START(telstrat) |
| 272 | | PORT_INCLUDE( oric ) |
| 748 | PORT_INCLUDE( orica ) |
| 273 | 749 | |
| 274 | | PORT_MODIFY("ROW5") |
| 275 | | PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Funct") PORT_CODE(KEYCODE_END) PORT_CHAR(UCHAR_MAMEKEY(F1)) |
| 750 | // The telestrat does not have the NMI button |
| 751 | PORT_MODIFY("NMI") |
| 752 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED) |
| 276 | 753 | |
| 277 | | PORT_MODIFY("FLOPPY") |
| 278 | | /* vsync cable hardware. This is a simple cable connected to the video output |
| 279 | | to the monitor/television. The sync signal is connected to the cassette input |
| 280 | | allowing interrupts to be generated from the vsync signal. */ |
| 281 | | PORT_BIT(0x07, 0x00, IPT_UNUSED) |
| 282 | | PORT_CONFNAME(0x08, 0x00, "Vsync cable hardware") |
| 283 | | PORT_CONFSETTING( 0x00, DEF_STR( Off ) ) |
| 284 | | PORT_CONFSETTING( 0x08, DEF_STR( On ) ) |
| 285 | | PORT_BIT( 0x010, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_VBLANK("screen") |
| 754 | PORT_START("JOY1") /* left joystick port */ |
| 755 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_8WAY PORT_PLAYER(1) |
| 756 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT) PORT_8WAY PORT_PLAYER(1) |
| 757 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_BUTTON1) PORT_PLAYER(1) |
| 758 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN) PORT_8WAY PORT_PLAYER(1) |
| 759 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP) PORT_8WAY PORT_PLAYER(1) |
| 286 | 760 | |
| 287 | | PORT_START("JOY0") /* left joystick port */ |
| 288 | | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Joystick 0 Up") PORT_CODE(JOYCODE_X_RIGHT_SWITCH) |
| 289 | | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Joystick 0 Down") PORT_CODE(JOYCODE_X_LEFT_SWITCH) |
| 290 | | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Joystick 0 Left") PORT_CODE(JOYCODE_BUTTON1) |
| 291 | | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Joystick 0 Right") PORT_CODE(JOYCODE_Y_DOWN_SWITCH) |
| 292 | | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Joystick 0 Fire 1") PORT_CODE(JOYCODE_Y_UP_SWITCH) |
| 293 | | |
| 294 | | PORT_START("JOY1") /* right joystick port */ |
| 295 | | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Joystick 1 Up") PORT_CODE(JOYCODE_X_RIGHT_SWITCH) |
| 296 | | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Joystick 1 Down") PORT_CODE(JOYCODE_X_LEFT_SWITCH) |
| 297 | | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Joystick 1 Left") PORT_CODE(JOYCODE_BUTTON1) |
| 298 | | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Joystick 1 Right") PORT_CODE(JOYCODE_Y_DOWN_SWITCH) |
| 299 | | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Joystick 1 Fire 1") PORT_CODE(JOYCODE_Y_UP_SWITCH) |
| 761 | PORT_START("JOY2") /* right joystick port */ |
| 762 | PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_8WAY PORT_PLAYER(2) |
| 763 | PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT) PORT_8WAY PORT_PLAYER(2) |
| 764 | PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_BUTTON1) PORT_PLAYER(2) |
| 765 | PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN) PORT_8WAY PORT_PLAYER(2) |
| 766 | PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP) PORT_8WAY PORT_PLAYER(2) |
| 300 | 767 | INPUT_PORTS_END |
| 301 | 768 | |
| 302 | 769 | |
| 303 | | static const unsigned char oric_palette[8*3] = |
| 304 | | { |
| 305 | | 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, |
| 306 | | 0x00, 0xff, 0x00, 0xff, 0xff, 0x00, |
| 307 | | 0x00, 0x00, 0xff, 0xff, 0x00, 0xff, |
| 308 | | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 309 | | }; |
| 310 | | |
| 311 | | /* Initialise the palette */ |
| 312 | | PALETTE_INIT_MEMBER(oric_state, oric) |
| 313 | | { |
| 314 | | int i; |
| 315 | | |
| 316 | | for ( i = 0; i < sizeof(oric_palette) / 3; i++ ) { |
| 317 | | palette.set_pen_color(i, oric_palette[i*3], oric_palette[i*3+1], oric_palette[i*3+2]); |
| 318 | | } |
| 319 | | } |
| 320 | | |
| 321 | | |
| 322 | | |
| 323 | 770 | static const ay8910_interface oric_ay_interface = |
| 324 | 771 | { |
| 325 | | AY8910_LEGACY_OUTPUT, |
| 326 | | AY8910_DEFAULT_LOADS, |
| 772 | AY8910_DISCRETE_OUTPUT, |
| 773 | { 4700, 4700, 4700}, |
| 327 | 774 | DEVCB_NULL, |
| 328 | 775 | DEVCB_NULL, |
| 329 | | DEVCB_DRIVER_MEMBER(oric_state, oric_psg_porta_write), |
| 776 | DEVCB_DRIVER_MEMBER(oric_state, psg_a_w), |
| 330 | 777 | DEVCB_NULL, |
| 331 | 778 | }; |
| 332 | 779 | |
| r29567 | r29568 | |
| 340 | 787 | NULL |
| 341 | 788 | }; |
| 342 | 789 | |
| 343 | | static const floppy_interface oric1_floppy_interface = |
| 344 | | { |
| 345 | | DEVCB_NULL, |
| 346 | | DEVCB_NULL, |
| 347 | | DEVCB_NULL, |
| 348 | | DEVCB_NULL, |
| 349 | | DEVCB_NULL, |
| 350 | | FLOPPY_STANDARD_5_25_DSHD, |
| 351 | | LEGACY_FLOPPY_OPTIONS_NAME(oric), |
| 352 | | NULL, |
| 353 | | NULL |
| 354 | | }; |
| 355 | | |
| 356 | | static const floppy_interface prav8d_floppy_interface = |
| 357 | | { |
| 358 | | DEVCB_NULL, |
| 359 | | DEVCB_NULL, |
| 360 | | DEVCB_NULL, |
| 361 | | DEVCB_NULL, |
| 362 | | DEVCB_NULL, |
| 363 | | FLOPPY_STANDARD_5_25_DSHD, |
| 364 | | LEGACY_FLOPPY_OPTIONS_NAME(apple2), |
| 365 | | NULL, |
| 366 | | NULL |
| 367 | | }; |
| 368 | | |
| 369 | 790 | static MACHINE_CONFIG_START( oric, oric_state ) |
| 370 | 791 | /* basic machine hardware */ |
| 371 | | MCFG_CPU_ADD("maincpu", M6502, 1000000) |
| 792 | MCFG_CPU_ADD("maincpu", M6502, XTAL_12MHz/12) |
| 372 | 793 | MCFG_CPU_PROGRAM_MAP(oric_mem) |
| 373 | 794 | MCFG_QUANTUM_TIME(attotime::from_hz(60)) |
| 374 | 795 | |
| 375 | | |
| 376 | 796 | /* video hardware */ |
| 377 | 797 | MCFG_SCREEN_ADD("screen", RASTER) |
| 378 | 798 | MCFG_SCREEN_REFRESH_RATE(60) |
| r29567 | r29568 | |
| 380 | 800 | MCFG_SCREEN_SIZE(40*6, 28*8) |
| 381 | 801 | MCFG_SCREEN_VISIBLE_AREA(0, 40*6-1, 0, 28*8-1) |
| 382 | 802 | MCFG_SCREEN_UPDATE_DRIVER(oric_state, screen_update_oric) |
| 383 | | MCFG_SCREEN_PALETTE("palette") |
| 803 | MCFG_SCREEN_VBLANK_DRIVER(oric_state, vblank_w) |
| 384 | 804 | |
| 385 | | MCFG_PALETTE_ADD("palette", 8) |
| 386 | | MCFG_PALETTE_INIT_OWNER(oric_state, oric) |
| 387 | | |
| 388 | | |
| 389 | 805 | /* sound hardware */ |
| 390 | 806 | MCFG_SPEAKER_STANDARD_MONO("mono") |
| 391 | 807 | MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette") |
| 392 | 808 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) |
| 393 | | MCFG_SOUND_ADD("ay8912", AY8912, 1000000) |
| 809 | MCFG_SOUND_ADD("ay8912", AY8912, XTAL_12MHz/12) |
| 394 | 810 | MCFG_SOUND_CONFIG(oric_ay_interface) |
| 395 | 811 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) |
| 396 | 812 | |
| 397 | 813 | /* printer */ |
| 398 | 814 | MCFG_CENTRONICS_ADD("centronics", centronics_printers, "image") |
| 399 | | MCFG_CENTRONICS_ACK_HANDLER(DEVWRITELINE("via6522_0", via6522_device, write_ca1)) |
| 400 | | |
| 815 | MCFG_CENTRONICS_ACK_HANDLER(DEVWRITELINE("via6522", via6522_device, write_ca1)) |
| 401 | 816 | MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics") |
| 402 | 817 | |
| 403 | 818 | /* cassette */ |
| 404 | 819 | MCFG_CASSETTE_ADD( "cassette", oric_cassette_interface ) |
| 820 | MCFG_TIMER_DRIVER_ADD_PERIODIC("tape_timer", oric_state, update_tape, attotime::from_hz(4800)) |
| 405 | 821 | |
| 406 | 822 | /* via */ |
| 407 | | MCFG_DEVICE_ADD( "via6522_0", VIA6522, 1000000 ) |
| 408 | | MCFG_VIA6522_READPA_HANDLER(READ8(oric_state, oric_via_in_a_func)) |
| 409 | | MCFG_VIA6522_READPB_HANDLER(READ8(oric_state, oric_via_in_b_func)) |
| 410 | | MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(oric_state, oric_via_out_a_func)) |
| 411 | | MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(oric_state, oric_via_out_b_func)) |
| 412 | | MCFG_VIA6522_CA2_HANDLER(WRITELINE(oric_state, oric_via_out_ca2_func)) |
| 413 | | MCFG_VIA6522_CB2_HANDLER(WRITELINE(oric_state, oric_via_out_cb2_func)) |
| 414 | | MCFG_VIA6522_IRQ_HANDLER(WRITELINE(oric_state, oric_via_irq_func)) |
| 823 | MCFG_DEVICE_ADD( "via6522", VIA6522, XTAL_12MHz/12 ) |
| 824 | MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(oric_state, via_a_w)) |
| 825 | MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(oric_state, via_b_w)) |
| 826 | MCFG_VIA6522_CA2_HANDLER(WRITELINE(oric_state, via_ca2_w)) |
| 827 | MCFG_VIA6522_CB2_HANDLER(WRITELINE(oric_state, via_cb2_w)) |
| 828 | MCFG_VIA6522_IRQ_HANDLER(WRITELINE(oric_state, via_irq_w)) |
| 415 | 829 | |
| 416 | | MCFG_WD1770_ADD("wd179x", oric_wd17xx_interface ) |
| 417 | | |
| 418 | | MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(oric1_floppy_interface) |
| 830 | /* extension port */ |
| 831 | MCFG_ORICEXT_ADD( "ext", oricext_intf, NULL, "maincpu", WRITELINE(oric_state, ext_irq_w)) |
| 419 | 832 | MACHINE_CONFIG_END |
| 420 | 833 | |
| 421 | 834 | static MACHINE_CONFIG_DERIVED( prav8d, oric ) |
| 422 | | MCFG_LEGACY_FLOPPY_4_DRIVES_REMOVE() |
| 423 | | MCFG_LEGACY_FLOPPY_DRIVE_ADD(FLOPPY_0, prav8d_floppy_interface) |
| 424 | 835 | MACHINE_CONFIG_END |
| 425 | 836 | |
| 426 | | static MACHINE_CONFIG_DERIVED( telstrat, oric ) |
| 837 | FLOPPY_FORMATS_MEMBER( telestrat_state::floppy_formats ) |
| 838 | FLOPPY_ORIC_DSK_FORMAT |
| 839 | FLOPPY_FORMATS_END |
| 840 | |
| 841 | static SLOT_INTERFACE_START( telestrat_floppies ) |
| 842 | SLOT_INTERFACE( "3dsdd", FLOPPY_3_DSDD ) |
| 843 | SLOT_INTERFACE_END |
| 844 | |
| 845 | static MACHINE_CONFIG_DERIVED_CLASS( telstrat, oric, telestrat_state ) |
| 427 | 846 | MCFG_CPU_MODIFY( "maincpu" ) |
| 428 | | MCFG_CPU_PROGRAM_MAP( telestrat_mem) |
| 847 | MCFG_CPU_PROGRAM_MAP(telestrat_mem) |
| 429 | 848 | |
| 430 | | MCFG_MACHINE_START_OVERRIDE(oric_state, telestrat ) |
| 431 | | |
| 432 | 849 | /* acia */ |
| 433 | 850 | MCFG_DEVICE_ADD("acia", MOS6551, 0) |
| 434 | 851 | MCFG_MOS6551_XTAL(XTAL_1_8432MHz) |
| 435 | | MCFG_MOS6551_IRQ_HANDLER(WRITELINE(oric_state, telestrat_acia_callback)) |
| 852 | MCFG_MOS6551_IRQ_HANDLER(WRITELINE(telestrat_state, acia_irq_w)) |
| 436 | 853 | |
| 437 | 854 | /* via */ |
| 438 | | MCFG_DEVICE_ADD( "via6522_1", VIA6522, 1000000 ) |
| 439 | | MCFG_VIA6522_READPA_HANDLER(READ8(oric_state, telestrat_via2_in_a_func)) |
| 440 | | MCFG_VIA6522_READPB_HANDLER(READ8(oric_state, telestrat_via2_in_b_func)) |
| 441 | | MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(oric_state, telestrat_via2_out_a_func)) |
| 442 | | MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(oric_state, telestrat_via2_out_b_func)) |
| 443 | | MCFG_VIA6522_IRQ_HANDLER(WRITELINE(oric_state, telestrat_via2_irq_func)) |
| 855 | MCFG_DEVICE_ADD( "via6522_2", VIA6522, XTAL_12MHz/12 ) |
| 856 | MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(telestrat_state, via2_a_w)) |
| 857 | MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(telestrat_state, via2_b_w)) |
| 858 | MCFG_VIA6522_CA2_HANDLER(WRITELINE(telestrat_state, via2_ca2_w)) |
| 859 | MCFG_VIA6522_CB2_HANDLER(WRITELINE(telestrat_state, via2_cb2_w)) |
| 860 | MCFG_VIA6522_IRQ_HANDLER(WRITELINE(telestrat_state, via2_irq_w)) |
| 861 | |
| 862 | /* microdisc */ |
| 863 | MCFG_FD1793x_ADD("fdc", XTAL_8MHz/8) |
| 864 | MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(telestrat_state, fdc_irq_w)) |
| 865 | MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(telestrat_state, fdc_drq_w)) |
| 866 | MCFG_WD_FDC_HLD_CALLBACK(WRITELINE(telestrat_state, fdc_hld_w)) |
| 867 | MCFG_WD_FDC_FORCE_READY |
| 868 | |
| 869 | MCFG_FLOPPY_DRIVE_ADD("fdc:0", telestrat_floppies, "3dsdd", telestrat_state::floppy_formats) |
| 870 | MCFG_FLOPPY_DRIVE_ADD("fdc:1", telestrat_floppies, NULL, telestrat_state::floppy_formats) |
| 871 | MCFG_FLOPPY_DRIVE_ADD("fdc:2", telestrat_floppies, NULL, telestrat_state::floppy_formats) |
| 872 | MCFG_FLOPPY_DRIVE_ADD("fdc:3", telestrat_floppies, NULL, telestrat_state::floppy_formats) |
| 444 | 873 | MACHINE_CONFIG_END |
| 445 | 874 | |
| 446 | 875 | |
| 447 | 876 | ROM_START(oric1) |
| 448 | | ROM_REGION(0x16800, "maincpu", 0) /* 0x10000 + 0x04000 + 0x02000 + 0x00800 */ |
| 449 | | ROM_LOAD ("basic10.rom", 0x10000, 0x04000, CRC(f18710b4) SHA1(333116e6884d85aaa4dfc7578a91cceeea66d016)) |
| 450 | | ROM_LOAD_OPTIONAL ("microdis.rom", 0x14000, 0x02000, CRC(a9664a9c) SHA1(0d2ef6e67322f48f4b7e08d8bbe68827e2074561) ) |
| 451 | | ROM_LOAD_OPTIONAL ("jasmin.rom", 0x16000, 0x00800, CRC(37220e89) SHA1(70e59b8abd67092f050462abc6cb5271e4c15f01) ) |
| 877 | ROM_REGION(0x4000, "maincpu", 0) |
| 878 | ROM_LOAD ("basic10.rom", 0, 0x04000, CRC(f18710b4) SHA1(333116e6884d85aaa4dfc7578a91cceeea66d016)) |
| 452 | 879 | ROM_END |
| 453 | 880 | |
| 454 | 881 | ROM_START(orica) |
| 455 | | ROM_REGION(0x16800, "maincpu", 0) /* 0x10000 + 0x04000 + 0x02000 + 0x00800 */ |
| 882 | ROM_REGION(0x4000, "maincpu", 0) |
| 456 | 883 | ROM_SYSTEM_BIOS( 0, "ver11", "Basic 1.1") |
| 457 | | ROMX_LOAD ("basic11b.rom", 0x10000, 0x04000, CRC(c3a92bef) SHA1(9451a1a09d8f75944dbd6f91193fc360f1de80ac), ROM_BIOS(1) ) |
| 884 | ROMX_LOAD ("basic11b.rom", 0, 0x04000, CRC(c3a92bef) SHA1(9451a1a09d8f75944dbd6f91193fc360f1de80ac), ROM_BIOS(1) ) |
| 458 | 885 | ROM_SYSTEM_BIOS( 1, "ver12", "Basic 1.2 (Pascal Leclerc)") // 1987/1999 - various enhancements and bugfixes |
| 459 | | ROMX_LOAD ("basic12.rom", 0x10000, 0x04000, CRC(dc4f22dc) SHA1(845e1a893de3dc0f856fdf2f69c3b73770b4094f), ROM_BIOS(2) ) |
| 886 | ROMX_LOAD ("basic12.rom", 0, 0x04000, CRC(dc4f22dc) SHA1(845e1a893de3dc0f856fdf2f69c3b73770b4094f), ROM_BIOS(2) ) |
| 460 | 887 | ROM_SYSTEM_BIOS( 2, "ver121", "Basic 1.21 (Pascal Leclerc)") // 07.1999 - DRAW enhancement |
| 461 | | ROMX_LOAD ("basic121.rom", 0x10000, 0x04000, CRC(0a2860b1) SHA1(b727d5c3bbc8cb1d510f224eb1e0d90d609e8506), ROM_BIOS(3) ) |
| 888 | ROMX_LOAD ("basic121.rom", 0, 0x04000, CRC(0a2860b1) SHA1(b727d5c3bbc8cb1d510f224eb1e0d90d609e8506), ROM_BIOS(3) ) |
| 462 | 889 | ROM_SYSTEM_BIOS( 3, "ver122", "Basic 1.22 (Pascal Leclerc)") // 08.2001 - added EUR symbol |
| 463 | | ROMX_LOAD ("basic122.rom", 0x10000, 0x04000, CRC(5ef2a861) SHA1(9ab6dc47b6e9dc65a4137ce0f0f12fc2b6ca8442), ROM_BIOS(4) ) |
| 890 | ROMX_LOAD ("basic122.rom", 0, 0x04000, CRC(5ef2a861) SHA1(9ab6dc47b6e9dc65a4137ce0f0f12fc2b6ca8442), ROM_BIOS(4) ) |
| 464 | 891 | ROM_SYSTEM_BIOS( 4, "ver11de", "Basic 1.1 DE") |
| 465 | | ROMX_LOAD( "bas11_de.rom", 0x10000, 0x04000, CRC(65233b2d) SHA1(b01cabb1a21980a6785a2fe37a8f8572c892123f), ROM_BIOS(5)) |
| 892 | ROMX_LOAD( "bas11_de.rom", 0, 0x04000, CRC(65233b2d) SHA1(b01cabb1a21980a6785a2fe37a8f8572c892123f), ROM_BIOS(5)) |
| 466 | 893 | ROM_SYSTEM_BIOS( 5, "ver11es", "Basic 1.1 ES") |
| 467 | | ROMX_LOAD( "bas11_es.rom", 0x10000, 0x04000, CRC(47bf26c7) SHA1(4fdbadd68db9ab8ad1cd56b4e5cbe51a9c3f11ae), ROM_BIOS(6)) |
| 894 | ROMX_LOAD( "bas11_es.rom", 0, 0x04000, CRC(47bf26c7) SHA1(4fdbadd68db9ab8ad1cd56b4e5cbe51a9c3f11ae), ROM_BIOS(6)) |
| 468 | 895 | ROM_SYSTEM_BIOS( 6, "ver11fr", "Basic 1.1 FR") |
| 469 | | ROMX_LOAD( "bas11_fr.rom", 0x10000, 0x04000, CRC(603b1fbf) SHA1(2a4583df3b59ca454d67d5631f242c96ec4cf99a), ROM_BIOS(7)) |
| 896 | ROMX_LOAD( "bas11_fr.rom", 0, 0x04000, CRC(603b1fbf) SHA1(2a4583df3b59ca454d67d5631f242c96ec4cf99a), ROM_BIOS(7)) |
| 470 | 897 | ROM_SYSTEM_BIOS( 7, "ver11se", "Basic 1.1 SE") |
| 471 | | ROMX_LOAD( "bas11_se.rom", 0x10000, 0x04000, CRC(a71523ac) SHA1(ce53acf84baec6ab5cbac9f9cefa71b3efeb2ead), ROM_BIOS(8)) |
| 898 | ROMX_LOAD( "bas11_se.rom", 0, 0x04000, CRC(a71523ac) SHA1(ce53acf84baec6ab5cbac9f9cefa71b3efeb2ead), ROM_BIOS(8)) |
| 472 | 899 | ROM_SYSTEM_BIOS( 8, "ver11uk", "Basic 1.1 UK") |
| 473 | | ROMX_LOAD( "bas11_uk.rom", 0x10000, 0x04000, CRC(303370d1) SHA1(589ff66fac8e06d65af3369491faa67a71f1322a), ROM_BIOS(9)) |
| 900 | ROMX_LOAD( "bas11_uk.rom", 0, 0x04000, CRC(303370d1) SHA1(589ff66fac8e06d65af3369491faa67a71f1322a), ROM_BIOS(9)) |
| 474 | 901 | ROM_SYSTEM_BIOS( 9, "ver12es", "Basic 1.2 ES") |
| 475 | | ROMX_LOAD( "bas12es_le.rom", 0x10000, 0x04000, CRC(70de4aeb) SHA1(b327418aa7d8a5a03c135e3d8acdd511df625893), ROM_BIOS(10)) |
| 902 | ROMX_LOAD( "bas12es_le.rom", 0, 0x04000, CRC(70de4aeb) SHA1(b327418aa7d8a5a03c135e3d8acdd511df625893), ROM_BIOS(10)) |
| 476 | 903 | ROM_SYSTEM_BIOS( 10, "ver12fr", "Basic 1.2 FR") |
| 477 | | ROMX_LOAD( "bas12fr_le.rom", 0x10000, 0x04000, CRC(47a437fc) SHA1(70271bc3ed5c3bf4d339d6f5de3de8c3c50ff573), ROM_BIOS(11)) |
| 904 | ROMX_LOAD( "bas12fr_le.rom", 0, 0x04000, CRC(47a437fc) SHA1(70271bc3ed5c3bf4d339d6f5de3de8c3c50ff573), ROM_BIOS(11)) |
| 478 | 905 | ROM_SYSTEM_BIOS( 11, "ver12ge", "Basic 1.2 GE") |
| 479 | | ROMX_LOAD( "bas12ge_le.rom", 0x10000, 0x04000, CRC(f5f0dd52) SHA1(75359302452ee7b19537698f124aaefd333688d0), ROM_BIOS(12)) |
| 906 | ROMX_LOAD( "bas12ge_le.rom", 0, 0x04000, CRC(f5f0dd52) SHA1(75359302452ee7b19537698f124aaefd333688d0), ROM_BIOS(12)) |
| 480 | 907 | ROM_SYSTEM_BIOS( 12, "ver12sw", "Basic 1.2 SW") |
| 481 | | ROMX_LOAD( "bas12sw_le.rom", 0x10000, 0x04000, CRC(100abe68) SHA1(6211d5969c4d7a6acb86ed19c5e51a33a3bef431), ROM_BIOS(13)) |
| 908 | ROMX_LOAD( "bas12sw_le.rom", 0, 0x04000, CRC(100abe68) SHA1(6211d5969c4d7a6acb86ed19c5e51a33a3bef431), ROM_BIOS(13)) |
| 482 | 909 | ROM_SYSTEM_BIOS( 13, "ver12uk", "Basic 1.2 UK") |
| 483 | | ROMX_LOAD( "bas12uk_le.rom", 0x10000, 0x04000, CRC(00fce8a6) SHA1(d40558bdf61b8aba6260293c9424fd463be7fad8), ROM_BIOS(14)) |
| 910 | ROMX_LOAD( "bas12uk_le.rom", 0, 0x04000, CRC(00fce8a6) SHA1(d40558bdf61b8aba6260293c9424fd463be7fad8), ROM_BIOS(14)) |
| 484 | 911 | ROM_SYSTEM_BIOS( 14, "ver121es", "Basic 1.211 ES") |
| 485 | | ROMX_LOAD( "bas121es_le.rom", 0x10000, 0x04000, CRC(87ec679b) SHA1(5de6a5f5121f69069c9b93d678046e814b5b64e9), ROM_BIOS(15)) |
| 912 | ROMX_LOAD( "bas121es_le.rom", 0, 0x04000, CRC(87ec679b) SHA1(5de6a5f5121f69069c9b93d678046e814b5b64e9), ROM_BIOS(15)) |
| 486 | 913 | ROM_SYSTEM_BIOS( 15, "ver121fr", "Basic 1.211 FR") |
| 487 | | ROMX_LOAD( "bas121fr_le.rom", 0x10000, 0x04000, CRC(e683dec2) SHA1(20df7ebc0f13aa835f286d50137f1a7ff7430c29), ROM_BIOS(16)) |
| 914 | ROMX_LOAD( "bas121fr_le.rom", 0, 0x04000, CRC(e683dec2) SHA1(20df7ebc0f13aa835f286d50137f1a7ff7430c29), ROM_BIOS(16)) |
| 488 | 915 | ROM_SYSTEM_BIOS( 16, "ver121ge", "Basic 1.211 GE") |
| 489 | | ROMX_LOAD( "bas121ge_le.rom", 0x10000, 0x04000, CRC(94fe32bf) SHA1(1024776d20030d602e432e50014502524658643a), ROM_BIOS(17)) |
| 916 | ROMX_LOAD( "bas121ge_le.rom", 0, 0x04000, CRC(94fe32bf) SHA1(1024776d20030d602e432e50014502524658643a), ROM_BIOS(17)) |
| 490 | 917 | ROM_SYSTEM_BIOS( 17, "ver121sw", "Basic 1.211 SW") |
| 491 | | ROMX_LOAD( "bas121sw_le.rom", 0x10000, 0x04000, CRC(e6ad11c7) SHA1(309c94a9861fcb770636dcde1801a5c68ca819b4), ROM_BIOS(18)) |
| 918 | ROMX_LOAD( "bas121sw_le.rom", 0, 0x04000, CRC(e6ad11c7) SHA1(309c94a9861fcb770636dcde1801a5c68ca819b4), ROM_BIOS(18)) |
| 492 | 919 | ROM_SYSTEM_BIOS( 18, "ver121uk", "Basic 1.211 UK") |
| 493 | | ROMX_LOAD( "bas121uk_le.rom", 0x10000, 0x04000, CRC(75aa1aa9) SHA1(ca99e244d9cbef625344c2054023504a4f9dcfe4), ROM_BIOS(19)) |
| 920 | ROMX_LOAD( "bas121uk_le.rom", 0, 0x04000, CRC(75aa1aa9) SHA1(ca99e244d9cbef625344c2054023504a4f9dcfe4), ROM_BIOS(19)) |
| 494 | 921 | ROM_SYSTEM_BIOS( 19, "ver122es", "Basic 1.22 ES") |
| 495 | | ROMX_LOAD( "bas122es_le.rom", 0x10000, 0x04000, CRC(9144f9e0) SHA1(acf2094078af057e74a31d90d7010be51b9033fa), ROM_BIOS(20)) |
| 922 | ROMX_LOAD( "bas122es_le.rom", 0, 0x04000, CRC(9144f9e0) SHA1(acf2094078af057e74a31d90d7010be51b9033fa), ROM_BIOS(20)) |
| 496 | 923 | ROM_SYSTEM_BIOS( 20, "ver122fr", "Basic 1.22 FR") |
| 497 | | ROMX_LOAD( "bas122fr_le.rom", 0x10000, 0x04000, CRC(370cfda4) SHA1(fad9a0661256e59bcc2915578647573e4128e1bb), ROM_BIOS(21)) |
| 924 | ROMX_LOAD( "bas122fr_le.rom", 0, 0x04000, CRC(370cfda4) SHA1(fad9a0661256e59bcc2915578647573e4128e1bb), ROM_BIOS(21)) |
| 498 | 925 | ROM_SYSTEM_BIOS( 21, "ver122ge", "Basic 1.22 GE") |
| 499 | | ROMX_LOAD( "bas122ge_le.rom", 0x10000, 0x04000, CRC(9a42bd62) SHA1(8a9c80f314daf4e5e64fa202e583b8a65796db8b), ROM_BIOS(22)) |
| 926 | ROMX_LOAD( "bas122ge_le.rom", 0, 0x04000, CRC(9a42bd62) SHA1(8a9c80f314daf4e5e64fa202e583b8a65796db8b), ROM_BIOS(22)) |
| 500 | 927 | ROM_SYSTEM_BIOS( 22, "ver122sw", "Basic 1.22 SW") |
| 501 | | ROMX_LOAD( "bas122sw_le.rom", 0x10000, 0x04000, CRC(e7fd57a4) SHA1(c75cbf7cfafaa02712dc7ca2f972220aef86fb8d), ROM_BIOS(23)) |
| 928 | ROMX_LOAD( "bas122sw_le.rom", 0, 0x04000, CRC(e7fd57a4) SHA1(c75cbf7cfafaa02712dc7ca2f972220aef86fb8d), ROM_BIOS(23)) |
| 502 | 929 | ROM_SYSTEM_BIOS( 23, "ver122uk", "Basic 1.22 UK") |
| 503 | | ROMX_LOAD( "bas122uk_le.rom", 0x10000, 0x04000, CRC(9865bcd7) SHA1(2a92e2d119463e682bf10647e3880e26656d65b5), ROM_BIOS(24)) |
| 504 | | |
| 505 | | ROM_LOAD_OPTIONAL ("microdis.rom", 0x14000, 0x02000, CRC(a9664a9c) SHA1(0d2ef6e67322f48f4b7e08d8bbe68827e2074561) ) |
| 506 | | ROM_LOAD_OPTIONAL ("jasmin.rom", 0x16000, 0x00800, CRC(37220e89) SHA1(70e59b8abd67092f050462abc6cb5271e4c15f01) ) |
| 930 | ROMX_LOAD( "bas122uk_le.rom", 0, 0x04000, CRC(9865bcd7) SHA1(2a92e2d119463e682bf10647e3880e26656d65b5), ROM_BIOS(24)) |
| 507 | 931 | ROM_END |
| 508 | 932 | |
| 509 | 933 | ROM_START(telstrat) |
| 510 | | ROM_REGION(0x30000, "maincpu", 0) /* 0x10000 + (0x04000 * 4) */ |
| 511 | | ROM_LOAD ("telmatic.rom", 0x010000, 0x02000, CRC(94358dc6) SHA1(35f92a0477a88f5cf564971125047ffcfa02ec10) ) |
| 512 | | ROM_LOAD ("teleass.rom", 0x014000, 0x04000, CRC(68b0fde6) SHA1(9e9af51dae3199cccf49ab3f0d47e2b9be4ba97d) ) |
| 513 | | ROM_LOAD ("hyperbas.rom", 0x018000, 0x04000, CRC(1d96ab50) SHA1(f5f70a0eb59f8cd6c261e179ae78ef906f68ed63) ) |
| 514 | | ROM_LOAD ("telmon24.rom", 0x01c000, 0x04000, CRC(aa727c5d) SHA1(86fc8dc0932f983efa199e31ae05a4424772f959) ) |
| 934 | ROM_REGION(0x4000, "telmatic", 0) |
| 935 | ROM_LOAD ("telmatic.rom", 0, 0x2000, CRC(94358dc6) SHA1(35f92a0477a88f5cf564971125047ffcfa02ec10) ) |
| 936 | ROM_RELOAD (0x2000, 0x2000) |
| 937 | |
| 938 | ROM_REGION(0x4000, "teleass", 0) |
| 939 | ROM_LOAD ("teleass.rom", 0, 0x4000, CRC(68b0fde6) SHA1(9e9af51dae3199cccf49ab3f0d47e2b9be4ba97d) ) |
| 940 | |
| 941 | ROM_REGION(0x4000, "hyperbas", 0) |
| 942 | ROM_LOAD ("hyperbas.rom", 0, 0x4000, CRC(1d96ab50) SHA1(f5f70a0eb59f8cd6c261e179ae78ef906f68ed63) ) |
| 943 | |
| 944 | ROM_REGION(0x4000, "telmon24", 0) |
| 945 | ROM_LOAD ("telmon24.rom", 0, 0x4000, CRC(aa727c5d) SHA1(86fc8dc0932f983efa199e31ae05a4424772f959) ) |
| 515 | 946 | ROM_END |
| 516 | 947 | |
| 517 | 948 | ROM_START(prav8d) |
| 518 | | ROM_REGION(0x14300, "maincpu", 0) /* 0x10000 + 0x04000 + 0x00100 + 0x00200 */ |
| 519 | | ROM_LOAD( "pravetzt.rom", 0x10000, 0x4000, CRC(58079502) SHA1(7afc276cb118adff72e4f16698f94bf3b2c64146) ) |
| 520 | | ROM_LOAD_OPTIONAL( "8ddoslo.rom", 0x014000, 0x0100, CRC(0c82f636) SHA1(b29d151a0dfa3c7cd50439b51d0a8f95559bc2b6) ) |
| 521 | | ROM_LOAD_OPTIONAL( "8ddoshi.rom", 0x014100, 0x0200, CRC(66309641) SHA1(9c2e82b3c4d385ade6215fcb89f8b92e6fd2bf4b) ) |
| 949 | ROM_REGION(0x4000, "maincpu", 0) /* 0x10000 + 0x04000 + 0x00100 + 0x00200 */ |
| 950 | ROM_LOAD( "pravetzt.rom", 0, 0x4000, CRC(58079502) SHA1(7afc276cb118adff72e4f16698f94bf3b2c64146) ) |
| 951 | // ROM_LOAD_OPTIONAL( "8ddoslo.rom", 0x014000, 0x0100, CRC(0c82f636) SHA1(b29d151a0dfa3c7cd50439b51d0a8f95559bc2b6) ) |
| 952 | // ROM_LOAD_OPTIONAL( "8ddoshi.rom", 0x014100, 0x0200, CRC(66309641) SHA1(9c2e82b3c4d385ade6215fcb89f8b92e6fd2bf4b) ) |
| 522 | 953 | ROM_END |
| 523 | 954 | |
| 524 | 955 | ROM_START(prav8dd) |
| 525 | | ROM_REGION(0x14300, "maincpu", 0) /* 0x10000 + 0x04000 + 0x00100 + 0x00200 */ |
| 956 | ROM_REGION(0x4000, "maincpu", 0) /* 0x10000 + 0x04000 + 0x00100 + 0x00200 */ |
| 526 | 957 | ROM_SYSTEM_BIOS( 0, "default", "Disk ROM, 1989") |
| 527 | | ROMX_LOAD( "8d.rom", 0x10000, 0x4000, CRC(b48973ef) SHA1(fd47c977fc215a3b577596a7483df53e8a1e9c83), ROM_BIOS(1) ) |
| 958 | ROMX_LOAD( "8d.rom", 0, 0x4000, CRC(b48973ef) SHA1(fd47c977fc215a3b577596a7483df53e8a1e9c83), ROM_BIOS(1) ) |
| 528 | 959 | ROM_SYSTEM_BIOS( 1, "radosoft", "RadoSoft Disk ROM, 1992") |
| 529 | | ROMX_LOAD( "pravetzd.rom", 0x10000, 0x4000, CRC(f8d23821) SHA1(f87ad3c5832773b6e0614905552a80c98dc8e2a5), ROM_BIOS(2) ) |
| 530 | | ROM_LOAD_OPTIONAL( "8ddoslo.rom", 0x014000, 0x0100, CRC(0c82f636) SHA1(b29d151a0dfa3c7cd50439b51d0a8f95559bc2b6) ) |
| 531 | | ROM_LOAD_OPTIONAL( "8ddoshi.rom", 0x014100, 0x0200, CRC(66309641) SHA1(9c2e82b3c4d385ade6215fcb89f8b92e6fd2bf4b) ) |
| 960 | ROMX_LOAD( "pravetzd.rom", 0, 0x4000, CRC(f8d23821) SHA1(f87ad3c5832773b6e0614905552a80c98dc8e2a5), ROM_BIOS(2) ) |
| 961 | // ROM_LOAD_OPTIONAL( "8ddoslo.rom", 0x014000, 0x0100, CRC(0c82f636) SHA1(b29d151a0dfa3c7cd50439b51d0a8f95559bc2b6) ) |
| 962 | // ROM_LOAD_OPTIONAL( "8ddoshi.rom", 0x014100, 0x0200, CRC(66309641) SHA1(9c2e82b3c4d385ade6215fcb89f8b92e6fd2bf4b) ) |
| 532 | 963 | ROM_END |
| 533 | 964 | |
| 534 | 965 | |
| r29567 | r29568 | |
| 537 | 968 | COMP( 1984, orica, oric1, 0, oric, orica, driver_device, 0, "Tangerine", "Oric Atmos" , 0) |
| 538 | 969 | COMP( 1985, prav8d, oric1, 0, prav8d, prav8d, driver_device, 0, "Pravetz", "Pravetz 8D", 0) |
| 539 | 970 | COMP( 1989, prav8dd, oric1, 0, prav8d, prav8d, driver_device, 0, "Pravetz", "Pravetz 8D (Disk ROM)", GAME_UNOFFICIAL) |
| 540 | | COMP( 1986, telstrat, oric1, 0, telstrat, telstrat, driver_device, 0, "Tangerine", "Oric Telestrat", GAME_NOT_WORKING ) |
| 971 | COMP( 1986, telstrat, oric1, 0, telstrat, telstrat, driver_device, 0, "Tangerine", "Oric Telestrat", 0 ) |
trunk/src/mess/machine/oric.c
| r29567 | r29568 | |
| 1 | | /********************************************************************* |
| 2 | | |
| 3 | | machine/oric.c |
| 4 | | |
| 5 | | Paul Cook |
| 6 | | Kev Thacker |
| 7 | | |
| 8 | | Thankyou to Fabrice Frances for his ORIC documentation which helped with this driver |
| 9 | | http://oric.ifrance.com/oric/ |
| 10 | | |
| 11 | | TODO: |
| 12 | | - there are problems loading some .wav's. Try to fix these. |
| 13 | | - fix more graphics display problems |
| 14 | | - check the printer works |
| 15 | | - fix more disc drive/wd179x problems so more software will run |
| 16 | | |
| 17 | | *********************************************************************/ |
| 18 | | |
| 19 | | |
| 20 | | #include "includes/oric.h" |
| 21 | | |
| 22 | | |
| 23 | | |
| 24 | | |
| 25 | | /* ==0 if oric1 or oric atmos, !=0 if telestrat */ |
| 26 | | |
| 27 | | /* This does not exist in the real hardware. I have used it to |
| 28 | | know which sources are interrupting */ |
| 29 | | /* bit 2 = telestrat 2nd via interrupt, |
| 30 | | 1 = microdisc interface, |
| 31 | | 0 = oric 1st via interrupt */ |
| 32 | | |
| 33 | | enum |
| 34 | | { |
| 35 | | ORIC_FLOPPY_NONE, |
| 36 | | ORIC_FLOPPY_MFM_DISK, |
| 37 | | ORIC_FLOPPY_BASIC_DISK |
| 38 | | }; |
| 39 | | |
| 40 | | /* type of disc interface connected to oric/oric atmos */ |
| 41 | | /* telestrat always has a microdisc interface */ |
| 42 | | enum |
| 43 | | { |
| 44 | | ORIC_FLOPPY_INTERFACE_NONE = 0, |
| 45 | | ORIC_FLOPPY_INTERFACE_MICRODISC = 1, |
| 46 | | ORIC_FLOPPY_INTERFACE_JASMIN = 2, |
| 47 | | ORIC_FLOPPY_INTERFACE_APPLE2 = 3, |
| 48 | | ORIC_FLOPPY_INTERFACE_APPLE2_V2 = 4 |
| 49 | | }; |
| 50 | | |
| 51 | | /* called when ints are changed - cleared/set */ |
| 52 | | void oric_state::oric_refresh_ints() |
| 53 | | { |
| 54 | | /* telestrat has floppy hardware built-in! */ |
| 55 | | if (m_is_telestrat==0) |
| 56 | | { |
| 57 | | /* oric 1 or oric atmos */ |
| 58 | | |
| 59 | | /* if floppy disc hardware is disabled, do not allow interrupts from it */ |
| 60 | | if ((m_io_floppy->manager().safe_to_read()) && ((m_io_floppy->read() & 0x07) == ORIC_FLOPPY_INTERFACE_NONE)) |
| 61 | | { |
| 62 | | m_irqs &=~(1<<1); |
| 63 | | } |
| 64 | | } |
| 65 | | |
| 66 | | /* any irq set? */ |
| 67 | | if (m_irqs & 0x0f) |
| 68 | | { |
| 69 | | m_maincpu->set_input_line(0, HOLD_LINE); |
| 70 | | } |
| 71 | | else |
| 72 | | { |
| 73 | | m_maincpu->set_input_line(0, CLEAR_LINE); |
| 74 | | } |
| 75 | | } |
| 76 | | |
| 77 | | |
| 78 | | |
| 79 | | /* index of keyboard line to scan */ |
| 80 | | /* sense result */ |
| 81 | | /* mask to read keys */ |
| 82 | | |
| 83 | | |
| 84 | | |
| 85 | | |
| 86 | | |
| 87 | | /* refresh keyboard sense */ |
| 88 | | void oric_state::oric_keyboard_sense_refresh() |
| 89 | | { |
| 90 | | /* The following assumes that if a 0 is written, it can be used to detect if any key has been pressed.. */ |
| 91 | | /* for each bit that is 0, it combines it's pressed state with the pressed state so far */ |
| 92 | | |
| 93 | | int i; |
| 94 | | unsigned char key_bit = 0; |
| 95 | | |
| 96 | | /* what if data is 0, can it sense if any of the keys on a line are pressed? */ |
| 97 | | int input_port_data = 0; |
| 98 | | |
| 99 | | switch ( m_keyboard_line ) |
| 100 | | { |
| 101 | | case 0: input_port_data = m_io_row0->read(); break; |
| 102 | | case 1: input_port_data = m_io_row1->read(); break; |
| 103 | | case 2: input_port_data = m_io_row2->read(); break; |
| 104 | | case 3: input_port_data = m_io_row3->read(); break; |
| 105 | | case 4: input_port_data = m_io_row4->read(); break; |
| 106 | | case 5: input_port_data = m_io_row5->read(); break; |
| 107 | | case 6: input_port_data = m_io_row6->read(); break; |
| 108 | | case 7: input_port_data = m_io_row7->read(); break; |
| 109 | | } |
| 110 | | |
| 111 | | /* go through all bits in line */ |
| 112 | | for (i=0; i<8; i++) |
| 113 | | { |
| 114 | | /* sense this bit? */ |
| 115 | | if (((~m_keyboard_mask) & (1<<i)) != 0) |
| 116 | | { |
| 117 | | /* is key pressed? */ |
| 118 | | if (input_port_data & (1<<i)) |
| 119 | | { |
| 120 | | /* yes */ |
| 121 | | key_bit |= 1; |
| 122 | | } |
| 123 | | } |
| 124 | | } |
| 125 | | |
| 126 | | /* clear sense result */ |
| 127 | | m_key_sense_bit = 0; |
| 128 | | |
| 129 | | /* any keys pressed on this line? */ |
| 130 | | if (key_bit!=0) |
| 131 | | { |
| 132 | | /* set sense result */ |
| 133 | | m_key_sense_bit = (1<<3); |
| 134 | | } |
| 135 | | } |
| 136 | | |
| 137 | | |
| 138 | | /* this is executed when a write to psg port a is done */ |
| 139 | | WRITE8_MEMBER(oric_state::oric_psg_porta_write) |
| 140 | | { |
| 141 | | m_keyboard_mask = data; |
| 142 | | } |
| 143 | | |
| 144 | | |
| 145 | | /* PSG control pins */ |
| 146 | | /* bit 1 = BDIR state */ |
| 147 | | /* bit 0 = BC1 state */ |
| 148 | | |
| 149 | | /* this port is also used to read printer data */ |
| 150 | | READ8_MEMBER(oric_state::oric_via_in_a_func) |
| 151 | | { |
| 152 | | /*logerror("port a read\r\n"); */ |
| 153 | | |
| 154 | | /* access psg? */ |
| 155 | | if (m_psg_control!=0) |
| 156 | | { |
| 157 | | /* if psg is in read register state return reg data */ |
| 158 | | if (m_psg_control==0x01) |
| 159 | | { |
| 160 | | return m_ay8912->data_r(space, 0); |
| 161 | | } |
| 162 | | |
| 163 | | /* return high-impedance */ |
| 164 | | return 0x0ff; |
| 165 | | } |
| 166 | | |
| 167 | | /* correct?? */ |
| 168 | | return m_via_port_a_data; |
| 169 | | } |
| 170 | | |
| 171 | | READ8_MEMBER(oric_state::oric_via_in_b_func) |
| 172 | | { |
| 173 | | int data; |
| 174 | | |
| 175 | | oric_keyboard_sense_refresh(); |
| 176 | | |
| 177 | | data = m_key_sense_bit; |
| 178 | | data |= m_keyboard_line & 0x07; |
| 179 | | |
| 180 | | return data; |
| 181 | | } |
| 182 | | |
| 183 | | |
| 184 | | /* read/write data depending on state of bdir, bc1 pins and data output to psg */ |
| 185 | | void oric_state::oric_psg_connection_refresh(address_space &space) |
| 186 | | { |
| 187 | | if (m_psg_control!=0) |
| 188 | | { |
| 189 | | switch (m_psg_control) |
| 190 | | { |
| 191 | | /* PSG inactive */ |
| 192 | | case 0: |
| 193 | | break; |
| 194 | | |
| 195 | | /* read register data */ |
| 196 | | case 1: |
| 197 | | //m_via_port_a_data = ay8910_read_port_0_r(space, 0); |
| 198 | | break; |
| 199 | | |
| 200 | | /* write register data */ |
| 201 | | case 2: |
| 202 | | m_ay8912->data_w(space, 0, m_via_port_a_data); |
| 203 | | break; |
| 204 | | |
| 205 | | /* write register index */ |
| 206 | | case 3: |
| 207 | | m_ay8912->address_w(space, 0, m_via_port_a_data); |
| 208 | | break; |
| 209 | | |
| 210 | | default: |
| 211 | | break; |
| 212 | | } |
| 213 | | |
| 214 | | return; |
| 215 | | } |
| 216 | | } |
| 217 | | |
| 218 | | WRITE8_MEMBER(oric_state::oric_via_out_a_func) |
| 219 | | { |
| 220 | | m_via_port_a_data = data; |
| 221 | | |
| 222 | | oric_psg_connection_refresh(space); |
| 223 | | |
| 224 | | if (m_psg_control==0) |
| 225 | | { |
| 226 | | /* if psg not selected, write to printer */ |
| 227 | | m_cent_data_out->write(space, 0, data); |
| 228 | | } |
| 229 | | } |
| 230 | | |
| 231 | | /* |
| 232 | | PB0..PB2 |
| 233 | | keyboard lines-demultiplexer line 7 |
| 234 | | |
| 235 | | PB3 |
| 236 | | keyboard sense line 0 |
| 237 | | |
| 238 | | PB4 |
| 239 | | printer strobe line 1 |
| 240 | | |
| 241 | | PB5 |
| 242 | | (not connected) ?? 1 |
| 243 | | |
| 244 | | PB6 |
| 245 | | tape connector motor control 0 |
| 246 | | |
| 247 | | PB7 |
| 248 | | tape connector output high 1 |
| 249 | | |
| 250 | | */ |
| 251 | | |
| 252 | | |
| 253 | | /* not called yet - this will update the via with the state of the tape data. |
| 254 | | This allows the via to trigger on bit changes and issue interrupts */ |
| 255 | | TIMER_CALLBACK_MEMBER(oric_state::oric_refresh_tape) |
| 256 | | { |
| 257 | | int data; |
| 258 | | int input_port_9; |
| 259 | | |
| 260 | | data = 0; |
| 261 | | |
| 262 | | if (m_cassette->input() > 0.0038) |
| 263 | | { |
| 264 | | data |= 1; |
| 265 | | } |
| 266 | | |
| 267 | | /* "A simple cable to catch the vertical retrace signal ! |
| 268 | | This cable connects the video output for the television/monitor |
| 269 | | to the via cb1 input. Interrupts can be generated from the vertical |
| 270 | | sync, and flicker free games can be produced */ |
| 271 | | |
| 272 | | input_port_9 = m_io_floppy->read(); |
| 273 | | /* cable is enabled? */ |
| 274 | | if ((input_port_9 & 0x08)!=0) |
| 275 | | { |
| 276 | | /* return state of vsync */ |
| 277 | | data = input_port_9>>4; |
| 278 | | } |
| 279 | | |
| 280 | | m_via6522_0->write_cb1(data); |
| 281 | | } |
| 282 | | |
| 283 | | WRITE8_MEMBER(oric_state::oric_via_out_b_func) |
| 284 | | { |
| 285 | | /* KEYBOARD */ |
| 286 | | m_keyboard_line = data & 0x07; |
| 287 | | |
| 288 | | /* CASSETTE */ |
| 289 | | /* cassette motor control */ |
| 290 | | m_cassette->change_state( |
| 291 | | (data & 0x40) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED, |
| 292 | | CASSETTE_MOTOR_DISABLED); |
| 293 | | |
| 294 | | /* cassette data out */ |
| 295 | | m_cassette->output((data & (1<<7)) ? -1.0 : +1.0); |
| 296 | | |
| 297 | | /* centronics STROBE is connected to PB4 */ |
| 298 | | m_centronics->write_strobe(BIT(data, 4)); |
| 299 | | |
| 300 | | oric_psg_connection_refresh(space); |
| 301 | | m_previous_portb_data = data; |
| 302 | | } |
| 303 | | |
| 304 | | |
| 305 | | WRITE_LINE_MEMBER(oric_state::oric_via_out_ca2_func) |
| 306 | | { |
| 307 | | if (state) |
| 308 | | m_psg_control |=1; |
| 309 | | else |
| 310 | | m_psg_control &=~1; |
| 311 | | |
| 312 | | oric_psg_connection_refresh(generic_space()); |
| 313 | | } |
| 314 | | |
| 315 | | WRITE_LINE_MEMBER(oric_state::oric_via_out_cb2_func) |
| 316 | | { |
| 317 | | if (state) |
| 318 | | m_psg_control |=2; |
| 319 | | else |
| 320 | | m_psg_control &=~2; |
| 321 | | |
| 322 | | oric_psg_connection_refresh(generic_space()); |
| 323 | | } |
| 324 | | |
| 325 | | |
| 326 | | WRITE_LINE_MEMBER(oric_state::oric_via_irq_func) |
| 327 | | { |
| 328 | | m_irqs &= ~(1<<0); |
| 329 | | |
| 330 | | if (state) |
| 331 | | { |
| 332 | | m_irqs |=(1<<0); |
| 333 | | } |
| 334 | | |
| 335 | | oric_refresh_ints(); |
| 336 | | } |
| 337 | | |
| 338 | | |
| 339 | | /* |
| 340 | | VIA Lines |
| 341 | | Oric usage |
| 342 | | |
| 343 | | PA0..PA7 |
| 344 | | PSG data bus, printer data lines |
| 345 | | |
| 346 | | CA1 |
| 347 | | printer acknowledge line |
| 348 | | |
| 349 | | CA2 |
| 350 | | PSG BC1 line |
| 351 | | |
| 352 | | PB0..PB2 |
| 353 | | keyboard lines-demultiplexer |
| 354 | | |
| 355 | | PB3 |
| 356 | | keyboard sense line |
| 357 | | |
| 358 | | PB4 |
| 359 | | printer strobe line |
| 360 | | |
| 361 | | PB5 |
| 362 | | (not connected) |
| 363 | | |
| 364 | | PB6 |
| 365 | | tape connector motor control |
| 366 | | |
| 367 | | PB7 |
| 368 | | tape connector output |
| 369 | | |
| 370 | | CB1 |
| 371 | | tape connector input |
| 372 | | |
| 373 | | CB2 |
| 374 | | PSG BDIR line |
| 375 | | |
| 376 | | */ |
| 377 | | |
| 378 | | |
| 379 | | |
| 380 | | |
| 381 | | /*********************/ |
| 382 | | /* APPLE 2 INTERFACE */ |
| 383 | | |
| 384 | | /* |
| 385 | | apple2 disc drive accessed through 0x0310-0x031f (read/write) |
| 386 | | oric via accessed through 0x0300-0x030f. (read/write) |
| 387 | | disk interface rom accessed through 0x0320-0x03ff (read only) |
| 388 | | |
| 389 | | CALL &320 to start, or use BOBY rom. |
| 390 | | */ |
| 391 | | |
| 392 | | void oric_state::oric_install_apple2_interface() |
| 393 | | { |
| 394 | | applefdc_base_device *fdc = machine().device<applefdc_base_device>("fdc"); |
| 395 | | address_space &space = m_maincpu->space(AS_PROGRAM); |
| 396 | | |
| 397 | | if (m_is_telestrat) |
| 398 | | { |
| 399 | | return; |
| 400 | | } |
| 401 | | |
| 402 | | space.install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r), this)); |
| 403 | | space.install_read_handler(0x0310, 0x031f, read8_delegate(FUNC(applefdc_base_device::read), fdc)); |
| 404 | | space.install_read_bank(0x0320, 0x03ff, "bank4"); |
| 405 | | m_bank4 = membank("bank4"); |
| 406 | | |
| 407 | | space.install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w), this)); |
| 408 | | space.install_write_handler(0x0310, 0x031f, write8_delegate(FUNC(applefdc_base_device::write), fdc)); |
| 409 | | m_bank4->set_base( m_region_maincpu->base() + 0x014000 + 0x020); |
| 410 | | } |
| 411 | | |
| 412 | | |
| 413 | | void oric_state::oric_enable_memory(int low, int high, int rd, int wr) |
| 414 | | { |
| 415 | | int i; |
| 416 | | address_space &space = m_maincpu->space(AS_PROGRAM); |
| 417 | | |
| 418 | | if (m_is_telestrat) |
| 419 | | { |
| 420 | | return; |
| 421 | | } |
| 422 | | |
| 423 | | for (i = low; i <= high; i++) |
| 424 | | { |
| 425 | | switch(i) { |
| 426 | | case 1: |
| 427 | | if (rd) { |
| 428 | | space.install_read_bank(0xc000, 0xdfff, "bank1"); |
| 429 | | } else { |
| 430 | | space.nop_read(0xc000, 0xdfff); |
| 431 | | } |
| 432 | | if (wr) { |
| 433 | | space.install_write_bank(0xc000, 0xdfff, "bank5"); |
| 434 | | } else { |
| 435 | | space.unmap_write(0xc000, 0xdfff); |
| 436 | | } |
| 437 | | break; |
| 438 | | case 2: |
| 439 | | if (rd) { |
| 440 | | space.install_read_bank(0xe000, 0xf7ff, "bank2"); |
| 441 | | } else { |
| 442 | | space.nop_read(0xe000, 0xf7ff); |
| 443 | | } |
| 444 | | if (wr) { |
| 445 | | space.install_write_bank(0xe000, 0xf7ff, "bank6"); |
| 446 | | } else { |
| 447 | | space.unmap_write(0xe000, 0xf7ff); |
| 448 | | } |
| 449 | | break; |
| 450 | | case 3: |
| 451 | | if (rd) { |
| 452 | | space.install_read_bank(0xf800, 0xffff, "bank3"); |
| 453 | | } else { |
| 454 | | space.nop_read(0xf800, 0xffff); |
| 455 | | } |
| 456 | | break; |
| 457 | | } |
| 458 | | } |
| 459 | | } |
| 460 | | |
| 461 | | |
| 462 | | |
| 463 | | /************************/ |
| 464 | | /* APPLE 2 INTERFACE V2 */ |
| 465 | | |
| 466 | | /* |
| 467 | | apple2 disc drive accessed through 0x0310-0x031f (read/write) |
| 468 | | oric via accessed through 0x0300-0x030f. (read/write) |
| 469 | | disk interface rom accessed through 0x0320-0x03ff (read only) |
| 470 | | v2 registers accessed through 0x0380-0x0383 (write only) |
| 471 | | |
| 472 | | CALL &320 to start, or use BOBY rom. |
| 473 | | */ |
| 474 | | |
| 475 | | WRITE8_MEMBER(oric_state::apple2_v2_interface_w) |
| 476 | | { |
| 477 | | /* data is ignored, address is used to decode operation */ |
| 478 | | if (m_is_telestrat) |
| 479 | | return; |
| 480 | | |
| 481 | | /* logerror("apple 2 interface v2 rom page: %01x\n",(offset & 0x02)>>1); */ |
| 482 | | |
| 483 | | /* bit 0 is 0 for page 0, 1 for page 1 */ |
| 484 | | m_bank4->set_base(m_region_maincpu->base() + 0x014000 + 0x0100 + (((offset & 0x02)>>1)<<8)); |
| 485 | | |
| 486 | | oric_enable_memory(1, 3, TRUE, TRUE); |
| 487 | | |
| 488 | | /* bit 1 is 0, rom enabled, bit 1 is 1 ram enabled */ |
| 489 | | if ((offset & 0x01)==0) |
| 490 | | { |
| 491 | | unsigned char *rom_ptr; |
| 492 | | |
| 493 | | /* logerror("apple 2 interface v2: rom enabled\n"); */ |
| 494 | | |
| 495 | | /* enable rom */ |
| 496 | | rom_ptr = m_region_maincpu->base() + 0x010000; |
| 497 | | m_bank1->set_base(rom_ptr); |
| 498 | | m_bank2->set_base(rom_ptr+0x02000); |
| 499 | | m_bank3->set_base(rom_ptr+0x03800); |
| 500 | | m_bank5->set_base(m_ram_0x0c000); |
| 501 | | m_bank6->set_base(m_ram_0x0c000+0x02000); |
| 502 | | m_bank7->set_base(m_ram_0x0c000+0x03800); |
| 503 | | } |
| 504 | | else |
| 505 | | { |
| 506 | | /*logerror("apple 2 interface v2: ram enabled\n"); */ |
| 507 | | |
| 508 | | /* enable ram */ |
| 509 | | m_bank1->set_base(m_ram_0x0c000); |
| 510 | | m_bank2->set_base(m_ram_0x0c000+0x02000); |
| 511 | | m_bank3->set_base(m_ram_0x0c000+0x03800); |
| 512 | | m_bank5->set_base(m_ram_0x0c000); |
| 513 | | m_bank6->set_base(m_ram_0x0c000+0x02000); |
| 514 | | m_bank7->set_base(m_ram_0x0c000+0x03800); |
| 515 | | } |
| 516 | | } |
| 517 | | |
| 518 | | |
| 519 | | /* APPLE 2 INTERFACE V2 */ |
| 520 | | void oric_state::oric_install_apple2_v2_interface() |
| 521 | | { |
| 522 | | applefdc_base_device *fdc = machine().device<applefdc_base_device>("fdc"); |
| 523 | | address_space &space = m_maincpu->space(AS_PROGRAM); |
| 524 | | |
| 525 | | space.install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r), this)); |
| 526 | | space.install_read_handler(0x0310, 0x031f, read8_delegate(FUNC(applefdc_base_device::read), fdc)); |
| 527 | | space.install_read_bank(0x0320, 0x03ff, "bank4"); |
| 528 | | m_bank4 = membank("bank4"); |
| 529 | | |
| 530 | | space.install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w), this)); |
| 531 | | space.install_write_handler(0x0310, 0x031f, write8_delegate(FUNC(applefdc_base_device::write), fdc)); |
| 532 | | space.install_write_handler(0x0380, 0x0383, write8_delegate(FUNC(oric_state::apple2_v2_interface_w),this)); |
| 533 | | |
| 534 | | apple2_v2_interface_w(space, 0, 0); |
| 535 | | } |
| 536 | | |
| 537 | | /********************/ |
| 538 | | /* JASMIN INTERFACE */ |
| 539 | | |
| 540 | | |
| 541 | | /* bit 0: overlay ram access (1 means overlay ram enabled) */ |
| 542 | | |
| 543 | | /* bit 0: ROMDIS (1 means internal Basic rom disabled) */ |
| 544 | | |
| 545 | | |
| 546 | | void oric_state::oric_jasmin_set_mem_0x0c000() |
| 547 | | { |
| 548 | | /* assumption: |
| 549 | | 1. It is possible to access all 16k overlay ram. |
| 550 | | 2. If os is enabled, and overlay ram is enabled, all 16k can be accessed. |
| 551 | | 3. if os is disabled, and overlay ram is enabled, jasmin rom takes priority. |
| 552 | | */ |
| 553 | | if (m_is_telestrat) |
| 554 | | { |
| 555 | | return; |
| 556 | | } |
| 557 | | |
| 558 | | /* the ram is disabled in the jasmin rom which indicates that jasmin takes |
| 559 | | priority over the ram */ |
| 560 | | |
| 561 | | /* basic rom disabled? */ |
| 562 | | if ((m_port_3fb_w & 0x01)==0) |
| 563 | | { |
| 564 | | /* no, it is enabled! */ |
| 565 | | |
| 566 | | /* overlay ram enabled? */ |
| 567 | | if ((m_port_3fa_w & 0x01)==0) |
| 568 | | { |
| 569 | | unsigned char *rom_ptr; |
| 570 | | |
| 571 | | /* no it is disabled */ |
| 572 | | /*logerror("&c000-&ffff is os rom\n"); */ |
| 573 | | |
| 574 | | oric_enable_memory(1, 3, TRUE, FALSE); |
| 575 | | |
| 576 | | rom_ptr = m_region_maincpu->base() + 0x010000; |
| 577 | | m_bank1->set_base(rom_ptr); |
| 578 | | m_bank2->set_base(rom_ptr+0x02000); |
| 579 | | m_bank3->set_base(rom_ptr+0x03800); |
| 580 | | } |
| 581 | | else |
| 582 | | { |
| 583 | | /*logerror("&c000-&ffff is ram\n"); */ |
| 584 | | |
| 585 | | oric_enable_memory(1, 3, TRUE, TRUE); |
| 586 | | |
| 587 | | m_bank1->set_base(m_ram_0x0c000); |
| 588 | | m_bank2->set_base(m_ram_0x0c000+0x02000); |
| 589 | | m_bank3->set_base(m_ram_0x0c000+0x03800); |
| 590 | | m_bank5->set_base(m_ram_0x0c000); |
| 591 | | m_bank6->set_base(m_ram_0x0c000+0x02000); |
| 592 | | m_bank7->set_base(m_ram_0x0c000+0x03800); |
| 593 | | } |
| 594 | | } |
| 595 | | else |
| 596 | | { |
| 597 | | /* yes, basic rom is disabled */ |
| 598 | | |
| 599 | | if ((m_port_3fa_w & 0x01)==0) |
| 600 | | { |
| 601 | | /* overlay ram disabled */ |
| 602 | | |
| 603 | | /*logerror("&c000-&f8ff is nothing!\n"); */ |
| 604 | | oric_enable_memory(1, 2, FALSE, FALSE); |
| 605 | | } |
| 606 | | else |
| 607 | | { |
| 608 | | /*logerror("&c000-&f8ff is ram!\n"); */ |
| 609 | | oric_enable_memory(1, 2, TRUE, TRUE); |
| 610 | | |
| 611 | | m_bank1->set_base(m_ram_0x0c000); |
| 612 | | m_bank2->set_base(m_ram_0x0c000+0x02000); |
| 613 | | m_bank5->set_base(m_ram_0x0c000); |
| 614 | | m_bank6->set_base(m_ram_0x0c000+0x02000); |
| 615 | | } |
| 616 | | |
| 617 | | { |
| 618 | | /* basic rom disabled */ |
| 619 | | unsigned char *rom_ptr; |
| 620 | | |
| 621 | | /*logerror("&f800-&ffff is jasmin rom\n"); */ |
| 622 | | /* jasmin rom enabled */ |
| 623 | | oric_enable_memory(3, 3, TRUE, TRUE); |
| 624 | | rom_ptr = m_region_maincpu->base() + 0x010000+0x04000+0x02000; |
| 625 | | m_bank3->set_base(rom_ptr); |
| 626 | | m_bank7->set_base(rom_ptr); |
| 627 | | } |
| 628 | | } |
| 629 | | } |
| 630 | | |
| 631 | | /* DRQ is connected to interrupt */ |
| 632 | | WRITE_LINE_MEMBER(oric_state::oric_jasmin_wd179x_drq_w) |
| 633 | | { |
| 634 | | if (state) |
| 635 | | m_irqs |= (1<<1); |
| 636 | | else |
| 637 | | m_irqs &=~(1<<1); |
| 638 | | |
| 639 | | oric_refresh_ints(); |
| 640 | | } |
| 641 | | |
| 642 | | READ8_MEMBER(oric_state::oric_jasmin_r) |
| 643 | | { |
| 644 | | wd1770_device *fdc = machine().device<wd1770_device>("wd179x"); |
| 645 | | unsigned char data = 0x0ff; |
| 646 | | |
| 647 | | switch (offset & 0x0f) |
| 648 | | { |
| 649 | | /* jasmin floppy disc interface */ |
| 650 | | case 0x04: |
| 651 | | data = fdc->status_r(space, 0); |
| 652 | | break; |
| 653 | | case 0x05: |
| 654 | | data = fdc->track_r(space, 0); |
| 655 | | break; |
| 656 | | case 0x06: |
| 657 | | data = fdc->sector_r(space, 0); |
| 658 | | break; |
| 659 | | case 0x07: |
| 660 | | data = fdc->data_r(space, 0); |
| 661 | | break; |
| 662 | | default: |
| 663 | | data = m_via6522_0->read(space,offset & 0x0f); |
| 664 | | //logerror("unhandled io read: %04x %02x\n", offset, data); |
| 665 | | break; |
| 666 | | |
| 667 | | } |
| 668 | | |
| 669 | | return data; |
| 670 | | } |
| 671 | | |
| 672 | | WRITE8_MEMBER(oric_state::oric_jasmin_w) |
| 673 | | { |
| 674 | | wd1770_device *fdc = machine().device<wd1770_device>("wd179x"); |
| 675 | | switch (offset & 0x0f) |
| 676 | | { |
| 677 | | /* microdisc floppy disc interface */ |
| 678 | | case 0x04: |
| 679 | | fdc->command_w( space, 0, data); |
| 680 | | break; |
| 681 | | case 0x05: |
| 682 | | fdc->track_w(space, 0, data); |
| 683 | | break; |
| 684 | | case 0x06: |
| 685 | | fdc->sector_w(space, 0, data); |
| 686 | | break; |
| 687 | | case 0x07: |
| 688 | | fdc->data_w(space, 0, data); |
| 689 | | break; |
| 690 | | /* bit 0 = side */ |
| 691 | | case 0x08: |
| 692 | | fdc->set_side(data & 0x01); |
| 693 | | break; |
| 694 | | /* any write will cause wd179x to reset */ |
| 695 | | case 0x09: |
| 696 | | fdc->reset(); |
| 697 | | break; |
| 698 | | case 0x0a: |
| 699 | | //logerror("jasmin overlay ram w: %02x PC: %04x\n", data, m_maincpu->pc()); |
| 700 | | m_port_3fa_w = data; |
| 701 | | oric_jasmin_set_mem_0x0c000(); |
| 702 | | break; |
| 703 | | case 0x0b: |
| 704 | | //logerror("jasmin romdis w: %02x PC: %04x\n", data, m_maincpu->pc()); |
| 705 | | m_port_3fb_w = data; |
| 706 | | oric_jasmin_set_mem_0x0c000(); |
| 707 | | break; |
| 708 | | /* bit 0,1 of addr is the drive */ |
| 709 | | case 0x0c: |
| 710 | | case 0x0d: |
| 711 | | case 0x0e: |
| 712 | | case 0x0f: |
| 713 | | fdc->set_drive(offset & 0x03); |
| 714 | | break; |
| 715 | | |
| 716 | | default: |
| 717 | | m_via6522_0->write(space,offset & 0x0f, data); |
| 718 | | break; |
| 719 | | } |
| 720 | | } |
| 721 | | |
| 722 | | |
| 723 | | void oric_state::oric_install_jasmin_interface() |
| 724 | | { |
| 725 | | address_space &space = m_maincpu->space(AS_PROGRAM); |
| 726 | | /* romdis */ |
| 727 | | m_port_3fb_w = 1; |
| 728 | | oric_jasmin_set_mem_0x0c000(); |
| 729 | | |
| 730 | | space.install_read_handler(0x0300, 0x03ef, read8_delegate(FUNC(oric_state::oric_IO_r),this)); |
| 731 | | space.install_read_handler(0x03f0, 0x03ff, read8_delegate(FUNC(oric_state::oric_jasmin_r),this)); |
| 732 | | |
| 733 | | space.install_write_handler(0x0300, 0x03ef, write8_delegate(FUNC(oric_state::oric_IO_w),this)); |
| 734 | | space.install_write_handler(0x03f0, 0x03ff, write8_delegate(FUNC(oric_state::oric_jasmin_w),this)); |
| 735 | | } |
| 736 | | |
| 737 | | /*********************************/ |
| 738 | | /* MICRODISC INTERFACE variables */ |
| 739 | | |
| 740 | | /* used by Microdisc interfaces */ |
| 741 | | |
| 742 | | /* bit 7 is intrq state */ |
| 743 | | /* bit 7 is drq state (active low) */ |
| 744 | | /* bit 6,5: drive */ |
| 745 | | /* bit 4: side */ |
| 746 | | /* bit 3: double density enable */ |
| 747 | | /* bit 0: enable FDC IRQ to trigger IRQ on CPU */ |
| 748 | | |
| 749 | | |
| 750 | | void oric_state::oric_microdisc_refresh_wd179x_ints() |
| 751 | | { |
| 752 | | m_irqs &=~(1<<1); |
| 753 | | |
| 754 | | if ((m_wd179x_int_state) && (m_port_314_w & (1<<0))) |
| 755 | | { |
| 756 | | /*logerror("oric microdisc interrupt\n"); */ |
| 757 | | |
| 758 | | m_irqs |=(1<<1); |
| 759 | | } |
| 760 | | |
| 761 | | oric_refresh_ints(); |
| 762 | | } |
| 763 | | |
| 764 | | WRITE_LINE_MEMBER(oric_state::oric_microdisc_wd179x_intrq_w) |
| 765 | | { |
| 766 | | m_wd179x_int_state = state; |
| 767 | | |
| 768 | | if (state) |
| 769 | | m_port_314_r &= ~(1<<7); |
| 770 | | else |
| 771 | | m_port_314_r |=(1<<7); |
| 772 | | |
| 773 | | oric_microdisc_refresh_wd179x_ints(); |
| 774 | | } |
| 775 | | |
| 776 | | WRITE_LINE_MEMBER(oric_state::oric_microdisc_wd179x_drq_w) |
| 777 | | { |
| 778 | | if (state) |
| 779 | | m_port_318_r &=~(1<<7); |
| 780 | | else |
| 781 | | m_port_318_r |= (1<<7); |
| 782 | | } |
| 783 | | |
| 784 | | void oric_state::oric_microdisc_set_mem_0x0c000() |
| 785 | | { |
| 786 | | if (m_is_telestrat) |
| 787 | | { |
| 788 | | return; |
| 789 | | } |
| 790 | | |
| 791 | | /* for 0x0c000-0x0dfff: */ |
| 792 | | /* if os disabled, ram takes priority */ |
| 793 | | /* /ROMDIS */ |
| 794 | | if ((m_port_314_w & (1<<1))==0) |
| 795 | | { |
| 796 | | /*logerror("&c000-&dfff is ram\n"); */ |
| 797 | | /* rom disabled enable ram */ |
| 798 | | oric_enable_memory(1, 1, TRUE, TRUE); |
| 799 | | m_bank1->set_base(m_ram_0x0c000); |
| 800 | | m_bank5->set_base(m_ram_0x0c000); |
| 801 | | } |
| 802 | | else |
| 803 | | { |
| 804 | | unsigned char *rom_ptr; |
| 805 | | /*logerror("&c000-&dfff is os rom\n"); */ |
| 806 | | /* basic rom */ |
| 807 | | oric_enable_memory(1, 1, TRUE, FALSE); |
| 808 | | rom_ptr = m_region_maincpu->base() + 0x010000; |
| 809 | | m_bank1->set_base(rom_ptr); |
| 810 | | m_bank5->set_base(rom_ptr); |
| 811 | | } |
| 812 | | |
| 813 | | /* for 0x0e000-0x0ffff */ |
| 814 | | /* if not disabled, os takes priority */ |
| 815 | | if ((m_port_314_w & (1<<1))!=0) |
| 816 | | { |
| 817 | | unsigned char *rom_ptr; |
| 818 | | /*logerror("&e000-&ffff is os rom\n"); */ |
| 819 | | /* basic rom */ |
| 820 | | oric_enable_memory(2, 3, TRUE, FALSE); |
| 821 | | rom_ptr = m_region_maincpu->base() + 0x010000; |
| 822 | | m_bank2->set_base(rom_ptr+0x02000); |
| 823 | | m_bank3->set_base(rom_ptr+0x03800); |
| 824 | | m_bank6->set_base(rom_ptr+0x02000); |
| 825 | | m_bank7->set_base(rom_ptr+0x03800); |
| 826 | | |
| 827 | | } |
| 828 | | else |
| 829 | | { |
| 830 | | /* if eprom is enabled, it takes priority over ram */ |
| 831 | | if ((m_port_314_w & (1<<7))==0) |
| 832 | | { |
| 833 | | unsigned char *rom_ptr; |
| 834 | | /*logerror("&e000-&ffff is disk rom\n"); */ |
| 835 | | oric_enable_memory(2, 3, TRUE, FALSE); |
| 836 | | /* enable rom of microdisc interface */ |
| 837 | | rom_ptr = m_region_maincpu->base() + 0x014000; |
| 838 | | m_bank2->set_base(rom_ptr); |
| 839 | | m_bank3->set_base(rom_ptr+0x01800); |
| 840 | | } |
| 841 | | else |
| 842 | | { |
| 843 | | /*logerror("&e000-&ffff is ram\n"); */ |
| 844 | | /* rom disabled enable ram */ |
| 845 | | oric_enable_memory(2, 3, TRUE, TRUE); |
| 846 | | m_bank2->set_base(m_ram_0x0c000+0x02000); |
| 847 | | m_bank3->set_base(m_ram_0x0c000+0x03800); |
| 848 | | m_bank6->set_base(m_ram_0x0c000+0x02000); |
| 849 | | m_bank7->set_base(m_ram_0x0c000+0x03800); |
| 850 | | } |
| 851 | | } |
| 852 | | } |
| 853 | | |
| 854 | | |
| 855 | | |
| 856 | | READ8_MEMBER(oric_state::oric_microdisc_r) |
| 857 | | { |
| 858 | | unsigned char data = 0x0ff; |
| 859 | | wd1770_device *fdc = machine().device<wd1770_device>("wd179x"); |
| 860 | | |
| 861 | | switch (offset & 0x0ff) |
| 862 | | { |
| 863 | | /* microdisc floppy disc interface */ |
| 864 | | case 0x00: |
| 865 | | data = fdc->status_r(space, 0); |
| 866 | | break; |
| 867 | | case 0x01: |
| 868 | | data = fdc->track_r(space, 0); |
| 869 | | break; |
| 870 | | case 0x02: |
| 871 | | data = fdc->sector_r(space, 0); |
| 872 | | break; |
| 873 | | case 0x03: |
| 874 | | data = fdc->data_r(space, 0); |
| 875 | | break; |
| 876 | | case 0x04: |
| 877 | | data = m_port_314_r | 0x07f; |
| 878 | | /* logerror("port_314_r: %02x\n",data); */ |
| 879 | | break; |
| 880 | | case 0x08: |
| 881 | | data = m_port_318_r | 0x07f; |
| 882 | | /* logerror("port_318_r: %02x\n",data); */ |
| 883 | | break; |
| 884 | | |
| 885 | | default: |
| 886 | | data = m_via6522_0->read(space, offset & 0x0f); |
| 887 | | break; |
| 888 | | |
| 889 | | } |
| 890 | | |
| 891 | | return data; |
| 892 | | } |
| 893 | | |
| 894 | | WRITE8_MEMBER(oric_state::oric_microdisc_w) |
| 895 | | { |
| 896 | | wd1770_device *fdc = machine().device<wd1770_device>("wd179x"); |
| 897 | | switch (offset & 0x0ff) |
| 898 | | { |
| 899 | | /* microdisc floppy disc interface */ |
| 900 | | case 0x00: |
| 901 | | fdc->command_w(space, 0, data); |
| 902 | | break; |
| 903 | | case 0x01: |
| 904 | | fdc->track_w(space, 0, data); |
| 905 | | break; |
| 906 | | case 0x02: |
| 907 | | fdc->sector_w(space, 0, data); |
| 908 | | break; |
| 909 | | case 0x03: |
| 910 | | fdc->data_w(space, 0, data); |
| 911 | | break; |
| 912 | | case 0x04: |
| 913 | | { |
| 914 | | m_port_314_w = data; |
| 915 | | |
| 916 | | //logerror("port_314_w: %02x\n",data); |
| 917 | | |
| 918 | | /* bit 6,5: drive */ |
| 919 | | /* bit 4: side */ |
| 920 | | /* bit 3: double density enable */ |
| 921 | | /* bit 0: enable FDC IRQ to trigger IRQ on CPU */ |
| 922 | | fdc->set_drive((data>>5) & 0x03); |
| 923 | | fdc->set_side((data>>4) & 0x01); |
| 924 | | fdc->dden_w(!BIT(data, 3)); |
| 925 | | |
| 926 | | oric_microdisc_set_mem_0x0c000(); |
| 927 | | oric_microdisc_refresh_wd179x_ints(); |
| 928 | | } |
| 929 | | break; |
| 930 | | |
| 931 | | default: |
| 932 | | m_via6522_0->write(space, offset & 0x0f, data); |
| 933 | | break; |
| 934 | | } |
| 935 | | } |
| 936 | | |
| 937 | | void oric_state::oric_install_microdisc_interface() |
| 938 | | { |
| 939 | | address_space &space = m_maincpu->space(AS_PROGRAM); |
| 940 | | |
| 941 | | space.install_read_handler(0x0300, 0x030f, read8_delegate(FUNC(oric_state::oric_IO_r),this)); |
| 942 | | space.install_read_handler(0x0310, 0x031f, read8_delegate(FUNC(oric_state::oric_microdisc_r),this)); |
| 943 | | space.install_read_handler(0x0320, 0x03ff, read8_delegate(FUNC(oric_state::oric_IO_r),this)); |
| 944 | | |
| 945 | | space.install_write_handler(0x0300, 0x030f, write8_delegate(FUNC(oric_state::oric_IO_w),this)); |
| 946 | | space.install_write_handler(0x0310, 0x031f, write8_delegate(FUNC(oric_state::oric_microdisc_w),this)); |
| 947 | | space.install_write_handler(0x0320, 0x03ff, write8_delegate(FUNC(oric_state::oric_IO_w),this)); |
| 948 | | |
| 949 | | /* disable os rom, enable microdisc rom */ |
| 950 | | /* 0x0c000-0x0dfff will be ram, 0x0e000-0x0ffff will be microdisc rom */ |
| 951 | | m_port_314_w = 0x0ff^((1<<7) | (1<<1)); |
| 952 | | |
| 953 | | oric_microdisc_set_mem_0x0c000(); |
| 954 | | } |
| 955 | | |
| 956 | | |
| 957 | | |
| 958 | | /*********************************************************/ |
| 959 | | |
| 960 | | WRITE_LINE_MEMBER(oric_state::oric_wd179x_intrq_w) |
| 961 | | { |
| 962 | | if ((m_io_floppy->read() & 0x07) == ORIC_FLOPPY_INTERFACE_MICRODISC) |
| 963 | | { |
| 964 | | oric_microdisc_wd179x_intrq_w(state); |
| 965 | | } |
| 966 | | } |
| 967 | | |
| 968 | | WRITE_LINE_MEMBER(oric_state::oric_wd179x_drq_w) |
| 969 | | { |
| 970 | | switch (m_io_floppy->read() & 0x07) |
| 971 | | { |
| 972 | | default: |
| 973 | | case ORIC_FLOPPY_INTERFACE_NONE: |
| 974 | | case ORIC_FLOPPY_INTERFACE_APPLE2: |
| 975 | | return; |
| 976 | | case ORIC_FLOPPY_INTERFACE_MICRODISC: |
| 977 | | oric_microdisc_wd179x_drq_w(state); |
| 978 | | return; |
| 979 | | case ORIC_FLOPPY_INTERFACE_JASMIN: |
| 980 | | oric_jasmin_wd179x_drq_w(state); |
| 981 | | return; |
| 982 | | } |
| 983 | | } |
| 984 | | |
| 985 | | const wd17xx_interface oric_wd17xx_interface = |
| 986 | | { |
| 987 | | DEVCB_NULL, |
| 988 | | DEVCB_DRIVER_LINE_MEMBER(oric_state,oric_wd179x_intrq_w), |
| 989 | | DEVCB_DRIVER_LINE_MEMBER(oric_state,oric_wd179x_drq_w), |
| 990 | | {FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3} |
| 991 | | }; |
| 992 | | |
| 993 | | void oric_state::oric_common_init_machine() |
| 994 | | { |
| 995 | | /* clear all irqs */ |
| 996 | | m_irqs = 0; |
| 997 | | m_ram_0x0c000 = NULL; |
| 998 | | m_keyboard_line = 0; |
| 999 | | m_key_sense_bit = 0; |
| 1000 | | m_keyboard_mask = 0; |
| 1001 | | m_via_port_a_data = 0; |
| 1002 | | m_psg_control = 0; |
| 1003 | | m_previous_portb_data = 0; |
| 1004 | | m_port_3fa_w = 0; |
| 1005 | | m_port_3fb_w = 0; |
| 1006 | | m_wd179x_int_state = 0; |
| 1007 | | m_port_314_r = 0; |
| 1008 | | m_port_318_r = 0; |
| 1009 | | m_port_314_w = 0; |
| 1010 | | machine().scheduler().timer_pulse(attotime::from_hz(4800), timer_expired_delegate(FUNC(oric_state::oric_refresh_tape),this)); |
| 1011 | | } |
| 1012 | | |
| 1013 | | void oric_state::machine_start() |
| 1014 | | { |
| 1015 | | oric_common_init_machine(); |
| 1016 | | |
| 1017 | | m_is_telestrat = 0; |
| 1018 | | |
| 1019 | | m_ram_0x0c000 = auto_alloc_array(machine(), UINT8, 16384); |
| 1020 | | } |
| 1021 | | |
| 1022 | | |
| 1023 | | void oric_state::machine_reset() |
| 1024 | | { |
| 1025 | | int disc_interface_id = m_io_floppy->read() & 0x07; |
| 1026 | | address_space &space = m_maincpu->space(AS_PROGRAM); |
| 1027 | | if (m_is_telestrat) |
| 1028 | | return; |
| 1029 | | |
| 1030 | | switch (disc_interface_id) |
| 1031 | | { |
| 1032 | | default: |
| 1033 | | |
| 1034 | | case ORIC_FLOPPY_INTERFACE_APPLE2: |
| 1035 | | case ORIC_FLOPPY_INTERFACE_NONE: |
| 1036 | | { |
| 1037 | | /* setup memory when there is no disc interface */ |
| 1038 | | unsigned char *rom_ptr; |
| 1039 | | |
| 1040 | | /* os rom */ |
| 1041 | | oric_enable_memory(1, 3, TRUE, FALSE); |
| 1042 | | rom_ptr = m_region_maincpu->base() + 0x010000; |
| 1043 | | m_bank1->set_base(rom_ptr); |
| 1044 | | m_bank2->set_base(rom_ptr+0x02000); |
| 1045 | | m_bank3->set_base(rom_ptr+0x03800); |
| 1046 | | m_bank5->set_base(rom_ptr); |
| 1047 | | m_bank6->set_base(rom_ptr+0x02000); |
| 1048 | | m_bank7->set_base(rom_ptr+0x03800); |
| 1049 | | |
| 1050 | | |
| 1051 | | if (disc_interface_id==ORIC_FLOPPY_INTERFACE_APPLE2) |
| 1052 | | { |
| 1053 | | oric_install_apple2_interface(); |
| 1054 | | } |
| 1055 | | else |
| 1056 | | { |
| 1057 | | space.install_read_handler(0x0300, 0x03ff, read8_delegate(FUNC(oric_state::oric_IO_r),this)); |
| 1058 | | space.install_write_handler(0x0300, 0x03ff, write8_delegate(FUNC(oric_state::oric_IO_w),this)); |
| 1059 | | } |
| 1060 | | } |
| 1061 | | break; |
| 1062 | | |
| 1063 | | case ORIC_FLOPPY_INTERFACE_APPLE2_V2: |
| 1064 | | { |
| 1065 | | oric_install_apple2_v2_interface(); |
| 1066 | | } |
| 1067 | | break; |
| 1068 | | |
| 1069 | | |
| 1070 | | case ORIC_FLOPPY_INTERFACE_MICRODISC: |
| 1071 | | { |
| 1072 | | oric_install_microdisc_interface(); |
| 1073 | | } |
| 1074 | | break; |
| 1075 | | |
| 1076 | | case ORIC_FLOPPY_INTERFACE_JASMIN: |
| 1077 | | { |
| 1078 | | oric_install_jasmin_interface(); |
| 1079 | | } |
| 1080 | | break; |
| 1081 | | } |
| 1082 | | m_maincpu->reset(); |
| 1083 | | } |
| 1084 | | |
| 1085 | | |
| 1086 | | READ8_MEMBER(oric_state::oric_IO_r) |
| 1087 | | { |
| 1088 | | switch (m_io_floppy->read() & 0x07) |
| 1089 | | { |
| 1090 | | default: |
| 1091 | | case ORIC_FLOPPY_INTERFACE_NONE: |
| 1092 | | break; |
| 1093 | | |
| 1094 | | case ORIC_FLOPPY_INTERFACE_MICRODISC: |
| 1095 | | { |
| 1096 | | if ((offset>=0x010) && (offset<=0x01f)) |
| 1097 | | { |
| 1098 | | return oric_microdisc_r(space, offset); |
| 1099 | | } |
| 1100 | | } |
| 1101 | | break; |
| 1102 | | |
| 1103 | | case ORIC_FLOPPY_INTERFACE_JASMIN: |
| 1104 | | { |
| 1105 | | if ((offset>=0x0f4) && (offset<=0x0ff)) |
| 1106 | | { |
| 1107 | | return oric_jasmin_r(space, offset); |
| 1108 | | } |
| 1109 | | } |
| 1110 | | break; |
| 1111 | | } |
| 1112 | | |
| 1113 | | /* it is repeated */ |
| 1114 | | return m_via6522_0->read(space, offset & 0x0f); |
| 1115 | | } |
| 1116 | | |
| 1117 | | WRITE8_MEMBER(oric_state::oric_IO_w) |
| 1118 | | { |
| 1119 | | switch (m_io_floppy->read() & 0x07) |
| 1120 | | { |
| 1121 | | default: |
| 1122 | | case ORIC_FLOPPY_INTERFACE_NONE: |
| 1123 | | break; |
| 1124 | | |
| 1125 | | case ORIC_FLOPPY_INTERFACE_MICRODISC: |
| 1126 | | { |
| 1127 | | if ((offset >= 0x010) && (offset <= 0x01f)) |
| 1128 | | { |
| 1129 | | oric_microdisc_w(space, offset, data); |
| 1130 | | return; |
| 1131 | | } |
| 1132 | | } |
| 1133 | | break; |
| 1134 | | |
| 1135 | | case ORIC_FLOPPY_INTERFACE_JASMIN: |
| 1136 | | { |
| 1137 | | if ((offset >= 0x0f4) && (offset <= 0x0ff)) |
| 1138 | | { |
| 1139 | | oric_jasmin_w(space, offset, data); |
| 1140 | | return; |
| 1141 | | } |
| 1142 | | |
| 1143 | | } |
| 1144 | | break; |
| 1145 | | } |
| 1146 | | |
| 1147 | | m_via6522_0->write(space, offset & 0x0f, data); |
| 1148 | | } |
| 1149 | | |
| 1150 | | |
| 1151 | | |
| 1152 | | /**** TELESTRAT ****/ |
| 1153 | | |
| 1154 | | /* |
| 1155 | | VIA lines |
| 1156 | | Telestrat usage |
| 1157 | | |
| 1158 | | PA0..PA2 |
| 1159 | | Memory bank selection |
| 1160 | | |
| 1161 | | PA3 |
| 1162 | | "Midi" port pin 3 |
| 1163 | | |
| 1164 | | PA4 |
| 1165 | | RS232/Minitel selection |
| 1166 | | |
| 1167 | | PA5 |
| 1168 | | Third mouse button (right joystick port pin 5) |
| 1169 | | |
| 1170 | | PA6 |
| 1171 | | "Midi" port pin 5 |
| 1172 | | |
| 1173 | | PA7 |
| 1174 | | Second mouse button (right joystick port pin 9) |
| 1175 | | |
| 1176 | | CA1 |
| 1177 | | "Midi" port pin 1 |
| 1178 | | |
| 1179 | | CA2 |
| 1180 | | not used ? |
| 1181 | | |
| 1182 | | PB0..PB4 |
| 1183 | | Joystick ports |
| 1184 | | |
| 1185 | | PB5 |
| 1186 | | Joystick doubler switch |
| 1187 | | |
| 1188 | | PB6 |
| 1189 | | Select Left Joystick port |
| 1190 | | |
| 1191 | | PB7 |
| 1192 | | Select Right Joystick port |
| 1193 | | |
| 1194 | | CB1 |
| 1195 | | Phone Ring detection |
| 1196 | | |
| 1197 | | CB2 |
| 1198 | | "Midi" port pin 4 |
| 1199 | | |
| 1200 | | */ |
| 1201 | | |
| 1202 | | |
| 1203 | | void oric_state::telestrat_refresh_mem() |
| 1204 | | { |
| 1205 | | address_space &space = m_maincpu->space(AS_PROGRAM); |
| 1206 | | |
| 1207 | | telestrat_mem_block *mem_block = &m_telestrat_blocks[m_telestrat_bank_selection]; |
| 1208 | | |
| 1209 | | switch (mem_block->MemType) |
| 1210 | | { |
| 1211 | | case TELESTRAT_MEM_BLOCK_RAM: |
| 1212 | | { |
| 1213 | | m_bank1->set_base(mem_block->ptr); |
| 1214 | | m_bank2->set_base(mem_block->ptr); |
| 1215 | | space.install_read_bank(0xc000, 0xffff, "bank1"); |
| 1216 | | space.install_write_bank(0xc000, 0xffff, "bank2"); |
| 1217 | | } |
| 1218 | | break; |
| 1219 | | |
| 1220 | | case TELESTRAT_MEM_BLOCK_ROM: |
| 1221 | | { |
| 1222 | | m_bank1->set_base(mem_block->ptr); |
| 1223 | | space.install_read_bank(0xc000, 0xffff, "bank1"); |
| 1224 | | space.nop_write(0xc000, 0xffff); |
| 1225 | | } |
| 1226 | | break; |
| 1227 | | |
| 1228 | | default: |
| 1229 | | case TELESTRAT_MEM_BLOCK_UNDEFINED: |
| 1230 | | { |
| 1231 | | space.nop_readwrite(0xc000, 0xffff); |
| 1232 | | } |
| 1233 | | break; |
| 1234 | | } |
| 1235 | | } |
| 1236 | | |
| 1237 | | READ8_MEMBER(oric_state::telestrat_via2_in_a_func) |
| 1238 | | { |
| 1239 | | //logerror("via 2 - port a %02x\n",m_telestrat_via2_port_a_data); |
| 1240 | | return m_telestrat_via2_port_a_data; |
| 1241 | | } |
| 1242 | | |
| 1243 | | |
| 1244 | | WRITE8_MEMBER(oric_state::telestrat_via2_out_a_func) |
| 1245 | | { |
| 1246 | | //logerror("via 2 - port a w: %02x\n",data); |
| 1247 | | |
| 1248 | | m_telestrat_via2_port_a_data = data; |
| 1249 | | |
| 1250 | | if (((data^m_telestrat_bank_selection) & 0x07)!=0) |
| 1251 | | { |
| 1252 | | m_telestrat_bank_selection = data & 0x07; |
| 1253 | | |
| 1254 | | telestrat_refresh_mem(); |
| 1255 | | } |
| 1256 | | } |
| 1257 | | |
| 1258 | | READ8_MEMBER(oric_state::telestrat_via2_in_b_func) |
| 1259 | | { |
| 1260 | | unsigned char data = 0x01f; |
| 1261 | | |
| 1262 | | /* left joystick selected? */ |
| 1263 | | if (m_telestrat_via2_port_b_data & (1<<6)) |
| 1264 | | { |
| 1265 | | data &= ioport("JOY0")->read(); |
| 1266 | | } |
| 1267 | | |
| 1268 | | /* right joystick selected? */ |
| 1269 | | if (m_telestrat_via2_port_b_data & (1<<7)) |
| 1270 | | { |
| 1271 | | data &= ioport("JOY1")->read(); |
| 1272 | | } |
| 1273 | | |
| 1274 | | data |= m_telestrat_via2_port_b_data & ((1<<7) | (1<<6) | (1<<5)); |
| 1275 | | |
| 1276 | | return data; |
| 1277 | | } |
| 1278 | | |
| 1279 | | WRITE8_MEMBER(oric_state::telestrat_via2_out_b_func) |
| 1280 | | { |
| 1281 | | m_telestrat_via2_port_b_data = data; |
| 1282 | | } |
| 1283 | | |
| 1284 | | |
| 1285 | | WRITE_LINE_MEMBER(oric_state::telestrat_via2_irq_func) |
| 1286 | | { |
| 1287 | | m_irqs &=~(1<<2); |
| 1288 | | |
| 1289 | | if (state) |
| 1290 | | { |
| 1291 | | //logerror("telestrat via2 interrupt\n"); |
| 1292 | | |
| 1293 | | m_irqs |=(1<<2); |
| 1294 | | } |
| 1295 | | |
| 1296 | | oric_refresh_ints(); |
| 1297 | | } |
| 1298 | | |
| 1299 | | /* interrupt state from acia6551 */ |
| 1300 | | WRITE_LINE_MEMBER(oric_state::telestrat_acia_callback) |
| 1301 | | { |
| 1302 | | m_irqs&=~(1<<3); |
| 1303 | | |
| 1304 | | if (state) |
| 1305 | | { |
| 1306 | | m_irqs |= (1<<3); |
| 1307 | | } |
| 1308 | | |
| 1309 | | oric_refresh_ints(); |
| 1310 | | } |
| 1311 | | |
| 1312 | | MACHINE_START_MEMBER(oric_state,telestrat) |
| 1313 | | { |
| 1314 | | UINT8 *mem = m_region_maincpu->base(); |
| 1315 | | |
| 1316 | | oric_common_init_machine(); |
| 1317 | | |
| 1318 | | m_telestrat_via2_port_a_data = 0; |
| 1319 | | m_telestrat_via2_port_b_data = 0; |
| 1320 | | m_is_telestrat = 1; |
| 1321 | | |
| 1322 | | /* initialise overlay ram */ |
| 1323 | | m_telestrat_blocks[0].MemType = TELESTRAT_MEM_BLOCK_RAM; |
| 1324 | | m_telestrat_blocks[0].ptr = mem+0x020000; //auto_alloc_array(machine(), UINT8, 16384); |
| 1325 | | |
| 1326 | | m_telestrat_blocks[1].MemType = TELESTRAT_MEM_BLOCK_RAM; |
| 1327 | | m_telestrat_blocks[1].ptr = mem+0x024000; //auto_alloc_array(machine(), UINT8, 16384); |
| 1328 | | |
| 1329 | | m_telestrat_blocks[2].MemType = TELESTRAT_MEM_BLOCK_RAM; |
| 1330 | | m_telestrat_blocks[2].ptr = mem+0x028000; //auto_alloc_array(machine(), UINT8, 16384); |
| 1331 | | |
| 1332 | | /* initialise default cartridge */ |
| 1333 | | m_telestrat_blocks[3].MemType = TELESTRAT_MEM_BLOCK_ROM; |
| 1334 | | m_telestrat_blocks[3].ptr = mem+0x010000; // telmatic.rom |
| 1335 | | |
| 1336 | | m_telestrat_blocks[4].MemType = TELESTRAT_MEM_BLOCK_RAM; |
| 1337 | | m_telestrat_blocks[4].ptr = mem+0x02c000; //auto_alloc_array(machine(), UINT8, 16384); |
| 1338 | | |
| 1339 | | /* initialise default cartridge */ |
| 1340 | | m_telestrat_blocks[5].MemType = TELESTRAT_MEM_BLOCK_ROM; |
| 1341 | | m_telestrat_blocks[5].ptr = mem+0x014000; // teleass.rom |
| 1342 | | |
| 1343 | | /* initialise default cartridge */ |
| 1344 | | m_telestrat_blocks[6].MemType = TELESTRAT_MEM_BLOCK_ROM; |
| 1345 | | m_telestrat_blocks[6].ptr = mem+0x018000; // hyperbas.rom |
| 1346 | | |
| 1347 | | /* initialise default cartridge */ |
| 1348 | | m_telestrat_blocks[7].MemType = TELESTRAT_MEM_BLOCK_ROM; |
| 1349 | | m_telestrat_blocks[7].ptr = mem+0x01c000; // telmon24.rom |
| 1350 | | |
| 1351 | | m_telestrat_bank_selection = 7; |
| 1352 | | telestrat_refresh_mem(); |
| 1353 | | |
| 1354 | | /* disable os rom, enable microdisc rom */ |
| 1355 | | /* 0x0c000-0x0dfff will be ram, 0x0e000-0x0ffff will be microdisc rom */ |
| 1356 | | m_port_314_w = 0x0ff^((1<<7) | (1<<1)); |
| 1357 | | } |