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r29558 Saturday 12th April, 2014 at 12:34:53 UTC by Nathan Woods
Merge branch 'master' of ssh://mess.org/mame into new_menus

[/branches/new_menus/src/emu/bus/centronics]	image.c
[/branches/new_menus/src/emu/bus/iq151]	staper.c
[/branches/new_menus/src/emu/bus/midi]	midiinport.c
[/branches/new_menus/src/emu/imagedev]	midiin.c midiin.h printer.c printer.h
[/branches/new_menus/src/emu/machine]	8042kbdc.c 8042kbdc.h 8257dma.c 8257dma.h aakart.c roc10937.c roc10937.h
[/branches/new_menus/src/emu/sound]	tms36xx.c tms36xx.h
[/branches/new_menus/src/lib/util]	corefile.c
[/branches/new_menus/src/mame/audio]	segag80r.c
[/branches/new_menus/src/mame/drivers]	bfm_sc1.c bfmsys85.c bladestl.c dkong.c globalfr.c jpmimpct.c jpmsys5.c maygay1b.c model2.c mpu3.c mpu4hw.c naughtyb.c phoenix.c pinkiri8.c proconn.c
[/branches/new_menus/src/mame/includes]	archimds.h maygay1b.h model2.h mpu4.h
[/branches/new_menus/src/mame/layout]	mpu4.lay mpu4ext.lay mpu4plasma.lay
[/branches/new_menus/src/mame/machine]	archimds.c bfm_bd1.c bfm_bd1.h pcshare.c
[/branches/new_menus/src/mame/video]	archimds.c
[/branches/new_menus/src/mess/drivers]	a310.c apogee.c apple3.c bebox.c digel804.c dragon.c fanucspmg.c hec2hrp.c interact.c ip22.c mc10.c mikrosha.c partner.c pc8001.c ql.c radio86.c unior.c vg5k.c x07.c
[/branches/new_menus/src/mess/includes]	apple3.h partner.h radio86.h
[/branches/new_menus/src/mess/machine]	apple3.c partner.c radio86.c

branches/new_menus/src/mame/layout/mpu4plasma.lay

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509	509

branches/new_menus/src/mame/layout/mpu4.lay

r29557	r29558
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branches/new_menus/src/mame/layout/mpu4ext.lay

r29557	r29558
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branches/new_menus/src/mame/drivers/phoenix.c

r29557	r29558
411	411	GFXDECODE_END
412	412
413	413
414		static const tms36xx_interface phoenix_tms36xx_interface =
415		{
416		MM6221AA,   /* TMS36xx subtype(s) */
417		{0.50,0,0,1.05,0,0}, /* decay times of voices */
418		0.21       /* tune speed (time between beats) */
419		};
420
421		static const tms36xx_interface pleiads_tms36xx_interface =
422		{
423		TMS3615,    /* TMS36xx subtype(s) */
424		/*
425		* Decay times of the voices; NOTE: it's unknown if
426		* the the TMS3615 mixes more than one voice internally.
427		* A wav taken from Pop Flamer sounds like there
428		* are at least no 'odd' harmonics (5 1/3' and 2 2/3')
429		*/
430		{0.33,0.33,0,0.33,0,0.33}
431		};
432
433	414	static const ay8910_interface survival_ay8910_interface =
434	415	{
435	416	AY8910_LEGACY_OUTPUT,
r29557	r29558
471	452	/* sound hardware */
472	453	MCFG_SPEAKER_STANDARD_MONO("mono")
473	454
474		MCFG_TMS36XX_ADD("tms",  372)
475		MCFG_SOUND_CONFIG(phoenix_tms36xx_interface)
	455	MCFG_TMS36XX_ADD("tms", 372)
	456	MCFG_TMS36XX_TYPE(MM6221AA)
	457	MCFG_TMS36XX_DECAY_TIMES(0.50, 0, 0, 1.05, 0, 0)
	458	MCFG_TMS36XX_TUNE_SPEED(0.21)
476	459	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
477	460
478	461	MCFG_SOUND_ADD("cust", PHOENIX, 0)
r29557	r29558
498	481
499	482	/* sound hardware */
500	483	MCFG_TMS36XX_REPLACE("tms", 247)
501		MCFG_SOUND_CONFIG(pleiads_tms36xx_interface)
	484	MCFG_TMS36XX_TYPE(TMS3615)
	485	MCFG_TMS36XX_DECAY_TIMES(0.33, 0.33, 0, 0.33, 0, 0.33)
	486	// NOTE: it's unknown if the TMS3615 mixes more than one voice internally.
	487	// A wav taken from Pop Flamer sounds like there are at least no 'odd'
	488	// harmonics (5 1/3' and 2 2/3')
502	489	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
503	490
504	491	MCFG_DEVICE_REMOVE("cust")

branches/new_menus/src/mame/drivers/globalfr.c

r29557	r29558
7	7	Motherboard contains very few major components
8	8
9	9	Missing sound roms? (or is sound data in the program roms?)
10		NOTE: VFD is guessed as Samsung 16 segment, need to know more
	10	NOTE: VFD is guessed as Samsung 16 segment, like other Global products
	11	need to know more
11	12	*******************************************************************************/
12	13
13	14
r29557	r29558
31	32	optional_device<s16lf01_t> m_vfd;
32	33
33	34	// serial vfd
34		int m_alpha_clock;
35	35
36	36	DECLARE_WRITE16_MEMBER(vfd_w);
37	37
r29557	r29558
41	41
42	42	WRITE16_MEMBER(globalfr_state::vfd_w)
43	43	{
44		//  if(!(data & 0x20)) need to find reset
	44	//  m_vfd->(data & 0x20) need to find reset
45	45	{
46		int clock = (data & 0x40) != 0;
47		int datline = (data & 0x80);
48		if (m_alpha_clock != clock)
49		{
50		if (!m_alpha_clock)
51		{
52		m_vfd->shift_data(datline?1:0);
53		}
54		}
55		m_alpha_clock = clock;
	46	m_vfd->sclk((data&0x40));
	47	m_vfd->data(!(data&0x80));
56	48	}
57		//  else
58		//  {
59		//      m_vfd->reset();
60		//  }
61	49	}
62	50
63	51	static ADDRESS_MAP_START( globalfr_map, AS_PROGRAM, 16, globalfr_state )

branches/new_menus/src/mame/drivers/dkong.c

r29557	r29558
370	370	DEVCB_NULL
371	371	};
372	372
373		static I8257_INTERFACE( dk_dma )
374		{
375		DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_HALT),
376		DEVCB_NULL,
377		DEVCB_NULL,
378		DEVCB_DRIVER_MEMBER(dkong_state, memory_read_byte),
379		DEVCB_DRIVER_MEMBER(dkong_state, memory_write_byte),
380		{ DEVCB_NULL, DEVCB_DRIVER_MEMBER(dkong_state,p8257_ctl_r), DEVCB_NULL, DEVCB_NULL },
381		{ DEVCB_DRIVER_MEMBER(dkong_state,p8257_ctl_w), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }
382		};
383
384		static I8257_INTERFACE( hb_dma )
385		{
386		DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_HALT),
387		DEVCB_NULL,
388		DEVCB_NULL,
389		DEVCB_DRIVER_MEMBER(dkong_state, hb_dma_read_byte),
390		DEVCB_DRIVER_MEMBER(dkong_state, hb_dma_write_byte),
391		{ DEVCB_NULL, DEVCB_DRIVER_MEMBER(dkong_state,p8257_ctl_r), DEVCB_NULL, DEVCB_NULL },
392		{ DEVCB_DRIVER_MEMBER(dkong_state,p8257_ctl_w), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }
393		};
394
395	373	/*************************************
396	374	*
397	375	*  VBLANK and IRQ generation
r29557	r29558
1657	1635	MCFG_MACHINE_START_OVERRIDE(dkong_state,dkong2b)
1658	1636	MCFG_MACHINE_RESET_OVERRIDE(dkong_state,dkong)
1659	1637
1660		MCFG_I8257_ADD("dma8257", CLOCK_1H, dk_dma)
	1638	MCFG_DEVICE_ADD("dma8257", I8257, CLOCK_1H)
	1639	MCFG_I8257_OUT_HRQ_CB(INPUTLINE("maincpu", INPUT_LINE_HALT))
	1640	MCFG_I8257_IN_MEMR_CB(READ8(dkong_state, memory_read_byte))
	1641	MCFG_I8257_OUT_MEMW_CB(WRITE8(dkong_state, memory_write_byte))
	1642	MCFG_I8257_IN_IOR_1_CB(READ8(dkong_state, p8257_ctl_r))
	1643	MCFG_I8257_OUT_IOW_0_CB(WRITE8(dkong_state, p8257_ctl_w))
1661	1644
1662	1645	/* video hardware */
1663	1646	MCFG_SCREEN_ADD("screen", RASTER)
r29557	r29558
1784	1767	MCFG_CPU_VBLANK_INT_DRIVER("screen", dkong_state,  s2650_interrupt)
1785	1768
1786	1769	MCFG_DEVICE_MODIFY("dma8257")
1787		MCFG_DEVICE_CONFIG(hb_dma)
	1770	MCFG_I8257_IN_MEMR_CB(READ8(dkong_state, hb_dma_read_byte))
	1771	MCFG_I8257_OUT_MEMW_CB(WRITE8(dkong_state, hb_dma_write_byte))
1788	1772
1789	1773	MCFG_MACHINE_START_OVERRIDE(dkong_state,s2650)
1790	1774	MACHINE_CONFIG_END

branches/new_menus/src/mame/drivers/bfmsys85.c

r29557	r29558
259	259	{
260	260	//reset 0x20, clock 0x80, data 0x40
261	261
262		if (data & 0x20)//inverted?
263		{
264		if (m_alpha_clock != (data & 0x80))
265		{
266		if (m_alpha_clock)//rising edge
267		{
268		m_vfd->shift_data(data & 0x40?1:0);
269		}
270		}
271		m_alpha_clock = (data & 0x80);
272		}
273		else
274		{
275		m_vfd->reset();
276		}
277
	262	m_vfd->por(data & 0x20);//inverted?
	263	m_vfd->sclk(data & 0x80);
	264	m_vfd->data(data&0x40);
278	265	}
279	266
280	267	//////////////////////////////////////////////////////////////////////////////////

branches/new_menus/src/mame/drivers/bladestl.c

r29557	r29558
53	53
54	54	READ8_MEMBER(bladestl_state::trackball_r)
55	55	{
56		static const char *const port[] = { "TRACKBALL_P1_1", "TRACKBALL_P1_2", "TRACKBALL_P2_1", "TRACKBALL_P1_2" };
	56	static const char *const port[] = { "TRACKBALL_P1_1", "TRACKBALL_P1_2", "TRACKBALL_P2_1", "TRACKBALL_P2_2" };
57	57	int curr, delta;
58	58
59	59	curr = ioport(port[offset])->read();

branches/new_menus/src/mame/drivers/naughtyb.c

r29557	r29558
402	402	GFXDECODE_END
403	403
404	404
405
406		static const tms36xx_interface tms3615_interface =
407		{
408		TMS3615,    /* TMS36xx subtype */
409		/*
410		* Decay times of the voices; NOTE: it's unknown if
411		* the the TMS3615 mixes more than one voice internally.
412		* A wav taken from Pop Flamer sounds like there
413		* are at least no 'odd' harmonics (5 1/3' and 2 2/3')
414		*/
415		{0.15,0.20,0,0,0,0}
416
417		};
418
419
420
421	405	static MACHINE_CONFIG_START( naughtyb, naughtyb_state )
422	406
423	407	/* basic machine hardware */
r29557	r29558
442	426	MCFG_SPEAKER_STANDARD_MONO("mono")
443	427
444	428	MCFG_TMS36XX_ADD("tms", 350)
445		MCFG_SOUND_CONFIG(tms3615_interface)
	429	MCFG_TMS36XX_TYPE(TMS3615)
	430	MCFG_TMS36XX_DECAY_TIMES(0.15, 0.20, 0, 0, 0, 0)
	431	// NOTE: it's unknown if the TMS3615 mixes more than one voice internally.
	432	// A wav taken from Pop Flamer sounds like there are at least no 'odd'
	433	// harmonics (5 1/3' and 2 2/3')
446	434	MCFG_SOUND_ROUTE(0, "mono", 0.60)
447	435
448	436	MCFG_SOUND_ADD("naughtyb_custom", NAUGHTYB, 0)
r29557	r29558
475	463	MCFG_SPEAKER_STANDARD_MONO("mono")
476	464
477	465	MCFG_TMS36XX_ADD("tms", 350)
478		MCFG_SOUND_CONFIG(tms3615_interface)
	466	MCFG_TMS36XX_TYPE(TMS3615)
	467	MCFG_TMS36XX_DECAY_TIMES(0.15, 0.20, 0, 0, 0, 0)
	468	// NOTE: it's unknown if the TMS3615 mixes more than one voice internally.
	469	// A wav taken from Pop Flamer sounds like there are at least no 'odd'
	470	// harmonics (5 1/3' and 2 2/3')
479	471	MCFG_SOUND_ROUTE(0, "mono", 0.60)
480	472
481	473	MCFG_SOUND_ADD("popflame_custom", POPFLAME, 0)

branches/new_menus/src/mame/drivers/proconn.c

r29557	r29558
332	332	WRITE16_MEMBER(proconn_state::serial_transmit)
333	333	{
334	334	//Don't like the look of this, should be a clock somewhere
335		//  if (offset == 0)
336		//      m_vfd->write_char( data );
337
	335
338	336	// should probably be in the pios above
339	337
340		for (int i=0; i<8;i++)
	338	if (offset == 0)
341	339	{
342		m_vfd->shift_data( (data & (1<<i))?0:1  );
	340	for (int i=0; i<8;i++)
	341	{
	342	m_vfd->data(data & (1<<i));
	343	m_vfd->sclk(1);
	344	m_vfd->sclk(0);
	345	}
343	346	}
344	347	}
345	348
346
347	349	READ16_MEMBER(proconn_state::serial_receive)
348	350	{
349	351	logerror("proconn serial receive read %x",offset);

branches/new_menus/src/mame/drivers/model2.c

r29557	r29558
969	969	return 0x00400000;
970	970	}
971	971
	972	#if 0
972	973	READ32_MEMBER(model2_state::desert_unk_r)
973	974	{
	975	static UINT8 test;
	976
	977	test ^= 8;
974	978	// vcop needs bit 3 clear (infinite loop otherwise)
975	979	// desert needs other bits set (not sure which specifically)
976	980	// daytona needs the MSW to return ff
977		return 0x00ff00f7;
	981	return 0x00f700ff | (test << 16);
978	982	}
	983	#endif
979	984
980	985	READ32_MEMBER(model2_state::model2_irq_r)
981	986	{
r29557	r29558
1000	1005	}
1001	1006
1002	1007	m_intreq &= data;
	1008	UINT32 irq_ack = data ^ 0xffffffff;
	1009
	1010	if(irq_ack & 1<<0)
	1011	m_maincpu->set_input_line(I960_IRQ0, CLEAR_LINE);
	1012
	1013	if(irq_ack & 1<<10)
	1014	m_maincpu->set_input_line(I960_IRQ3, CLEAR_LINE);
	1015
1003	1016	}
1004	1017
1005	1018	READ32_MEMBER(model2_state::model2_serial_r)
r29557	r29558
1392	1405	AM_RANGE(0x11680000, 0x116fffff) AM_RAM AM_SHARE("share1") // FB mirror
1393	1406	ADDRESS_MAP_END
1394	1407
	1408	READ8_MEMBER(model2_state::virtuacop_lightgun_r)
	1409	{
	1410	static const char *const ports[] = { "P1_Y", "P1_X", "P2_Y", "P2_X" };
	1411	UINT8 res;
	1412
	1413	res = (ioport(ports[offset >> 1])->read_safe(0) >> ((offset & 1)*8)) & 0xff;
	1414
	1415	return res;
	1416	}
	1417
	1418	/* handles offscreen gun trigger detection here */
	1419	READ8_MEMBER(model2_state::virtuacop_lightgun_offscreen_r)
	1420	{
	1421	UINT16 special_res = 0xfffc;
	1422	UINT16 p1x,p1y,p2x,p2y;
	1423
	1424	p1x = ioport("P1_X")->read_safe(0);
	1425	p1y = ioport("P1_Y")->read_safe(0);
	1426	p2x = ioport("P2_X")->read_safe(0);
	1427	p2y = ioport("P2_Y")->read_safe(0);
	1428
	1429	/* TODO: might be better, supposedly user has to calibrate guns in order to make these settings to work ... */
	1430	if(p1x <= 0x28 || p1x >= 0x3e0 || p1y <= 0x40 || p1y >= 0x3c0)
	1431	special_res |= 1;
	1432
	1433	if(p2x <= 0x28 || p2x >= 0x3e0 || p2y <= 0x40 || p2y >= 0x3c0)
	1434	special_res |= 2;
	1435
	1436	return (special_res >> ((offset & 1)*8)) & 0xff;
	1437	}
	1438
1395	1439	/* original Model 2 overrides */
1396	1440	static ADDRESS_MAP_START( model2o_mem, AS_PROGRAM, 32, model2_state )
1397	1441	AM_RANGE(0x00200000, 0x0021ffff) AM_RAM
r29557	r29558
1415	1459	AM_RANGE(0x01c00004, 0x01c00007) AM_READ_PORT("1c00004")
1416	1460	AM_RANGE(0x01c00010, 0x01c00013) AM_READ_PORT("1c00010")
1417	1461	AM_RANGE(0x01c00014, 0x01c00017) AM_READ_PORT("1c00014")
1418		AM_RANGE(0x01c0001c, 0x01c0001f) AM_READ(desert_unk_r )
	1462	AM_RANGE(0x01c0001c, 0x01c0001f) AM_READ_PORT("1c0001c")
1419	1463	AM_RANGE(0x01c00040, 0x01c00043) AM_READ(daytona_unk_r )
	1464	AM_RANGE(0x01c00100, 0x01c0010f) AM_READ8(virtuacop_lightgun_r,0x00ff00ff)
	1465	AM_RANGE(0x01c00110, 0x01c00113) AM_READ8(virtuacop_lightgun_offscreen_r,0x00ff00ff)
1420	1466	AM_RANGE(0x01c00200, 0x01c002ff) AM_RAM AM_SHARE("backup2")
1421	1467	AM_RANGE(0x01c80000, 0x01c80003) AM_READWRITE(model2_serial_r, model2o_serial_w )
1422	1468
r29557	r29558
1584	1630	PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, driver_device,custom_port_read, "IN2")
1585	1631	PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNKNOWN )
1586	1632
	1633	PORT_START("1c0001c")
	1634	PORT_BIT( 0xfff7ffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1635	PORT_BIT( 0x00080000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
	1636
1587	1637	PORT_START("IN0")
1588	1638	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1589	1639	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_COIN2 )
r29557	r29558
1614	1664	PORT_BIT( 0xff, 0x00, IPT_PEDAL2 ) PORT_SENSITIVITY(30) PORT_KEYDELTA(10) PORT_PLAYER(1)
1615	1665	INPUT_PORTS_END
1616	1666
	1667	static INPUT_PORTS_START( vcop )
	1668	PORT_START("1c00000")
	1669	PORT_BIT( 0x0000ffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1670	PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1671
	1672	PORT_START("1c00004")
	1673	PORT_BIT( 0x0000ffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1674	PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1675
	1676	PORT_START("1c00010")
	1677	PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, driver_device,custom_port_read, "IN0")
	1678	PORT_BIT( 0xffff0000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, driver_device,custom_port_read, "IN1")
	1679
	1680	PORT_START("1c00014")
	1681	PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, driver_device,custom_port_read, "IN2")
	1682	PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1683
	1684	PORT_START("1c0001c")
	1685	PORT_BIT( 0xfff7ffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1686	PORT_BIT( 0x00080000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
	1687
	1688	PORT_START("IN0")
	1689	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_COIN1 )
	1690	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_COIN2 )
	1691	PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW )
	1692	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_SERVICE1 )
	1693	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_START1 )
	1694	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_START2 )
	1695	PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
	1696
	1697	PORT_START("IN1")
	1698	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("P1 Trigger")
	1699	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("P2 Trigger")
	1700	PORT_BIT( 0xfffc, IP_ACTIVE_LOW, IPT_UNUSED )
	1701
	1702	PORT_START("IN2")
	1703	PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED ) // <- one bit here enables "debug mode"
	1704
	1705	PORT_START("TEST")
	1706	PORT_DIPNAME( 0x01, 0x00, "SYSA" )
	1707	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1708	PORT_DIPSETTING(    0x01, DEF_STR( On ) )
	1709	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
	1710	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1711	PORT_DIPSETTING(    0x02, DEF_STR( On ) )
	1712	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
	1713	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1714	PORT_DIPSETTING(    0x04, DEF_STR( On ) )
	1715	PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
	1716	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1717	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
	1718	PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
	1719	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1720	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
	1721	PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
	1722	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1723	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
	1724	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
	1725	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1726	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
	1727	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
	1728	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1729	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
	1730	PORT_DIPNAME( 0x0100, 0x00, "SYSA" )
	1731	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1732	PORT_DIPSETTING(    0x0100, DEF_STR( On ) )
	1733	PORT_DIPNAME( 0x0200, 0x00, DEF_STR( Unknown ) )
	1734	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1735	PORT_DIPSETTING(    0x0200, DEF_STR( On ) )
	1736	PORT_DIPNAME( 0x0400, 0x00, DEF_STR( Unknown ) )
	1737	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1738	PORT_DIPSETTING(    0x0400, DEF_STR( On ) )
	1739	PORT_DIPNAME( 0x0800, 0x00, DEF_STR( Unknown ) )
	1740	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1741	PORT_DIPSETTING(    0x0800, DEF_STR( On ) )
	1742	PORT_DIPNAME( 0x1000, 0x00, DEF_STR( Unknown ) )
	1743	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1744	PORT_DIPSETTING(    0x1000, DEF_STR( On ) )
	1745	PORT_DIPNAME( 0x2000, 0x00, DEF_STR( Unknown ) )
	1746	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1747	PORT_DIPSETTING(    0x2000, DEF_STR( On ) )
	1748	PORT_DIPNAME( 0x4000, 0x00, DEF_STR( Unknown ) )
	1749	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1750	PORT_DIPSETTING(    0x4000, DEF_STR( On ) )
	1751	PORT_DIPNAME( 0x8000, 0x00, DEF_STR( Unknown ) )
	1752	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1753	PORT_DIPSETTING(    0x8000, DEF_STR( On ) )
	1754
	1755	PORT_START("P1_X")
	1756	PORT_BIT( 0x3ff, 0x200, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_MINMAX( 0, 0x3ff ) PORT_SENSITIVITY( 50 ) PORT_KEYDELTA( 15 ) PORT_PLAYER(1)
	1757
	1758	PORT_START("P1_Y")
	1759	PORT_BIT( 0x3ff, 0x200, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_MINMAX( 0, 0x3ff ) PORT_SENSITIVITY( 50 ) PORT_KEYDELTA( 15 ) PORT_PLAYER(1)
	1760
	1761	PORT_START("P2_X")
	1762	PORT_BIT( 0x3ff, 0x200, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_MINMAX( 0, 0x3ff ) PORT_SENSITIVITY( 50 ) PORT_KEYDELTA( 15 ) PORT_PLAYER(2)
	1763
	1764	PORT_START("P2_Y")
	1765	PORT_BIT( 0x3ff, 0x200, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_MINMAX( 0, 0x3ff ) PORT_SENSITIVITY( 50 ) PORT_KEYDELTA( 15 ) PORT_PLAYER(2)
	1766	INPUT_PORTS_END
	1767
1617	1768	static INPUT_PORTS_START( daytona )
1618	1769	PORT_START("1c00000")
1619	1770	PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, driver_device,custom_port_read, "STEER")
r29557	r29558
1631	1782	PORT_BIT( 0x0000ffff, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, driver_device,custom_port_read, "IN2")
1632	1783	PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNKNOWN )
1633	1784
	1785	PORT_START("1c0001c")
	1786	PORT_BIT( 0xfff7ffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1787	PORT_BIT( 0x00080000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
	1788
	1789
1634	1790	PORT_START("IN0")
1635	1791	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1636	1792	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_COIN2 )
r29557	r29558
1784	1940	{
1785	1941	int scanline = param;
1786	1942
1787		if(scanline == 0) // 384
	1943	if(scanline == 384) // 384
1788	1944	{
1789	1945	m_intreq |= (1<<10);
1790	1946	if (m_intena & (1<<10))
1791	1947	m_maincpu->set_input_line(I960_IRQ3, ASSERT_LINE);
1792	1948	}
1793	1949
1794		if(scanline == 384/2)
	1950	if(scanline == 0)
1795	1951	{
1796	1952	m_intreq |= (1<<0);
1797	1953	if (m_intena & (1<<0))
r29557	r29558
1961	2117	MCFG_S24TILE_DEVICE_PALETTE("palette")
1962	2118
1963	2119	MCFG_SCREEN_ADD("screen", RASTER)
1964		MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK )
1965		MCFG_SCREEN_REFRESH_RATE(60)
1966		MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
1967		MCFG_SCREEN_SIZE(62*8, 48*8)
1968		MCFG_SCREEN_VISIBLE_AREA(0*8, 62*8-1, 0*8, 48*8-1)
	2120	MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
	2121	MCFG_SCREEN_RAW_PARAMS(25000000/2, 496+16, 0, 496, 384+16, 0, 384) // not accurate
1969	2122	MCFG_SCREEN_UPDATE_DRIVER(model2_state, screen_update_model2)
1970	2123
1971	2124	MCFG_PALETTE_ADD("palette", 8192)
r29557	r29558
5483	5636	GAME( 1993, daytonata, daytona, model2o, daytona, driver_device, 0,       ROT0, "Sega",   "Daytona USA (Japan, Turbo hack, set 2)", GAME_NOT_WORKING|GAME_IMPERFECT_GRAPHICS )
5484	5637	GAME( 1993, daytonam,  daytona, model2o, daytona, model2_state,  daytonam,ROT0, "Sega",   "Daytona USA (Japan, To The MAXX)", GAME_NOT_WORKING|GAME_IMPERFECT_GRAPHICS )
5485	5638	GAME( 1994, desert,          0, model2o, desert,  driver_device, 0,       ROT0, "Sega / Martin Marietta", "Desert Tank", GAME_NOT_WORKING|GAME_IMPERFECT_GRAPHICS )
5486		GAME( 1994, vcop,            0, model2o, daytona, driver_device, 0,       ROT0, "Sega",   "Virtua Cop (Revision B)", GAME_NOT_WORKING|GAME_IMPERFECT_GRAPHICS )
5487		GAME( 1994, vcopa,           0, model2o, daytona, driver_device, 0,       ROT0, "Sega",   "Virtua Cop (Revision A)", GAME_NOT_WORKING|GAME_IMPERFECT_GRAPHICS )
	5639	GAME( 1994, vcop,            0, model2o, vcop,    driver_device, 0,       ROT0, "Sega",   "Virtua Cop (Revision B)", GAME_NOT_WORKING|GAME_IMPERFECT_GRAPHICS )
	5640	GAME( 1994, vcopa,           0, model2o, vcop,    driver_device, 0,       ROT0, "Sega",   "Virtua Cop (Revision A)", GAME_NOT_WORKING|GAME_IMPERFECT_GRAPHICS )
5488	5641
5489	5642	// Model 2A-CRX (TGPs, SCSP sound board)
5490	5643	GAME( 1995, manxtt, 0, manxttdx,model2, driver_device, 0, ROT0, "Sega", "Manx TT Superbike - DX (Revision D)", GAME_NOT_WORKING|GAME_IMPERFECT_GRAPHICS )

branches/new_menus/src/mame/drivers/pinkiri8.c

r29557	r29558
46	46	public:
47	47	pinkiri8_state(const machine_config &mconfig, device_type type, const char *tag)
48	48	: driver_device(mconfig, type, tag),
49		m_janshi_back_vram(*this, "back_vram"),
50		m_janshi_vram1(*this, "vram1"),
51		m_janshi_unk1(*this, "unk1"),
52		m_janshi_widthflags(*this, "widthflags"),
53		m_janshi_unk2(*this, "unk2"),
54		m_janshi_vram2(*this, "vram2"),
55		m_janshi_paletteram(*this, "paletteram"),
56		m_janshi_paletteram2(*this, "paletteram2"),
57		m_janshi_crtc_regs(*this, "crtc_regs"),
	49	m_janshi_back_vram(*this, "janshivdp:back_vram"),
	50	m_janshi_vram1(*this, "janshivdp:vram1"),
	51	m_janshi_unk1(*this, "janshivdp:unk1"),
	52	m_janshi_widthflags(*this, "janshivdp:widthflags"),
	53	m_janshi_unk2(*this, "janshivdp:unk2"),
	54	m_janshi_vram2(*this, "janshivdp:vram2"),
	55	m_janshi_paletteram(*this, "janshivdp:paletteram"),
	56	m_janshi_paletteram2(*this, "janshivdp:paletteram2"),
	57	m_janshi_crtc_regs(*this, "janshivdp:crtc_regs"),
58	58	m_maincpu(*this, "maincpu"),
59	59	m_gfxdecode(*this, "gfxdecode"),
60	60	m_palette(*this, "palette")  { }
r29557	r29558
102	102	{
103	103	public:
104	104	janshi_vdp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	105	DECLARE_ADDRESS_MAP(map, 8);
105	106	protected:
106	107	virtual void device_config_complete();
107	108	virtual void device_validity_check(validity_checker &valid) const;
r29557	r29558
112	113	};
113	114
114	115
115		static ADDRESS_MAP_START( janshi_vdp_map8, AS_0, 8, janshi_vdp_device )
116
	116	DEVICE_ADDRESS_MAP_START( map, 8, janshi_vdp_device )
117	117	AM_RANGE(0xfc0000, 0xfc1fff) AM_RAM AM_SHARE("back_vram") // bg tilemap?
118	118	AM_RANGE(0xfc2000, 0xfc2fff) AM_RAM AM_SHARE("vram1") // xpos, colour, tile number etc.
119	119
r29557	r29558
134	134	janshi_vdp_device::janshi_vdp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
135	135	: device_t(mconfig, JANSHIVDP, "JANSHIVDP", tag, owner, clock, "janshi_vdp", __FILE__),
136	136	device_memory_interface(mconfig, *this),
137		m_space_config("janshi_vdp", ENDIANNESS_LITTLE, 8,24, 0, NULL, *ADDRESS_MAP_NAME(janshi_vdp_map8))
	137	m_space_config("janshi_vdp", ENDIANNESS_LITTLE, 8,24, 0, address_map_delegate(FUNC(janshi_vdp_device::map), this))
138	138	{
139	139	}
140	140

branches/new_menus/src/mame/drivers/jpmimpct.c

r29557	r29558
957	957	WRITE8_MEMBER(jpmimpct_state::display_c_w)
958	958	{
959	959	//Reset 0x04, data 0x02, clock 0x01
960		if(data & 0x04)
961		{
962		int alpha_data = (data & 0x02)?0:1;
963		if (m_alpha_clock != (data & 0x01))
964		{
965		if (!m_alpha_clock)//falling edge
966		{
967		m_vfd->shift_data(alpha_data);
968		}
969		}
970		m_alpha_clock = (data & 0x01);
971		}
972		else
973		{
974		m_vfd->reset();
975		}
	960	m_vfd->por(data & 0x04);
	961	m_vfd->data(data & 0x02);
	962	m_vfd->sclk(data & 0x01);
976	963	}
977	964
978	965	static I8255_INTERFACE (ppi8255_intf)

branches/new_menus/src/mame/drivers/jpmsys5.c

r29557	r29558
238	238	}
239	239	case 1:
240	240	{
241		//Reset 0x04, data 0x02, clock 0x01
242		if(data & 0x04)
243		{
244		int alpha_data = (data & 0x02)?0:1;
245		if (m_alpha_clock != (data & 0x01))
246		{
247		if (!m_alpha_clock)//falling edge
248		{
249		m_vfd->shift_data(alpha_data);
250		}
251		}
252		m_alpha_clock = (data & 0x01);
253		}
254		else
255		{
256		m_vfd->reset();
257		}
	241	//Reset 0x04, data 0x02, clock
	242	m_vfd->por(data & 0x04);
	243	m_vfd->data(data & 0x02);
	244	m_vfd->sclk(data & 0x01);
258	245	break;
259	246	}
260	247	case 2:

branches/new_menus/src/mame/drivers/bfm_sc1.c

r29557	r29558
355	355
356	356	WRITE8_MEMBER(bfm_sc1_state::vfd_w)
357	357	{
358		int changed = m_vfd_latch ^ data;
	358	/*   int changed = m_vfd_latch ^ data;
359	359
360	360	m_vfd_latch = data;
361	361
r29557	r29558
376	376	}
377	377	}
378	378	}
	379	*/
	380	m_vfd0->por(!(data & VFD_RESET));
	381	m_vfd0->data(data & VFD_DATA);
	382	m_vfd0->sclk(data & VFD_CLOCK1);
379	383	}
380	384
381	385	/////////////////////////////////////////////////////////////////////////////////////

branches/new_menus/src/mame/drivers/mpu4hw.c

r29557	r29558
645	645	WRITE_LINE_MEMBER(mpu4_state::pia_ic3_ca2_w)
646	646	{
647	647	LOG_IC3(("%s: IC3 PIA Write CA2 (alpha data), %02X\n", machine().describe_context(),state));
648
649		m_alpha_data_line = state;
	648	m_vfd->data(state);
650	649	}
651	650
652	651
r29557	r29558
654	653	{
655	654	LOG_IC3(("%s: IC3 PIA Write CB (alpha reset), %02X\n",machine().describe_context(),state));
656	655	// DM Data pin A
657		if ( !state )
658		{
659		m_vfd->reset();
660		}
	656	m_vfd->por(state);
661	657	}
662	658
663	659
r29557	r29558
1346	1342	LOG_IC8(("%s: IC8 PIA write CB2 (alpha clock) %02X\n", machine().describe_context(), state & 0xFF));
1347	1343
1348	1344	// DM Data pin B
1349		if (m_alpha_clock != state)
1350		{
1351		if (!m_alpha_clock)//falling edge
1352		{
1353		m_vfd->shift_data(m_alpha_data_line?0:1);
1354		}
1355		}
1356		m_alpha_clock = state;
	1345
	1346	m_vfd->sclk(!state);
1357	1347	}
1358	1348
1359	1349	// universal sampled sound program card PCB 683077

branches/new_menus/src/mame/drivers/mpu3.c

r29557	r29558
136	136	optional_device<roc10937_t> m_vfd;
137	137
138	138
139		int m_alpha_data_line;
140		int m_alpha_clock;
141	139	int m_triac_ic3;
142	140	int m_triac_ic4;
143	141	int m_triac_ic5;
r29557	r29558
595	593	WRITE8_MEMBER(mpu3_state::pia_ic6_porta_w)
596	594	{
597	595	LOG(("%s: IC6 PIA Port A Set to %2x (Alpha)\n", machine().describe_context(),data));
598		if ( data & 0x08 ) m_vfd->reset();
599
600		m_alpha_data_line = ((data & 0x20) >> 5);
601
602		if (m_alpha_clock != ((data & 0x10) >>4))
603		{
604		if (!m_alpha_clock)//falling edge
605		{
606		m_vfd->shift_data(m_alpha_data_line?1:0);
607		}
608		}
609		m_alpha_clock = (data & 0x10) >>4;
	596	m_vfd->por((!data&0x08));
	597	m_vfd->data((data & 0x20) >> 5);
	598	m_vfd->sclk((data & 0x10) >>4);
610	599	}
611	600
612	601	WRITE8_MEMBER(mpu3_state::pia_ic6_portb_w)

branches/new_menus/src/mame/drivers/maygay1b.c

r29557	r29558
147	147	{
148	148	//  printf("m1_pia_porta_w %02x\n",data);
149	149
150		if((data & 0x40))
151		{
152		if (m_alpha_clock != (data & 0x20))
153		{
154		if (!m_alpha_clock)
155		{
156		m_vfd->shift_data((data & 0x10)?0:1);
157		}
158		}
159		m_alpha_clock = (data & 0x20);
160		}
161		else
162		{
163		m_vfd->reset();
164		}
	150	m_vfd->por(!data & 0x40);
	151	m_vfd->data(data & 0x10);
	152	m_vfd->sclk(data & 0x20);
165	153	}
166	154
167	155	WRITE8_MEMBER(maygay1b_state::m1_pia_portb_w)

branches/new_menus/src/mame/audio/segag80r.c

r29557	r29558
711	711	};
712	712
713	713
714		static const tms36xx_interface monsterb_tms3617_interface =
715		{
716		TMS3617,
717		{0.5,0.5,0.5,0.5,0.5,0.5}  /* decay times of voices */
718		};
719
720
721
722	714	/*************************************
723	715	*
724	716	*  N7751 memory maps
r29557	r29558
769	761	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
770	762
771	763	MCFG_TMS36XX_ADD("music", 247)
772		MCFG_SOUND_CONFIG(monsterb_tms3617_interface)
	764	MCFG_TMS36XX_TYPE(TMS3617)
	765	MCFG_TMS36XX_DECAY_TIMES(0.5, 0.5, 0.5, 0.5, 0.5, 0.5)
773	766	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
774	767
775	768	MCFG_DAC_ADD("dac")

branches/new_menus/src/mame/machine/archimds.c

r29557	r29558
58	58
59	59	if (m_ioc_regs[IRQ_STATUS_B] & m_ioc_regs[IRQ_MASK_B])
60	60	{
61		generic_pulse_irq_line(m_maincpu, ARM_IRQ_LINE, 1);
	61	m_maincpu->set_input_line(ARM_IRQ_LINE, HOLD_LINE);
62	62	}
63	63	}
64	64
r29557	r29558
66	66	{
67	67	m_ioc_regs[FIQ_STATUS] |= mask;
68	68
	69	//printf("STATUS:%02x IRQ:%02x MASK:%02x\n",m_ioc_regs[FIQ_STATUS],mask,m_ioc_regs[FIQ_MASK]);
	70
69	71	if (m_ioc_regs[FIQ_STATUS] & m_ioc_regs[FIQ_MASK])
70	72	{
71		generic_pulse_irq_line(m_maincpu, ARM_FIRQ_LINE, 1);
	73	m_maincpu->set_input_line(ARM_FIRQ_LINE, HOLD_LINE);
72	74	}
73	75	}
74	76
r29557	r29558
81	83	void archimedes_state::archimedes_clear_irq_b(int mask)
82	84	{
83	85	m_ioc_regs[IRQ_STATUS_B] &= ~mask;
84		archimedes_request_irq_b(0);
	86	//archimedes_request_irq_b(0);
85	87	}
86	88
87	89	void archimedes_state::archimedes_clear_fiq(int mask)
88	90	{
89	91	m_ioc_regs[FIQ_STATUS] &= ~mask;
90		archimedes_request_fiq(0);
	92	//archimedes_request_fiq(0);
91	93	}
92	94
93	95	void archimedes_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
r29557	r29558
138	140	offset_ptr = m_vidc_vidstart;
139	141	}
140	142
141		size = m_vidc_vidend-m_vidc_vidstart+0x10;
	143	if(m_cursor_enabled == true)
	144	{
	145	for(m_vidc_ccur = 0;m_vidc_ccur < 0x200;m_vidc_ccur++)
	146	m_cursor_vram[m_vidc_ccur] = (space.read_byte(m_vidc_cinit+m_vidc_ccur));
	147	}
142	148
143		for(m_vidc_ccur = 0;m_vidc_ccur < 0x200;m_vidc_ccur++)
144		m_cursor_vram[m_vidc_ccur] = (space.read_byte(m_vidc_cinit+m_vidc_ccur));
145
146	149	if(m_video_dma_on)
147	150	{
148	151	m_vid_timer->adjust(m_screen->time_until_pos(m_vidc_regs[0xb4]));
r29557	r29558
276	279	}
277	280
278	281	m_ioc_regs[IRQ_STATUS_A] = 0x10 | 0x80; //set up POR (Power On Reset) and Force IRQ at start-up
279		m_ioc_regs[IRQ_STATUS_B] = 0x02; //set up IL[1] On
	282	m_ioc_regs[IRQ_STATUS_B] = 0x00; //set up IL[1] On
280	283	m_ioc_regs[FIQ_STATUS] = 0x80;   //set up Force FIQ
281	284	m_ioc_regs[CONTROL] = 0xff;
282	285	}
r29557	r29558
685	688	{
686	689	case 0: return ioc_ctrl_r(space,offset,mem_mask);
687	690	case 1:
688		if (m_wd1772) {
689		logerror("17XX: R @ addr %x mask %08x\n", offset*4, mem_mask);
690		return m_wd1772->data_r(space, offset&0xf);
	691	if (m_fdc)
	692	{
	693	//printf("17XX: R @ addr %x mask %08x\n", offset*4, mem_mask);
	694	switch(ioc_addr & 0xc)
	695	{
	696	case 0x00: return m_fdc->status_r();
	697	case 0x04: return m_fdc->track_r();
	698	case 0x08: return m_fdc->sector_r();
	699	case 0x0c: return m_fdc->data_r();
	700	}
	701
	702	return 0;
691	703	} else {
692	704	logerror("Read from FDC device?\n");
693	705	return 0;
r29557	r29558
702	714	logerror("IOC: Internal Podule Read\n");
703	715	return 0xffff;
704	716	case 5:
705		if (m_wd1772) {
	717	if (m_fdc)
	718	{
706	719	switch(ioc_addr & 0xfffc)
707	720	{
	721	case 0x18: return 0xff; // FDC latch B
	722	case 0x40: return 0xff; // FDC latch A
708	723	case 0x50: return 0; //fdc type, new model returns 5 here
	724	case 0x70: return 0x0F;
	725	case 0x74: return 0xFF; // unknown
	726	//                          case 0x78: /* joystick */
	727	//                          case 0x7c:
709	728	}
710	729	}
711	730
712		logerror("IOC: Internal Latches Read %08x\n",ioc_addr);
	731	//printf("IOC: Internal Latches Read %08x\n",ioc_addr);
713	732
714	733	return 0xffff;
715	734	}
r29557	r29558
740	759	{
741	760	case 0: ioc_ctrl_w(space,offset,data,mem_mask); return;
742	761	case 1:
743		if (m_wd1772) {
744		logerror("17XX: %x to addr %x mask %08x\n", data, offset*4, mem_mask);
745		m_wd1772->data_w(space, offset&0xf, data&0xff);
746		} else {
	762	if (m_fdc)
	763	{
	764	//printf("17XX: %x to addr %x mask %08x\n", data, offset*4, mem_mask);
	765	switch(ioc_addr & 0xc)
	766	{
	767	case 0x00:
	768	m_fdc->cmd_w(data);
	769	return;
	770
	771	case 0x04:
	772	m_fdc->track_w(data);
	773	return;
	774
	775	case 0x08:
	776	m_fdc->sector_w(data);
	777	return;
	778
	779	case 0x0c:
	780	m_fdc->data_w(data);
	781	return;
	782	}
	783	}
	784	else
	785	{
747	786	logerror("Write to FDC device?\n");
748	787	}
749	788	return;
r29557	r29558
757	796	logerror("IOC: Internal Podule Write\n");
758	797	return;
759	798	case 5:
760		if (m_wd1772) {
	799	if (m_fdc)
	800	{
761	801	switch(ioc_addr & 0xfffc)
762	802	{
763	803	case 0x18: // latch B
764		m_wd1772->dden_w(BIT(data, 1));
	804	m_fdc->dden_w(BIT(data, 1));
765	805	return;
766	806
767	807	case 0x40: // latch A
768		if (data & 1) { m_wd1772->set_drive(0); }
769		if (data & 2) { m_wd1772->set_drive(1); }
770		if (data & 4) { m_wd1772->set_drive(2); }
771		if (data & 8) { m_wd1772->set_drive(3); }
	808	floppy_image_device *floppy = NULL;
772	809
773		m_wd1772->set_side((data & 0x10)>>4);
	810	if (!(data & 1)) { floppy = m_floppy0->get_device(); }
	811	if (!(data & 2)) { floppy = m_floppy1->get_device(); }
	812	if (!(data & 4)) { floppy = NULL; } // floppy 2
	813	if (!(data & 8)) { floppy = NULL; } // floppy 3
	814
	815	m_fdc->set_floppy(floppy);
	816
	817	if(floppy)
	818	{
	819	floppy->mon_w(BIT(data, 5));
	820	floppy->ss_w(!(BIT(data, 4)));
	821	}
774	822	//bit 5 is motor on
775	823	return;
776	824	}
	825
	826	//printf("%08x\n",ioc_addr);
777	827	}
778	828	break;
779	829	}
r29557	r29558
920	970
921	971
922	972	//#ifdef MAME_DEBUG
	973	if(1)
923	974	logerror("VIDC: %s = %d\n", vrnames[(reg-0x80)/4], m_vidc_regs[reg]);
924	975	//#endif
925	976
r29557	r29558
953	1004	switch ((data >> 17) & 7)
954	1005	{
955	1006	case 0: /* video init */
	1007	m_cursor_enabled = false;
956	1008	m_vidc_vidinit = ((data>>2)&0x7fff)*16;
957	1009	//printf("MEMC: VIDINIT %08x\n",m_vidc_vidinit);
958	1010	break;
r29557	r29558
968	1020	break;
969	1021
970	1022	case 3: /* cursor init */
	1023	//m_cursor_enabled = true;
971	1024	m_vidc_cinit = 0x2000000 | (((data>>2)&0x7fff)*16);
972		//printf("MEMC: CURSOR %08x\n",((data>>2)&0x7fff)*16);
	1025	//printf("MEMC: CURSOR INIT %08x\n",((data>>2)&0x7fff)*16);
973	1026	break;
974	1027
975	1028	case 4: /* sound start */

branches/new_menus/src/mame/machine/pcshare.c

r29557	r29558
164	164	m_kbdc->write_out2(state);
165	165	}
166	166
167		/*************************************************************
168		*
169		* Keyboard
170		*
171		*************************************************************/
172	167
173		static const struct kbdc8042_interface at8042 =
174		{
175		KBDC8042_AT386,
176		DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET),
177		DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_A20),
178		DEVCB_DEVICE_LINE_MEMBER("pic8259_1", pic8259_device, ir1_w),
179		DEVCB_NULL,
180
181		DEVCB_NULL
182		};
183
184		ADDRESS_MAP_START( pcat32_io_common, AS_IO, 32, pcat_base_state )
	168	ADDRESS_MAP_START( pcat32_io_common, AS_IO, 32, pcat_base_state )
185	169	AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", am9517a_device, read, write, 0xffffffff)
186	170	AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_device, read, write, 0xffffffff)
187	171	AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8("pit8254", pit8254_device, read, write, 0xffffffff)
r29557	r29558
209	193	MCFG_MC146818_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir0_w))
210	194	MCFG_MC146818_CENTURY_INDEX(0x32)
211	195
212		MCFG_KBDC8042_ADD("kbdc", at8042)
	196	MCFG_DEVICE_ADD("kbdc", KBDC8042, 0)
	197	MCFG_KBDC8042_KEYBOARD_TYPE(KBDC8042_AT386)
	198	MCFG_KBDC8042_SYSTEM_RESET_CB(INPUTLINE("maincpu", INPUT_LINE_RESET))
	199	MCFG_KBDC8042_GATE_A20_CB(INPUTLINE("maincpu", INPUT_LINE_A20))
	200	MCFG_KBDC8042_INPUT_BUFFER_FULL_CB(DEVWRITELINE("pic8259_1", pic8259_device, ir1_w))
213	201	MACHINE_CONFIG_END

branches/new_menus/src/mame/machine/bfm_bd1.c

r29557	r29558
130	130	save_item(NAME(m_outputs));
131	131	save_item(NAME(m_user_data));           // user defined character data (16 bit)
132	132	save_item(NAME(m_user_def));            // user defined character state
	133	save_item(NAME(m_sclk));
	134	save_item(NAME(m_data));
133	135
134	136	device_reset();
135	137	}
r29557	r29558
150	152	m_flash_control = 0;
151	153	m_user_data = 0;
152	154	m_user_def = 0;
	155	m_sclk = 0;
	156	m_data = 0;
153	157
154	158	memset(m_chars, 0, sizeof(m_chars));
155	159	memset(m_outputs, 0, sizeof(m_outputs));
r29557	r29558
163	167
164	168	void bfm_bd1_t::device_post_load()
165	169	{
166		for (int i =0; i<16; i++)
167		{
168		output_set_indexed_value("vfd", (m_port_val*16) + i, m_outputs[i]);
169		}
	170	update_display();
170	171	}
171	172
172	173	void bfm_bd1_t::update_display()
r29557	r29558
535	536	}
536	537	}
537	538
538		void bfm_bd1_t::shift_data(int data)
	539	void bfm_bd1_t::shift_clock(int state)
539	540	{
540		m_shift_data <<= 1;
	541	if (m_sclk != state)
	542	{
	543	if (!m_sclk)
	544	{
	545	m_shift_data <<= 1;
541	546
542		if ( !data ) m_shift_data |= 1;
	547	if ( !m_data ) m_shift_data |= 1;
543	548
544		if ( ++m_shift_count >= 8 )
	549	if ( ++m_shift_count >= 8 )
	550	{
	551	write_char(m_shift_data);
	552	m_shift_count = 0;
	553	m_shift_data  = 0;
	554	}
	555	update_display();
	556
	557	}
	558	}
	559	m_sclk = state;
	560	}
	561
	562	WRITE_LINE_MEMBER( bfm_bd1_t::sclk ) { shift_clock(state); }
	563	WRITE_LINE_MEMBER( bfm_bd1_t::data ) { m_data = state; }
	564
	565	WRITE_LINE_MEMBER( bfm_bd1_t::por )
	566	{
	567	if (!state)
545	568	{
546		write_char(m_shift_data);
547		m_shift_count = 0;
548		m_shift_data  = 0;
	569	reset();
549	570	}
550	571	}

branches/new_menus/src/mame/machine/bfm_bd1.h

r29557	r29558
23	23	UINT8   m_port_val;
24	24	void blank(int data);
25	25
26		void shift_data(int data);
	26	void shift_clock(int state);
27	27	void setdata(int segdata, int data);
28	28	UINT16 set_display(UINT16 segin);
	29	DECLARE_WRITE_LINE_MEMBER( sclk );
	30	DECLARE_WRITE_LINE_MEMBER( data );
	31	DECLARE_WRITE_LINE_MEMBER( por );
29	32
30	33	protected:
31	34	static const UINT8 AT_NORMAL  = 0x00;
r29557	r29558
44	47	int m_display_mode;
45	48	int m_flash_rate;
46	49	int m_flash_control;
	50	int m_sclk;
	51	int m_data;
	52
47	53	UINT8 m_cursor;
48	54	UINT16 m_chars[16];
49	55	UINT16 m_outputs[16];

branches/new_menus/src/mame/includes/model2.h

r29557	r29558
196	196	DECLARE_READ_LINE_MEMBER(copro_tgp_fifoin_pop_ok);
197	197	DECLARE_READ32_MEMBER(copro_tgp_fifoin_pop);
198	198	DECLARE_WRITE32_MEMBER(copro_tgp_fifoout_push);
	199	DECLARE_READ8_MEMBER(virtuacop_lightgun_r);
	200	DECLARE_READ8_MEMBER(virtuacop_lightgun_offscreen_r);
199	201	};
200	202
201	203	/*----------- defined in video/model2.c -----------*/

branches/new_menus/src/mame/includes/archimds.h

r29557	r29558
10	10	#include "machine/aakart.h"
11	11	#include "sound/dac.h"
12	12	#include "machine/i2cmem.h"
13		#include "machine/wd17xx.h"
	13	#include "machine/wd_fdc.h"
14	14
15	15	// interrupt definitions.  these are for the real Archimedes computer - arcade
16	16	// and gambling knockoffs likely are a bit different.
r29557	r29558
47	47	m_kart(*this, "kart"),
48	48	m_maincpu(*this, "maincpu"),
49	49	m_i2cmem(*this, "i2cmem"),
50		m_wd1772(*this, "wd1772"),
	50	m_fdc(*this, "fdc"),
	51	m_floppy0(*this, "fdc:0"),
	52	m_floppy1(*this, "fdc:1"),
51	53	m_region_maincpu(*this, "maincpu"),
52	54	m_region_vram(*this, "vram"),
53	55	m_screen(*this, "screen"),
r29557	r29558
92	94	protected:
93	95	required_device<cpu_device> m_maincpu;
94	96	optional_device<i2cmem_device> m_i2cmem;
95		optional_device<wd1772_device> m_wd1772;
	97	optional_device<wd1772_t> m_fdc;
	98	optional_device<floppy_connector> m_floppy0;
	99	optional_device<floppy_connector> m_floppy1;
96	100	required_memory_region m_region_maincpu;
97	101	required_memory_region m_region_vram;
98	102	required_device<screen_device> m_screen;
r29557	r29558
126	130	UINT8 m_video_dma_on,m_audio_dma_on;
127	131	UINT8 m_vidc_pixel_clk;
128	132	UINT8 m_vidc_stereo_reg[8];
	133	bool m_cursor_enabled;
129	134	emu_timer *m_timer[4], *m_snd_timer, *m_vid_timer;
130	135	emu_timer *m_vbl_timer;
131	136	};

branches/new_menus/src/mame/includes/mpu4.h

r29557	r29558
250	250
251	251	int m_mod_number;
252	252	int m_mmtr_data;
253		int m_alpha_data_line;
254		int m_alpha_clock;
255	253	int m_ay8913_address;
256	254	int m_serial_data;
257	255	int m_signal_50hz;

branches/new_menus/src/mame/includes/maygay1b.h

r29557	r29558
60	60	int m_old_lamp_strobe;
61	61	int m_lamp_strobe2;
62	62	int m_old_lamp_strobe2;
63		int m_alpha_clock;
64	63	int m_RAMEN;
65	64	int m_ALARMEN;
66	65	int m_PSUrelay;

branches/new_menus/src/mame/video/archimds.c

r29557	r29558
176	176	}
177	177
178	178
179		if(0)
	179	if(m_cursor_enabled == true)
180	180	{
181	181	count = 0;
182	182	for(y=0;y<16;y++)

branches/new_menus/src/emu/sound/tms36xx.c

r29557	r29558
5	5
6	6	#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
7	7
8		#define VMIN    0x0000
9		#define VMAX    0x7fff
10
11	8	/* the frequencies are later adjusted by "* clock / FSCALE" */
12	9	#define FSCALE  1024
13	10
r29557	r29558
338	335	m_enable(0),
339	336	m_tune_num(0),
340	337	m_tune_ofs(0),
341		m_tune_max(0),
342		m_intf(NULL)
	338	m_tune_max(0)
343	339	{
344	340	memset(m_vol, 0, sizeof(int)*12);
345	341	memset(m_vol_counter, 0, sizeof(int)*12);
r29557	r29558
355	351
356	352	void tms36xx_device::device_start()
357	353	{
358		int j;
359		int enable;
	354	int enable = 0;
360	355
361		m_intf = (const tms36xx_interface *)static_config();
362
363	356	m_channel = stream_alloc(0, 1, clock() * 64);
364	357	m_samplerate = clock() * 64;
365	358	m_basefreq = clock();
366		enable = 0;
367		for (j = 0; j < 6; j++)
	359
	360	for (int j = 0; j < 6; j++)
368	361	{
369		if( m_intf->decay[j] > 0 )
	362	if (m_decay_time[j] > 0)
370	363	{
371		m_decay[j+0] = m_decay[j+6] = VMAX / m_intf->decay[j];
	364	m_decay[j+0] = m_decay[j+6] = VMAX / m_decay_time[j];
372	365	enable |= 0x41 << j;
373	366	}
374	367	}
375		m_speed = (m_intf->speed > 0) ? VMAX / m_intf->speed : VMAX;
376	368	tms3617_enable(enable);
377	369
378	370	LOG(("TMS36xx samplerate    %d\n", m_samplerate));

branches/new_menus/src/emu/sound/tms36xx.h

r29557	r29558
12	12	#define MCFG_TMS36XX_REPLACE(_tag, _clock) \
13	13	MCFG_DEVICE_REPLACE(_tag, TMS36XX, _clock)
14	14
	15	#define MCFG_TMS36XX_TYPE(_type) \
	16	tms36xx_device::set_subtype(*device, _type);
15	17
	18	#define MCFG_TMS36XX_DECAY_TIMES(_dec0, _dec1, _dec2, _dec3, _dec4, _dec5) \
	19	tms36xx_device::set_decays(*device, _dec0, _dec1, _dec2, _dec3, _dec4, _dec5);
	20
	21	#define MCFG_TMS36XX_TUNE_SPEED(_speed) \
	22	tms36xx_device::set_tune_speed(*device, _speed);
	23
	24
16	25	//**************************************************************************
17	26	//  TYPE DEFINITIONS
18	27	//**************************************************************************
r29557	r29558
22	31	#define TMS3615     15      // Naughty Boy, Pleiads (13 notes, one output)
23	32	#define TMS3617     17      // Monster Bash (13 notes, six outputs)
24	33
	34	#define VMIN    0x0000
	35	#define VMAX    0x7fff
25	36
26		// ======================> tms36xx_interface
27	37
28		struct tms36xx_interface
29		{
30		int subtype;
31		double decay[6];    // decay times for the six harmonic notes
32		double speed;       // tune speed (meaningful for the TMS3615 only)
33		};
34
35
36	38	// ======================> tms36xx_device
37	39
38	40	class tms36xx_device : public device_t,
r29557	r29558
42	44	tms36xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
43	45	~tms36xx_device() { }
44	46
	47	static void set_subtype(device_t &device, int type)
	48	{
	49	tms36xx_device &dev = downcast<tms36xx_device &>(device);
	50	switch (type)
	51	{
	52	case MM6221AA:
	53	dev.m_subtype = "MM6221AA";
	54	break;
	55	case TMS3615:
	56	dev.m_subtype = "TMS3615";
	57	break;
	58	case TMS3617:
	59	dev.m_subtype = "TMS3617";
	60	break;
	61	default:
	62	fatalerror("Invalid TMS36XX type: %d\n", type);
	63	break;
	64	}
	65	}
	66	static void set_tune_speed(device_t &device, double speed)
	67	{
	68	downcast<tms36xx_device &>(device).m_speed = (speed > 0) ? VMAX / speed : VMAX;
	69	}
	70	static void set_decays(device_t &device, double decay_0, double decay_1, double decay_2, double decay_3, double decay_4, double decay_5)
	71	{
	72	tms36xx_device &dev = downcast<tms36xx_device &>(device);
	73	dev.m_decay_time[0] = decay_0;
	74	dev.m_decay_time[1] = decay_1;
	75	dev.m_decay_time[2] = decay_2;
	76	dev.m_decay_time[3] = decay_3;
	77	dev.m_decay_time[4] = decay_4;
	78	dev.m_decay_time[5] = decay_5;
	79	}
	80
45	81	protected:
46	82	// device-level overrides
47	83	virtual void device_start();
r29557	r29558
63	99	void tms36xx_reset_counters();
64	100	void tms3617_enable(int enable);
65	101
66		private:
67		char *m_subtype;      // subtype name MM6221AA, TMS3615 or TMS3617
	102	double m_decay_time[6];  // decay times for the six harmonic notes
	103
	104	const char *m_subtype;      // subtype name MM6221AA, TMS3615 or TMS3617
68	105	sound_stream *m_channel; // returned by stream_create()
69	106
70	107	int m_samplerate;     // output sample rate
r29557	r29558
80	117	int m_shift;          // shift toggles between 0 and 6 to allow decaying voices
81	118	int m_vol[12];        // (decaying) volume of harmonics notes
82	119	int m_vol_counter[12];// volume adjustment counter
83		int m_decay[12];      // volume adjustment rate - dervied from decay
	120	int m_decay[12];      // volume adjustment rate - derived from m_intf_decay
84	121
85	122	int m_counter[12];    // tone frequency counter
86	123	int m_frequency[12];  // tone frequency
r29557	r29558
90	127	int m_tune_num;       // tune currently playing
91	128	int m_tune_ofs;       // note currently playing
92	129	int m_tune_max;       // end of tune
93
94		const tms36xx_interface *m_intf;
95	130	};
96	131
97	132	extern const device_type TMS36XX;

branches/new_menus/src/emu/machine/aakart.c

r29557	r29558
149	149	m_keyb_state = 0;
150	150	}
151	151
152
153	152	break;
154	153	case 0xfd:
155	154	m_rx = 0xfd;

branches/new_menus/src/emu/machine/8257dma.c

r29557	r29558
60	60
61	61	i8257_device::i8257_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
62	62	: device_t(mconfig, I8257, "DMA8257", tag, owner, clock, "i8257", __FILE__),
	63	m_out_hrq_cb(*this),
	64	m_out_tc_cb(*this),
	65	m_out_mark_cb(*this),
	66	m_in_memr_cb(*this),
	67	m_out_memw_cb(*this),
	68	m_in_ior_0_cb(*this),
	69	m_in_ior_1_cb(*this),
	70	m_in_ior_2_cb(*this),
	71	m_in_ior_3_cb(*this),
	72	m_out_iow_0_cb(*this),
	73	m_out_iow_1_cb(*this),
	74	m_out_iow_2_cb(*this),
	75	m_out_iow_3_cb(*this),
63	76	m_mode(0),
64	77	m_rr(0),
65	78	m_msb(0),
r29557	r29558
72	85	memset(m_rwmode, 0, sizeof(m_rwmode));
73	86	}
74	87
75
76	88	//-------------------------------------------------
77		//  device_config_complete - perform any
78		//  operations now that the configuration is
79		//  complete
80		//-------------------------------------------------
81
82		void i8257_device::device_config_complete()
83		{
84		// inherit a copy of the static data
85		const i8257_interface *intf = reinterpret_cast<const i8257_interface *>(static_config());
86		if (intf != NULL)
87		{
88		*static_cast<i8257_interface *>(this) = *intf;
89		}
90
91		// or initialize to defaults if none provided
92		else
93		{
94		memset(&m_out_hrq_cb, 0, sizeof(m_out_hrq_cb));
95		memset(&m_out_tc_cb, 0, sizeof(m_out_tc_cb));
96		memset(&m_out_mark_cb, 0, sizeof(m_out_mark_cb));
97		memset(&m_in_memr_cb, 0, sizeof(m_in_memr_cb));
98		memset(&m_out_memw_cb, 0, sizeof(m_out_memw_cb));
99		memset(&m_in_ior_cb[0], 0, sizeof(m_in_ior_cb[0]));
100		memset(&m_in_ior_cb[1], 0, sizeof(m_in_ior_cb[1]));
101		memset(&m_in_ior_cb[2], 0, sizeof(m_in_ior_cb[2]));
102		memset(&m_in_ior_cb[3], 0, sizeof(m_in_ior_cb[3]));
103		memset(&m_out_iow_cb[0], 0, sizeof(m_out_iow_cb[0]));
104		memset(&m_out_iow_cb[1], 0, sizeof(m_out_iow_cb[1]));
105		memset(&m_out_iow_cb[2], 0, sizeof(m_out_iow_cb[2]));
106		memset(&m_out_iow_cb[3], 0, sizeof(m_out_iow_cb[3]));
107		}
108		}
109
110
111		//-------------------------------------------------
112	89	//  device_start - device-specific startup
113	90	//-------------------------------------------------
114	91
r29557	r29558
118	95	assert(this != NULL);
119	96
120	97	/* resolve callbacks */
121		m_out_hrq_func.resolve(m_out_hrq_cb, *this);
122		m_out_tc_func.resolve(m_out_tc_cb, *this);
123		m_out_mark_func.resolve(m_out_mark_cb, *this);
124		m_in_memr_func.resolve(m_in_memr_cb, *this);
125		m_out_memw_func.resolve(m_out_memw_cb, *this);
126
127		for (int i = 0; i < I8257_NUM_CHANNELS; i++)
128		{
129		m_in_ior_func[i].resolve(m_in_ior_cb[i], *this);
130		m_out_iow_func[i].resolve(m_out_iow_cb[i], *this);
131		}
132
	98	m_out_hrq_cb.resolve_safe();
	99	m_out_tc_cb.resolve_safe();
	100	m_out_mark_cb.resolve_safe();
	101	m_in_memr_cb.resolve();
	102	m_out_memw_cb.resolve();
	103	m_in_ior_0_cb.resolve();
	104	m_in_ior_1_cb.resolve();
	105	m_in_ior_2_cb.resolve();
	106	m_in_ior_3_cb.resolve();
	107	m_out_iow_0_cb.resolve();
	108	m_out_iow_1_cb.resolve();
	109	m_out_iow_2_cb.resolve();
	110	m_out_iow_3_cb.resolve();
	111
133	112	/* set initial values */
134	113	m_timer = timer_alloc(TIMER_OPERATION);
135	114	m_msbflip_timer = timer_alloc(TIMER_MSBFLIP);
r29557	r29558
162	141	int i8257_device::i8257_do_operation(int channel)
163	142	{
164	143	int done;
165		UINT8 data;
	144	UINT8 data = 0;
166	145
167	146	UINT8 mode = m_rwmode[channel];
168	147	if (m_count[channel] == 0x0000)
169	148	{
170	149	m_status |=  (0x01 << channel);
171	150
172		m_out_tc_func(ASSERT_LINE);
	151	m_out_tc_cb(ASSERT_LINE);
173	152	}
174		switch(mode) {
	153
	154	switch(mode)
	155	{
175	156	case 1:
176		if (!m_in_memr_func.isnull())
177		{
178		data = m_in_memr_func(m_address[channel]);
179		}
	157	if (!m_in_memr_cb.isnull())
	158	data = m_in_memr_cb(m_address[channel]);
180	159	else
181	160	{
182	161	data = 0;
183	162	logerror("8257: No memory read function defined.\n");
184	163	}
185		if (!m_out_iow_func[channel].isnull())
	164
	165	switch (channel)
186	166	{
187		m_out_iow_func[channel](m_address[channel], data);
	167	case 0:
	168	if (!m_out_iow_0_cb.isnull())
	169	m_out_iow_0_cb((offs_t)m_address[channel], data);
	170	else
	171	logerror("8257: No channel write function for channel %d defined.\n", channel);
	172	break;
	173	case 1:
	174	if (!m_out_iow_1_cb.isnull())
	175	m_out_iow_1_cb((offs_t)m_address[channel], data);
	176	else
	177	logerror("8257: No channel write function for channel %d defined.\n", channel);
	178	break;
	179	case 2:
	180	if (!m_out_iow_2_cb.isnull())
	181	m_out_iow_2_cb((offs_t)m_address[channel], data);
	182	else
	183	logerror("8257: No channel write function for channel %d defined.\n", channel);
	184	break;
	185	case 3:
	186	if (!m_out_iow_3_cb.isnull())
	187	m_out_iow_3_cb((offs_t)m_address[channel], data);
	188	else
	189	logerror("8257: No channel write function for channel %d defined.\n", channel);
	190	break;
188	191	}
189		else
190		{
191		logerror("8257: No channel write function for channel %d defined.\n",channel);
192		}
193	192
194	193	m_address[channel]++;
195	194	m_count[channel]--;
r29557	r29558
197	196	break;
198	197
199	198	case 2:
200		if (!m_in_ior_func[channel].isnull())
	199	switch (channel)
201	200	{
202		data = m_in_ior_func[channel](m_address[channel]);
	201	case 0:
	202	if (!m_in_ior_0_cb.isnull())
	203	data = m_in_ior_0_cb((offs_t)m_address[channel]);
	204	else
	205	{
	206	data = 0;
	207	logerror("8257: No channel read function for channel %d defined.\n", channel);
	208	}
	209	break;
	210	case 1:
	211	if (!m_in_ior_1_cb.isnull())
	212	data = m_in_ior_1_cb((offs_t)m_address[channel]);
	213	else
	214	{
	215	data = 0;
	216	logerror("8257: No channel read function for channel %d defined.\n", channel);
	217	}
	218	break;
	219	case 2:
	220	if (!m_in_ior_2_cb.isnull())
	221	data = m_in_ior_2_cb((offs_t)m_address[channel]);
	222	else
	223	{
	224	data = 0;
	225	logerror("8257: No channel read function for channel %d defined.\n", channel);
	226	}
	227	break;
	228	case 3:
	229	if (!m_in_ior_3_cb.isnull())
	230	data = m_in_ior_3_cb((offs_t)m_address[channel]);
	231	else
	232	{
	233	data = 0;
	234	logerror("8257: No channel read function for channel %d defined.\n", channel);
	235	}
	236	break;
203	237	}
204		else
205		{
206		data = 0;
207		logerror("8257: No channel read function for channel %d defined.\n",channel);
208		}
209	238
210		if (!m_out_memw_func.isnull())
211		{
212		m_out_memw_func(m_address[channel], data);
213		}
	239	if (!m_out_memw_cb.isnull())
	240	m_out_memw_cb((offs_t)m_address[channel], data);
214	241	else
215		{
216	242	logerror("8257: No memory write function defined.\n");
217		}
	243
218	244	m_address[channel]++;
219	245	m_count[channel]--;
220		done = (m_count[channel] == 0xFFFF);
	246	done = (m_count[channel] == 0xffff);
221	247	break;
	248
222	249	case 0: /* verify */
223	250	m_address[channel]++;
224	251	m_count[channel]--;
225		done = (m_count[channel] == 0xFFFF);
	252	done = (m_count[channel] == 0xffff);
226	253	break;
	254
227	255	default:
228	256	fatalerror("i8257_do_operation: invalid mode!\n");
229	257	break;
230	258	}
	259
231	260	if (done)
232	261	{
233	262	if ((channel==2) && DMA_MODE_AUTOLOAD(m_mode))
r29557	r29558
238	267	m_registers[5] = m_registers[7];
239	268	}
240	269
241		m_out_tc_func(CLEAR_LINE);
	270	m_out_tc_cb(CLEAR_LINE);
242	271	}
243	272	return done;
244	273	}
r29557	r29558
337	366	}
338	367
339	368	/* set the halt line */
340		m_out_hrq_func(pending_transfer ? ASSERT_LINE : CLEAR_LINE);
	369	m_out_hrq_cb(pending_transfer ? ASSERT_LINE : CLEAR_LINE);
341	370	}
342	371
343	372

branches/new_menus/src/emu/machine/8257dma.h

r29557	r29558
40	40	#include "emu.h"
41	41
42	42
	43	#define I8257_NUM_CHANNELS      (4)
43	44
	45
44	46	/***************************************************************************
45	47	DEVICE CONFIGURATION MACROS
46	48	***************************************************************************/
47	49
48		#define MCFG_I8257_ADD(_tag, _clock, _config) \
49		MCFG_DEVICE_ADD(_tag, I8257, _clock) \
50		MCFG_DEVICE_CONFIG(_config)
	50	#define MCFG_I8257_OUT_HRQ_CB(_devcb) \
	51	devcb = &i8257_device::set_out_hrq_callback(*device, DEVCB2_##_devcb);
51	52
52		#define I8257_INTERFACE(_name) \
53		const i8257_interface (_name) =
	53	#define MCFG_I8257_OUT_TC_CB(_devcb) \
	54	devcb = &i8257_device::set_out_tc_callback(*device, DEVCB2_##_devcb);
54	55
55		#define I8257_NUM_CHANNELS      (4)
	56	#define MCFG_I8257_OUT_MARK_CB(_devcb) \
	57	devcb = &i8257_device::set_out_mark_callback(*device, DEVCB2_##_devcb);
56	58
57	59
58		/***************************************************************************
59		TYPE DEFINITIONS
60		***************************************************************************/
	60	#define MCFG_I8257_IN_MEMR_CB(_devcb) \
	61	devcb = &i8257_device::set_in_memr_callback(*device, DEVCB2_##_devcb);
61	62
	63	#define MCFG_I8257_OUT_MEMW_CB(_devcb) \
	64	devcb = &i8257_device::set_out_memw_callback(*device, DEVCB2_##_devcb);
62	65
63		// ======================> i8257_interface
64	66
65		struct i8257_interface
66		{
67		devcb_write_line    m_out_hrq_cb;
68		devcb_write_line    m_out_tc_cb;
69		devcb_write_line    m_out_mark_cb;
	67	#define MCFG_I8257_IN_IOR_0_CB(_devcb) \
	68	devcb = &i8257_device::set_in_ior_0_callback(*device, DEVCB2_##_devcb);
70	69
71		/* accessors to main memory */
72		devcb_read8         m_in_memr_cb; // TODO m_in_memr_cb[I8257_NUM_CHANNELS];
73		devcb_write8        m_out_memw_cb; // TODO m_out_memw_cb[I8257_NUM_CHANNELS];
	70	#define MCFG_I8257_IN_IOR_1_CB(_devcb) \
	71	devcb = &i8257_device::set_in_ior_1_callback(*device, DEVCB2_##_devcb);
74	72
75		/* channel accesors */
76		devcb_read8         m_in_ior_cb[I8257_NUM_CHANNELS];
77		devcb_write8        m_out_iow_cb[I8257_NUM_CHANNELS];
78		};
	73	#define MCFG_I8257_IN_IOR_2_CB(_devcb) \
	74	devcb = &i8257_device::set_in_ior_2_callback(*device, DEVCB2_##_devcb);
79	75
	76	#define MCFG_I8257_IN_IOR_3_CB(_devcb) \
	77	devcb = &i8257_device::set_in_ior_3_callback(*device, DEVCB2_##_devcb);
80	78
81	79
	80	#define MCFG_I8257_OUT_IOW_0_CB(_devcb) \
	81	devcb = &i8257_device::set_out_iow_0_callback(*device, DEVCB2_##_devcb);
	82
	83	#define MCFG_I8257_OUT_IOW_1_CB(_devcb) \
	84	devcb = &i8257_device::set_out_iow_1_callback(*device, DEVCB2_##_devcb);
	85
	86	#define MCFG_I8257_OUT_IOW_2_CB(_devcb) \
	87	devcb = &i8257_device::set_out_iow_2_callback(*device, DEVCB2_##_devcb);
	88
	89	#define MCFG_I8257_OUT_IOW_3_CB(_devcb) \
	90	devcb = &i8257_device::set_out_iow_3_callback(*device, DEVCB2_##_devcb);
	91
	92
	93	/***************************************************************************
	94	TYPE DEFINITIONS
	95	***************************************************************************/
	96
	97
82	98	// ======================> i8257_device
83	99
84		class i8257_device :  public device_t,
85		public i8257_interface
	100	class i8257_device :  public device_t
86	101	{
87	102	public:
88	103	// construction/destruction
89	104	i8257_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
90	105
	106	template<class _Object> static devcb2_base &set_out_hrq_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_hrq_cb.set_callback(object); }
	107	template<class _Object> static devcb2_base &set_out_tc_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_tc_cb.set_callback(object); }
	108	template<class _Object> static devcb2_base &set_out_mark_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_mark_cb.set_callback(object); }
	109
	110	template<class _Object> static devcb2_base &set_in_memr_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_memr_cb.set_callback(object); }
	111	template<class _Object> static devcb2_base &set_out_memw_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_memw_cb.set_callback(object); }
	112
	113	template<class _Object> static devcb2_base &set_in_ior_0_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_0_cb.set_callback(object); }
	114	template<class _Object> static devcb2_base &set_in_ior_1_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_1_cb.set_callback(object); }
	115	template<class _Object> static devcb2_base &set_in_ior_2_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_2_cb.set_callback(object); }
	116	template<class _Object> static devcb2_base &set_in_ior_3_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_in_ior_3_cb.set_callback(object); }
	117
	118	template<class _Object> static devcb2_base &set_out_iow_0_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_0_cb.set_callback(object); }
	119	template<class _Object> static devcb2_base &set_out_iow_1_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_1_cb.set_callback(object); }
	120	template<class _Object> static devcb2_base &set_out_iow_2_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_2_cb.set_callback(object); }
	121	template<class _Object> static devcb2_base &set_out_iow_3_callback(device_t &device, _Object object) { return downcast<i8257_device &>(device).m_out_iow_3_cb.set_callback(object); }
	122
91	123	/* register access */
92	124	DECLARE_READ8_MEMBER( i8257_r );
93	125	DECLARE_WRITE8_MEMBER( i8257_w );
r29557	r29558
107	139
108	140	protected:
109	141	// device-level overrides
110		virtual void device_config_complete();
111	142	virtual void device_start();
112	143	virtual void device_reset();
113	144	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
r29557	r29558
121	152	void i8257_update_status();
122	153	void i8257_prepare_msb_flip();
123	154
124		devcb_resolved_write_line   m_out_hrq_func;
125		devcb_resolved_write_line   m_out_tc_func;
126		devcb_resolved_write_line   m_out_mark_func;
127		devcb_resolved_read8        m_in_memr_func;
128		devcb_resolved_write8       m_out_memw_func;
129		devcb_resolved_read8        m_in_ior_func[I8257_NUM_CHANNELS];
130		devcb_resolved_write8       m_out_iow_func[I8257_NUM_CHANNELS];
	155	devcb2_write_line   m_out_hrq_cb;
	156	devcb2_write_line   m_out_tc_cb;
	157	devcb2_write_line   m_out_mark_cb;
131	158
	159	/* accessors to main memory */
	160	devcb2_read8        m_in_memr_cb;
	161	devcb2_write8       m_out_memw_cb;
	162
	163	/* channel accesors */
	164	devcb2_read8        m_in_ior_0_cb;
	165	devcb2_read8        m_in_ior_1_cb;
	166	devcb2_read8        m_in_ior_2_cb;
	167	devcb2_read8        m_in_ior_3_cb;
	168	devcb2_write8       m_out_iow_0_cb;
	169	devcb2_write8       m_out_iow_1_cb;
	170	devcb2_write8       m_out_iow_2_cb;
	171	devcb2_write8       m_out_iow_3_cb;
	172
132	173	emu_timer *m_timer;
133	174	emu_timer *m_msbflip_timer;
134	175

branches/new_menus/src/emu/machine/roc10937.c

r29557	r29558
95	95	//                     -.
96	96	0x2001, // 0010 0000 0000 0001 -
97	97	//                     /.
98		0x2430, // 0010 0010 0011 0000 <.
	98	0x2230, // 0010 0010 0011 0000 <.
99	99	0x4430, // 0100 0100 0011 0000 =.
100	100	0x8830, // 1000 1000 0011 0000 >.
101	101	0x1407, // 0001 0100 0000 0111 ?.
r29557	r29558
150	150	save_item(NAME(m_outputs));
151	151	save_item(NAME(m_brightness));
152	152	save_item(NAME(m_count));
	153	save_item(NAME(m_sclk));
	154	save_item(NAME(m_data));
153	155	save_item(NAME(m_duty));
154	156	save_item(NAME(m_disp));
155	157
r29557	r29558
168	170	m_count=0;
169	171	m_duty=31;
170	172	m_disp = 0;
	173	m_sclk = 0;
	174	m_data = 0;
171	175
172	176	memset(m_chars, 0, sizeof(m_chars));
173	177	memset(m_outputs, 0, sizeof(m_outputs));
r29557	r29558
183	187	///////////////////////////////////////////////////////////////////////////
184	188	void rocvfd_t::device_post_load()
185	189	{
	190	update_display();
	191	}
	192
	193	void rocvfd_t::update_display()
	194	{
186	195	for (int i =0; i<16; i++)
187	196	{
	197	m_outputs[i] = set_display(m_chars[i]);
188	198	output_set_indexed_value("vfd", (m_port_val*16) + i, m_outputs[i]);
189	199	}
190	200	}
191	201
192		//Display on Rockwell chips is naturally backwards, due to the way it is wired. We emulate this by flipping the display at update time
193		void rocvfd_t::update_display()
	202	WRITE_LINE_MEMBER( rocvfd_t::sclk )
	203	{
	204	shift_clock(state);
	205	}
	206
	207	WRITE_LINE_MEMBER( rocvfd_t::data )
	208	{
	209	m_data = state;
	210	}
	211
	212	WRITE_LINE_MEMBER( rocvfd_t::por )
194	213	{
195		for (int i =0; i<16; i++)
	214	//If line goes low, reset mode is engaged, until such a time as it goes high again.
	215	if (!state)
196	216	{
197		m_outputs[i] = set_display(m_chars[15-i]);
198		output_set_indexed_value("vfd", (m_port_val*16) + i, m_outputs[i]);
	217	reset();
199	218	}
200	219	}
201	220
202		void rocvfd_t::shift_data(int data)
	221
	222	void rocvfd_t::shift_clock(int state)
203	223	{
204		m_shift_data <<= 1;
	224	if (m_sclk != state)
	225	{
	226	//Clock data on FALLING edge
	227	if (!m_sclk)
	228	{
	229	m_shift_data <<= 1;
205	230
206		if ( !data ) m_shift_data |= 1;
	231	if ( m_data ) m_shift_data |= 1;
207	232
208		if ( ++m_shift_count >= 8 )
209		{
210		write_char(m_shift_data);
211		m_shift_count = 0;
212		m_shift_data  = 0;
	233	if ( ++m_shift_count >= 8 )
	234	{
	235	write_char(m_shift_data);
	236	m_shift_count = 0;
	237	m_shift_data  = 0;
	238	}
	239	update_display();
	240
	241	}
213	242	}
214		update_display();
	243	m_sclk = state;
215	244	}
216	245
217	246	///////////////////////////////////////////////////////////////////////////
r29557	r29558
355	384	{
356	385	m_port_val=0;
357	386	}
358
359		//Samsung chips fix the issue with the reversal of the drive.
360		void s16lf01_t::update_display()
361		{
362		for (int i =0; i<16; i++)
363		{
364		m_outputs[i] = set_display(m_chars[i]);
365		output_set_indexed_value("vfd", (m_port_val*16) + i, m_outputs[i]);
366		}
367		}

branches/new_menus/src/emu/machine/roc10937.h

r29557	r29558
54	54	virtual void update_display();
55	55	UINT8   m_port_val;
56	56	void blank(int data);
57		void shift_data(int data);
	57	void shift_clock(int data);
58	58	void write_char(int data);
59	59	void setdata(int segdata, int data);
60	60	UINT32 set_display(UINT32 segin);
	61	DECLARE_WRITE_LINE_MEMBER( sclk );
	62	DECLARE_WRITE_LINE_MEMBER( data );
	63	DECLARE_WRITE_LINE_MEMBER( por );
61	64
62	65
63	66	protected:
r29557	r29558
68	71	int m_pcursor_pos;
69	72	int m_brightness;
70	73	int m_count;
	74	int m_data;
71	75	int m_duty;
72	76	int m_disp;
	77	int m_sclk;
73	78	UINT8 m_cursor;
74	79	UINT32 m_chars[16];
75	80	UINT32 m_outputs[16];
r29557	r29558
109	114	class s16lf01_t : public rocvfd_t {
110	115	public:
111	116	s16lf01_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
112
113		virtual void update_display();
114	117	protected:
115	118
116	119	};

branches/new_menus/src/emu/machine/8042kbdc.c

r29557	r29558
197	197	kbdc8042_device::kbdc8042_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
198	198	: device_t(mconfig, KBDC8042, "Keyboard Controller 8042", tag, owner, clock, "kbdc8042", __FILE__)
199	199	, m_keyboard_dev(*this, "at_keyboard")
	200	, m_system_reset_cb(*this)
	201	, m_gate_a20_cb(*this)
	202	, m_input_buffer_full_cb(*this)
	203	, m_output_buffer_empty_cb(*this)
	204	, m_speaker_cb(*this)
200	205	{
201	206	}
202	207
r29557	r29558
209	214	return MACHINE_CONFIG_NAME( keyboard );
210	215	}
211	216
212		//-------------------------------------------------
213		//  device_config_complete - perform any
214		//  operations now that the configuration is
215		//  complete
216		//-------------------------------------------------
217
218		void kbdc8042_device::device_config_complete()
219		{
220		// inherit a copy of the static data
221		const kbdc8042_interface *intf = reinterpret_cast<const kbdc8042_interface *>(static_config());
222
223		if (intf != NULL)
224		{
225		*static_cast<kbdc8042_interface *>(this) = *intf;
226		}
227
228		// or initialize to defaults if none provided
229		else
230		{
231		memset(&m_system_reset_cb, 0, sizeof(m_system_reset_cb));
232		memset(&m_gate_a20_cb, 0, sizeof(m_gate_a20_cb));
233		memset(&m_input_buffer_full_func, 0, sizeof(m_input_buffer_full_func));
234		memset(&m_output_buffer_empty_cb, 0, sizeof(m_output_buffer_empty_cb));
235		memset(&m_speaker_cb, 0, sizeof(m_speaker_cb));
236		}
237		}
238
239	217	/*-------------------------------------------------
240	218	device_start - device-specific startup
241	219	-------------------------------------------------*/
r29557	r29558
243	221	void kbdc8042_device::device_start()
244	222	{
245	223	// resolve callbacks
246		m_system_reset_func.resolve(m_system_reset_cb, *this);
247		m_gate_a20_func.resolve(m_gate_a20_cb, *this);
248		m_input_buffer_full_func.resolve(m_input_buffer_full_cb, *this);
249		m_output_buffer_empty_func.resolve(m_output_buffer_empty_cb, *this);
250		m_speaker_func.resolve(m_speaker_cb, *this);
	224	m_system_reset_cb.resolve_safe();
	225	m_gate_a20_cb.resolve();
	226	m_input_buffer_full_cb.resolve();
	227	m_output_buffer_empty_cb.resolve_safe();
	228	m_speaker_cb.resolve();
251	229	m_operation_write_state = 0; /* first write to 0x60 might occur before anything can set this */
252	230	}
253	231
r29557	r29558
271	249	m_outport = data;
272	250	if (change & 0x02)
273	251	{
274		if (!m_gate_a20_func.isnull())
275		m_gate_a20_func(data & 0x02 ? 1 : 0);
	252	if (!m_gate_a20_cb.isnull())
	253	m_gate_a20_cb(data & 0x02 ? 1 : 0);
276	254	}
277	255	}
278	256
r29557	r29558
286	264	{
287	265	/* Lets 8952's timers do their job before clear the interrupt line, */
288	266	/* else Keyboard interrupt never happens. */
289		m_input_buffer_full_func(0);
	267	m_input_buffer_full_cb(0);
290	268	}
291	269
292	270	void kbdc8042_device::at_8042_receive(UINT8 data)
r29557	r29558
297	275	m_data = data;
298	276	m_keyboard.received = 1;
299	277
300		if (!m_input_buffer_full_func.isnull())
	278	if (!m_input_buffer_full_cb.isnull())
301	279	{
302		m_input_buffer_full_func(1);
	280	m_input_buffer_full_cb(1);
303	281	/* Lets 8952's timers do their job before clear the interrupt line, */
304	282	/* else Keyboard interrupt never happens. */
305	283	machine().scheduler().timer_set(attotime::from_usec(2), timer_expired_delegate(FUNC(kbdc8042_device::kbdc8042_clr_int),this));
r29557	r29558
515	493
516	494	case 1:
517	495	m_speaker = data;
518		if (!m_speaker_func.isnull())
519		m_speaker_func(0, m_speaker);
	496	if (!m_speaker_cb.isnull())
	497	m_speaker_cb((offs_t)0, m_speaker);
520	498
521	499	break;
522	500
r29557	r29558
617	595	* the bits low set in the command byte.  The only pulse that has
618	596	* an effect currently is bit 0, which pulses the CPU's reset line
619	597	*/
620		m_system_reset_func(PULSE_LINE);
	598	m_system_reset_cb(PULSE_LINE);
621	599	at_8042_set_outport(m_outport | 0x02, 0);
622	600	break;
623	601	}

branches/new_menus/src/emu/machine/8042kbdc.h

r29557	r29558
24	24	//  INTERFACE CONFIGURATION MACROS
25	25	//**************************************************************************
26	26
27		#define MCFG_KBDC8042_ADD(_tag, _interface) \
28		MCFG_DEVICE_ADD(_tag, KBDC8042, 0) \
29		MCFG_DEVICE_CONFIG(_interface)
	27	#define MCFG_KBDC8042_KEYBOARD_TYPE(_kbdt) \
	28	kbdc8042_device::set_keyboard_type(*device, _kbdt);
30	29
	30	#define MCFG_KBDC8042_SYSTEM_RESET_CB(_devcb) \
	31	devcb = &kbdc8042_device::set_system_reset_callback(*device, DEVCB2_##_devcb);
31	32
	33	#define MCFG_KBDC8042_GATE_A20_CB(_devcb) \
	34	devcb = &kbdc8042_device::set_gate_a20_callback(*device, DEVCB2_##_devcb);
	35
	36	#define MCFG_KBDC8042_INPUT_BUFFER_FULL_CB(_devcb) \
	37	devcb = &kbdc8042_device::set_input_buffer_full_callback(*device, DEVCB2_##_devcb);
	38
	39	#define MCFG_KBDC8042_OUTPUT_BUFFER_EMPTY_CB(_devcb) \
	40	devcb = &kbdc8042_device::set_output_buffer_empty_callback(*device, DEVCB2_##_devcb);
	41
	42	#define MCFG_KBDC8042_SPEAKER_CB(_devcb) \
	43	devcb = &kbdc8042_device::set_speaker_callback(*device, DEVCB2_##_devcb);
	44
32	45	//**************************************************************************
33	46	//  TYPE DEFINITIONS
34	47	//**************************************************************************
35	48
36		// ======================> kbdc8042_interface
37
38		struct kbdc8042_interface
39		{
40		kbdc8042_type_t     m_keybtype;
41		// interface to the host pc
42		devcb_write_line    m_system_reset_cb;
43		devcb_write_line    m_gate_a20_cb;
44		devcb_write_line    m_input_buffer_full_cb;
45		devcb_write_line    m_output_buffer_empty_cb;
46
47		devcb_write8        m_speaker_cb;
48		};
49
50	49	// ======================> kbdc8042_device
51	50
52		class kbdc8042_device : public device_t,
53		public kbdc8042_interface
	51	class kbdc8042_device : public device_t
54	52	{
55	53	public:
56	54	// construction/destruction
57	55	kbdc8042_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
58	56
59	57	virtual machine_config_constructor device_mconfig_additions() const;
	58
	59	static void set_keyboard_type(device_t &device, kbdc8042_type_t keybtype) { downcast<kbdc8042_device &>(device).m_keybtype = keybtype; }
	60	template<class _Object> static devcb2_base &set_system_reset_callback(device_t &device, _Object object) { return downcast<kbdc8042_device &>(device).m_system_reset_cb.set_callback(object); }
	61	template<class _Object> static devcb2_base &set_gate_a20_callback(device_t &device, _Object object) { return downcast<kbdc8042_device &>(device).m_gate_a20_cb.set_callback(object); }
	62	template<class _Object> static devcb2_base &set_input_buffer_full_callback(device_t &device, _Object object) { return downcast<kbdc8042_device &>(device).m_input_buffer_full_cb.set_callback(object); }
	63	template<class _Object> static devcb2_base &set_output_buffer_empty_callback(device_t &device, _Object object) { return downcast<kbdc8042_device &>(device).m_output_buffer_empty_cb.set_callback(object); }
	64	template<class _Object> static devcb2_base &set_speaker_callback(device_t &device, _Object object) { return downcast<kbdc8042_device &>(device).m_speaker_cb.set_callback(object); }
60	65
61	66	DECLARE_READ8_MEMBER( data_r );
62	67	DECLARE_WRITE8_MEMBER( data_w );
r29557	r29558
74	79	// device-level overrides
75	80	virtual void device_start();
76	81	virtual void device_reset();
77		virtual void device_config_complete();
78	82
79	83	UINT8 m_inport, m_outport, m_data, m_command;
80	84
r29557	r29558
104	108
105	109	required_device<at_keyboard_device> m_keyboard_dev;
106	110
107		devcb_resolved_write_line   m_system_reset_func;
108		devcb_resolved_write_line   m_gate_a20_func;
109		devcb_resolved_write_line   m_input_buffer_full_func;
110		devcb_resolved_write_line   m_output_buffer_empty_func;
	111	kbdc8042_type_t     m_keybtype;
	112
	113	devcb2_write_line    m_system_reset_cb;
	114	devcb2_write_line    m_gate_a20_cb;
	115	devcb2_write_line    m_input_buffer_full_cb;
	116	devcb2_write_line    m_output_buffer_empty_cb;
111	117
112		devcb_resolved_write8       m_speaker_func;
	118	devcb2_write8        m_speaker_cb;
113	119	};
114	120
115	121	// device type definition

branches/new_menus/src/emu/bus/centronics/image.c

r29557	r29558
8	8	// device type definition
9	9	const device_type CENTRONICS_PRINTER_IMAGE = &device_creator<centronics_printer_image_device>;
10	10
11		/*****************************************************************************
12		PRINTER INTERFACE
13		*****************************************************************************/
14		const struct printer_interface centronics_printer_config =
15		{
16		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, centronics_printer_image_device, printer_online)
17		};
18	11
19	12	static MACHINE_CONFIG_FRAGMENT( centronics_printer )
20		MCFG_PRINTER_ADD("printer")
21		MCFG_DEVICE_CONFIG(centronics_printer_config)
	13	MCFG_DEVICE_ADD("printer", PRINTER, 0)
	14	MCFG_PRINTER_ONLINE_CB(WRITELINE(centronics_printer_image_device, printer_online))
22	15	MACHINE_CONFIG_END
23	16
24	17

branches/new_menus/src/emu/bus/midi/midiinport.c

r29557	r29558
17	17	{
18	18	}
19	19
20		static midiin_config midiin_port_image_config =
21		{
22		DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midiin_port_device, read)
23		};
24
25	20	static MACHINE_CONFIG_FRAGMENT(midiin_port_config)
26		MCFG_MIDIIN_ADD("midiinimg", midiin_port_image_config)
	21	MCFG_DEVICE_ADD("midiinimg", MIDIIN, 0)
	22	MCFG_MIDIIN_INPUT_CB(WRITELINE(midiin_port_device, read))
27	23	MACHINE_CONFIG_END
28	24
29	25	machine_config_constructor midiin_port_device::device_mconfig_additions() const

branches/new_menus/src/emu/bus/iq151/staper.c

r29557	r29558
34	34	static MACHINE_CONFIG_FRAGMENT( iq151_staper )
35	35	MCFG_I8255A_ADD("ppi8255", iq151_staper_ppi_intf)
36	36
37		MCFG_PRINTER_ADD("printer")
	37	MCFG_DEVICE_ADD("printer", PRINTER, 0)
38	38	MACHINE_CONFIG_END
39	39
40	40	//**************************************************************************

branches/new_menus/src/emu/imagedev/midiin.c

r29557	r29558
22	22	midiin_device::midiin_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
23	23	: device_t(mconfig, MIDIIN, "MIDI In image device", tag, owner, clock, "midiin", __FILE__),
24	24	device_image_interface(mconfig, *this),
25		device_serial_interface(mconfig, *this)
	25	device_serial_interface(mconfig, *this),
	26	m_input_cb(*this)
26	27	{
27	28	}
28	29
r29557	r29558
32	33
33	34	void midiin_device::device_start()
34	35	{
35		m_input_func.resolve(m_input_callback, *this);
	36	m_input_cb.resolve_safe();
36	37	m_timer = timer_alloc(0);
37	38	m_midi = NULL;
38	39	m_timer->enable(false);
r29557	r29558
55	56
56	57	void midiin_device::device_config_complete(void)
57	58	{
58		const midiin_config *intf = reinterpret_cast<const midiin_config *>(static_config());
59		if(intf != NULL)
60		{
61		*static_cast<midiin_config *>(this) = *intf;
62		}
63		else
64		{
65		memset(&m_input_callback, 0, sizeof(m_input_callback));
66		}
67	59	update_names();
68	60	}
69	61
r29557	r29558
152	144	void midiin_device::tra_callback()
153	145	{
154	146	int bit = transmit_register_get_data_bit();
155		m_input_func(bit);
	147	m_input_cb(bit);
156	148	}
157	149
158	150	void midiin_device::xmit_char(UINT8 data)

branches/new_menus/src/emu/imagedev/midiin.h

r29557	r29558
10	10	#define __MIDIIN_H__
11	11
12	12
13		/***************************************************************************
14		CONSTANTS
15		***************************************************************************/
	13	#define MCFG_MIDIIN_INPUT_CB(_devcb) \
	14	devcb = &midiin_device::set_input_callback(*device, DEVCB2_##_devcb);
16	15
17		struct midiin_config
18		{
19		/* callback to driver */
20		devcb_write_line        m_input_callback;
21		};
22	16
23		#define MCFG_MIDIIN_ADD(_tag, _config) \
24		MCFG_DEVICE_ADD(_tag, MIDIIN, 0) \
25		MCFG_DEVICE_CONFIG(_config)
26
27
28	17	/***************************************************************************
29	18	TYPE DEFINITIONS
30	19	***************************************************************************/
31	20
32	21	class midiin_device :    public device_t,
33	22	public device_image_interface,
34		public device_serial_interface,
35		public midiin_config
	23	public device_serial_interface
36	24	{
37	25	public:
38	26	// construction/destruction
39	27	midiin_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
40	28
	29	template<class _Object> static devcb2_base &set_input_callback(device_t &device, _Object object) { return downcast<midiin_device &>(device).m_input_cb.set_callback(object); }
	30
41	31	// image-level overrides
42	32	virtual bool call_load();
43	33	virtual void call_unload();
r29557	r29558
72	62
73	63	osd_midi_device *m_midi;
74	64	emu_timer *m_timer;
75		devcb_resolved_write_line m_input_func;
	65	devcb2_write_line        m_input_cb;
76	66	UINT8 m_xmitring[XMIT_RING_SIZE];
77	67	int m_xmit_read, m_xmit_write;
78	68	bool m_tx_busy;

branches/new_menus/src/emu/imagedev/printer.c

r29557	r29558
19	19
20	20	printer_image_device::printer_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
21	21	: device_t(mconfig, PRINTER, "Printer", tag, owner, clock, "printer_image", __FILE__),
22		device_image_interface(mconfig, *this)
	22	device_image_interface(mconfig, *this),
	23	m_online_cb(*this)
23	24	{
24	25	}
25	26
r29557	r29558
39	40
40	41	void printer_image_device::device_config_complete()
41	42	{
42		// inherit a copy of the static data
43		const printer_interface *intf = reinterpret_cast<const printer_interface *>(static_config());
44		if (intf != NULL)
45		*static_cast<printer_interface *>(this) = *intf;
46
47		// or initialize to defaults if none provided
48		else
49		{
50		memset(&m_online, 0, sizeof(m_online));
51		}
52
53	43	// set brief and instance name
54	44	update_names();
55	45	}
r29557	r29558
61	51
62	52	void printer_image_device::device_start()
63	53	{
64		m_online_func.resolve(m_online, *this);
	54	m_online_cb.resolve();
65	55	}
66	56
67	57	/***************************************************************************
r29557	r29558
107	97	bool printer_image_device::call_load()
108	98	{
109	99	/* send notify that the printer is now online */
110		if (!m_online_func.isnull())
111		m_online_func(TRUE);
	100	if (!m_online_cb.isnull())
	101	m_online_cb(TRUE);
112	102
113	103	/* we don't need to do anything special */
114	104	return IMAGE_INIT_PASS;
r29557	r29558
121	111	void printer_image_device::call_unload()
122	112	{
123	113	/* send notify that the printer is now offline */
124		if (!m_online_func.isnull())
125		m_online_func(FALSE);
	114	if (!m_online_cb.isnull())
	115	m_online_cb(FALSE);
126	116	}

branches/new_menus/src/emu/imagedev/printer.h

r29557	r29558
10	10	#define __PRINTER_H__
11	11
12	12
	13	#define MCFG_PRINTER_ONLINE_CB(_devcb) \
	14	devcb = &printer_image_device::set_online_callback(*device, DEVCB2_##_devcb);
	15
	16
13	17	/***************************************************************************
14	18	TYPE DEFINITIONS
15	19	***************************************************************************/
16	20
17		// ======================> printer_interface
18
19		struct printer_interface
20		{
21		devcb_write_line m_online;
22		};
23
24	21	// ======================> printer_image_device
25	22
26	23	class printer_image_device :    public device_t,
27		public printer_interface,
28	24	public device_image_interface
29	25	{
30	26	public:
31	27	// construction/destruction
32	28	printer_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
33	29	virtual ~printer_image_device();
	30
	31	template<class _Object> static devcb2_base &set_online_callback(device_t &device, _Object object) { return downcast<printer_image_device &>(device).m_online_cb.set_callback(object); }
34	32
35	33	// image-level overrides
36	34	virtual bool call_load();
r29557	r29558
56	54	void output(UINT8 data);
57	55	protected:
58	56	// device-level overrides
59		virtual void device_config_complete();
60	57	virtual void device_start();
	58	virtual void device_config_complete();
61	59
62		devcb_resolved_write_line m_online_func;
	60	devcb2_write_line m_online_cb;
63	61	};
64	62
65	63
66	64	// device type definition
67	65	extern const device_type PRINTER;
68	66
69
70		#define MCFG_PRINTER_ADD(_tag) \
71		MCFG_DEVICE_ADD(_tag, PRINTER, 0)
72	67	#endif /* __PRINTER_H__ */

branches/new_menus/src/lib/util/corefile.c

r29557	r29558
410	410	file->back_char_tail = 0;
411	411
412	412	/* handle real files */
413		if (file->data == NULL)
	413	if (file->length && file->data == NULL)
414	414	{
415	415	/* if we're within the buffer, consume that first */
416	416	if (file->offset >= file->bufferbase && file->offset < file->bufferbase + file->bufferbytes)
r29557	r29558
657	657	UINT32 read_length;
658	658
659	659	/* if we already have data, just return it */
660		if (file->data != NULL)
	660	if (file->data != NULL || !file->length)
661	661	return file->data;
662	662
663	663	/* allocate some memory */

branches/new_menus/src/mess/drivers/interact.c

r29557	r29558
176	176	MCFG_SOFTWARE_LIST_ADD("cass_list","interact")
177	177
178	178	/* printer */
179		MCFG_PRINTER_ADD("printer")
	179	MCFG_DEVICE_ADD("printer", PRINTER, 0)
180	180
181	181	MACHINE_CONFIG_END
182	182
r29557	r29558
218	218	MCFG_CASSETTE_ADD( "cassette", interact_cassette_interface )
219	219
220	220	/* printer */
221		MCFG_PRINTER_ADD("printer")
	221	MCFG_DEVICE_ADD("printer", PRINTER, 0)
222	222
223	223	MACHINE_CONFIG_END
224	224

branches/new_menus/src/mess/drivers/pc8001.c

r29557	r29558
444	444	program.write_byte(offset, data);
445	445	}
446	446
447		static I8257_INTERFACE( dmac_intf )
448		{
449		DEVCB_DRIVER_LINE_MEMBER(pc8001_state, hrq_w),
450		DEVCB_NULL,
451		DEVCB_NULL,
452		DEVCB_NULL,
453		DEVCB_DRIVER_MEMBER(pc8001_state, dma_mem_w),
454		{ DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_r), DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_r), DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_r), DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_r) },
455		{ DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_w), DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_w), DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_w), DEVCB_DRIVER_MEMBER(pc8001_state, dma_io_w) },
456		};
457	447
458	448	/* Machine Initialization */
459	449
r29557	r29558
545	535	MCFG_DEVICE_ADD(I8251_TAG, I8251, 0)
546	536
547	537	MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
548		MCFG_I8257_ADD(I8257_TAG, 4000000, dmac_intf)
	538
	539	MCFG_DEVICE_ADD(I8257_TAG, I8257, 4000000)
	540	MCFG_I8257_OUT_HRQ_CB(WRITELINE(pc8001_state, hrq_w))
	541	MCFG_I8257_OUT_MEMW_CB(WRITE8(pc8001_state, dma_mem_w))
	542	MCFG_I8257_IN_IOR_0_CB(READ8(pc8001_state, dma_io_r))
	543	MCFG_I8257_IN_IOR_1_CB(READ8(pc8001_state, dma_io_r))
	544	MCFG_I8257_IN_IOR_2_CB(READ8(pc8001_state, dma_io_r))
	545	MCFG_I8257_IN_IOR_3_CB(READ8(pc8001_state, dma_io_r))
	546	MCFG_I8257_OUT_IOW_0_CB(WRITE8(pc8001_state, dma_io_w))
	547	MCFG_I8257_OUT_IOW_1_CB(WRITE8(pc8001_state, dma_io_w))
	548	MCFG_I8257_OUT_IOW_2_CB(WRITE8(pc8001_state, dma_io_w))
	549	MCFG_I8257_OUT_IOW_3_CB(WRITE8(pc8001_state, dma_io_w))
	550
549	551	MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, NULL, NULL)
550	552
551	553	MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, 14318180)
r29557	r29558
589	591	MCFG_DEVICE_ADD(I8251_TAG, I8251, 0)
590	592
591	593	MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
592		MCFG_I8257_ADD(I8257_TAG, 4000000, dmac_intf)
	594
	595	MCFG_DEVICE_ADD(I8257_TAG, I8257, 4000000)
	596	MCFG_I8257_OUT_HRQ_CB(WRITELINE(pc8001_state, hrq_w))
	597	MCFG_I8257_OUT_MEMW_CB(WRITE8(pc8001_state, dma_mem_w))
	598	MCFG_I8257_IN_IOR_0_CB(READ8(pc8001_state, dma_io_r))
	599	MCFG_I8257_IN_IOR_1_CB(READ8(pc8001_state, dma_io_r))
	600	MCFG_I8257_IN_IOR_2_CB(READ8(pc8001_state, dma_io_r))
	601	MCFG_I8257_IN_IOR_3_CB(READ8(pc8001_state, dma_io_r))
	602	MCFG_I8257_OUT_IOW_0_CB(WRITE8(pc8001_state, dma_io_w))
	603	MCFG_I8257_OUT_IOW_1_CB(WRITE8(pc8001_state, dma_io_w))
	604	MCFG_I8257_OUT_IOW_2_CB(WRITE8(pc8001_state, dma_io_w))
	605	MCFG_I8257_OUT_IOW_3_CB(WRITE8(pc8001_state, dma_io_w))
	606
593	607	MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, NULL, NULL)
594	608
595	609	MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, 14318180)

branches/new_menus/src/mess/drivers/partner.c

r29557	r29558
215	215	MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
216	216	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
217	217
218		MCFG_I8257_ADD("dma8257", XTAL_16MHz / 9, partner_dma)
	218	MCFG_DEVICE_ADD("dma8257", I8257, XTAL_16MHz / 9)
	219	MCFG_I8257_OUT_HRQ_CB(WRITELINE(partner_state, hrq_w))
	220	MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte))
	221	MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte))
	222	MCFG_I8257_IN_IOR_0_CB(READ8(partner_state, partner_fdc_r))
	223	MCFG_I8257_OUT_IOW_0_CB(WRITE8(partner_state, partner_fdc_w))
	224	MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8("i8275", i8275_device, dack_w))
219	225
220	226	MCFG_CASSETTE_ADD( "cassette", partner_cassette_interface )
221	227	MCFG_SOFTWARE_LIST_ADD("cass_list","partner_cass")

branches/new_menus/src/mess/drivers/hec2hrp.c

r29557	r29558
466	466	MCFG_CASSETTE_ADD( "cassette", hector_cassette_interface )
467	467
468	468	/* printer */
469		MCFG_PRINTER_ADD("printer")
	469	MCFG_DEVICE_ADD("printer", PRINTER, 0)
470	470
471	471	MACHINE_CONFIG_END
472	472
r29557	r29558
510	510	MCFG_CASSETTE_ADD( "cassette", hector_cassette_interface )
511	511
512	512	/* printer */
513		MCFG_PRINTER_ADD("printer")
	513	MCFG_DEVICE_ADD("printer", PRINTER, 0)
514	514
515	515	MACHINE_CONFIG_END
516	516
r29557	r29558
568	568	MCFG_CASSETTE_ADD( "cassette", hector_cassette_interface )
569	569
570	570	/* printer */
571		MCFG_PRINTER_ADD("printer")
	571	MCFG_DEVICE_ADD("printer", PRINTER, 0)
572	572
573	573	MACHINE_CONFIG_END
574	574	/*****************************************************************************/
r29557	r29558
621	621	MCFG_CASSETTE_ADD( "cassette", hector_cassette_interface )
622	622
623	623	/* printer */
624		MCFG_PRINTER_ADD("printer")
	624	MCFG_DEVICE_ADD("printer", PRINTER, 0)
625	625
626	626	MACHINE_CONFIG_END
627	627	/*****************************************************************************/
r29557	r29558
670	670	MCFG_CASSETTE_ADD( "cassette", hector_cassette_interface )
671	671
672	672	/* printer */
673		MCFG_PRINTER_ADD("printer")
	673	MCFG_DEVICE_ADD("printer", PRINTER, 0)
674	674
675	675	MACHINE_CONFIG_END
676	676
r29557	r29558
724	724	MCFG_CASSETTE_ADD( "cassette", hector_cassette_interface )
725	725
726	726	/* printer */
727		MCFG_PRINTER_ADD("printer")
	727	MCFG_DEVICE_ADD("printer", PRINTER, 0)
728	728
729	729	MACHINE_CONFIG_END
730	730

branches/new_menus/src/mess/drivers/bebox.c

r29557	r29558
21	21	#include "bus/pci/pci.h"
22	22	#include "machine/am9517a.h"
23	23	#include "machine/pckeybrd.h"
24		#include "machine/8042kbdc.h"
25	24	#include "machine/idectrl.h"
26	25	#include "bus/pci/mpc105.h"
27	26	#include "machine/intelfsh.h"
r29557	r29558
155	154	m_pic8259_1->ir1_w(state);
156	155	}
157	156
158		static const struct kbdc8042_interface bebox_8042_interface =
159		{
160		KBDC8042_STANDARD,
161		DEVCB_CPU_INPUT_LINE("ppc1", INPUT_LINE_RESET),
162		DEVCB_NULL,
163		DEVCB_DRIVER_LINE_MEMBER(bebox_state,bebox_keyboard_interrupt),
164		DEVCB_NULL,
165
166		DEVCB_NULL
167		};
168
169	157	static SLOT_INTERFACE_START( pci_devices )
170	158	SLOT_INTERFACE_INTERNAL("mpc105", MPC105)
171	159	SLOT_INTERFACE("cirrus", CIRRUS)
r29557	r29558
235	223
236	224	MCFG_MC146818_ADD( "rtc", XTAL_32_768kHz )
237	225
238		MCFG_KBDC8042_ADD("kbdc", bebox_8042_interface)
	226	MCFG_DEVICE_ADD("kbdc", KBDC8042, 0)
	227	MCFG_KBDC8042_KEYBOARD_TYPE(KBDC8042_STANDARD)
	228	MCFG_KBDC8042_SYSTEM_RESET_CB(INPUTLINE("ppc1", INPUT_LINE_RESET))
	229	MCFG_KBDC8042_INPUT_BUFFER_FULL_CB(WRITELINE(bebox_state, bebox_keyboard_interrupt))
	230
239	231	/* internal ram */
240	232	MCFG_RAM_ADD(RAM_TAG)
241	233	MCFG_RAM_DEFAULT_SIZE("32M")

branches/new_menus/src/mess/drivers/apogee.c

r29557	r29558
237	237	MCFG_SOUND_CONFIG(apogee_speaker_interface)
238	238	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
239	239
240		MCFG_I8257_ADD("dma8257", XTAL_16MHz / 9, radio86_dma)
	240	MCFG_DEVICE_ADD("dma8257", I8257, XTAL_16MHz / 9)
	241	MCFG_I8257_OUT_HRQ_CB(WRITELINE(radio86_state, hrq_w))
	242	MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte))
	243	MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte))
	244	MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8("i8275", i8275_device, dack_w))
241	245
242	246	MCFG_CASSETTE_ADD( "cassette", apogee_cassette_interface )
243	247	MCFG_SOFTWARE_LIST_ADD("cass_list","apogee")

branches/new_menus/src/mess/drivers/radio86.c

r29557	r29558
372	372	MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
373	373	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
374	374
375		MCFG_I8257_ADD("dma8257", XTAL_16MHz / 9, radio86_dma)
	375	MCFG_DEVICE_ADD("dma8257", I8257, XTAL_16MHz / 9)
	376	MCFG_I8257_OUT_HRQ_CB(WRITELINE(radio86_state, hrq_w))
	377	MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte))
	378	MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte))
	379	MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8("i8275", i8275_device, dack_w))
376	380
377	381	MCFG_CASSETTE_ADD( "cassette", radio86_cassette_interface )
378	382	MCFG_SOFTWARE_LIST_ADD("cass_list","radio86")

branches/new_menus/src/mess/drivers/mikrosha.c

r29557	r29558
209	209	MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
210	210	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
211	211
212		MCFG_I8257_ADD("dma8257", XTAL_16MHz / 9, radio86_dma)
	212	MCFG_DEVICE_ADD("dma8257", I8257, XTAL_16MHz / 9)
	213	MCFG_I8257_OUT_HRQ_CB(WRITELINE(radio86_state, hrq_w))
	214	MCFG_I8257_IN_MEMR_CB(READ8(radio86_state, memory_read_byte))
	215	MCFG_I8257_OUT_MEMW_CB(WRITE8(radio86_state, memory_write_byte))
	216	MCFG_I8257_OUT_IOW_2_CB(DEVWRITE8("i8275", i8275_device, dack_w))
213	217
214	218	MCFG_CASSETTE_ADD( "cassette", mikrosha_cassette_interface )
215	219	MCFG_SOFTWARE_LIST_ADD("cass_list","mikrosha")

branches/new_menus/src/mess/drivers/digel804.c

r29557	r29558
117	117	DECLARE_WRITE8_MEMBER( acia_control_w );
118	118	DECLARE_WRITE_LINE_MEMBER( da_w );
119	119	DECLARE_INPUT_CHANGED_MEMBER(mode_change);
120		// vfd helper stuff for port 44, should be unnecessary after 10937 gets a proper device
121		UINT8 m_vfd_sclk;
122	120	// current speaker state for port 45
123	121	UINT8 m_speaker_state;
124	122	// ram stuff for banking
r29557	r29558
164	162	void digel804_state::machine_reset()
165	163	{
166	164	m_vfd->reset();
167		m_vfd_sclk = 0;
168	165	}
169	166
170	167	READ8_MEMBER( digel804_state::ip40 ) // eprom data bus read
r29557	r29558
288	285	#ifdef PORT44_W_VERBOSE
289	286	logerror("Digel804: port 0x44 vfd/state control had %02x written to it!\n", data);
290	287	#endif
291		// latch vfd data on falling edge of clock only; this should really be part of the 10937 device, not here!
292		if (m_vfd_sclk && ((data&1)==0))
293		{
294		m_vfd->shift_data((data & 0x80) ? 0 : 1);
295		}
296		m_vfd_sclk = data & 1;
	288	m_vfd->por(!(data&0x04));
	289	m_vfd->data(data&0x80);
	290	m_vfd->sclk(data&1);
297	291	}
298	292
299	293	WRITE8_MEMBER( digel804_state::op45 ) // speaker write

branches/new_menus/src/mess/drivers/x07.c

r29557	r29558
1495	1495	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
1496	1496
1497	1497	/* printer */
1498		MCFG_PRINTER_ADD("printer")
	1498	MCFG_DEVICE_ADD("printer", PRINTER, 0)
1499	1499
1500	1500	MCFG_TIMER_DRIVER_ADD_PERIODIC("blink_timer", x07_state, blink_timer, attotime::from_msec(300))
1501	1501

branches/new_menus/src/mess/drivers/dragon.c

r29557	r29558
162	162	MCFG_SAM6883_ADD(SAM_TAG, XTAL_4_433619MHz, dragon_state::sam6883_config)
163	163	MCFG_SAM6883_RES_CALLBACK(READ8(dragon_state, sam_read))
164	164	MCFG_CASSETTE_ADD("cassette", dragon_state::coco_cassette_interface)
165		MCFG_PRINTER_ADD(PRINTER_TAG)
	165	MCFG_DEVICE_ADD(PRINTER_TAG, PRINTER, 0)
166	166
167	167	// video hardware
168	168	MCFG_SCREEN_MC6847_PAL_ADD(SCREEN_TAG, VDG_TAG)

branches/new_menus/src/mess/drivers/mc10.c

r29557	r29558
520	520	MCFG_CASSETTE_ADD("cassette", mc10_cassette_interface)
521	521
522	522	/* printer */
523		MCFG_PRINTER_ADD("printer")
	523	MCFG_DEVICE_ADD("printer", PRINTER, 0)
524	524
525	525	/* internal ram */
526	526	MCFG_RAM_ADD(RAM_TAG)
r29557	r29558
555	555	MCFG_CASSETTE_ADD("cassette", alice32_cassette_interface)
556	556
557	557	/* printer */
558		MCFG_PRINTER_ADD("printer")
	558	MCFG_DEVICE_ADD("printer", PRINTER, 0)
559	559
560	560	/* internal ram */
561	561	MCFG_RAM_ADD(RAM_TAG)

branches/new_menus/src/mess/drivers/unior.c

r29557	r29558
393	393	return m_p_vram[offset & 0x7ff];
394	394	}
395	395
396		static I8257_INTERFACE( dma_intf )
397		{
398		DEVCB_CPU_INPUT_LINE("maincpu", I8085_HALT),
399		DEVCB_NULL,
400		DEVCB_NULL,
401		DEVCB_NULL,
402		DEVCB_DEVICE_MEMBER("crtc", i8275_device, dack_w),
403		{ DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(unior_state, dma_r), DEVCB_NULL },
404		{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
405		};
406
407	396	WRITE8_MEMBER( unior_state::cpu_status_callback )
408	397	{
409	398	m_dma->i8257_hlda_w(BIT(data, 3));
r29557	r29558
462	451
463	452	MCFG_I8255_ADD( "ppi0", ppi0_intf )
464	453	MCFG_I8255_ADD( "ppi1", ppi1_intf )
465		MCFG_I8257_ADD("dma", XTAL_20MHz / 9, dma_intf) // unknown clock
	454
	455	MCFG_DEVICE_ADD("dma", I8257, XTAL_20MHz / 9) // unknown clock
	456	MCFG_I8257_OUT_HRQ_CB(INPUTLINE("maincpu", I8085_HALT))
	457	MCFG_I8257_OUT_MEMW_CB(DEVWRITE8("crtc", i8275_device, dack_w))
	458	MCFG_I8257_IN_IOR_2_CB(READ8(unior_state, dma_r))
	459
466	460	MCFG_I8275_ADD("crtc", crtc_intf)
467	461	MACHINE_CONFIG_END
468	462

branches/new_menus/src/mess/drivers/vg5k.c

r29557	r29558
405	405	MCFG_CASSETTE_ADD( "cassette", vg5k_cassette_interface )
406	406
407	407	/* printer */
408		MCFG_PRINTER_ADD("printer")
	408	MCFG_DEVICE_ADD("printer", PRINTER, 0)
409	409
410	410	/* internal ram */
411	411	MCFG_RAM_ADD(RAM_TAG)

branches/new_menus/src/mess/drivers/a310.c

r29557	r29558
15	15	*  \- some subtle memory paging fault
16	16	*  \- missing RAM max size
17	17	*  \- ARM bug?
	18	*  - 38776b8
18	19	*
19	20	*
20	21	=======================================================================================
r29557	r29558
58	59
59	60
60	61	#include "emu.h"
61		#include "machine/wd17xx.h"
62		#include "imagedev/flopdrv.h"
63	62	#include "cpu/arm/arm.h"
64	63	#include "sound/dac.h"
65	64	#include "includes/archimds.h"
66	65	#include "machine/i2cmem.h"
67	66	//#include "machine/aakart.h"
68	67	#include "machine/ram.h"
	68	#include "machine/wd_fdc.h"
	69	#include "formats/applix_dsk.h"
69	70
70	71
71	72	class a310_state : public archimedes_state
r29557	r29558
87	88	virtual void machine_start();
88	89	virtual void machine_reset();
89	90	DECLARE_INPUT_CHANGED_MEMBER(key_stroke);
	91	DECLARE_FLOPPY_FORMATS( floppy_formats );
90	92
91	93
92	94	protected:
r29557	r29558
96	98
97	99	WRITE_LINE_MEMBER(a310_state::a310_wd177x_intrq_w)
98	100	{
	101	printf("%d IRQ\n",state);
99	102	if (state)
	103	{
100	104	archimedes_request_fiq(ARCHIMEDES_FIQ_FLOPPY);
	105	}
101	106	else
102	107	archimedes_clear_fiq(ARCHIMEDES_FIQ_FLOPPY);
103	108	}
104	109
105	110	WRITE_LINE_MEMBER(a310_state::a310_wd177x_drq_w)
106	111	{
	112	printf("%d DRQ\n",state);
107	113	if (state)
	114	{
108	115	archimedes_request_fiq(ARCHIMEDES_FIQ_FLOPPY_DRQ);
	116	}
109	117	else
110	118	archimedes_clear_fiq(ARCHIMEDES_FIQ_FLOPPY_DRQ);
111	119	}
r29557	r29558
202	210	PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME("=  +") PORT_CODE(KEYCODE_EQUALS) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x1c) PORT_IMPULSE(1)
203	211	PORT_BIT(0x20, 0x00, IPT_KEYBOARD) PORT_NAME("`  ~") PORT_CODE(KEYCODE_TILDE) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x10) PORT_IMPULSE(1)
204	212	PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME("BACK SPACE") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x1e) PORT_IMPULSE(1)
205		PORT_BIT(0x80, 0x00, IPT_KEYBOARD) PORT_NAME("TAB") PORT_CODE(KEYCODE_TAB)
	213	PORT_BIT(0x80, 0x00, IPT_KEYBOARD) PORT_NAME("TAB") PORT_CODE(KEYCODE_TAB) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x26) PORT_IMPULSE(1)
206	214
207	215	PORT_START("key2") /* KEY ROW 2 */
208	216	PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("q  Q") PORT_CODE(KEYCODE_Q) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x27) PORT_IMPULSE(1)
r29557	r29558
221	229	PORT_BIT(0x08, 0x00, IPT_KEYBOARD) PORT_NAME("]  }") PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x32) PORT_IMPULSE(1)
222	230	PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME("RETURN") PORT_CODE(KEYCODE_ENTER) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x47) PORT_IMPULSE(1)
223	231	PORT_BIT(0x20, 0x00, IPT_KEYBOARD) PORT_NAME("DEL") PORT_CODE(KEYCODE_DEL)
224		PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME("CTRL") PORT_CODE(KEYCODE_LCONTROL)
	232	PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME("CTRL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x61) PORT_IMPULSE(1)
225	233	PORT_BIT(0x80, 0x80, IPT_KEYBOARD) PORT_NAME("CAPS LOCK") PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE
226	234
227	235	PORT_START("key4") /* KEY ROW 4 */
r29557	r29558
252	260	PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME(",  <") PORT_CODE(KEYCODE_COMMA) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x55) PORT_IMPULSE(1)
253	261	PORT_BIT(0x20, 0x00, IPT_KEYBOARD) PORT_NAME(".  >") PORT_CODE(KEYCODE_STOP) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x56) PORT_IMPULSE(1)
254	262	PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME("/  ?") PORT_CODE(KEYCODE_SLASH) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x23) PORT_IMPULSE(1)
255		PORT_BIT(0x80, 0x00, IPT_KEYBOARD) PORT_NAME("SHIFT (R)") PORT_CODE(KEYCODE_RSHIFT)
	263	PORT_BIT(0x80, 0x00, IPT_KEYBOARD) PORT_NAME("SHIFT (R)") PORT_CODE(KEYCODE_RSHIFT) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x58) PORT_IMPULSE(1)
256	264
257	265	PORT_START("key7") /* KEY ROW 7 */
258	266	PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("LINE FEED")
259		PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("SPACE") PORT_CODE(KEYCODE_SPACE) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x26) PORT_IMPULSE(1)
	267	PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("SPACE") PORT_CODE(KEYCODE_SPACE) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x5f) PORT_IMPULSE(1)
260	268	PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("- (KP)") PORT_CODE(KEYCODE_MINUS_PAD)
261	269	PORT_BIT(0x08, 0x00, IPT_KEYBOARD) PORT_NAME(", (KP)") PORT_CODE(KEYCODE_PLUS_PAD)
262	270	PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME("ENTER (KP)") PORT_CODE(KEYCODE_ENTER_PAD)
r29557	r29558
279	287	PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("*") PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x24) PORT_IMPULSE(1) // (KP?)
280	288	PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("#") PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x25) PORT_IMPULSE(1) // (KP?)
281	289
	290	PORT_START("keya")
	291	PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x01) PORT_IMPULSE(1)
	292	PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x02) PORT_IMPULSE(1)
	293	PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("F3") PORT_CODE(KEYCODE_F3) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x03) PORT_IMPULSE(1)
	294	PORT_BIT(0x08, 0x00, IPT_KEYBOARD) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x04) PORT_IMPULSE(1)
	295	PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x05) PORT_IMPULSE(1)
	296	PORT_BIT(0x20, 0x00, IPT_KEYBOARD) PORT_NAME("F6") PORT_CODE(KEYCODE_F6) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x06) PORT_IMPULSE(1)
	297	PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME("F7") PORT_CODE(KEYCODE_F7) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x07) PORT_IMPULSE(1)
	298	PORT_BIT(0x80, 0x00, IPT_KEYBOARD) PORT_NAME("F8") PORT_CODE(KEYCODE_F8) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x08) PORT_IMPULSE(1)
	299
	300	PORT_START("keyb")
	301	PORT_BIT(0x01, 0x00, IPT_KEYBOARD) PORT_NAME("F9") PORT_CODE(KEYCODE_F9) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x09) PORT_IMPULSE(1)
	302	PORT_BIT(0x02, 0x00, IPT_KEYBOARD) PORT_NAME("F10") PORT_CODE(KEYCODE_F10) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x0a) PORT_IMPULSE(1)
	303	PORT_BIT(0x04, 0x00, IPT_KEYBOARD) PORT_NAME("F11") PORT_CODE(KEYCODE_F11) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x0b) PORT_IMPULSE(1)
	304	PORT_BIT(0x08, 0x00, IPT_KEYBOARD) PORT_NAME("F12") PORT_CODE(KEYCODE_F12) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x0c) PORT_IMPULSE(1)
	305	//    PORT_BIT(0x10, 0x00, IPT_KEYBOARD) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x05) PORT_IMPULSE(1)
	306	//    PORT_BIT(0x20, 0x00, IPT_KEYBOARD) PORT_NAME("F6") PORT_CODE(KEYCODE_F6) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x06) PORT_IMPULSE(1)
	307	//    PORT_BIT(0x40, 0x00, IPT_KEYBOARD) PORT_NAME("F7") PORT_CODE(KEYCODE_F7) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x07) PORT_IMPULSE(1)
	308	//    PORT_BIT(0x80, 0x00, IPT_KEYBOARD) PORT_NAME("F8") PORT_CODE(KEYCODE_F8) PORT_CHANGED_MEMBER(DEVICE_SELF, a310_state, key_stroke, 0x08) PORT_IMPULSE(1)
	309
	310
282	311	PORT_START("via1a") /* VIA #1 PORT A */
283	312	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START) PORT_PLAYER(1)
284	313	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START) PORT_PLAYER(2)
r29557	r29558
296	325	PORT_BIT (0xf8, 0x80, IPT_UNUSED)
297	326	INPUT_PORTS_END
298	327
299		static const wd17xx_interface a310_wd17xx_interface =
300		{
301		DEVCB_NULL,
302		DEVCB_DRIVER_LINE_MEMBER(a310_state, a310_wd177x_intrq_w),
303		DEVCB_DRIVER_LINE_MEMBER(a310_state, a310_wd177x_drq_w),
304		{FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
305		};
	328	FLOPPY_FORMATS_MEMBER( a310_state::floppy_formats )
	329	FLOPPY_APPLIX_FORMAT
	330	FLOPPY_FORMATS_END
306	331
	332	static SLOT_INTERFACE_START( a310_floppies )
	333	SLOT_INTERFACE( "35dd", FLOPPY_35_DD )
	334	SLOT_INTERFACE_END
	335
307	336	WRITE_LINE_MEMBER( archimedes_state::a310_kart_tx_w )
308	337	{
309	338	if(state)
r29557	r29558
331	360	ARM_COPRO_TYPE_VL86C020
332	361	};
333	362
	363
334	364	static MACHINE_CONFIG_START( a310, a310_state )
335	365	/* basic machine hardware */
336	366	MCFG_CPU_ADD("maincpu", ARM, 8000000)        /* 8 MHz */
337	367	MCFG_CPU_PROGRAM_MAP(a310_mem)
338	368	MCFG_CPU_CONFIG(a310_config)
339	369
340		MCFG_AAKART_ADD("kart", 8000000/256, kart_interface) // TODO: frequency
	370	MCFG_AAKART_ADD("kart", 8000000/256, kart_interface)
341	371
342	372	MCFG_I2CMEM_ADD("i2cmem")
343	373	MCFG_I2CMEM_DATA_SIZE(0x100)
r29557	r29558
356	386	MCFG_RAM_DEFAULT_SIZE("2M")
357	387	MCFG_RAM_EXTRA_OPTIONS("512K, 1M, 4M, 8M, 16M")
358	388
359		MCFG_WD1772_ADD("wd1772", a310_wd17xx_interface )
	389	MCFG_WD1772x_ADD("fdc", 8000000 / 1) // TODO: frequency
	390	MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE( a310_state, a310_wd177x_intrq_w))
	391	MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(a310_state, a310_wd177x_drq_w))
	392	MCFG_FLOPPY_DRIVE_ADD("fdc:0", a310_floppies, "35dd", a310_state::floppy_formats)
	393	MCFG_FLOPPY_DRIVE_ADD("fdc:1", a310_floppies, "35dd", a310_state::floppy_formats)
360	394
361		//MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(a310_floppy_interface)
362
363	395	MCFG_SPEAKER_STANDARD_MONO("mono")
364	396	MCFG_SOUND_ADD("dac0", DAC, 0)
365	397	MCFG_SOUND_ROUTE(0, "mono", 0.10)

branches/new_menus/src/mess/drivers/fanucspmg.c

r29557	r29558
710	710	return prog_space.write_byte(offset, data);
711	711	}
712	712
713		I8257_INTERFACE( fanucspmg_dma )
714		{
715		DEVCB_NULL,
716		DEVCB_NULL,
717		DEVCB_NULL,
718		DEVCB_DRIVER_MEMBER(fanucspmg_state, memory_read_byte),
719		DEVCB_DRIVER_MEMBER(fanucspmg_state, memory_write_byte),
720		{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
721		{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL }
722		};
723
724	713	static MC6845_UPDATE_ROW( fanuc_update_row )
725	714	{
726	715	fanucspmg_state *state = downcast<fanucspmg_state *>(device->owner());
r29557	r29558
819	808	MCFG_PIT8253_CLK1(XTAL_15MHz/12)
820	809	MCFG_PIT8253_CLK2(XTAL_15MHz/12)
821	810
822		MCFG_I8257_ADD(DMAC_TAG, XTAL_15MHz / 5, fanucspmg_dma)
	811	MCFG_DEVICE_ADD(DMAC_TAG, I8257, XTAL_15MHz / 5)
	812	MCFG_I8257_IN_MEMR_CB(READ8(fanucspmg_state, memory_read_byte))
	813	MCFG_I8257_OUT_MEMW_CB(WRITE8(fanucspmg_state, memory_write_byte))
823	814
824	815	MCFG_PIC8259_ADD(PIC0_TAG, INPUTLINE("maincpu", 0), VCC, NULL)
825	816	MCFG_PIC8259_ADD(PIC1_TAG, INPUTLINE("maincpu", 0), VCC, NULL)

branches/new_menus/src/mess/drivers/apple3.c

r29557	r29558
121	121	MCFG_RS232_DSR_HANDLER(DEVWRITELINE("acia", mos6551_device, write_dsr))
122	122	// TODO: remove cts kludge from machine/apple3.c and come up with a good way of coping with pull up resistors.
123	123
	124	/* paddle */
	125	MCFG_TIMER_DRIVER_ADD("pdltimer", apple3_state, paddle_timer);
	126
124	127	/* rtc */
125	128	MCFG_DEVICE_ADD("rtc", MM58167, XTAL_32_768kHz)
126	129
127	130	/* via */
128		MCFG_DEVICE_ADD("via6522_0", VIA6522, 1000000)
	131	MCFG_DEVICE_ADD("via6522_0", VIA6522, 2000000)
129	132	MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(apple3_state, apple3_via_0_out_a))
130	133	MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(apple3_state, apple3_via_0_out_b))
131	134	MCFG_VIA6522_IRQ_HANDLER(WRITELINE(apple3_state, apple3_via_0_irq_func))
r29557	r29558
313	316	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Open Apple")   PORT_CODE(KEYCODE_LALT)
314	317	PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Solid Apple")  PORT_CODE(KEYCODE_RALT)
315	318	PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("RESET")        PORT_CODE(KEYCODE_F12)
	319
	320	PORT_START("joy_1_x")      /* Joystick 1 X Axis */
	321	PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X) PORT_SENSITIVITY(100) PORT_KEYDELTA(1) PORT_NAME("P1 Joystick X")
	322	PORT_MINMAX(0, 0xff) PORT_PLAYER(1)
	323
	324	PORT_START("joy_1_y")      /* Joystick 1 Y Axis */
	325	PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y) PORT_SENSITIVITY(100) PORT_KEYDELTA(1) PORT_NAME("P1 Joystick Y")
	326	PORT_MINMAX(0,0xff) PORT_PLAYER(1)
	327
	328	PORT_START("joy_2_x")      /* Joystick 2 X Axis */
	329	PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X) PORT_SENSITIVITY(100) PORT_KEYDELTA(1) PORT_NAME("P2 Joystick X")
	330	PORT_MINMAX(0,0xff) PORT_PLAYER(2)
	331
	332	PORT_START("joy_2_y")      /* Joystick 2 Y Axis */
	333	PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y) PORT_SENSITIVITY(100) PORT_KEYDELTA(1) PORT_NAME("P2 Joystick Y")
	334	PORT_MINMAX(0,0xff) PORT_PLAYER(2)
	335
	336	PORT_START("joy_buttons")
	337	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_PLAYER(1) PORT_NAME("Joystick 1 Button 1")
	338	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_PLAYER(1) PORT_NAME("Joystick 1 Button 2")
	339	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_PLAYER(2) PORT_NAME("Joystick 2 Button 1")
	340	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_PLAYER(2) PORT_NAME("Joystick 2 Button 2")
316	341	INPUT_PORTS_END
317	342
318	343	ROM_START(apple3)

branches/new_menus/src/mess/drivers/ip22.c

r29557	r29558
1488	1488	machine().device<nvram_device>("nvram")->set_base(m_RTC.nRAM, 0x200);
1489	1489	}
1490	1490
1491		static const struct kbdc8042_interface at8042 =
1492		{
1493		KBDC8042_STANDARD,
1494		DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_RESET),
1495		DEVCB_NULL,
1496		DEVCB_NULL,
1497		DEVCB_NULL,
1498
1499		DEVCB_NULL
1500		};
1501
1502	1491	DRIVER_INIT_MEMBER(ip22_state,ip225015)
1503	1492	{
1504	1493	// IP22 uses 2 pieces of PC-compatible hardware: the 8042 PS/2 keyboard/mouse
r29557	r29558
1643	1632	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "^^^lspeaker", 1.0)
1644	1633	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "^^^rspeaker", 1.0)
1645	1634
1646		MCFG_KBDC8042_ADD("kbdc", at8042)
	1635	MCFG_DEVICE_ADD("kbdc", KBDC8042, 0)
	1636	MCFG_KBDC8042_KEYBOARD_TYPE(KBDC8042_STANDARD)
	1637	MCFG_KBDC8042_SYSTEM_RESET_CB(INPUTLINE("maincpu", INPUT_LINE_RESET))
1647	1638	MACHINE_CONFIG_END
1648	1639
1649	1640	static MACHINE_CONFIG_DERIVED( ip224613, ip225015 )

branches/new_menus/src/mess/drivers/ql.c

r29557	r29558
1175	1175	MCFG_RAM_EXTRA_OPTIONS("192K,256K,384K,640K,896K")
1176	1176
1177	1177	// Parallel printer port on Sandy disk interface
1178		MCFG_PRINTER_ADD(PRINTER_TAG)
	1178	MCFG_DEVICE_ADD(PRINTER_TAG, PRINTER, 0)
1179	1179	MACHINE_CONFIG_END
1180	1180
1181	1181

branches/new_menus/src/mess/machine/radio86.c

r29557	r29558
146	146	return prog_space.write_byte(offset, data);
147	147	}
148	148
149		I8257_INTERFACE( radio86_dma )
150		{
151		DEVCB_DRIVER_LINE_MEMBER(radio86_state,hrq_w),
152		DEVCB_NULL,
153		DEVCB_NULL,
154		DEVCB_DRIVER_MEMBER(radio86_state, memory_read_byte),
155		DEVCB_DRIVER_MEMBER(radio86_state, memory_write_byte),
156		{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
157		{ DEVCB_NULL, DEVCB_NULL, DEVCB_DEVICE_MEMBER("i8275", i8275_device, dack_w), DEVCB_NULL }
158		};
159
160	149	void radio86_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
161	150	{
162	151	switch (id)

branches/new_menus/src/mess/machine/partner.c

r29557	r29558
362	362	{
363	363	return m_fdc->data_r(space,offset);
364	364	}
	365
365	366	WRITE8_MEMBER(partner_state::partner_fdc_w)
366	367	{
367	368	m_fdc->data_w(space,offset,data);
368	369	}
369	370
370		I8257_INTERFACE( partner_dma )
371		{
372		DEVCB_DRIVER_LINE_MEMBER(partner_state,hrq_w),
373		DEVCB_NULL,
374		DEVCB_NULL,
375		DEVCB_DRIVER_MEMBER(radio86_state, memory_read_byte),
376		DEVCB_DRIVER_MEMBER(radio86_state, memory_write_byte),
377		{ DEVCB_DRIVER_MEMBER(partner_state, partner_fdc_r), DEVCB_NULL, DEVCB_NULL, DEVCB_NULL },
378		{ DEVCB_DRIVER_MEMBER(partner_state, partner_fdc_w), DEVCB_NULL, DEVCB_DEVICE_MEMBER("i8275", i8275_device, dack_w), DEVCB_NULL }
379		};
380
381
382	371	MACHINE_RESET_MEMBER(partner_state,partner)
383	372	{
384	373	m_mem_page = 0;

branches/new_menus/src/mess/machine/apple3.c

r29557	r29558
39	39	bits 0-5: 6-bit audio DAC output
40	40	bit 6: screen blank
41	41	bit 7: OR of NMI from slots
42
	42
43	43	***************************************************************************/
44	44
45	45	#include "emu.h"
r29557	r29558
150	150	m_flags &= ~(1 << ((offset - 0x50) / 2));
151	151	break;
152	152
153		case 0x60: case 0x61: case 0x62: case 0x63:
154		case 0x64: case 0x65: case 0x66: case 0x67:
155		case 0x68: case 0x69: case 0x6A: case 0x6B:
156		case 0x6C: case 0x6D: case 0x6E: case 0x6F:
157		/* unsure what these are */
158		result = 0x00;
	153	case 0x58:
	154	case 0x59:
	155	case 0x5a:
	156	case 0x5b:
	157	case 0x5c:
	158	case 0x5d:
	159	case 0x5e:
	160	case 0x5f:
	161	pdl_handler(offset);
159	162	break;
160	163
	164	case 0x60:   // joystick switch 0
	165	case 0x68:
	166	result = (m_joybuttons->read() & 1) ? 0x80 : 0x00;
	167	break;
	168
	169	case 0x61:   // joystick switch 1 (margin switch for Silentype)
	170	case 0x69:
	171	result = (m_joybuttons->read() & 4) ? 0x80 : 0x00;
	172	break;
	173
	174	case 0x62:   // joystick switch 2
	175	case 0x6a:
	176	result = (m_joybuttons->read() & 2) ? 0x80 : 0x00;
	177	break;
	178
	179	case 0x63:   // joystick switch 3 (serial clock for silentype)
	180	case 0x6b:
	181	result = (m_joybuttons->read() & 8) ? 0x80 : 0x00;
	182	break;
	183
	184	case 0x66:   // paddle A/D conversion done (bit 7 = 1 while counting, 0 when done)
	185	case 0x6e:
	186	return m_ramp_active ? 0x80 : 0x00;
	187	break;
	188
161	189	case 0x70: case 0x71: case 0x72: case 0x73:
162	190	case 0x74: case 0x75: case 0x76: case 0x77:
163	191	case 0x78: case 0x79: case 0x7A: case 0x7B:
r29557	r29558
287	315	m_flags &= ~(1 << ((offset - 0x50) / 2));
288	316	break;
289	317
	318	case 0x58:
	319	case 0x59:
	320	case 0x5a:
	321	case 0x5b:
	322	case 0x5c:
	323	case 0x5d:
	324	case 0x5e:
	325	case 0x5f:
	326	pdl_handler(offset);
	327	break;
290	328
291	329	case 0x70: case 0x71: case 0x72: case 0x73:
292	330	case 0x74: case 0x75: case 0x76: case 0x77:
r29557	r29558
582	620	m_lastchar = 0x0d;
583	621	m_rom_has_been_disabled = false;
584	622	m_cnxx_slot = -1;
	623	m_analog_sel = 0;
	624	m_ramp_active = false;
585	625	}
586	626
587	627
r29557	r29558
715	755	save_item(NAME(m_transchar));
716	756	save_item(NAME(m_flags));
717	757	save_item(NAME(m_char_mem));
	758	save_item(NAME(m_analog_sel));
	759	save_item(NAME(m_ramp_active));
	760	save_item(NAME(m_pdl_charge));
718	761
719	762	machine().save().register_postload(save_prepost_delegate(FUNC(apple3_state::apple3_postload), this));
720	763	}
r29557	r29558
1152	1195	}
1153	1196	}
1154	1197	}
	1198
	1199	void apple3_state::pdl_handler(int offset)
	1200	{
	1201	UINT8 pdlread;
	1202
	1203	switch (offset)
	1204	{
	1205	case 0x58:
	1206	m_analog_sel &= ~1;
	1207	break;
	1208
	1209	case 0x59:
	1210	m_analog_sel |= 1;
	1211	break;
	1212
	1213	case 0x5a:
	1214	m_analog_sel &= ~4;
	1215	break;
	1216
	1217	case 0x5b:
	1218	m_analog_sel |= 4;
	1219	break;
	1220
	1221	case 0x5c:
	1222	m_ramp_active = false;
	1223	m_pdl_charge = 0;
	1224	m_pdltimer->adjust(attotime::from_hz(1000000.0));
	1225	break;
	1226
	1227	case 0x5d:
	1228	switch (m_analog_sel)
	1229	{
	1230	case 1:
	1231	pdlread = m_joy1x->read();
	1232	break;
	1233
	1234	case 2:
	1235	pdlread = m_joy1y->read();
	1236	break;
	1237
	1238	case 4:
	1239	pdlread = m_joy2x->read();
	1240	break;
	1241
	1242	case 5:
	1243	pdlread = m_joy2y->read();
	1244	break;
	1245
	1246	default:
	1247	pdlread = 127;
	1248	break;
	1249	}
	1250
	1251	// help the ROM self-test
	1252	if (m_pdl_charge > 82)
	1253	{
	1254	m_pdl_charge += (pdlread*4);
	1255	m_pdl_charge -= 93;
	1256	}
	1257	m_pdltimer->adjust(attotime::from_hz(1000000.0));
	1258	m_ramp_active = true;
	1259	break;
	1260
	1261	case 0x5e:
	1262	m_analog_sel &= ~2;
	1263	break;
	1264
	1265	case 0x5f:
	1266	m_analog_sel |= 2;
	1267	break;
	1268	}
	1269	}
	1270
	1271	TIMER_DEVICE_CALLBACK_MEMBER(apple3_state::paddle_timer)
	1272	{
	1273	if (m_ramp_active)
	1274	{
	1275	m_pdl_charge--;
	1276
	1277	if (m_pdl_charge > 0)
	1278	{
	1279	m_pdltimer->adjust(attotime::from_hz(1000000.0));
	1280	}
	1281	else
	1282	{
	1283	m_pdltimer->adjust(attotime::never);
	1284	m_ramp_active = false;
	1285	}
	1286	}
	1287	else
	1288	{
	1289	m_pdl_charge++;
	1290	m_pdltimer->adjust(attotime::from_hz(1000000.0));
	1291	}
	1292	}
	1293

branches/new_menus/src/mess/includes/radio86.h

r29557	r29558
133	133	extern const i8275_interface mikrosha_i8275_interface;
134	134	extern const i8275_interface apogee_i8275_interface;
135	135
136		extern const i8257_interface radio86_dma;
137
138
139	136	extern void radio86_init_keyboard(running_machine &machine);
140	137
141	138

branches/new_menus/src/mess/includes/partner.h

r29557	r29558
47	47
48	48	/*----------- defined in machine/partner.c -----------*/
49	49
50		extern const i8257_interface partner_dma;
51	50	extern const wd17xx_interface partner_wd17xx_interface;
52	51
53	52	#endif /* partner_H_ */

branches/new_menus/src/mess/includes/apple3.h

r29557	r29558
50	50	m_speaker(*this, SPEAKER_TAG),
51	51	m_dac(*this, DAC_TAG),
52	52	m_kbspecial(*this, "keyb_special"),
53		m_palette(*this, "palette")
	53	m_palette(*this, "palette"),
	54	m_joy1x(*this, "joy_1_x"),
	55	m_joy1y(*this, "joy_1_y"),
	56	m_joy2x(*this, "joy_2_x"),
	57	m_joy2y(*this, "joy_2_y"),
	58	m_joybuttons(*this, "joy_buttons"),
	59	m_pdltimer(*this, "pdltimer")
54	60	{
55	61	}
56	62
r29557	r29558
67	73	required_device<dac_device> m_dac;
68	74	required_ioport m_kbspecial;
69	75	required_device<palette_device> m_palette;
	76	required_ioport m_joy1x, m_joy1y, m_joy2x, m_joy2y, m_joybuttons;
	77	required_device<timer_device> m_pdltimer;
70	78
71	79	DECLARE_READ8_MEMBER(apple3_memory_r);
72	80	DECLARE_WRITE8_MEMBER(apple3_memory_w);
r29557	r29558
107	115	DECLARE_READ_LINE_MEMBER(ay3600_control_r);
108	116	DECLARE_WRITE_LINE_MEMBER(ay3600_data_ready_w);
109	117	void apple3_postload();
	118	TIMER_DEVICE_CALLBACK_MEMBER(paddle_timer);
	119	void pdl_handler(int offset);
110	120
111	121	// these need to be public for now
112	122	UINT32 m_flags;
r29557	r29558
137	147	int m_c040_time;
138	148	UINT16 m_lastchar, m_strobe;
139	149	UINT8 m_transchar;
	150
	151	int m_analog_sel;
	152	bool m_ramp_active;
	153	int m_pdl_charge;
140	154	};
141	155
142	156

Property changes on: branches/new_menus

Modified: svn:mergeinfo    Merged /trunk:r29536-29556

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