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r29474 Wednesday 9th April, 2014 at 02:55:40 UTC by Carl
(mess) x68k: reduce tag lookups and fix adpcm (nw)
hd63450: add drq lines (nw)
[src/emu/machine]hd63450.c hd63450.h
[src/mess/drivers]x68k.c
[src/mess/includes]x68k.h

trunk/src/emu/machine/hd63450.c
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8383   }
8484}
8585
86void hd63450_device::device_reset()
87{
88   m_drq_state[0] = m_drq_state[1] = m_drq_state[2] = m_drq_state[3] = 0;
89}
90
8691READ16_MEMBER(hd63450_device::read)
8792{
8893   int channel,reg;
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143148   case 0x00:  // CSR / CER
144149      if(ACCESSING_BITS_8_15)
145150      {
146//          m_reg[channel].csr = (data & 0xff00) >> 8;
151         m_reg[channel].csr &= ~((data & 0xff00) >> 8);
147152//          logerror("DMA#%i: Channel status write : %02x\n",channel,dmac.reg[channel].csr);
148153      }
149154      // CER is read-only, so no action needed there.
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170175      {
171176         m_reg[channel].ccr = data & 0x00ff;
172177         if((data & 0x0080))// && !m_dma_read[channel] && !m_dma_write[channel])
173            dma_transfer_start(channel,0);
178            dma_transfer_start(channel);
174179         if(data & 0x0010)  // software abort
175180            dma_transfer_abort(channel);
176181         if(data & 0x0020)  // halt operation
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243248   }
244249}
245250
246void hd63450_device::dma_transfer_start(int channel, int dir)
251void hd63450_device::dma_transfer_start(int channel)
247252{
248253   address_space &space = m_cpu->space(AS_PROGRAM);
249254   m_in_progress[channel] = 1;
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293298
294299void hd63450_device::dma_transfer_abort(int channel)
295300{
301   if(!m_in_progress[channel])
302      return;
303
296304   logerror("DMA#%i: Transfer aborted\n",channel);
297   m_timer[channel]->adjust(attotime::zero);
305   m_timer[channel]->adjust(attotime::never);
298306   m_in_progress[channel] = 0;
299   m_reg[channel].mtc = m_transfer_size[channel];
300   m_reg[channel].csr |= 0xe0;  // channel operation complete, block transfer complete
307   m_reg[channel].csr |= 0x90;  // channel error
301308   m_reg[channel].csr &= ~0x08;  // channel no longer active
309   m_reg[channel].cer = 0x11;
310   m_reg[channel].ccr &= ~0xc0;
311   m_dma_error((offs_t)3, 1);
302312}
303313
304314void hd63450_device::dma_transfer_halt(int channel)
305315{
306316   m_halted[channel] = 1;
307   m_timer[channel]->adjust(attotime::zero);
317   m_timer[channel]->adjust(attotime::never);
308318}
309319
310320void hd63450_device::dma_transfer_continue(int channel)
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478488            m_in_progress[x] = 0;
479489            m_reg[x].csr |= 0xe0;  // channel operation complete, block transfer complete
480490            m_reg[x].csr &= ~0x08;  // channel no longer active
491            m_reg[x].ccr &= ~0xc0;
481492
482493            // Burst transfer
483494            if((m_reg[x].dcr & 0xc0) == 0x00)
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491502      }
492503}
493504
505WRITE_LINE_MEMBER(hd63450_device::drq0_w)
506{
507   bool ostate = m_drq_state[0];
508   m_drq_state[0] = state;
509   
510   if((m_reg[0].ocr & 2) && (state && !ostate))
511      single_transfer(0);
512}
513
514WRITE_LINE_MEMBER(hd63450_device::drq1_w)
515{
516   bool ostate = m_drq_state[1];
517   m_drq_state[1] = state;
518
519   if((m_reg[1].ocr & 2) && (state && !ostate))
520      single_transfer(1);
521}
522
523WRITE_LINE_MEMBER(hd63450_device::drq2_w)
524{
525   bool ostate = m_drq_state[2];
526   m_drq_state[2] = state;
527   
528   if((m_reg[2].ocr & 2) && (state && !ostate))
529      single_transfer(2);
530}
531
532WRITE_LINE_MEMBER(hd63450_device::drq3_w)
533{
534   bool ostate = m_drq_state[3];
535   m_drq_state[3] = state;
536   
537   if((m_reg[3].ocr & 2) && (state && !ostate))
538      single_transfer(3);
539}
540
494541int hd63450_device::get_vector(int channel)
495542{
496543   return m_reg[channel].niv;
trunk/src/emu/machine/hd63450.h
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8585
8686   DECLARE_READ16_MEMBER( read );
8787   DECLARE_WRITE16_MEMBER( write );
88   DECLARE_WRITE_LINE_MEMBER(drq0_w);
89   DECLARE_WRITE_LINE_MEMBER(drq1_w);
90   DECLARE_WRITE_LINE_MEMBER(drq2_w);
91   DECLARE_WRITE_LINE_MEMBER(drq3_w);
8892
8993   void single_transfer(int x);
9094   void set_timer(int channel, attotime tm);
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9599   // device-level overrides
96100   virtual void device_config_complete();
97101   virtual void device_start();
102   virtual void device_reset();
98103
99104private:
100105   devcb2_write8 m_dma_end;
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115120   int m_transfer_size[4];
116121   int m_halted[4];  // non-zero if a channel has been halted, and can be continued later.
117122   cpu_device *m_cpu;
123   bool m_drq_state[4];
118124
119125   TIMER_CALLBACK_MEMBER(dma_transfer_timer);
120126   void dma_transfer_abort(int channel);
121127   void dma_transfer_halt(int channel);
122128   void dma_transfer_continue(int channel);
123   void dma_transfer_start(int channel, int dir);
129   void dma_transfer_start(int channel);
124130};
125131
126132extern const device_type HD63450;
trunk/src/mess/includes/x68k.h
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1515#include "machine/upd765.h"
1616#include "sound/okim6258.h"
1717#include "machine/ram.h"
18#include "machine/8530scc.h"
19#include "sound/2151intf.h"
20#include "machine/i8255.h"
1821
1922#define MC68901_TAG     "mc68901"
2023#define RP5C15_TAG      "rp5c15"
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4043      TIMER_X68K_CRTC_RASTER_IRQ,
4144      TIMER_X68K_CRTC_VBLANK_IRQ,
4245      TIMER_X68K_FDC_TC,
46      TIMER_X68K_ADPCM
4347   };
4448
4549   x68k_state(const machine_config &mconfig, device_type type, const char *tag)
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5256         m_palette(*this, "palette"),
5357         m_mfpdev(*this, MC68901_TAG),
5458         m_rtc(*this, RP5C15_TAG),
59         m_scc(*this, "scc"),
60         m_ym2151(*this, "ym2151"),
61         m_ppi(*this, "ppi8255"),
5562         m_nvram16(*this, "nvram16"),
5663         m_nvram32(*this, "nvram32"),
5764         m_gvram16(*this, "gvram16"),
5865         m_tvram16(*this, "tvram16"),
5966         m_gvram32(*this, "gvram32"),
60         m_tvram32(*this, "tvram32") { }
67         m_tvram32(*this, "tvram32"),
68         m_options(*this, "options"),
69         m_mouse1(*this, "mouse1"),
70         m_mouse2(*this, "mouse2"),
71         m_mouse3(*this, "mouse3"),
72         m_xpd1lr(*this, "xpd1lr"),
73         m_ctrltype(*this, "ctrltype"),
74         m_joy1(*this, "joy1"),
75         m_joy2(*this, "joy2"),
76         m_md3b(*this, "md3b"),
77         m_md6b(*this, "md6b"),
78         m_md6b_extra(*this, "md6b_extra")
79   { }
6180
6281   required_device<m68000_base_device> m_maincpu;
6382   required_device<okim6258_device> m_okim6258;
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6786   required_device<palette_device> m_palette;
6887   required_device<mc68901_device> m_mfpdev;
6988   required_device<rp5c15_device> m_rtc;
89   required_device<scc8530_t> m_scc;
90   required_device<ym2151_device> m_ym2151;
91   required_device<i8255_device> m_ppi;
7092
7193   optional_shared_ptr<UINT16> m_nvram16;
7294   optional_shared_ptr<UINT32> m_nvram32;
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7597   optional_shared_ptr<UINT16> m_tvram16;
7698   optional_shared_ptr<UINT32> m_gvram32;
7799   optional_shared_ptr<UINT32> m_tvram32;
100   
101   required_ioport m_options;
102   required_ioport m_mouse1;
103   required_ioport m_mouse2;
104   required_ioport m_mouse3;
105   required_ioport m_xpd1lr;
106   required_ioport m_ctrltype;
107   required_ioport m_joy1;
108   required_ioport m_joy2;
109   required_ioport m_md3b;
110   required_ioport m_md6b;
111   required_ioport m_md6b_extra;
78112
79113   DECLARE_WRITE_LINE_MEMBER( mfp_tbo_w );
80114
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100134      int eject[4];
101135      int motor[4];
102136      int selected_drive;
103      int drq_state;
104137   } m_fdc;
105138   struct
106139   {
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203236   emu_timer* m_raster_irq;
204237   emu_timer* m_vblank_irq;
205238   emu_timer* m_fdc_tc;
239   emu_timer* m_adpcm_timer;
206240   UINT16* m_spriteram;
207241   UINT16* m_spritereg;
208242   tilemap_t* m_bg0_8;
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241275   DECLARE_READ8_MEMBER(ppi_port_c_r);
242276   DECLARE_WRITE8_MEMBER(ppi_port_c_w);
243277   DECLARE_WRITE_LINE_MEMBER(fdc_irq);
244   DECLARE_WRITE_LINE_MEMBER(fdc_drq);
245278   DECLARE_WRITE8_MEMBER(x68k_ct_w);
246279   DECLARE_WRITE_LINE_MEMBER(x68k_rtc_alarm_irq);
247280   DECLARE_WRITE8_MEMBER(x68030_adpcm_w);
trunk/src/mess/drivers/x68k.c
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115115*/
116116
117117#include "emu.h"
118#include "cpu/m68000/m68000.h"
119#include "machine/i8255.h"
120118#include "machine/mc68901.h"
121119#include "machine/upd765.h"
122#include "sound/2151intf.h"
123120#include "sound/okim6258.h"
124#include "machine/8530scc.h"
125121#include "machine/rp5c15.h"
126122#include "machine/mb89352.h"
127123#include "formats/xdf_dsk.h"
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181177      m_fdc.fdc->tc_w(ASSERT_LINE);
182178      m_fdc.fdc->tc_w(CLEAR_LINE);
183179      break;
180   case TIMER_X68K_ADPCM:
181      m_hd63450->drq3_w(1);
182      m_hd63450->drq3_w(0);
183      break;
184184   default:
185185      assert_always(FALSE, "Unknown id in x68k_state::device_timer");
186186   }
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213213// typically read from the SCC data port on receive buffer full interrupt per byte
214214int x68k_state::x68k_read_mouse()
215215{
216   scc8530_t *scc = machine().device<scc8530_t>("scc");
217216   char val = 0;
218217   char ipt = 0;
219218
220   if(!(scc->get_reg_b(5) & 0x02))
219   if(!(m_scc->get_reg_b(5) & 0x02))
221220      return 0xff;
222221
223222   switch(m_mouse.inputtype)
224223   {
225224   case 0:
226      ipt = ioport("mouse1")->read();
225      ipt = m_mouse1->read();
227226      break;
228227   case 1:
229      val = ioport("mouse2")->read();
228      val = m_mouse2->read();
230229      ipt = val - m_mouse.last_mouse_x;
231230      m_mouse.last_mouse_x = val;
232231      break;
233232   case 2:
234      val = ioport("mouse3")->read();
233      val = m_mouse3->read();
235234      ipt = val - m_mouse.last_mouse_y;
236235      m_mouse.last_mouse_y = val;
237236      break;
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239238   m_mouse.inputtype++;
240239   if(m_mouse.inputtype > 2)
241240   {
242      int i_val = scc->get_reg_b(0);
241      int i_val = m_scc->get_reg_b(0);
243242      m_mouse.inputtype = 0;
244243      m_mouse.bufferempty = 1;
245244      i_val &= ~0x01;
246      scc->set_reg_b(0, i_val);
245      m_scc->set_reg_b(0, i_val);
247246      logerror("SCC: mouse buffer empty\n");
248247   }
249248
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258257*/
259258READ16_MEMBER(x68k_state::x68k_scc_r )
260259{
261   scc8530_t *scc = machine().device<scc8530_t>("scc");
262260   offset %= 4;
263261   switch(offset)
264262   {
265263   case 0:
266      return scc->reg_r(space, 0);
264      return m_scc->reg_r(space, 0);
267265   case 1:
268266      return x68k_read_mouse();
269267   case 2:
270      return scc->reg_r(space, 1);
268      return m_scc->reg_r(space, 1);
271269   case 3:
272      return scc->reg_r(space, 3);
270      return m_scc->reg_r(space, 3);
273271   default:
274272      return 0xff;
275273   }
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277275
278276WRITE16_MEMBER(x68k_state::x68k_scc_w )
279277{
280   scc8530_t *scc = machine().device<scc8530_t>("scc");
281278   offset %= 4;
282279
283280   switch(offset)
284281   {
285282   case 0:
286      scc->reg_w(space, 0,(UINT8)data);
287      if((scc->get_reg_b(5) & 0x02) != m_scc_prev)
283      m_scc->reg_w(space, 0,(UINT8)data);
284      if((m_scc->get_reg_b(5) & 0x02) != m_scc_prev)
288285      {
289         if(scc->get_reg_b(5) & 0x02)  // Request to Send
286         if(m_scc->get_reg_b(5) & 0x02)  // Request to Send
290287         {
291            int val = scc->get_reg_b(0);
288            int val = m_scc->get_reg_b(0);
292289            m_mouse.bufferempty = 0;
293290            val |= 0x01;
294            scc->set_reg_b(0,val);
291            m_scc->set_reg_b(0,val);
295292         }
296293      }
297294      break;
298295   case 1:
299      scc->reg_w(space, 2,(UINT8)data);
296      m_scc->reg_w(space, 2,(UINT8)data);
300297      break;
301298   case 2:
302      scc->reg_w(space, 1,(UINT8)data);
299      m_scc->reg_w(space, 1,(UINT8)data);
303300      break;
304301   case 3:
305      scc->reg_w(space, 3,(UINT8)data);
302      m_scc->reg_w(space, 3,(UINT8)data);
306303      break;
307304   }
308   m_scc_prev = scc->get_reg_b(5) & 0x02;
305   m_scc_prev = m_scc->get_reg_b(5) & 0x02;
309306}
310307
311308TIMER_CALLBACK_MEMBER(x68k_state::x68k_scc_ack)
312309{
313   scc8530_t *scc = machine().device<scc8530_t>("scc");
314310   if(m_mouse.bufferempty != 0)  // nothing to do if the mouse data buffer is empty
315311      return;
316312
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318314//      return;
319315
320316   // hard-code the IRQ vector for now, until the SCC code is more complete
321   if((scc->get_reg_a(9) & 0x08) || (scc->get_reg_b(9) & 0x08))  // SCC reg WR9 is the same for both channels
317   if((m_scc->get_reg_a(9) & 0x08) || (m_scc->get_reg_b(9) & 0x08))  // SCC reg WR9 is the same for both channels
322318   {
323      if((scc->get_reg_b(1) & 0x18) != 0)  // if bits 3 and 4 of WR1 are 0, then Rx IRQs are disabled on this channel
319      if((m_scc->get_reg_b(1) & 0x18) != 0)  // if bits 3 and 4 of WR1 are 0, then Rx IRQs are disabled on this channel
324320      {
325         if(scc->get_reg_b(5) & 0x02)  // RTS signal
321         if(m_scc->get_reg_b(5) & 0x02)  // RTS signal
326322         {
327323            m_mouse.irqactive = 1;
328324            m_current_vector[5] = 0x54;
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354350   }
355351   if(m_adpcm.clock != 0)
356352      rate = rate/2;
357   m_hd63450->set_timer(3,attotime::from_hz(rate));
353   m_adpcm_timer->adjust(attotime::from_hz(rate), 0, attotime::from_hz(rate));
358354}
359355
360356// Megadrive 3 button gamepad
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367363{
368364   if(port == 1)
369365   {
370      UINT8 porta = ioport("md3b")->read() & 0xff;
371      UINT8 portb = (ioport("md3b")->read() >> 8) & 0xff;
366      UINT8 porta = m_md3b->read() & 0xff;
367      UINT8 portb = (m_md3b->read() >> 8) & 0xff;
372368      if(m_mdctrl.mux1 & 0x10)
373369      {
374370         return porta | 0x90;
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380376   }
381377   if(port == 2)
382378   {
383      UINT8 porta = (ioport("md3b")->read() >> 16) & 0xff;
384      UINT8 portb = (ioport("md3b")->read() >> 24) & 0xff;
379      UINT8 porta = (m_md3b->read() >> 16) & 0xff;
380      UINT8 portb = (m_md3b->read() >> 24) & 0xff;
385381      if(m_mdctrl.mux2 & 0x20)
386382      {
387383         return porta | 0x90;
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415411{
416412   if(port == 1)
417413   {
418      UINT8 porta = ioport("md6b")->read() & 0xff;
419      UINT8 portb = (ioport("md6b")->read() >> 8) & 0xff;
420      UINT8 extra = ioport("md6b_extra")->read() & 0x0f;
414      UINT8 porta = m_md6b->read() & 0xff;
415      UINT8 portb = (m_md6b->read() >> 8) & 0xff;
416      UINT8 extra = m_md6b_extra->read() & 0x0f;
421417
422418      switch(m_mdctrl.seq1)
423419      {
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453449   }
454450   if(port == 2)
455451   {
456      UINT8 porta = (ioport("md6b")->read() >> 16) & 0xff;
457      UINT8 portb = (ioport("md6b")->read() >> 24) & 0xff;
458      UINT8 extra = (ioport("md6b_extra")->read() >> 4) & 0x0f;
452      UINT8 porta = (m_md6b->read() >> 16) & 0xff;
453      UINT8 portb = (m_md6b->read() >> 24) & 0xff;
454      UINT8 extra = (m_md6b_extra->read() >> 4) & 0x0f;
459455
460456      switch(m_mdctrl.seq2)
461457      {
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503499{
504500   if(port == 1)
505501   {
506      UINT8 porta = ioport("xpd1lr")->read() & 0xff;
507      UINT8 portb = (ioport("xpd1lr")->read() >> 8) & 0xff;
502      UINT8 porta = m_xpd1lr->read() & 0xff;
503      UINT8 portb = (m_xpd1lr->read() >> 8) & 0xff;
508504      if(m_mdctrl.mux1 & 0x10)
509505      {
510506         return porta;
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516512   }
517513   if(port == 2)
518514   {
519      UINT8 porta = (ioport("xpd1lr")->read() >> 16) & 0xff;
520      UINT8 portb = (ioport("xpd1lr")->read() >> 24) & 0xff;
515      UINT8 porta = (m_xpd1lr->read() >> 16) & 0xff;
516      UINT8 portb = (m_xpd1lr->read() >> 24) & 0xff;
521517      if(m_mdctrl.mux2 & 0x20)
522518      {
523519         return porta;
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533529// Judging from the XM6 source code, PPI ports A and B are joystick inputs
534530READ8_MEMBER(x68k_state::ppi_port_a_r)
535531{
536   int ctrl = ioport("ctrltype")->read() & 0x0f;
532   int ctrl = m_ctrltype->read() & 0x0f;
537533
538534   switch(ctrl)
539535   {
540536      case 0x00:  // standard MSX/FM-Towns joystick
541537         if(m_joy.joy1_enable == 0)
542            return ioport("joy1")->read();
538            return m_joy1->read();
543539         else
544540            return 0xff;
545541      case 0x01:  // 3-button Megadrive gamepad
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555551
556552READ8_MEMBER(x68k_state::ppi_port_b_r)
557553{
558   int ctrl = ioport("ctrltype")->read() & 0xf0;
554   int ctrl = m_ctrltype->read() & 0xf0;
559555
560556   switch(ctrl)
561557   {
562558      case 0x00:  // standard MSX/FM-Towns joystick
563559         if(m_joy.joy2_enable == 0)
564            return ioport("joy2")->read();
560            return m_joy2->read();
565561         else
566562            return 0xff;
567563      case 0x10:  // 3-button Megadrive gamepad
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736732   return m_fdc.fdc->dma_w(data);
737733}
738734
739WRITE_LINE_MEMBER( x68k_state::fdc_drq )
740{
741   bool ostate = m_fdc.drq_state;
742   m_fdc.drq_state = state;
743   if(state && !ostate)
744   {
745      m_hd63450->single_transfer(0);
746   }
747}
748
749735WRITE16_MEMBER(x68k_state::x68k_fm_w)
750736{
751737   switch(offset)
752738   {
753739   case 0x00:
754740   case 0x01:
755      machine().device<ym2151_device>("ym2151")->write(space, offset, data);
741      m_ym2151->write(space, offset, data);
756742      break;
757743   }
758744}
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760746READ16_MEMBER(x68k_state::x68k_fm_r)
761747{
762748   if(offset == 0x01)
763      return machine().device<ym2151_device>("ym2151")->read(space, 1);
749      return m_ym2151->read(space, 1);
764750
765751   return 0xffff;
766752}
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901887
902888WRITE16_MEMBER(x68k_state::x68k_ppi_w)
903889{
904   i8255_device *ppi = machine().device<i8255_device>("ppi8255");
905   ppi->write(space,offset & 0x03,data);
890   m_ppi->write(space,offset & 0x03,data);
906891}
907892
908893READ16_MEMBER(x68k_state::x68k_ppi_r)
909894{
910   i8255_device *ppi = machine().device<i8255_device>("ppi8255");
911   return ppi->read(space,offset & 0x03);
895   return m_ppi->read(space,offset & 0x03);
912896}
913897
914898
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10661050      then access causes a bus error */
10671051   m_current_vector[2] = 0x02;  // bus error
10681052   m_current_irq_line = 2;
1069   if((ioport("options")->read() & 0x02) && !space.debugger_access())
1053   if((m_options->read() & 0x02) && !space.debugger_access())
10701054      set_bus_error((offset << 1) + 0xbffffc, 0, mem_mask);
10711055   return 0xff;
10721056}
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10771061      then access causes a bus error */
10781062   m_current_vector[2] = 0x02;  // bus error
10791063   m_current_irq_line = 2;
1080   if((ioport("options")->read() & 0x02) && !space.debugger_access())
1064   if((m_options->read() & 0x02) && !space.debugger_access())
10811065      set_bus_error((offset << 1) + 0xbffffc, 1, mem_mask);
10821066}
10831067
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10871071      Often a method for detecting amount of installed RAM, is to read or write at 1MB intervals, until a bus error occurs */
10881072   m_current_vector[2] = 0x02;  // bus error
10891073   m_current_irq_line = 2;
1090   if((ioport("options")->read() & 0x02) && !space.debugger_access())
1074   if((m_options->read() & 0x02) && !space.debugger_access())
10911075      set_bus_error((offset << 1), 0, mem_mask);
10921076   return 0xff;
10931077}
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10981082      Often a method for detecting amount of installed RAM, is to read or write at 1MB intervals, until a bus error occurs */
10991083   m_current_vector[2] = 0x02;  // bus error
11001084   m_current_irq_line = 2;
1101   if((ioport("options")->read() & 0x02) && !space.debugger_access())
1085   if((m_options->read() & 0x02) && !space.debugger_access())
11021086      set_bus_error((offset << 1), 1, mem_mask);
11031087}
11041088
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11071091   /* These are expansion devices, if not present, they cause a bus error */
11081092   m_current_vector[2] = 0x02;  // bus error
11091093   m_current_irq_line = 2;
1110   if((ioport("options")->read() & 0x02) && !space.debugger_access())
1094   if((m_options->read() & 0x02) && !space.debugger_access())
11111095      set_bus_error((offset << 1) + 0xeafa00, 0, mem_mask);
11121096   return 0xff;
11131097}
r29473r29474
11171101   /* These are expansion devices, if not present, they cause a bus error */
11181102   m_current_vector[2] = 0x02;  // bus error
11191103   m_current_irq_line = 2;
1120   if((ioport("options")->read() & 0x02) && !space.debugger_access())
1104   if((m_options->read() & 0x02) && !space.debugger_access())
11211105      set_bus_error((offset << 1) + 0xeafa00, 1, mem_mask);
11221106}
11231107
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11471131   {
11481132      m_current_vector[3] = m_hd63450->get_error_vector(offset);
11491133      m_current_irq_line = 3;
1134      logerror("DMA#%i: DMA Error (vector 0x%02x)\n",offset,m_current_vector[3]);
11501135      m_maincpu->set_input_line_and_vector(3,ASSERT_LINE,m_current_vector[3]);
11511136   }
11521137}
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17931778   m_led_timer = timer_alloc(TIMER_X68K_LED);
17941779   m_net_timer = timer_alloc(TIMER_X68K_NET_IRQ);
17951780   m_fdc_tc = timer_alloc(TIMER_X68K_FDC_TC);
1781   m_adpcm_timer = timer_alloc(TIMER_X68K_ADPCM);
17961782
17971783   // Initialise timers for 6-button MD controllers
17981784   md_6button_init();
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18911877
18921878   MCFG_UPD72065_ADD("upd72065", true, true)
18931879   MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(x68k_state, fdc_irq))
1894   MCFG_UPD765_DRQ_CALLBACK(WRITELINE(x68k_state, fdc_drq))
1880   MCFG_UPD765_DRQ_CALLBACK(DEVWRITELINE("hd63450", hd63450_device, drq0_w))
18951881   MCFG_FLOPPY_DRIVE_ADD("upd72065:0", x68k_floppies, "525hd", x68k_state::floppy_formats)
18961882   MCFG_FLOPPY_DRIVE_ADD("upd72065:1", x68k_floppies, "525hd", x68k_state::floppy_formats)
18971883   MCFG_FLOPPY_DRIVE_ADD("upd72065:2", x68k_floppies, "525hd", x68k_state::floppy_formats)

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