trunk/src/emu/machine/mos6551.c
| r29407 | r29408 | |
| 29 | 29 | m_rts(0), |
| 30 | 30 | m_dtr(0), |
| 31 | 31 | m_xtal(0), |
| 32 | m_divide(0), |
| 32 | 33 | m_cts(1), |
| 33 | 34 | m_dsr(1), |
| 34 | 35 | m_dcd(1), |
| r29407 | r29408 | |
| 39 | 40 | |
| 40 | 41 | const int mos6551_device::internal_divider[] = |
| 41 | 42 | { |
| 42 | | 0, 2304, 1536, 1048, 856, 768, 384, 192, 96, 64, 48, 32, 24, 16, 12, 6 |
| 43 | 1, 2304, 1536, 1048, 856, 768, 384, 192, 96, 64, 48, 32, 24, 16, 12, 6 |
| 43 | 44 | }; |
| 44 | 45 | |
| 45 | 46 | const int mos6551_device::transmitter_controls[4][3] = |
| r29407 | r29408 | |
| 86 | 87 | save_item(NAME(m_dtr)); |
| 87 | 88 | |
| 88 | 89 | save_item(NAME(m_xtal)); |
| 90 | save_item(NAME(m_divide)); |
| 89 | 91 | save_item(NAME(m_cts)); |
| 90 | 92 | save_item(NAME(m_dsr)); |
| 91 | 93 | save_item(NAME(m_dcd)); |
| r29407 | r29408 | |
| 225 | 227 | } |
| 226 | 228 | } |
| 227 | 229 | |
| 230 | void mos6551_device::update_divider() |
| 231 | { |
| 232 | // bits 0-3 |
| 233 | double scale = internal_divider[(m_control >> 0) & 0xf]; |
| 234 | |
| 235 | // The 6551 allows an external clock (hooked up to xtal1 with xtal2 floating) with the internal clock generator, |
| 236 | // it is unknown whether it allows a xtal (hooked up to xtal1 & xtal2) to be used as an external clock. It is |
| 237 | // allowed here for performance reasons. |
| 238 | if (m_xtal != 0) |
| 239 | { |
| 240 | m_tx_internal_clock = true; |
| 241 | |
| 242 | m_divide = 16; |
| 243 | scale = (double) 1 / scale; |
| 244 | } |
| 245 | else |
| 246 | { |
| 247 | m_tx_internal_clock = false; |
| 248 | |
| 249 | m_divide = scale * 16; |
| 250 | scale = 0; |
| 251 | } |
| 252 | |
| 253 | m_internal_clock->set_clock_scale(scale); |
| 254 | } |
| 255 | |
| 228 | 256 | UINT8 mos6551_device::read_rdr() |
| 229 | 257 | { |
| 230 | 258 | m_status &= ~(SR_PARITY_ERROR | SR_FRAMING_ERROR | SR_OVERRUN | SR_RDRF); |
| r29407 | r29408 | |
| 277 | 305 | { |
| 278 | 306 | m_control = data; |
| 279 | 307 | |
| 280 | | // bits 0-3 |
| 281 | | double scale = internal_divider[(m_control >> 0) & 0xf]; |
| 282 | | if (scale != 0) |
| 283 | | { |
| 284 | | m_tx_internal_clock = true; |
| 285 | | scale = (double) 1 / scale; |
| 286 | | } |
| 287 | | else |
| 288 | | { |
| 289 | | m_tx_internal_clock = false; |
| 290 | | } |
| 308 | update_divider(); |
| 291 | 309 | |
| 292 | | m_internal_clock->set_clock_scale(scale); |
| 293 | | |
| 294 | 310 | // bit 4 |
| 295 | 311 | m_rx_internal_clock = (m_control >> 4) & 1; |
| 296 | 312 | |
| r29407 | r29408 | |
| 407 | 423 | if (started()) |
| 408 | 424 | { |
| 409 | 425 | m_internal_clock->set_unscaled_clock(m_xtal); |
| 426 | update_divider(); |
| 410 | 427 | } |
| 411 | 428 | } |
| 412 | 429 | |
trunk/src/mess/drivers/apple3.c
| r29407 | r29408 | |
| 109 | 109 | |
| 110 | 110 | /* acia */ |
| 111 | 111 | MCFG_DEVICE_ADD("acia", MOS6551, 0) |
| 112 | | MCFG_MOS6551_XTAL(XTAL_1_8432MHz) |
| 112 | MCFG_MOS6551_XTAL(XTAL_1_8432MHz) // HACK: The schematic shows an external clock generator but using a XTAL is faster to emulate. |
| 113 | 113 | MCFG_MOS6551_IRQ_HANDLER(WRITELINE(apple3_state, apple3_acia_irq_func)) |
| 114 | 114 | MCFG_MOS6551_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd)) |
| 115 | 115 | MCFG_MOS6551_RTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts)) |