trunk/src/mess/drivers/x68k.c
| r29370 | r29371 | |
| 1042 | 1042 | |
| 1043 | 1043 | TIMER_CALLBACK_MEMBER(x68k_state::x68k_bus_error) |
| 1044 | 1044 | { |
| 1045 | | int val = param; |
| 1046 | | int v; |
| 1047 | | UINT8 *ram = m_ram->pointer(); |
| 1045 | m_bus_error = false; |
| 1046 | } |
| 1048 | 1047 | |
| 1049 | | if(strcmp(machine().system().name,"x68030") == 0) |
| 1050 | | v = 0x0b; |
| 1051 | | else |
| 1052 | | v = 0x09; |
| 1053 | | if(ram[v] != 0x02) // normal vector for bus errors points to 02FF0540 |
| 1054 | | { |
| 1055 | | m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); |
| 1056 | | m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); |
| 1057 | | popmessage("Bus error: Unused RAM access [%08x]", val); |
| 1058 | | } |
| 1048 | void x68k_state::set_bus_error(UINT32 address, bool write, UINT16 mem_mask) |
| 1049 | { |
| 1050 | if(m_bus_error) |
| 1051 | return; |
| 1052 | if(!ACCESSING_BITS_8_15) |
| 1053 | address++; |
| 1054 | m_bus_error = true; |
| 1055 | m68k_set_buserror_details(m_maincpu, address, write, m68k_get_fc(m_maincpu)); |
| 1056 | m_maincpu->mmu_tmp_buserror_address = address; // Hack for x68030 |
| 1057 | m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); |
| 1058 | m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); |
| 1059 | timer_set(m_maincpu->cycles_to_attotime(16), TIMER_X68K_BUS_ERROR); // let rmw cycles complete |
| 1060 | logerror("%s: Bus error: Unused RAM access [%08x]\n", machine().describe_context(), address); |
| 1059 | 1061 | } |
| 1060 | 1062 | |
| 1061 | 1063 | READ16_MEMBER(x68k_state::x68k_rom0_r) |
| r29370 | r29371 | |
| 1064 | 1066 | then access causes a bus error */ |
| 1065 | 1067 | m_current_vector[2] = 0x02; // bus error |
| 1066 | 1068 | m_current_irq_line = 2; |
| 1067 | | // m_maincpu->set_input_line_and_vector(2,ASSERT_LINE,m_current_vector[2]); |
| 1068 | | if(ioport("options")->read() & 0x02) |
| 1069 | | { |
| 1070 | | offset *= 2; |
| 1071 | | if(ACCESSING_BITS_0_7) |
| 1072 | | offset++; |
| 1073 | | timer_set(m_maincpu->cycles_to_attotime(4), TIMER_X68K_BUS_ERROR, 0xbffffc+offset); |
| 1074 | | } |
| 1069 | if((ioport("options")->read() & 0x02) && !space.debugger_access()) |
| 1070 | set_bus_error((offset << 1) + 0xbffffc, 0, mem_mask); |
| 1075 | 1071 | return 0xff; |
| 1076 | 1072 | } |
| 1077 | 1073 | |
| r29370 | r29371 | |
| 1081 | 1077 | then access causes a bus error */ |
| 1082 | 1078 | m_current_vector[2] = 0x02; // bus error |
| 1083 | 1079 | m_current_irq_line = 2; |
| 1084 | | // m_maincpu->set_input_line_and_vector(2,ASSERT_LINE,m_current_vector[2]); |
| 1085 | | if(ioport("options")->read() & 0x02) |
| 1086 | | { |
| 1087 | | offset *= 2; |
| 1088 | | if(ACCESSING_BITS_0_7) |
| 1089 | | offset++; |
| 1090 | | timer_set(m_maincpu->cycles_to_attotime(4), TIMER_X68K_BUS_ERROR, 0xbffffc+offset); |
| 1091 | | } |
| 1080 | if((ioport("options")->read() & 0x02) && !space.debugger_access()) |
| 1081 | set_bus_error((offset << 1) + 0xbffffc, 1, mem_mask); |
| 1092 | 1082 | } |
| 1093 | 1083 | |
| 1094 | 1084 | READ16_MEMBER(x68k_state::x68k_emptyram_r) |
| r29370 | r29371 | |
| 1097 | 1087 | Often a method for detecting amount of installed RAM, is to read or write at 1MB intervals, until a bus error occurs */ |
| 1098 | 1088 | m_current_vector[2] = 0x02; // bus error |
| 1099 | 1089 | m_current_irq_line = 2; |
| 1100 | | // m_maincpu->set_input_line_and_vector(2,ASSERT_LINE,m_current_vector[2]); |
| 1101 | | if(ioport("options")->read() & 0x02) |
| 1102 | | { |
| 1103 | | offset *= 2; |
| 1104 | | if(ACCESSING_BITS_0_7) |
| 1105 | | offset++; |
| 1106 | | timer_set(m_maincpu->cycles_to_attotime(4), TIMER_X68K_BUS_ERROR, offset); |
| 1107 | | } |
| 1090 | if((ioport("options")->read() & 0x02) && !space.debugger_access()) |
| 1091 | set_bus_error((offset << 1), 0, mem_mask); |
| 1108 | 1092 | return 0xff; |
| 1109 | 1093 | } |
| 1110 | 1094 | |
| r29370 | r29371 | |
| 1114 | 1098 | Often a method for detecting amount of installed RAM, is to read or write at 1MB intervals, until a bus error occurs */ |
| 1115 | 1099 | m_current_vector[2] = 0x02; // bus error |
| 1116 | 1100 | m_current_irq_line = 2; |
| 1117 | | // m_maincpu->set_input_line_and_vector(2,ASSERT_LINE,m_current_vector[2]); |
| 1118 | | if(ioport("options")->read() & 0x02) |
| 1119 | | { |
| 1120 | | offset *= 2; |
| 1121 | | if(ACCESSING_BITS_0_7) |
| 1122 | | offset++; |
| 1123 | | timer_set(m_maincpu->cycles_to_attotime(4), TIMER_X68K_BUS_ERROR, offset); |
| 1124 | | } |
| 1101 | if((ioport("options")->read() & 0x02) && !space.debugger_access()) |
| 1102 | set_bus_error((offset << 1), 1, mem_mask); |
| 1125 | 1103 | } |
| 1126 | 1104 | |
| 1127 | 1105 | READ16_MEMBER(x68k_state::x68k_exp_r) |
| 1128 | 1106 | { |
| 1129 | 1107 | /* These are expansion devices, if not present, they cause a bus error */ |
| 1130 | | if(ioport("options")->read() & 0x02) |
| 1131 | | { |
| 1132 | | m_current_vector[2] = 0x02; // bus error |
| 1133 | | m_current_irq_line = 2; |
| 1134 | | offset *= 2; |
| 1135 | | if(ACCESSING_BITS_0_7) |
| 1136 | | offset++; |
| 1137 | | timer_set(m_maincpu->cycles_to_attotime(16), TIMER_X68K_BUS_ERROR, 0xeafa00+offset); |
| 1138 | | // m_maincpu->set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]); |
| 1139 | | } |
| 1140 | | return 0xffff; |
| 1108 | m_current_vector[2] = 0x02; // bus error |
| 1109 | m_current_irq_line = 2; |
| 1110 | if((ioport("options")->read() & 0x02) && !space.debugger_access()) |
| 1111 | set_bus_error((offset << 1) + 0xeafa00, 0, mem_mask); |
| 1112 | return 0xff; |
| 1141 | 1113 | } |
| 1142 | 1114 | |
| 1143 | 1115 | WRITE16_MEMBER(x68k_state::x68k_exp_w) |
| 1144 | 1116 | { |
| 1145 | 1117 | /* These are expansion devices, if not present, they cause a bus error */ |
| 1146 | | if(ioport("options")->read() & 0x02) |
| 1147 | | { |
| 1148 | | m_current_vector[2] = 0x02; // bus error |
| 1149 | | m_current_irq_line = 2; |
| 1150 | | offset *= 2; |
| 1151 | | if(ACCESSING_BITS_0_7) |
| 1152 | | offset++; |
| 1153 | | timer_set(m_maincpu->cycles_to_attotime(16), TIMER_X68K_BUS_ERROR, 0xeafa00+offset); |
| 1154 | | // m_maincpu->set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]); |
| 1155 | | } |
| 1118 | m_current_vector[2] = 0x02; // bus error |
| 1119 | m_current_irq_line = 2; |
| 1120 | if((ioport("options")->read() & 0x02) && !space.debugger_access()) |
| 1121 | set_bus_error((offset << 1) + 0xeafa00, 1, mem_mask); |
| 1156 | 1122 | } |
| 1157 | 1123 | |
| 1158 | 1124 | void x68k_state::dma_irq(int channel) |
| r29370 | r29371 | |
| 1766 | 1732 | address_space &space = m_maincpu->space(AS_PROGRAM); |
| 1767 | 1733 | /* Install RAM handlers */ |
| 1768 | 1734 | m_spriteram = (UINT16*)(*memregion("user1")); |
| 1769 | | space.install_read_handler(0x000000,0xbffffb,0xffffffff,0,read16_delegate(FUNC(x68k_state::x68k_rom0_r),this),0xffffffff); |
| 1770 | | space.install_write_handler(0x000000,0xbffffb,0xffffffff,0,write16_delegate(FUNC(x68k_state::x68k_rom0_w),this),0xffffffff); |
| 1735 | space.install_read_handler(0x000000,0xbffffb,0xffffffff,0,read16_delegate(FUNC(x68k_state::x68k_emptyram_r),this),0xffffffff); |
| 1736 | space.install_write_handler(0x000000,0xbffffb,0xffffffff,0,write16_delegate(FUNC(x68k_state::x68k_emptyram_w),this),0xffffffff); |
| 1771 | 1737 | space.install_readwrite_bank(0x000000,m_ram->size()-1,0xffffffff,0,"bank1"); |
| 1772 | 1738 | membank("bank1")->set_base(m_ram->pointer()); |
| 1773 | 1739 | space.install_read_handler(0xc00000,0xdfffff,0xffffffff,0,read32_delegate(FUNC(x68k_state::x68k_gvram32_r),this)); |