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r29338 Saturday 5th April, 2014 at 21:56:01 UTC by Nathan Woods
Merge branch 'master' of ssh://mess.org/mame into new_menus
[/branches/new_menus/src/emu]digfx.c
[/branches/new_menus/src/mame/drivers]coinmstr.c namcos12.c namcos23.c
[/branches/new_menus/src/mess/video]gime.c

branches/new_menus/src/emu/digfx.c
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9191                        m_palette_tag);
9292   
9393   // if palette device isn't started, wait for it
94   if (!m_palette->started())
95      throw device_missing_dependencies();
94   // if (!m_palette->started())
95   //   throw device_missing_dependencies();
9696}
9797
9898
branches/new_menus/src/mess/video/gime.c
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386386   super::device_post_load();
387387   update_memory();
388388   update_cpu_clock();
389
390   // force the palette to update
391   for (offs_t i = 0; i <= 15; i++)
392   {
393      UINT8 value = read_palette_register(i);
394      write_palette_register(i, value);
395   }
389396}
390397
391398
branches/new_menus/src/mame/drivers/coinmstr.c
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1/*
2x
3  Coinmaster trivia games
1/*==================================================================================
42
5  preliminary driver by Pierpaolo Prazzoli
3  Coinmaster trivia and poker games.
64
5  Preliminary driver by Pierpaolo Prazzoli
6  Additional work by Roberto Fresca.
7
8
79  TODO:
810  - is there extra colour info in attr3 for suprnudge 2 and pokeroul?
911  - is there colour intensity control?
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1113  - finish question roms reading
1214  - hook up all the PIAs
1315
14  Notes:
16
17====================================================================================
18
19  Technical notes....
20
21 
22  There are at least 2 different boards.
23 
24  A) Unknown, with 2x 6264 RAM, mapped $C000-$DFFF and $E000-$FFFF.
25  B) 'PCB-001-POK', with 3x 6116 RAM, mapped $E000-$E7FF, $E800-$EFFF, and $F000-$F7FF.
26
27  - All of them seems to have a connector for expansion (as Question Boards).
28
29  - The I/O ports are a mess. Devices could be mapped in different ways.
30
1531  - Some trivia seems to accept 2 type of eproms for question roms:
1632    0x4000 or 0x8000 bytes long. This check is done with the 1st read
1733    from the rom (I think from offset 0) and if it's 0x10, it means a
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1935    Also supnudg2 only tests 0x20 as 1st byte, so accepting only
2036    the 2nd type of eproms.
2137
22*/
2338
39  * Coinmaster Joker Poker (PCB-001-POK)
2440
41  AY-3-8912
42  ---------
43 
44  - IO pins connected to DIP switches bank.
45  - Data pin connected to CPU data pin.
46  - BC1 goes to PAL IC12 pin 12
47  - BC2 +5V
48  - BDIR goes to PAL IC12 pin 13
49  - A8 +5V
50
51  PIAs
52  ----
53 
54  PIA0 (IC24) Port A --> Input.
55  PIA0 (IC24) Port B --> Output.
56
57  PB output
58  PB0 to PB6 go to ULN2003 (IC19) then on PCB connector.
59  PB7 goes to ULM2003 (IC40) pin 1 then on PCB connector.
60
61 
62  PIA1 (IC39) Port A --> Output.
63  PIA1 (IC39) Port B --> Output.
64
65  PA0-PA7 go to 22 KOhm resistor, then a "pull up" capacitor, and then into the base of a transistor.
66        Collector connected to +5V, emitter is the output (1 KOhm pulldown), it goes into an ULN2803
67        and then to PCB connector. 3 of that transistors outputs (input of the ULN) are connected
68        together and connected to another circuit that generate 2 more outputs on PCB connector.
69       (them seem unused no solder on the pcb connector)
70
71  PB0 to PB6 goes to ULN2003 (IC34) then on PCB connector.
72  PB7 goes to ULM2003 (IC40) pin 2 then on PCB connector.
73
74
75  PIA2 (IC32) Port A --> Input.
76  PIA2 (IC32) Port B --> Output.
77
78  PB0 to PB6 go to ULN2003 (IC31) then on PCB connector.
79  PB7 goes to ULM2003 (IC40) pin 3 then on PCB connector.
80
81 
82====================================================================================
83
84  Notes by game....
85
86  * Coinmaster Joker Poker
87
88  - For Joker Poker (set 2), to start, pulse the KEY OUT (W) to wipe
89    the credits set at boot stage and reset the game. Otherwise you'll
90    get 116 credits due to input inconsistences.
91
92  DIP switch #1 changes the minimal hand between "Jacks or Better" and
93  "Pair of Aces".
94 
95  There are two bookkeeping modes. I think these are for different levels
96  like operator and manager/supervisor. With the DIP switch #4 you can
97  switch between them. Is possible that this input would be meant to be
98  routed to a real supervisor key.
99
100  Bookkeeping Types:
101
102  "Weekly Meters"
103
104  Just the operator bookkeeping mode. Only weekly credits in and out.
105  Erasable with CANCEL button. HOLD 5 shows the settings status.
106
107  "Meter Totals"
108
109  A complete bookkeeping, not erasable. Credits in/out, gamble in/out,
110  and complete statistics. In the principal bookkeeping screen, HOLD 1
111  brings up a sort of values, and HOLD 4 shows the current stake limit
112  (keep pressing HOLD 4, and press HIGH and LOW to set the stake limit
113  between 10-100).
114
115  Pressing DEAL/START, you can get the winning hands, occurence of
116  spades, diamonds, clubs and hearts. also number of jokers dealt.
117 
118  With DIP switch #8 ON, you can enter a sort of test mode, where you
119  can set the cards using the HOLD buttons, and test the winning hands.
120
121  DIP switch #7 is the 'Factory Install Switch'. It behaves like a PC
122  CMOS eraser jumper. Turning it ON and then OFF, you will erase the
123  'Meter Totals' (all permanent meters and statistics).
124
125
126==================================================================================*/
127
128#define MASTER_CLOCK    XTAL_14MHz
129#define CPU_CLOCK      (MASTER_CLOCK/4)
130#define SND_CLOCK      (MASTER_CLOCK/8)
131
25132#include "emu.h"
26133#include "cpu/z80/z80.h"
27134#include "machine/6821pia.h"
28135#include "video/mc6845.h"
29136#include "sound/ay8910.h"
137#include "machine/nvram.h"
30138
31139
32140class coinmstr_state : public driver_device
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52160   DECLARE_WRITE8_MEMBER(quizmstr_attr1_w);
53161   DECLARE_WRITE8_MEMBER(quizmstr_attr2_w);
54162   DECLARE_WRITE8_MEMBER(quizmstr_attr3_w);
163   DECLARE_WRITE8_MEMBER(jpcoin2_attr1_w);
164   DECLARE_WRITE8_MEMBER(jpcoin2_attr2_w);
55165   DECLARE_READ8_MEMBER(question_r);
56166   DECLARE_WRITE8_MEMBER(question_w);
57167   DECLARE_READ8_MEMBER(ff_r);
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222332   AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(quizmstr_attr3_w) AM_SHARE("attr_ram3")
223333ADDRESS_MAP_END
224334
335/* 2x 6462 hardware C000-DFFF & E000-FFFF */
336static ADDRESS_MAP_START( jpcoin_map, AS_PROGRAM, 8, coinmstr_state )
337   AM_RANGE(0x0000, 0xbfff) AM_ROM
338   AM_RANGE(0xc000, 0xdfff) AM_RAM      /* 2x 6462 hardware */
339   AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(quizmstr_bg_w) AM_SHARE("videoram")
340   AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(quizmstr_attr1_w) AM_SHARE("attr_ram1")
341   AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(quizmstr_attr2_w) AM_SHARE("attr_ram2")
342   AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(quizmstr_attr3_w) AM_SHARE("attr_ram3")
343ADDRESS_MAP_END
344
345/* 3x 6116 hardware E000-E800, E800-EFFF & F000-F7FF */
346static ADDRESS_MAP_START( jpcoin2_map, AS_PROGRAM, 8, coinmstr_state )
347   AM_RANGE(0x0000, 0xbfff) AM_ROM
348   AM_RANGE(0xc000, 0xdfff) AM_RAM      /* only for the 2x 6462 hardware */
349   AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(quizmstr_bg_w) AM_SHARE("videoram")
350   AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(quizmstr_attr1_w) AM_SHARE("attr_ram1")
351   AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(quizmstr_attr2_w) AM_SHARE("attr_ram2")
352   AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(quizmstr_attr3_w) AM_SHARE("attr_ram3")
353ADDRESS_MAP_END
354
225355// Different I/O mappping for every game
226356
227357static ADDRESS_MAP_START( quizmstr_io_map, AS_IO, 8, coinmstr_state )
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256386ADDRESS_MAP_END
257387
258388static ADDRESS_MAP_START( supnudg2_io_map, AS_IO, 8, coinmstr_state )
389/*
390out 40
391in  40
392in  43
393out 43
394out 42
395
396out 48  CRTC
397out 49  CRTC
398
399in  53
400out 53
401out 52
402out 50
403
404in  69
405out 69
406out 68
407in  6B
408out 6B
409out 6A
410
411out C1
412out C2
413out C3
414
415E0-E1 CRTC
416*/
259417   ADDRESS_MAP_UNMAP_HIGH
260418   ADDRESS_MAP_GLOBAL_MASK(0xff)
261419   AM_RANGE(0x00, 0x00) AM_READ(question_r)
262420   AM_RANGE(0x00, 0x03) AM_WRITE(question_w)
263   AM_RANGE(0x40, 0x41) AM_READNOP
264   AM_RANGE(0x40, 0x43) AM_WRITENOP
265   AM_RANGE(0x43, 0x43) AM_READNOP
266421   AM_RANGE(0x48, 0x48) AM_DEVWRITE("crtc", mc6845_device, address_w)
267422   AM_RANGE(0x49, 0x49) AM_DEVWRITE("crtc", mc6845_device, register_w)
268   AM_RANGE(0x50, 0x51) AM_READNOP
269   AM_RANGE(0x50, 0x53) AM_WRITENOP
270   AM_RANGE(0x53, 0x53) AM_READNOP
271   AM_RANGE(0x68, 0x69) AM_READNOP
272   AM_RANGE(0x68, 0x6b) AM_WRITENOP
273   AM_RANGE(0x6b, 0x6b) AM_READNOP
423   AM_RANGE(0x40, 0x43) AM_DEVREADWRITE("pia0", pia6821_device, read, write)
424   AM_RANGE(0x50, 0x53) AM_DEVREADWRITE("pia1", pia6821_device, read, write)
425   AM_RANGE(0x68, 0x6b) AM_DEVREADWRITE("pia2", pia6821_device, read, write)
274426   AM_RANGE(0x78, 0x79) AM_DEVWRITE("aysnd", ay8910_device, address_data_w)
275427   AM_RANGE(0x79, 0x79) AM_DEVREAD("aysnd", ay8910_device, data_r)
276428   AM_RANGE(0xc0, 0xc1) AM_READNOP
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278430ADDRESS_MAP_END
279431
280432static ADDRESS_MAP_START( pokeroul_io_map, AS_IO, 8, coinmstr_state )
433/*
434out 68
435in  69
436
437in  6B
438out 6B
439out 6A
440
441in  59
442out 59
443out 58
444out 5B
445out 5A
446
447in  7B
448out 7B
449out 7A
450
451E0-E1 CRTC
452*/
281453   ADDRESS_MAP_GLOBAL_MASK(0xff)
282454   AM_RANGE(0x40, 0x40) AM_DEVWRITE("crtc", mc6845_device, address_w)
283455   AM_RANGE(0x41, 0x41) AM_DEVWRITE("crtc", mc6845_device, register_w)
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289461   AM_RANGE(0xc0, 0xc1) AM_READ(ff_r)  /* needed to boot */
290462ADDRESS_MAP_END
291463
464static ADDRESS_MAP_START( jpcoin_io_map, AS_IO, 8, coinmstr_state )
465/*
466out C0
467in  C1
292468
469in  C8
470out CA
471
472in  D0
473out D1
474out D2
475
476in  DA
477out DA
478
479E0-E1 CRTC
480*/
481   ADDRESS_MAP_GLOBAL_MASK(0xff)
482   AM_RANGE(0xe0, 0xe0) AM_DEVWRITE("crtc", mc6845_device, address_w)           /* confirmed */
483   AM_RANGE(0xe1, 0xe1) AM_DEVWRITE("crtc", mc6845_device, register_w)          /* confirmed */
484   AM_RANGE(0xc0, 0xc1) AM_DEVWRITE("aysnd", ay8910_device, address_data_w)
485   AM_RANGE(0xc1, 0xc1) AM_DEVREAD("aysnd", ay8910_device, data_r)
486   AM_RANGE(0xc8, 0xcb) AM_DEVREADWRITE("pia0", pia6821_device, read, write)    /* confirmed */
487   AM_RANGE(0xd0, 0xd3) AM_DEVREADWRITE("pia1", pia6821_device, read, write)
488   AM_RANGE(0xd8, 0xdb) AM_DEVREADWRITE("pia2", pia6821_device, read, write)    /* confirmed */
489//   AM_RANGE(0xc0, 0xc1) AM_READ(ff_r)  /* needed to boot */
490   AM_RANGE(0xc4, 0xc4) AM_READ(ff_r)  /* needed to boot */
491ADDRESS_MAP_END
492
493static ADDRESS_MAP_START( jpcoin2_io_map, AS_IO, 8, coinmstr_state )
494   ADDRESS_MAP_GLOBAL_MASK(0xff)
495   AM_RANGE(0xe0, 0xe0) AM_DEVWRITE("crtc", mc6845_device, address_w)           /* confirmed */
496   AM_RANGE(0xe1, 0xe1) AM_DEVWRITE("crtc", mc6845_device, register_w)          /* confirmed */
497   AM_RANGE(0xc0, 0xc1) AM_DEVWRITE("aysnd", ay8910_device, address_data_w)     /* confirmed */
498   AM_RANGE(0xc1, 0xc1) AM_DEVREAD("aysnd", ay8910_device, data_r)              /* confirmed */
499   AM_RANGE(0xc8, 0xcb) AM_DEVREADWRITE("pia0", pia6821_device, read, write)    /* confirmed */
500   AM_RANGE(0xd0, 0xd3) AM_DEVREADWRITE("pia1", pia6821_device, read, write)    /* confirmed */
501   AM_RANGE(0xd8, 0xdb) AM_DEVREADWRITE("pia2", pia6821_device, read, write)    /* confirmed */
502ADDRESS_MAP_END
503
504
293505static INPUT_PORTS_START( quizmstr )
294506   PORT_START("PIA0.A")
295507   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
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608820   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
609821INPUT_PORTS_END
610822
611static INPUT_PORTS_START( supnudg2 )
823static INPUT_PORTS_START( supnudg2 )   /* need to find the button 'B' to be playable */
612824   PORT_START("PIA0.A")
613   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
614   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
615   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
616   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 )
825   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )   PORT_NAME("1 Pound (5 credits)")   // coin x 5
826   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )   PORT_NAME("50 Pence (2.5 credits)")   // coin x 2.5
827   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )   PORT_NAME("20 Pence (1 credit)")   // coin x 1
828   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 )   PORT_NAME("10 Pence (0.5 credit)")   // coin x 0.5
829   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER )  PORT_CODE(KEYCODE_A)  PORT_NAME("PIA0.A_0x10")
830   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER )  PORT_CODE(KEYCODE_S)  PORT_NAME("PIA0.A_0x20")
831   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER )  PORT_CODE(KEYCODE_D)  PORT_NAME("PIA0.A_0x40")
832   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER )  PORT_CODE(KEYCODE_F)  PORT_NAME("PIA0.A_0x80")
833
834   PORT_START("PIA1.A")
835   PORT_DIPNAME( 0x01, 0x01, "PIA1.A" )
836   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
837   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
838   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
839   PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
840   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
841   PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
842   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
843   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
844   PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
845   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
846   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
617847   PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
618848   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
619849   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
620   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 )
850   PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
851   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
852   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
621853   PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
622854   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
623855   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
624   PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
856   PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
857   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
858   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
625859
626   PORT_START("PIA0.B")
627   PORT_DIPNAME( 0x01, 0x01, "PIA0.B" )
860   PORT_START("PIA2.A")
861   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 )  PORT_CODE(KEYCODE_N)  PORT_NAME("Pass")
862   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 )  PORT_CODE(KEYCODE_Z)  PORT_NAME("Button A")
863   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 )  PORT_CODE(KEYCODE_C)  PORT_NAME("Button C")
864   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )   PORT_CODE(KEYCODE_1)  PORT_NAME("Start")
865   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE )  PORT_CODE(KEYCODE_T)  PORT_NAME("Test/Check Question Board")
866   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE )  PORT_CODE(KEYCODE_0)  PORT_NAME("Short Term Meters")  PORT_TOGGLE
867   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE )  PORT_CODE(KEYCODE_9)  PORT_NAME("Refill")             PORT_TOGGLE
868   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER )    PORT_CODE(KEYCODE_Q)  PORT_NAME("Remote Credits x5")
869
870   PORT_START("DSW1")
871   PORT_DIPNAME( 0x01, 0x01, "4" )
628872   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
629873   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
630874   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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633877   PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
634878   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
635879   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
636   PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
880   PORT_DIPNAME( 0x08, 0x08, "Tests?" )
637881   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
638882   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
639883   PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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642886   PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
643887   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
644888   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
645   PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
889   PORT_DIPNAME( 0x40, 0x40, "NVRAM Reset?" )
646890   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
647891   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
648   PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
892   PORT_DIPNAME( 0x80, 0x80, "First Install (DIL 8)" )
649893   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
650894   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
895INPUT_PORTS_END
651896
652   PORT_START("PIA1.A")
653   PORT_DIPNAME( 0x01, 0x01, "PIA1.A" )
897static INPUT_PORTS_START( pokeroul )
898   PORT_START("PIA0.A")
899   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Cancel / Collect")                           PORT_CODE(KEYCODE_N)
900   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Hold 1 & 5 (auto?)")                         PORT_CODE(KEYCODE_Z)
901   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Hold 2 / Bet / Half Gamble / Previous Hand") PORT_CODE(KEYCODE_X)
902   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Deal / Draw / Gamble")                       PORT_CODE(KEYCODE_1)
903   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Auto Hold")                                  PORT_CODE(KEYCODE_M)
904   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Short Term Meters")              PORT_TOGGLE PORT_CODE(KEYCODE_0)
905   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Refill Mode")                    PORT_TOGGLE PORT_CODE(KEYCODE_9)
906   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER )   PORT_NAME("0-8")                                        PORT_CODE(KEYCODE_S)
907
908   PORT_START("PIA0.B")
909   PORT_DIPNAME( 0x01, 0x01, "PIA0.B" )
654910   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
655911   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
656912   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
r29337r29338
675931   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
676932   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
677933
934   PORT_START("PIA1.A")
935   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE (2)
936   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE (2)
937   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER )   PORT_NAME("PIA1.A_3")                                        PORT_CODE(KEYCODE_Q)
938   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER )   PORT_NAME("PIA1.A_4")                                        PORT_CODE(KEYCODE_W)
939   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER )   PORT_NAME("PIA1.A_5")                                        PORT_CODE(KEYCODE_E)
940   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER )   PORT_NAME("PIA1.A_6")                                        PORT_CODE(KEYCODE_R)
941   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER )   PORT_NAME("PIA1.A_7")                                        PORT_CODE(KEYCODE_T)
942   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER )   PORT_NAME("PIA1.A_8")                                        PORT_CODE(KEYCODE_Y)
943
678944   PORT_START("PIA1.B")
679945   PORT_DIPNAME( 0x01, 0x01, "PIA1.B" )
680946   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
r29337r29338
702968   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
703969
704970   PORT_START("PIA2.A")
705   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
706   PORT_DIPNAME( 0x02, 0x02, "1" )
971   PORT_DIPNAME( 0x01, 0x01, "PIA2.A" )
972   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
973   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
974   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
707975   PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
708976   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
709977   PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
710978   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
711979   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
712   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Cont")
713   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Pass")
714   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Sel")
715   PORT_DIPNAME( 0x40, 0x40, "Show Refill?" )
980   PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
981   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
982   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
983   PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
984   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
985   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
986   PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
987   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
988   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
989   PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
716990   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
717991   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
718   PORT_DIPNAME( 0x80, 0x80, "Show Stats?" )
992   PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
719993   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
720994   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
721
995/*   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
996   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
997   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
998   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
999   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1000   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1001   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1002   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1003*/
7221004   PORT_START("PIA2.B")
7231005   PORT_DIPNAME( 0x01, 0x01, "PIA2.B" )
7241006   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
r29337r29338
7461028   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
7471029
7481030   PORT_START("DSW1")
749   PORT_DIPNAME( 0x01, 0x01, "4" )
1031   PORT_DIPNAME( 0x01, 0x01, "DSW1" )
7501032   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
7511033   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
7521034   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
r29337r29338
7551037   PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
7561038   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
7571039   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
758   PORT_DIPNAME( 0x08, 0x08, "Tests?" )
1040   PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
7591041   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
7601042   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
7611043   PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
r29337r29338
7641046   PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
7651047   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
7661048   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
767   PORT_DIPNAME( 0x40, 0x40, "NVRAM Reset?" )
1049   PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
7681050   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
7691051   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
770   PORT_DIPNAME( 0x80, 0x80, "First Install (DIL 8)" )
1052   PORT_DIPNAME( 0x80, 0x80, "Factory Install Switch" )
7711053   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
7721054   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
7731055INPUT_PORTS_END
7741056
775static INPUT_PORTS_START( pokeroul )
1057static INPUT_PORTS_START( jpcoin )
7761058   PORT_START("PIA0.A")
777   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Cancel / Collect")                           PORT_CODE(KEYCODE_N)
778   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Hold 1 & 5 (auto?)")                         PORT_CODE(KEYCODE_Z)
779   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Hold 2 / Bet / Half Gamble / Previous Hand") PORT_CODE(KEYCODE_X)
780   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Deal / Draw / Gamble")                       PORT_CODE(KEYCODE_1)
781   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Auto Hold")                                  PORT_CODE(KEYCODE_M)
782   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Short Term Meters")              PORT_TOGGLE PORT_CODE(KEYCODE_0)
783   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Refill Mode")                    PORT_TOGGLE PORT_CODE(KEYCODE_9)
784   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER )   PORT_NAME("0-8")                                        PORT_CODE(KEYCODE_S)
1059   PORT_DIPNAME( 0x01, 0x01, "PIA0.A" )
1060   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
1061   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1062   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
1063   PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
1064   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1065   PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1066   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
1067   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1068   PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
1069   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
1070   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1071   PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
1072   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
1073   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1074   PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1075   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
1076   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1077   PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
1078   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
1079   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1080   PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
1081   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
1082   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
7851083
7861084   PORT_START("PIA0.B")
7871085   PORT_DIPNAME( 0x01, 0x01, "PIA0.B" )
r29337r29338
8101108   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
8111109
8121110   PORT_START("PIA1.A")
813   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE (2)
814   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE (2)
815   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
816   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
817   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
818   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
819   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
820   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
821
822   PORT_START("PIA1.B")
823   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
824   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
825   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
826   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
827   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
828   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
829   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
830   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
831
832   PORT_START("PIA2.A")
833   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
834   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
835   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
836   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
837   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
838   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
839   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
840   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
841
842   PORT_START("PIA2.B")
843   PORT_DIPNAME( 0x01, 0x01, "PIA2.B" )
1111   PORT_DIPNAME( 0x01, 0x01, "PIA1.A" )
8441112   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
8451113   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
8461114   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
r29337r29338
8651133   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
8661134   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
8671135
868   PORT_START("DSW1")
869   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
1136   PORT_START("PIA1.B")
1137   PORT_DIPNAME( 0x01, 0x01, "PIA1.B" )
8701138   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
8711139   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
8721140   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
r29337r29338
8871155   PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
8881156   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
8891157   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
890   PORT_DIPNAME( 0x80, 0x80, "Factory Install Switch" )
1158   PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
8911159   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
8921160   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
893INPUT_PORTS_END
8941161
895static INPUT_PORTS_START( jpcoin2 )
896   PORT_START("PIA0.A")
897   PORT_DIPNAME( 0x01, 0x01, "PIA0.A" )
1162   PORT_START("PIA2.A")
1163   PORT_DIPNAME( 0x01, 0x01, "PIA2.A" )
8981164   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
8991165   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
9001166   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
r29337r29338
9191185   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
9201186   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
9211187
922   PORT_START("PIA0.B")
923   PORT_DIPNAME( 0x01, 0x01, "PIA0.B" )
1188   PORT_START("PIA2.B")
1189   PORT_DIPNAME( 0x01, 0x01, "PIA2.B" )
9241190   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
9251191   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
9261192   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
r29337r29338
9451211   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
9461212   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
9471213
948   PORT_START("PIA1.A")
949   PORT_DIPNAME( 0x01, 0x01, "PIA1.A" )
950   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
951   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
952   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
1214   PORT_START("DSW1")
1215   PORT_DIPNAME( 0x01, 0x01, "Minimal Hand" )
1216   PORT_DIPSETTING(    0x01, "Jacks or Better" )
1217   PORT_DIPSETTING(    0x00, "Pair of Aces" )
1218   PORT_DIPNAME( 0x02, 0x02, "DSW1" )
9531219   PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
9541220   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
9551221   PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
r29337r29338
9711237   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
9721238   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
9731239
974   PORT_START("PIA1.B")
975   PORT_DIPNAME( 0x01, 0x01, "PIA1.B" )
1240INPUT_PORTS_END
1241
1242static INPUT_PORTS_START( jpcoin2 )
1243   PORT_START("PIA0.A")
1244   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 )    PORT_NAME("Hold 1")
1245   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK )   PORT_NAME("Bookkeeping")  PORT_TOGGLE
1246   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_NAME("credits x10")  // credits x10
1247   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_NAME("credits x1")   // credits x1
1248   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_NAME("credits x5")   // credits x5
1249   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN )   PORT_NAME("Remote x100")
1250   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )         PORT_NAME("Deal/Start")
1251   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD5 )    PORT_NAME("Hold 5")
1252
1253   PORT_START("PIA0.B")
1254   PORT_DIPNAME( 0x01, 0x01, "PIA0.B" )
9761255   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
9771256   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
9781257   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
r29337r29338
9971276   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
9981277   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
9991278
1000   PORT_START("PIA2.A")
1001   PORT_DIPNAME( 0x01, 0x01, "PIA2.A" )
1279   PORT_START("PIA1.A")
1280   PORT_DIPNAME( 0x01, 0x01, "PIA1.A" )
10021281   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
10031282   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
10041283   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
r29337r29338
10231302   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
10241303   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
10251304
1026   PORT_START("PIA2.B")
1027   PORT_DIPNAME( 0x01, 0x01, "PIA2.B" )
1305   PORT_START("PIA1.B")
1306   PORT_DIPNAME( 0x01, 0x01, "PIA1.B" )
10281307   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
10291308   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
10301309   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
r29337r29338
10491328   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
10501329   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
10511330
1052   PORT_START("DSW1")
1053   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
1331   PORT_START("PIA2.A")
1332   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD4 )    PORT_NAME("Hold 4")
1333   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD3 )    PORT_NAME("Hold 3")
1334   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD2 )    PORT_NAME("Hold 2")
1335   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_LOW )     PORT_NAME("Low")     PORT_CODE(KEYCODE_S)
1336   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH )    PORT_NAME("High")    PORT_CODE(KEYCODE_A)
1337   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_POKER_CANCEL )   PORT_NAME("Cancel")
1338   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT )  PORT_NAME("Key Out")
1339   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BET )     PORT_NAME("Bet")     PORT_IMPULSE(2)
1340
1341   PORT_START("PIA2.B")
1342   PORT_DIPNAME( 0x01, 0x01, "PIA2.B" )
10541343   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
10551344   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
10561345   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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10711360   PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
10721361   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
10731362   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1074   PORT_DIPNAME( 0x80, 0x80, "Factory Install Switch" )
1363   PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
10751364   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
10761365   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1366
1367   PORT_START("DSW1")
1368   PORT_DIPNAME( 0x01, 0x01, "Minimum Hand" )
1369   PORT_DIPSETTING(    0x01, "Pair of Aces" )
1370   PORT_DIPSETTING(    0x00, "Jacks or Better" )
1371   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
1372   PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
1373   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1374   PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
1375   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
1376   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1377   PORT_DIPNAME( 0x08, 0x08, "Bookkeeping Type" )
1378   PORT_DIPSETTING(    0x08, "Weekly Meters" )
1379   PORT_DIPSETTING(    0x00, "Meter Totals" )
1380   PORT_DIPNAME( 0x10, 0x10, "Bonus 7s and 9s" )
1381   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
1382   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1383   PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
1384   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
1385   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1386   PORT_DIPNAME( 0x40, 0x40, "Factory Install Switch (Erase Meter Totals)" )
1387   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
1388   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1389   PORT_DIPNAME( 0x80, 0x80, "Test Mode" )
1390   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
1391   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1392
10771393INPUT_PORTS_END
10781394
1395
10791396static const gfx_layout charlayout =
10801397{
10811398   8,8,
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11461463
11471464
11481465static MACHINE_CONFIG_START( coinmstr, coinmstr_state )
1149   MCFG_CPU_ADD("maincpu",Z80,8000000) // ?
1466   MCFG_CPU_ADD("maincpu", Z80, CPU_CLOCK) // 7 MHz.
11501467   MCFG_CPU_PROGRAM_MAP(coinmstr_map)
11511468   MCFG_CPU_VBLANK_INT_DRIVER("screen", coinmstr_state,  irq0_line_hold)
11521469
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11741491   MCFG_GFXDECODE_ADD("gfxdecode", "palette", coinmstr)
11751492   MCFG_PALETTE_ADD("palette", 46*32*4)
11761493
1177
11781494   MCFG_MC6845_ADD("crtc", H46505, "screen", 14000000 / 16, h46505_intf)
11791495
11801496   /* sound hardware */
11811497   MCFG_SPEAKER_STANDARD_MONO("mono")
11821498
1183   MCFG_SOUND_ADD("aysnd", AY8910, 1500000)
1499   MCFG_SOUND_ADD("aysnd", AY8910, SND_CLOCK)
11841500   MCFG_SOUND_CONFIG(ay8912_interface)
11851501   MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
11861502MACHINE_CONFIG_END
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12051521   MCFG_CPU_IO_MAP(pokeroul_io_map)
12061522MACHINE_CONFIG_END
12071523
1524static MACHINE_CONFIG_DERIVED( jpcoin, coinmstr )
1525   MCFG_CPU_MODIFY("maincpu")
1526   MCFG_CPU_PROGRAM_MAP(jpcoin_map)
1527   MCFG_CPU_IO_MAP(jpcoin_io_map)
1528//   MCFG_NVRAM_ADD_0FILL("attr_ram3")
1529MACHINE_CONFIG_END
1530
1531static MACHINE_CONFIG_DERIVED( jpcoin2, coinmstr )
1532   MCFG_CPU_MODIFY("maincpu")
1533   MCFG_CPU_PROGRAM_MAP(jpcoin2_map)
1534   MCFG_CPU_IO_MAP(jpcoin2_io_map)
1535//   MCFG_NVRAM_ADD_0FILL("attr_ram3")
1536MACHINE_CONFIG_END
1537
12081538/*
12091539
12101540Quizmaster
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13591689   ROM_LOAD( "027c1.01_e14.7.88.ic23", 0x8000, 0x8000, CRC(71e5a2fc) SHA1(c28efcea1cf6c9872e70ff191932e3cdb5618917) )
13601690ROM_END
13611691
1692/*
1693 Looks like the 2x 6264, since checks C000-DFFF
1694 
1695 BP 1D0 (PIAS init)
1696 BP 1102 (calls)
1697 
1698 Output C0
1699 Input C1
1700 
1701 Input C8
1702 Output C9 (masked)
1703 Output CA
1704 
1705 Input D0
1706 Output D1
1707 Output D2
1708 Input D3
1709 Output DA
1710 
1711 Output E0  CRTC
1712 Output E1  CRTC
13621713
1714*/
13631715ROM_START( jpcoin )
13641716   ROM_REGION( 0x10000, "maincpu", 0 )
13651717   ROM_LOAD( "2.bin", 0x0000, 0x2000, CRC(67e1aa60) SHA1(32301f60a7325f23047d84bb1e9416ea05753493) )
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13711723ROM_END
13721724
13731725/*
1374unknown... seems joker poker from Coinmaster.
1726Joker Poker from Coinmaster.
13751727It boots to an error screen, seems that PIAs are mapped at different offsets
1376will take a look later...
1728
1729Original Coinmaster PCB
1730Silkscreened: COINMASTER (c) 1884
1731and VIDEO BOARD STOCK No PCB-001-POK
1732
17331x SGS Z8400AB1 (Z80 A CPU).
17341x MC68A45P CRTC
17353x HD68B21P PIAs.
1736
17373x Hitachi HM6116 (2048 X 8bit) RAM
1738
17391x AY-3-8912.
17401x LM380 AMP
1741
17421x 3.6 Volts, 100 mAh battery.
17431x 8 DIP switches bank.
17441x 14 MHz. Xtal.
1745
1746CPU CLK 3.5Mhz               14/4
1747AY3-89-12 CLK 1.75Mhz        14/8
1748
13771749*/
13781750
13791751ROM_START( jpcoin2 )
13801752   ROM_REGION( 0x10000, "maincpu", 0 )
13811753   ROM_LOAD( "jp88-1.ic9", 0x0000, 0x4000, CRC(60d31daf) SHA1(204537887388f1a174d1a09331186182be31e8ee) )
13821754
1383   ROM_REGION( 0x8000, "gfx1", 0 )
1755   ROM_REGION( 0x4000, "gfx1", 0 )
13841756   ROM_LOAD( "jp88-3.ic45", 0x0000, 0x2000, CRC(f2f92a7e) SHA1(ce6f6fd5af0049269357527650b51a1016caf636) )
13851757   ROM_LOAD( "jp88-2.ic41", 0x2000, 0x2000, CRC(57db61b2) SHA1(a3bc2056866cbb9fdca52e62f2ff4a952d1d7484) )
13861758ROM_END
13871759
13881760
1761/*************************
1762*      Driver Init       *
1763*************************/
1764
13891765DRIVER_INIT_MEMBER(coinmstr_state,coinmstr)
13901766{
13911767   UINT8 *rom = memregion("user1")->base();
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14031779}
14041780
14051781
1782/*************************
1783*      Game Drivers      *
1784*************************/
14061785
1407
1408GAME( 1985, quizmstr, 0, quizmstr, quizmstr, coinmstr_state, coinmstr, ROT0, "Loewen Spielautomaten", "Quizmaster (German)",            GAME_UNEMULATED_PROTECTION )
1409GAME( 1987, trailblz, 0, trailblz, trailblz, coinmstr_state, coinmstr, ROT0, "Coinmaster",            "Trail Blazer",                   GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) // or Trail Blazer 2 ?
1410GAME( 1989, supnudg2, 0, supnudg2, supnudg2, coinmstr_state, coinmstr, ROT0, "Coinmaster",            "Super Nudger II (Version 5.21)", GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
1411GAME( 1990, pokeroul, 0, pokeroul, pokeroul, driver_device,  0,        ROT0, "Coinmaster",            "Poker Roulette (Version 8.22)",  GAME_NOT_WORKING )
1412GAME( 1990, jpcoin,   0, pokeroul, pokeroul, driver_device,  0,        ROT0, "Coinmaster",            "Joker Poker (Coinmaster set 1)", GAME_NOT_WORKING ) // io stuff is different at least
1413GAME( 1990, jpcoin2,  0, pokeroul, jpcoin2,  driver_device,  0,        ROT0, "Coinmaster",            "Joker Poker (Coinmaster set 2)", GAME_NOT_WORKING )
1786/*    YEAR  NAME      PARENT    MACHINE   INPUT     STATE           INIT      ROT    COMPANY                  FULLNAME                                   FLAGS   */
1787GAME( 1985, quizmstr, 0,        quizmstr, quizmstr, coinmstr_state, coinmstr, ROT0, "Loewen Spielautomaten", "Quizmaster (German)",                      GAME_UNEMULATED_PROTECTION )
1788GAME( 1987, trailblz, 0,        trailblz, trailblz, coinmstr_state, coinmstr, ROT0, "Coinmaster",            "Trail Blazer",                             GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) // or Trail Blazer 2 ?
1789GAME( 1989, supnudg2, 0,        supnudg2, supnudg2, coinmstr_state, coinmstr, ROT0, "Coinmaster",            "Super Nudger II - P173 (Version 5.21)",    GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
1790GAME( 1990, pokeroul, 0,        pokeroul, pokeroul, driver_device,  0,        ROT0, "Coinmaster",            "Poker Roulette (Version 8.22)",            GAME_NOT_WORKING )
1791GAME( 1985, jpcoin,   0,        jpcoin ,  jpcoin,   driver_device,  0,        ROT0, "Coinmaster",            "Joker Poker (Coinmaster set 1)",           GAME_NOT_WORKING ) // io stuff is different at least
1792GAME( 1990, jpcoin2,  0,        jpcoin2,  jpcoin2,  driver_device,  0,        ROT0, "Coinmaster",            "Joker Poker (Coinmaster, Amusement Only)", 0 )
branches/new_menus/src/mame/drivers/namcos12.c
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10531053public:
10541054   namcos12_state(const machine_config &mconfig, device_type type, const char *tag)
10551055      : driver_device(mconfig, type, tag),
1056      m_rtc(*this, "rtc"),
1057      m_settings(*this, "namco_settings"),
1058      m_sharedram(*this, "sharedram"),
10591056      m_maincpu(*this, "maincpu"),
10601057      m_ram(*this, "maincpu:ram"),
10611058      m_sub(*this, "sub"),
1062      m_adc(*this, "sub:adc")
1063   {
1064   }
1059      m_adc(*this, "sub:adc"),
1060      m_rtc(*this, "rtc"),
1061      m_settings(*this, "namco_settings"),
1062      m_sharedram(*this, "sharedram")
1063   { }
10651064
1065   required_device<psxcpu_device> m_maincpu;
1066   required_device<ram_device> m_ram;
1067   required_device<h83002_device> m_sub;
1068   required_device<h8_adc_device> m_adc;
10661069   required_device<rtc4543_device> m_rtc;
10671070   required_device<namco_settings_device> m_settings;
10681071   required_shared_ptr<UINT16> m_sharedram;
1072
10691073   UINT16 m_n_bankoffset;
1070
10711074   UINT32 m_n_dmaoffset;
10721075   UINT32 m_n_tektagdmaoffset;
10731076   int m_has_tektagt_dma;
10741077
10751078   int m_ttt_cnt;
10761079   UINT32 m_ttt_val[2];
1077
10781080   int m_s12_porta;
10791081   int m_s12_lastpB;
1082
10801083   DECLARE_WRITE16_MEMBER(sharedram_w);
10811084   DECLARE_READ16_MEMBER(sharedram_r);
10821085   DECLARE_WRITE16_MEMBER(bankoffset_w);
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10961099   DECLARE_WRITE16_MEMBER(s12_mcu_portB_w);
10971100   DECLARE_READ16_MEMBER(s12_mcu_gun_h_r);
10981101   DECLARE_READ16_MEMBER(s12_mcu_gun_v_r);
1102
10991103   DECLARE_DRIVER_INIT(namcos12);
11001104   DECLARE_DRIVER_INIT(ptblank2);
1101   DECLARE_MACHINE_RESET(namcos12);
11021105   inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
11031106   void namcos12_rom_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size );
11041107   void namcos12_sub_irq( screen_device &screen, bool vblank_state );
1105   required_device<psxcpu_device> m_maincpu;
1106   required_device<ram_device> m_ram;
1107   required_device<h83002_device> m_sub;
1108   required_device<h8_adc_device> m_adc;
1108
1109protected:
1110   virtual void machine_reset();
11091111};
11101112
11111113inline void ATTR_PRINTF(3,4) namcos12_state::verboselog( int n_level, const char *s_fmt, ... )
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12311233
12321234void namcos12_state::namcos12_sub_irq( screen_device &screen, bool vblank_state )
12331235{
1234   m_sub->set_input_line(1, vblank_state);
1236   m_sub->set_input_line(1, vblank_state ? ASSERT_LINE : CLEAR_LINE);
12351237   m_adc->adtrg_w(vblank_state);
12361238   m_s12_lastpB = (m_s12_lastpB & 0x7f) | (vblank_state << 7);
12371239}
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12621264
12631265WRITE16_MEMBER(namcos12_state::system11gun_w)
12641266{
1265   switch( offset )
1267   switch (offset)
12661268   {
12671269   case 0:
12681270      /* blowback 1 */
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12891291{
12901292   UINT16 data = 0;
12911293
1292   switch( offset )
1294   switch (offset)
12931295   {
12941296   case 0:
12951297      data = ioport("LIGHT0_X")->read();
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13001302      break;
13011303
13021304   case 3:
1303         data = ioport("LIGHT0_Y")->read() + 1;
1305      data = ioport("LIGHT0_Y")->read() + 1;
13041306      break;
13051307
13061308   case 4:
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13231325{
13241326   // Second dma offset or protection ref values write
13251327
1326   switch(offset)
1328   switch (offset)
13271329   {
13281330   case 0:
13291331      m_n_tektagdmaoffset = data;
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13421344
13431345READ16_MEMBER(namcos12_state::tektagt_protection_1_r)
13441346{
1345   switch(offset)
1347   switch (offset)
13461348   {
13471349   case 0:
13481350      // Reads are either ignored or bit 15 is tested for a busy flag
13491351      return 0x8000;
1352   case 1:
1353      break;
13501354   }
13511355
13521356   return 0;
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13541358
13551359WRITE16_MEMBER(namcos12_state::tektagt_protection_2_w)
13561360{
1357   switch( offset )
1361   switch (offset)
13581362   {
13591363   case 0:
13601364      // Writes are 0 or rand(), only used as a "start prot value write" trigger
13611365      m_ttt_cnt = 0;
1366      break;
1367   case 1:
1368      break;
13621369   }
13631370}
13641371
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14031410   return 0;
14041411}
14051412
1406MACHINE_RESET_MEMBER(namcos12_state,namcos12)
1413void namcos12_state::machine_reset()
14071414{
14081415   address_space &space = m_maincpu->space(AS_PROGRAM);
14091416   bankoffset_w(space,0,0,0xffff);
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14891496   m_settings->ce_w((m_s12_lastpB & 0x20) && !(m_s12_porta & 1));
14901497}
14911498
1499static ADDRESS_MAP_START( s12h8iomap, AS_IO, 16, namcos12_state )
1500   AM_RANGE(h8_device::PORT_7, h8_device::PORT_7) AM_READ_PORT("DSW")
1501   AM_RANGE(h8_device::PORT_8, h8_device::PORT_8) AM_READ(s12_mcu_p8_r ) AM_WRITENOP
1502   AM_RANGE(h8_device::PORT_A, h8_device::PORT_A) AM_READWRITE(s12_mcu_pa_r, s12_mcu_pa_w )
1503   AM_RANGE(h8_device::PORT_B, h8_device::PORT_B) AM_READWRITE(s12_mcu_portB_r, s12_mcu_portB_w )
1504   AM_RANGE(h8_device::ADC_0, h8_device::ADC_0) AM_NOP
1505   AM_RANGE(h8_device::ADC_1, h8_device::ADC_1) AM_NOP
1506   AM_RANGE(h8_device::ADC_2, h8_device::ADC_2) AM_NOP
1507   AM_RANGE(h8_device::ADC_3, h8_device::ADC_3) AM_NOP
1508ADDRESS_MAP_END
1509
1510
14921511/* Golgo 13 lightgun inputs
14931512 *
14941513 * Note: The H8/3002's ADC is 10 bits wide, but
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14981517
14991518READ16_MEMBER(namcos12_state::s12_mcu_gun_h_r)
15001519{
1501   ioport_port *port = ioport("LIGHT0_X");
1502   if( port != NULL )
1503      return port->read() << 2;
1504
1505   // if game has no lightgun ports, return 0
1506   return 0;
1520   return ioport("LIGHT0_X")->read() << 2;
15071521}
15081522
15091523READ16_MEMBER(namcos12_state::s12_mcu_gun_v_r)
15101524{
1511   ioport_port *port = ioport("LIGHT0_Y");
1512   if( port != NULL )
1513      return port->read() << 2;
1514
1515   // if game has no lightgun ports, return 0
1516   return 0;
1525   return ioport("LIGHT0_Y")->read() << 2;
15171526}
15181527
1519static ADDRESS_MAP_START( s12h8iomap, AS_IO, 16, namcos12_state )
1520   AM_RANGE(h8_device::PORT_7, h8_device::PORT_7) AM_READ_PORT("DSW")
1521   AM_RANGE(h8_device::PORT_8, h8_device::PORT_8) AM_READ(s12_mcu_p8_r ) AM_WRITENOP
1522   AM_RANGE(h8_device::PORT_A, h8_device::PORT_A) AM_READWRITE(s12_mcu_pa_r, s12_mcu_pa_w )
1523   AM_RANGE(h8_device::PORT_B, h8_device::PORT_B) AM_READWRITE(s12_mcu_portB_r, s12_mcu_portB_w )
1524   AM_RANGE(h8_device::ADC_0, h8_device::ADC_0) AM_NOP
1525   AM_RANGE(h8_device::ADC_1, h8_device::ADC_1) AM_READ(s12_mcu_gun_h_r )  // golgo 13 gun X-axis
1526   AM_RANGE(h8_device::ADC_2, h8_device::ADC_2) AM_READ(s12_mcu_gun_v_r )  // golgo 13 gun Y-axis
1527   AM_RANGE(h8_device::ADC_3, h8_device::ADC_3) AM_NOP
1528static ADDRESS_MAP_START( golgo13_h8iomap, AS_IO, 16, namcos12_state )
1529   AM_RANGE(h8_device::ADC_1, h8_device::ADC_1) AM_READ(s12_mcu_gun_h_r )
1530   AM_RANGE(h8_device::ADC_2, h8_device::ADC_2) AM_READ(s12_mcu_gun_v_r )
1531
1532   AM_IMPORT_FROM( s12h8iomap )
15281533ADDRESS_MAP_END
15291534
1535
15301536DRIVER_INIT_MEMBER(namcos12_state,namcos12)
15311537{
15321538   membank("bank1")->configure_entries(0, memregion( "user2" )->bytes() / 0x200000, memregion( "user2" )->base(), 0x200000 );
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15521558}
15531559
15541560static MACHINE_CONFIG_START( coh700, namcos12_state )
1561
15551562   /* basic machine hardware */
1556   MCFG_CPU_ADD( "maincpu", CXD8661R, XTAL_100MHz )
1563   MCFG_CPU_ADD("maincpu", CXD8661R, XTAL_100MHz)
15571564   MCFG_CPU_PROGRAM_MAP( namcos12_map)
15581565
15591566   MCFG_RAM_MODIFY("maincpu:ram")
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15611568
15621569   MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( namcos12_state::namcos12_rom_read ), (namcos12_state *) owner ) )
15631570
1564   MCFG_CPU_ADD("sub", H83002, 16737350 )
1571   MCFG_CPU_ADD("sub", H83002, 16737350)
15651572   MCFG_CPU_PROGRAM_MAP(s12h8rwmap)
15661573   MCFG_CPU_IO_MAP(s12h8iomap)
15671574
1568   MCFG_MACHINE_RESET_OVERRIDE(namcos12_state, namcos12)
1569
15701575   MCFG_NAMCO_SETTINGS_ADD("namco_settings")
15711576
15721577   MCFG_RTC4543_ADD("rtc", XTAL_32_768kHz)
r29337r29338
15891594   /* sound hardware */
15901595   MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
15911596
1592   MCFG_C352_ADD("c352", 16737350*1.5 ) // measured at 29.168MHz, but that's too highpitched
1597   MCFG_C352_ADD("c352", 16737350*1.5) // measured at 29.168MHz, but that's too highpitched
15931598   MCFG_SOUND_ROUTE(0, "rspeaker", 1.00)
15941599   MCFG_SOUND_ROUTE(1, "lspeaker", 1.00)
15951600   MCFG_SOUND_ROUTE(2, "rspeaker", 1.00)
r29337r29338
15971602MACHINE_CONFIG_END
15981603
15991604static MACHINE_CONFIG_DERIVED( ptblank2, coh700 )
1600   MCFG_CPU_MODIFY( "maincpu" )
1605
1606   /* basic machine hardware */
1607   MCFG_CPU_MODIFY("maincpu")
16011608   MCFG_CPU_PROGRAM_MAP( ptblank2_map )
16021609MACHINE_CONFIG_END
16031610
16041611static MACHINE_CONFIG_DERIVED( tektagt, coh700 )
1605   MCFG_CPU_MODIFY( "maincpu" )
1612
1613   /* basic machine hardware */
1614   MCFG_CPU_MODIFY("maincpu")
16061615   MCFG_CPU_PROGRAM_MAP( tektagt_map )
16071616MACHINE_CONFIG_END
16081617
1618static MACHINE_CONFIG_DERIVED( golgo13, coh700 )
16091619
1620   /* basic machine hardware */
1621   MCFG_CPU_MODIFY("sub")
1622   MCFG_CPU_IO_MAP(golgo13_h8iomap)
1623MACHINE_CONFIG_END
1624
1625
16101626static INPUT_PORTS_START( namcos12 )
16111627   PORT_START("DSW")
16121628   PORT_DIPNAME( 0x0080, 0x0080, DEF_STR(Service_Mode) ) PORT_DIPLOCATION( "DIP SW2:1" )
r29337r29338
28352851GAME( 1999, kaiunqz,   0,        coh700,   namcos12, namcos12_state, namcos12, ROT0, "Namco",           "Kaiun Quiz (Japan, KW1/VER.A)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) /* KC050 */
28362852GAME( 1999, pacappsp,  0,        coh700,   namcos12, namcos12_state, namcos12, ROT0, "Produce / Namco", "Paca Paca Passion Special (Japan, PSP1/VER.A)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) /* KC052 */
28372853GAME( 1999, aquarush,  0,        coh700,   namcos12, namcos12_state, namcos12, ROT0, "Namco",           "Aqua Rush (Japan, AQ1/VER.A1)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) /* KC053 */
2838GAME( 1999, golgo13,   0,        coh700,   golgo13,  namcos12_state, namcos12, ROT0, "Eighting / Raizing / Namco", "Golgo 13 (Japan, GLG1/VER.A)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) /* KC054 */
2839GAME( 1999, g13knd,    0,        coh700,   golgo13,  namcos12_state, namcos12, ROT0, "Eighting / Raizing / Namco", "Golgo 13 Kiseki no Dandou (Japan, GLS1/VER.A)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) /* KC059 */
2854GAME( 1999, golgo13,   0,        golgo13,  golgo13,  namcos12_state, namcos12, ROT0, "Eighting / Raizing / Namco", "Golgo 13 (Japan, GLG1/VER.A)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) /* KC054 */
2855GAME( 1999, g13knd,    0,        golgo13,  golgo13,  namcos12_state, namcos12, ROT0, "Eighting / Raizing / Namco", "Golgo 13 Kiseki no Dandou (Japan, GLS1/VER.A)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) /* KC059 */
28402856GAME( 2000, sws2000,   0,        coh700,   namcos12, namcos12_state, namcos12, ROT0, "Namco",           "Super World Stadium 2000 (Japan, SS01/VER.A)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) /* KC055 */
28412857GAME( 2000, truckk,    0,        coh700,   namcos12, namcos12_state, namcos12, ROT0, "Metro / Namco",   "Truck Kyosokyoku (Japan, TKK2/VER.A)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) /* KC056 */
28422858GAME( 2000, kartduel,  0,        coh700,   namcos12, namcos12_state, namcos12, ROT0, "Namco",           "Kart Duel (Japan, KTD1/VER.A)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) /* KC057 */
branches/new_menus/src/mame/drivers/namcos23.c
r29337r29338
22572257
22582258void namcos23_state::sub_irq(screen_device &screen, bool state)
22592259{
2260   m_subcpu->set_input_line(1, state);
2260   m_subcpu->set_input_line(1, state ? ASSERT_LINE : CLEAR_LINE);
22612261   m_adc->adtrg_w(state);
22622262   m_lastpb = (m_lastpb & 0x7f) | (state << 7);
22632263}
Property changes on: branches/new_menus
Modified: svn:mergeinfo
   Merged /trunk:r29328-29334

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