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r29324 Saturday 5th April, 2014 at 17:24:50 UTC by O. Galibert
h8: Implement the 8-bits timers, namcos23 coins work again [O. Galibert]

[src/emu/cpu]	cpu.mak
[src/emu/cpu/h8]	h8.lst h83002.c h83006.c h83006.h h83008.c h83008.h h83048.c h83337.c h83337.h h8_timer8.c h8_timer8.h h8s2245.c h8s2245.h h8s2320.c h8s2320.h h8s2357.c h8s2357.h h8s2655.c h8s2655.h
[src/mame/drivers]	namcos23.c

trunk/src/mame/drivers/namcos23.c

r29323	r29324
3034	3034
3035	3035	PORT_START("IN23")
3036	3036	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_COIN1 )
3037		PORT_BIT( 0xf700, IP_ACTIVE_LOW, IPT_UNKNOWN )
	3037	PORT_BIT( 0xf7ff, IP_ACTIVE_LOW, IPT_UNKNOWN )
3038	3038
3039	3039	PORT_START("SERVICE")
3040	3040	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )

trunk/src/emu/cpu/h8/h83008.c

r29323	r29324
1	1	#include "emu.h"
2	2	#include "h83008.h"
3		#include "h8_adc.h"
4	3
5	4	const device_type H83008 = &device_creator<h83008_device>;
6	5
r29323	r29324
15	14	port9(*this, "port9"),
16	15	porta(*this, "porta"),
17	16	portb(*this, "portb"),
	17	timer8_0(*this, "timer8_0"),
	18	timer8_1(*this, "timer8_1"),
	19	timer8_2(*this, "timer8_2"),
	20	timer8_3(*this, "timer8_3"),
18	21	timer16(*this, "timer16"),
19	22	timer16_0(*this, "timer16:0"),
20	23	timer16_1(*this, "timer16:1"),
r29323	r29324
34	37	MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0xc0, 0xc0)
35	38	MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x80, 0x00)
36	39	MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
	40	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 36, 38, 39, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true,  false)
	41	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 37, 38, 39, "timer8_0", h8_timer8_channel_device::CHAIN_A,        false, false)
	42	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_2", "intc", 40, 42, 43, "timer8_3", h8_timer8_channel_device::CHAIN_OVERFLOW, false, true)
	43	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_3", "intc", 41, 42, 43, "timer8_2", h8_timer8_channel_device::CHAIN_A,        false, true)
37	44	MCFG_H8_TIMER16_ADD("timer16", 3, 0xf8)
38	45	MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:0", 2, 2, "intc", 24)
39	46	MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:1", 2, 2, "intc", 28)
r29323	r29324
78	85	AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tior_r,  tior_w,  0x00ff)
79	86	AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tcnt_r,  tcnt_w         )
80	87	AM_RANGE(0xffff7c, 0xffff7f) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r,   tgr_w          )
	88	AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0xff00)
	89	AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0x00ff)
	90	AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0xff00)
	91	AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0x00ff)
	92	AM_RANGE(0xffff84, 0xffff87) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0xff00)
	93	AM_RANGE(0xffff84, 0xffff87) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0x00ff)
	94	AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0xff00)
	95	AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0x00ff)
	96	AM_RANGE(0xffff90, 0xffff91) AM_DEVREADWRITE8("timer8_2",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0xff00)
	97	AM_RANGE(0xffff90, 0xffff91) AM_DEVREADWRITE8("timer8_3",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0x00ff)
	98	AM_RANGE(0xffff92, 0xffff93) AM_DEVREADWRITE8("timer8_2",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0xff00)
	99	AM_RANGE(0xffff92, 0xffff93) AM_DEVREADWRITE8("timer8_3",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0x00ff)
	100	AM_RANGE(0xffff94, 0xffff97) AM_DEVREADWRITE8("timer8_2",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0xff00)
	101	AM_RANGE(0xffff94, 0xffff97) AM_DEVREADWRITE8("timer8_3",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0x00ff)
	102	AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("timer8_2",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0xff00)
	103	AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("timer8_3",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0x00ff)
81	104
82	105	AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0",      h8_sci_device,             smr_r,   smr_w,   0xff00)
83	106	AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0",      h8_sci_device,             brr_r,   brr_w,   0x00ff)

trunk/src/emu/cpu/h8/h83006.h

r29323	r29324
47	47	#include "h8_port.h"
48	48	#include "h8_intc.h"
49	49	#include "h8_sci.h"
	50	#include "h8_timer8.h"
50	51	#include "h8_timer16.h"
51	52
52	53	class h83006_device : public h8h_device {
r29323	r29324
67	68	required_device<h8_port_device> port9;
68	69	required_device<h8_port_device> porta;
69	70	required_device<h8_port_device> portb;
	71	required_device<h8h_timer8_channel_device> timer8_0;
	72	required_device<h8h_timer8_channel_device> timer8_1;
	73	required_device<h8h_timer8_channel_device> timer8_2;
	74	required_device<h8h_timer8_channel_device> timer8_3;
70	75	required_device<h8_timer16_device> timer16;
71	76	required_device<h8h_timer16_channel_device> timer16_0;
72	77	required_device<h8h_timer16_channel_device> timer16_1;

trunk/src/emu/cpu/h8/h83048.c

r29323	r29324
1	1	#include "emu.h"
2	2	#include "h83048.h"
3		#include "h8_adc.h"
4	3
5	4	const device_type H83044 = &device_creator<h83044_device>;
6	5	const device_type H83045 = &device_creator<h83045_device>;
7	6	const device_type H83047 = &device_creator<h83047_device>;
8	7	const device_type H83048 = &device_creator<h83048_device>;
9	8
10
11	9	h83048_device::h83048_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
12	10	h8h_device(mconfig, type, name, tag, owner, clock, shortname, source, address_map_delegate(FUNC(h83048_device::map), this)),
13	11	intc(*this, "intc"),

trunk/src/emu/cpu/h8/h83008.h

r29323	r29324
47	47	#include "h8_port.h"
48	48	#include "h8_intc.h"
49	49	#include "h8_sci.h"
	50	#include "h8_timer8.h"
50	51	#include "h8_timer16.h"
51	52
52	53	class h83008_device : public h8h_device {
r29323	r29324
67	68	required_device<h8_port_device> port9;
68	69	required_device<h8_port_device> porta;
69	70	required_device<h8_port_device> portb;
	71	required_device<h8h_timer8_channel_device> timer8_0;
	72	required_device<h8h_timer8_channel_device> timer8_1;
	73	required_device<h8h_timer8_channel_device> timer8_2;
	74	required_device<h8h_timer8_channel_device> timer8_3;
70	75	required_device<h8_timer16_device> timer16;
71	76	required_device<h8h_timer16_channel_device> timer16_0;
72	77	required_device<h8h_timer16_channel_device> timer16_1;

trunk/src/emu/cpu/h8/h8s2320.c

r29323	r29324
1	1	#include "emu.h"
2	2	#include "h8s2320.h"
3		#include "h8_adc.h"
4	3
5	4	const device_type H8S2320 = &device_creator<h8s2320_device>;
6	5	const device_type H8S2321 = &device_creator<h8s2321_device>;
r29323	r29324
30	29	porte(*this, "porte"),
31	30	portf(*this, "portf"),
32	31	portg(*this, "portg"),
	32	timer8_0(*this, "timer8_0"),
	33	timer8_1(*this, "timer8_1"),
33	34	timer16(*this, "timer16"),
34	35	timer16_0(*this, "timer16:0"),
35	36	timer16_1(*this, "timer16:1"),
r29323	r29324
60	61	porte(*this, "porte"),
61	62	portf(*this, "portf"),
62	63	portg(*this, "portg"),
	64	timer8_0(*this, "timer8_0"),
	65	timer8_1(*this, "timer8_1"),
63	66	timer16(*this, "timer16"),
64	67	timer16_0(*this, "timer16:0"),
65	68	timer16_1(*this, "timer16:1"),
r29323	r29324
138	141	MCFG_H8_PORT_ADD("porte", h8_device::PORT_E, 0x00, 0x00)
139	142	MCFG_H8_PORT_ADD("portf", h8_device::PORT_F, 0x00, 0x00)
140	143	MCFG_H8_PORT_ADD("portg", h8_device::PORT_G, 0xe0, 0xe0)
	144	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 64, 65, 66, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true,  false)
	145	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A,        false, false)
141	146	MCFG_H8_TIMER16_ADD("timer16", 6, 0x00)
142	147	MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
143	148	h8_timer16_channel_device::DIV_1,
r29323	r29324
303	308	AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("adc",       h8_adc_device,             adcsr_r, adcsr_w, 0xff00)
304	309	AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("adc",       h8_adc_device,             adcr_r,  adcr_w,  0x00ff)
305	310
	311	AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0xff00)
	312	AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0x00ff)
	313	AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0xff00)
	314	AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0x00ff)
	315	AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0xff00)
	316	AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0x00ff)
	317	AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0xff00)
	318	AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0x00ff)
	319
306	320	AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16",   h8_timer16_device,         tstr_r,  tstr_w,  0xff00)
307	321	AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16",   h8_timer16_device,         tsyr_r,  tsyr_w,  0x00ff)
308	322

trunk/src/emu/cpu/h8/h8s2320.h

r29323	r29324
59	59	#include "h8_port.h"
60	60	#include "h8_intc.h"
61	61	#include "h8_sci.h"
	62	#include "h8_timer8.h"
62	63	#include "h8_timer16.h"
63	64
64	65	class h8s2320_device : public h8s2000_device {
r29323	r29324
85	86	required_device<h8_port_device> porte;
86	87	required_device<h8_port_device> portf;
87	88	required_device<h8_port_device> portg;
	89	required_device<h8h_timer8_channel_device> timer8_0;
	90	required_device<h8h_timer8_channel_device> timer8_1;
88	91	required_device<h8_timer16_device> timer16;
89	92	required_device<h8s_timer16_channel_device> timer16_0;
90	93	required_device<h8s_timer16_channel_device> timer16_1;

trunk/src/emu/cpu/h8/h8s2245.c

r29323	r29324
1	1	#include "emu.h"
2	2	#include "h8s2245.h"
3		#include "h8_adc.h"
4	3
5	4	const device_type H8S2241 = &device_creator<h8s2241_device>;
6	5	const device_type H8S2242 = &device_creator<h8s2242_device>;
r29323	r29324
24	23	porte(*this, "porte"),
25	24	portf(*this, "portf"),
26	25	portg(*this, "portg"),
	26	timer8_0(*this, "timer8_0"),
	27	timer8_1(*this, "timer8_1"),
27	28	timer16(*this, "timer16"),
28	29	timer16_0(*this, "timer16:0"),
29	30	timer16_1(*this, "timer16:1"),
r29323	r29324
50	51	porte(*this, "porte"),
51	52	portf(*this, "portf"),
52	53	portg(*this, "portg"),
	54	timer8_0(*this, "timer8_0"),
	55	timer8_1(*this, "timer8_1"),
53	56	timer16(*this, "timer16"),
54	57	timer16_0(*this, "timer16:0"),
55	58	timer16_1(*this, "timer16:1"),
r29323	r29324
94	97	MCFG_H8_PORT_ADD("porte", h8_device::PORT_E, 0x00, 0x00)
95	98	MCFG_H8_PORT_ADD("portf", h8_device::PORT_F, 0x00, 0x00)
96	99	MCFG_H8_PORT_ADD("portg", h8_device::PORT_G, 0xe0, 0x00)
	100	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 64, 65, 66, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true,  false)
	101	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A,        false, false)
97	102	MCFG_H8_TIMER16_ADD("timer16", 3, 0x00)
98	103	MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
99	104	h8_timer16_channel_device::DIV_1,
r29323	r29324
204	209	AM_RANGE(0xffff90, 0xffff97) AM_DEVREAD8(     "adc",       h8_adc_device,             addr8_r,          0xffff)
205	210	AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("adc",       h8_adc_device,             adcsr_r, adcsr_w, 0xff00)
206	211	AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("adc",       h8_adc_device,             adcr_r,  adcr_w,  0x00ff)
	212	AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0xff00)
	213	AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0x00ff)
	214	AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0xff00)
	215	AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0x00ff)
	216	AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0xff00)
	217	AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0x00ff)
	218	AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0xff00)
	219	AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0x00ff)
207	220	AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16",   h8_timer16_device,         tstr_r,  tstr_w,  0xff00)
208	221	AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16",   h8_timer16_device,         tsyr_r,  tsyr_w,  0x00ff)
209	222	AM_RANGE(0xffffd0, 0xffffd1) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r,   tcr_w,   0xff00)

trunk/src/emu/cpu/h8/h8s2245.h

r29323	r29324
54	54	#include "h8_port.h"
55	55	#include "h8_intc.h"
56	56	#include "h8_sci.h"
	57	#include "h8_timer8.h"
57	58	#include "h8_timer16.h"
58	59
59	60	class h8s2245_device : public h8s2000_device {
r29323	r29324
79	80	required_device<h8_port_device> porte;
80	81	required_device<h8_port_device> portf;
81	82	required_device<h8_port_device> portg;
	83	required_device<h8h_timer8_channel_device> timer8_0;
	84	required_device<h8h_timer8_channel_device> timer8_1;
82	85	required_device<h8_timer16_device> timer16;
83	86	required_device<h8s_timer16_channel_device> timer16_0;
84	87	required_device<h8s_timer16_channel_device> timer16_1;

trunk/src/emu/cpu/h8/h8.lst

r29323	r29324
2157	2157
2158	2158	6e80         ff80         0 mov.b    r8l      r16d16h  o
2159	2159	prefetch_start();
2160		TMP1 = UINT16(r16_r(IR[0] >> 4) + IR[1]);
	2160	TMP1 = UINT16(r16_r((IR[0] >> 4) & 7) + IR[1]);
2161	2161	TMP2 = r8_r(IR[0]);
2162	2162	set_nzv8(TMP2);
2163	2163	write8(TMP1, TMP2);
r29323	r29324
2189	2189
2190	2190	6f80         ff80         0 mov.w    r16l     r16d16h  o
2191	2191	prefetch_start();
2192		TMP1 = UINT16(r16_r(IR[0] >> 4) + IR[1]);
	2192	TMP1 = UINT16(r16_r((IR[0] >> 4) & 7) + IR[1]);
2193	2193	TMP2 = r16_r(IR[0]);
2194	2194	set_nzv16(TMP2);
2195	2195	write16(TMP1, TMP2);

trunk/src/emu/cpu/h8/h83337.c

r29323	r29324
1	1	#include "emu.h"
2	2	#include "h83337.h"
3		#include "h8_adc.h"
4	3
5	4	const device_type H83334 = &device_creator<h83334_device>;
6	5	const device_type H83336 = &device_creator<h83336_device>;
r29323	r29324
20	19	port7(*this, "port7"),
21	20	port8(*this, "port8"),
22	21	port9(*this, "port9"),
	22	timer8_0(*this, "timer8_0"),
	23	timer8_1(*this, "timer8_1"),
23	24	timer16(*this, "timer16"),
24	25	timer16_0(*this, "timer16:0"),
25	26	sci0(*this, "sci0"),
r29323	r29324
40	41	port7(*this, "port7"),
41	42	port8(*this, "port8"),
42	43	port9(*this, "port9"),
	44	timer8_0(*this, "timer8_0"),
	45	timer8_1(*this, "timer8_1"),
43	46	timer16(*this, "timer16"),
44	47	timer16_0(*this, "timer16:0"),
45	48	sci0(*this, "sci0"),
r29323	r29324
72	75	MCFG_H8_PORT_ADD("port7", h8_device::PORT_7, 0x00, 0x00)
73	76	MCFG_H8_PORT_ADD("port8", h8_device::PORT_8, 0x80, 0x80)
74	77	MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0x00, 0x00)
	78	MCFG_H8_TIMER8_CHANNEL_ADD("timer8_0", "intc", 19, 20, 21, 8, 2, 64, 32, 1024, 256)
	79	MCFG_H8_TIMER8_CHANNEL_ADD("timer8_1", "intc", 22, 23, 24, 8, 2, 64, 128, 1024, 2048)
75	80	MCFG_H8_TIMER16_ADD("timer16", 1, 0xff)
76	81	MCFG_H8_TIMER16_CHANNEL_ADD("timer16:0", 4, 0, "intc", 32)
77	82	MCFG_H8_SCI_ADD("sci0", "intc", 27, 28, 29, 30)
r29323	r29324
115	120	AM_RANGE(0xffbe, 0xffbf) AM_DEVREADWRITE8("port8",     h8_port_device,            port_r,  dr_w,    0x00ff)
116	121	AM_RANGE(0xffc0, 0xffc1) AM_DEVWRITE8(    "port9",     h8_port_device,                     ddr_w,   0xff00)
117	122	AM_RANGE(0xffc0, 0xffc1) AM_DEVREADWRITE8("port9",     h8_port_device,            port_r,  dr_w,    0x00ff)
118
	123	AM_RANGE(0xffc2, 0xffc3) AM_READWRITE8(                                           wscr_r,  wscr_w,  0xff00)
	124	AM_RANGE(0xffc2, 0xffc3) AM_READWRITE8(                                           stcr_r,  stcr_w,  0x00ff)
119	125	AM_RANGE(0xffc4, 0xffc5) AM_READWRITE8(                                           syscr_r, syscr_w, 0xff00)
	126	AM_RANGE(0xffc4, 0xffc5) AM_READWRITE8(                                           mdcr_r,  mdcr_w,  0x00ff)
120	127	AM_RANGE(0xffc6, 0xffc7) AM_DEVREADWRITE8("intc",      h8_intc_device,            iscr_r,  iscr_w,  0xff00)
121	128	AM_RANGE(0xffc6, 0xffc7) AM_DEVREADWRITE8("intc",      h8_intc_device,            ier_r,   ier_w,   0x00ff)
122
	129	AM_RANGE(0xffc8, 0xffc9) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0xff00)
	130	AM_RANGE(0xffc8, 0xffc9) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0x00ff)
	131	AM_RANGE(0xffca, 0xffcb) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0xffff)
	132	AM_RANGE(0xffcc, 0xffcd) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0xff00)
	133	AM_RANGE(0xffd0, 0xffd1) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0xff00)
	134	AM_RANGE(0xffd0, 0xffd1) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0x00ff)
	135	AM_RANGE(0xffd2, 0xffd3) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0xffff)
	136	AM_RANGE(0xffd4, 0xffd5) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0xff00)
123	137	AM_RANGE(0xffd8, 0xffd9) AM_DEVREADWRITE8("sci0",      h8_sci_device,             smr_r,   smr_w,   0xff00)
124	138	AM_RANGE(0xffd8, 0xffd9) AM_DEVREADWRITE8("sci0",      h8_sci_device,             brr_r,   brr_w,   0x00ff)
125	139	AM_RANGE(0xffda, 0xffdb) AM_DEVREADWRITE8("sci0",      h8_sci_device,             scr_r,   scr_w,   0xff00)
r29323	r29324
169	183	add_event(event_time, adc->internal_update(current_time));
170	184	add_event(event_time, sci0->internal_update(current_time));
171	185	add_event(event_time, sci1->internal_update(current_time));
	186	add_event(event_time, timer8_0->internal_update(current_time));
	187	add_event(event_time, timer8_1->internal_update(current_time));
172	188	add_event(event_time, timer16_0->internal_update(current_time));
173	189
174	190	recompute_bcount(event_time);
r29323	r29324
195	211	syscr = data;
196	212	logerror("%s: syscr = %02x\n", tag(), data);
197	213	}
	214
	215	READ8_MEMBER(h83337_device::wscr_r)
	216	{
	217	return 0x00;
	218	}
	219
	220	WRITE8_MEMBER(h83337_device::wscr_w)
	221	{
	222	logerror("%s: wscr = %02x\n", tag(), data);
	223	}
	224
	225	READ8_MEMBER(h83337_device::stcr_r)
	226	{
	227	return 0x00;
	228	}
	229
	230	WRITE8_MEMBER(h83337_device::stcr_w)
	231	{
	232	logerror("%s: stcr = %02x\n", tag(), data);
	233	timer8_0->set_extra_clock_bit(data & 0x01);
	234	timer8_1->set_extra_clock_bit(data & 0x02);
	235	}
	236
	237	READ8_MEMBER(h83337_device::mdcr_r)
	238	{
	239	return 0x00;
	240	}
	241
	242	WRITE8_MEMBER(h83337_device::mdcr_w)
	243	{
	244	logerror("%s: mdcr = %02x\n", tag(), data);
	245	}

trunk/src/emu/cpu/h8/h83337.h

r29323	r29324
53	53	#include "h8_adc.h"
54	54	#include "h8_port.h"
55	55	#include "h8_intc.h"
	56	#include "h8_timer8.h"
56	57	#include "h8_timer16.h"
57	58	#include "h8_sci.h"
58	59
r29323	r29324
61	62	h83337_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
62	63	h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
63	64
	65	DECLARE_READ8_MEMBER(wscr_r);
	66	DECLARE_WRITE8_MEMBER(wscr_w);
	67	DECLARE_READ8_MEMBER(stcr_r);
	68	DECLARE_WRITE8_MEMBER(stcr_w);
64	69	DECLARE_READ8_MEMBER(syscr_r);
65	70	DECLARE_WRITE8_MEMBER(syscr_w);
	71	DECLARE_READ8_MEMBER(mdcr_r);
	72	DECLARE_WRITE8_MEMBER(mdcr_w);
66	73
67	74	protected:
68	75	required_device<h8_intc_device> intc;
r29323	r29324
76	83	required_device<h8_port_device> port7;
77	84	required_device<h8_port_device> port8;
78	85	required_device<h8_port_device> port9;
	86	required_device<h8_timer8_channel_device> timer8_0;
	87	required_device<h8_timer8_channel_device> timer8_1;
79	88	required_device<h8_timer16_device> timer16;
80	89	required_device<h8_timer16_channel_device> timer16_0;
81	90	required_device<h8_sci_device> sci0;

trunk/src/emu/cpu/h8/h8_timer8.c

r29323	r29324
	1	#include "emu.h"
	2	#include "h8_timer8.h"
	3
	4	const device_type H8_TIMER8_CHANNEL  = &device_creator<h8_timer8_channel_device>;
	5	const device_type H8H_TIMER8_CHANNEL = &device_creator<h8h_timer8_channel_device>;
	6
	7	h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
	8	device_t(mconfig, H8_TIMER8_CHANNEL, "H8 8-bits timer channel", tag, owner, clock, "h8_8bits_timer_channel", __FILE__),
	9	cpu(*this, "^")
	10	{
	11	}
	12
	13	h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
	14	device_t(mconfig, type, name, tag, owner, clock, shortname, source),
	15	cpu(*this, "^")
	16	{
	17	}
	18
	19	void h8_timer8_channel_device::set_info(const char *intc, int _irq_ca, int _irq_cb, int _irq_v, int div1, int div2, int div3, int div4, int div5, int div6)
	20	{
	21	intc_tag = intc;
	22	irq_ca = _irq_ca;
	23	irq_cb = _irq_cb;
	24	irq_v = _irq_v;
	25	chain_tag = NULL;
	26	chain_type = STOPPED;
	27	has_adte = false;
	28	has_ice = false;
	29	div_tab[0] = div1;
	30	div_tab[1] = div2;
	31	div_tab[2] = div3;
	32	div_tab[3] = div4;
	33	div_tab[4] = div5;
	34	div_tab[5] = div6;
	35	}
	36
	37	READ8_MEMBER(h8_timer8_channel_device::tcr_r)
	38	{
	39	return tcr;
	40	}
	41
	42	WRITE8_MEMBER(h8_timer8_channel_device::tcr_w)
	43	{
	44	update_counter();
	45	tcr = data;
	46	update_tcr();
	47	recalc_event();
	48	}
	49
	50	void h8_timer8_channel_device::set_extra_clock_bit(bool bit)
	51	{
	52	update_counter();
	53	extra_clock_bit = bit;
	54	update_tcr();
	55	recalc_event();
	56	}
	57
	58	void h8_timer8_channel_device::update_tcr()
	59	{
	60	switch(tcr & TCR_CKS) {
	61	case 0:
	62	clock_type = STOPPED;
	63	clock_divider = 0;
	64	logerror("%s: clock stopped", tag());
	65	break;
	66
	67	case 1: case 2: case 3:
	68	clock_type = DIV;
	69	clock_divider = div_tab[((tcr & TCR_CKS)-1)*2 + extra_clock_bit];
	70	logerror("%s: clock %dHz", tag(), cpu->clock()/clock_divider);
	71	break;
	72
	73	case 4:
	74	clock_type = chain_type;
	75	clock_divider = 0;
	76	logerror("%s: clock chained %s", tag(), clock_type == CHAIN_A ? "tcora" : "overflow");
	77	break;
	78
	79	case 5:
	80	clock_type = INPUT_UP;
	81	clock_divider = 0;
	82	logerror("%s: clock external raising edge", tag());
	83	break;
	84
	85	case 6:
	86	clock_type = INPUT_DOWN;
	87	clock_divider = 0;
	88	logerror("%s: clock external falling edge", tag());
	89	break;
	90
	91	case 7:
	92	clock_type = INPUT_UPDOWN;
	93	clock_divider = 0;
	94	logerror("%s: clock external both edges", tag());
	95	break;
	96	}
	97
	98	switch(tcr & TCR_CCLR) {
	99	case 0x00:
	100	clear_type = CLEAR_NONE;
	101	logerror(", no clear");
	102	break;
	103
	104	case 0x08:
	105	clear_type = CLEAR_A;
	106	logerror(", clear on tcora");
	107	break;
	108
	109	case 0x10:
	110	clear_type = CLEAR_B;
	111	logerror(", clear on tcorb");
	112	break;
	113
	114	case 0x18:
	115	clear_type = CLEAR_EXTERNAL;
	116	logerror(", clear on external");
	117	break;
	118	}
	119
	120	logerror(", irq=%c%c%c\n",
	121	tcr & TCR_CMIEB ? 'b' : '-',
	122	tcr & TCR_CMIEA ? 'a' : '-',
	123	tcr & TCR_OVIE  ? 'o' : '-');
	124	}
	125
	126	READ8_MEMBER(h8_timer8_channel_device::tcsr_r)
	127	{
	128	return tcsr;
	129	}
	130
	131	WRITE8_MEMBER(h8_timer8_channel_device::tcsr_w)
	132	{
	133	update_counter();
	134
	135	UINT8 mask = has_adte || has_ice ? 0x1f : 0x0f;
	136	tcsr = (tcsr & ~mask) | (data & mask);
	137	tcsr &= data | 0x1f;
	138
	139	logerror("%s: tcsr_w %02x\n", tag(), tcsr);
	140
	141	recalc_event();
	142	}
	143
	144	READ8_MEMBER(h8_timer8_channel_device::tcor_r)
	145	{
	146	return tcor[offset];
	147	}
	148
	149	WRITE8_MEMBER(h8_timer8_channel_device::tcor_w)
	150	{
	151	update_counter();
	152	tcor[offset] = data;
	153	logerror("%s: tcor%c_w %02x\n", tag(), 'a'+offset, data);
	154	recalc_event();
	155	}
	156
	157	READ8_MEMBER(h8_timer8_channel_device::tcnt_r)
	158	{
	159	update_counter();
	160	recalc_event();
	161	return tcnt;
	162	}
	163
	164	WRITE8_MEMBER(h8_timer8_channel_device::tcnt_w)
	165	{
	166	update_counter();
	167	tcnt = data;
	168	logerror("%s: tcnt_w %02x\n", tag(), data);
	169	recalc_event();
	170	}
	171
	172	void h8_timer8_channel_device::device_start()
	173	{
	174	intc = siblingdevice<h8_intc_device>(intc_tag);
	175	if(chain_tag)
	176	chained_timer = siblingdevice<h8_timer8_channel_device>(chain_tag);
	177	else
	178	chained_timer = NULL;
	179	}
	180
	181	void h8_timer8_channel_device::device_reset()
	182	{
	183	tcr = 0x00;
	184	tcsr = has_adte || has_ice ? 0x00 : 0x10;
	185	tcor[0] = 0xff;
	186	tcor[1] = 0xff;
	187	tcnt = 0x00;
	188	counter_cycle = 0x100;
	189	clock_type = STOPPED;
	190	clock_divider = 0;
	191	clear_type = CLEAR_NONE;
	192	last_clock_update = 0;
	193	event_time = 0;
	194	extra_clock_bit = false;
	195	}
	196
	197	UINT64 h8_timer8_channel_device::internal_update(UINT64 current_time)
	198	{
	199	if(event_time && current_time >= event_time) {
	200	update_counter(current_time);
	201	if(0)
	202	logerror("%s: Reached event time (%ld), counter=%02x, dt=%d\n", tag(), long(current_time), tcnt, int(current_time - event_time));
	203	recalc_event(current_time);
	204	}
	205
	206	return event_time;
	207	}
	208
	209	void h8_timer8_channel_device::update_counter(UINT64 cur_time)
	210	{
	211	if(clock_type != DIV)
	212	return;
	213
	214	if(!cur_time)
	215	cur_time = cpu->get_cycle();
	216
	217	UINT64 base_time = (last_clock_update + clock_divider/2) / clock_divider;
	218	UINT64 new_time = (cur_time + clock_divider/2) / clock_divider;
	219
	220	int ott = tcnt;
	221	int tt = tcnt + new_time - base_time;
	222	tcnt = tt % counter_cycle;
	223
	224	if(tt == tcor[0] || tcnt == tcor[0]) {
	225	if(chained_timer)
	226	chained_timer->chained_timer_tcora();
	227
	228	if(!(tcsr & TCSR_CMFA)) {
	229	tcsr |= TCSR_CMFA;
	230	if(tcr & TCR_CMIEA)
	231	intc->internal_interrupt(irq_ca);
	232	}
	233	}
	234
	235	if(!(tcsr & TCSR_CMFB) && (tt == tcor[1] || tcnt == tcor[1])) {
	236	tcsr |= TCSR_CMFB;
	237	if(tcr & TCR_CMIEB)
	238	intc->internal_interrupt(irq_cb);
	239	}
	240
	241	if(tt >= 0x100) {
	242	if(chained_timer)
	243	chained_timer->chained_timer_overflow();
	244	if(!(tcsr & TCSR_OVF)) {
	245	tcsr |= TCSR_OVF;
	246	if(tcr & TCR_OVIE)
	247	intc->internal_interrupt(irq_v);
	248	}
	249	}
	250	last_clock_update = cur_time;
	251	}
	252
	253	void h8_timer8_channel_device::recalc_event(UINT64 cur_time)
	254	{
	255	bool update_cpu = cur_time == 0;
	256	UINT64 old_event_time = event_time;
	257
	258	if(clock_type != DIV) {
	259	event_time = 0;
	260	if(old_event_time && update_cpu)
	261	cpu->internal_update();
	262	return;
	263	}
	264
	265	if(!cur_time)
	266	cur_time = cpu->get_cycle();
	267
	268	UINT32 event_delay = 0xffffffff;
	269	if(clear_type == CLEAR_A || clear_type == CLEAR_B)
	270	counter_cycle = tcor[clear_type - CLEAR_A];
	271	else {
	272	counter_cycle = 0x100;
	273	event_delay = counter_cycle - tcnt;
	274	if(!event_delay)
	275	event_delay = counter_cycle;
	276	}
	277
	278	for(int i=0; i<2; i++) {
	279	UINT32 new_delay = 0xffffffff;
	280	if(tcor[i] > tcnt) {
	281	if(tcnt >= counter_cycle || tcor[i] <= counter_cycle)
	282	new_delay = tcor[i] - tcnt;
	283	} else if(tcor[i] <= counter_cycle) {
	284	if(tcnt < counter_cycle)
	285	new_delay = (counter_cycle - tcnt) + tcor[i];
	286	else
	287	new_delay = (0x100 - tcnt) + tcor[i];
	288	}
	289	if(event_delay > new_delay)
	290	event_delay = new_delay;
	291	}
	292
	293	if(event_delay != 0xffffffff)
	294	event_time = ((((cur_time + clock_divider) >> clock_divider) + event_delay - 1) << clock_divider) + clock_divider/2;
	295	else
	296	event_time = 0;
	297
	298	if(old_event_time != event_time && update_cpu)
	299	cpu->internal_update();
	300	}
	301
	302	void h8_timer8_channel_device::chained_timer_overflow()
	303	{
	304	if(clock_type == CHAIN_OVERFLOW)
	305	timer_tick();
	306	}
	307
	308	void h8_timer8_channel_device::chained_timer_tcora()
	309	{
	310	if(clock_type == CHAIN_A)
	311	timer_tick();
	312	}
	313
	314	void h8_timer8_channel_device::timer_tick()
	315	{
	316	tcnt++;
	317
	318	if(tcnt == tcor[0]) {
	319	if(chained_timer)
	320	chained_timer->chained_timer_tcora();
	321
	322	if(!(tcsr & TCSR_CMFA)) {
	323	tcsr |= TCSR_CMFA;
	324	if(tcr & TCR_CMIEA)
	325	intc->internal_interrupt(irq_ca);
	326	}
	327	}
	328
	329	if(!(tcsr & TCSR_CMFB) && tcnt == tcor[1]) {
	330	tcsr |= TCSR_CMFB;
	331	if(tcr & TCR_CMIEB)
	332	intc->internal_interrupt(irq_cb);
	333	}
	334
	335	if(tcnt == 0x00) {
	336	if(chained_timer)
	337	chained_timer->chained_timer_overflow();
	338	if(!(tcsr & TCSR_OVF)) {
	339	tcsr |= TCSR_OVF;
	340	if(tcr & TCR_OVIE)
	341	intc->internal_interrupt(irq_v);
	342	}
	343	}
	344	}
	345
	346	h8h_timer8_channel_device::h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
	347	h8_timer8_channel_device(mconfig, H8H_TIMER8_CHANNEL, "H8H 8-bits timer channel", tag, owner, clock, "h8h_16bits_timer_channel", __FILE__)
	348	{
	349	}
	350
	351	h8h_timer8_channel_device::~h8h_timer8_channel_device()
	352	{
	353	}
	354
	355	void h8h_timer8_channel_device::set_info(const char *intc, int _irq_ca, int _irq_cb, int _irq_v, const char *_chain_tag, int _chain_type, bool _has_adte, bool _has_ice)
	356	{
	357	intc_tag = intc;
	358	irq_ca = _irq_ca;
	359	irq_cb = _irq_cb;
	360	irq_v = _irq_v;
	361	chain_tag = _chain_tag;
	362	chain_type = _chain_type;
	363	has_adte = _has_adte;
	364	has_ice = _has_ice;
	365	// The extra clock bit is not used for h8h+
	366	div_tab[0] = 8;
	367	div_tab[1] = 8;
	368	div_tab[2] = 64;
	369	div_tab[3] = 64;
	370	div_tab[4] = 8192;
	371	div_tab[5] = 8192;
	372	}

trunk/src/emu/cpu/h8/h8_timer8.h

r29323	r29324
	1	/***************************************************************************
	2
	3	h8_timer8.h
	4
	5	H8 8 bits timer
	6
	7	****************************************************************************
	8
	9	Copyright Olivier Galibert
	10	All rights reserved.
	11
	12	Redistribution and use in source and binary forms, with or without
	13	modification, are permitted provided that the following conditions are
	14	met:
	15
	16	* Redistributions of source code must retain the above copyright
	17	notice, this list of conditions and the following disclaimer.
	18	* Redistributions in binary form must reproduce the above copyright
	19	notice, this list of conditions and the following disclaimer in
	20	the documentation and/or other materials provided with the
	21	distribution.
	22	* Neither the name 'MAME' nor the names of its contributors may be
	23	used to endorse or promote products derived from this software
	24	without specific prior written permission.
	25
	26	THIS SOFTWARE IS PROVIDED BY OLIVIER GALIBERT ''AS IS'' AND ANY EXPRESS OR
	27	IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
	28	WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	29	DISCLAIMED. IN NO EVENT SHALL OLIVIER GALIBERT BE LIABLE FOR ANY DIRECT,
	30	INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
	31	(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
	32	SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
	33	HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
	34	STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
	35	IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
	36	POSSIBILITY OF SUCH DAMAGE.
	37
	38	***************************************************************************/
	39
	40	#ifndef __H8_TIMER8_H__
	41	#define __H8_TIMER8_H__
	42
	43	#include "h8.h"
	44	#include "h8_intc.h"
	45
	46	#define MCFG_H8_TIMER8_CHANNEL_ADD( _tag, intc, irq_ca, irq_cb, irq_v, div1, div2, div3, div4, div5, div6 ) \
	47	MCFG_DEVICE_ADD( _tag, H8_TIMER8_CHANNEL, 0 )   \
	48	downcast<h8_timer8_channel_device *>(device)->set_info(intc, irq_ca, irq_cb, irq_v, div1, div2, div3, div4, div5, div6);
	49
	50	#define MCFG_H8H_TIMER8_CHANNEL_ADD( _tag, intc, irq_ca, irq_cb, irq_v, chain, chain_mode, has_adte, has_ice ) \
	51	MCFG_DEVICE_ADD( _tag, H8H_TIMER8_CHANNEL, 0 )   \
	52	downcast<h8h_timer8_channel_device *>(device)->set_info(intc, irq_ca, irq_cb, irq_v, chain, chain_mode, has_adte, has_ice);
	53
	54	class h8_timer8_channel_device : public device_t {
	55	public:
	56	enum {
	57	STOPPED,
	58	CHAIN_A,
	59	CHAIN_OVERFLOW,
	60	INPUT_UP,
	61	INPUT_DOWN,
	62	INPUT_UPDOWN,
	63	DIV
	64	};
	65
	66	h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	67	h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
	68
	69	void set_info(const char *intc, int irq_ca, int irq_cb, int irq_v, int div1, int div2, int div3, int div4, int div5, int div6);
	70
	71	DECLARE_READ8_MEMBER(tcr_r);
	72	DECLARE_WRITE8_MEMBER(tcr_w);
	73	DECLARE_READ8_MEMBER(tcsr_r);
	74	DECLARE_WRITE8_MEMBER(tcsr_w);
	75	DECLARE_READ8_MEMBER(tcor_r);
	76	DECLARE_WRITE8_MEMBER(tcor_w);
	77	DECLARE_READ8_MEMBER(tcnt_r);
	78	DECLARE_WRITE8_MEMBER(tcnt_w);
	79
	80	UINT64 internal_update(UINT64 current_time);
	81	void set_extra_clock_bit(bool bit);
	82
	83	void chained_timer_overflow();
	84	void chained_timer_tcora();
	85
	86	protected:
	87	enum {
	88	TCR_CKS   = 0x07,
	89	TCR_CCLR  = 0x18,
	90	TCR_OVIE  = 0x20,
	91	TCR_CMIEA = 0x40,
	92	TCR_CMIEB = 0x80,
	93
	94	TCSR_OS   = 0x0f,
	95	TCSR_ADTE = 0x10,
	96	TCSR_OVF  = 0x20,
	97	TCSR_CMFA = 0x40,
	98	TCSR_CMFB = 0x80
	99	};
	100
	101	enum {
	102	CLEAR_NONE,
	103	CLEAR_A,
	104	CLEAR_B,
	105	CLEAR_EXTERNAL
	106	};
	107
	108	required_device<h8_device> cpu;
	109	h8_timer8_channel_device *chained_timer;
	110	h8_intc_device *intc;
	111	const char *chain_tag, *intc_tag;
	112	int irq_ca, irq_cb, irq_v, chain_type;
	113	int div_tab[6];
	114	UINT8 tcor[2];
	115	UINT8 tcr, tcsr, tcnt;
	116	bool extra_clock_bit, has_adte, has_ice;
	117	int clock_type, clock_divider, clear_type, counter_cycle;
	118	UINT64 last_clock_update, event_time;
	119
	120	virtual void device_start();
	121	virtual void device_reset();
	122
	123	void update_counter(UINT64 cur_time = 0);
	124	void recalc_event(UINT64 cur_time = 0);
	125
	126	void timer_tick();
	127	void update_tcr();
	128	};
	129
	130	class h8h_timer8_channel_device : public h8_timer8_channel_device {
	131	public:
	132	h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	133	virtual ~h8h_timer8_channel_device();
	134
	135	void set_info(const char *intc, int irq_ca, int irq_cb, int irq_v, const char *chain_tag, int chain_type, bool has_adte, bool has_ice);
	136	};
	137
	138	extern const device_type H8_TIMER8_CHANNEL;
	139	extern const device_type H8H_TIMER8_CHANNEL;
	140
	141	#endif

trunk/src/emu/cpu/h8/h8s2357.c

r29323	r29324
1	1	#include "emu.h"
2	2	#include "h8s2357.h"
3		#include "h8_adc.h"
	3
4	4	const device_type H8S2357 = &device_creator<h8s2357_device>;
5	5	const device_type H8S2352 = &device_creator<h8s2352_device>;
6	6	const device_type H8S2398 = &device_creator<h8s2398_device>;
r29323	r29324
25	25	porte(*this, "porte"),
26	26	portf(*this, "portf"),
27	27	portg(*this, "portg"),
	28	timer8_0(*this, "timer8_0"),
	29	timer8_1(*this, "timer8_1"),
28	30	timer16(*this, "timer16"),
29	31	timer16_0(*this, "timer16:0"),
30	32	timer16_1(*this, "timer16:1"),
r29323	r29324
55	57	porte(*this, "porte"),
56	58	portf(*this, "portf"),
57	59	portg(*this, "portg"),
	60	timer8_0(*this, "timer8_0"),
	61	timer8_1(*this, "timer8_1"),
58	62	timer16(*this, "timer16"),
59	63	timer16_0(*this, "timer16:0"),
60	64	timer16_1(*this, "timer16:1"),
r29323	r29324
115	119	MCFG_H8_PORT_ADD("porte", h8_device::PORT_E, 0x00, 0x00)
116	120	MCFG_H8_PORT_ADD("portf", h8_device::PORT_F, 0x00, 0x00)
117	121	MCFG_H8_PORT_ADD("portg", h8_device::PORT_G, 0xe0, 0xe0)
	122	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 64, 65, 66, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true,  false)
	123	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A,        false, false)
118	124	MCFG_H8_TIMER16_ADD("timer16", 6, 0x00)
119	125	MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
120	126	h8_timer16_channel_device::DIV_1,
r29323	r29324
276	282	AM_RANGE(0xffff90, 0xffff97) AM_DEVREAD8(     "adc",       h8_adc_device,             addr8_r,          0xffff)
277	283	AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("adc",       h8_adc_device,             adcsr_r, adcsr_w, 0xff00)
278	284	AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("adc",       h8_adc_device,             adcr_r,  adcr_w,  0x00ff)
	285	AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0xff00)
	286	AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0x00ff)
	287	AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0xff00)
	288	AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0x00ff)
	289	AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0xff00)
	290	AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0x00ff)
	291	AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0xff00)
	292	AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0x00ff)
279	293	AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16",   h8_timer16_device,         tstr_r,  tstr_w,  0xff00)
280	294	AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16",   h8_timer16_device,         tsyr_r,  tsyr_w,  0x00ff)
281	295	AM_RANGE(0xffffd0, 0xffffd1) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r,   tcr_w,   0xff00)

trunk/src/emu/cpu/h8/h83002.c

r29323	r29324
1	1	#include "emu.h"
2	2	#include "h83002.h"
3		#include "h8_adc.h"
4	3
5	4	const device_type H83002 = &device_creator<h83002_device>;
6	5

trunk/src/emu/cpu/h8/h8s2655.c

r29323	r29324
1	1	#include "emu.h"
2	2	#include "h8s2655.h"
3		#include "h8_adc.h"
4	3
5	4	const device_type H8S2655 = &device_creator<h8s2655_device>;
6	5	const device_type H8S2653 = &device_creator<h8s2653_device>;
r29323	r29324
22	21	porte(*this, "porte"),
23	22	portf(*this, "portf"),
24	23	portg(*this, "portg"),
	24	timer8_0(*this, "timer8_0"),
	25	timer8_1(*this, "timer8_1"),
25	26	timer16(*this, "timer16"),
26	27	timer16_0(*this, "timer16:0"),
27	28	timer16_1(*this, "timer16:1"),
r29323	r29324
53	54	porte(*this, "porte"),
54	55	portf(*this, "portf"),
55	56	portg(*this, "portg"),
	57	timer8_0(*this, "timer8_0"),
	58	timer8_1(*this, "timer8_1"),
56	59	timer16(*this, "timer16"),
57	60	timer16_0(*this, "timer16:0"),
58	61	timer16_1(*this, "timer16:1"),
r29323	r29324
89	92	MCFG_H8_PORT_ADD("porte", h8_device::PORT_E, 0x00, 0x00)
90	93	MCFG_H8_PORT_ADD("portf", h8_device::PORT_F, 0x00, 0x00)
91	94	MCFG_H8_PORT_ADD("portg", h8_device::PORT_G, 0xe0, 0xe0)
	95	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 64, 65, 66, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true,  false)
	96	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A,        false, false)
92	97	MCFG_H8_TIMER16_ADD("timer16", 6, 0x00)
93	98	MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32,
94	99	h8_timer16_channel_device::DIV_1,
r29323	r29324
251	256	AM_RANGE(0xffff90, 0xffff9f) AM_DEVREAD(      "adc",       h8_adc_device,             addr16_r                )
252	257	AM_RANGE(0xffffa0, 0xffffa1) AM_DEVREADWRITE8("adc",       h8_adc_device,             adcsr_r, adcsr_w, 0xff00)
253	258	AM_RANGE(0xffffa0, 0xffffa1) AM_DEVREADWRITE8("adc",       h8_adc_device,             adcr_r,  adcr_w,  0x00ff)
	259	AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0xff00)
	260	AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0x00ff)
	261	AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0xff00)
	262	AM_RANGE(0xffffb2, 0xffffb3) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0x00ff)
	263	AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0xff00)
	264	AM_RANGE(0xffffb4, 0xffffb7) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0x00ff)
	265	AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0xff00)
	266	AM_RANGE(0xffffb8, 0xffffb9) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0x00ff)
254	267	AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16",   h8_timer16_device,         tstr_r,  tstr_w,  0xff00)
255	268	AM_RANGE(0xffffc0, 0xffffc1) AM_DEVREADWRITE8("timer16",   h8_timer16_device,         tsyr_r,  tsyr_w,  0x00ff)
256	269	AM_RANGE(0xffffd0, 0xffffd1) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r,   tcr_w,   0xff00)

trunk/src/emu/cpu/h8/h83006.c

r29323	r29324
1	1	#include "emu.h"
2	2	#include "h83006.h"
3		#include "h8_adc.h"
4	3
5	4	const device_type H83006 = &device_creator<h83006_device>;
6	5	const device_type H83007 = &device_creator<h83007_device>;
r29323	r29324
17	16	port9(*this, "port9"),
18	17	porta(*this, "porta"),
19	18	portb(*this, "portb"),
	19	timer8_0(*this, "timer8_0"),
	20	timer8_1(*this, "timer8_1"),
	21	timer8_2(*this, "timer8_2"),
	22	timer8_3(*this, "timer8_3"),
20	23	timer16(*this, "timer16"),
21	24	timer16_0(*this, "timer16:0"),
22	25	timer16_1(*this, "timer16:1"),
r29323	r29324
38	41	port9(*this, "port9"),
39	42	porta(*this, "porta"),
40	43	portb(*this, "portb"),
	44	timer8_0(*this, "timer8_0"),
	45	timer8_1(*this, "timer8_1"),
	46	timer8_2(*this, "timer8_2"),
	47	timer8_3(*this, "timer8_3"),
41	48	timer16(*this, "timer16"),
42	49	timer16_0(*this, "timer16:0"),
43	50	timer16_1(*this, "timer16:1"),
r29323	r29324
66	73	MCFG_H8_PORT_ADD("port9", h8_device::PORT_9, 0xc0, 0xc0)
67	74	MCFG_H8_PORT_ADD("porta", h8_device::PORT_A, 0x80, 0x00)
68	75	MCFG_H8_PORT_ADD("portb", h8_device::PORT_B, 0x00, 0x00)
	76	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_0", "intc", 36, 38, 39, "timer8_1", h8_timer8_channel_device::CHAIN_OVERFLOW, true,  false)
	77	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 37, 38, 39, "timer8_0", h8_timer8_channel_device::CHAIN_A,        false, false)
	78	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_2", "intc", 40, 42, 43, "timer8_3", h8_timer8_channel_device::CHAIN_OVERFLOW, false, true)
	79	MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_3", "intc", 41, 42, 43, "timer8_2", h8_timer8_channel_device::CHAIN_A,        false, true)
69	80	MCFG_H8_TIMER16_ADD("timer16", 3, 0xf8)
70	81	MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:0", 2, 2, "intc", 24)
71	82	MCFG_H8H_TIMER16_CHANNEL_ADD("timer16:1", 2, 2, "intc", 28)
r29323	r29324
111	122	AM_RANGE(0xffff78, 0xffff79) AM_DEVREADWRITE8("timer16:2", h8_timer16_channel_device, tior_r,  tior_w,  0x00ff)
112	123	AM_RANGE(0xffff7a, 0xffff7b) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tcnt_r,  tcnt_w         )
113	124	AM_RANGE(0xffff7c, 0xffff7f) AM_DEVREADWRITE( "timer16:2", h8_timer16_channel_device, tgr_r,   tgr_w          )
	125	AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0xff00)
	126	AM_RANGE(0xffff80, 0xffff81) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0x00ff)
	127	AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0xff00)
	128	AM_RANGE(0xffff82, 0xffff83) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0x00ff)
	129	AM_RANGE(0xffff84, 0xffff87) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0xff00)
	130	AM_RANGE(0xffff84, 0xffff87) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0x00ff)
	131	AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("timer8_0",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0xff00)
	132	AM_RANGE(0xffff88, 0xffff89) AM_DEVREADWRITE8("timer8_1",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0x00ff)
	133	AM_RANGE(0xffff90, 0xffff91) AM_DEVREADWRITE8("timer8_2",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0xff00)
	134	AM_RANGE(0xffff90, 0xffff91) AM_DEVREADWRITE8("timer8_3",  h8_timer8_channel_device,  tcr_r,   tcr_w,   0x00ff)
	135	AM_RANGE(0xffff92, 0xffff93) AM_DEVREADWRITE8("timer8_2",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0xff00)
	136	AM_RANGE(0xffff92, 0xffff93) AM_DEVREADWRITE8("timer8_3",  h8_timer8_channel_device,  tcsr_r,  tcsr_w,  0x00ff)
	137	AM_RANGE(0xffff94, 0xffff97) AM_DEVREADWRITE8("timer8_2",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0xff00)
	138	AM_RANGE(0xffff94, 0xffff97) AM_DEVREADWRITE8("timer8_3",  h8_timer8_channel_device,  tcor_r,  tcor_w,  0x00ff)
	139	AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("timer8_2",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0xff00)
	140	AM_RANGE(0xffff98, 0xffff99) AM_DEVREADWRITE8("timer8_3",  h8_timer8_channel_device,  tcnt_r,  tcnt_w,  0x00ff)
114	141
115	142	AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0",      h8_sci_device,             smr_r,   smr_w,   0xff00)
116	143	AM_RANGE(0xffffb0, 0xffffb1) AM_DEVREADWRITE8("sci0",      h8_sci_device,             brr_r,   brr_w,   0x00ff)

trunk/src/emu/cpu/h8/h8s2357.h

r29323	r29324
56	56	#include "h8_port.h"
57	57	#include "h8_intc.h"
58	58	#include "h8_sci.h"
	59	#include "h8_timer8.h"
59	60	#include "h8_timer16.h"
60	61
61	62	class h8s2357_device : public h8s2000_device {
r29323	r29324
82	83	required_device<h8_port_device> porte;
83	84	required_device<h8_port_device> portf;
84	85	required_device<h8_port_device> portg;
	86	required_device<h8h_timer8_channel_device> timer8_0;
	87	required_device<h8h_timer8_channel_device> timer8_1;
85	88	required_device<h8_timer16_device> timer16;
86	89	required_device<h8s_timer16_channel_device> timer16_0;
87	90	required_device<h8s_timer16_channel_device> timer16_1;

trunk/src/emu/cpu/h8/h8s2655.h

r29323	r29324
47	47	#include "h8_adc.h"
48	48	#include "h8_port.h"
49	49	#include "h8_intc.h"
	50	#include "h8_timer8.h"
50	51	#include "h8_timer16.h"
51	52	#include "h8_sci.h"
52	53
r29323	r29324
74	75	required_device<h8_port_device> porte;
75	76	required_device<h8_port_device> portf;
76	77	required_device<h8_port_device> portg;
	78	required_device<h8h_timer8_channel_device> timer8_0;
	79	required_device<h8h_timer8_channel_device> timer8_1;
77	80	required_device<h8_timer16_device> timer16;
78	81	required_device<h8s_timer16_channel_device> timer16_0;
79	82	required_device<h8s_timer16_channel_device> timer16_1;

trunk/src/emu/cpu/cpu.mak

r29323	r29324
495	495	$(CPUOBJ)/h8/h8s2245.o $(CPUOBJ)/h8/h8s2320.o $(CPUOBJ)/h8/h8s2357.o \
496	496	$(CPUOBJ)/h8/h8s2655.o \
497	497	$(CPUOBJ)/h8/h8_adc.o $(CPUOBJ)/h8/h8_port.o $(CPUOBJ)/h8/h8_intc.o \
498		$(CPUOBJ)/h8/h8_timer16.o $(CPUOBJ)/h8/h8_sci.o
	498	$(CPUOBJ)/h8/h8_timer8.o $(CPUOBJ)/h8/h8_timer16.o $(CPUOBJ)/h8/h8_sci.o
499	499	DASMOBJS +=
500	500	endif
501	501
r29323	r29324
527	527	$(CPUSRC)/h8/h8_intc.h \
528	528	$(CPUSRC)/h8/h8_adc.h \
529	529	$(CPUSRC)/h8/h8_port.h \
	530	$(CPUSRC)/h8/h8_timer8.h \
530	531	$(CPUSRC)/h8/h8_timer16.h \
531	532	$(CPUSRC)/h8/h8_sci.h
532	533
r29323	r29324
547	548	$(CPUSRC)/h8/h8_intc.h \
548	549	$(CPUSRC)/h8/h8_adc.h \
549	550	$(CPUSRC)/h8/h8_port.h \
	551	$(CPUSRC)/h8/h8_timer8.h \
550	552	$(CPUSRC)/h8/h8_timer16.h \
551	553	$(CPUSRC)/h8/h8_sci.h
552	554
r29323	r29324
557	559	$(CPUSRC)/h8/h8_intc.h \
558	560	$(CPUSRC)/h8/h8_adc.h \
559	561	$(CPUSRC)/h8/h8_port.h \
	562	$(CPUSRC)/h8/h8_timer8.h \
560	563	$(CPUSRC)/h8/h8_timer16.h \
561	564	$(CPUSRC)/h8/h8_sci.h
562	565
r29323	r29324
578	581	$(CPUSRC)/h8/h8_intc.h \
579	582	$(CPUSRC)/h8/h8_adc.h \
580	583	$(CPUSRC)/h8/h8_port.h \
	584	$(CPUSRC)/h8/h8_timer8.h \
581	585	$(CPUSRC)/h8/h8_timer16.h \
582	586	$(CPUSRC)/h8/h8_sci.h
583	587
r29323	r29324
589	593	$(CPUSRC)/h8/h8_intc.h \
590	594	$(CPUSRC)/h8/h8_adc.h \
591	595	$(CPUSRC)/h8/h8_port.h \
	596	$(CPUSRC)/h8/h8_timer8.h \
592	597	$(CPUSRC)/h8/h8_timer16.h \
593	598	$(CPUSRC)/h8/h8_sci.h
594	599
r29323	r29324
600	605	$(CPUSRC)/h8/h8_intc.h \
601	606	$(CPUSRC)/h8/h8_adc.h \
602	607	$(CPUSRC)/h8/h8_port.h \
	608	$(CPUSRC)/h8/h8_timer8.h \
603	609	$(CPUSRC)/h8/h8_timer16.h \
604	610	$(CPUSRC)/h8/h8_sci.h
605	611
r29323	r29324
612	618	$(CPUSRC)/h8/h8_intc.h \
613	619	$(CPUSRC)/h8/h8_adc.h \
614	620	$(CPUSRC)/h8/h8_port.h \
	621	$(CPUSRC)/h8/h8_timer8.h \
615	622	$(CPUSRC)/h8/h8_timer16.h \
616	623	$(CPUSRC)/h8/h8_sci.h
617	624

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