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r29306 Saturday 5th April, 2014 at 11:06:01 UTC by Nathan Woods
Merge branch 'master' of ssh://mess.org/mame into new_menus
[/shelves/new_menus/src/emu]delegate.h memory.c
[/shelves/new_menus/src/emu/bus/epson_sio]tf20.c
[/shelves/new_menus/src/emu/bus/nes]bootleg.c jy.c pirate.c
[/shelves/new_menus/src/emu/bus/ti99_peb]tn_ide.c
[/shelves/new_menus/src/emu/cpu]cpu.mak
[/shelves/new_menus/src/emu/cpu/alph8201]8201dasm.c
[/shelves/new_menus/src/emu/cpu/m68000]m68kmake.c
[/shelves/new_menus/src/emu/cpu/m6809]6309dasm.c 6809dasm.c
[/shelves/new_menus/src/emu/cpu/pic16c5x]16c5xdsm.c
[/shelves/new_menus/src/emu/cpu/pic16c62x]16c62xdsm.c
[/shelves/new_menus/src/emu/cpu/tlcs90]tlcs90.c
[/shelves/new_menus/src/emu/cpu/tms32010]32010dsm.c
[/shelves/new_menus/src/emu/cpu/tms32025]32025dsm.c
[/shelves/new_menus/src/emu/cpu/z80]tlcs_z80.c* z80.h
[/shelves/new_menus/src/emu/debug]debughlp.c
[/shelves/new_menus/src/emu/machine]53c810.c 6526cia.c i8355.c i8355.h nscsi_bus.c pckeybrd.c rtc65271.c rtc65271.h
[/shelves/new_menus/src/emu/sound]samples.c spu_tables.c wave.c
[/shelves/new_menus/src/emu/video]i8275x.c i8275x.h mc6847.c mc6847.h upd3301.c upd3301.h
[/shelves/new_menus/src/mame]mame.mak
[/shelves/new_menus/src/mame/drivers]3do.c dblcrown.c deco_ld.c famibox.c firebeat.c jalmah.c kaneko16.c mjkjidai.c plygonet.c psikyosh.c seicross.c skydiver.c skylncr.c snowbros.c spcforce.c tmspoker.c twinkle.c vlc.c
[/shelves/new_menus/src/mame/includes]3do.h kaneko16.h mjkjidai.h seicross.h
[/shelves/new_menus/src/mame/layout]dblcrown.lay*
[/shelves/new_menus/src/mame/machine]3do.c
[/shelves/new_menus/src/mame/video]kaneko16.c kaneko_spr.c kaneko_spr.h kaneko_tmap.c kaneko_tmap.h lordgun.c starshp1.c
[/shelves/new_menus/src/mess]mess.lst mess.mak
[/shelves/new_menus/src/mess/drivers]altos5.c clcd.c exp85.c gmaster.c lisa.c micronic.c mkit09.c nc.c pc8001.c pecom.c psion.c pve500.c ql.c wicat.c x07.c zorba.c
[/shelves/new_menus/src/mess/includes]lisa.h micronic.h mikromik.h nc.h pc8001.h psion.h x07.h
[/shelves/new_menus/src/mess/layout]pve500.lay*
[/shelves/new_menus/src/mess/machine]6883sam.c coco.c lisa.c swtpc09.c
[/shelves/new_menus/src/mess/tools/floptool]main.c
[/shelves/new_menus/src/mess/tools/imgtool]imgtool.c modules.c
[/shelves/new_menus/src/mess/tools/imgtool/modules]ti99.c
[/shelves/new_menus/src/mess/video]mikromik.c stic.c
[/shelves/new_menus/src/osd/windows]drawgdi.c input.c windows.mak
[/shelves/new_menus/src/tools]jedutil.c

shelves/new_menus/src/osd/windows/windows.mak
r29305r29306
166166endif
167167
168168ifdef MSVC_ANALYSIS
169CCOMFLAGS += /analyze /wd6011 /wd6328 /wd6204 /wd6244 /wd6385 /wd6308 /wd6246 /wd6031 /wd6326 /analyze:stacksize384112
169CCOMFLAGS += /analyze /wd6011 /wd6328 /wd6204 /wd6244 /wd6385 /wd6308 /wd6246 /wd6031 /wd6326 /wd6255 /wd6330 /wd28251 /wd6054 /wd6340 /wd28125 /wd6053 /wd6001 /wd6386 /wd28278 /wd6297 /wd28183 /wd28159 /wd28182 /wd6237 /wd6239 /wd6240 /wd6323 /wd28199 /wd6235 /wd6285 /wd6286 /wd6384 /wd6293 /analyze:stacksize384112
170170endif
171171
172172# enable exception handling for C++
shelves/new_menus/src/osd/windows/drawgdi.c
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8282static int drawgdi_window_init(win_window_info *window)
8383{
8484   gdi_info *gdi;
85   UINT8 i;
85   int i;
8686
8787   // allocate memory for our structures
8888   gdi = global_alloc_clear(gdi_info);
shelves/new_menus/src/osd/windows/input.c
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17321732      RAWINPUTDEVICELIST *device = &devlist[devnum];
17331733
17341734      // handle keyboards
1735      if (device->dwType == RIM_TYPEKEYBOARD && !FORCE_DIRECTINPUT)
1735      if (!FORCE_DIRECTINPUT && device->dwType == RIM_TYPEKEYBOARD)
17361736         rawinput_keyboard_enum(machine, device);
17371737
17381738      // handle mice
1739      else if (device->dwType == RIM_TYPEMOUSE && !FORCE_DIRECTINPUT)
1739      else if (!FORCE_DIRECTINPUT && device->dwType == RIM_TYPEMOUSE)
17401740         rawinput_mouse_enum(machine, device);
17411741   }
17421742
shelves/new_menus/src/emu/sound/spu_tables.c
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123123   s_to_rate(6080.0f)
124124};
125125
126static const int num_linear_rates=sizeof(linear_rate)/sizeof(linear_rate[0]);
126static const int num_linear_rates=ARRAY_LENGTH(linear_rate);
127127
128128static const float pos_exp_rate[]=
129129{
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229229   s_to_rate(2664.0f)
230230};
231231
232static const int num_pos_exp_rates=sizeof(linear_rate)/sizeof(linear_rate[0]);
232static const int num_pos_exp_rates=ARRAY_LENGTH(pos_exp_rate);
233233
234234static const float neg_exp_rate[]=
235235{
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343343   s_to_rate(11200.0f)
344344};
345345
346static const int num_neg_exp_rates=sizeof(linear_rate)/sizeof(linear_rate[0]);
346static const int num_neg_exp_rates=ARRAY_LENGTH(neg_exp_rate);
347347
348348static const float decay_rate[16]=
349349{
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396396   s_to_rate(3040.0f)
397397};
398398
399static const int num_linear_release_rates=sizeof(linear_release_rate)/sizeof(linear_release_rate[0]);
399static const int num_linear_release_rates=ARRAY_LENGTH(linear_release_rate);
400400
401401static const float exp_release_rate[]=
402402{
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429429   s_to_rate(7008.0f)
430430};
431431
432static const int num_exp_release_rates=sizeof(exp_release_rate)/sizeof(exp_release_rate[0]);
432static const int num_exp_release_rates=ARRAY_LENGTH(exp_release_rate);
433433
434434//
435435//
shelves/new_menus/src/emu/sound/wave.c
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3030const device_type WAVE = &device_creator<wave_device>;
3131
3232wave_device::wave_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
33   : device_t(mconfig, WAVE, "Wave", tag, owner, clock, "wawe", __FILE__),
33   : device_t(mconfig, WAVE, "Wave", tag, owner, clock, "wave", __FILE__),
3434      device_sound_interface(mconfig, *this)
3535{
3636   m_cassette_tag = 0;
shelves/new_menus/src/emu/sound/samples.c
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426426
427427bool samples_device::read_wav_sample(emu_file &file, sample_t &sample)
428428{
429   // we already read the opening 'WAVE' header
429   // we already read the opening 'RIFF' tag
430430   UINT32 offset = 4;
431431
432432   // get the total size
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448448      return false;
449449   }
450450   if (memcmp(&buf[0], "WAVE", 4) != 0)
451   {
452      mame_printf_warning("Could not find WAVE header (%s)\n", file.filename());
451453      return false;
454   }
452455
453456   // seek until we find a format tag
454457   UINT32 length;
shelves/new_menus/src/emu/bus/ti99_peb/tn_ide.c
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55    Thierry Nouspikel's IDE card emulation
66
77    This card is just a prototype.  It has been designed by Thierry Nouspikel,
8    and its description was published in 2001.  The card have been revised in
8    and its description was published in 2001.  The card has been revised in
99    2004.
1010
1111    The specs have been published in <http://www.nouspikel.com/ti99/ide.html>.
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332332   m_tms9995_mode =  false; // (device->type()==TMS9995);
333333}
334334
335static const rtc65271_interface ide_rtc_cfg =
336{
337   DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, nouspikel_ide_interface_device, clock_interrupt_callback)
338};
339
340335MACHINE_CONFIG_FRAGMENT( tn_ide )
341   MCFG_RTC65271_ADD( "ide_rtc", ide_rtc_cfg )
336   MCFG_DEVICE_ADD( "ide_rtc", RTC65271, 0 )
337   MCFG_RTC65271_INTERRUPT_CB(WRITELINE(nouspikel_ide_interface_device, clock_interrupt_callback))
342338   MCFG_ATA_INTERFACE_ADD( "ata", ata_devices, "hdd", NULL, false)
343339   MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(nouspikel_ide_interface_device, ide_interrupt_callback))
344340MACHINE_CONFIG_END
shelves/new_menus/src/emu/bus/nes/jy.c
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167167      return;
168168
169169   // no counter changes if both Up/Down are set or clear
170   if ((m_irq_down && m_irq_up) || (!m_irq_down && !m_irq_down))
170   if ((m_irq_down && m_irq_up) || (!m_irq_down && !m_irq_up))
171171      return;
172172
173173   // update prescaler
shelves/new_menus/src/emu/bus/nes/bootleg.c
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11011101   LOG_MMC(("smb2jb write_l, offset: %04x, data: %02x\n", offset, data));
11021102   offset += 0x100;
11031103
1104   switch (offset & 0x160)
1104   switch (offset & 0x1e0)
11051105   {
11061106      case 0x020:
11071107      case 0x0a0:
shelves/new_menus/src/emu/bus/nes/pirate.c
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13241324      case 0x4000:
13251325      case 0x4004:
13261326      case 0x4008:
1327      case 0x4003c:
1327      case 0x400c:
13281328         m_prg_mode = data & 1;
13291329
13301330      case 0x7000:
shelves/new_menus/src/emu/bus/epson_sio/tf20.c
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289289WRITE_LINE_MEMBER( epson_tf20_device::rxc_w )
290290{
291291   m_rxc = state;
292   m_sio_input->rx_w(m_txda & m_rxc);
292   m_sio_input->rx_w(m_txda && m_rxc);
293293}
294294
295295//-------------------------------------------------
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299299WRITE_LINE_MEMBER( epson_tf20_device::pinc_w )
300300{
301301   m_pinc = state;
302   m_sio_input->pin_w(!m_dtra | m_pinc);
302   m_sio_input->pin_w(!m_dtra || m_pinc);
303303}
304304
305305//-------------------------------------------------
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309309WRITE_LINE_MEMBER( epson_tf20_device::txda_w )
310310{
311311   m_txda = state;
312   m_sio_input->rx_w(m_txda & m_rxc);
312   m_sio_input->rx_w(m_txda && m_rxc);
313313}
314314
315315//-------------------------------------------------
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319319WRITE_LINE_MEMBER( epson_tf20_device::dtra_w )
320320{
321321   m_dtra = state;
322   m_sio_input->pin_w(!m_dtra | m_pinc);
322   m_sio_input->pin_w(!m_dtra || m_pinc);
323323}
324324
325325//-------------------------------------------------
shelves/new_menus/src/emu/delegate.h
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156156// and member function pointer of the appropriate type and number of parameters; we use
157157// partial template specialization to support fewer parameters by defaulting the later
158158// parameters to the special type _noparam
159template<typename _ClassType, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type>
159
160// dummy class used to indicate a non-existant parameter
161class _noparam { };
162
163// specialization for 12 parameters
164template<typename _ClassType, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type, typename _P9Type, typename _P10Type, typename _P11Type, typename _P12Type>
160165struct delegate_traits
161166{
167   typedef _ReturnType (*static_func_type)(_ClassType *, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type, _P12Type);
168   typedef _ReturnType (*static_ref_func_type)(_ClassType &, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type, _P12Type);
169   typedef _ReturnType (_ClassType::*member_func_type)(_P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type, _P12Type);
170};
171
172// specialization for 11 parameters
173template<typename _ClassType, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type, typename _P9Type, typename _P10Type, typename _P11Type>
174struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type, _noparam>
175{
176   typedef _ReturnType (*static_func_type)(_ClassType *, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type);
177   typedef _ReturnType (*static_ref_func_type)(_ClassType &, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type);
178   typedef _ReturnType (_ClassType::*member_func_type)(_P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type);
179};
180
181// specialization for 10 parameters
182template<typename _ClassType, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type, typename _P9Type, typename _P10Type>
183struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _noparam, _noparam>
184{
185   typedef _ReturnType (*static_func_type)(_ClassType *, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type);
186   typedef _ReturnType (*static_ref_func_type)(_ClassType &, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type);
187   typedef _ReturnType (_ClassType::*member_func_type)(_P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type);
188};
189
190// specialization for 9 parameters
191template<typename _ClassType, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type, typename _P9Type>
192struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _noparam, _noparam, _noparam>
193{
194   typedef _ReturnType (*static_func_type)(_ClassType *, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type);
195   typedef _ReturnType (*static_ref_func_type)(_ClassType &, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type);
196   typedef _ReturnType (_ClassType::*member_func_type)(_P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type);
197};
198
199// specialization for 8 parameters
200template<typename _ClassType, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type>
201struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _noparam, _noparam, _noparam, _noparam>
202{
162203   typedef _ReturnType (*static_func_type)(_ClassType *, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type);
163204   typedef _ReturnType (*static_ref_func_type)(_ClassType &, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type);
164205   typedef _ReturnType (_ClassType::*member_func_type)(_P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type);
165206};
166207
167// dummy class used to indicate a non-existant parameter
168class _noparam { };
169
208// specialization for 7 parameters
170209template<typename _ClassType, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type>
171struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _noparam>
210struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _noparam, _noparam, _noparam, _noparam, _noparam>
172211{
173212   typedef _ReturnType (*static_func_type)(_ClassType *, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type);
174213   typedef _ReturnType (*static_ref_func_type)(_ClassType &, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type);
175214   typedef _ReturnType (_ClassType::*member_func_type)(_P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type);
176215};
177216
217// specialization for 6 parameters
178218template<typename _ClassType, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type>
179struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _noparam, _noparam>
219struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam>
180220{
181221   typedef _ReturnType (*static_func_type)(_ClassType *, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type);
182222   typedef _ReturnType (*static_ref_func_type)(_ClassType &, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type);
183223   typedef _ReturnType (_ClassType::*member_func_type)(_P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type);
184224};
185225
226// specialization for 5 parameters
186227template<typename _ClassType, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type>
187struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _noparam, _noparam, _noparam>
228struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam>
188229{
189230   typedef _ReturnType (*static_func_type)(_ClassType *, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type);
190231   typedef _ReturnType (*static_ref_func_type)(_ClassType &, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type);
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193234
194235// specialization for 4 parameters
195236template<typename _ClassType, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type>
196struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _noparam, _noparam, _noparam, _noparam>
237struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam>
197238{
198239   typedef _ReturnType (*static_func_type)(_ClassType *, _P1Type, _P2Type, _P3Type, _P4Type);
199240   typedef _ReturnType (*static_ref_func_type)(_ClassType &, _P1Type, _P2Type, _P3Type, _P4Type);
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202243
203244// specialization for 3 parameters
204245template<typename _ClassType, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type>
205struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _noparam, _noparam, _noparam, _noparam, _noparam>
246struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _P3Type, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam>
206247{
207248   typedef _ReturnType (*static_func_type)(_ClassType *, _P1Type, _P2Type, _P3Type);
208249   typedef _ReturnType (*static_ref_func_type)(_ClassType &, _P1Type, _P2Type, _P3Type);
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211252
212253// specialization for 2 parameters
213254template<typename _ClassType, typename _ReturnType, typename _P1Type, typename _P2Type>
214struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam>
255struct delegate_traits<_ClassType, _ReturnType, _P1Type, _P2Type, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam>
215256{
216257   typedef _ReturnType (*static_func_type)(_ClassType *, _P1Type, _P2Type);
217258   typedef _ReturnType (*static_ref_func_type)(_ClassType &, _P1Type, _P2Type);
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220261
221262// specialization for 1 parameter
222263template<typename _ClassType, typename _ReturnType, typename _P1Type>
223struct delegate_traits<_ClassType, _ReturnType, _P1Type, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam>
264struct delegate_traits<_ClassType, _ReturnType, _P1Type, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam>
224265{
225266   typedef _ReturnType (*static_func_type)(_ClassType *, _P1Type);
226267   typedef _ReturnType (*static_ref_func_type)(_ClassType &, _P1Type);
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229270
230271// specialization for no parameters
231272template<typename _ClassType, typename _ReturnType>
232struct delegate_traits<_ClassType, _ReturnType, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam>
273struct delegate_traits<_ClassType, _ReturnType, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam, _noparam>
233274{
234275   typedef _ReturnType (*static_func_type)(_ClassType *);
235276   typedef _ReturnType (*static_ref_func_type)(_ClassType &);
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375416      return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2, p3, p4, p5, p6, p7, p8);
376417   }
377418
419   template<class _FunctionClass, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type, typename _P9Type>
420   static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8, _P9Type p9)
421   {
422      delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
423      typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8, _P9Type p9);
424      mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
425      return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2, p3, p4, p5, p6, p7, p8, p9);
426   }
427
428   template<class _FunctionClass, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type, typename _P9Type, typename _P10Type>
429   static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8, _P9Type p9, _P10Type p10)
430   {
431      delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
432      typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8, _P9Type p9, _P10Type p10);
433      mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
434      return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2, p3, p4, p5, p6, p7, p8, p9, p10);
435   }
436
437   template<class _FunctionClass, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type, typename _P9Type, typename _P10Type, typename _P11Type>
438   static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8, _P9Type p9, _P10Type p10, _P11Type p11)
439   {
440      delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
441      typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8, _P9Type p9, _P10Type p10, _P11Type p11);
442      mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
443      return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2, p3, p4, p5, p6, p7, p8, p9, p10, p11);
444   }
445
446   template<class _FunctionClass, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type, typename _P9Type, typename _P10Type, typename _P11Type, typename _P12Type>
447   static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8, _P9Type p9, _P10Type p10, _P11Type p11, _P12Type p12)
448   {
449      delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
450      typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8, _P9Type p9, _P10Type p10, _P11Type p11, _P12Type p12);
451      mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
452      return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2, p3, p4, p5, p6, p7, p8, p9, p10, p11, p12);
453   }
378454   // helper to convert a function of a given type to a generic function, forcing template
379455   // instantiation to match the source type
380456   template <typename _SourceType>
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463539// ======================> delegate_base
464540
465541// general delegate class template supporting up to 5 parameters
466template<typename _ReturnType, typename _P1Type = _noparam, typename _P2Type = _noparam, typename _P3Type = _noparam, typename _P4Type = _noparam, typename _P5Type = _noparam, typename _P6Type = _noparam, typename _P7Type = _noparam, typename _P8Type = _noparam>
542template<typename _ReturnType, typename _P1Type = _noparam, typename _P2Type = _noparam, typename _P3Type = _noparam, typename _P4Type = _noparam, typename _P5Type = _noparam, typename _P6Type = _noparam, typename _P7Type = _noparam, typename _P8Type = _noparam, typename _P9Type = _noparam, typename _P10Type = _noparam, typename _P11Type = _noparam, typename _P12Type = _noparam>
467543class delegate_base
468544{
469545public:
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471547   template<class _FunctionClass>
472548   struct traits
473549   {
474      typedef typename delegate_traits<_FunctionClass, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type>::member_func_type member_func_type;
475      typedef typename delegate_traits<_FunctionClass, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type>::static_func_type static_func_type;
476      typedef typename delegate_traits<_FunctionClass, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type>::static_ref_func_type static_ref_func_type;
550      typedef typename delegate_traits<_FunctionClass, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type, _P12Type>::member_func_type member_func_type;
551      typedef typename delegate_traits<_FunctionClass, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type, _P12Type>::static_func_type static_func_type;
552      typedef typename delegate_traits<_FunctionClass, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type, _P12Type>::static_ref_func_type static_ref_func_type;
477553   };
478554   typedef typename traits<delegate_generic_class>::static_func_type generic_static_func;
479555
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578654   _ReturnType operator()(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6) const { return (*m_function)(m_object, p1, p2, p3, p4, p5, p6); }
579655   _ReturnType operator()(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7) const { return (*m_function)(m_object, p1, p2, p3, p4, p5, p6, p7); }
580656   _ReturnType operator()(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8) const { return (*m_function)(m_object, p1, p2, p3, p4, p5, p6, p7, p8); }
657   _ReturnType operator()(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8, _P9Type p9) const { return (*m_function)(m_object, p1, p2, p3, p4, p5, p6, p7, p8, p9); }
658   _ReturnType operator()(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8, _P9Type p9, _P10Type p10) const { return (*m_function)(m_object, p1, p2, p3, p4, p5, p6, p7, p8, p9, p10); }
659   _ReturnType operator()(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8, _P9Type p9, _P10Type p10, _P11Type p11) const { return (*m_function)(m_object, p1, p2, p3, p4, p5, p6, p7, p8, p9, p10, p11); }
660   _ReturnType operator()(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5, _P6Type p6, _P7Type p7, _P8Type p8, _P9Type p9, _P10Type p10, _P11Type p11, _P12Type p12) const { return (*m_function)(m_object, p1, p2, p3, p4, p5, p6, p7, p8, p9, p10, p11, p12); }
581661
582662   // getters
583663   bool has_object() const { return (object() != NULL); }
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791871   delegate &operator=(const basetype &src) { *static_cast<basetype *>(this) = src; return *this; }
792872};
793873
874// specialize for 9 parameters
875template<typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type, typename _P9Type>
876class delegate<_ReturnType (_P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type)> : public delegate_base<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type>
877{
878   typedef delegate_base<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type> basetype;
879
880public:
881   // create a standard set of constructors
882   delegate() : basetype() { }
883   delegate(const basetype &src) : basetype(src) { }
884   delegate(const basetype &src, delegate_late_bind &object) : basetype(src, object) { }
885   template<class _FunctionClass> delegate(typename basetype::template traits<_FunctionClass>::member_func_type funcptr, const char *name, _FunctionClass *object) : basetype(funcptr, name, object) { }
886   template<class _FunctionClass> delegate(typename basetype::template traits<_FunctionClass>::static_func_type funcptr, const char *name, _FunctionClass *object) : basetype(funcptr, name, object) { }
887   template<class _FunctionClass> delegate(typename basetype::template traits<_FunctionClass>::static_ref_func_type funcptr, const char *name, _FunctionClass *object) : basetype(funcptr, name, object) { }
888   delegate &operator=(const basetype &src) { *static_cast<basetype *>(this) = src; return *this; }
889};
890
891// specialize for 10 parameters
892template<typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type, typename _P9Type, typename _P10Type>
893class delegate<_ReturnType (_P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type)> : public delegate_base<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type>
894{
895   typedef delegate_base<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type> basetype;
896
897public:
898   // create a standard set of constructors
899   delegate() : basetype() { }
900   delegate(const basetype &src) : basetype(src) { }
901   delegate(const basetype &src, delegate_late_bind &object) : basetype(src, object) { }
902   template<class _FunctionClass> delegate(typename basetype::template traits<_FunctionClass>::member_func_type funcptr, const char *name, _FunctionClass *object) : basetype(funcptr, name, object) { }
903   template<class _FunctionClass> delegate(typename basetype::template traits<_FunctionClass>::static_func_type funcptr, const char *name, _FunctionClass *object) : basetype(funcptr, name, object) { }
904   template<class _FunctionClass> delegate(typename basetype::template traits<_FunctionClass>::static_ref_func_type funcptr, const char *name, _FunctionClass *object) : basetype(funcptr, name, object) { }
905   delegate &operator=(const basetype &src) { *static_cast<basetype *>(this) = src; return *this; }
906};
907
908// specialize for 11 parameters
909template<typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type, typename _P9Type, typename _P10Type, typename _P11Type>
910class delegate<_ReturnType (_P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type)> : public delegate_base<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type>
911{
912   typedef delegate_base<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type> basetype;
913
914public:
915   // create a standard set of constructors
916   delegate() : basetype() { }
917   delegate(const basetype &src) : basetype(src) { }
918   delegate(const basetype &src, delegate_late_bind &object) : basetype(src, object) { }
919   template<class _FunctionClass> delegate(typename basetype::template traits<_FunctionClass>::member_func_type funcptr, const char *name, _FunctionClass *object) : basetype(funcptr, name, object) { }
920   template<class _FunctionClass> delegate(typename basetype::template traits<_FunctionClass>::static_func_type funcptr, const char *name, _FunctionClass *object) : basetype(funcptr, name, object) { }
921   template<class _FunctionClass> delegate(typename basetype::template traits<_FunctionClass>::static_ref_func_type funcptr, const char *name, _FunctionClass *object) : basetype(funcptr, name, object) { }
922   delegate &operator=(const basetype &src) { *static_cast<basetype *>(this) = src; return *this; }
923};
924
925// specialize for 12 parameters
926template<typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type, typename _P6Type, typename _P7Type, typename _P8Type, typename _P9Type, typename _P10Type, typename _P11Type, typename _P12Type>
927class delegate<_ReturnType (_P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type, _P12Type)> : public delegate_base<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type, _P12Type>
928{
929   typedef delegate_base<_ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type, _P6Type, _P7Type, _P8Type, _P9Type, _P10Type, _P11Type, _P12Type> basetype;
930
931public:
932   // create a standard set of constructors
933   delegate() : basetype() { }
934   delegate(const basetype &src) : basetype(src) { }
935   delegate(const basetype &src, delegate_late_bind &object) : basetype(src, object) { }
936   template<class _FunctionClass> delegate(typename basetype::template traits<_FunctionClass>::member_func_type funcptr, const char *name, _FunctionClass *object) : basetype(funcptr, name, object) { }
937   template<class _FunctionClass> delegate(typename basetype::template traits<_FunctionClass>::static_func_type funcptr, const char *name, _FunctionClass *object) : basetype(funcptr, name, object) { }
938   template<class _FunctionClass> delegate(typename basetype::template traits<_FunctionClass>::static_ref_func_type funcptr, const char *name, _FunctionClass *object) : basetype(funcptr, name, object) { }
939   delegate &operator=(const basetype &src) { *static_cast<basetype *>(this) = src; return *this; }
940};
941
794942#endif  /* __DELEGATE_H__ */
shelves/new_menus/src/emu/machine/pckeybrd.c
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393393
394394   m_queue[m_head] = data;
395395   m_head++;
396   m_head %= (sizeof(m_queue) / sizeof(m_queue[0]));
396   m_head %= ARRAY_LENGTH(m_queue);
397397}
398398
399399
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402402   int queue_size;
403403   queue_size = m_head - m_tail;
404404   if (queue_size < 0)
405      queue_size += sizeof(m_queue) / sizeof(m_queue[0]);
405      queue_size += ARRAY_LENGTH(m_queue);
406406   return queue_size;
407407}
408408
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669669      logerror("read(): Keyboard Read 0x%02x\n",data);
670670
671671   m_tail++;
672   m_tail %= sizeof(m_queue) / sizeof(m_queue[0]);
672   m_tail %= ARRAY_LENGTH(m_queue);
673673   return data;
674674}
675675
shelves/new_menus/src/emu/machine/i8355.c
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6565
6666   if (m_ddr[port] != 0xff)
6767   {
68      data |= m_in_port_func[port](0) & ~m_ddr[port];
68      if (port == 0) {data |= m_in_pa_cb(0) & ~m_ddr[port];}
69      else { data |= m_in_pb_cb(0) & ~m_ddr[port];}
6970   }
7071
7172   return data;
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8081{
8182   m_output[port] = data;
8283
83   m_out_port_func[port](0, m_output[port] & m_ddr[port]);
84   if (port == 0) {m_out_pa_cb((offs_t)0, m_output[port] & m_ddr[port]);}
85   else {m_out_pb_cb((offs_t)0, m_output[port] & m_ddr[port]);}
8486}
8587
8688
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9698i8355_device::i8355_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
9799   : device_t(mconfig, I8355, "Intel 8355", tag, owner, clock, "i8355", __FILE__),
98100      device_memory_interface(mconfig, *this),
101      m_in_pa_cb(*this),
102      m_out_pa_cb(*this),
103      m_in_pb_cb(*this),
104      m_out_pb_cb(*this),
99105      m_space_config("ram", ENDIANNESS_LITTLE, 8, 11, 0, NULL, *ADDRESS_MAP_NAME(i8355))
100106{
101107}
102108
103
104109//-------------------------------------------------
105//  device_config_complete - perform any
106//  operations now that the configuration is
107//  complete
108//-------------------------------------------------
109
110void i8355_device::device_config_complete()
111{
112   // inherit a copy of the static data
113   const i8355_interface *intf = reinterpret_cast<const i8355_interface *>(static_config());
114   if (intf != NULL)
115      *static_cast<i8355_interface *>(this) = *intf;
116
117   // or initialize to defaults if none provided
118   else
119   {
120      memset(&m_in_pa_cb, 0, sizeof(m_in_pa_cb));
121      memset(&m_out_pa_cb, 0, sizeof(m_out_pa_cb));
122      memset(&m_in_pb_cb, 0, sizeof(m_in_pb_cb));
123      memset(&m_out_pb_cb, 0, sizeof(m_out_pb_cb));
124   }
125}
126
127
128//-------------------------------------------------
129110//  device_start - device-specific startup
130111//-------------------------------------------------
131112
132113void i8355_device::device_start()
133114{
134115   // resolve callbacks
135   m_in_port_func[0].resolve(m_in_pa_cb, *this);
136   m_in_port_func[1].resolve(m_in_pb_cb, *this);
137   m_out_port_func[0].resolve(m_out_pa_cb, *this);
138   m_out_port_func[1].resolve(m_out_pb_cb, *this);
116   m_in_pa_cb.resolve_safe(0);
117   m_in_pb_cb.resolve_safe(0);
118   m_out_pa_cb.resolve_safe();
119   m_out_pb_cb.resolve_safe();
139120
140121   // register for state saving
141122   save_item(NAME(m_output));
shelves/new_menus/src/emu/machine/i8355.h
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5252//  INTERFACE CONFIGURATION MACROS
5353///*************************************************************************
5454
55#define MCFG_I8355_ADD(_tag, _clock, _config) \
56   MCFG_DEVICE_ADD((_tag), I8355, _clock)  \
57   MCFG_DEVICE_CONFIG(_config)
55#define MCFG_I8355_IN_PA_CB(_devcb) \
56   devcb = &i8355_device::set_in_pa_callback(*device, DEVCB2_##_devcb);
5857
59#define I8355_INTERFACE(name) \
60   const i8355_interface (name) =
58#define MCFG_I8355_OUT_PA_CB(_devcb) \
59   devcb = &i8355_device::set_out_pa_callback(*device, DEVCB2_##_devcb);
60   
61#define MCFG_I8355_IN_PB_CB(_devcb) \
62   devcb = &i8355_device::set_in_pb_callback(*device, DEVCB2_##_devcb);
63   
64#define MCFG_I8355_OUT_PB_CB(_devcb) \
65   devcb = &i8355_device::set_out_pb_callback(*device, DEVCB2_##_devcb);
66   
6167
62
63
6468///*************************************************************************
6569//  TYPE DEFINITIONS
6670///*************************************************************************
6771
68// ======================> i8355_interface
69
70struct i8355_interface
71{
72   devcb_read8             m_in_pa_cb;
73   devcb_write8            m_out_pa_cb;
74
75   devcb_read8             m_in_pb_cb;
76   devcb_write8            m_out_pb_cb;
77};
78
79
80
8172// ======================> i8355_device
8273
8374class i8355_device :    public device_t,
84                  public device_memory_interface,
85                  public i8355_interface
75                  public device_memory_interface
8676{
8777public:
8878   // construction/destruction
8979   i8355_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
9080
81   template<class _Object> static devcb2_base &set_in_pa_callback(device_t &device, _Object object) { return downcast<i8355_device &>(device).m_in_pa_cb.set_callback(object); }
82   template<class _Object> static devcb2_base &set_out_pa_callback(device_t &device, _Object object) { return downcast<i8355_device &>(device).m_out_pa_cb.set_callback(object); }
83   template<class _Object> static devcb2_base &set_in_pb_callback(device_t &device, _Object object) { return downcast<i8355_device &>(device).m_in_pb_cb.set_callback(object); }
84   template<class _Object> static devcb2_base &set_out_pb_callback(device_t &device, _Object object) { return downcast<i8355_device &>(device).m_out_pb_cb.set_callback(object); }
85   
9186   DECLARE_READ8_MEMBER( io_r );
9287   DECLARE_WRITE8_MEMBER( io_w );
9388
r29305r29306
9691
9792protected:
9893   // device-level overrides
99   virtual void device_config_complete();
10094   virtual void device_start();
10195   virtual void device_reset();
10296
r29305r29306
107101   inline void write_port(int port, UINT8 data);
108102
109103private:
110   devcb_resolved_read8        m_in_port_func[2];
111   devcb_resolved_write8       m_out_port_func[2];
104   devcb2_read8             m_in_pa_cb;
105   devcb2_write8            m_out_pa_cb;
112106
107   devcb2_read8             m_in_pb_cb;
108   devcb2_write8            m_out_pb_cb;
109
113110   // registers
114111   UINT8 m_output[2];          // output latches
115112   UINT8 m_ddr[2];             // DDR latches
shelves/new_menus/src/emu/machine/rtc65271.c
r29305r29306
449449   if (m_regs[reg_C] & m_regs[reg_B] & (reg_C_PF | reg_C_AF | reg_C_UF))
450450   {
451451      m_regs[reg_C] |= reg_C_IRQF;
452      if (!m_interrupt_func.isnull())
453         m_interrupt_func(1);
452      if (!m_interrupt_cb.isnull())
453         m_interrupt_cb(1);
454454   }
455455   else
456456   {
457457      m_regs[reg_C] &= ~reg_C_IRQF;
458      if (!m_interrupt_func.isnull())
459         m_interrupt_func(0);
458      if (!m_interrupt_cb.isnull())
459         m_interrupt_cb(0);
460460   }
461461}
462462
r29305r29306
672672
673673rtc65271_device::rtc65271_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
674674   : device_t(mconfig, RTC65271, "RTC65271", tag, owner, clock, "rtc65271", __FILE__),
675      device_nvram_interface(mconfig, *this)
675      device_nvram_interface(mconfig, *this),
676      m_interrupt_cb(*this)
676677{
677678}
678679
679680//-------------------------------------------------
680//  device_config_complete - perform any
681//  operations now that the configuration is
682//  complete
683//-------------------------------------------------
684
685void rtc65271_device::device_config_complete()
686{
687   // inherit a copy of the static data
688   const rtc65271_interface *intf = reinterpret_cast<const rtc65271_interface *>(static_config());
689   if (intf != NULL)
690      *static_cast<rtc65271_interface *>(this) = *intf;
691
692   // or initialize to defaults if none provided
693   else
694   {
695      memset(&m_interrupt_cb, 0, sizeof(m_interrupt_cb));
696   }
697}
698
699//-------------------------------------------------
700681//  device_start - device-specific startup
701682//-------------------------------------------------
702683void rtc65271_device::device_start()
r29305r29306
704685   m_update_timer = machine().scheduler().timer_alloc(FUNC(rtc_begin_update_callback), (void *)this);
705686   m_update_timer->adjust(attotime::from_seconds(1), 0, attotime::from_seconds(1));
706687   m_SQW_timer = machine().scheduler().timer_alloc(FUNC(rtc_SQW_callback), (void *)this);
707   m_interrupt_func.resolve(m_interrupt_cb, *this);
688   m_interrupt_cb.resolve();
708689
709690   save_item(NAME(m_regs));
710691   save_item(NAME(m_cur_reg));
shelves/new_menus/src/emu/machine/rtc65271.h
r29305r29306
99//  INTERFACE CONFIGURATION MACROS
1010//**************************************************************************
1111
12#define MCFG_RTC65271_ADD(_tag, _config) \
13   MCFG_DEVICE_ADD(_tag, RTC65271, 0) \
14   MCFG_DEVICE_CONFIG(_config)
15// ======================> rtc65271_interface
12#define MCFG_RTC65271_INTERRUPT_CB(_devcb) \
13   devcb = &rtc65271_device::set_interrupt_callback(*device, DEVCB2_##_devcb);
1614
17struct rtc65271_interface
18{
19   devcb_write_line    m_interrupt_cb;
20};
2115
2216// ======================> rtc65271_device
2317
2418class rtc65271_device : public device_t,
25                  public device_nvram_interface,
26                  public rtc65271_interface
19                  public device_nvram_interface
2720{
2821public:
2922   // construction/destruction
3023   rtc65271_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
3124protected:
3225   // device-level overrides
33   virtual void device_config_complete();
3426   virtual void device_start();
3527   // device_nvram_interface overrides
3628   virtual void nvram_default();
3729   virtual void nvram_read(emu_file &file);
3830   virtual void nvram_write(emu_file &file);
3931public:
32
33   template<class _Object> static devcb2_base &set_interrupt_callback(device_t &device, _Object object) { return downcast<rtc65271_device &>(device).m_interrupt_cb.set_callback(object); }
34   
4035   DECLARE_READ8_MEMBER( rtc_r );
4136   DECLARE_READ8_MEMBER( xram_r );
4237   DECLARE_WRITE8_MEMBER( rtc_w );
r29305r29306
7065   UINT8 m_SQW_internal_state;
7166
7267   /* callback called when interrupt pin state changes (may be NULL) */
73   devcb_resolved_write_line m_interrupt_func;
68   devcb2_write_line    m_interrupt_cb;
7469};
7570
7671// device type definition
shelves/new_menus/src/emu/machine/53c810.c
r29305r29306
759759      buf += sprintf(buf, "%s ", op_mnemonic);
760760      need_cojunction = FALSE;
761761
762      for (i = 0; i < sizeof(flags) / sizeof(flags[0]); i++)
762      for (i = 0; i < ARRAY_LENGTH(flags); i++)
763763      {
764764         if (op & flags[i].flag)
765765         {
shelves/new_menus/src/emu/machine/6526cia.c
r29305r29306
169169   m_flag = 1;
170170
171171   /* setup ports */
172   for (int p = 0; p < (sizeof(m_port) / sizeof(m_port[0])); p++)
172   for (int p = 0; p < ARRAY_LENGTH(m_port); p++)
173173   {
174174      m_port[p].m_mask_value = 0xff;
175175   }
r29305r29306
177177   /* setup timers */
178178   m_pc_timer = timer_alloc(TIMER_PC);
179179
180   for (int t = 0; t < (sizeof(m_timer) / sizeof(m_timer[0])); t++)
180   for (int t = 0; t < ARRAY_LENGTH(m_timer); t++)
181181   {
182182      cia_timer *timer = &m_timer[t];
183183      timer->m_timer = machine().scheduler().timer_alloc(FUNC(timer_proc), (void*)this);
shelves/new_menus/src/emu/machine/nscsi_bus.c
r29305r29306
447447
448448nscsi_full_device::control *nscsi_full_device::buf_control_push()
449449{
450   if(buf_control_wpos == int(sizeof(buf_control)/sizeof(buf_control[0])))
450   if(buf_control_wpos == int(ARRAY_LENGTH(buf_control)))
451451      throw emu_fatalerror("%s: buf_control overflow\n", tag());
452452
453453   control *c = buf_control + buf_control_wpos;
shelves/new_menus/src/emu/debug/debughlp.c
r29305r29306
14811481      tagcopy[i] = tolower((UINT8)tag[i]);
14821482
14831483   /* find a match */
1484   for (i = 0; i < sizeof(static_help_list) / sizeof(static_help_list[0]); i++)
1484   for (i = 0; i < ARRAY_LENGTH(static_help_list); i++)
14851485      if (!strncmp(static_help_list[i].tag, tagcopy, taglen))
14861486      {
14871487         foundcount++;
r29305r29306
15031503
15041504   /* otherwise, indicate ambiguous help */
15051505   msglen = sprintf(ambig_message, "Ambiguous help request, did you mean:\n");
1506   for (i = 0; i < sizeof(static_help_list) / sizeof(static_help_list[0]); i++)
1506   for (i = 0; i < ARRAY_LENGTH(static_help_list); i++)
15071507      if (!strncmp(static_help_list[i].tag, tagcopy, taglen))
15081508         msglen += sprintf(&ambig_message[msglen], "  help %s?\n", static_help_list[i].tag);
15091509   return ambig_message;
shelves/new_menus/src/emu/cpu/tms32010/32010dsm.c
r29305r29306
154154   NULL
155155};
156156
157#define MAX_OPS (((sizeof(TMS32010Formats) / sizeof(TMS32010Formats[0])) - 1) / PTRS_PER_FORMAT)
157#define MAX_OPS ((ARRAY_LENGTH(TMS32010Formats) - 1) / PTRS_PER_FORMAT)
158158
159159struct TMS32010Opcode  {
160160   word mask;          /* instruction mask */
shelves/new_menus/src/emu/cpu/m68000/m68kmake.c
r29305r29306
7474
7575#if defined(__GNUC__) && (__GNUC__ >= 3)
7676#define ATTR_PRINTF(x,y)        __attribute__((format(printf, x, y)))
77#define ATTR_NORETURN           __attribute__((noreturn))
7778#else
7879#define ATTR_PRINTF(x,y)
80#if defined(_MSC_VER) && (_MSC_VER >= 1200)
81#define ATTR_NORETURN           __declspec(noreturn)
82#else
83#define ATTR_NORETURN
7984#endif
85#endif
8086
8187#define M68K_MAX_PATH 1024
8288#define M68K_MAX_DIR  1024
r29305r29306
224230
225231
226232/* Function Prototypes */
227static void error_exit(const char* fmt, ...) ATTR_PRINTF(1,2);
228static void perror_exit(const char* fmt, ...) ATTR_PRINTF(1,2);
233static void ATTR_NORETURN error_exit(const char* fmt, ...) ATTR_PRINTF(1,2);
234static void ATTR_NORETURN perror_exit(const char* fmt, ...) ATTR_PRINTF(1,2);
229235static int check_strsncpy(char* dst, char* src, int maxlength);
230236static int check_atoi(char* str, int *result);
231237static int skip_spaces(char* str);
shelves/new_menus/src/emu/cpu/alph8201/8201dasm.c
r29305r29306
257257   NULL
258258};
259259
260#define MAX_OPS (((sizeof(Formats) / sizeof(Formats[0])) - 1) / PTRS_PER_FORMAT)
260#define MAX_OPS ((ARRAY_LENGTH(Formats) - 1) / PTRS_PER_FORMAT)
261261
262262struct AD8201Opcode {
263263   byte mask;
shelves/new_menus/src/emu/cpu/tlcs90/tlcs90.c
r29305r29306
975975const char *tlcs90_device::internal_registers_names(UINT16 x)
976976{
977977   int ir = x - T90_IOBASE;
978   if ( ir >= 0 && ir < sizeof(ir_names)/sizeof(ir_names[0]) )
978   if ( ir >= 0 && ir < ARRAY_LENGTH(ir_names) )
979979      return ir_names[ir];
980980   return NULL;
981981}
shelves/new_menus/src/emu/cpu/m6809/6309dasm.c
r29305r29306
582582
583583static const int hd6309_numops[3] =
584584{
585   sizeof(hd6309_pg0opcodes) / sizeof(hd6309_pg0opcodes[0]),
586   sizeof(hd6309_pg1opcodes) / sizeof(hd6309_pg1opcodes[0]),
587   sizeof(hd6309_pg2opcodes) / sizeof(hd6309_pg2opcodes[0])
585   ARRAY_LENGTH(hd6309_pg0opcodes),
586   ARRAY_LENGTH(hd6309_pg1opcodes),
587   ARRAY_LENGTH(hd6309_pg2opcodes)
588588};
589589
590590static const char *const hd6309_regs[5] = { "X", "Y", "U", "S", "PC" };
shelves/new_menus/src/emu/cpu/m6809/6809dasm.c
r29305r29306
351351
352352static const int m6809_numops[3] =
353353{
354   sizeof(m6809_pg0opcodes) / sizeof(m6809_pg0opcodes[0]),
355   sizeof(m6809_pg1opcodes) / sizeof(m6809_pg1opcodes[0]),
356   sizeof(m6809_pg2opcodes) / sizeof(m6809_pg2opcodes[0])
354   ARRAY_LENGTH(m6809_pg0opcodes),
355   ARRAY_LENGTH(m6809_pg1opcodes),
356   ARRAY_LENGTH(m6809_pg2opcodes)
357357};
358358
359359static const char *const m6809_regs[5] = { "X", "Y", "U", "S", "PC" };
shelves/new_menus/src/emu/cpu/pic16c62x/16c62xdsm.c
r29305r29306
9494   NULL
9595};
9696
97#define MAX_OPS (((sizeof(PIC16C62xFormats) / sizeof(PIC16C62xFormats[0])) - 1) / PTRS_PER_FORMAT)
97#define MAX_OPS ((ARRAY_LENGTH(PIC16C62xFormats) - 1) / PTRS_PER_FORMAT)
9898
9999struct PIC16C62xOpcode  {
100100   word mask;          /* instruction mask */
shelves/new_menus/src/emu/cpu/tms32025/32025dsm.c
r29305r29306
314314   NULL
315315};
316316
317#define MAX_OPS (((sizeof(TMS32025Formats) / sizeof(TMS32025Formats[0])) - 1) / PTRS_PER_FORMAT)
317#define MAX_OPS ((ARRAY_LENGTH(TMS32025Formats) - 1) / PTRS_PER_FORMAT)
318318
319319struct TMS32025Opcode  {
320320   word mask;          /* instruction mask */
shelves/new_menus/src/emu/cpu/pic16c5x/16c5xdsm.c
r29305r29306
8484   NULL
8585};
8686
87#define MAX_OPS (((sizeof(PIC16C5xFormats) / sizeof(PIC16C5xFormats[0])) - 1) / PTRS_PER_FORMAT)
87#define MAX_OPS ((ARRAY_LENGTH(PIC16C5xFormats) - 1) / PTRS_PER_FORMAT)
8888
8989struct PIC16C5xOpcode  {
9090   word mask;          /* instruction mask */
shelves/new_menus/src/emu/cpu/z80/tlcs_z80.c
r0r29306
1/*****************************************************************************
2 *
3 *   tlcs_z80.c
4 *   TOSHIBA TLCS Z80 emulation
5 */
6
7#include "emu.h"
8#include "z80.h"
9#include "machine/z80ctc.h"
10#include "machine/z80pio.h"
11#include "machine/z80sio.h"
12
13//TODO: These interfaces should default to DEVCB_NULL pointers and
14// the actual callbacks should be provided by the driver that instantiates the TLCS-Z80 CPU.
15// We need methods for the driver to provide these interface configurations to the CPU core.
16// something like:
17//  m_tlcsz80->set_internal_ctc_interface (ctc_intf);
18//  m_tlcsz80->set_internal_pio_interface (pio_intf);
19//  m_tlcsz80->set_internal_sio_interface (sio_intf);
20
21static Z80CTC_INTERFACE( ctc_intf )
22{
23   DEVCB_CPU_INPUT_LINE(DEVICE_SELF_OWNER, INPUT_LINE_IRQ0), /* interrupt handler */
24   DEVCB_NULL, /* ZC/TO0 callback */
25   DEVCB_NULL, /* ZC/TO1 callback */
26   DEVCB_NULL  /* ZC/TO2 callback */
27};
28
29static Z80PIO_INTERFACE( pio_intf )
30{
31   DEVCB_CPU_INPUT_LINE(DEVICE_SELF_OWNER, INPUT_LINE_IRQ0),
32   DEVCB_NULL,
33   DEVCB_NULL,
34   DEVCB_NULL,
35   DEVCB_NULL,
36   DEVCB_NULL,
37   DEVCB_NULL
38};
39
40static const z80sio_interface sio_intf =
41{
42   DEVCB_CPU_INPUT_LINE(DEVICE_SELF_OWNER, INPUT_LINE_IRQ0), /* interrupt handler */
43  DEVCB_NULL, /* DTR changed handler */
44   DEVCB_NULL, /* RTS changed handler */
45   DEVCB_NULL, /* BREAK changed handler */
46   DEVCB_NULL, /* transmit handler */
47   DEVCB_NULL  /* receive handler */
48};
49
50/* Daisy Chaining */
51
52#ifdef UNUSED
53static const z80_daisy_config tlcsz80_daisy_chain[] =
54{
55   { TLCSZ80_INTERNAL_CTC_TAG },
56   { TLCSZ80_INTERNAL_PIO_TAG },
57   { TLCSZ80_INTERNAL_SIO_TAG },
58   { NULL }
59};
60#endif
61
62static ADDRESS_MAP_START( tlcs_z80_internal_io_map, AS_IO, 8, tlcs_z80_device )
63   AM_RANGE(0x10, 0x13) AM_DEVREADWRITE(TLCSZ80_INTERNAL_CTC_TAG, z80ctc_device, read, write)
64   AM_RANGE(0x18, 0x1B) AM_DEVREADWRITE(TLCSZ80_INTERNAL_SIO_TAG, z80sio_device, read, write)
65   AM_RANGE(0x1C, 0x1F) AM_DEVREADWRITE(TLCSZ80_INTERNAL_PIO_TAG, z80pio_device, read, write)
66//   AM_RANGE(0xF0, 0xF0) TODO: Watchdog Timer: Stand-by mode Register
67//   AM_RANGE(0xF1, 0xF1) TODO: Watchdog Timer: command Register
68//   AM_RANGE(0xF4, 0xF4) TODO: Daisy chain interrupt precedence Register
69ADDRESS_MAP_END
70
71//This is wrong!
72//We should use the same clock as declared in the TLCS_Z80 instantiation in the driver that uses it.
73#define TLCS_Z80_CLOCK 8000000
74
75static MACHINE_CONFIG_FRAGMENT( tlcs_z80 )
76   MCFG_Z80CTC_ADD(TLCSZ80_INTERNAL_CTC_TAG, TLCS_Z80_CLOCK, ctc_intf)
77   MCFG_Z80SIO_ADD(TLCSZ80_INTERNAL_SIO_TAG, TLCS_Z80_CLOCK, sio_intf)
78   MCFG_Z80PIO_ADD(TLCSZ80_INTERNAL_PIO_TAG, TLCS_Z80_CLOCK, pio_intf)
79MACHINE_CONFIG_END
80
81tlcs_z80_device::tlcs_z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
82   : z80_device(mconfig, TLCS_Z80, "TLCS-Z80", tag, owner, clock, "tlcs_z80", __FILE__),
83      m_z80ctc(*this, TLCSZ80_INTERNAL_CTC_TAG),
84      m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 8, 0, ADDRESS_MAP_NAME( tlcs_z80_internal_io_map ) )
85   { }
86
87
88WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg0 ) { m_z80ctc->trg0(state ? 0 : 1); }
89WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg1 ) { m_z80ctc->trg1(state ? 0 : 1); }
90WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg2 ) { m_z80ctc->trg2(state ? 0 : 1); }
91WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg3 ) { m_z80ctc->trg3(state ? 0 : 1); }
92
93
94machine_config_constructor tlcs_z80_device::device_mconfig_additions() const
95{
96   return MACHINE_CONFIG_NAME( tlcs_z80 );
97}
98
99const device_type TLCS_Z80 = &device_creator<tlcs_z80_device>;
100
Property changes on: shelves/new_menus/src/emu/cpu/z80/tlcs_z80.c
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shelves/new_menus/src/emu/cpu/z80/z80.h
r29305r29306
44#define __Z80_H__
55
66#include "z80daisy.h"
7#include "machine/z80ctc.h"
78
9#define TLCSZ80_INTERNAL_CTC_TAG      "tlcsz80_int_ctc"
10#define TLCSZ80_INTERNAL_PIO_TAG      "tlcsz80_int_pio"
11#define TLCSZ80_INTERNAL_SIO_TAG      "tlcsz80_int_sio"
12
813enum
914{
1015   NSC800_RSTA = INPUT_LINE_IRQ0 + 1,
r29305r29306
301306
302307extern const device_type NSC800;
303308
309class tlcs_z80_device : public z80_device
310{
311public:
312   tlcs_z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
313
314   required_device<z80ctc_device> m_z80ctc;
315
316   DECLARE_WRITE8_MEMBER( ctc_w );
317   DECLARE_WRITE_LINE_MEMBER( ctc_trg0 );
318   DECLARE_WRITE_LINE_MEMBER( ctc_trg1 );
319   DECLARE_WRITE_LINE_MEMBER( ctc_trg2 );
320   DECLARE_WRITE_LINE_MEMBER( ctc_trg3 );
321
322protected:
323   virtual machine_config_constructor device_mconfig_additions() const;
324
325   const address_space_config m_io_space_config;
326
327   const address_space_config *memory_space_config(address_spacenum spacenum) const
328   {
329      switch (spacenum)
330      {
331         case AS_IO: return &m_io_space_config;
332         default: return z80_device::memory_space_config(spacenum);
333      }
334   }
335};
336
337extern const device_type TLCS_Z80;
338
304339#endif /* __Z80_H__ */
shelves/new_menus/src/emu/cpu/cpu.mak
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22092209
22102210ifneq ($(filter Z80,$(CPUS)),)
22112211OBJDIRS += $(CPUOBJ)/z80
2212CPUOBJS += $(CPUOBJ)/z80/z80.o $(CPUOBJ)/z80/z80daisy.o
2212CPUOBJS += $(CPUOBJ)/z80/z80.o $(CPUOBJ)/z80/tlcs_z80.o $(CPUOBJ)/z80/z80daisy.o
22132213DASMOBJS += $(CPUOBJ)/z80/z80dasm.o
22142214endif
22152215
22162216$(CPUOBJ)/z80/z80.o:    $(CPUSRC)/z80/z80.c \
22172217                  $(CPUSRC)/z80/z80.h
22182218
2219$(CPUOBJ)/z80/tlcs_z80.o:    $(CPUSRC)/z80/tlcs_z80.c \
2220                  $(CPUSRC)/z80/z80.h
22192221
2220
22212222#-------------------------------------------------
22222223# Sharp LR35902 (Game Boy CPU)
22232224#@src/emu/cpu/lr35902/lr35902.h,CPUS += LR35902
shelves/new_menus/src/emu/video/upd3301.c
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2222
2323*/
2424
25#include "emu.h"
2625#include "upd3301.h"
2726
2827
29// device type definition
30const device_type UPD3301 = &device_creator<upd3301_device>;
3128
32
3329//**************************************************************************
3430//  MACROS / CONSTANTS
3531//**************************************************************************
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6662
6763
6864//**************************************************************************
69//  INLINE HELPERS
65//  DEVICE DEFINITIONS
7066//**************************************************************************
7167
72//-------------------------------------------------
73//  set_interrupt -
74//-------------------------------------------------
68const device_type UPD3301 = &device_creator<upd3301_device>;
7569
76inline void upd3301_device::set_interrupt(int state)
77{
78   if (LOG) logerror("UPD3301 '%s' Interrupt: %u\n", tag(), state);
7970
80   m_out_int_func(state);
8171
82   if (!state)
83   {
84      m_status &= ~(STATUS_N | STATUS_E);
85   }
86}
87
88
89//-------------------------------------------------
90//  set_drq -
91//-------------------------------------------------
92
93inline void upd3301_device::set_drq(int state)
94{
95   if (LOG) logerror("UPD3301 '%s' DRQ: %u\n", tag(), state);
96
97   m_out_drq_func(state);
98}
99
100
101//-------------------------------------------------
102//  set_display -
103//-------------------------------------------------
104
105inline void upd3301_device::set_display(int state)
106{
107   if (state)
108   {
109      m_status |= STATUS_VE;
110   }
111   else
112   {
113      m_status &= ~STATUS_VE;
114   }
115}
116
117
118//-------------------------------------------------
119//  reset_counters -
120//-------------------------------------------------
121
122inline void upd3301_device::reset_counters()
123{
124   set_interrupt(0);
125   set_drq(0);
126}
127
128
129//-------------------------------------------------
130//  update_hrtc_timer -
131//-------------------------------------------------
132
133inline void upd3301_device::update_hrtc_timer(int state)
134{
135   int y = m_screen->vpos();
136
137   int next_x = state ? m_h : 0;
138   int next_y = state ? y : ((y + 1) % ((m_l + m_v) * m_width));
139
140   attotime duration = m_screen->time_until_pos(next_y, next_x);
141
142   m_hrtc_timer->adjust(duration, !state);
143}
144
145
146//-------------------------------------------------
147//  update_vrtc_timer -
148//-------------------------------------------------
149
150inline void upd3301_device::update_vrtc_timer(int state)
151{
152   int next_y = state ? (m_l * m_r) : 0;
153
154   attotime duration = m_screen->time_until_pos(next_y, 0);
155
156   m_vrtc_timer->adjust(duration, !state);
157}
158
159
160//-------------------------------------------------
161//  recompute_parameters -
162//-------------------------------------------------
163
164inline void upd3301_device::recompute_parameters()
165{
166   int horiz_pix_total = (m_h + m_z) * m_width;
167   int vert_pix_total = (m_l + m_v) * m_r;
168
169   attoseconds_t refresh = HZ_TO_ATTOSECONDS(clock()) * horiz_pix_total * vert_pix_total;
170
171   rectangle visarea;
172
173   visarea.set(0, (m_h * m_width) - 1, 0, (m_l * m_r) - 1);
174
175   if (LOG)
176   {
177      if (LOG) logerror("UPD3301 '%s' Screen: %u x %u @ %f Hz\n", tag(), horiz_pix_total, vert_pix_total, 1 / ATTOSECONDS_TO_DOUBLE(refresh));
178      if (LOG) logerror("UPD3301 '%s' Visible Area: (%u, %u) - (%u, %u)\n", tag(), visarea.min_x, visarea.min_y, visarea.max_x, visarea.max_y);
179   }
180
181   m_screen->configure(horiz_pix_total, vert_pix_total, visarea, refresh);
182
183   update_hrtc_timer(0);
184   update_vrtc_timer(0);
185}
186
187
188
18972//**************************************************************************
19073//  LIVE DEVICE
19174//**************************************************************************
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19477//  upd3301_device - constructor
19578//-------------------------------------------------
19679
197upd3301_device::upd3301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
198   : device_t(mconfig, UPD3301, "UPD3301", tag, owner, clock, "upd3301", __FILE__),
199      device_video_interface(mconfig, *this),
200      m_status(0),
201      m_param_count(0),
202      m_data_fifo_pos(0),
203      m_attr_fifo_pos(0),
204      m_input_fifo(0),
205      m_me(0),
206      m_h(80),
207      m_l(20),
208      m_r(10),
209      m_v(6),
210      m_z(32),
211      m_attr_blink(0),
212      m_attr_frame(0),
213      m_cm(0),
214      m_cx(0),
215      m_cy(0),
216      m_cursor_blink(0),
217      m_cursor_frame(0)
80upd3301_device::upd3301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
81   device_t(mconfig, UPD3301, "UPD3301", tag, owner, clock, "upd3301", __FILE__),
82   device_video_interface(mconfig, *this),
83   m_write_int(*this),
84   m_write_drq(*this),
85   m_write_hrtc(*this),
86   m_write_vrtc(*this),
87   m_width(0),
88   m_status(0),
89   m_param_count(0),
90   m_data_fifo_pos(0),
91   m_attr_fifo_pos(0),
92   m_input_fifo(0),
93   m_me(0),
94   m_h(80),
95   m_l(20),
96   m_r(10),
97   m_v(6),
98   m_z(32),
99   m_attr_blink(0),
100   m_attr_frame(0),
101   m_cm(0),
102   m_cx(0),
103   m_cy(0),
104   m_cursor_blink(0),
105   m_cursor_frame(0)
218106{
219107}
220108
221109
222110//-------------------------------------------------
223//  device_config_complete - perform any
224//  operations now that the configuration is
225//  complete
226//-------------------------------------------------
227
228void upd3301_device::device_config_complete()
229{
230   // inherit a copy of the static data
231   const upd3301_interface *intf = reinterpret_cast<const upd3301_interface *>(static_config());
232   if (intf != NULL)
233      *static_cast<upd3301_interface *>(this) = *intf;
234
235   // or initialize to defaults if none provided
236   else
237   {
238      memset(&m_out_int_cb, 0, sizeof(m_out_int_cb));
239      memset(&m_out_drq_cb, 0, sizeof(m_out_drq_cb));
240      memset(&m_out_hrtc_cb, 0, sizeof(m_out_hrtc_cb));
241      memset(&m_out_vrtc_cb, 0, sizeof(m_out_vrtc_cb));
242   }
243}
244
245
246//-------------------------------------------------
247111//  device_start - device-specific startup
248112//-------------------------------------------------
249113
250114void upd3301_device::device_start()
251115{
116   // resolve callbacks
117   m_display_cb.bind_relative_to(*owner());
118   m_write_drq.resolve_safe();
119   m_write_int.resolve_safe();
120   m_write_hrtc.resolve_safe();
121   m_write_vrtc.resolve_safe();
122
252123   // allocate timers
253124   m_hrtc_timer = timer_alloc(TIMER_HRTC);
254125   m_vrtc_timer = timer_alloc(TIMER_VRTC);
255126   m_drq_timer = timer_alloc(TIMER_DRQ);
256127
257   // resolve callbacks
258   m_out_int_func.resolve(m_out_int_cb, *this);
259   m_out_drq_func.resolve(m_out_drq_cb, *this);
260   m_out_hrtc_func.resolve(m_out_hrtc_cb, *this);
261   m_out_vrtc_func.resolve(m_out_vrtc_cb, *this);
262
263128   // state saving
264129   save_item(NAME(m_y));
265130   save_item(NAME(m_hrtc));
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329194   case TIMER_HRTC:
330195      if (LOG) logerror("UPD3301 '%s' HRTC: %u\n", tag(), param);
331196
332      m_out_hrtc_func(param);
197      m_write_hrtc(param);
333198      m_hrtc = param;
334199
335200      update_hrtc_timer(param);
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338203   case TIMER_VRTC:
339204      if (LOG) logerror("UPD3301 '%s' VRTC: %u\n", tag(), param);
340205
341      m_out_vrtc_func(param);
206      m_write_vrtc(param);
342207      m_vrtc = param;
343208
344209      if (param && !m_me)
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609474         int csr = m_cm && m_cursor_blink && ((y / m_r) == m_cy) && (sx == m_cx);
610475         int gpa = 0; // TODO
611476
612         m_display_cb(this, *m_bitmap, y, sx, cc, lc, hlgt, rvv, vsp, sl0, sl12, csr, gpa);
477         m_display_cb(*m_bitmap, y, sx, cc, lc, hlgt, rvv, vsp, sl0, sl12, csr, gpa);
613478      }
614479   }
615480
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655520   }
656521   return 0;
657522}
523
524
525//-------------------------------------------------
526//  set_interrupt -
527//-------------------------------------------------
528
529void upd3301_device::set_interrupt(int state)
530{
531   if (LOG) logerror("UPD3301 '%s' Interrupt: %u\n", tag(), state);
532
533   m_write_int(state);
534
535   if (!state)
536   {
537      m_status &= ~(STATUS_N | STATUS_E);
538   }
539}
540
541
542//-------------------------------------------------
543//  set_drq -
544//-------------------------------------------------
545
546void upd3301_device::set_drq(int state)
547{
548   if (LOG) logerror("UPD3301 '%s' DRQ: %u\n", tag(), state);
549
550   m_write_drq(state);
551}
552
553
554//-------------------------------------------------
555//  set_display -
556//-------------------------------------------------
557
558void upd3301_device::set_display(int state)
559{
560   if (state)
561   {
562      m_status |= STATUS_VE;
563   }
564   else
565   {
566      m_status &= ~STATUS_VE;
567   }
568}
569
570
571//-------------------------------------------------
572//  reset_counters -
573//-------------------------------------------------
574
575void upd3301_device::reset_counters()
576{
577   set_interrupt(0);
578   set_drq(0);
579}
580
581
582//-------------------------------------------------
583//  update_hrtc_timer -
584//-------------------------------------------------
585
586void upd3301_device::update_hrtc_timer(int state)
587{
588   int y = m_screen->vpos();
589
590   int next_x = state ? m_h : 0;
591   int next_y = state ? y : ((y + 1) % ((m_l + m_v) * m_width));
592
593   attotime duration = m_screen->time_until_pos(next_y, next_x);
594
595   m_hrtc_timer->adjust(duration, !state);
596}
597
598
599//-------------------------------------------------
600//  update_vrtc_timer -
601//-------------------------------------------------
602
603void upd3301_device::update_vrtc_timer(int state)
604{
605   int next_y = state ? (m_l * m_r) : 0;
606
607   attotime duration = m_screen->time_until_pos(next_y, 0);
608
609   m_vrtc_timer->adjust(duration, !state);
610}
611
612
613//-------------------------------------------------
614//  recompute_parameters -
615//-------------------------------------------------
616
617void upd3301_device::recompute_parameters()
618{
619   int horiz_pix_total = (m_h + m_z) * m_width;
620   int vert_pix_total = (m_l + m_v) * m_r;
621
622   attoseconds_t refresh = HZ_TO_ATTOSECONDS(clock()) * horiz_pix_total * vert_pix_total;
623
624   rectangle visarea;
625
626   visarea.set(0, (m_h * m_width) - 1, 0, (m_l * m_r) - 1);
627
628   if (LOG)
629   {
630      if (LOG) logerror("UPD3301 '%s' Screen: %u x %u @ %f Hz\n", tag(), horiz_pix_total, vert_pix_total, 1 / ATTOSECONDS_TO_DOUBLE(refresh));
631      if (LOG) logerror("UPD3301 '%s' Visible Area: (%u, %u) - (%u, %u)\n", tag(), visarea.min_x, visarea.min_y, visarea.max_x, visarea.max_y);
632   }
633
634   m_screen->configure(horiz_pix_total, vert_pix_total, visarea, refresh);
635
636   update_hrtc_timer(0);
637   update_vrtc_timer(0);
638}
639
shelves/new_menus/src/emu/video/upd3301.h
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4242
4343
4444//**************************************************************************
45//  MACROS / CONSTANTS
45//  INTERFACE CONFIGURATION MACROS
4646//**************************************************************************
4747
48#define UPD3301_DRAW_CHARACTER_MEMBER(_name) void _name(bitmap_rgb32 &bitmap, int y, int sx, UINT8 cc, UINT8 lc, int hlgt, int rvv, int vsp, int sl0, int sl12, int csr, int gpa)
4849
4950
51#define MCFG_UPD3301_CHARACTER_WIDTH(_value) \
52   upd3301_device::static_set_character_width(*device, _value);
5053
51//**************************************************************************
52//  INTERFACE CONFIGURATION MACROS
53//**************************************************************************
54#define MCFG_UPD3301_DRAW_CHARACTER_CALLBACK_OWNER(_class, _method) \
55   upd3301_device::static_set_display_callback(*device, upd3301_draw_character_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
5456
55#define MCFG_UPD3301_ADD(_tag, _clock, _intrf) \
56   MCFG_DEVICE_ADD(_tag, UPD3301, _clock) \
57   MCFG_DEVICE_CONFIG(_intrf)
57#define MCFG_UPD3301_DRQ_CALLBACK(_write) \
58   devcb = &upd3301_device::set_drq_wr_callback(*device, DEVCB2_##_write);
5859
60#define MCFG_UPD3301_INT_CALLBACK(_write) \
61   devcb = &upd3301_device::set_int_wr_callback(*device, DEVCB2_##_write);
5962
60#define UPD3301_INTERFACE(name) \
61   const upd3301_interface (name) =
63#define MCFG_UPD3301_HRTC_CALLBACK(_write) \
64   devcb = &upd3301_device::set_hrtc_wr_callback(*device, DEVCB2_##_write);
6265
66#define MCFG_UPD3301_VRTC_CALLBACK(_write) \
67   devcb = &upd3301_device::set_vrtc_wr_callback(*device, DEVCB2_##_write);
6368
6469
70
6571//**************************************************************************
6672//  TYPE DEFINITIONS
6773//**************************************************************************
6874
69// ======================> upd3301_display_pixels_func
75typedef device_delegate<void (bitmap_rgb32 &bitmap, int y, int sx, UINT8 cc, UINT8 lc, int hlgt, int rvv, int vsp, int sl0, int sl12, int csr, int gpa)> upd3301_draw_character_delegate;
7076
71typedef void (*upd3301_display_pixels_func)(device_t *device, bitmap_rgb32 &bitmap, int y, int sx, UINT8 cc, UINT8 lc, int hlgt, int rvv, int vsp, int sl0, int sl12, int csr, int gpa);
72#define UPD3301_DISPLAY_PIXELS(name) void name(device_t *device, bitmap_rgb32 &bitmap, int y, int sx, UINT8 cc, UINT8 lc, int hlgt, int rvv, int vsp, int sl0, int sl12, int csr, int gpa)
7377
74
75// ======================> upd3301_interface
76
77struct upd3301_interface
78{
79   int m_width;                    // char width in pixels
80
81   upd3301_display_pixels_func m_display_cb;
82
83   devcb_write_line        m_out_int_cb;
84   devcb_write_line        m_out_drq_cb;
85   devcb_write_line        m_out_hrtc_cb;
86   devcb_write_line        m_out_vrtc_cb;
87};
88
89
90
9178// ======================> upd3301_device
9279
9380class upd3301_device :  public device_t,
94                  public device_video_interface,
95                  public upd3301_interface
81                  public device_video_interface
9682{
9783public:
9884   // construction/destruction
9985   upd3301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
10086
87   static void static_set_character_width(device_t &device, int value) { downcast<upd3301_device &>(device).m_width = value; }
88   static void static_set_display_callback(device_t &device, upd3301_draw_character_delegate callback) { downcast<upd3301_device &>(device).m_display_cb = callback; }
89
90   template<class _Object> static devcb2_base &set_drq_wr_callback(device_t &device, _Object object) { return downcast<upd3301_device &>(device).m_write_drq.set_callback(object); }
91   template<class _Object> static devcb2_base &set_int_wr_callback(device_t &device, _Object object) { return downcast<upd3301_device &>(device).m_write_int.set_callback(object); }
92   template<class _Object> static devcb2_base &set_hrtc_wr_callback(device_t &device, _Object object) { return downcast<upd3301_device &>(device).m_write_hrtc.set_callback(object); }
93   template<class _Object> static devcb2_base &set_vrtc_wr_callback(device_t &device, _Object object) { return downcast<upd3301_device &>(device).m_write_vrtc.set_callback(object); }
94
10195   DECLARE_READ8_MEMBER( read );
10296   DECLARE_WRITE8_MEMBER( write );
10397   DECLARE_WRITE8_MEMBER( dack_w );
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109103
110104protected:
111105   // device-level overrides
112   virtual void device_config_complete();
113106   virtual void device_start();
114107   virtual void device_reset();
115108   virtual void device_clock_changed();
116109   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
117110
118111private:
119   static const device_timer_id TIMER_HRTC = 0;
120   static const device_timer_id TIMER_VRTC = 1;
121   static const device_timer_id TIMER_DRQ = 2;
112   enum
113   {
114      TIMER_HRTC,
115      TIMER_VRTC,
116      TIMER_DRQ
117   };
122118
123   inline void set_interrupt(int state);
124   inline void set_drq(int state);
125   inline void set_display(int state);
126   inline void reset_counters();
127   inline void update_hrtc_timer(int state);
128   inline void update_vrtc_timer(int state);
129   inline void recompute_parameters();
119   void set_interrupt(int state);
120   void set_drq(int state);
121   void set_display(int state);
122   void reset_counters();
123   void update_hrtc_timer(int state);
124   void update_vrtc_timer(int state);
125   void recompute_parameters();
130126
131127   void draw_scanline();
132128
133   devcb_resolved_write_line       m_out_int_func;
134   devcb_resolved_write_line       m_out_drq_func;
135   devcb_resolved_write_line       m_out_hrtc_func;
136   devcb_resolved_write_line       m_out_vrtc_func;
129   devcb2_write_line   m_write_int;
130   devcb2_write_line   m_write_drq;
131   devcb2_write_line   m_write_hrtc;
132   devcb2_write_line   m_write_vrtc;
137133
134   upd3301_draw_character_delegate m_display_cb;
135   int m_width;
136
138137   // screen drawing
139138   bitmap_rgb32 *m_bitmap;     // bitmap
140139   int m_y;                        // current scanline
shelves/new_menus/src/emu/video/i8275x.c
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9393   m_write_drq(*this),
9494   m_write_hrtc(*this),
9595   m_write_vrtc(*this),
96   m_display_cb(NULL),
9796   m_status(0),
9897   m_param_idx(0),
9998   m_param_end(0),
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124123   m_screen->register_screen_bitmap(m_bitmap);
125124
126125   // resolve callbacks
126   m_display_cb.bind_relative_to(*owner());
127127   m_write_drq.resolve_safe();
128128   m_write_irq.resolve_safe();
129129   m_write_hrtc.resolve_safe();
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334334               lc = (lc - 1) & 0x0f;
335335            }
336336
337            if (m_display_cb)
338            m_display_cb(this, m_bitmap,
337            if (!m_display_cb.isnull())
338            m_display_cb(m_bitmap,
339339               sx * m_hpixels_per_column, // x position on screen of starting point
340340               m_scanline, // y position on screen
341341               lc, // current line of char
shelves/new_menus/src/emu/video/i8275x.h
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4545//  INTERFACE CONFIGURATION MACROS
4646//**************************************************************************
4747
48#define I8275_DRAW_CHARACTER_MEMBER(_name) void _name(bitmap_rgb32 &bitmap, int x, int y, UINT8 linecount, UINT8 charcode, UINT8 lineattr, UINT8 lten, UINT8 rvv, UINT8 vsp, UINT8 gpa, UINT8 hlgt)
49
50
4851#define MCFG_I8275_CHARACTER_WIDTH(_value) \
4952   i8275x_device::static_set_character_width(*device, _value);
5053
51#define MCFG_I8275_DISPLAY_CALLBACK(_func) \
52   i8275x_device::static_set_display_callback(*device, _func);
54#define MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(_class, _method) \
55   i8275x_device::static_set_display_callback(*device, i8275_draw_character_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
5356
5457#define MCFG_I8275_DRQ_CALLBACK(_write) \
5558   devcb = &i8275x_device::set_drq_wr_callback(*device, DEVCB2_##_write);
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7073//  TYPE DEFINITIONS
7174//**************************************************************************
7275
73class i8275x_device;
76typedef device_delegate<void (bitmap_rgb32 &bitmap, int x, int y, UINT8 linecount, UINT8 charcode, UINT8 lineattr, UINT8 lten, UINT8 rvv, UINT8 vsp, UINT8 gpa, UINT8 hlgt)> i8275_draw_character_delegate;
7477
7578
76// ======================> i8275_display_pixels_func
77
78typedef void (*i8275_display_pixels_func)(i8275x_device *device, bitmap_rgb32 &bitmap, int x, int y, UINT8 linecount, UINT8 charcode, UINT8 lineattr, UINT8 lten, UINT8 rvv, UINT8 vsp, UINT8 gpa, UINT8 hlgt);
79#define I8275_DISPLAY_PIXELS(name)  void name(i8275x_device *device, bitmap_rgb32 &bitmap, int x, int y, UINT8 linecount, UINT8 charcode, UINT8 lineattr, UINT8 lten, UINT8 rvv, UINT8 vsp, UINT8 gpa, UINT8 hlgt)
80
81
8279// ======================> i8275x_device
8380
8481class i8275x_device :   public device_t,
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8986   i8275x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
9087
9188   static void static_set_character_width(device_t &device, int value) { downcast<i8275x_device &>(device).m_hpixels_per_column = value; }
92   static void static_set_display_callback(device_t &device, i8275_display_pixels_func func) { downcast<i8275x_device &>(device).m_display_cb = func; }
89   static void static_set_display_callback(device_t &device, i8275_draw_character_delegate callback) { downcast<i8275x_device &>(device).m_display_cb = callback; }
9390
9491   template<class _Object> static devcb2_base &set_drq_wr_callback(device_t &device, _Object object) { return downcast<i8275x_device &>(device).m_write_drq.set_callback(object); }
9592   template<class _Object> static devcb2_base &set_irq_wr_callback(device_t &device, _Object object) { return downcast<i8275x_device &>(device).m_write_irq.set_callback(object); }
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178175   devcb2_write_line   m_write_hrtc;
179176   devcb2_write_line   m_write_vrtc;
180177
181   i8275_display_pixels_func m_display_cb;
178   i8275_draw_character_delegate m_display_cb;
182179   int m_hpixels_per_column;
183180
184181   bitmap_rgb32 m_bitmap;
shelves/new_menus/src/emu/video/mc6847.c
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929929   }
930930
931931   // loop through all modes
932   for (mode = 0; mode < sizeof(m_entries) / sizeof(m_entries[0]); mode++)
932   for (mode = 0; mode < ARRAY_LENGTH(m_entries); mode++)
933933   {
934934      const UINT8 *fontdata;
935935      UINT8 character_mask;
shelves/new_menus/src/emu/video/mc6847.h
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151151            UINT8 character = data[i];
152152
153153            // based on the mode, determine which entry to use
154            const entry *e = &m_entries[mode % (sizeof(m_entries) / sizeof(m_entries[0]))];
154            const entry *e = &m_entries[mode % ARRAY_LENGTH(m_entries)];
155155
156156            // identify the character in the font data
157157            const UINT8 *font_character = e->m_fontdata + (character & e->m_character_mask) * 12;
shelves/new_menus/src/emu/memory.c
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29012901{
29022902   // make our static table all watchpoints
29032903   if (s_watchpoint_table[0] != STATIC_WATCHPOINT)
2904      for (unsigned int i=0; i != sizeof(s_watchpoint_table)/sizeof(s_watchpoint_table[0]); i++)
2904      for (unsigned int i=0; i != ARRAY_LENGTH(s_watchpoint_table); i++)
29052905         s_watchpoint_table[i] = STATIC_WATCHPOINT;
29062906
29072907   // initialize everything to unmapped
shelves/new_menus/src/mess/machine/coco.c
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120120   driver_device::device_start();
121121
122122   /* look up keyboard ports */
123   for (int i = 0; i < sizeof(m_keyboard) / sizeof(m_keyboard[0]); i++)
123   for (int i = 0; i < ARRAY_LENGTH(m_keyboard); i++)
124124   {
125125      char name[32];
126      snprintf(name, sizeof(name) / sizeof(name[0]), "row%d", i);
126      snprintf(name, ARRAY_LENGTH(name), "row%d", i);
127127      m_keyboard[i] =  ioport(name);
128128   }
129129
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850850   UINT8 pia0_pa_z = 0x7F;
851851
852852   /* poll the keyboard, and update PA6-PA0 accordingly*/
853   for (int i = 0; i < sizeof(m_keyboard) / sizeof(m_keyboard[0]); i++)
853   for (int i = 0; i < ARRAY_LENGTH(m_keyboard); i++)
854854   {
855855      int value = m_keyboard[i]->read();
856856      if ((value | pia0_pb) != 0xFF)
shelves/new_menus/src/mess/machine/lisa.c
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842842
843843/* should save PRAM to file */
844844/* TODO : save time difference with host clock, set default date, etc */
845NVRAM_HANDLER(lisa)
845void lisa_state::nvram_init(nvram_device &nvram, void *data, size_t size)
846846{
847   lisa_state *state = machine.driver_data<lisa_state>();
847   memset(data, 0x00, size);
848848
849   if (read_or_write)
850849   {
851      file->write(state->m_fdc_ram, 1024);
852   }
853   else
854   {
855      if (file)
856         file->read(state->m_fdc_ram, 1024);
857      else
858         memset(state->m_fdc_ram, 0, 1024);
850      /* Now we copy the host clock into the Lisa clock */
851      system_time systime;
852      machine().base_datetime(systime);
859853
860      {
861         /* Now we copy the host clock into the Lisa clock */
862         system_time systime;
863         machine.base_datetime(systime);
854      m_clock_regs.alarm = 0xfffffL;
855      /* The clock count starts on 1st January 1980 */
856      m_clock_regs.years = (systime.local_time.year - 1980) & 0xf;
857      m_clock_regs.days1 = (systime.local_time.day + 1) / 100;
858      m_clock_regs.days2 = ((systime.local_time.day + 1) / 10) % 10;
859      m_clock_regs.days3 = (systime.local_time.day + 1) % 10;
860      m_clock_regs.hours1 = systime.local_time.hour / 10;
861      m_clock_regs.hours2 = systime.local_time.hour % 10;
862      m_clock_regs.minutes1 = systime.local_time.minute / 10;
863      m_clock_regs.minutes2 = systime.local_time.minute % 10;
864      m_clock_regs.seconds1 = systime.local_time.second / 10;
865      m_clock_regs.seconds2 = systime.local_time.second % 10;
866      m_clock_regs.tenths = 0;
864867
865         state->m_clock_regs.alarm = 0xfffffL;
866         /* The clock count starts on 1st January 1980 */
867         state->m_clock_regs.years = (systime.local_time.year - 1980) & 0xf;
868         state->m_clock_regs.days1 = (systime.local_time.day + 1) / 100;
869         state->m_clock_regs.days2 = ((systime.local_time.day + 1) / 10) % 10;
870         state->m_clock_regs.days3 = (systime.local_time.day + 1) % 10;
871         state->m_clock_regs.hours1 = systime.local_time.hour / 10;
872         state->m_clock_regs.hours2 = systime.local_time.hour % 10;
873         state->m_clock_regs.minutes1 = systime.local_time.minute / 10;
874         state->m_clock_regs.minutes2 = systime.local_time.minute % 10;
875         state->m_clock_regs.seconds1 = systime.local_time.second / 10;
876         state->m_clock_regs.seconds2 = systime.local_time.second % 10;
877         state->m_clock_regs.tenths = 0;
878      }
879      state->m_clock_regs.clock_mode = timer_disable;
880      state->m_clock_regs.clock_write_ptr = -1;
868      m_clock_regs.clock_mode = timer_disable;
869      m_clock_regs.clock_write_ptr = -1;
881870   }
882
883
884871#if 0
885872   UINT32 temp32;
886873   SINT8 temp8;
887874   temp32 = (m_clock_regs.alarm << 12) | (m_clock_regs.years << 8) | (m_clock_regs.days1 << 4)
888         | m_clock_regs.days2;
875   | m_clock_regs.days2;
889876
890877   temp32 = (m_clock_regs.days3 << 28) | (m_clock_regs.hours1 << 24) | (m_clock_regs.hours2 << 20)
891         | (m_clock_regs.minutes1 << 16) | (m_clock_regs.minutes2 << 12)
892         | (m_clock_regs.seconds1 << 8) | (m_clock_regs.seconds2 << 4) | m_clock_regs.tenths;
878   | (m_clock_regs.minutes1 << 16) | (m_clock_regs.minutes2 << 12)
879   | (m_clock_regs.seconds1 << 8) | (m_clock_regs.seconds2 << 4) | m_clock_regs.tenths;
893880
894881   temp8 = clock_mode;         /* clock mode */
895882
896883   temp8 = m_clock_regs.clock_write_ptr;    /* clock byte to be written next (-1 if clock write disabled) */
897884#endif
885
898886}
899887
888
900889#ifdef UNUSED_FUNCTION
901890void lisa_state::init_lisa1(void)
902891{
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953942
954943   /* read command every ms (don't know the real value) */
955944   machine().scheduler().timer_pulse(attotime::from_msec(1), timer_expired_delegate(FUNC(lisa_state::set_COPS_ready),this));
945
946   m_nvram->set_base(m_fdc_ram, 1024);
956947}
957948
958949void lisa_state::machine_reset()
shelves/new_menus/src/mess/machine/6883sam.c
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142142
143143void sam6883_device::configure_bank(int bank, UINT8 *memory, UINT32 memory_size, bool is_read_only, read8_delegate rhandler, write8_delegate whandler)
144144{
145   assert((bank >= 0) && (bank < sizeof(m_banks) / sizeof(m_banks[0])));
145   assert((bank >= 0) && (bank < ARRAY_LENGTH(m_banks)));
146146   m_banks[bank].m_memory = memory;
147147   m_banks[bank].m_memory_size = memory_size;
148148   m_banks[bank].m_memory_read_only = is_read_only;
shelves/new_menus/src/mess/machine/swtpc09.c
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4141
4242   m_pia_counter++;
4343   //pia_counter = pia_counter && 0xff;
44    if (m_pia_counter && 0x80) pia->ca1_w(1);
44    if (m_pia_counter & 0x80) pia->ca1_w(1);
4545}
4646
4747WRITE8_MEMBER( swtpc09_state::ptm_o3_callback )
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720720
721721         /* a read here clears the DMA end flag */
722722         m_m6844_channel[offset - 0x10].control &= ~0x80;
723            if (m_m6844_interrupt && 0x80) // if interrupt is active, then clear
723            if (m_m6844_interrupt & 0x80) // if interrupt is active, then clear
724724            {
725725                swtpc09_irq_handler(0x01, CLEAR_LINE);
726726             m_m6844_interrupt &= 0x7f;  // clear interrupt indication bit 7
shelves/new_menus/src/mess/includes/mikromik.h
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125125   int m_fdc_tc;
126126
127127   DECLARE_FLOPPY_FORMATS( floppy_formats );
128   I8275_DRAW_CHARACTER_MEMBER( crtc_display_pixels );
128129   UPD7220_DISPLAY_PIXELS_MEMBER( hgdc_display_pixels );
129130};
130131
shelves/new_menus/src/mess/includes/x07.h
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99#include "emu.h"
1010#include "cpu/z80/z80.h"
1111#include "sound/beep.h"
12#include "machine/nvram.h"
1213#include "machine/ram.h"
1314#include "sound/wave.h"
1415#include "imagedev/cartslot.h"
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164165         m_printer(*this, "printer"),
165166         m_beep(*this, "beeper"),
166167         m_ram(*this, RAM_TAG),
167         m_cassette(*this, "cassette")
168         m_nvram1(*this, "nvram1"),
169         m_nvram2(*this, "nvram2"),
170         m_cassette(*this, "cassette"),
171         m_warm_start(1)
168172   { }
169173
170174   required_device<cpu_device> m_maincpu;
171175   required_device<printer_image_device> m_printer;
172176   required_device<beep_device> m_beep;
173177   required_device<ram_device> m_ram;
178   required_device<nvram_device> m_nvram1;
179   required_device<nvram_device> m_nvram2;
174180   required_device<cassette_image_device> m_cassette;
175181
176182   void machine_start();
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184190   DECLARE_INPUT_CHANGED_MEMBER( kb_break );
185191   DECLARE_INPUT_CHANGED_MEMBER( kb_update_udk );
186192
193   DECLARE_DRIVER_INIT(x07);
194   void nvram_init(nvram_device &nvram, void *data, size_t size);
195
187196   void t6834_cmd(UINT8 cmd);
188197   void t6834_r();
189198   void t6834_w();
shelves/new_menus/src/mess/includes/lisa.h
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1010#define LISA_H_
1111
1212#include "emu.h"
13#include "cpu/m68000/m68000.h"
1314#include "machine/6522via.h"
1415#include "machine/8530scc.h"
1516#include "machine/6522via.h"
17#include "machine/nvram.h"
1618#include "machine/applefdc.h"
1719#include "machine/sonydriv.h"
18#include "cpu/m68000/m68000.h"
1920#include "sound/speaker.h"
2021
2122#define COP421_TAG      "u9f"
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106107      m_fdc(*this, "fdc"),
107108      m_scc(*this, "scc"),
108109      m_speaker(*this, "speaker"),
110      m_nvram(*this, "nvram"),
109111      m_fdc_rom(*this,"fdc_rom"),
110112      m_fdc_ram(*this,"fdc_ram"),
111113      m_io_line0(*this, "LINE0"),
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127129   optional_device<applefdc_base_device> m_fdc;
128130   required_device<scc8530_t> m_scc;
129131   required_device<speaker_sound_device> m_speaker;
132   required_device<nvram_device> m_nvram;
130133
131134   required_shared_ptr<UINT8> m_fdc_rom;
132135   required_shared_ptr<UINT8> m_fdc_ram;
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202205   virtual void machine_start();
203206   virtual void machine_reset();
204207   virtual void video_start();
208   void nvram_init(nvram_device &nvram, void *data, size_t size);
205209   UINT32 screen_update_lisa(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
206210   INTERRUPT_GEN_MEMBER(lisa_interrupt);
207211   TIMER_CALLBACK_MEMBER(handle_mouse);
shelves/new_menus/src/mess/includes/micronic.h
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1313#include "video/hd61830.h"
1414#include "machine/mc146818.h"
1515#include "machine/ram.h"
16#include "machine/nvram.h"
1617#include "sound/beep.h"
1718#include "imagedev/cassette.h"
1819
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3031      m_lcdc(*this, HD61830_TAG),
3132      m_beep(*this, "beeper"),
3233      m_rtc(*this, MC146818_TAG),
34      m_nvram1(*this, "nvram1"),
35      m_nvram2(*this, "nvram2"),
3336      m_ram(*this, RAM_TAG),
3437      m_ram_base(*this, "ram_base"),
38      m_status_flag(1),
3539      m_bank1(*this, "bank1"),
3640      m_bit0(*this, "BIT0"),
3741      m_bit1(*this, "BIT1"),
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4145      m_bit5(*this, "BIT5"),
4246      m_backbattery(*this, "BACKBATTERY"),
4347      m_mainbattery(*this, "MAINBATTERY"),
44      m_cassette(*this, "cassette") { }
48      m_cassette(*this, "cassette")
49   { }
4550
4651   required_device<cpu_device> m_maincpu;
4752   required_device<hd61830_device> m_lcdc;
4853   required_device<beep_device> m_beep;
4954   required_device<mc146818_device> m_rtc;
55   required_device<nvram_device> m_nvram1;
56   required_device<nvram_device> m_nvram2;
5057   required_device<ram_device> m_ram;
5158
5259   virtual void machine_start();
5360   virtual void machine_reset();
61   void nvram_init(nvram_device &nvram, void *data, size_t size);
5462
5563   DECLARE_READ8_MEMBER( keypad_r );
5664   DECLARE_READ8_MEMBER( status_flag_r );
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7078   UINT8 m_banks_num;
7179   UINT8 m_kp_matrix;
7280   UINT8 m_lcd_contrast;
73   bool m_lcd_backlight;
81   int m_lcd_backlight;
7482   UINT8 m_status_flag;
7583   DECLARE_PALETTE_INIT(micronic);
7684
shelves/new_menus/src/mess/includes/psion.h
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1212#define _PSION_H_
1313
1414#include "cpu/m6800/m6800.h"
15#include "machine/nvram.h"
1516#include "machine/psion_pack.h"
1617#include "video/hd44780.h"
1718#include "sound/beep.h"
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2930         m_beep(*this, "beeper"),
3031         m_pack1(*this, "pack1"),
3132         m_pack2(*this, "pack2"),
33         m_nvram1(*this, "nvram1"),
34         m_nvram2(*this, "nvram2"),
35         m_nvram3(*this, "nvram3"),
3236         m_sys_register(*this, "sys_register"),
37         m_stby_pwr(1),
3338         m_ram(*this, "ram"){ }
3439
3540   required_device<hd63701_cpu_device> m_maincpu;
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3742   required_device<beep_device> m_beep;
3843   required_device<datapack_device> m_pack1;
3944   required_device<datapack_device> m_pack2;
45   required_device<nvram_device> m_nvram1;
46   required_device<nvram_device> m_nvram2;
47   optional_device<nvram_device> m_nvram3;
4048
4149   UINT16 m_kb_counter;
4250   UINT8 m_enable_nmi;
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6068
6169   virtual void machine_start();
6270   virtual void machine_reset();
71   void nvram_init(nvram_device &nvram, void *data, size_t size);
6372
6473   UINT8 kb_read();
6574   void update_banks();
shelves/new_menus/src/mess/includes/pc8001.h
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7979
8080   DECLARE_WRITE_LINE_MEMBER(write_centronics_busy);
8181   DECLARE_WRITE_LINE_MEMBER(write_centronics_ack);
82   UPD3301_DRAW_CHARACTER_MEMBER( pc8001_display_pixels );
8283};
8384
8485class pc8001mk2_state : public pc8001_state
shelves/new_menus/src/mess/includes/nc.h
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1111#include "machine/i8251.h"
1212#include "machine/clock.h"
1313#include "machine/ram.h"
14#include "machine/nvram.h"
1415#include "sound/beep.h"
1516
1617#define NC_NUM_COLOURS 4
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4142      m_beeper2(*this, "beep.2"),
4243      m_centronics(*this, "centronics"),
4344      m_uart(*this, "uart"),
44      m_uart_clock(*this, "uart_clock")
45      m_uart_clock(*this, "uart_clock"),
46      m_nvram(*this, "nvram")
4547   {
4648   }
4749
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115117   required_device<centronics_device> m_centronics;
116118   required_device<i8251_device> m_uart;
117119   required_device<clock_device> m_uart_clock;
120   required_device<nvram_device> m_nvram;
118121
119122   char m_memory_config[4];
120123   emu_timer *m_keyboard_timer;
shelves/new_menus/src/mess/video/mikromik.c
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88//  i8275_interface crtc_intf
99//-------------------------------------------------
1010
11static I8275_DISPLAY_PIXELS( crtc_display_pixels )
11I8275_DRAW_CHARACTER_MEMBER( mm1_state::crtc_display_pixels )
1212{
13   mm1_state *state = device->machine().driver_data<mm1_state>();
13   UINT8 romdata = m_char_rom->base()[(charcode << 4) | linecount];
1414
15   UINT8 romdata = state->m_char_rom->base()[(charcode << 4) | linecount];
16
1715   int d0 = BIT(romdata, 0);
1816   int d7 = BIT(romdata, 7);
1917   int gpa0 = BIT(gpa, 0);
20   int llen = state->m_llen;
18   int llen = m_llen;
2119   int i;
2220
2321   UINT8 data = (romdata << 1) | (d7 & d0);
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3129
3230      int color = hlt_in ? 2 : (video_in ^ compl_in);
3331
34      bitmap.pix32(y, x + i) = state->m_palette->pen(color);
32      bitmap.pix32(y, x + i) = m_palette->pen(color);
3533   }
3634}
3735
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116114
117115   MCFG_DEVICE_ADD(I8275_TAG, I8275x, XTAL_18_720MHz/8)
118116   MCFG_I8275_CHARACTER_WIDTH(8)
119   MCFG_I8275_DISPLAY_CALLBACK(crtc_display_pixels)
117   MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(mm1_state, crtc_display_pixels)
120118   MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE(I8237_TAG, am9517a_device, dreq0_w))
121119   MCFG_I8275_VRTC_CALLBACK(DEVWRITELINE(UPD7220_TAG, upd7220_device, ext_sync_w))
122120   MCFG_VIDEO_SET_SCREEN(SCREEN_TAG)
shelves/new_menus/src/mess/video/stic.c
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952952         break;
953953   }
954954
955   if (offset < sizeof(m_stic_registers) / sizeof(m_stic_registers[0]))
955   if (offset < ARRAY_LENGTH(m_stic_registers))
956956      m_stic_registers[offset] = data;
957957}
958958
shelves/new_menus/src/mess/mess.lst
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17871787pcm   // PC/M Mugler
17881788
17891789// Ei Nis
1790pecom32
17901791pecom64
17911792
17921793// Samsung SPC-1000
shelves/new_menus/src/mess/layout/pve500.lay
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1<?xml version="1.0"?>
2<mamelayout version="2">
3   <element name="digit" defstate="0">
4      <led7seg>
5         <color red="0.75" green="0.0" blue="0.0" />
6      </led7seg>
7   </element>
8   
9   <element name="led" defstate="0">
10      <disk state="1">
11         <color red="0.75" green="0.0" blue="0.0" />
12      </disk>
13      <disk state="0">
14         <color red="0.09375" green="0.0" blue="0.0" />
15      </disk>
16   </element>
17   
18   <element name="background">
19      <rect>
20          <bounds left="0" top="0" right="1" bottom="1" />
21         <color red="0.0" green="0.0" blue="0.0" />
22      </rect>     
23   </element>
24
25   <view name="Default Layout">
26      <!-- Black background -->
27      <bezel element="background">
28         <bounds left="00" top="00" right="2360" bottom="300" />
29      </bezel>
30
31      <!-- PLAYER1 -->
32      <bezel name="digit0" element="digit">
33         <bounds x="10" y="15" width="50" height="80" />
34      </bezel>
35      <bezel name="digit1" element="digit">
36         <bounds x="70" y="15" width="50" height="80" />
37      </bezel>
38
39      <bezel name="digit2" element="digit">
40         <bounds x="170" y="15" width="50" height="80" />
41      </bezel>
42      <bezel name="digit3" element="digit">
43         <bounds x="230" y="15" width="50" height="80" />
44      </bezel>
45
46      <bezel name="digit4" element="digit">
47         <bounds x="330" y="15" width="50" height="80" />
48      </bezel>
49      <bezel name="digit5" element="digit">
50         <bounds x="390" y="15" width="50" height="80" />
51      </bezel>
52
53      <bezel name="digit6" element="digit">
54         <bounds x="490" y="15" width="50" height="80" />
55      </bezel>
56      <bezel name="digit7" element="digit">
57         <bounds x="550" y="15" width="50" height="80" />
58      </bezel>
59
60      <!-- PLAYER2 -->
61      <bezel name="digit8" element="digit">
62         <bounds x="750" y="15" width="50" height="80" />
63      </bezel>
64      <bezel name="digit9" element="digit">
65         <bounds x="810" y="15" width="50" height="80" />
66      </bezel>
67
68      <bezel name="digit10" element="digit">
69         <bounds x="910" y="15" width="50" height="80" />
70      </bezel>
71      <bezel name="digit11" element="digit">
72         <bounds x="970" y="15" width="50" height="80" />
73      </bezel>
74
75      <bezel name="digit12" element="digit">
76         <bounds x="1070" y="15" width="50" height="80" />
77      </bezel>
78      <bezel name="digit13" element="digit">
79         <bounds x="1130" y="15" width="50" height="80" />
80      </bezel>
81
82      <bezel name="digit14" element="digit">
83         <bounds x="1230" y="15" width="50" height="80" />
84      </bezel>
85      <bezel name="digit15" element="digit">
86         <bounds x="1290" y="15" width="50" height="80" />
87      </bezel>
88
89
90      <!-- 3-digit 7seg display -->
91      <bezel name="digit24" element="digit">
92         <bounds x="1490" y="47" width="30" height="48" />
93      </bezel>
94      <bezel name="digit25" element="digit">
95         <bounds x="1526" y="47" width="30" height="48" />
96      </bezel>
97      <bezel name="digit26" element="digit">
98         <bounds x="1562" y="47" width="30" height="48" />
99      </bezel>
100
101
102      <!-- RECORDER -->
103      <bezel name="digit16" element="digit">
104         <bounds x="1762" y="15" width="50" height="80" />
105      </bezel>
106      <bezel name="digit17" element="digit">
107         <bounds x="1822" y="15" width="50" height="80" />
108      </bezel>
109
110      <bezel name="digit18" element="digit">
111         <bounds x="1922" y="15" width="50" height="80" />
112      </bezel>
113      <bezel name="digit19" element="digit">
114         <bounds x="1982" y="15" width="50" height="80" />
115      </bezel>
116
117      <bezel name="digit20" element="digit">
118         <bounds x="2082" y="15" width="50" height="80" />
119      </bezel>
120      <bezel name="digit21" element="digit">
121         <bounds x="2142" y="15" width="50" height="80" />
122      </bezel>
123
124      <bezel name="digit22" element="digit">
125         <bounds x="2242" y="15" width="50" height="80" />
126      </bezel>
127      <bezel name="digit23" element="digit">
128         <bounds x="2302" y="15" width="50" height="80" />
129      </bezel>
130   </view>
131</mamelayout>
Property changes on: shelves/new_menus/src/mess/layout/pve500.lay
Added: svn:mime-type
   + text/plain
Added: svn:eol-style
   + native
shelves/new_menus/src/mess/drivers/ql.c
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369369      m_fdc->set_drive(1);
370370
371371   m_fdc->set_side((data & SANDY_SIDE_MASK) >> SANDY_SIDE_SHIFT);
372   if ((data & SANDY_SIDE_MASK) & (LOG_DISK_READ | LOG_DISK_WRITE))
372   if ((data & SANDY_SIDE_MASK) && (LOG_DISK_READ | LOG_DISK_WRITE))
373373   {
374374      logerror("Accessing side 1\n");
375375   }
shelves/new_menus/src/mess/drivers/x07.c
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2828
2929****************************************************************************/
3030
31
3231#include "includes/x07.h"
33#include "mcfglgcy.h"
3432
3533/***************************************************************************
3634    T6834 IMPLEMENTATION
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13241322INPUT_PORTS_END
13251323
13261324
1327static NVRAM_HANDLER( x07 )
1325void x07_state::nvram_init(nvram_device &nvram, void *data, size_t size)
13281326{
1329   x07_state *state = machine.driver_data<x07_state>();
1330
1331   if (read_or_write)
1332   {
1333      file->write(state->m_t6834_ram, sizeof(state->m_t6834_ram));
1334      file->write(state->m_ram->pointer(), state->m_ram->size());
1335   }
1336   else
1337   {
1338      if (file)
1339      {
1340         file->read(state->m_t6834_ram, sizeof(state->m_t6834_ram));
1341         file->read(state->m_ram->pointer(), state->m_ram->size());
1342         state->m_warm_start = 1;
1343      }
1344      else
1345      {
1346         memset(state->m_t6834_ram, 0, sizeof(state->m_t6834_ram));
1347         memset(state->m_ram->pointer(), 0, state->m_ram->size());
1348
1349         for(int i = 0; i < 12; i++)
1350            strcpy((char*)state->m_t6834_ram + udk_offset[i], udk_ini[i]);
1351
1352         //copy default chars in the UDC
1353         memcpy(state->m_t6834_ram + 0x200, (UINT8*)machine.root_device().memregion("gfx1")->base() + 0x400, 0x100);
1354         memcpy(state->m_t6834_ram + 0x300, (UINT8*)machine.root_device().memregion("gfx1")->base() + 0x700, 0x100);
1355         state->m_warm_start = 0;
1356      }
1357   }
1327   memcpy(data, memregion("default")->base(), size);
1328   m_warm_start = 0;
13581329}
13591330
13601331TIMER_DEVICE_CALLBACK_MEMBER(x07_state::blink_timer)
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14031374   m_cass_poll = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(x07_state::cassette_poll),this));
14041375   m_cass_tick = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(x07_state::cassette_tick),this));
14051376
1377   m_nvram1->set_base(&m_t6834_ram, 0x800);
1378   m_nvram2->set_base(m_ram->pointer(), m_ram->size());
1379
14061380   /* Save State */
14071381   save_item(NAME(m_sleep));
14081382   save_item(NAME(m_warm_start));
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15251499
15261500   MCFG_TIMER_DRIVER_ADD_PERIODIC("blink_timer", x07_state, blink_timer, attotime::from_msec(300))
15271501
1528   MCFG_NVRAM_HANDLER( x07 )
1502   MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram1", x07_state, nvram_init)   // t6834 RAM
1503   MCFG_NVRAM_ADD_0FILL("nvram2") // RAM banks
15291504
15301505   /* internal ram */
15311506   MCFG_RAM_ADD(RAM_TAG)
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15611536
15621537   ROM_REGION( 0x0800, "gfx1", 0 )
15631538   ROM_LOAD( "charset.rom", 0x0000, 0x0800, BAD_DUMP CRC(b1e59a6e) SHA1(b0c06315a2d5c940a8f288fb6a3428d738696e69) )
1539
1540   ROM_REGION( 0x0800, "default", ROMREGION_ERASE00 )
15641541ROM_END
15651542
1543DRIVER_INIT_MEMBER(x07_state, x07) 
1544{
1545   UINT8 *RAM = memregion("default")->base();
1546   UINT8 *GFX = memregion("gfx1")->base();
1547   
1548   for (int i = 0; i < 12; i++)
1549      strcpy((char *)RAM + udk_offset[i], udk_ini[i]);
1550   
1551   //copy default chars in the UDC
1552   memcpy(RAM + 0x200, GFX + 0x400, 0x100);
1553   memcpy(RAM + 0x300, GFX + 0x700, 0x100);
1554}
1555
1556
15661557/* Driver */
15671558
1568/*    YEAR  NAME    PARENT  COMPAT   MACHINE    INPUT    INIT    COMPANY   FULLNAME    FLAGS */
1569COMP( 1983, x07,    0,      0,       x07,       x07, driver_device,     0,      "Canon",  "X-07",     GAME_SUPPORTS_SAVE)
1559/*    YEAR  NAME    PARENT  COMPAT   MACHINE    INPUT    INIT                COMPANY   FULLNAME    FLAGS */
1560COMP( 1983, x07,    0,      0,       x07,       x07,     x07_state,   x07,   "Canon",  "X-07",     GAME_SUPPORTS_SAVE)
shelves/new_menus/src/mess/drivers/pc8001.c
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364364   rgb_t::white
365365};
366366
367static UPD3301_DISPLAY_PIXELS( pc8001_display_pixels )
367UPD3301_DRAW_CHARACTER_MEMBER( pc8001_state::pc8001_display_pixels )
368368{
369   pc8001_state *state = device->machine().driver_data<pc8001_state>();
370
371   UINT8 data = state->m_char_rom->base()[(cc << 3) | lc];
369   UINT8 data = m_char_rom->base()[(cc << 3) | lc];
372370   int i;
373371
374372   if (lc >= 8) return;
375373   if (csr) data = 0xff;
376374
377   if (state->m_width80)
375   if (m_width80)
378376   {
379377      for (i = 0; i < 8; i++)
380378      {
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401399   }
402400}
403401
404static UPD3301_INTERFACE( pc8001_upd3301_intf )
405{
406   8,
407   pc8001_display_pixels,
408   DEVCB_NULL,
409   DEVCB_DEVICE_LINE_MEMBER(I8257_TAG, i8257_device, i8257_drq2_w),
410   DEVCB_NULL,
411   DEVCB_NULL
412};
413
414402/* 8255 Interface */
415403
416404static I8255A_INTERFACE( ppi_intf )
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559547   MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
560548   MCFG_I8257_ADD(I8257_TAG, 4000000, dmac_intf)
561549   MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, NULL, NULL)
562   MCFG_UPD3301_ADD(UPD3301_TAG, 14318180, pc8001_upd3301_intf)
550   
551   MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, 14318180)
552   MCFG_UPD3301_CHARACTER_WIDTH(8)
553   MCFG_UPD3301_DRAW_CHARACTER_CALLBACK_OWNER(pc8001_state, pc8001_display_pixels)
554   MCFG_UPD3301_VRTC_CALLBACK(DEVWRITELINE(I8257_TAG, i8257_device, i8257_drq2_w))
563555
564556   MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_printers, "image")
565557   MCFG_CENTRONICS_ACK_HANDLER(WRITELINE(pc8001_state, write_centronics_ack))
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599591   MCFG_I8255A_ADD(I8255A_TAG, ppi_intf)
600592   MCFG_I8257_ADD(I8257_TAG, 4000000, dmac_intf)
601593   MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, NULL, NULL)
602   MCFG_UPD3301_ADD(UPD3301_TAG, 14318180, pc8001_upd3301_intf)
603594
595   MCFG_DEVICE_ADD(UPD3301_TAG, UPD3301, 14318180)
596   MCFG_UPD3301_CHARACTER_WIDTH(8)
597   MCFG_UPD3301_DRAW_CHARACTER_CALLBACK_OWNER(pc8001_state, pc8001_display_pixels)
598   MCFG_UPD3301_VRTC_CALLBACK(DEVWRITELINE(I8257_TAG, i8257_device, i8257_drq2_w))
599
604600   MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_printers, "image")
605601
606602   MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", CENTRONICS_TAG)
shelves/new_menus/src/mess/drivers/zorba.c
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8282   DECLARE_WRITE8_MEMBER(pia0_porta_w);
8383   DECLARE_WRITE8_MEMBER(kbd_put);
8484   DECLARE_READ8_MEMBER(keyboard_r);
85   I8275_DRAW_CHARACTER_MEMBER( zorba_update_chr );
86
8587private:
8688   UINT8 m_term_data;
8789   required_device<cpu_device> m_maincpu;
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258260   palette.set_pen_color(2, 0, 128, 0 );   /* Dimmed */
259261}
260262
261static I8275_DISPLAY_PIXELS( zorba_update_chr )
263I8275_DRAW_CHARACTER_MEMBER( zorba_state::zorba_update_chr )
262264{
263265   int i;
264   zorba_state *state = device->machine().driver_data<zorba_state>();
265   const rgb_t *palette = state->m_palette->palette()->entry_list_raw();
266   UINT8 gfx = state->m_p_chargen[(linecount & 15) + (charcode << 4)];
266   const rgb_t *palette = m_palette->palette()->entry_list_raw();
267   UINT8 gfx = m_p_chargen[(linecount & 15) + (charcode << 4)];
267268
268269   if (vsp)
269270      gfx = 0;
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396397
397398   MCFG_DEVICE_ADD("crtc", I8275x, XTAL_14_31818MHz/7)
398399   MCFG_I8275_CHARACTER_WIDTH(8)
399   MCFG_I8275_DISPLAY_CALLBACK(zorba_update_chr)
400   MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(zorba_state, zorba_update_chr)
400401   MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("dma", z80dma_device, rdy_w))
401402   MCFG_I8275_IRQ_CALLBACK(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
402403   MCFG_FD1793x_ADD("fdc", XTAL_24MHz / 24)
shelves/new_menus/src/mess/drivers/nc.c
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105105#include "sound/beep.h"
106106#include "machine/ram.h"
107107#include "rendlay.h"
108#include "mcfglgcy.h"
109108
109
110110#define VERBOSE 0
111111#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
112112
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404404}
405405
406406
407static NVRAM_HANDLER( nc )
408{
409   nc_state *state = machine.driver_data<nc_state>();
410
411   if (read_or_write)
412   {
413      file->write(state->m_ram->pointer(), state->m_ram->size());
414   }
415   else if (file)
416   {
417      file->read(state->m_ram->pointer(), state->m_ram->size());
418   }
419   else
420   {
421      // leave whatever ram device defaulted to
422   }
423}
424
425
426407TIMER_DEVICE_CALLBACK_MEMBER(nc_state::dummy_timer_callback)
427408{
428409   int inputport_10_state;
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836817   /* keyboard timer */
837818   m_keyboard_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(nc_state::nc_keyboard_timer_callback),this));
838819   m_keyboard_timer->adjust(attotime::from_msec(10));
820
821   m_nvram->set_base(m_ram->pointer(), m_ram->size());
839822}
840823
841824
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14711454   /* internal ram */
14721455   MCFG_RAM_ADD(RAM_TAG)
14731456   MCFG_RAM_DEFAULT_SIZE("64K")
1474   MCFG_NVRAM_HANDLER(nc)
1457   MCFG_NVRAM_ADD_NO_FILL("nvram")
14751458
14761459   /* dummy timer */
14771460   MCFG_TIMER_DRIVER_ADD_PERIODIC("dummy_timer", nc_state, dummy_timer_callback, attotime::from_hz(50))
shelves/new_menus/src/mess/drivers/micronic.c
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116116#include "emu.h"
117117#include "includes/micronic.h"
118118#include "rendlay.h"
119#include "mcfglgcy.h"
120119
121120READ8_MEMBER( micronic_state::keypad_r )
122121{
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300299      PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("END") PORT_CODE(KEYCODE_END)
301300INPUT_PORTS_END
302301
303static NVRAM_HANDLER( micronic )
304{
305   micronic_state *state = machine.driver_data<micronic_state>();
306302
307   if (read_or_write)
308   {
309      file->write(state->m_ram_base, 0x8000);
310      file->write(state->m_ram->pointer(), state->m_ram->size());
311   }
312   else
313   {
314      if (file)
315      {
316         file->read(state->m_ram_base, 0x8000);
317         file->read(state->m_ram->pointer(), state->m_ram->size());
318         state->m_status_flag = 0x01;
319      }
320      else
321      {
322         state->m_status_flag = 0x00;
323      }
324   }
303void micronic_state::nvram_init(nvram_device &nvram, void *data, size_t size)
304{
305   m_status_flag = 0;
325306}
326307
308
327309PALETTE_INIT_MEMBER(micronic_state, micronic)
328310{
329311   palette.set_pen_color(0, rgb_t(138, 146, 148));
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336318   m_bank1->configure_entries(0x00, 0x02, memregion(Z80_TAG)->base(), 0x10000);
337319
338320   /* RAM banks */
339   m_banks_num = (m_ram->size()>>15) + 1;
321   m_banks_num = (m_ram->size() >> 15) + 1;
340322   m_bank1->configure_entries(0x02, m_banks_num - 1, m_ram->pointer(), 0x8000);
341323
324   m_nvram1->set_base(m_ram_base, 0x8000);
325   m_nvram2->set_base(m_ram->pointer(), m_ram->size());
326
342327   /* register for state saving */
343//  save_item(NAME(state->));
328   save_item(NAME(m_banks_num));
329   save_item(NAME(m_kp_matrix));
330   save_item(NAME(m_lcd_contrast));
331   save_item(NAME(m_lcd_backlight));
332   save_item(NAME(m_status_flag));
333   // TODO: restore RAM bank at state load...
344334}
345335
346336void micronic_state::machine_reset()
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386376   MCFG_RAM_ADD(RAM_TAG)
387377   MCFG_RAM_DEFAULT_SIZE("224K")
388378
389   MCFG_NVRAM_HANDLER(micronic)
379   MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram1", micronic_state, nvram_init)   // base ram
380   MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram2", micronic_state, nvram_init)   // additional ram banks
390381
391382   MCFG_MC146818_ADD( MC146818_TAG, XTAL_32_768kHz )
392383   MCFG_MC146818_IRQ_HANDLER(WRITELINE(micronic_state, mc146818_irq))
shelves/new_menus/src/mess/drivers/clcd.c
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1818#include "machine/mos6551.h"
1919#include "machine/msm58321.h"
2020#include "machine/ram.h"
21#include "machine/nvram.h"
2122#include "sound/speaker.h"
2223#include "rendlay.h"
23#include "mcfglgcy.h"
2424
2525class clcd_state : public driver_device
2626{
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3333      m_rtc(*this, "rtc"),
3434      m_centronics(*this, "centronics"),
3535      m_ram(*this,"ram"),
36      m_nvram(*this, "nvram"),
3637      m_bank1(*this, "bank1"),
3738      m_bank2(*this, "bank2"),
3839      m_bank3(*this, "bank3"),
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8990
9091      m_rtc->cs1_w(1);
9192      m_acia->write_cts(0);
93      m_nvram->set_base(ram()->pointer(), ram()->size());
9294   }
9395
9496   DECLARE_PALETTE_INIT(clcd)
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521523      m_key_force_format = 10;
522524   }
523525
526   void nvram_init(nvram_device &nvram, void *data, size_t size);
527
524528private:
525529   required_device<cpu_device> m_maincpu;
526530   required_device<mos6551_device> m_acia;
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528532   required_device<msm58321_device> m_rtc;
529533   required_device<centronics_device> m_centronics;
530534   required_device<ram_device> m_ram;
535   required_device<nvram_device> m_nvram;
531536   required_device<address_map_bank_device> m_bank1;
532537   required_device<address_map_bank_device> m_bank2;
533538   required_device<address_map_bank_device> m_bank3;
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560565   required_ioport m_special;
561566};
562567
563static NVRAM_HANDLER(clcd)
568void clcd_state::nvram_init(nvram_device &nvram, void *data, size_t size)
564569{
565   clcd_state *state = machine.driver_data<clcd_state>();
566
567   if (read_or_write)
568   {
569      file->write(state->ram()->pointer(), state->ram()->size());
570   }
571   else if (file)
572   {
573      file->read(state->ram()->pointer(), state->ram()->size());
574   }
575   else
576   {
577      state->force_format();
578   }
570   memset(data, 0x00, size);
571   force_format();
579572}
580573
574
581575static ADDRESS_MAP_START( clcd_banked_mem, AS_PROGRAM, 8, clcd_state )
582576   /* KERN/APPL/RAM */
583577   AM_RANGE(0x00000, 0x1ffff) AM_MIRROR(0x40000) AM_READWRITE(ram_r, ram_w)
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799793   MCFG_RAM_DEFAULT_VALUE(0)
800794   MCFG_RAM_EXTRA_OPTIONS("32k,64k")
801795   MCFG_RAM_DEFAULT_SIZE("128k")
802   MCFG_NVRAM_HANDLER(clcd)
796
797   MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram", clcd_state, nvram_init)
803798MACHINE_CONFIG_END
804799
805800
shelves/new_menus/src/mess/drivers/pve500.c
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2323
2424#include "emu.h"
2525#include "cpu/z80/z80.h"
26#include "machine/z80ctc.h"
27#include "machine/z80sio.h"
28#include "pve500.lh"
2629
30#define IO_EXPANDER_PORTA 0
31#define IO_EXPANDER_PORTB 1
32#define IO_EXPANDER_PORTC 2
33#define IO_EXPANDER_PORTD 3
34#define IO_EXPANDER_PORTE 4
35
2736class pve500_state : public driver_device
2837{
2938public:
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3342      , m_subcpu(*this, "subcpu")
3443   { }
3544
45   DECLARE_WRITE8_MEMBER(dualport_ram_left_w);
46   DECLARE_WRITE8_MEMBER(dualport_ram_right_w);
47   DECLARE_READ8_MEMBER(dualport_ram_left_r);
48   DECLARE_READ8_MEMBER(dualport_ram_right_r);
49
3650   DECLARE_WRITE8_MEMBER(io_expander_w);
3751   DECLARE_READ8_MEMBER(io_expander_r);
3852   DECLARE_DRIVER_INIT(pve500);
3953private:
54   UINT8 dualport_7FE_data;
55   UINT8 dualport_7FF_data;
56
4057   virtual void machine_start();
4158   virtual void machine_reset();
42   required_device<cpu_device> m_maincpu;
43   required_device<cpu_device> m_subcpu;
59   required_device<tlcs_z80_device> m_maincpu;
60   required_device<tlcs_z80_device> m_subcpu;
61   UINT8 io_SEL, io_LD, io_LE, io_SC, io_KY;
4462};
4563
64
65static Z80CTC_INTERFACE( external_ctc_intf )
66{
67   DEVCB_NULL, /* interrupt handler */
68   DEVCB_NULL, /* ZC/TO0 callback */
69   DEVCB_NULL, /* ZC/TO1 callback */
70   DEVCB_NULL  /* ZC/TO2 callback */
71};
72
73static const z80sio_interface external_sio_intf =
74{
75   DEVCB_NULL, /* interrupt handler */
76  DEVCB_NULL, /* DTR changed handler */
77   DEVCB_NULL, /* RTS changed handler */
78   DEVCB_NULL, /* BREAK changed handler */
79   DEVCB_NULL, /* transmit handler */
80   DEVCB_NULL  /* receive handler */
81};
82
83static ADDRESS_MAP_START(maincpu_io, AS_IO, 8, pve500_state)
84   AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("external_sio", z80sio_device, read, write)
85   AM_RANGE(0x08, 0x0B) AM_DEVREADWRITE("external_ctc", z80ctc_device, read, write)
86ADDRESS_MAP_END
87
4688static ADDRESS_MAP_START(maincpu_prg, AS_PROGRAM, 8, pve500_state)
4789   AM_RANGE (0x0000, 0xBFFF) AM_ROM // ICB7: 48kbytes EEPROM
4890   AM_RANGE (0xC000, 0xDFFF) AM_RAM // ICD6: 8kbytes of RAM
91   AM_RANGE (0xE7FE, 0xE7FE) AM_MIRROR(0x1800) AM_READ(dualport_ram_left_r)
92   AM_RANGE (0xE7FF, 0xE7FF) AM_MIRROR(0x1800) AM_WRITE(dualport_ram_left_w)
4993   AM_RANGE (0xE000, 0xE7FF) AM_MIRROR(0x1800) AM_RAM AM_SHARE("sharedram") //  ICF5: 2kbytes of RAM shared between the two CPUs
5094ADDRESS_MAP_END
5195
5296static ADDRESS_MAP_START(subcpu_prg, AS_PROGRAM, 8, pve500_state)
5397   AM_RANGE (0x0000, 0x7FFF) AM_ROM // ICG5: 32kbytes EEPROM
54   AM_RANGE (0x8000, 0xBFFF) AM_READWRITE(io_expander_r, io_expander_w) // ICG3: I/O Expander
98   AM_RANGE (0x8000, 0xBFFF) AM_MIRROR(0x3FF8) AM_READWRITE(io_expander_r, io_expander_w) // ICG3: I/O Expander
99   AM_RANGE (0xC7FE, 0xC7FE) AM_MIRROR(0x1800) AM_WRITE(dualport_ram_right_w)
100   AM_RANGE (0xC7FF, 0xC7FF) AM_MIRROR(0x1800) AM_READ(dualport_ram_right_r)
55101   AM_RANGE (0xC000, 0xC7FF) AM_MIRROR(0x3800) AM_RAM AM_SHARE("sharedram") //  ICF5: 2kbytes of RAM shared between the two CPUs
56102ADDRESS_MAP_END
57103
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66112
67113void pve500_state::machine_start()
68114{
115   io_LD = 0;
116   io_SC = 0;
117   io_LE = 0;
118   io_SEL = 0;
119   io_KY = 0;
120
121   for (int i=0; i<27; i++)
122      output_set_digit_value(i, 0xff);
69123}
70124
71125void pve500_state::machine_reset()
72126{
73127}
74128
129READ8_MEMBER(pve500_state::dualport_ram_left_r)
130{
131   //printf("dualport_ram: Left READ\n");
132   m_subcpu->ctc_trg1(1); //(INT_Right)
133   return dualport_7FE_data;
134}
135
136WRITE8_MEMBER(pve500_state::dualport_ram_left_w)
137{
138   //printf("dualport_ram: Left WRITE\n");
139   dualport_7FF_data = data;
140   m_subcpu->ctc_trg1(0); //(INT_Right)
141}
142
143READ8_MEMBER(pve500_state::dualport_ram_right_r)
144{
145   //printf("dualport_ram: Right READ\n");
146   m_maincpu->ctc_trg1(1); //(INT_Left)
147   return dualport_7FF_data;
148}
149
150WRITE8_MEMBER(pve500_state::dualport_ram_right_w)
151{
152   //printf("dualport_ram: Right WRITE\n");
153   dualport_7FE_data = data;
154   m_maincpu->ctc_trg1(0);   //(INT_Left)
155}
156
75157READ8_MEMBER(pve500_state::io_expander_r)
76158{
77   /* Implement-me ! */
78   return 0;
159   switch (offset){
160      case IO_EXPANDER_PORTA:
161         return io_SC;
162      case IO_EXPANDER_PORTB:
163         return io_LE;
164      case IO_EXPANDER_PORTC:
165         return io_KY;
166      case IO_EXPANDER_PORTD:
167         return io_LD;
168      case IO_EXPANDER_PORTE:
169         return io_SEL & 0x0F; //This is a 4bit port.
170      default:
171         return 0;
172   }
79173}
80174
81175WRITE8_MEMBER(pve500_state::io_expander_w)
82176{
83   /* Implement-me !*/
177   //printf("io_expander_w: offset=%d data=%02X\n", offset, data);
178   switch (offset){
179      case IO_EXPANDER_PORTA:
180         io_SC = data;
181         break;
182      case IO_EXPANDER_PORTB:
183         io_LE = data;
184         break;
185      case IO_EXPANDER_PORTC:
186         io_KY = data;
187         break;
188      case IO_EXPANDER_PORTD:
189         io_LD = data;
190         break;
191      case IO_EXPANDER_PORTE:
192         io_SEL = data;
193         for (int i=0; i<4; i++){
194            if (io_SEL & (1 << i)){
195               switch (io_SC){
196                  case 1:   output_set_digit_value(8*i + 0, io_LD & 0x7F); break;
197                  case 2:   output_set_digit_value(8*i + 1, io_LD & 0x7F); break;
198                  case 4:   output_set_digit_value(8*i + 2, io_LD & 0x7F); break;
199                  case 8:   output_set_digit_value(8*i + 3, io_LD & 0x7F); break;
200                  case 16:  output_set_digit_value(8*i + 4, io_LD & 0x7F); break;
201                  case 32:  output_set_digit_value(8*i + 5, io_LD & 0x7F); break;
202                  case 64:  output_set_digit_value(8*i + 6, io_LD & 0x7F); break;
203                  case 128: output_set_digit_value(8*i + 7, io_LD & 0x7F); break;
204                  default:
205                     /*software should not do it.
206                  any idea how to emulate that in case it does? */ break;
207               }
208            }
209         }
210         break;
211      default:
212         break;
213   }
84214}
85215
86216static MACHINE_CONFIG_START( pve500, pve500_state )
87/*
88I think we should emulate the TOSHIBA TLCS-Z80 and instantiate it here.
89TLCS-Z80 = Z80 CPU + internal CTC + internal SIO + some other things
90
91The PVE-500 board uses both the internal and additional external CTCs and SIOs
92*/
93   MCFG_CPU_ADD("maincpu", Z80, XTAL_12MHz / 2) /* Actual chip is TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */
217   MCFG_CPU_ADD("maincpu", TLCS_Z80, XTAL_12MHz / 2) /* TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */
94218   MCFG_CPU_PROGRAM_MAP(maincpu_prg)
95//   MCFG_Z80CTC_ADD("ctc", XTAL_?MHz, maincpu_ctc_intf)
96//   MCFG_Z80SIO_ADD("sio", XTAL_12MHz / 2, maincpu_sio_intf)
219   MCFG_CPU_IO_MAP(maincpu_io)
220   MCFG_Z80CTC_ADD("external_ctc", XTAL_12MHz / 2, external_ctc_intf)
221   MCFG_Z80SIO_ADD("external_sio", XTAL_12MHz / 2, external_sio_intf)
97222
98   MCFG_CPU_ADD("subcpu", Z80, XTAL_12MHz / 2) /* Actual chip is TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */
223   MCFG_CPU_ADD("subcpu", TLCS_Z80, XTAL_12MHz / 2) /* TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */
99224   MCFG_CPU_PROGRAM_MAP(subcpu_prg)
100//   MCFG_Z80CTC_ADD("ctc", XTAL_?MHz, subcpu_ctc_intf)
101//   MCFG_Z80SIO_ADD("sio", XTAL_12MHz / 2, subcpu_sio_intf)
102225
103226/* TODO:
104227-> There are a few LEDs and a sequence of 7-seg displays with atotal of 27 digits
105228-> Sound hardware consists of a buzzer connected to a signal of the maincpu SIO and a logic-gate that attaches/detaches it from the
106229   system clock Which apparently means you can only beep the buzzer to a certain predefined tone or keep it mute.
107230*/
231
232   /* video hardware */
233   MCFG_DEFAULT_LAYOUT(layout_pve500)
234
108235MACHINE_CONFIG_END
109236
110237ROM_START( pve500 )
shelves/new_menus/src/mess/drivers/gmaster.c
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300300   MCFG_SCREEN_UPDATE_DRIVER(gmaster_state, screen_update_gmaster)
301301   MCFG_SCREEN_PALETTE("palette")
302302
303   MCFG_PALETTE_ADD("palette", sizeof(gmaster_palette)/sizeof(gmaster_palette[0]))
303   MCFG_PALETTE_ADD("palette", ARRAY_LENGTH(gmaster_palette))
304304   MCFG_PALETTE_INIT_OWNER(gmaster_state, gmaster)
305305   MCFG_DEFAULT_LAYOUT(layout_lcd)
306306
shelves/new_menus/src/mess/drivers/altos5.c
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119119   UINT8 data = m_p_prom[offset];
120120
121121   // if IPL and /A12, point at rom
122   if (!state & m_ipl & !BIT(offset, 0))
122   if (!state && m_ipl && !BIT(offset, 0))
123123      data = 0x31;
124124   else
125125   // if WPRT point at nothing
126   if (state & BIT(data, 7))
126   if (state && BIT(data, 7))
127127      data = 0x30;
128128
129129   // mask off wprt (no longer needed)
shelves/new_menus/src/mess/drivers/exp85.c
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131131   m_speaker->level_w(!BIT(data, 7));
132132}
133133
134static I8355_INTERFACE( i8355_intf )
135{
136   DEVCB_DRIVER_MEMBER(exp85_state, i8355_a_r),
137   DEVCB_DRIVER_MEMBER(exp85_state, i8355_a_w),
138   DEVCB_NULL,
139   DEVCB_NULL
140};
141
142134/* I8085A Interface */
143135
144136READ_LINE_MEMBER( exp85_state::sid_r )
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220212
221213   /* devices */
222214   MCFG_I8155_ADD(I8155_TAG, XTAL_6_144MHz/2, i8155_intf)
223   MCFG_I8355_ADD(I8355_TAG, XTAL_6_144MHz/2, i8355_intf)
215   MCFG_DEVICE_ADD(I8355_TAG, I8355, XTAL_6_144MHz/2)
216   MCFG_I8355_IN_PA_CB(READ8(exp85_state, i8355_a_r))
217   MCFG_I8355_OUT_PA_CB(WRITE8(exp85_state, i8355_a_w))
224218   MCFG_CASSETTE_ADD("cassette", exp85_cassette_interface)
225219
226220   MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "serial_terminal")
shelves/new_menus/src/mess/drivers/lisa.c
r29305r29306
99*********************************************************************/
1010
1111#include "emu.h"
12#include "cpu/m68000/m68000.h"
1312#include "cpu/m6502/m6504.h"
1413#include "cpu/cop400/cop400.h"
1514#include "includes/lisa.h"
16#include "machine/sonydriv.h"
17#include "machine/applefdc.h"
1815#include "formats/ap_dsk35.h"
19#include "machine/6522via.h"
20#include "sound/speaker.h"
21#include "mcfglgcy.h"
2216
2317
2418/***************************************************************************
r29305r29306
162156   MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
163157
164158   /* nvram */
165   MCFG_NVRAM_HANDLER(lisa)
159   MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram", lisa_state, nvram_init)
166160
167161   /* devices */
168162   MCFG_IWM_ADD("fdc", lisa2_fdc_interface)
shelves/new_menus/src/mess/drivers/mkit09.c
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149149// read cassette
150150READ8_MEMBER( mkit09_state::pb_r )
151151{
152   return m_keydata | (m_cass->input() > +0.03) ? 0x80 : 0;
152   return m_keydata | ((m_cass->input() > +0.03) ? 0x80 : 0);
153153}
154154
155155// write display segments
shelves/new_menus/src/mess/drivers/pecom.c
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201201MACHINE_CONFIG_END
202202
203203/* ROM definition */
204ROM_START( pecom32 )
205   ROM_REGION( 0x10000, CDP1802_TAG, ROMREGION_ERASEFF )
206   ROM_LOAD( "090786.bin", 0x8000, 0x4000, CRC(b3b1ea23) SHA1(de69f22568161ced801973345fa39d6d207b9e8c) )
207ROM_END
208
209
204210ROM_START( pecom64 )
205211   ROM_REGION( 0x10000, CDP1802_TAG, ROMREGION_ERASEFF )
206212   ROM_SYSTEM_BIOS(0, "ver4", "version 4")
r29305r29306
214220/* Driver */
215221
216222/*    YEAR  NAME   PARENT  COMPAT       MACHINE     INPUT   INIT   COMPANY  FULLNAME      FLAGS */
217COMP( 1987, pecom64,     0,      0,     pecom64,    pecom, driver_device,   0,     "Ei Nis", "Pecom 64",    0)
223COMP( 1987, pecom32,       0,      0,     pecom64,    pecom, driver_device,   0,     "Ei Nis", "Pecom 32",    0)
224COMP( 1987, pecom64, pecom32,      0,     pecom64,    pecom, driver_device,   0,     "Ei Nis", "Pecom 64",    0)
shelves/new_menus/src/mess/drivers/psion.c
r29305r29306
2323#include "emu.h"
2424#include "includes/psion.h"
2525#include "rendlay.h"
26#include "mcfglgcy.h"
2726
2827TIMER_DEVICE_CALLBACK_MEMBER(psion_state::nmi_timer)
2928{
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332331      PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("D [)]") PORT_CODE(KEYCODE_D)
333332INPUT_PORTS_END
334333
335static NVRAM_HANDLER( psion )
336{
337   psion_state *state = machine.driver_data<psion_state>();
338334
339   if (read_or_write)
340   {
341      file->write(state->m_sys_register, 0xc0);
342      file->write(state->m_ram, state->m_ram.bytes());
343      if (state->m_ram_bank_count)
344         file->write(state->m_paged_ram, state->m_ram_bank_count * 0x4000);
345   }
346   else
347   {
348      if (file)
349      {
350         file->read(state->m_sys_register, 0xc0);
351         file->read(state->m_ram, state->m_ram.bytes());
352         if (state->m_ram_bank_count)
353            file->read(state->m_paged_ram, state->m_ram_bank_count * 0x4000);
354
355         //warm start
356         state->m_stby_pwr = 1;
357      }
358      else
359         //cold start
360         state->m_stby_pwr = 0;
361   }
335void psion_state::nvram_init(nvram_device &nvram, void *data, size_t size)
336{
337   //cold start (by default is 1=warm start)
338   m_stby_pwr = 0;
362339}
363340
341
364342void psion_state::machine_start()
365343{
366344   if (!strcmp(machine().system().name, "psionlam"))
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406384      membank("rambank")->set_entry(0);
407385   }
408386
387   m_nvram1->set_base(m_sys_register, 0xc0);
388   m_nvram2->set_base(m_ram, m_ram.bytes());
389   if (m_nvram3)
390      m_nvram3->set_base(m_paged_ram, m_ram_bank_count * 0x4000);
391   
409392   save_item(NAME(m_kb_counter));
410393   save_item(NAME(m_enable_nmi));
411394   save_item(NAME(m_tcsr_value));
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498481   MCFG_SOUND_ADD( "beeper", BEEP, 0 )
499482   MCFG_SOUND_ROUTE( ALL_OUTPUTS, "mono", 1.00 )
500483
501   MCFG_NVRAM_HANDLER(psion)
484   MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram1", psion_state, nvram_init)      // sys_regs
485   MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram2", psion_state, nvram_init)      // RAM
502486
503487   MCFG_TIMER_DRIVER_ADD_PERIODIC("nmi_timer", psion_state, nmi_timer, attotime::from_seconds(1))
504488
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544528
545529   MCFG_CPU_MODIFY("maincpu")
546530   MCFG_CPU_PROGRAM_MAP(psionp350_mem)
531
532   MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram3", psion_state, nvram_init)   // paged RAM
547533MACHINE_CONFIG_END
548534
549535static MACHINE_CONFIG_DERIVED( psionlz, psion_4lines )
550536
551537   MCFG_CPU_MODIFY("maincpu")
552538   MCFG_CPU_PROGRAM_MAP(psionlz_mem)
539
540   MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram3", psion_state, nvram_init)   // paged RAM
553541MACHINE_CONFIG_END
554542
555543/* ROM definition */
shelves/new_menus/src/mess/drivers/wicat.c
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8787   DECLARE_READ16_MEMBER(via_r);
8888   DECLARE_WRITE16_MEMBER(via_w);
8989   DECLARE_WRITE_LINE_MEMBER(kb_data_ready);
90   I8275_DRAW_CHARACTER_MEMBER(wicat_display_pixels);
9091
9192   required_shared_ptr<UINT8> m_vram;
9293   required_device<m68000_device> m_maincpu;
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730731   m_videocpu->set_input_line(INPUT_LINE_IRQ0,m_crtc_irq);
731732}
732733
733I8275_DISPLAY_PIXELS(wicat_display_pixels)
734I8275_DRAW_CHARACTER_MEMBER(wicat_state::wicat_display_pixels)
734735{
735   wicat_state *state = device->machine().driver_data<wicat_state>();
736   UINT8 romdata = m_chargen->base()[((charcode << 4) | linecount) + 1];
737   const pen_t *pen = m_palette->pens();
736738
737   UINT8 romdata = state->m_chargen->base()[((charcode << 4) | linecount) + 1];
738   const pen_t *pen = state->m_palette->pens();
739
740739   for (int i = 0; i < 8; i++)
741740   {
742741      int color = (romdata >> (7-i)) & 0x01;
r29305r29306
889888
890889   MCFG_DEVICE_ADD("video", I8275x, XTAL_19_6608MHz/8)
891890   MCFG_I8275_CHARACTER_WIDTH(9)
892   MCFG_I8275_DISPLAY_CALLBACK(wicat_display_pixels)
891   MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(wicat_state, wicat_display_pixels)
893892   MCFG_I8275_DRQ_CALLBACK(DEVWRITELINE("videodma",am9517a_device, dreq0_w))
894893   MCFG_I8275_IRQ_CALLBACK(WRITELINE(wicat_state,crtc_cb))
895894   MCFG_VIDEO_SET_SCREEN("screen")
shelves/new_menus/src/mess/mess.mak
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22652265$(MESS_DRIVERS)/pmi80.o:    $(MESS_LAYOUT)/pmi80.lh
22662266$(MESS_DRIVERS)/poly880.o:  $(MESS_LAYOUT)/poly880.lh
22672267$(MESS_DRIVERS)/pro80.o:    $(MESS_LAYOUT)/pro80.lh
2268$(MESS_DRIVERS)/pve500.o:   $(MESS_LAYOUT)/pve500.lh
22682269$(MESS_DRIVERS)/px4.o:      $(MESS_LAYOUT)/px4.lh
22692270$(MESS_DRIVERS)/px8.o:      $(MESS_LAYOUT)/px8.lh
22702271$(MESS_DRIVERS)/ravens.o:   $(MESS_LAYOUT)/ravens.lh
shelves/new_menus/src/mess/tools/imgtool/modules.c
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4949      imgtool_library_add(lib, modules[i]);
5050
5151   /* remove irrelevant modules */
52   for (i = 0; i < sizeof(irrelevant_modules)
53         / sizeof(irrelevant_modules[0]); i++)
52   for (i = 0; i < ARRAY_LENGTH(irrelevant_modules); i++)
5453   {
5554      imgtool_library_unlink(lib, irrelevant_modules[i]);
5655   }
shelves/new_menus/src/mess/tools/imgtool/imgtool.c
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8989{
9090   va_list arg;
9191   va_start(arg, format);
92   printf(format, arg);
92   vprintf(format, arg);
9393   va_end(arg);
9494}
9595
shelves/new_menus/src/mess/tools/imgtool/modules/ti99.c
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18301830         || ((dest->files[i].fdr_ptr && dest->files[i+1].fdr_ptr) && (memcmp(dest->files[i].name, dest->files[i+1].name, 10) >= 0)))
18311831      {
18321832         /* if the catalog is not sorted, we repair it */
1833         qsort(dest->files, sizeof(dest->files)/sizeof(dest->files[0]), sizeof(dest->files[0]),
1833         qsort(dest->files, ARRAY_LENGTH(dest->files), sizeof(dest->files[0]),
18341834               cat_file_compare_qsort);
18351835         break;
18361836      }
shelves/new_menus/src/mess/tools/floptool/main.c
r29305r29306
6666{
6767   va_list arg;
6868   va_start(arg, format);
69   printf(format, arg);
69   vprintf(format, arg);
7070   va_end(arg);
7171}
7272
73enum { FORMAT_COUNT = sizeof(floppy_formats)/sizeof(floppy_formats[0]) };
73enum { FORMAT_COUNT = ARRAY_LENGTH(floppy_formats) };
7474
7575static floppy_image_format_t *formats[FORMAT_COUNT];
7676
shelves/new_menus/src/mame/includes/3do.h
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77#ifndef _3DO_H_
88#define _3DO_H_
99
10#include "machine/nvram.h"
11
12
1013struct SLOW2 {
1114   /* 03180000 - 0318003f - configuration group */
1215   /* 03180040 - 0318007f - diagnostic UART */
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139142      m_maincpu(*this, "maincpu"),
140143      m_dram(*this, "dram"),
141144      m_vram(*this, "vram"),
145      m_nvram(*this, "nvram"),
142146      m_bank1(*this, "bank1"),
143147      m_bank2(*this, "bank2") { }
144148
145149   required_device<cpu_device> m_maincpu;
146150   required_shared_ptr<UINT32> m_dram;
147151   required_shared_ptr<UINT32> m_vram;
152   required_device<nvram_device> m_nvram;
148153   SLOW2 m_slow2;
149154   MADAM m_madam;
150155   CLIO m_clio;
151156   SVF m_svf;
152157   DSPP m_dspp;
153   UINT8 m_nvram[0x8000];
158   UINT8 m_nvmem[0x8000];
154159
155160//  UINT8 m_video_bits[512];
156161   DECLARE_READ8_MEMBER(_3do_nvarea_r);
shelves/new_menus/src/mame/includes/kaneko16.h
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3131      m_view2_0(*this, "view2_0"),
3232      m_view2_1(*this, "view2_1"),
3333      m_kaneko_spr(*this, "kan_spr"),
34      m_pandora(*this, "pandora")
34      m_pandora(*this, "pandora"),
35      m_palette(*this, "palette")
3536      { }
3637
3738   required_device<cpu_device> m_maincpu;
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4546   optional_device<kaneko_view2_tilemap_device> m_view2_1;
4647   optional_device<kaneko16_sprite_device> m_kaneko_spr;
4748   optional_device<kaneko_pandora_device> m_pandora;
49   required_device<palette_device> m_palette;
4850
4951   UINT16 m_disp_enable;
5052
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7274   DECLARE_VIDEO_START(kaneko16);
7375   DECLARE_MACHINE_RESET(mgcrystl);
7476   UINT32 screen_update_kaneko16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
75   UINT32 screen_update_common(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
77   
78   template<class _BitmapClass>
79   UINT32 screen_update_common(screen_device &screen, _BitmapClass &bitmap, const rectangle &cliprect);
80
81
82
7683   TIMER_DEVICE_CALLBACK_MEMBER(kaneko16_interrupt);
7784   TIMER_DEVICE_CALLBACK_MEMBER(shogwarr_interrupt);
78   void kaneko16_fill_bitmap(bitmap_ind16 &bitmap, const rectangle &cliprect);
85   
86   template<class _BitmapClass>
87   void kaneko16_fill_bitmap(palette_device* palette, _BitmapClass &bitmap, const rectangle &cliprect);
88
89
7990   void kaneko16_common_oki_bank_w(  const char *bankname, const char* tag, int bank, size_t fixedsize, size_t bankedsize );
8091   void kaneko16_unscramble_tiles(const char *region);
8192   void kaneko16_expand_sample_banks(const char *region);
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111122   kaneko16_berlwall_state(const machine_config &mconfig, device_type type, const char *tag)
112123      : kaneko16_state(mconfig, type, tag),
113124      m_bg15_reg(*this, "bg15_reg"),
114      m_bg15_select(*this, "bg15_select")
125      m_bg15_select(*this, "bg15_select"),
126      m_bgpalette(*this, "bgpalette")
127
115128   {
116129   }
117130
118131   optional_shared_ptr<UINT16> m_bg15_reg;
119132   optional_shared_ptr<UINT16> m_bg15_select;
133   required_device<palette_device> m_bgpalette;
120134
121135   bitmap_ind16 m_bg15_bitmap;
122136
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125139   DECLARE_READ16_MEMBER(kaneko16_bg15_reg_r);
126140   DECLARE_WRITE16_MEMBER(kaneko16_bg15_reg_w);
127141
142   DECLARE_READ16_MEMBER(berlwall_oki_r);
143   DECLARE_WRITE16_MEMBER(berlwall_oki_w);
144
128145   DECLARE_DRIVER_INIT(berlwall);
129146   DECLARE_PALETTE_INIT(berlwall);
130147   DECLARE_VIDEO_START(berlwall);
131   UINT32 screen_update_berlwall(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
132   void kaneko16_render_15bpp_bitmap(bitmap_ind16 &bitmap, const rectangle &cliprect);
148   UINT32 screen_update_berlwall(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
149   void kaneko16_render_15bpp_bitmap(bitmap_rgb32 &bitmap, const rectangle &cliprect);
133150};
134151
135152class kaneko16_shogwarr_state : public kaneko16_state
shelves/new_menus/src/mame/includes/seicross.h
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1#include "machine/nvram.h"
2
13class seicross_state : public driver_device
24{
35public:
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810      m_row_scroll(*this, "row_scroll"),
911      m_spriteram2(*this, "spriteram2"),
1012      m_colorram(*this, "colorram"),
11      m_nvram(*this, "nvram"),
1213      m_maincpu(*this, "maincpu"),
1314      m_mcu(*this, "mcu"),
15      m_nvram(*this, "nvram"),
1416      m_gfxdecode(*this, "gfxdecode"),
1517      m_palette(*this, "palette") { }
1618
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1921   required_shared_ptr<UINT8> m_row_scroll;
2022   required_shared_ptr<UINT8> m_spriteram2;
2123   required_shared_ptr<UINT8> m_colorram;
22   optional_shared_ptr<UINT8> m_nvram;
2324   
2425   UINT8 m_portb;
2526   tilemap_t *m_bg_tilemap;
27   void nvram_init(nvram_device &nvram, void *data, size_t size);
2628
2729   UINT8 m_irq_mask;
2830   DECLARE_WRITE8_MEMBER(seicross_videoram_w);
r29305r29306
3840   void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect );
3941   required_device<cpu_device> m_maincpu;
4042   required_device<cpu_device> m_mcu;
43   optional_device<nvram_device> m_nvram;
4144   required_device<gfxdecode_device> m_gfxdecode;
4245   required_device<palette_device> m_palette;
4346};
shelves/new_menus/src/mame/includes/mjkjidai.h
r29305r29306
1#include "machine/nvram.h"
12#include "sound/okiadpcm.h"
23
34class mjkjidai_adpcm_device;
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78public:
89   mjkjidai_state(const machine_config &mconfig, device_type type, const char *tag)
910      : driver_device(mconfig, type, tag),
10      m_nvram(*this, "nvram"),
1111      m_spriteram1(*this, "spriteram1"),
1212      m_spriteram2(*this, "spriteram2"),
1313      m_spriteram3(*this, "spriteram3"),
1414      m_videoram(*this, "videoram"),
1515      m_maincpu(*this, "maincpu"),
1616      m_mjk_adpcm(*this, "adpcm"),
17      m_nvram(*this, "nvram"),
1718      m_gfxdecode(*this, "gfxdecode"),
1819      m_palette(*this, "palette") { }
1920
20   required_shared_ptr<UINT8> m_nvram;
2121   required_shared_ptr<UINT8> m_spriteram1;
2222   required_shared_ptr<UINT8> m_spriteram2;
2323   required_shared_ptr<UINT8> m_spriteram3;
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2525
2626   required_device<cpu_device> m_maincpu;
2727   required_device<mjkjidai_adpcm_device> m_mjk_adpcm;
28   required_device<nvram_device> m_nvram;
2829   required_device<gfxdecode_device> m_gfxdecode;
2930   required_device<palette_device> m_palette;
3031
shelves/new_menus/src/mame/mame.mak
r29305r29306
24152415
24162416$(DRIVERS)/darius.o:    $(LAYOUT)/darius.lh
24172417
2418$(DRIVERS)/dblcrown.o:  $(LAYOUT)/dblcrown.lh
2419
24182420$(DRIVERS)/de_2.o:      $(LAYOUT)/de2.lh \
24192421         $(LAYOUT)/de2a3.lh
24202422
shelves/new_menus/src/mame/video/kaneko16.c
r29305r29306
2424
2525
2626
27void kaneko16_state::kaneko16_fill_bitmap(bitmap_ind16 &bitmap, const rectangle &cliprect)
27/* Fill the bitmap with a single colour. This is wrong, but will work most of
28   the times. To do it right, each pixel should be drawn with pen 0
29   of the bottomost tile that covers it (which is pretty tricky to do) */
30template<class _BitmapClass>
31void kaneko16_state::kaneko16_fill_bitmap(palette_device* palette, _BitmapClass &bitmap, const rectangle &cliprect)
2832{
33   int pen = 0;
34
2935   if (m_kaneko_spr)
30      if(m_kaneko_spr->get_sprite_type()== 1)
36   {
37      if (m_kaneko_spr->get_sprite_type() == 1)
3138      {
32         bitmap.fill(0x7f00, cliprect);
33         return;
39         pen = 0x7f00;
3440      }
41   }
3542
3643
44   typename _BitmapClass::pixel_t *dest;
45   (void)dest; // shut up Visual Studio
46   if (sizeof(*dest) == 2)
47   {
48      bitmap.fill(pen, cliprect);
49   }
50   else
51   {
52      const pen_t *pal = palette->pens();
53      bitmap.fill(pal[pen], cliprect);
54   }
55}
3756
38   /* Fill the bitmap with pen 0. This is wrong, but will work most of
39      the times. To do it right, each pixel should be drawn with pen 0
40      of the bottomost tile that covers it (which is pretty tricky to do) */
41   bitmap.fill(0, cliprect);
4257
43}
4458
45UINT32 kaneko16_state::screen_update_common(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
59
60template<class _BitmapClass>
61UINT32 kaneko16_state::screen_update_common(screen_device &screen, _BitmapClass &bitmap, const rectangle &cliprect)
4662{
4763   int i;
4864
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6682
6783UINT32 kaneko16_state::screen_update_kaneko16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
6884{
69   kaneko16_fill_bitmap(bitmap,cliprect);
85   kaneko16_fill_bitmap(m_palette, bitmap,cliprect);
7086
7187   // if the display is disabled, do nothing?
7288   if (!m_disp_enable) return 0;
r29305r29306
91107
92108   /* initialize 555 RGB lookup */
93109   for (i = 0; i < 32768; i++)
94      palette.set_pen_color(2048 + i,pal5bit(i >> 5),pal5bit(i >> 10),pal5bit(i >> 0));
110      palette.set_pen_color(i,pal5bit(i >> 5),pal5bit(i >> 10),pal5bit(i >> 0));
95111}
96112
97113VIDEO_START_MEMBER(kaneko16_berlwall_state,berlwall)
r29305r29306
134150         if ((r & 0x10) && (b & 0x10))
135151            g = (g - 1) & 0x1f;     /* decrease with wraparound */
136152
137         m_bg15_bitmap.pix16(y, sx * 256 + x) = 2048 + ((g << 10) | (r << 5) | b);
153         m_bg15_bitmap.pix16(y, sx * 256 + x) = ((g << 10) | (r << 5) | b);
138154      }
139155
140156   VIDEO_START_CALL_MEMBER(kaneko16);
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164180WRITE16_MEMBER(kaneko16_berlwall_state::kaneko16_bg15_reg_w)
165181{
166182   COMBINE_DATA(&m_bg15_reg[0]);
183//   printf("kaneko16_bg15_reg_w %04x\n", m_bg15_reg[0]);
184   double brt1 = data & 0xff;
185   brt1 = brt1 / 255.0;
186
187   for (int i = 0; i < 0x8000;i++)
188      m_bgpalette->set_pen_contrast(i, brt1);
167189}
168190
169191
170void kaneko16_berlwall_state::kaneko16_render_15bpp_bitmap(bitmap_ind16 &bitmap, const rectangle &cliprect)
192void kaneko16_berlwall_state::kaneko16_render_15bpp_bitmap(bitmap_rgb32 &bitmap, const rectangle &cliprect)
171193{
172194   if (m_bg15_bitmap.valid())
173195   {
174196      int select  =   m_bg15_select[ 0 ];
175197//      int reg     =   m_bg15_reg[ 0 ];
176198      int flip    =   select & 0x20;
177      int sx, sy;
199      int sx;//, sy;
178200
179      if (flip)   select ^= 0x1f;
201   //   if (flip)   select ^= 0x1f;
180202
181203      sx      =   (select & 0x1f) * 256;
182      sy      =   0;
204   //   sy      =   0;
183205
184      copybitmap(bitmap, m_bg15_bitmap, flip, flip, -sx, -sy, cliprect);
206      const pen_t *pal = m_bgpalette->pens();
207      UINT16* srcbitmap;
208      UINT32* dstbitmap;
185209
210      for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
211      {
212         if (!flip) srcbitmap = &m_bg15_bitmap.pix16(y);
213         else srcbitmap =  &m_bg15_bitmap.pix16(255-y);
214         dstbitmap = &bitmap.pix32(y);
215
216         for (int x = cliprect.min_x; x <= cliprect.max_x; x++)
217         {
218            UINT16 pix = srcbitmap[x + sx];
219            dstbitmap[x] = pal[pix&0x7fff];
220         }
221      }
222
186223//      flag = 0;
187224   }
188225}
189UINT32 kaneko16_berlwall_state::screen_update_berlwall(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
226UINT32 kaneko16_berlwall_state::screen_update_berlwall(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
190227{
191228   // berlwall uses a 15bpp bitmap as a bg, not a solid fill
192229   kaneko16_render_15bpp_bitmap(bitmap,cliprect);
shelves/new_menus/src/mame/video/kaneko_tmap.c
r29305r29306
195195   m_tmap[_N_]->mark_tile_dirty(offset/2);
196196}
197197
198void kaneko_view2_tilemap_device::kaneko16_prepare(bitmap_ind16 &bitmap, const rectangle &cliprect) { kaneko16_prepare_common(bitmap, cliprect); };
199void kaneko_view2_tilemap_device::kaneko16_prepare(bitmap_rgb32 &bitmap, const rectangle &cliprect) { kaneko16_prepare_common(bitmap, cliprect); };
198200
199void kaneko_view2_tilemap_device::kaneko16_prepare(bitmap_ind16 &bitmap, const rectangle &cliprect)
201template<class _BitmapClass>
202void kaneko_view2_tilemap_device::kaneko16_prepare_common(_BitmapClass &bitmap, const rectangle &cliprect)
200203{
201204   int layers_flip_0;
202205   UINT16 layer0_scrollx, layer0_scrolly;
r29305r29306
244247   }
245248}
246249
247void kaneko_view2_tilemap_device::render_tilemap_chip(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri)
250void kaneko_view2_tilemap_device::render_tilemap_chip(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri) { render_tilemap_chip_common(screen, bitmap, cliprect, pri); }
251void kaneko_view2_tilemap_device::render_tilemap_chip(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int pri) { render_tilemap_chip_common(screen, bitmap, cliprect, pri); }
252
253template<class _BitmapClass>
254void kaneko_view2_tilemap_device::render_tilemap_chip_common(screen_device &screen, _BitmapClass &bitmap, const rectangle &cliprect, int pri)
248255{
249256   m_tmap[0]->draw(screen, bitmap, cliprect, pri, pri, 0);
250257   m_tmap[1]->draw(screen, bitmap, cliprect, pri, pri, 0);
251258}
252259
253void kaneko_view2_tilemap_device::render_tilemap_chip_alt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri, int v2pri)
260void kaneko_view2_tilemap_device::render_tilemap_chip_alt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri, int v2pri) { render_tilemap_chip_alt_common(screen, bitmap, cliprect, pri, v2pri); }
261void kaneko_view2_tilemap_device::render_tilemap_chip_alt(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int pri, int v2pri) { render_tilemap_chip_alt_common(screen, bitmap, cliprect, pri, v2pri); }
262
263template<class _BitmapClass>
264void kaneko_view2_tilemap_device::render_tilemap_chip_alt_common(screen_device &screen, _BitmapClass &bitmap, const rectangle &cliprect, int pri, int v2pri)
254265{
255266   m_tmap[0]->draw(screen, bitmap, cliprect, pri, v2pri ? pri : 0, 0);
256267   m_tmap[1]->draw(screen, bitmap, cliprect, pri, v2pri ? pri : 0, 0);
shelves/new_menus/src/mame/video/kaneko_tmap.h
r29305r29306
2626   void kaneko16_vram_w(offs_t offset, UINT16 data, UINT16 mem_mask, int _N_);
2727
2828   // call to do the rendering etc.
29   template<class _BitmapClass>
30   void kaneko16_prepare_common(_BitmapClass &bitmap, const rectangle &cliprect);
31   template<class _BitmapClass>
32   void render_tilemap_chip_common(screen_device &screen, _BitmapClass &bitmap, const rectangle &cliprect, int pri);
33   template<class _BitmapClass>
34   void render_tilemap_chip_alt_common(screen_device &screen, _BitmapClass &bitmap, const rectangle &cliprect, int pri, int v2pri);
35
2936   void kaneko16_prepare(bitmap_ind16 &bitmap, const rectangle &cliprect);
37   void kaneko16_prepare(bitmap_rgb32 &bitmap, const rectangle &cliprect);
3038   void render_tilemap_chip(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri);
39   void render_tilemap_chip(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int pri);
3140   void render_tilemap_chip_alt(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri, int v2pri);
41   void render_tilemap_chip_alt(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int pri, int v2pri);
3242
43
3344   // access
3445   DECLARE_READ16_MEMBER( kaneko_tmap_vram_r );
3546   DECLARE_WRITE16_MEMBER( kaneko_tmap_vram_w );
shelves/new_menus/src/mame/video/lordgun.c
r29305r29306
174174{
175175   int x = linear_value - 0x3c;
176176
177   if ( (x < 0) || (x > sizeof(lordgun_gun_x_table)/sizeof(lordgun_gun_x_table[0])) )
177   if ( (x < 0) || (x > ARRAY_LENGTH(lordgun_gun_x_table)) )
178178      x = 0;
179179
180180   return lordgun_gun_x_table[x] * 1.0f / 0x1BF;
r29305r29306
186186
187187   int x = ioport(gunnames[i])->read() - 0x3c;
188188
189   if ( (x < 0) || (x > sizeof(lordgun_gun_x_table)/sizeof(lordgun_gun_x_table[0])) )
189   if ( (x < 0) || (x > ARRAY_LENGTH(lordgun_gun_x_table)) )
190190      x = 0;
191191
192192   m_gun[i].scr_x = lordgun_gun_x_table[x];
shelves/new_menus/src/mame/video/starshp1.c
r29305r29306
3737      5, 7        /* 0x11        - circle */
3838   };
3939
40   for (i = 0; i < sizeof(colortable_source) / sizeof(colortable_source[0]); i++)
40   for (i = 0; i < ARRAY_LENGTH(colortable_source); i++)
4141      palette.set_pen_indirect(i, colortable_source[i]);
4242}
4343
shelves/new_menus/src/mame/video/kaneko_spr.c
r29305r29306
229229}
230230
231231// custom function to draw a single sprite. needed to keep correct sprites - sprites and sprites - tilemaps priorities
232void kaneko16_sprite_device::kaneko16_draw_sprites_custom(bitmap_ind16 &dest_bmp,const rectangle &clip,gfx_element *gfx,
232
233
234
235
236template<class _BitmapClass>
237void kaneko16_sprite_device::kaneko16_draw_sprites_custom(_BitmapClass &dest_bmp,const rectangle &clip,gfx_element *gfx,
233238      UINT32 code,UINT32 color,int flipx,int flipy,int sx,int sy,
234239      bitmap_ind8 &priority_bitmap, int priority)
235240{
r29305r29306
294299         ey -= pixels;
295300      }
296301
297      if( ex>sx )
302      if (ex > sx)
298303      { /* skip if inner loop doesn't draw anything */
299         int y;
300304
301         for( y=sy; y<ey; y++ )
305         typename _BitmapClass::pixel_t *dest;
306         int rgb;
307         if (sizeof(*dest) == 2) rgb = 0;
308         else rgb = 1;
309
310         const pen_t *pal = gfx->palette()->pens();
311
312         for (int y = sy; y < ey; y++)
302313         {
303            const UINT8 *source = source_base + (y_index>>16) * gfx->rowbytes();
304            UINT16 *dest = &dest_bmp.pix16(y);
314            const UINT8 *source = source_base + (y_index >> 16) * gfx->rowbytes();
315            dest = &dest_bmp.pix(y);
305316            UINT8 *pri = &priority_bitmap.pix8(y);
306317
307            int x, x_index = x_index_base;
308            for( x=sx; x<ex; x++ )
318            int x_index = x_index_base;
319            for (int x = sx; x < ex; x++)
309320            {
310               int c = source[x_index>>16];
311               if( c != 0 )
321               int c = source[x_index >> 16];
322               if (c != 0)
312323               {
313324                  if (pri[x] < priority)
314                     dest[x] = pen_base + c;
315                  pri[x] = 0xff; // mark it "already drawn"
325                  {
326
327                     if (!rgb) dest[x] = pen_base + c;
328                     else dest[x] = pal[pen_base + c];
329
330                     pri[x] = 0xff; // mark it "already drawn"
331                  }
316332               }
317333               x_index += dx;
318334            }
r29305r29306
323339   }
324340}
325341
342
343
344
326345/* Build a list of sprites to display & draw them */
327
328void kaneko16_sprite_device::kaneko16_draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, UINT16* spriteram16, int spriteram16_bytes)
346template<class _BitmapClass>
347void kaneko16_sprite_device::kaneko16_draw_sprites(running_machine &machine, _BitmapClass &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, UINT16* spriteram16, int spriteram16_bytes)
329348{
330349   /* Sprites *must* be parsed from the first in RAM to the last,
331350      because of the multisprite feature. But they *must* be drawn
r29305r29306
550569}
551570
552571
572void kaneko16_sprite_device::kaneko16_copybitmap(bitmap_ind16 &bitmap, const rectangle &cliprect)
573{
574   copybitmap_trans(bitmap,m_sprites_bitmap,0,0,0,0,cliprect,0);
575}
553576
554void kaneko16_sprite_device::kaneko16_render_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, UINT16* spriteram16, int spriteram16_bytes)
577void kaneko16_sprite_device::kaneko16_copybitmap(bitmap_rgb32 &bitmap, const rectangle &cliprect)
555578{
579   const pen_t *pal = m_gfxdecode->gfx(0)->palette()->pens();
580   UINT16* srcbitmap;
581   UINT32* dstbitmap;
582
583   for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
584   {
585      srcbitmap = &m_sprites_bitmap.pix16(y);
586      dstbitmap = &bitmap.pix32(y);
587
588      for (int x = cliprect.min_x; x <= cliprect.max_x; x++)
589      {
590         UINT16 pix = srcbitmap[x];
591         if (pix) dstbitmap[x] = pal[pix];
592      }
593   }
594}
595
596
597
598void kaneko16_sprite_device::kaneko16_render_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, UINT16* spriteram16, int spriteram16_bytes) { kaneko16_render_sprites_common(machine, bitmap, cliprect, priority_bitmap, spriteram16, spriteram16_bytes); }
599void kaneko16_sprite_device::kaneko16_render_sprites(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, UINT16* spriteram16, int spriteram16_bytes) { kaneko16_render_sprites_common(machine, bitmap, cliprect, priority_bitmap, spriteram16, spriteram16_bytes); }
600
601template<class _BitmapClass>
602void kaneko16_sprite_device::kaneko16_render_sprites_common(running_machine &machine, _BitmapClass &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, UINT16* spriteram16, int spriteram16_bytes)
603{
556604   /* Sprites last (rendered with pdrawgfx, so they can slip
557605      in between the layers) */
558606
559607   if(m_keep_sprites)
560608   {
561      /* keep sprites on screen */
609      /* keep sprites on screen - used by mgcrystl when you get the first gem and it shows instructions */
562610      kaneko16_draw_sprites(machine,m_sprites_bitmap, cliprect, priority_bitmap, spriteram16, spriteram16_bytes);
563      copybitmap_trans(bitmap,m_sprites_bitmap,0,0,0,0,cliprect,0);
611      kaneko16_copybitmap(bitmap,cliprect);
564612   }
565613   else
566614   {
shelves/new_menus/src/mame/video/kaneko_spr.h
r29305r29306
4242   virtual int get_sprite_type(void) =0;
4343
4444   void kaneko16_render_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, UINT16* spriteram16, int spriteram16_bytes);
45   void kaneko16_render_sprites(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, UINT16* spriteram16, int spriteram16_bytes);
4546
4647
48   template<class _BitmapClass>
49   void kaneko16_render_sprites_common(running_machine &machine, _BitmapClass &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, UINT16* spriteram16, int spriteram16_bytes);
50
51
4752   DECLARE_READ16_MEMBER(kaneko16_sprites_regs_r);
4853   DECLARE_WRITE16_MEMBER(kaneko16_sprites_regs_w);
4954
r29305r29306
8186   int m_keep_sprites;
8287   bitmap_ind16 m_sprites_bitmap;
8388
84   void kaneko16_draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, UINT16* spriteram16, int spriteram16_bytes);
8589
86   void kaneko16_draw_sprites_custom(bitmap_ind16 &dest_bmp,const rectangle &clip,gfx_element *gfx,
90   template<class _BitmapClass>
91   void kaneko16_draw_sprites(running_machine &machine, _BitmapClass &bitmap, const rectangle &cliprect, bitmap_ind8 &priority_bitmap, UINT16* spriteram16, int spriteram16_bytes);
92
93   
94   template<class _BitmapClass>
95   void kaneko16_draw_sprites_custom(_BitmapClass &dest_bmp,const rectangle &clip,gfx_element *gfx,
8796         UINT32 code,UINT32 color,int flipx,int flipy,int sx,int sy,
8897         bitmap_ind8 &priority_bitmap, int priority);
8998
9099   int kaneko16_parse_sprite_type012(running_machine &machine, int i, struct tempsprite *s, UINT16* spriteram16, int spriteram16_bytes);
91100
101   void kaneko16_copybitmap(bitmap_ind16 &bitmap, const rectangle &cliprect);
102   void kaneko16_copybitmap(bitmap_rgb32 &bitmap, const rectangle &cliprect);
92103
93104   required_device<gfxdecode_device> m_gfxdecode;
94105
shelves/new_menus/src/mame/layout/dblcrown.lay
r0r29306
1<?xml version="1.0"?>
2<mamelayout version="2">
3<!--
4     Double Crown control panel
5     Written by Roberto Fresca.
6-->
7
8<!-- define button-lamps -->
9
10   <element name="hold1" defstate="0">
11      <rect state="1">
12         <color red="1.0" green="0.0" blue="0.0" />
13      </rect>
14      <rect state="0">
15         <color red="0.15" green="0.0" blue="0.0" />
16      </rect>
17      <text string="HOLD 1">
18         <color red="0.0" green="0.0" blue="0.0" />
19         <bounds x="0" y="0.3" width="1" height="0.4" />
20      </text>
21   </element>
22
23   <element name="hold2" defstate="0">
24      <rect state="1">
25         <color red="1.0" green="0.0" blue="0.0" />
26      </rect>
27      <rect state="0">
28         <color red="0.15" green="0.0" blue="0.0" />
29      </rect>
30      <text string="HOLD 2">
31         <color red="0.0" green="0.0" blue="0.0" />
32         <bounds x="0" y="0.3" width="1" height="0.4" />
33      </text>
34   </element>
35
36   <element name="hold3" defstate="0">
37      <rect state="1">
38         <color red="1.0" green="0.0" blue="0.0" />
39      </rect>
40      <rect state="0">
41         <color red="0.15" green="0.0" blue="0.0" />
42      </rect>
43      <text string="HOLD 3">
44         <color red="0.0" green="0.0" blue="0.0" />
45         <bounds x="0" y="0.3" width="1" height="0.4" />
46      </text>
47   </element>
48
49   <element name="hold4" defstate="0">
50      <rect state="1">
51         <color red="1.0" green="0.0" blue="0.0" />
52      </rect>
53      <rect state="0">
54         <color red="0.15" green="0.0" blue="0.0" />
55      </rect>
56      <text string="HOLD 4">
57         <color red="0.0" green="0.0" blue="0.0" />
58         <bounds x="0" y="0.3" width="1" height="0.4" />
59      </text>
60   </element>
61
62   <element name="hold5" defstate="0">
63      <rect state="1">
64         <color red="1.0" green="0.0" blue="0.0" />
65      </rect>
66      <rect state="0">
67         <color red="0.15" green="0.0" blue="0.0" />
68      </rect>
69      <text string="HOLD 5">
70         <color red="0.0" green="0.0" blue="0.0" />
71         <bounds x="0" y="0.3" width="1" height="0.4" />
72      </text>
73   </element>
74
75   <element name="cancel" defstate="0">
76      <rect state="1">
77         <color red="1.0" green="1.0" blue="0.0" />
78      </rect>
79      <rect state="0">
80         <color red="0.12" green="0.12" blue="0.0" />
81      </rect>
82      <text string="CANCEL">
83         <color red="0.0" green="0.0" blue="0.0" />
84         <bounds x="0" y="0.3" width="1" height="0.4" />
85      </text>
86   </element>
87
88   <element name="bet" defstate="0">
89      <rect state="1">
90         <color red="1.0" green="0.0" blue="1.0" />
91      </rect>
92      <rect state="0">
93         <color red="0.15" green="0.0" blue="0.15" />
94      </rect>
95      <text string="BET">
96         <color red="0.0" green="0.0" blue="0.0" />
97         <bounds x="0" y="0.3" width="1" height="0.4" />
98      </text>
99   </element>
100
101   <element name="deal" defstate="0">
102      <rect state="1">
103         <color red="0.0" green="1.0" blue="0.0" />
104      </rect>
105      <rect state="0">
106         <color red="0.0" green="0.15" blue="0.0" />
107      </rect>
108      <text string="DEAL">
109         <color red="0.0" green="0.0" blue="0.0" />
110         <bounds x="0" y="0.3" width="1" height="0.4" />
111      </text>
112   </element>
113
114
115<!-- define basic elements -->
116
117   <element name="cpanel">
118      <rect>
119         <color red="0.0" green="0.0" blue="0.0" />
120      </rect>
121   </element>
122
123   <element name="cpanel2">
124      <rect>
125         <color red="0.045" green="0.045" blue="0.045" />
126      </rect>
127   </element>
128
129   <element name="hold_b" defstate="0">
130      <rect state="1">
131         <color red="0.8" green="0.0" blue="0.0" />
132      </rect>
133      <rect state="0">
134         <color red="0.1" green="0.0" blue="0.0" />
135      </rect>
136   </element>
137
138   <element name="cancel_b" defstate="0">
139      <rect state="1">
140         <color red="0.8" green="0.8" blue="0.0" />
141      </rect>
142      <rect state="0">
143         <color red="0.08" green="0.08" blue="0.0" />
144      </rect>
145   </element>
146
147   <element name="bet_b" defstate="0">
148      <rect state="1">
149         <color red="0.8" green="0.0" blue="0.8" />
150      </rect>
151      <rect state="0">
152         <color red="0.1" green="0.0" blue="0.1" />
153      </rect>
154   </element>
155
156   <element name="deal_b" defstate="0">
157      <rect state="1">
158         <color red="0.0" green="0.8" blue="0.0" />
159      </rect>
160      <rect state="0">
161         <color red="0.0" green="0.1" blue="0.0" />
162      </rect>
163   </element>
164
165
166<!-- define background -->
167
168   <view name="Button Lamps">
169      <screen index="0">
170         <bounds left="0" top="0" right="4" bottom="3" />
171      </screen>
172
173      <bezel element="cpanel">
174         <bounds left="0" right="4" top="3" bottom="3.34" />
175      </bezel>
176
177      <bezel element="cpanel2">
178         <bounds left="0" right="4" top="3" bottom="3.17" />
179      </bezel>
180
181<!-- define lamps -->
182
183      <bezel name="lamp0" element="deal_b">
184         <bounds x="3.55" y="3.05" width="0.35" height="0.24" />
185      </bezel>
186      <bezel name="lamp0" element="deal">
187         <bounds x="3.57" y="3.07" width="0.31" height="0.20" />
188      </bezel>
189
190
191      <bezel name="lamp1" element="bet_b">
192         <bounds x="3.10" y="3.05" width="0.35" height="0.24" />
193      </bezel>
194      <bezel name="lamp1" element="bet">
195         <bounds x="3.12" y="3.07" width="0.31" height="0.20" />
196      </bezel>
197
198
199      <bezel name="lamp2" element="cancel_b">
200         <bounds x="2.35" y="3.05" width="0.35" height="0.24" />
201      </bezel>
202      <bezel name="lamp2" element="cancel">
203         <bounds x="2.37" y="3.07" width="0.31" height="0.20" />
204      </bezel>
205
206
207      <bezel name="lamp3" element="hold_b">
208         <bounds x="1.90" y="3.05" width="0.35" height="0.24" />
209      </bezel>
210      <bezel name="lamp3" element="hold5">
211         <bounds x="1.92" y="3.07" width="0.31" height="0.20" />
212      </bezel>
213
214
215      <bezel name="lamp4" element="hold_b">
216         <bounds x="1.45" y="3.05" width="0.35" height="0.24" />
217      </bezel>
218      <bezel name="lamp4" element="hold4">
219         <bounds x="1.47" y="3.07" width="0.31" height="0.20" />
220      </bezel>
221
222
223      <bezel name="lamp5" element="hold_b">
224         <bounds x="1.00" y="3.05" width="0.35" height="0.24" />
225      </bezel>
226      <bezel name="lamp5" element="hold3">
227         <bounds x="1.02" y="3.07" width="0.31" height="0.20" />
228      </bezel>
229
230
231      <bezel name="lamp6" element="hold_b">
232         <bounds x="0.55" y="3.05" width="0.35" height="0.24" />
233      </bezel>
234      <bezel name="lamp6" element="hold2">
235         <bounds x="0.57" y="3.07" width="0.31" height="0.20" />
236      </bezel>
237
238
239      <bezel name="lamp7" element="hold_b">
240         <bounds x="0.10" y="3.05" width="0.35" height="0.24" />
241      </bezel>
242      <bezel name="lamp7" element="hold1">
243         <bounds x="0.12" y="3.07" width="0.31" height="0.20" />
244      </bezel>
245
246
247   </view>
248</mamelayout>
Property changes on: shelves/new_menus/src/mame/layout/dblcrown.lay
Added: svn:eol-style
   + native
Added: svn:mime-type
   + text/xml
shelves/new_menus/src/mame/drivers/firebeat.c
r29305r29306
17231723   m_layer = 0;
17241724}
17251725
1726const rtc65271_interface firebeat_rtc =
1727{
1728   DEVCB_NULL
1729};
1730
17311726WRITE_LINE_MEMBER( firebeat_state::ata_interrupt )
17321727{
17331728   m_maincpu->set_input_line(INPUT_LINE_IRQ4, state);
r29305r29306
17491744   MCFG_MACHINE_START_OVERRIDE(firebeat_state,firebeat)
17501745   MCFG_MACHINE_RESET_OVERRIDE(firebeat_state,firebeat)
17511746
1752   MCFG_RTC65271_ADD("rtc", firebeat_rtc)
1747   MCFG_DEVICE_ADD("rtc", RTC65271, 0)
17531748
17541749   MCFG_FUJITSU_29F016A_ADD("flash_main")
17551750   MCFG_FUJITSU_29F016A_ADD("flash_snd1")
r29305r29306
17971792   MCFG_MACHINE_START_OVERRIDE(firebeat_state,firebeat)
17981793   MCFG_MACHINE_RESET_OVERRIDE(firebeat_state,firebeat)
17991794
1800   MCFG_RTC65271_ADD("rtc", firebeat_rtc)
1795   MCFG_DEVICE_ADD("rtc", RTC65271, 0)
18011796
18021797   MCFG_FUJITSU_29F016A_ADD("flash_main")
18031798   MCFG_FUJITSU_29F016A_ADD("flash_snd1")
shelves/new_menus/src/mame/drivers/plygonet.c
r29305r29306
215215   if (mem_mask == 0xffff0000)
216216   {
217217      logerror("68k WRITING %04x to shared ram %x (@%x)\n", (m_shared_ram[offset] & 0xffff0000) >> 16,
218                                                0xc000 + (offset<<1),
219                                                space.device().safe_pc());
218         0xc000 + (offset<<1),
219         space.device().safe_pc());
220220   }
221221   else if (mem_mask == 0x0000ffff)
222222   {
223223      logerror("68k WRITING %04x to shared ram %x (@%x)\n", (m_shared_ram[offset] & 0x0000ffff),
224                                                0xc000 +((offset<<1)+1),
225                                                space.device().safe_pc());
224         0xc000 +((offset<<1)+1),
225         space.device().safe_pc());
226226   }
227227   else
228228   {
229229      logerror("68k WRITING %04x & %04x to shared ram %x & %x [%08x] (@%x)\n", (m_shared_ram[offset] & 0xffff0000) >> 16,
230                                                               (m_shared_ram[offset] & 0x0000ffff),
231                                                               0xc000 + (offset<<1),
232                                                               0xc000 +((offset<<1)+1),
233                                                               mem_mask,
234                                                               space.device().safe_pc());
230         (m_shared_ram[offset] & 0x0000ffff),
231         0xc000 + (offset<<1),
232         0xc000 +((offset<<1)+1),
233         mem_mask,
234         space.device().safe_pc());
235235   }
236236
237237   /* write to the current dsp56k word */
238   if (mem_mask | (0xffff0000))
238   if (mem_mask & 0xffff0000)
239239   {
240240      m_dsp56k_shared_ram_16[(offset<<1)] = (m_shared_ram[offset] & 0xffff0000) >> 16 ;
241241   }
242242
243243   /* write to the next dsp56k word */
244   if (mem_mask | (0x0000ffff))
244   if (mem_mask & 0x0000ffff)
245245   {
246246      m_dsp56k_shared_ram_16[(offset<<1)+1] = (m_shared_ram[offset] & 0x0000ffff) ;
247247   }
shelves/new_menus/src/mame/drivers/spcforce.c
r29305r29306
242242{
243243   int i;
244244
245   for (i = 0; i < sizeof(colortable_source) / sizeof(colortable_source[0]); i++)
245   for (i = 0; i < ARRAY_LENGTH(colortable_source); i++)
246246   {
247247      int data = colortable_source[i];
248248      rgb_t color = rgb_t(pal1bit(data >> 0), pal1bit(data >> 1), pal1bit(data >> 2));
r29305r29306
280280   MCFG_SCREEN_PALETTE("palette")
281281
282282   MCFG_GFXDECODE_ADD("gfxdecode", "palette", spcforce)
283   MCFG_PALETTE_ADD("palette", sizeof(colortable_source) / sizeof(colortable_source[0]))
283   MCFG_PALETTE_ADD("palette", ARRAY_LENGTH(colortable_source))
284284   MCFG_PALETTE_INIT_OWNER(spcforce_state, spcforce)
285285
286286   /* sound hardware */
shelves/new_menus/src/mame/drivers/3do.c
r29305r29306
9898#include "imagedev/chd_cd.h"
9999#include "cpu/arm/arm.h"
100100#include "cpu/arm7/arm7.h"
101#include "mcfglgcy.h"
102101
103102
104
105103#define X2_CLOCK_PAL    59000000
106104#define X2_CLOCK_NTSC   49090000
107105#define X601_CLOCK      XTAL_16_9344MHz
r29305r29306
135133void _3do_state::machine_start()
136134{
137135   m_bank2->set_base(memregion("user1")->base());
136   m_nvram->set_base(&m_nvmem, sizeof(m_nvmem));
138137
139138   /* configure overlay */
140139   m_bank1->configure_entry(0, m_dram);
r29305r29306
159158   NULL
160159};
161160
162static NVRAM_HANDLER( _3do )
163{
164   _3do_state *state = machine.driver_data<_3do_state>();
165   UINT8 *nvram = state->m_nvram;
166161
167   if (read_or_write)
168      file->write(nvram,0x8000);
169   else
170   {
171      if (file)
172         file->read(nvram,0x8000);
173      else
174      {
175         /* fill in the default values */
176         memset(nvram,0xff,0x8000);
177      }
178   }
179}
180
181162static MACHINE_CONFIG_START( 3do, _3do_state )
182163
183164   /* Basic machine hardware */
184165   MCFG_CPU_ADD( "maincpu", ARM7_BE, XTAL_50MHz/4 )
185166   MCFG_CPU_PROGRAM_MAP( 3do_mem)
186167
187   MCFG_NVRAM_HANDLER(_3do)
168   MCFG_NVRAM_ADD_1FILL("nvram")
188169
189170   MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_x16", _3do_state, timer_x16_cb, attotime::from_hz(12000)) // TODO: timing
190171
r29305r29306
204185   MCFG_CPU_ADD("maincpu", ARM7_BE, XTAL_50MHz/4 )
205186   MCFG_CPU_PROGRAM_MAP( 3do_mem)
206187
207   MCFG_NVRAM_HANDLER(_3do)
188   MCFG_NVRAM_ADD_1FILL("nvram")
208189
209190   MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_x16", _3do_state, timer_x16_cb, attotime::from_hz(12000)) // TODO: timing
210191
shelves/new_menus/src/mame/drivers/tmspoker.c
r29305r29306
574574   MCFG_TMS99xx_ADD("maincpu", TMS9980A, MASTER_CLOCK/4, tmspoker_map, tmspoker_cru_map)
575575   MCFG_CPU_VBLANK_INT_DRIVER("screen", tmspoker_state,  tmspoker_interrupt)
576576
577//  MCFG_NVRAM_HANDLER(generic_0fill)
578
579577   /* video hardware */
580578   MCFG_SCREEN_ADD("screen", RASTER)
581579   MCFG_SCREEN_REFRESH_RATE(60)
shelves/new_menus/src/mame/drivers/snowbros.c
r29305r29306
23942394
23952395
23962396
2397//for (i = 0;i < sizeof(cookbib2_mcu68k)/sizeof(cookbib2_mcu68k[0]);i++)
2397//for (i = 0;i < ARRAY_LENGTH(cookbib2_mcu68k);i++)
23982398//      m_hyperpac_ram[0xf000/2 + i] = cookbib2_mcu68k[i];
23992399
24002400//  for (i = 0;i < 0x200/2;i++)
shelves/new_menus/src/mame/drivers/jalmah.c
r29305r29306
17621762   int res;
17631763
17641764   res = resp[m_respcount++];
1765   if (m_respcount >= sizeof(resp)/sizeof(resp[0])) m_respcount = 0;
1765   if (m_respcount >= ARRAY_LENGTH(resp)) m_respcount = 0;
17661766
17671767//  logerror("%04x: mcu_r %02x\n",space.device().safe_pc(),res);
17681768
r29305r29306
19801980   int res;
19811981
19821982   res = resp[m_respcount++];
1983   if (m_respcount >= sizeof(resp)/sizeof(resp[0])) m_respcount = 0;
1983   if (m_respcount >= ARRAY_LENGTH(resp)) m_respcount = 0;
19841984
19851985//  logerror("%04x: mcu_r %02x\n",space.device().safe_pc(),res);
19861986
r29305r29306
22592259   int res;
22602260
22612261   res = resp[m_respcount++];
2262   if (m_respcount >= sizeof(resp)/sizeof(resp[0])) m_respcount = 0;
2262   if (m_respcount >= ARRAY_LENGTH(resp)) m_respcount = 0;
22632263
22642264//  logerror("%04x: mcu_r %02x\n",space.device().safe_pc(),res);
22652265
r29305r29306
23962396   int res;
23972397
23982398   res = resp[m_respcount++];
2399   if (m_respcount >= sizeof(resp)/sizeof(resp[0])) m_respcount = 0;
2399   if (m_respcount >= ARRAY_LENGTH(resp)) m_respcount = 0;
24002400
24012401//  popmessage("%04x: mcu_r %02x",space.device().safe_pc(),res);
24022402
r29305r29306
24172417   int res;
24182418
24192419   res = resp[m_respcount++];
2420   if (m_respcount >= sizeof(resp)/sizeof(resp[0])) m_respcount = 0;
2420   if (m_respcount >= ARRAY_LENGTH(resp)) m_respcount = 0;
24212421
24222422//  popmessage("%04x: mcu_r %02x",space.device().safe_pc(),res);
24232423
shelves/new_menus/src/mame/drivers/kaneko16.c
r29305r29306
232232                                The Berlin Wall
233233***************************************************************************/
234234
235READ16_MEMBER(kaneko16_berlwall_state::berlwall_oki_r)
236{
237   UINT16 ret;
238
239   if (mem_mask == 0xff00) // reads / writes to the upper byte only appear to act as a mirror to the lower byte, 16-bit reads/writes only access the lower byte.
240   {
241      mem_mask >>= 8;
242   }
243
244   ret = m_oki->read(space, offset, mem_mask);
245   ret = ret | ret << 8;
246
247   return ret;
248}
249
250WRITE16_MEMBER(kaneko16_berlwall_state::berlwall_oki_w)
251{
252   if (mem_mask == 0xff00) // reads / writes to the upper byte only appear to act as a mirror to the lower byte, 16-bit reads/writes only access the lower byte.
253   {
254      data >>= 8;
255      mem_mask >>= 8;
256   }
257
258   m_oki->write(space, offset, data, mem_mask);
259}
260
235261static ADDRESS_MAP_START( berlwall, AS_PROGRAM, 16, kaneko16_berlwall_state )
236262   AM_RANGE(0x000000, 0x03ffff) AM_ROM     // ROM
237263   AM_RANGE(0x200000, 0x20ffff) AM_RAM     // Work RAM
r29305r29306
251277   AM_RANGE(0x800000, 0x80001f) AM_READWRITE(kaneko16_ay1_YM2149_r, kaneko16_ay1_YM2149_w) // Sound
252278   AM_RANGE(0x800200, 0x80021f) AM_READWRITE(kaneko16_ay2_YM2149_r, kaneko16_ay2_YM2149_w)
253279   AM_RANGE(0x8003fe, 0x8003ff) AM_NOP // for OKI when accessed as .l
254   AM_RANGE(0x800400, 0x800401) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)
280   AM_RANGE(0x800400, 0x800401) AM_READWRITE( berlwall_oki_r, berlwall_oki_w )
255281   AM_RANGE(0xc00000, 0xc03fff) AM_DEVREADWRITE("view2_0", kaneko_view2_tilemap_device,  kaneko_tmap_vram_r, kaneko_tmap_vram_w )
256282   AM_RANGE(0xd00000, 0xd0001f) AM_DEVREADWRITE("view2_0", kaneko_view2_tilemap_device,  kaneko_tmap_regs_r, kaneko_tmap_regs_w)
257283ADDRESS_MAP_END
r29305r29306
883909INPUT_PORTS_END
884910
885911
912
913
886914/***************************************************************************
887915                                    Blaze On
888916***************************************************************************/
r29305r29306
16241652
16251653   /* video hardware */
16261654   MCFG_SCREEN_ADD("screen", RASTER)
1627   MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)    // mangled sprites otherwise
1655//   MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)    // mangled sprites otherwise
16281656   MCFG_SCREEN_REFRESH_RATE(60)
16291657   MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
16301658   MCFG_SCREEN_SIZE(256, 256)
16311659   MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 16, 240-1)
16321660   MCFG_SCREEN_UPDATE_DRIVER(kaneko16_berlwall_state, screen_update_berlwall)
1633   MCFG_SCREEN_PALETTE("palette")
1661//   MCFG_SCREEN_PALETTE("palette")
16341662
16351663   MCFG_GFXDECODE_ADD("gfxdecode", "palette", 1x4bit_1x4bit)
1636   MCFG_PALETTE_ADD("palette", 2048 + 32768)   /* 32768 static colors for the bg */
1664   MCFG_PALETTE_ADD("palette", 2048 )   
16371665   MCFG_PALETTE_FORMAT(xGGGGGRRRRRBBBBB)
1666
1667   MCFG_PALETTE_ADD("bgpalette", 32768) /* 32768 static colors for the bg */
1668   MCFG_PALETTE_FORMAT(xGGGGGRRRRRBBBBB)
16381669   MCFG_PALETTE_INIT_OWNER(kaneko16_berlwall_state,berlwall)
16391670
16401671   MCFG_DEVICE_ADD("view2_0", KANEKO_TMAP, 0)
r29305r29306
16851716   MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
16861717   MCFG_SCREEN_SIZE(256, 256)
16871718   MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 16, 240-1)
1688   MCFG_SCREEN_UPDATE_DRIVER(kaneko16_berlwall_state, screen_update_kaneko16)
1719   MCFG_SCREEN_UPDATE_DRIVER(kaneko16_state, screen_update_kaneko16)
16891720   MCFG_SCREEN_PALETTE("palette")
16901721
16911722   MCFG_GFXDECODE_ADD("gfxdecode", "palette", 1x4bit_2x4bit)
r29305r29306
17581789   MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
17591790   MCFG_SCREEN_SIZE(320, 240)
17601791   MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1 -8)
1761   MCFG_SCREEN_UPDATE_DRIVER(kaneko16_berlwall_state, screen_update_kaneko16)
1792   MCFG_SCREEN_UPDATE_DRIVER(kaneko16_state, screen_update_kaneko16)
17621793   MCFG_SCREEN_PALETTE("palette")
17631794
17641795   MCFG_GFXDECODE_ADD("gfxdecode", "palette", 1x4bit_1x4bit)
17651796   MCFG_PALETTE_ADD("palette", 2048)
17661797   MCFG_PALETTE_FORMAT(xGGGGGRRRRRBBBBB)
1767
1798   
17681799   MCFG_DEVICE_ADD("view2_0", KANEKO_TMAP, 0)
17691800   kaneko_view2_tilemap_device::set_gfx_region(*device, 1);
17701801   kaneko_view2_tilemap_device::set_offset(*device, 0x33, 0x8, 320, 240);
r29305r29306
18211852   MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
18221853   MCFG_SCREEN_SIZE(320, 240)
18231854   MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1)
1824   MCFG_SCREEN_UPDATE_DRIVER(kaneko16_berlwall_state, screen_update_kaneko16)
1855   MCFG_SCREEN_UPDATE_DRIVER(kaneko16_state, screen_update_kaneko16)
18251856   MCFG_SCREEN_PALETTE("palette")
18261857
18271858   MCFG_GFXDECODE_ADD("gfxdecode", "palette", 1x8bit_2x4bit)
r29305r29306
19431974   MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
19441975   MCFG_SCREEN_SIZE(256, 256)
19451976   MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 0+16, 256-16-1)
1946   MCFG_SCREEN_UPDATE_DRIVER(kaneko16_berlwall_state, screen_update_kaneko16)
1977   MCFG_SCREEN_UPDATE_DRIVER(kaneko16_state, screen_update_kaneko16)
19471978   MCFG_SCREEN_PALETTE("palette")
19481979
19491980   MCFG_GFXDECODE_ADD("gfxdecode", "palette", 1x4bit_2x4bit)
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20702101   MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
20712102   MCFG_SCREEN_SIZE(320, 240)
20722103   MCFG_SCREEN_VISIBLE_AREA(40, 296-1, 16, 240-1)
2073   MCFG_SCREEN_UPDATE_DRIVER(kaneko16_berlwall_state, screen_update_kaneko16)
2104   MCFG_SCREEN_UPDATE_DRIVER(kaneko16_state, screen_update_kaneko16)
20742105   MCFG_SCREEN_PALETTE("palette")
20752106   MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
20762107
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22132244}
22142245
22152246
2247
2248
22162249/***************************************************************************
22172250
22182251                                Bakuretsu Breaker
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24862519ROM_END
24872520
24882521
2522
2523
24892524/***************************************************************************
24902525
24912526                            Blaze On (Japan version)
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38543889GAME( 1991, berlwall, 0,        berlwall, berlwall, kaneko16_berlwall_state, berlwall, ROT0,  "Kaneko", "The Berlin Wall", 0 )
38553890GAME( 1991, berlwallt,berlwall, berlwall, berlwalt, kaneko16_berlwall_state, berlwall, ROT0,  "Kaneko", "The Berlin Wall (bootleg ?)", 0 )
38563891
3892
3893
38573894GAME( 1991, mgcrystl, 0,        mgcrystl, mgcrystl, kaneko16_state,          kaneko16, ROT0,  "Kaneko", "Magical Crystals (World, 92/01/10)", 0 )
38583895GAME( 1991, mgcrystlo,mgcrystl, mgcrystl, mgcrystl, kaneko16_state,          kaneko16, ROT0,  "Kaneko", "Magical Crystals (World, 91/12/10)", 0 )
38593896GAME( 1991, mgcrystlj,mgcrystl, mgcrystl, mgcrystl, kaneko16_state,          kaneko16, ROT0,  "Kaneko (Atlus license)", "Magical Crystals (Japan, 92/01/13)", 0 )
shelves/new_menus/src/mame/drivers/vlc.c
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132132#include "emu.h"
133133#include "cpu/m68000/m68000.h"
134134#include "machine/mc68681.h"
135#include "machine/nvram.h"
135136#include "video/mc6845.h"
136137#include "sound/ay8910.h"
137138#include "machine/msm6242.h"
138139#include "machine/microtch.h"
139#include "mcfglgcy.h"
140140
141141
142142/***************************************************************************
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156156      m_duart40_68681(*this, "duart40_68681"),
157157      m_maincpu(*this,"maincpu"),
158158      m_microtouch(*this,"microtouch"),
159         m_nvram(*this, "nvram"),
160         m_backup(*this, "backup")
159      m_nvram(*this,"nvram"),
160      m_ram62256(*this, "ram62256"),
161      m_backup(*this, "backup")
161162      { }
162163
163164   required_device<mc68681_device> m_duart18_68681;
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166167
167168   required_device<cpu_device> m_maincpu;
168169   optional_device<microtouch_serial_device> m_microtouch;
170   required_device<nvram_device> m_nvram;
169171
170   required_shared_ptr<UINT16> m_nvram;
172   required_shared_ptr<UINT16> m_ram62256;
171173   required_shared_ptr<UINT16> m_backup;
172174
175   void nvram_init(nvram_device &nvram, void *data, size_t size);
176
173177   UINT16  m_datA40000;
174178
175179      //UINT8* m_videoram;
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190194   DECLARE_WRITE16_MEMBER (io_board_x);
191195   DECLARE_READ16_MEMBER( nevada_sec_r );
192196   DECLARE_WRITE16_MEMBER( nevada_sec_w );
193   virtual void machine_reset();
194197
198   DECLARE_MACHINE_START(nevada);
195199   DECLARE_DRIVER_INIT(nevada);
196200};
197201
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320324/********************   NVRAM SECTION   ************************************/
321325/***************************************************************************/
322326
323static  NVRAM_HANDLER( nevada )
327void nevada_state::nvram_init(nvram_device &nvram, void *data, size_t size)
324328{
325   nevada_state *state = machine.driver_data<nevada_state>();
326   if (read_or_write)
327      file->write(state->m_nvram,state->m_nvram.bytes());
328   else
329   {
330      if (file)
331         file->read(state->m_nvram,state->m_nvram.bytes());
332      else
333      {
334         UINT16* defaultram = (UINT16 *) state->memregion("defaults")->base();
335         memset(state->m_nvram,0x00,state->m_nvram.bytes());
336         if (defaultram) memcpy(state->m_nvram, state->memregion("defaults")->base(), state->memregion("defaults")->bytes());
337      }
338   }
329   memset(data, 0x00, size);
330   if (memregion("defaults")->base())
331      memcpy(data, memregion("defaults")->base(), memregion("defaults")->bytes());
339332}
340333
334
341335/***************************************************************************
342336
343337    U18 MC68681 RS232 UART  SIDEA = MODEM 1200 Baud
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526520*/
527521/***************************************************************************/
528522static ADDRESS_MAP_START( nevada_map, AS_PROGRAM, 16,nevada_state )
529   AM_RANGE(0x00000000, 0x0000ffff) AM_RAM AM_SHARE("nvram")
523   AM_RANGE(0x00000000, 0x0000ffff) AM_RAM AM_SHARE("ram62256")
530524   AM_RANGE(0x00010000, 0x00021fff) AM_RAM AM_SHARE("backup")
531525   AM_RANGE(0x00900000, 0x00900001) AM_DEVWRITE8("crtc",mc6845_device, address_w,0x00ff )
532526   AM_RANGE(0x00908000, 0x00908001) AM_DEVWRITE8("crtc",mc6845_device,register_w,0x00ff )
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594588
595589/***************************************************************************/
596590/*************************
597*     Machine Reset      *
591*     Machine start      *
598592*************************/
599593
600   void nevada_state::machine_reset()
594MACHINE_START_MEMBER(nevada_state, nevada)
601595{
596   m_nvram->set_base(m_ram62256, 0x1000);
602597}
598
603599/***************************************************************************/
604600
605601/*************************
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614610
615611   MCFG_WATCHDOG_TIME_INIT(attotime::from_msec(150))   /* 150ms Ds1232 TD to Ground */
616612
613   MCFG_MACHINE_START_OVERRIDE(nevada_state, nevada)
617614
618   MCFG_NVRAM_HANDLER(nevada)
615   MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram", nevada_state, nvram_init)
619616
620617   // video hardware
621618   MCFG_SCREEN_ADD("screen", RASTER)
shelves/new_menus/src/mame/drivers/famibox.c
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272272   };
273273
274274
275   for (int i = 0; i < sizeof(famicombox_banks)/sizeof(famicombox_banks[0]); i++ )
275   for (int i = 0; i < ARRAY_LENGTH(famicombox_banks); i++ )
276276   {
277277      if ( bank == famicombox_banks[i].bank ||
278278            famicombox_banks[i].bank == 0 )
shelves/new_menus/src/mame/drivers/twinkle.c
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854854   }
855855}
856856
857static const rtc65271_interface twinkle_rtc =
858{
859   DEVCB_NULL
860};
861857
862858static MACHINE_CONFIG_START( twinkle, twinkle_state )
863859   /* basic machine hardware */
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883879   MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
884880   MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(twinkle_state, ide_interrupt))
885881
886   MCFG_RTC65271_ADD("rtc", twinkle_rtc)
882   MCFG_DEVICE_ADD("rtc", RTC65271, 0)
887883
888884   /* video hardware */
889885   MCFG_PSXGPU_ADD( "maincpu", "gpu", CXD8561Q, 0x200000, XTAL_53_693175MHz )
shelves/new_menus/src/mame/drivers/mjkjidai.c
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2525#include "cpu/z80/z80.h"
2626#include "sound/sn76496.h"
2727#include "includes/mjkjidai.h"
28#include "mcfglgcy.h"
2928
3029/* Start of ADPCM custom chip code */
3130
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133132
134133   res |= (ioport("IN3")->read() & 0xc0);
135134
136   if (m_nvram_init_count)
137   {
138      m_nvram_init_count--;
139      res &= 0xbf;
140   }
141
142135   return res;
143136}
144137
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153146   }
154147}
155148
156static NVRAM_HANDLER( mjkjidai )
157{
158   mjkjidai_state *state = machine.driver_data<mjkjidai_state>();
159149
160   if (read_or_write)
161      file->write(state->m_nvram, state->m_nvram.bytes());
162   else if (file)
163      file->read(state->m_nvram, state->m_nvram.bytes());
164   else
165   {
166      state->m_nvram_init_count = 1;
167   }
168}
169
170
171
172150static ADDRESS_MAP_START( mjkjidai_map, AS_PROGRAM, 8, mjkjidai_state )
173151   AM_RANGE(0x0000, 0x7fff) AM_ROM
174152   AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
175153   AM_RANGE(0xc000, 0xcfff) AM_RAM
176   AM_RANGE(0xd000, 0xdfff) AM_RAM AM_SHARE("nvram")   // cleared and initialized on startup if bit 6 if port 00 is 0
154   AM_RANGE(0xd000, 0xdfff) AM_RAM AM_SHARE("nvram")   // cleared and initialized on startup if bit 6 of port 00 is 0
177155   AM_RANGE(0xe000, 0xe01f) AM_RAM AM_SHARE("spriteram1")          // shared with tilemap ram
178156   AM_RANGE(0xe800, 0xe81f) AM_RAM AM_SHARE("spriteram2")      // shared with tilemap ram
179157   AM_RANGE(0xf000, 0xf01f) AM_RAM AM_SHARE("spriteram3")      // shared with tilemap ram
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385363   MCFG_CPU_IO_MAP(mjkjidai_io_map)
386364   MCFG_CPU_VBLANK_INT_DRIVER("screen", mjkjidai_state,  vblank_irq)
387365
388   MCFG_NVRAM_HANDLER(mjkjidai)
366   MCFG_NVRAM_ADD_NO_FILL("nvram")
389367
390368   /* video hardware */
391369   MCFG_SCREEN_ADD("screen", RASTER)
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442420
443421   ROM_REGION( 0x8000, "adpcm", 0 )    /* ADPCM samples */
444422   ROM_LOAD( "mkj-40.14c",   0x00000, 0x8000, CRC(4d8fcc4a) SHA1(24c2b8031367035c89c6649a084bce0714f3e8d4) )
423
424   ROM_REGION( 0x1000, "nvram", 0 )    /* preformatted NVRAM */
425   ROM_LOAD( "default.nv",   0x00000, 0x1000, CRC(eccc0263) SHA1(679010f096536e8bb572551e9d0776cad72145e2) )
445426ROM_END
446427
447428
shelves/new_menus/src/mame/drivers/skylncr.c
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11341134  5x HM6116L-120
11351135
11361136  One extra ROM (u48) is blank.
1137  Sure is the one that store the palette at offset $C000.
1137  Sure is the one that store the palette at offset $C000,
1138  among the missing graphics.
11381139
1139  Also suspect that graphics ROMs are underdumped since
1140  they lack of at least 4 extra big girl pictures.
1140  Also graphics ROMs are half the standard size and
1141  they lack of at least 4 extra big girl pictures.
11411142
11421143  BP 170 to see the palette registers...
11431144
11441145*/
11451146ROM_START( sstar97 )
11461147   ROM_REGION( 0x80000, "maincpu", 0 )
1147   ROM_LOAD( "27256.u15",    0x0000, 0x8000, BAD_DUMP CRC(a5da4f92) SHA1(82ac70bd379649f130db017aa226d0247db0f3cd) )   // underdump?
1148   ROM_LOAD( "27256.u15",    0x0000, 0x8000, CRC(a5da4f92) SHA1(82ac70bd379649f130db017aa226d0247db0f3cd) )
11481149   ROM_LOAD( "unknown.u48",  0x8000, 0x8000, BAD_DUMP CRC(9f4c02e3) SHA1(05975184130ea7dd3bb5d32eff77b585bd53e6b5) )   // palette borrowed from other game
11491150
1150   ROM_REGION( 0x40000, "gfx1", 0 )
1151   ROM_REGION( 0x40000, "gfx1", 0 )   // all ROMs are 28-pins 27512
11511152   ROM_LOAD16_BYTE( "bor_dun_4.u23", 0x00000, 0x10000, CRC(82c9db19) SHA1(3611fb59bb7c962c7fabe7a29fa72b632fa69bed) )
11521153   ROM_LOAD16_BYTE( "bor_dun_2.u25", 0x00001, 0x10000, CRC(42ee9b7a) SHA1(b39f677f58072ea7dcd7f49208be1a7b70bdc5e5) )
11531154   ROM_LOAD16_BYTE( "bor_dun_3.u24", 0x20000, 0x10000, CRC(6d70879b) SHA1(83cbe67cda95e5f3d95065015f6b1b2044b88989) )
11541155   ROM_LOAD16_BYTE( "bor_dun_1.u26", 0x20001, 0x10000, CRC(1b8b84ac) SHA1(b914bad0b1fb58cf581d1227e8127c6afb906fb7) )
11551156
1156   ROM_REGION( 0x40000, "gfx2", 0 )
1157   ROM_REGION( 0x40000, "gfx2", 0 )   // all ROMs are 28-pins 27512
11571158   ROM_LOAD16_BYTE( "bor_dun_8.u19", 0x00000, 0x10000, CRC(daf651a7) SHA1(d4e472aa90aa2b52c997b2f2272007b139e3cbc2) )
11581159   ROM_LOAD16_BYTE( "bor_dun_6.u21", 0x00001, 0x10000, CRC(1d88bc70) SHA1(49246d96a4ce2b8e9b10e928d7dd13973feac883) )
11591160   ROM_LOAD16_BYTE( "bor_dun_7.u20", 0x20000, 0x10000, CRC(7e28ba2f) SHA1(ac8d4e95efce87456f569a71650bd7afcb59095e) )
shelves/new_menus/src/mame/drivers/skydiver.c
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116116{
117117   int i;
118118
119   for (i = 0; i < sizeof(colortable_source) / sizeof(colortable_source[0]); i++)
119   for (i = 0; i < ARRAY_LENGTH(colortable_source); i++)
120120   {
121121      rgb_t color;
122122
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389389   MCFG_SCREEN_PALETTE("palette")
390390
391391   MCFG_GFXDECODE_ADD("gfxdecode", "palette", skydiver)
392   MCFG_PALETTE_ADD("palette", sizeof(colortable_source) / sizeof(colortable_source[0]))
392   MCFG_PALETTE_ADD("palette", ARRAY_LENGTH(colortable_source))
393393   MCFG_PALETTE_INIT_OWNER(skydiver_state, skydiver)
394394
395395
shelves/new_menus/src/mame/drivers/deco_ld.c
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175175
176176   for(i=0;i<0x20;i+=4)
177177   {
178      if(!spriteram[i+0] & 1)
178      if(~spriteram[i+0] & 1)
179179         continue;
180180
181181      spr_offs = spriteram[i+1]|tile_bank;
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190190
191191   for(i=0x3e0;i<0x400;i+=4)
192192   {
193      if(!spriteram[i+0] & 1)
193      if(~spriteram[i+0] & 1)
194194         continue;
195195
196196      spr_offs = spriteram[i+1]|tile_bank;
shelves/new_menus/src/mame/drivers/psikyosh.c
r29305r29306
464464
465465      // HACK: read IPT_START1 from "INPUTS" to avoid listing it twice or having two independent STARTs listed
466466      int start_depressed = ~value & 0x01000000;
467      keys |= start_depressed ? 1 << (sizeof(key_codes)/sizeof(key_codes[0]) - 1) : 0; // and bung it in at the end
467      keys |= start_depressed ? 1 << (ARRAY_LENGTH(key_codes) - 1) : 0; // and bung it in at the end
468468
469469      value |= 0xFFFF0000; // set top word
470470      do {
471471         // since we can't handle multiple keys, just return the first one depressed
472         if((keys & which_key) && (count < sizeof(key_codes)/sizeof(key_codes[0]))) {
472         if((keys & which_key) && (count < ARRAY_LENGTH(key_codes))) {
473473            value &= ~((UINT32)(key_codes[count]) << 16); // mask in selected word as IP_ACTIVE_LOW
474474            break;
475475         }
shelves/new_menus/src/mame/drivers/dblcrown.c
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11// license:MAME
2// copyright-holders:Angelo Salese
2// copyright-holders: Angelo Salese, Roberto Fresca.
33/***************************************************************************
44
55    Double Crown (c) 1997 Cadence Technology / Dyna
66
7    driver by Angelo Salese
7    Driver by Angelo Salese
8   Additional work by Roberto Fresca.
89
910    TODO:
1011    - Bogus "Hole" in main screen display;
1112    - Is the background pen really black?
1213    - Lots of unmapped I/Os (game doesn't make much use of the HW);
13    - outputs / lamps;
1414    - video / irq timings;
1515
1616    Notes:
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2222      these ...
2323
2424============================================================================
25
2526    Excellent System
2627    boardlabel: ES-9411B
2728
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3334    2 * N341256P-25 - CMOS SRAM 256K-BIT(32KX8)
3435    4 * dipsw 8pos
3536    YMZ284-D (ay8910, but without i/o ports)
36    MAXIM MAX693ACPE is a "Microprocessor Supervisory Circuit", for watchdog? and for keeping nvram stable?
37    MAXIM MAX693ACPE is a "Microprocessor Supervisory Circuit", for watchdog
38   and for nvram functions.
3739
3840***************************************************************************/
3941
4042
43#define MAIN_CLOCK         XTAL_28_63636MHz
44#define CPU_CLOCK         MAIN_CLOCK / 6
45#define SND_CLOCK         MAIN_CLOCK / 12
46
4147#include "emu.h"
4248#include "cpu/z80/z80.h"
4349#include "sound/ay8910.h"
4450#include "machine/nvram.h"
4551
46#define MAIN_CLOCK XTAL_28_63636MHz
47
52#include "dblcrown.lh"
4853#define DEBUG_VRAM
4954
5055class dblcrown_state : public driver_device
r29305r29306
9095   DECLARE_WRITE8_MEMBER(output_w);
9196   DECLARE_READ8_MEMBER(lamps_r);
9297   DECLARE_WRITE8_MEMBER(lamps_w);
98   DECLARE_WRITE8_MEMBER(watchdog_w);
9399
94100   TIMER_DEVICE_CALLBACK_MEMBER(dblcrown_irq_scanline);
95101   DECLARE_PALETTE_INIT(dblcrown);
102
96103protected:
97104   // driver_device overrides
98105   virtual void machine_start();
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103110
104111void dblcrown_state::video_start()
105112{
106   m_pal_ram = auto_alloc_array(machine(), UINT8, 0x200*2);
107   m_vram = auto_alloc_array(machine(), UINT8, 0x1000*0x10);
113   m_pal_ram = auto_alloc_array(machine(), UINT8, 0x200 * 2);
114   m_vram = auto_alloc_array(machine(), UINT8, 0x1000 * 0x10);
108115
109   save_pointer(NAME(m_vram), 0x1000*0x10);
116   save_pointer(NAME(m_vram), 0x1000 * 0x10);
110117}
111118
112119UINT32 dblcrown_state::screen_update( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect )
r29305r29306
118125
119126   count = 0xa000;
120127
121   for (y=0;y<16;y++)
128   for (y = 0; y < 16; y++)
122129   {
123      for (x=0;x<32;x++)
130      for (x = 0; x < 32; x++)
124131      {
125         UINT16 tile = ((m_vram[count])|(m_vram[count+1]<<8)) & 0xfff;
132         UINT16 tile = ((m_vram[count]) | (m_vram[count+1] << 8)) & 0xfff;
126133         UINT8 col = (m_vram[count+1] >> 4);
127134
128         gfx_2->opaque(bitmap,cliprect,tile,col,0,0,x*16,y*16);
135         gfx_2->opaque(bitmap, cliprect, tile, col, 0, 0, x * 16, y * 16);
129136
130         count+=2;
137         count += 2;
131138      }
132139   }
133140
134141   count = 0xb000;
135142
136   for (y=0;y<32;y++)
143   for (y = 0; y < 32; y++)
137144   {
138      for (x=0;x<64;x++)
145      for (x = 0; x < 64; x++)
139146      {
140         UINT16 tile = ((m_vram[count])|(m_vram[count+1]<<8)) & 0xfff;
141         UINT8 col = (m_vram[count+1] >> 4); // ok?
147         UINT16 tile = ((m_vram[count]) | (m_vram[count + 1] << 8)) & 0xfff;
148         UINT8 col = (m_vram[count + 1] >> 4); // ok?
142149
143         gfx->transpen(bitmap,cliprect,tile,col,0,0,x*8,y*8,0);
150         gfx->transpen(bitmap, cliprect, tile, col, 0, 0, x * 8, y * 8, 0);
144151
145         count+=2;
152         count += 2;
146153      }
147154   }
148155
149
150156   return 0;
151157}
152158
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187193   //  offset+=0x200;
188194
189195   m_pal_ram[offset] = data;
190   offset>>=1;
191   datax = m_pal_ram[offset*2] + 256*m_pal_ram[offset*2 + 1];
196   offset >>= 1;
197   datax = m_pal_ram[offset * 2] + 256 * m_pal_ram[offset * 2 + 1];
192198
193   r = ((datax)&0x000f)>>0;
194   g = ((datax)&0x00f0)>>4;
195   b = ((datax)&0x0f00)>>8;
199   r = ((datax) & 0x000f) >> 0;
200   g = ((datax) & 0x00f0) >> 4;
201   b = ((datax) & 0x0f00) >> 8;
196202   /* TODO: remaining bits */
197203
198204   m_palette->set_pen_color(offset, pal4bit(r), pal4bit(g), pal4bit(b));
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255261
256262   res = 0;
257263
258   for(i=0;i<4;i++)
264   for(i = 0; i < 4; i++)
259265   {
260266      if(m_mux_data & 1 << i)
261267         res |= ioport(muxnames[i])->read();
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272278
273279   res = 0xff;
274280
275   for(i=0;i<4;i++)
281   for(i = 0; i < 4; i++)
276282   {
277283      if(ioport(muxnames[i])->read() != 0xff)
278284         res &= ~(1 << i);
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283289
284290WRITE8_MEMBER( dblcrown_state::output_w )
285291{
286   // bit 4: coin counter
292/*  bits
293  7654 3210
294  ---- -x--  unknown (active after deal)
295  ---- x---  Payout counter pulse
296  ---x ----  Coin In counter pulse
297  -x-- ----  unknown (active after deal)
298  x-x- --xx  unknown
299*/
287300
288   //popmessage("%02x",data);
301   coin_counter_w(machine(), 0, data & 0x10);   /* Coin In counter pulse */
302   coin_counter_w(machine(), 1 ,data & 0x08);   /* Payout counter pulse */
303//   popmessage("out: %02x", data);
289304}
290305
291306
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296311
297312WRITE8_MEMBER( dblcrown_state::lamps_w )
298313{
299   //popmessage("%02x",data);
314/*  bits
315  7654 3210
316  ---- ---x  Deal
317  ---- --x-  Bet
318  ---- -x--  Cancel
319  ---- x---  Hold 5
320  ---x ----  Hold 4
321  --x- ----  Hold 3
322  -x-- ----  Hold 2
323  x--- ----  Hold 1
324*/
325   output_set_lamp_value(0, (data) & 1);       /* Deal */
326   output_set_lamp_value(1, (data >> 1) & 1);  /* Bet */
327   output_set_lamp_value(2, (data >> 2) & 1);  /* Cancel */
328   output_set_lamp_value(3, (data >> 3) & 1);  /* Hold 5 */
329   output_set_lamp_value(4, (data >> 4) & 1);  /* Hold 4 */
330   output_set_lamp_value(5, (data >> 5) & 1);  /* Hold 3 */
331   output_set_lamp_value(6, (data >> 6) & 1);  /* Hold 2 */
332   output_set_lamp_value(7, (data >> 7) & 1);  /* Hold 1 */
333
300334   m_lamps_data = data;
301335}
302336
337WRITE8_MEMBER(dblcrown_state::watchdog_w)
338/*
339  Always 0x01...
340*/
341{
342   if (data & 0x01)      /* check for refresh value (0x01) */
343   {
344      machine().watchdog_reset();
345   }
346   else
347   {
348      popmessage("Watchdog: %02x", data);
349   }
350}
351
352
303353static ADDRESS_MAP_START( dblcrown_map, AS_PROGRAM, 8, dblcrown_state )
304354   ADDRESS_MAP_UNMAP_HIGH
305355   AM_RANGE(0x0000, 0x7fff) AM_ROM
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324374   AM_RANGE(0x03, 0x03) AM_READ_PORT("DSWD")
325375   AM_RANGE(0x04, 0x04) AM_READ(in_mux_r)
326376   AM_RANGE(0x05, 0x05) AM_READ(in_mux_type_r)
327   AM_RANGE(0x10, 0x10) AM_READWRITE(lamps_r,lamps_w)
328   AM_RANGE(0x11, 0x11) AM_READWRITE(bank_r,bank_w)
329   AM_RANGE(0x12, 0x12) AM_READWRITE(mux_r,mux_w)
377   AM_RANGE(0x10, 0x10) AM_READWRITE(lamps_r, lamps_w)
378   AM_RANGE(0x11, 0x11) AM_READWRITE(bank_r, bank_w)
379   AM_RANGE(0x12, 0x12) AM_READWRITE(mux_r, mux_w)
330380   AM_RANGE(0x20, 0x21) AM_DEVWRITE("aysnd", ay8910_device, address_data_w)
331//  AM_RANGE(0x30, 0x30) always 1?
381   AM_RANGE(0x30, 0x30) AM_WRITE(watchdog_w)
332382   AM_RANGE(0x40, 0x40) AM_WRITE(output_w)
333383ADDRESS_MAP_END
334384
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379429   PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
380430   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
381431   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
382   PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
383   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
384   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
432   PORT_DIPNAME( 0x20, 0x20, "Hold Type" )
433   PORT_DIPSETTING(    0x20, "Hold" )
434   PORT_DIPSETTING(    0x00, "Discard" )
385435   PORT_DIPNAME( 0x40, 0x40, "Input Test" )
386436   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
387437   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
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561611static MACHINE_CONFIG_START( dblcrown, dblcrown_state )
562612
563613   /* basic machine hardware */
564   MCFG_CPU_ADD("maincpu",Z80,MAIN_CLOCK/6)
614   MCFG_CPU_ADD("maincpu", Z80, CPU_CLOCK)
565615   MCFG_CPU_PROGRAM_MAP(dblcrown_map)
566616   MCFG_CPU_IO_MAP(dblcrown_io)
567617   MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", dblcrown_state, dblcrown_irq_scanline, "screen", 0, 1)
618   MCFG_WATCHDOG_TIME_INIT(attotime::from_msec(1000))   /* 1000 ms. (minimal of MAX693A watchdog long timeout period with internal oscillator) */
568619
569620   /* video hardware */
570621   MCFG_SCREEN_ADD("screen", RASTER)
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584635
585636   /* sound hardware */
586637   MCFG_SPEAKER_STANDARD_MONO("mono")
587   MCFG_SOUND_ADD("aysnd", AY8910, MAIN_CLOCK/12)
638   MCFG_SOUND_ADD("aysnd", AY8910, SND_CLOCK)
588639   MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
589640MACHINE_CONFIG_END
590641
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611662   ROM_LOAD("palce16v8h.u39", 0x0000, 0x0117, CRC(c74231ee) SHA1(f1b9e98f1fde53eee64d5da38fb8a6c22b6333e2) )
612663ROM_END
613664
614GAME( 1997, dblcrown,  0,   dblcrown,  dblcrown,  driver_device, 0,       ROT0, "Cadence Technology",  "Double Crown (v1.0.3)", GAME_IMPERFECT_GRAPHICS ) // 1997 DYNA copyright in tile GFX
665
666/*     YEAR  NAME      PARENT    MACHINE   INPUT     STATE          INIT   ROT    COMPANY                FULLNAME                FLAGS                    LAYOUT  */
667GAMEL( 1997, dblcrown, 0,        dblcrown, dblcrown, driver_device, 0,     ROT0, "Cadence Technology",  "Double Crown (v1.0.3)", GAME_IMPERFECT_GRAPHICS, layout_dblcrown ) // 1997 DYNA copyright in tile GFX
shelves/new_menus/src/mame/drivers/seicross.c
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4848#include "sound/ay8910.h"
4949#include "sound/dac.h"
5050#include "includes/seicross.h"
51#include "mcfglgcy.h"
5251
53static NVRAM_HANDLER( seicross )
54{
55   seicross_state *state = machine.driver_data<seicross_state>();
56   UINT8 *nvram = state->m_nvram;
57   size_t nvram_size = state->m_nvram.bytes();
5852
59   if (read_or_write)
60      file->write(nvram,nvram_size);
61   else
62   {
63      if (file)
64         file->read(nvram,nvram_size);
65      else
66      {
67         /* fill in the default values */
68         memset(nvram,0,nvram_size);
69         nvram[0x0d] = nvram[0x0f] = nvram[0x11] = nvram[0x13] = nvram[0x15] = nvram[0x19] = 1;
70         nvram[0x17] = 3;
71      }
72   }
53void seicross_state::nvram_init(nvram_device &nvram, void *data, size_t size)
54{
55   static const UINT8 init[32] = {
56      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
57      0, 1, 0, 1, 0, 1, 0, 3, 0, 1, 0, 0, 0, 0, 0, 0, };
58   
59   memset(data, 0x00, size);
60   memcpy(data, init, sizeof(init));
7361}
7462
75
76
7763void seicross_state::machine_reset()
7864{
7965   /* start with the protection mcu halted */
r29305r29306
395381}
396382
397383
398static MACHINE_CONFIG_START( nvram, seicross_state )
384static MACHINE_CONFIG_START( no_nvram, seicross_state )
399385
400386   /* basic machine hardware */
401387   MCFG_CPU_ADD("maincpu", Z80, 3072000)   /* 3.072 MHz? */
r29305r29306
404390   MCFG_CPU_VBLANK_INT_DRIVER("screen", seicross_state,  vblank_irq)
405391
406392   MCFG_CPU_ADD("mcu", NSC8105, 3072000)   /* ??? */
407   MCFG_CPU_PROGRAM_MAP(mcu_nvram_map)
393   MCFG_CPU_PROGRAM_MAP(mcu_no_nvram_map)
408394
409395   MCFG_QUANTUM_TIME(attotime::from_hz(1200))  /* 20 CPU slices per frame - an high value to ensure proper */
410396                  /* synchronization of the CPUs */
411   MCFG_NVRAM_HANDLER(seicross)
412397
413398   /* video hardware */
414399   MCFG_SCREEN_ADD("screen", RASTER)
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435420MACHINE_CONFIG_END
436421
437422
438static MACHINE_CONFIG_DERIVED( no_nvram, nvram )
423static MACHINE_CONFIG_DERIVED( nvram, no_nvram )
439424
440425   /* basic machine hardware */
441426   MCFG_CPU_MODIFY("mcu")
442   MCFG_CPU_PROGRAM_MAP(mcu_no_nvram_map)
427   MCFG_CPU_PROGRAM_MAP(mcu_nvram_map)
443428
444   MCFG_NVRAM_HANDLER(0)
429   MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram", seicross_state, nvram_init)
445430MACHINE_CONFIG_END
446431
447432
shelves/new_menus/src/mame/machine/3do.c
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164164   }
165165}
166166
167READ8_MEMBER(_3do_state::_3do_nvarea_r) { return m_nvram[offset]; }
168WRITE8_MEMBER(_3do_state::_3do_nvarea_w) { m_nvram[offset] = data; }
167READ8_MEMBER(_3do_state::_3do_nvarea_r) { return m_nvmem[offset]; }
168WRITE8_MEMBER(_3do_state::_3do_nvarea_w) { m_nvmem[offset] = data; }
169169
170170
171171
shelves/new_menus/src/tools/jedutil.c
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119119    CONSTANTS
120120***************************************************************************/
121121
122#define ARRAY_LEN(_array) (sizeof(_array) / sizeof(_array[0]))
123
124122#define NO_OUTPUT_ENABLE_FUSE_ROW 0xFFFF
125123
126124/* Output pin flags */
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18731871
18741872static pal_data paldata[] = {
18751873   {"PAL10L8", 320,
1876      pal10l8pinfuserows, ARRAY_LEN(pal10l8pinfuserows),
1877      pal10l8pinfusecolumns, ARRAY_LEN(pal10l8pinfusecolumns),
1874      pal10l8pinfuserows, ARRAY_LENGTH(pal10l8pinfuserows),
1875      pal10l8pinfusecolumns, ARRAY_LENGTH(pal10l8pinfusecolumns),
18781876      print_pal10l8_product_terms,
18791877      config_pal10l8_pins,
18801878      NULL,
18811879      NULL},
18821880   {"PAL10H8", 320,
1883      pal10h8pinfuserows, ARRAY_LEN(pal10h8pinfuserows),
1884      pal10h8pinfusecolumns, ARRAY_LEN(pal10h8pinfusecolumns),
1881      pal10h8pinfuserows, ARRAY_LENGTH(pal10h8pinfuserows),
1882      pal10h8pinfusecolumns, ARRAY_LENGTH(pal10h8pinfusecolumns),
18851883      print_pal10h8_product_terms,
18861884      config_pal10h8_pins,
18871885      NULL,
18881886      NULL},
18891887   {"PAL12H6", 384,
1890      pal12h6pinfuserows, ARRAY_LEN(pal12h6pinfuserows),
1891      pal12h6pinfusecolumns, ARRAY_LEN(pal12h6pinfusecolumns),
1888      pal12h6pinfuserows, ARRAY_LENGTH(pal12h6pinfuserows),
1889      pal12h6pinfusecolumns, ARRAY_LENGTH(pal12h6pinfusecolumns),
18921890      print_pal12h6_product_terms,
18931891      config_pal12h6_pins,
18941892      NULL,
18951893      NULL},
18961894   {"PAL14H4", 448,
1897      pal14h4pinfuserows, ARRAY_LEN(pal14h4pinfuserows),
1898      pal14h4pinfusecolumns, ARRAY_LEN(pal14h4pinfusecolumns),
1895      pal14h4pinfuserows, ARRAY_LENGTH(pal14h4pinfuserows),
1896      pal14h4pinfusecolumns, ARRAY_LENGTH(pal14h4pinfusecolumns),
18991897      print_pal14h4_product_terms,
19001898      config_pal14h4_pins,
19011899      NULL,
19021900      NULL},
19031901   {"PAL16H2", 512,
1904      pal16h2pinfuserows, ARRAY_LEN(pal16h2pinfuserows),
1905      pal16h2pinfusecolumns, ARRAY_LEN(pal16h2pinfusecolumns),
1902      pal16h2pinfuserows, ARRAY_LENGTH(pal16h2pinfuserows),
1903      pal16h2pinfusecolumns, ARRAY_LENGTH(pal16h2pinfusecolumns),
19061904      print_pal16h2_product_terms,
19071905      config_pal16h2_pins,
19081906      NULL,
19091907      NULL},
19101908   {"PAL16C1", 512,
1911      pal16c1pinfuserows, ARRAY_LEN(pal16c1pinfuserows),
1912      pal16c1pinfusecolumns, ARRAY_LEN(pal16c1pinfusecolumns),
1909      pal16c1pinfuserows, ARRAY_LENGTH(pal16c1pinfuserows),
1910      pal16c1pinfusecolumns, ARRAY_LENGTH(pal16c1pinfusecolumns),
19131911      print_pal16c1_product_terms,
19141912      config_pal16c1_pins,
19151913      NULL,
19161914      NULL},
19171915   {"PAL12L6", 384,
1918      pal12l6pinfuserows, ARRAY_LEN(pal12l6pinfuserows),
1919      pal12l6pinfusecolumns, ARRAY_LEN(pal12l6pinfusecolumns),
1916      pal12l6pinfuserows, ARRAY_LENGTH(pal12l6pinfuserows),
1917      pal12l6pinfusecolumns, ARRAY_LENGTH(pal12l6pinfusecolumns),
19201918      print_pal12l6_product_terms,
19211919      config_pal12l6_pins,
19221920      NULL,
19231921      NULL},
19241922   {"PAL14L4", 448,
1925      pal14l4pinfuserows, ARRAY_LEN(pal14l4pinfuserows),
1926      pal14l4pinfusecolumns, ARRAY_LEN(pal14l4pinfusecolumns),
1923      pal14l4pinfuserows, ARRAY_LENGTH(pal14l4pinfuserows),
1924      pal14l4pinfusecolumns, ARRAY_LENGTH(pal14l4pinfusecolumns),
19271925      print_pal14l4_product_terms,
19281926      config_pal14l4_pins,
19291927      NULL,
19301928      NULL},
19311929   {"PAL16L2", 512,
1932      pal16l2pinfuserows, ARRAY_LEN(pal16l2pinfuserows),
1933      pal16l2pinfusecolumns, ARRAY_LEN(pal16l2pinfusecolumns),
1930      pal16l2pinfuserows, ARRAY_LENGTH(pal16l2pinfuserows),
1931      pal16l2pinfusecolumns, ARRAY_LENGTH(pal16l2pinfusecolumns),
19341932      print_pal16l2_product_terms,
19351933      config_pal16l2_pins,
19361934      NULL,
19371935      NULL},
19381936   /*{"15S8", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
19391937   {"PAL16L8", 2048,
1940      pal16l8pinfuserows, ARRAY_LEN(pal16l8pinfuserows),
1941      pal16l8pinfusecolumns, ARRAY_LEN(pal16l8pinfusecolumns),
1938      pal16l8pinfuserows, ARRAY_LENGTH(pal16l8pinfuserows),
1939      pal16l8pinfusecolumns, ARRAY_LENGTH(pal16l8pinfusecolumns),
19421940      print_pal16l8_product_terms,
19431941      config_pal16l8_pins,
19441942      NULL,
19451943      NULL},
19461944   {"PAL16R4", 2048,
1947      pal16r4pinfuserows, ARRAY_LEN(pal16r4pinfuserows),
1948      pal16r4pinfusecolumns, ARRAY_LEN(pal16r4pinfusecolumns),
1945      pal16r4pinfuserows, ARRAY_LENGTH(pal16r4pinfuserows),
1946      pal16r4pinfusecolumns, ARRAY_LENGTH(pal16r4pinfusecolumns),
19491947      print_pal16r4_product_terms,
19501948      config_pal16r4_pins,
19511949      NULL,
19521950      NULL},
19531951   {"PAL16R6", 2048,
1954      pal16r6pinfuserows, ARRAY_LEN(pal16r6pinfuserows),
1955      pal16r6pinfusecolumns, ARRAY_LEN(pal16r6pinfusecolumns),
1952      pal16r6pinfuserows, ARRAY_LENGTH(pal16r6pinfuserows),
1953      pal16r6pinfusecolumns, ARRAY_LENGTH(pal16r6pinfusecolumns),
19561954      print_pal16r6_product_terms,
19571955      config_pal16r6_pins,
19581956      NULL,
19591957      NULL},
19601958   {"PAL16R8", 2048,
1961      pal16r8pinfuserows, ARRAY_LEN(pal16r8pinfuserows),
1962      pal16r8pinfusecolumns, ARRAY_LEN(pal16r8pinfusecolumns),
1959      pal16r8pinfuserows, ARRAY_LENGTH(pal16r8pinfuserows),
1960      pal16r8pinfusecolumns, ARRAY_LENGTH(pal16r8pinfusecolumns),
19631961      print_pal16r8_product_terms,
19641962      config_pal16r8_pins,
19651963      NULL,
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19671965   /*{"PAL16RA8", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
19681966   {"PAL16V8R", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
19691967   {"PALCE16V8", 2194,
1970      palce16v8pinfuserows, ARRAY_LEN(palce16v8pinfuserows),
1971      palce16v8pinfusecolumns, ARRAY_LEN(palce16v8pinfusecolumns),
1968      palce16v8pinfuserows, ARRAY_LENGTH(palce16v8pinfuserows),
1969      palce16v8pinfusecolumns, ARRAY_LENGTH(palce16v8pinfusecolumns),
19721970      print_palce16v8_product_terms,
19731971      config_palce16v8_pins,
19741972      NULL,
19751973      NULL},
19761974   {"GAL16V8", 2194,
1977      gal16v8pinfuserows, ARRAY_LEN(gal16v8pinfuserows),
1978      gal16v8pinfusecolumns, ARRAY_LEN(gal16v8pinfusecolumns),
1975      gal16v8pinfuserows, ARRAY_LENGTH(gal16v8pinfuserows),
1976      gal16v8pinfusecolumns, ARRAY_LENGTH(gal16v8pinfusecolumns),
19791977      print_gal16v8_product_terms,
19801978      config_gal16v8_pins,
19811979      is_gal16v8_product_term_enabled,
19821980      NULL},
19831981   {"18CV8", 2696,
1984      peel18cv8pinfuserows, ARRAY_LEN(peel18cv8pinfuserows),
1985      peel18cv8pinfusecolumns, ARRAY_LEN(peel18cv8pinfusecolumns),
1982      peel18cv8pinfuserows, ARRAY_LENGTH(peel18cv8pinfuserows),
1983      peel18cv8pinfusecolumns, ARRAY_LENGTH(peel18cv8pinfusecolumns),
19861984      print_peel18cv8_product_terms,
19871985      config_peel18cv8_pins,
19881986      NULL,
19891987      get_peel18cv8_pin_fuse_state},
19901988   {"GAL18V10", 3540,
1991      gal18v10pinfuserows, ARRAY_LEN(gal18v10pinfuserows),
1992      gal18v10pinfusecolumns, ARRAY_LEN(gal18v10pinfusecolumns),
1989      gal18v10pinfuserows, ARRAY_LENGTH(gal18v10pinfuserows),
1990      gal18v10pinfusecolumns, ARRAY_LENGTH(gal18v10pinfusecolumns),
19931991      print_gal18v10_product_terms,
19941992      config_gal18v10_pins,
19951993      NULL,
19961994      NULL},
19971995   {"PAL20L8", 2560,
1998      pal20l8pinfuserows, ARRAY_LEN(pal20l8pinfuserows),
1999      pal20l8pinfusecolumns, ARRAY_LEN(pal20l8pinfusecolumns),
1996      pal20l8pinfuserows, ARRAY_LENGTH(pal20l8pinfuserows),
1997      pal20l8pinfusecolumns, ARRAY_LENGTH(pal20l8pinfusecolumns),
20001998      print_pal20l8_product_terms,
20011999      config_pal20l8_pins,
20022000      NULL,
20032001      NULL},
20042002   {"PAL20L10", 1600,
2005      pal20l10pinfuserows, ARRAY_LEN(pal20l10pinfuserows),
2006      pal20l10pinfusecolumns, ARRAY_LEN(pal20l10pinfusecolumns),
2003      pal20l10pinfuserows, ARRAY_LENGTH(pal20l10pinfuserows),
2004      pal20l10pinfusecolumns, ARRAY_LENGTH(pal20l10pinfusecolumns),
20072005      print_pal20l10_product_terms,
20082006      config_pal20l10_pins,
20092007      NULL,
20102008      NULL},
20112009   {"PAL20R4", 2560,
2012      pal20r4pinfuserows, ARRAY_LEN(pal20r4pinfuserows),
2013      pal20r4pinfusecolumns, ARRAY_LEN(pal20r4pinfusecolumns),
2010      pal20r4pinfuserows, ARRAY_LENGTH(pal20r4pinfuserows),
2011      pal20r4pinfusecolumns, ARRAY_LENGTH(pal20r4pinfusecolumns),
20142012      print_pal20r4_product_terms,
20152013      config_pal20r4_pins,
20162014      NULL,
20172015      NULL},
20182016   {"PAL20R6", 2560,
2019      pal20r6pinfuserows, ARRAY_LEN(pal20r6pinfuserows),
2020      pal20r6pinfusecolumns, ARRAY_LEN(pal20r6pinfusecolumns),
2017      pal20r6pinfuserows, ARRAY_LENGTH(pal20r6pinfuserows),
2018      pal20r6pinfusecolumns, ARRAY_LENGTH(pal20r6pinfusecolumns),
20212019      print_pal20r6_product_terms,
20222020      config_pal20r6_pins,
20232021      NULL,
20242022      NULL},
20252023   {"PAL20R8", 2560,
2026      pal20r8pinfuserows, ARRAY_LEN(pal20r8pinfuserows),
2027      pal20r8pinfusecolumns, ARRAY_LEN(pal20r8pinfusecolumns),
2024      pal20r8pinfuserows, ARRAY_LENGTH(pal20r8pinfuserows),
2025      pal20r8pinfusecolumns, ARRAY_LENGTH(pal20r8pinfusecolumns),
20282026      print_pal20r8_product_terms,
20292027      config_pal20r8_pins,
20302028      NULL,
20312029      NULL},
20322030   {"PAL20X4", 1600,
2033      pal20x4pinfuserows, ARRAY_LEN(pal20x4pinfuserows),
2034      pal20x4pinfusecolumns, ARRAY_LEN(pal20x4pinfusecolumns),
2031      pal20x4pinfuserows, ARRAY_LENGTH(pal20x4pinfuserows),
2032      pal20x4pinfusecolumns, ARRAY_LENGTH(pal20x4pinfusecolumns),
20352033      print_pal20x4_product_terms,
20362034      config_pal20x4_pins,
20372035      NULL,
20382036      NULL},
20392037   {"PAL20X8", 1600,
2040      pal20x8pinfuserows, ARRAY_LEN(pal20x8pinfuserows),
2041      pal20x8pinfusecolumns, ARRAY_LEN(pal20x8pinfusecolumns),
2038      pal20x8pinfuserows, ARRAY_LENGTH(pal20x8pinfuserows),
2039      pal20x8pinfusecolumns, ARRAY_LENGTH(pal20x8pinfusecolumns),
20422040      print_pal20x8_product_terms,
20432041      config_pal20x8_pins,
20442042      NULL,
20452043      NULL},
20462044   {"PAL20X10", 1600,
2047      pal20x10pinfuserows, ARRAY_LEN(pal20x10pinfuserows),
2048      pal20x10pinfusecolumns, ARRAY_LEN(pal20x10pinfusecolumns),
2045      pal20x10pinfuserows, ARRAY_LENGTH(pal20x10pinfuserows),
2046      pal20x10pinfusecolumns, ARRAY_LENGTH(pal20x10pinfusecolumns),
20492047      print_pal20x10_product_terms,
20502048      config_pal20x10_pins,
20512049      NULL,
r29305r29306
20552053   {"GAL22V10", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},
20562054   {"PLS100", 0, NULL, 0, NULL, 0, NULL, NULL, NULL, NULL},*/
20572055   {"82S153", 1842,
2058      _82s153_pls153pinfuserows, ARRAY_LEN(_82s153_pls153pinfuserows),
2059      _82s153_pls153pinfusecolumns, ARRAY_LEN(_82s153_pls153pinfusecolumns),
2056      _82s153_pls153pinfuserows, ARRAY_LENGTH(_82s153_pls153pinfuserows),
2057      _82s153_pls153pinfusecolumns, ARRAY_LENGTH(_82s153_pls153pinfusecolumns),
20602058      print_82s153_pls153_product_terms,
20612059      config_82s153_pls153_pins,
20622060      NULL,
20632061      NULL},
20642062   {"PLS153", 1842,
2065      _82s153_pls153pinfuserows, ARRAY_LEN(_82s153_pls153pinfuserows),
2066      _82s153_pls153pinfusecolumns, ARRAY_LEN(_82s153_pls153pinfusecolumns),
2063      _82s153_pls153pinfuserows, ARRAY_LENGTH(_82s153_pls153pinfuserows),
2064      _82s153_pls153pinfusecolumns, ARRAY_LENGTH(_82s153_pls153pinfusecolumns),
20672065      print_82s153_pls153_product_terms,
20682066      config_82s153_pls153_pins,
20692067      NULL,
20702068      NULL},
20712069   {"CK2605", 1106,
2072      ck2605pinfuserows, ARRAY_LEN(ck2605pinfuserows),
2073      ck2605pinfusecolumns, ARRAY_LEN(ck2605pinfusecolumns),
2070      ck2605pinfuserows, ARRAY_LENGTH(ck2605pinfuserows),
2071      ck2605pinfusecolumns, ARRAY_LENGTH(ck2605pinfusecolumns),
20742072      print_ck2605_product_terms,
20752073      config_ck2605_pins,
20762074      NULL,
20772075      NULL},
20782076#if defined(ricoh_pals)
20792077   {"EPL10P8", 664,
2080      epl10p8pinfuserows, ARRAY_LEN(epl10p8pinfuserows),
2081      epl10p8pinfusecolumns, ARRAY_LEN(epl10p8pinfusecolumns),
2078      epl10p8pinfuserows, ARRAY_LENGTH(epl10p8pinfuserows),
2079      epl10p8pinfusecolumns, ARRAY_LENGTH(epl10p8pinfusecolumns),
20822080      print_epl10p8_product_terms,
20832081      config_epl10p8_pins,
20842082      NULL,
20852083      NULL},
20862084   {"EPL12P6", 786,
2087      epl12p6pinfuserows, ARRAY_LEN(epl12p6pinfuserows),
2088      epl12p6pinfusecolumns, ARRAY_LEN(epl12p6pinfusecolumns),
2085      epl12p6pinfuserows, ARRAY_LENGTH(epl12p6pinfuserows),
2086      epl12p6pinfusecolumns, ARRAY_LENGTH(epl12p6pinfusecolumns),
20892087      print_epl12p6_product_terms,
20902088      config_epl12p6_pins,
20912089      NULL,
20922090      NULL},
20932091   {"EPL14P4", 908,
2094      epl14p4pinfuserows, ARRAY_LEN(epl14p4pinfuserows),
2095      epl14p4pinfusecolumns, ARRAY_LEN(epl14p4pinfusecolumns),
2092      epl14p4pinfuserows, ARRAY_LENGTH(epl14p4pinfuserows),
2093      epl14p4pinfusecolumns, ARRAY_LENGTH(epl14p4pinfusecolumns),
20962094      print_epl14p4_product_terms,
20972095      config_epl14p4_pins,
20982096      NULL,
20992097      NULL},
21002098   {"EPL16P2", 1030,
2101      epl16p2pinfuserows, ARRAY_LEN(epl16p2pinfuserows),
2102      epl16p2pinfusecolumns, ARRAY_LEN(epl16p2pinfusecolumns),
2099      epl16p2pinfuserows, ARRAY_LENGTH(epl16p2pinfuserows),
2100      epl16p2pinfusecolumns, ARRAY_LENGTH(epl16p2pinfusecolumns),
21032101      print_epl16p2_product_terms,
21042102      config_epl16p2_pins,
21052103      NULL,
21062104      NULL},
21072105   {"EPL16P8", 2072,
2108      epl16p8pinfuserows, ARRAY_LEN(epl16p8pinfuserows),
2109      epl16p8pinfusecolumns, ARRAY_LEN(epl16p8pinfusecolumns),
2106      epl16p8pinfuserows, ARRAY_LENGTH(epl16p8pinfuserows),
2107      epl16p8pinfusecolumns, ARRAY_LENGTH(epl16p8pinfusecolumns),
21102108      print_epl16p8_product_terms,
21112109      config_epl16p8_pins,
21122110      NULL,
21132111      NULL},
21142112   {"EPL16RP8", 2072,
2115      epl16rp8pinfuserows, ARRAY_LEN(epl16rp8pinfuserows),
2116      epl16rp8pinfusecolumns, ARRAY_LEN(epl16rp8pinfusecolumns),
2113      epl16rp8pinfuserows, ARRAY_LENGTH(epl16rp8pinfuserows),
2114      epl16rp8pinfusecolumns, ARRAY_LENGTH(epl16rp8pinfusecolumns),
21172115      print_epl16rp8_product_terms,
21182116      config_epl16rp8_pins,
21192117      NULL,
21202118      NULL},
21212119   {"EPL16RP6", 2072,
2122      epl16rp6pinfuserows, ARRAY_LEN(epl16rp6pinfuserows),
2123      epl16rp6pinfusecolumns, ARRAY_LEN(epl16rp6pinfusecolumns),
2120      epl16rp6pinfuserows, ARRAY_LENGTH(epl16rp6pinfuserows),
2121      epl16rp6pinfusecolumns, ARRAY_LENGTH(epl16rp6pinfusecolumns),
21242122      print_epl16rp6_product_terms,
21252123      config_epl16rp6_pins,
21262124      NULL,
21272125      NULL},
21282126   {"EPL16RP4", 2072,
2129      epl16rp4pinfuserows, ARRAY_LEN(epl16rp4pinfuserows),
2130      epl16rp4pinfusecolumns, ARRAY_LEN(epl16rp4pinfusecolumns),
2127      epl16rp4pinfuserows, ARRAY_LENGTH(epl16rp4pinfuserows),
2128      epl16rp4pinfusecolumns, ARRAY_LENGTH(epl16rp4pinfusecolumns),
21312129      print_epl16rp4_product_terms,
21322130      config_epl16rp4_pins,
21332131      NULL,
21342132      NULL},
21352133#endif
21362134   {"PAL10P8", 328,
2137      pal10p8pinfuserows, ARRAY_LEN(pal10p8pinfuserows),
2138      pal10p8pinfusecolumns, ARRAY_LEN(pal10p8pinfusecolumns),
2135      pal10p8pinfuserows, ARRAY_LENGTH(pal10p8pinfuserows),
2136      pal10p8pinfusecolumns, ARRAY_LENGTH(pal10p8pinfusecolumns),
21392137      print_pal10p8_product_terms,
21402138      config_pal10p8_pins,
21412139      NULL,
21422140      NULL},
21432141   {"PAL12P6", 390,
2144      pal12p6pinfuserows, ARRAY_LEN(pal12p6pinfuserows),
2145      pal12p6pinfusecolumns, ARRAY_LEN(pal12p6pinfusecolumns),
2142      pal12p6pinfuserows, ARRAY_LENGTH(pal12p6pinfuserows),
2143      pal12p6pinfusecolumns, ARRAY_LENGTH(pal12p6pinfusecolumns),
21462144      print_pal12p6_product_terms,
21472145      config_pal12p6_pins,
21482146      NULL,
21492147      NULL},
21502148   {"PAL14P4", 452,
2151      pal14p4pinfuserows, ARRAY_LEN(pal14p4pinfuserows),
2152      pal14p4pinfusecolumns, ARRAY_LEN(pal14p4pinfusecolumns),
2149      pal14p4pinfuserows, ARRAY_LENGTH(pal14p4pinfuserows),
2150      pal14p4pinfusecolumns, ARRAY_LENGTH(pal14p4pinfusecolumns),
21532151      print_pal14p4_product_terms,
21542152      config_pal14p4_pins,
21552153      NULL,
21562154      NULL},
21572155   {"PAL16P2", 514,
2158      pal16p2pinfuserows, ARRAY_LEN(pal16p2pinfuserows),
2159      pal16p2pinfusecolumns, ARRAY_LEN(pal16p2pinfusecolumns),
2156      pal16p2pinfuserows, ARRAY_LENGTH(pal16p2pinfuserows),
2157      pal16p2pinfusecolumns, ARRAY_LENGTH(pal16p2pinfusecolumns),
21602158      print_pal16p2_product_terms,
21612159      config_pal16p2_pins,
21622160      NULL,
21632161      NULL},
21642162   {"PAL16P8", 2056,
2165      pal16p8pinfuserows, ARRAY_LEN(pal16p8pinfuserows),
2166      pal16p8pinfusecolumns, ARRAY_LEN(pal16p8pinfusecolumns),
2163      pal16p8pinfuserows, ARRAY_LENGTH(pal16p8pinfuserows),
2164      pal16p8pinfusecolumns, ARRAY_LENGTH(pal16p8pinfusecolumns),
21672165      print_pal16p8_product_terms,
21682166      config_pal16p8_pins,
21692167      NULL,
21702168      NULL},
21712169   {"PAL16RP4", 2056,
2172      pal16rp4pinfuserows, ARRAY_LEN(pal16rp4pinfuserows),
2173      pal16rp4pinfusecolumns, ARRAY_LEN(pal16rp4pinfusecolumns),
2170      pal16rp4pinfuserows, ARRAY_LENGTH(pal16rp4pinfuserows),
2171      pal16rp4pinfusecolumns, ARRAY_LENGTH(pal16rp4pinfusecolumns),
21742172      print_pal16rp4_product_terms,
21752173      config_pal16rp4_pins,
21762174      NULL,
21772175      NULL},
21782176   {"PAL16RP6", 2056,
2179      pal16rp6pinfuserows, ARRAY_LEN(pal16rp6pinfuserows),
2180      pal16rp6pinfusecolumns, ARRAY_LEN(pal16rp6pinfusecolumns),
2177      pal16rp6pinfuserows, ARRAY_LENGTH(pal16rp6pinfuserows),
2178      pal16rp6pinfusecolumns, ARRAY_LENGTH(pal16rp6pinfusecolumns),
21812179      print_pal16rp6_product_terms,
21822180      config_pal16rp6_pins,
21832181      NULL,
21842182      NULL},
21852183   {"PAL16RP8", 2056,
2186      pal16rp8pinfuserows, ARRAY_LEN(pal16rp8pinfuserows),
2187      pal16rp8pinfusecolumns, ARRAY_LEN(pal16rp8pinfusecolumns),
2184      pal16rp8pinfuserows, ARRAY_LENGTH(pal16rp8pinfuserows),
2185      pal16rp8pinfusecolumns, ARRAY_LENGTH(pal16rp8pinfusecolumns),
21882186      print_pal16rp8_product_terms,
21892187      config_pal16rp8_pins,
21902188      NULL,
21912189      NULL},
21922190   {"PAL6L16", 192,
2193      pal6l16pinfuserows, ARRAY_LEN(pal6l16pinfuserows),
2194      pal6l16pinfusecolumns, ARRAY_LEN(pal6l16pinfusecolumns),
2191      pal6l16pinfuserows, ARRAY_LENGTH(pal6l16pinfuserows),
2192      pal6l16pinfusecolumns, ARRAY_LENGTH(pal6l16pinfusecolumns),
21952193      print_pal6l16_product_terms,
21962194      config_pal6l16_pins,
21972195      NULL,
21982196      NULL},
21992197   {"PAL8L14", 224,
2200      pal8l14pinfuserows, ARRAY_LEN(pal8l14pinfuserows),
2201      pal8l14pinfusecolumns, ARRAY_LEN(pal8l14pinfusecolumns),
2198      pal8l14pinfuserows, ARRAY_LENGTH(pal8l14pinfuserows),
2199      pal8l14pinfusecolumns, ARRAY_LENGTH(pal8l14pinfusecolumns),
22022200      print_pal8l14_product_terms,
22032201      config_pal8l14_pins,
22042202      NULL,
22052203      NULL},
22062204   {"PAL12H10", 480,
2207      pal12h10pinfuserows, ARRAY_LEN(pal12h10pinfuserows),
2208      pal12h10pinfusecolumns, ARRAY_LEN(pal12h10pinfusecolumns),
2205      pal12h10pinfuserows, ARRAY_LENGTH(pal12h10pinfuserows),
2206      pal12h10pinfusecolumns, ARRAY_LENGTH(pal12h10pinfusecolumns),
22092207      print_pal12h10_product_terms,
22102208      config_pal12h10_pins,
22112209      NULL,
22122210      NULL},
22132211   {"PAL12L10", 480,
2214      pal12l10pinfuserows, ARRAY_LEN(pal12l10pinfuserows),
2215      pal12l10pinfusecolumns, ARRAY_LEN(pal12l10pinfusecolumns),
2212      pal12l10pinfuserows, ARRAY_LENGTH(pal12l10pinfuserows),
2213      pal12l10pinfusecolumns, ARRAY_LENGTH(pal12l10pinfusecolumns),
22162214      print_pal12l10_product_terms,
22172215      config_pal12l10_pins,
22182216      NULL,
22192217      NULL},
22202218   {"PAL14H8", 560,
2221      pal14h8pinfuserows, ARRAY_LEN(pal14h8pinfuserows),
2222      pal14h8pinfusecolumns, ARRAY_LEN(pal14h8pinfusecolumns),
2219      pal14h8pinfuserows, ARRAY_LENGTH(pal14h8pinfuserows),
2220      pal14h8pinfusecolumns, ARRAY_LENGTH(pal14h8pinfusecolumns),
22232221      print_pal14h8_product_terms,
22242222      config_pal14h8_pins,
22252223      NULL,
22262224      NULL},
22272225   {"PAL14L8", 560,
2228      pal14l8pinfuserows, ARRAY_LEN(pal14l8pinfuserows),
2229      pal14l8pinfusecolumns, ARRAY_LEN(pal14l8pinfusecolumns),
2226      pal14l8pinfuserows, ARRAY_LENGTH(pal14l8pinfuserows),
2227      pal14l8pinfusecolumns, ARRAY_LENGTH(pal14l8pinfusecolumns),
22302228      print_pal14l8_product_terms,
22312229      config_pal14l8_pins,
22322230      NULL,
22332231      NULL},
22342232   {"PAL16H6", 640,
2235      pal16h6pinfuserows, ARRAY_LEN(pal16h6pinfuserows),
2236      pal16h6pinfusecolumns, ARRAY_LEN(pal16h6pinfusecolumns),
2233      pal16h6pinfuserows, ARRAY_LENGTH(pal16h6pinfuserows),
2234      pal16h6pinfusecolumns, ARRAY_LENGTH(pal16h6pinfusecolumns),
22372235      print_pal16h6_product_terms,
22382236      config_pal16h6_pins,
22392237      NULL,
22402238      NULL},
22412239   {"PAL16L6", 640,
2242      pal16l6pinfuserows, ARRAY_LEN(pal16l6pinfuserows),
2243      pal16l6pinfusecolumns, ARRAY_LEN(pal16l6pinfusecolumns),
2240      pal16l6pinfuserows, ARRAY_LENGTH(pal16l6pinfuserows),
2241      pal16l6pinfusecolumns, ARRAY_LENGTH(pal16l6pinfusecolumns),
22442242      print_pal16l6_product_terms,
22452243      config_pal16l6_pins,
22462244      NULL,
22472245      NULL},
22482246   {"PAL18H4", 720,
2249      pal18h4pinfuserows, ARRAY_LEN(pal18h4pinfuserows),
2250      pal18h4pinfusecolumns, ARRAY_LEN(pal18h4pinfusecolumns),
2247      pal18h4pinfuserows, ARRAY_LENGTH(pal18h4pinfuserows),
2248      pal18h4pinfusecolumns, ARRAY_LENGTH(pal18h4pinfusecolumns),
22512249      print_pal18h4_product_terms,
22522250      config_pal18h4_pins,
22532251      NULL,
22542252      NULL},
22552253   {"PAL18L4", 720,
2256      pal18l4pinfuserows, ARRAY_LEN(pal18l4pinfuserows),
2257      pal18l4pinfusecolumns, ARRAY_LEN(pal18l4pinfusecolumns),
2254      pal18l4pinfuserows, ARRAY_LENGTH(pal18l4pinfuserows),
2255      pal18l4pinfusecolumns, ARRAY_LENGTH(pal18l4pinfusecolumns),
22582256      print_pal18l4_product_terms,
22592257      config_pal18l4_pins,
22602258      NULL,
22612259      NULL},
22622260   {"PAL20C1", 640,
2263      pal20c1pinfuserows, ARRAY_LEN(pal20c1pinfuserows),
2264      pal20c1pinfusecolumns, ARRAY_LEN(pal20c1pinfusecolumns),
2261      pal20c1pinfuserows, ARRAY_LENGTH(pal20c1pinfuserows),
2262      pal20c1pinfusecolumns, ARRAY_LENGTH(pal20c1pinfusecolumns),
22652263      print_pal20c1_product_terms,
22662264      config_pal20c1_pins,
22672265      NULL,
22682266      NULL},
22692267   {"PAL20L2", 640,
2270      pal20l2pinfuserows, ARRAY_LEN(pal20l2pinfuserows),
2271      pal20l2pinfusecolumns, ARRAY_LEN(pal20l2pinfusecolumns),
2268      pal20l2pinfuserows, ARRAY_LENGTH(pal20l2pinfuserows),
2269      pal20l2pinfusecolumns, ARRAY_LENGTH(pal20l2pinfusecolumns),
22722270      print_pal20l2_product_terms,
22732271      config_pal20l2_pins,
22742272      NULL,
r29305r29306
23272325{
23282326   int index;
23292327
2330   for (index = 0; index < ARRAY_LEN(paldata); ++index)
2328   for (index = 0; index < ARRAY_LENGTH(paldata); ++index)
23312329   {
23322330      if (!core_stricmp(name, paldata[index].name))
23332331      {
r29305r29306
29872985      {19, 0, 32, 224}};
29882986   UINT16 index;
29892987
2990   for (index = 0; index < ARRAY_LEN(pinfuserows); ++index)
2988   for (index = 0; index < ARRAY_LENGTH(pinfuserows); ++index)
29912989   {
29922990      if (pinfuserows[index].pin == pin)
29932991      {
r29305r29306
30213019      {19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};
30223020   UINT16 index;
30233021
3024   for (index = 0; index < ARRAY_LEN(pinfuserows); ++index)
3022   for (index = 0; index < ARRAY_LENGTH(pinfuserows); ++index)
30253023   {
30263024      if (pinfuserows[index].pin == pin)
30273025      {
r29305r29306
37873785
37883786   printf("Equations:\n\n");
37893787
3790   for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
3788   for (index = 0; index < ARRAY_LENGTH(memory_cells); ++index)
37913789   {
37923790      flags = outputpins[index].flags;
37933791
r29305r29306
42464244      {18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
42474245      {19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
42484246
4249   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4250   set_output_pins(output_pins, ARRAY_LEN(output_pins));
4247   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
4248   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
42514249}
42524250
42534251
r29305r29306
42704268      {18, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
42714269      {19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
42724270
4273   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4274   set_output_pins(output_pins, ARRAY_LEN(output_pins));
4271   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
4272   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
42754273}
42764274
42774275
r29305r29306
42924290      {17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
42934291      {18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
42944292
4295   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4296   set_output_pins(output_pins, ARRAY_LEN(output_pins));
4293   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
4294   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
42974295}
42984296
42994297
r29305r29306
43144312      {17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
43154313      {18, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
43164314
4317   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4318   set_output_pins(output_pins, ARRAY_LEN(output_pins));
4315   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
4316   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
43194317}
43204318
43214319
r29305r29306
43344332      {16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
43354333      {17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
43364334
4337   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4338   set_output_pins(output_pins, ARRAY_LEN(output_pins));
4335   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
4336   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
43394337}
43404338
43414339
r29305r29306
43544352      {16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
43554353      {17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
43564354
4357   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4358   set_output_pins(output_pins, ARRAY_LEN(output_pins));
4355   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
4356   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
43594357}
43604358
43614359
r29305r29306
43724370      {15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
43734371      {16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
43744372
4375   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4376   set_output_pins(output_pins, ARRAY_LEN(output_pins));
4373   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
4374   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
43774375}
43784376
43794377
r29305r29306
43904388      {15, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
43914389      {16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
43924390
4393   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4394   set_output_pins(output_pins, ARRAY_LEN(output_pins));
4391   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
4392   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
43954393}
43964394
43974395
r29305r29306
44084406      {15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
44094407      {16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
44104408
4411   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4412   set_output_pins(output_pins, ARRAY_LEN(output_pins));
4409   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
4410   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
44134411}
44144412
44154413
r29305r29306
44384436      }
44394437   }
44404438
4441   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4439   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
44424440   set_output_pins(output_pins, output_pin_count);
44434441}
44444442
r29305r29306
44744472      ++output_pin_count;
44754473   }
44764474
4477   for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
4475   for (index = 0; index < ARRAY_LENGTH(registered_pins); ++index)
44784476   {
44794477      output_pins[output_pin_count].pin = registered_pins[index];
44804478      output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
r29305r29306
44984496      ++output_pin_count;
44994497   }
45004498
4501   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4499   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
45024500   set_output_pins(output_pins, output_pin_count);
45034501}
45044502
r29305r29306
45264524      ++output_pin_count;
45274525   }
45284526
4529   for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
4527   for (index = 0; index < ARRAY_LENGTH(registered_pins); ++index)
45304528   {
45314529      output_pins[output_pin_count].pin = registered_pins[index];
45324530      output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
r29305r29306
45424540      ++output_pin_count;
45434541   }
45444542
4545   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4543   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
45464544   set_output_pins(output_pins, output_pin_count);
45474545}
45484546
r29305r29306
45664564      {18, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
45674565      {19, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED}};
45684566
4569   set_input_pins(input_pins, ARRAY_LEN(input_pins));
4570   set_output_pins(output_pins, ARRAY_LEN(output_pins));
4567   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
4568   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
45714569}
45724570
45734571
r29305r29306
46544652   static UINT16 sg0 = 2192;
46554653   static UINT16 sg1 = 2193;
46564654   UINT16 input_pins[18];
4657   pin_output_config output_pins[ARRAY_LEN(macrocells)];
4655   pin_output_config output_pins[ARRAY_LENGTH(macrocells)];
46584656   UINT16 index, input_pin_count, output_pin_count;
46594657
46604658   input_pin_count = 0;
r29305r29306
46704668
46714669         memcpy(input_pins, input_pins_regs, sizeof(input_pins_regs));
46724670
4673         input_pin_count = ARRAY_LEN(input_pins_regs);
4671         input_pin_count = ARRAY_LENGTH(input_pins_regs);
46744672
4675         for (index = 0; index < ARRAY_LEN(macrocells); ++index)
4673         for (index = 0; index < ARRAY_LENGTH(macrocells); ++index)
46764674         {
46774675            if (!jed_get_fuse(jed, macrocells[index].sl0_fuse))
46784676            {
r29305r29306
47444742
47454743         memcpy(input_pins, input_pins_io, sizeof(input_pins_io));
47464744
4747         input_pin_count = ARRAY_LEN(input_pins_io);
4745         input_pin_count = ARRAY_LENGTH(input_pins_io);
47484746
4749         for (index = 0; index < ARRAY_LEN(macrocells); ++index)
4747         for (index = 0; index < ARRAY_LENGTH(macrocells); ++index)
47504748         {
47514749            if (does_output_enable_fuse_row_allow_output(pal, jed, macrocells[index].fuserowoutputenable))
47524750            {
r29305r29306
47854783
47864784         memcpy(input_pins, input_pins_i_or_o, sizeof(input_pins_i_or_o));
47874785
4788         input_pin_count = ARRAY_LEN(input_pins_i_or_o);
4786         input_pin_count = ARRAY_LENGTH(input_pins_i_or_o);
47894787
4790         for (index = 0; index < ARRAY_LEN(macrocells); ++index)
4788         for (index = 0; index < ARRAY_LENGTH(macrocells); ++index)
47914789         {
47924790            if (!jed_get_fuse(jed, macrocells[index].sl0_fuse))
47934791            {
r29305r29306
49344932   static UINT16 input_pins_registered[] = {2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19};
49354933   static UINT16 input_pins_combinatorialcomplex[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 13, 14, 15, 16, 17, 18};
49364934   static UINT16 input_pins_combinatorialsimple[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19};
4937   pin_output_config output_pins[ARRAY_LEN(macrocells)];
4935   pin_output_config output_pins[ARRAY_LENGTH(macrocells)];
49384936   UINT16 index, output_pin_count;
49394937
49404938   output_pin_count = 0;
r29305r29306
49504948      {
49514949         /* Complex Mode */
49524950
4953         set_input_pins(input_pins_combinatorialcomplex, ARRAY_LEN(input_pins_combinatorialcomplex));
4951         set_input_pins(input_pins_combinatorialcomplex, ARRAY_LENGTH(input_pins_combinatorialcomplex));
49544952
49554953         memcpy(gal16v8pinfuserows, pinfuserows_combinatorial, sizeof(pinfuserows_combinatorial));
49564954         memcpy(gal16v8pinfusecolumns, pinfusecolumns_combinatorialcomplex, sizeof(pinfusecolumns_combinatorialcomplex));
49574955
4958         for (index = 0; index < ARRAY_LEN(macrocells); ++index)
4956         for (index = 0; index < ARRAY_LENGTH(macrocells); ++index)
49594957         {
49604958            if (is_gal16v8_product_term_enabled(pal, jed, pal->pinfuserows[index].fuserowoutputenable) &&
49614959               does_output_enable_fuse_row_allow_output(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
r29305r29306
49904988      {
49914989         /* Simple Mode */
49924990
4993         set_input_pins(input_pins_combinatorialsimple, ARRAY_LEN(input_pins_combinatorialsimple));
4991         set_input_pins(input_pins_combinatorialsimple, ARRAY_LENGTH(input_pins_combinatorialsimple));
49944992
49954993         memcpy(gal16v8pinfuserows, pinfuserows_registered, sizeof(pinfuserows_registered));
49964994         memcpy(gal16v8pinfusecolumns, pinfusecolumns_combinatorialsimple, sizeof(pinfusecolumns_combinatorialsimple));
49974995
4998         for (index = 0; index < ARRAY_LEN(macrocells); ++index)
4996         for (index = 0; index < ARRAY_LENGTH(macrocells); ++index)
49994997         {
50004998            if (jed_get_fuse(jed, macrocells[index].ac1_fuse))
50014999            {
r29305r29306
50405038   {
50415039      /* Registered */
50425040
5043      set_input_pins(input_pins_registered, ARRAY_LEN(input_pins_registered));
5041      set_input_pins(input_pins_registered, ARRAY_LENGTH(input_pins_registered));
50445042
50455043      memcpy(gal16v8pinfusecolumns, pinfusecolumns_registered, sizeof(pinfusecolumns_registered));
50465044
5047      for (index = 0; index < ARRAY_LEN(macrocells); ++index)
5045      for (index = 0; index < ARRAY_LENGTH(macrocells); ++index)
50485046      {
50495047         if (jed_get_fuse(jed, macrocells[index].ac1_fuse))
50505048         {
r29305r29306
51295127      {18, 2668, 2669, 2670, 2671},
51305128      {19, 2664, 2665, 2666, 2667}};
51315129   static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 15, 16, 17, 18, 19};
5132   pin_output_config output_pins[ARRAY_LEN(macrocells)];
5130   pin_output_config output_pins[ARRAY_LENGTH(macrocells)];
51335131   UINT16 index, output_pin_count;
51345132
5135   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5133   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
51365134
51375135   output_pin_count = 0;
51385136
5139   for (index = 0; index < ARRAY_LEN(macrocells); ++index)
5137   for (index = 0; index < ARRAY_LENGTH(macrocells); ++index)
51405138   {
51415139      if (jed_get_fuse(jed, macrocells[index].feedback1_fuse) &&
51425140         !jed_get_fuse(jed, macrocells[index].feedback2_fuse))
r29305r29306
52675265      {18, 3458, 3459},
52685266      {19, 3456, 3457}};
52695267   static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 15, 16, 17, 18, 19};
5270   pin_output_config output_pins[ARRAY_LEN(macrocells)];
5268   pin_output_config output_pins[ARRAY_LENGTH(macrocells)];
52715269   UINT16 index, output_pin_count;
52725270
52735271   output_pin_count = 0;
52745272
5275   for (index = 0; index < ARRAY_LEN(output_pins); ++index)
5273   for (index = 0; index < ARRAY_LENGTH(output_pins); ++index)
52765274   {
52775275      if (jed_get_fuse(jed, macrocells[index].s1_fuse))
52785276      {
r29305r29306
53155313      }
53165314   }
53175315
5318   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5316   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
53195317   set_output_pins(output_pins, output_pin_count);
53205318}
53215319
r29305r29306
53555353      }
53565354   }
53575355
5358   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5356   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
53595357   set_output_pins(output_pins, output_pin_count);
53605358}
53615359
r29305r29306
53955393      }
53965394   }
53975395
5398   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5396   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
53995397   set_output_pins(output_pins, output_pin_count);
54005398}
54015399
r29305r29306
54315429      ++output_pin_count;
54325430   }
54335431
5434   for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
5432   for (index = 0; index < ARRAY_LENGTH(registered_pins); ++index)
54355433   {
54365434      output_pins[output_pin_count].pin = registered_pins[index];
54375435      output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
r29305r29306
54555453      ++output_pin_count;
54565454   }
54575455
5458   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5456   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
54595457   set_output_pins(output_pins, output_pin_count);
54605458}
54615459
r29305r29306
54835481      ++output_pin_count;
54845482   }
54855483
5486   for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
5484   for (index = 0; index < ARRAY_LENGTH(registered_pins); ++index)
54875485   {
54885486      output_pins[output_pin_count].pin = registered_pins[index];
54895487      output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
r29305r29306
54995497      ++output_pin_count;
55005498   }
55015499
5502   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5500   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
55035501   set_output_pins(output_pins, output_pin_count);
55045502}
55055503
r29305r29306
55235521      {21, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
55245522      {22, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED}};
55255523
5526   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5527   set_output_pins(output_pins, ARRAY_LEN(output_pins));
5524   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
5525   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
55285526}
55295527
55305528
r29305r29306
55495547      {22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT},
55505548      {23, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT}};
55515549
5552   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5553   set_output_pins(output_pins, ARRAY_LEN(output_pins));
5550   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
5551   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
55545552}
55555553
55565554/*-------------------------------------------------
r29305r29306
55735571      {22, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
55745572      {23, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_OUTPUT}};
55755573
5576   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5577   set_output_pins(output_pins, ARRAY_LEN(output_pins));
5574   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
5575   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
55785576}
55795577
55805578
r29305r29306
55995597      {22, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED},
56005598      {23, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED}};
56015599
5602   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5603   set_output_pins(output_pins, ARRAY_LEN(output_pins));
5600   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
5601   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
56045602}
56055603
56065604
r29305r29306
56385636      }
56395637   }
56405638
5641   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5639   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
56425640   set_output_pins(output_pins, output_pin_count);
56435641}
56445642
r29305r29306
56775675      }
56785676   }
56795677
5680   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5678   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
56815679   set_output_pins(output_pins, output_pin_count);
56825680}
56835681
r29305r29306
57115709   pin_output_config output_pins[8];
57125710   UINT16 index;
57135711
5714   for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
5712   for (index = 0; index < ARRAY_LENGTH(memory_cells); ++index)
57155713   {
57165714      output_pins[index].pin = memory_cells[index].pin;
57175715      output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
r29305r29306
57265724      }
57275725   }
57285726
5729   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5730   set_output_pins(output_pins, ARRAY_LEN(output_pins));
5727   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
5728   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
57315729}
57325730
57335731
r29305r29306
57595757   pin_output_config output_pins[8];
57605758   UINT16 index;
57615759
5762   for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
5760   for (index = 0; index < ARRAY_LENGTH(memory_cells); ++index)
57635761   {
57645762      output_pins[index].pin = memory_cells[index].pin;
57655763      output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
r29305r29306
57745772      }
57755773   }
57765774
5777   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5778   set_output_pins(output_pins, ARRAY_LEN(output_pins));
5775   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
5776   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
57795777}
57805778
57815779
r29305r29306
58055803   pin_output_config output_pins[8];
58065804   UINT16 index;
58075805
5808   for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
5806   for (index = 0; index < ARRAY_LENGTH(memory_cells); ++index)
58095807   {
58105808      output_pins[index].pin = memory_cells[index].pin;
58115809      output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
r29305r29306
58205818      }
58215819   }
58225820
5823   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5824   set_output_pins(output_pins, ARRAY_LEN(output_pins));
5821   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
5822   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
58255823}
58265824
58275825
r29305r29306
58495847   pin_output_config output_pins[8];
58505848   UINT16 index;
58515849
5852   for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
5850   for (index = 0; index < ARRAY_LENGTH(memory_cells); ++index)
58535851   {
58545852      output_pins[index].pin = memory_cells[index].pin;
58555853      output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
r29305r29306
58645862      }
58655863   }
58665864
5867   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5868   set_output_pins(output_pins, ARRAY_LEN(output_pins));
5865   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
5866   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
58695867}
58705868
58715869
r29305r29306
58995897   pin_output_config output_pins[8];
59005898   UINT16 index;
59015899
5902   for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
5900   for (index = 0; index < ARRAY_LENGTH(memory_cells); ++index)
59035901   {
59045902      output_pins[index].pin = memory_cells[index].pin;
59055903      output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
r29305r29306
59145912      }
59155913   }
59165914
5917   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5918   set_output_pins(output_pins, ARRAY_LEN(output_pins));
5915   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
5916   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
59195917}
59205918
59215919
r29305r29306
59495947   pin_output_config output_pins[8];
59505948   UINT16 index;
59515949
5952   for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
5950   for (index = 0; index < ARRAY_LENGTH(memory_cells); ++index)
59535951   {
59545952      output_pins[index].pin = memory_cells[index].pin;
59555953      output_pins[index].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
r29305r29306
59645962      }
59655963   }
59665964
5967   set_input_pins(input_pins, ARRAY_LEN(input_pins));
5968   set_output_pins(output_pins, ARRAY_LEN(output_pins));
5965   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
5966   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
59695967}
59705968
59715969
r29305r29306
59995997   pin_output_config output_pins[8];
60005998   UINT16 index;
60015999
6002   for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
6000   for (index = 0; index < ARRAY_LENGTH(memory_cells); ++index)
60036001   {
60046002      output_pins[index].pin = memory_cells[index].pin;
60056003
r29305r29306
60246022      }
60256023   }
60266024
6027   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6028   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6025   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6026   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
60296027}
60306028
60316029
r29305r29306
60596057   pin_output_config output_pins[8];
60606058   UINT16 index;
60616059
6062   for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
6060   for (index = 0; index < ARRAY_LENGTH(memory_cells); ++index)
60636061   {
60646062      output_pins[index].pin = memory_cells[index].pin;
60656063
r29305r29306
60836081      }
60846082   }
60856083
6086   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6087   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6084   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6085   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
60886086}
60896087#endif
60906088
r29305r29306
61016099   pin_output_config output_pins[8];
61026100   UINT16 index;
61036101
6104   for (index = 0; index < ARRAY_LEN(output_pins); ++index)
6102   for (index = 0; index < ARRAY_LENGTH(output_pins); ++index)
61056103   {
61066104      output_pins[index].pin = index + 12;
61076105      output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
r29305r29306
61166114      }
61176115   }
61186116
6119   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6120   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6117   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6118   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
61216119}
61226120
61236121
r29305r29306
61336131   pin_output_config output_pins[6];
61346132   UINT16 index;
61356133
6136   for (index = 0; index < ARRAY_LEN(output_pins); ++index)
6134   for (index = 0; index < ARRAY_LENGTH(output_pins); ++index)
61376135   {
61386136      output_pins[index].pin = index + 13;
61396137      output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
r29305r29306
61486146      }
61496147   }
61506148
6151   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6152   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6149   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6150   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
61536151}
61546152
61556153
r29305r29306
61656163   pin_output_config output_pins[4];
61666164   UINT16 index;
61676165
6168   for (index = 0; index < ARRAY_LEN(output_pins); ++index)
6166   for (index = 0; index < ARRAY_LENGTH(output_pins); ++index)
61696167   {
61706168      output_pins[index].pin = index + 14;
61716169      output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
r29305r29306
61806178      }
61816179   }
61826180
6183   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6184   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6181   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6182   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
61856183}
61866184
61876185
r29305r29306
61976195   pin_output_config output_pins[2];
61986196   UINT16 index;
61996197
6200   for (index = 0; index < ARRAY_LEN(output_pins); ++index)
6198   for (index = 0; index < ARRAY_LENGTH(output_pins); ++index)
62016199   {
62026200      output_pins[index].pin = index + 15;
62036201      output_pins[index].flags = OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE;
r29305r29306
62126210      }
62136211   }
62146212
6215   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6216   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6213   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6214   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
62176215}
62186216
62196217
r29305r29306
62516249      }
62526250   }
62536251
6254   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6252   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
62556253   set_output_pins(output_pins, output_pin_count);
62566254}
62576255
r29305r29306
63056303      ++output_pin_count;
63066304   }
63076305
6308   for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
6306   for (index = 0; index < ARRAY_LENGTH(registered_pins); ++index)
63096307   {
63106308      output_pins[output_pin_count].pin = registered_pins[index];
63116309      output_pins[output_pin_count].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
r29305r29306
63566354      ++output_pin_count;
63576355   }
63586356
6359   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6357   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
63606358   set_output_pins(output_pins, output_pin_count);
63616359}
63626360
r29305r29306
63936391      ++output_pin_count;
63946392   }
63956393
6396   for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
6394   for (index = 0; index < ARRAY_LENGTH(registered_pins); ++index)
63976395   {
63986396      output_pins[output_pin_count].pin = registered_pins[index];
63996397      output_pins[output_pin_count].flags = OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED;
r29305r29306
64276425      ++output_pin_count;
64286426   }
64296427
6430   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6428   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
64316429   set_output_pins(output_pins, output_pin_count);
64326430}
64336431
r29305r29306
64526450      {19, OUTPUT_REGISTERED | OUTPUT_FEEDBACK_REGISTERED}};
64536451   UINT16 index;
64546452
6455   for (index = 0; index < ARRAY_LEN(output_pins); ++index)
6453   for (index = 0; index < ARRAY_LENGTH(output_pins); ++index)
64566454   {
64576455      if (!jed_get_fuse(jed, 2055 - index))
64586456      {
r29305r29306
64646462      }
64656463   }
64666464
6467   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6468   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6465   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6466   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
64696467}
64706468
64716469
r29305r29306
64966494      {22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
64976495      {23, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
64986496
6499   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6500   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6497   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6498   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
65016499}
65026500
65036501
r29305r29306
65266524      {22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
65276525      {23, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
65286526
6529   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6530   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6527   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6528   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
65316529}
65326530
65336531
r29305r29306
65526550      {22, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
65536551      {23, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
65546552
6555   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6556   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6553   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6554   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
65576555}
65586556
65596557
r29305r29306
65786576      {22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
65796577      {23, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
65806578
6581   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6582   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6579   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6580   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
65836581}
65846582
65856583
r29305r29306
66026600      {21, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
66036601      {22, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
66046602
6605   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6606   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6603   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6604   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
66076605}
66086606
66096607
r29305r29306
66266624      {21, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
66276625      {22, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
66286626
6629   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6630   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6627   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6628   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
66316629}
66326630
66336631
r29305r29306
66486646      {20, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
66496647      {21, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
66506648
6651   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6652   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6649   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6650   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
66536651}
66546652
66556653
r29305r29306
66706668      {20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
66716669      {21, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
66726670
6673   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6674   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6671   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6672   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
66756673}
66766674
66776675
r29305r29306
66906688      {19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
66916689      {20, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
66926690
6693   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6694   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6691   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6692   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
66956693}
66966694
66976695
r29305r29306
67106708      {19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
67116709      {20, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
67126710
6713   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6714   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6711   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6712   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
67156713}
67166714
67176715
r29305r29306
67286726      {18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
67296727      {19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
67306728
6731   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6732   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6729   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6730   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
67336731}
67346732
67356733
r29305r29306
67466744      {18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE},
67476745      {19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL | OUTPUT_FEEDBACK_NONE}};
67486746
6749   set_input_pins(input_pins, ARRAY_LEN(input_pins));
6750   set_output_pins(output_pins, ARRAY_LEN(output_pins));
6747   set_input_pins(input_pins, ARRAY_LENGTH(input_pins));
6748   set_output_pins(output_pins, ARRAY_LENGTH(output_pins));
67516749}
67526750
67536751
r29305r29306
72137211      return print_usage();
72147212   }
72157213
7216   for (index = 0; index < ARRAY_LEN(paldata); ++index)
7214   for (index = 0; index < ARRAY_LENGTH(paldata); ++index)
72177215   {
72187216      printf("%s\n", paldata[index].name);
72197217   }
r29305r29306
72397237      return print_usage();
72407238   }
72417239
7242   for (index = 0; index < ARRAY_LEN(command_entries); ++index)
7240   for (index = 0; index < ARRAY_LENGTH(command_entries); ++index)
72437241   {
72447242      if (!strcmp(argv[1], command_entries[index].command))
72457243         return command_entries[index].command_func(argc - 2, &argv[2]);
Property changes on: shelves/new_menus
Modified: svn:mergeinfo
   Merged /trunk:r29217-29253

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