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r29254 Friday 4th April, 2014 at 12:23:42 UTC by Curt Coder
(MESS) tandy2k: WIP. (nw)

[src/emu/video]	crt9007.c crt9007.h crt9021.c crt9021.h crt9212.c crt9212.h
[src/mess/drivers]	tandy2k.c
[src/mess/includes]	tandy2k.h

trunk/src/emu/video/crt9007.c

r29253	r29254
38	38	#include "crt9007.h"
39	39
40	40
41		// device type definition
42		const device_type CRT9007 = &device_creator<crt9007_device>;
43	41
	42	//**************************************************************************
	43	//  DEVICE DEFINITIONS
	44	//**************************************************************************
44	45
	46	const device_type CRT9007 = &device_creator<crt9007_t>;
	47
	48
	49
45	50	//**************************************************************************
46	51	//  MACROS / CONSTANTS
47	52	//**************************************************************************
48	53
49		#define LOG 0
	54	#define LOG 1
50	55
51	56	#define HAS_VALID_PARAMETERS \
52	57	(m_reg[0x00] && m_reg[0x01] && m_reg[0x07] && m_reg[0x08] && m_reg[0x09])
r29253	r29254
217	222	//**************************************************************************
218	223
219	224	// default address map
220		static ADDRESS_MAP_START( crt9007, AS_0, 8, crt9007_device )
	225	static ADDRESS_MAP_START( crt9007, AS_0, 8, crt9007_t )
221	226	AM_RANGE(0x0000, 0x3fff) AM_RAM
222	227	ADDRESS_MAP_END
223	228
r29253	r29254
231	236	//  readbyte - read a byte at the given address
232	237	//-------------------------------------------------
233	238
234		inline UINT8 crt9007_device::readbyte(offs_t address)
	239	inline UINT8 crt9007_t::readbyte(offs_t address)
235	240	{
236	241	return space().read_byte(address);
237	242	}
r29253	r29254
241	246	//  trigger_interrupt -
242	247	//-------------------------------------------------
243	248
244		inline void crt9007_device::trigger_interrupt(int line)
	249	inline void crt9007_t::trigger_interrupt(int line)
245	250	{
246	251	if (INTERRUPT_ENABLE & line)
247	252	{
r29253	r29254
252	257	if (!(status & STATUS_INTERRUPT_PENDING))
253	258	{
254	259	if (LOG) logerror("CRT9007 '%s' INT 1\n", tag());
255		m_out_int_func(ASSERT_LINE);
	260	m_write_int(ASSERT_LINE);
256	261	}
257	262	}
258	263	}
r29253	r29254
262	267	//  update_cblank_line -
263	268	//-------------------------------------------------
264	269
265		inline void crt9007_device::update_cblank_line()
	270	inline void crt9007_t::update_cblank_line()
266	271	{
267	272	int x = m_screen->hpos();
268	273	int y = m_screen->vpos();
r29253	r29254
276	281
277	282	if (LOG) logerror("CRT9007 '%s' y %03u x %04u : CBLANK %u\n", tag(), y, x, m_cblank);
278	283
279		m_out_cblank_func(m_cblank);
	284	m_write_cblank(m_cblank);
280	285	}
281	286	}
282	287
r29253	r29254
285	290	//  update_hsync_timer -
286	291	//-------------------------------------------------
287	292
288		inline void crt9007_device::update_hsync_timer(int state)
	293	inline void crt9007_t::update_hsync_timer(int state)
289	294	{
290	295	int y = m_screen->vpos();
291	296
r29253	r29254
302	307	//  update_vsync_timer -
303	308	//-------------------------------------------------
304	309
305		inline void crt9007_device::update_vsync_timer(int state)
	310	inline void crt9007_t::update_vsync_timer(int state)
306	311	{
307	312	int next_y = state ? m_vsync_start : m_vsync_end;
308	313
r29253	r29254
316	321	//  update_vlt_timer -
317	322	//-------------------------------------------------
318	323
319		inline void crt9007_device::update_vlt_timer(int state)
	324	inline void crt9007_t::update_vlt_timer(int state)
320	325	{
321	326	// this signal is active during all visible scan lines and during the horizontal trace at vertical retrace
322	327	int y = m_screen->vpos();
r29253	r29254
334	339	//  update_curs_timer -
335	340	//-------------------------------------------------
336	341
337		inline void crt9007_device::update_curs_timer(int state)
	342	inline void crt9007_t::update_curs_timer(int state)
338	343	{
339	344	// this signal is active for 1 character time for all scanlines within the data row
340	345	// TODO
r29253	r29254
345	350	//  update_drb_timer -
346	351	//-------------------------------------------------
347	352
348		inline void crt9007_device::update_drb_timer(int state)
	353	inline void crt9007_t::update_drb_timer(int state)
349	354	{
350	355	// this signal is active for 1 full scan line (VLT edge to edge) at the top scan line of each new row
351	356	// there is 1 extra DRB signal during the 1st scanline of the vertical retrace interval
r29253	r29254
381	386	//  update_dma_timer -
382	387	//-------------------------------------------------
383	388
384		inline void crt9007_device::update_dma_timer()
	389	inline void crt9007_t::update_dma_timer()
385	390	{
386	391	// TODO
387	392	}
r29253	r29254
391	396	//  recompute_parameters -
392	397	//-------------------------------------------------
393	398
394		inline void crt9007_device::recompute_parameters()
	399	inline void crt9007_t::recompute_parameters()
395	400	{
396	401	// check that necessary registers have been loaded
397	402	if (!HAS_VALID_PARAMETERS) return;
r29253	r29254
444	449	//**************************************************************************
445	450
446	451	//-------------------------------------------------
447		//  crt9007_device - constructor
	452	//  crt9007_t - constructor
448	453	//-------------------------------------------------
449	454
450		crt9007_device::crt9007_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
451		: device_t(mconfig, CRT9007, "SMC CRT9007", tag, owner, clock, "crt9007", __FILE__),
452		device_memory_interface(mconfig, *this),
453		device_video_interface(mconfig, *this),
454		m_space_config("videoram", ENDIANNESS_LITTLE, 8, 14, 0, NULL, *ADDRESS_MAP_NAME(crt9007))
	455	crt9007_t::crt9007_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
	456	device_t(mconfig, CRT9007, "SMC CRT9007", tag, owner, clock, "crt9007", __FILE__),
	457	device_memory_interface(mconfig, *this),
	458	device_video_interface(mconfig, *this),
	459	m_space_config("videoram", ENDIANNESS_LITTLE, 8, 14, 0, NULL, *ADDRESS_MAP_NAME(crt9007)),
	460	m_write_int(*this),
	461	m_write_dmar(*this),
	462	m_write_hs(*this),
	463	m_write_vs(*this),
	464	m_write_vlt(*this),
	465	m_write_curs(*this),
	466	m_write_drb(*this),
	467	m_write_cblank(*this),
	468	m_write_slg(*this),
	469	m_write_sld(*this)
455	470	{
456	471	for (int i = 0; i < 0x3d; i++)
457	472	m_reg[i] = 0;
r29253	r29254
459	474
460	475
461	476	//-------------------------------------------------
462		//  device_config_complete - perform any
463		//  operations now that the configuration is
464		//  complete
465		//-------------------------------------------------
466
467		void crt9007_device::device_config_complete()
468		{
469		// inherit a copy of the static data
470		const crt9007_interface *intf = reinterpret_cast<const crt9007_interface *>(static_config());
471		if (intf != NULL)
472		*static_cast<crt9007_interface *>(this) = *intf;
473
474		// or initialize to defaults if none provided
475		else
476		{
477		memset(&m_out_int_cb, 0, sizeof(m_out_int_cb));
478		memset(&m_out_dmar_cb, 0, sizeof(m_out_dmar_cb));
479		memset(&m_out_vs_cb, 0, sizeof(m_out_vs_cb));
480		memset(&m_out_hs_cb, 0, sizeof(m_out_hs_cb));
481		memset(&m_out_vlt_cb, 0, sizeof(m_out_vlt_cb));
482		memset(&m_out_curs_cb, 0, sizeof(m_out_curs_cb));
483		memset(&m_out_drb_cb, 0, sizeof(m_out_drb_cb));
484		memset(&m_out_cblank_cb, 0, sizeof(m_out_cblank_cb));
485		memset(&m_out_slg_cb, 0, sizeof(m_out_slg_cb));
486		memset(&m_out_sld_cb, 0, sizeof(m_out_sld_cb));
487		}
488		}
489
490
491		//-------------------------------------------------
492	477	//  device_start - device-specific startup
493	478	//-------------------------------------------------
494	479
495		void crt9007_device::device_start()
	480	void crt9007_t::device_start()
496	481	{
497	482	// allocate timers
498	483	m_hsync_timer = timer_alloc(TIMER_HSYNC);
r29253	r29254
503	488	m_dma_timer = timer_alloc(TIMER_DMA);
504	489
505	490	// resolve callbacks
506		m_out_int_func.resolve(m_out_int_cb, *this);
507		m_out_dmar_func.resolve(m_out_dmar_cb, *this);
508		m_out_hs_func.resolve(m_out_hs_cb, *this);
509		m_out_vs_func.resolve(m_out_vs_cb, *this);
510		m_out_vlt_func.resolve(m_out_vlt_cb, *this);
511		m_out_curs_func.resolve(m_out_curs_cb, *this);
512		m_out_drb_func.resolve(m_out_drb_cb, *this);
513		m_out_cblank_func.resolve(m_out_cblank_cb, *this);
514		m_out_slg_func.resolve(m_out_slg_cb, *this);
515		m_out_sld_func.resolve(m_out_sld_cb, *this);
516
517		// set horizontal pixels per column
518		m_hpixels_per_column = hpixels_per_column;
519
520		// register for state saving
521		//  state_save_register_device_item(this, 0, );
	491	m_write_int.resolve_safe();
	492	m_write_dmar.resolve_safe();
	493	m_write_hs.resolve_safe();
	494	m_write_vs.resolve_safe();
	495	m_write_vlt.resolve_safe();
	496	m_write_curs.resolve_safe();
	497	m_write_drb.resolve_safe();
	498	m_write_cblank.resolve_safe();
	499	m_write_slg.resolve_safe();
	500	m_write_sld.resolve_safe();
522	501	}
523	502
524	503
r29253	r29254
526	505	//  device_reset - device-specific reset
527	506	//-------------------------------------------------
528	507
529		void crt9007_device::device_reset()
	508	void crt9007_t::device_reset()
530	509	{
531	510	m_disp = 0;
532	511	m_vs = 0;
533	512	m_cblank = 0;
534	513
535	514	// HS = 1
536		m_out_hs_func(1);
	515	m_write_hs(1);
537	516
538	517	// VS = 1
539		m_out_vs_func(1);
	518	m_write_vs(1);
540	519
541	520	// CBLANK = 1
542		m_out_cblank_func(0);
	521	m_write_cblank(0);
543	522
544	523	// CURS = 0
545		m_out_curs_func(0);
	524	m_write_curs(0);
546	525
547	526	// VLT = 0
548		m_out_vlt_func(0);
	527	m_write_vlt(0);
549	528
550	529	// DRB = 1
551		m_out_drb_func(1);
	530	m_write_drb(1);
552	531
553	532	// INT = 0
554		m_out_int_func(CLEAR_LINE);
	533	m_write_int(CLEAR_LINE);
555	534
556	535	// 28 (DMAR) = 0
557		m_out_dmar_func(CLEAR_LINE);
	536	m_write_dmar(CLEAR_LINE);
558	537
559	538	// 29 (WBEN) = 0
560	539
561	540	// 30 (SLG) = 0
562		m_out_slg_func(0);
	541	m_write_slg(0);
563	542
564	543	// 31 (SLD) = 0
565		m_out_sld_func(0);
	544	m_write_sld(0);
566	545
567	546	// 32 (LPSTB) = 0
568	547	}
r29253	r29254
572	551	//  device_clock_changed - handle clock change
573	552	//-------------------------------------------------
574	553
575		void crt9007_device::device_clock_changed()
	554	void crt9007_t::device_clock_changed()
576	555	{
577	556	recompute_parameters();
578	557	}
r29253	r29254
582	561	//  device_timer - handle timer events
583	562	//-------------------------------------------------
584	563
585		void crt9007_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
	564	void crt9007_t::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
586	565	{
587	566	int x = m_screen->hpos();
588	567	int y = m_screen->vpos();
r29253	r29254
594	573
595	574	if (LOG) logerror("CRT9007 '%s' y %03u x %04u : HS %u\n", tag(), y, x, m_hs);
596	575
597		m_out_hs_func(m_hs);
	576	m_write_hs(m_hs);
598	577
599	578	update_cblank_line();
600	579
r29253	r29254
606	585
607	586	if (LOG) logerror("CRT9007 '%s' y %03u x %04u : VS %u\n", tag(), y, x, m_vs);
608	587
609		m_out_vs_func(param);
	588	m_write_vs(param);
610	589
611	590	if (m_vs)
612	591	{
r29253	r29254
628	607
629	608	if (LOG) logerror("CRT9007 '%s' y %03u x %04u : VLT %u\n", tag(), y, x, m_vlt);
630	609
631		m_out_vlt_func(param);
	610	m_write_vlt(param);
632	611
633	612	update_vlt_timer(param);
634	613	break;
r29253	r29254
636	615	case TIMER_CURS:
637	616	if (LOG) logerror("CRT9007 '%s' y %03u x %04u : CURS %u\n", tag(), y, x, param);
638	617
639		m_out_curs_func(param);
	618	m_write_curs(param);
640	619
641	620	update_curs_timer(param);
642	621	break;
r29253	r29254
646	625
647	626	if (LOG) logerror("CRT9007 '%s' y %03u x %04u : DRB %u\n", tag(), y, x, m_drb);
648	627
649		m_out_drb_func(param);
	628	m_write_drb(param);
650	629
651	630	if (!m_drb && !DMA_DISABLE)
652	631	{
r29253	r29254
657	636	m_dmar = 1;
658	637
659	638	if (LOG) logerror("CRT9007 '%s' DMAR 1\n", tag());
660		m_out_dmar_func(ASSERT_LINE);
	639	m_write_dmar(ASSERT_LINE);
661	640	}
662	641
663	642	update_drb_timer(param);
r29253	r29254
677	656	//  any address spaces owned by this device
678	657	//-------------------------------------------------
679	658
680		const address_space_config *crt9007_device::memory_space_config(address_spacenum spacenum) const
	659	const address_space_config *crt9007_t::memory_space_config(address_spacenum spacenum) const
681	660	{
682	661	return (spacenum == AS_0) ? &m_space_config : NULL;
683	662	}
r29253	r29254
687	666	//  read - register read
688	667	//-------------------------------------------------
689	668
690		READ8_MEMBER( crt9007_device::read )
	669	READ8_MEMBER( crt9007_t::read )
691	670	{
692	671	UINT8 data = 0;
693	672
r29253	r29254
717	696	// reset interrupt pending bit
718	697	m_status &= ~STATUS_INTERRUPT_PENDING;
719	698	if (LOG) logerror("CRT9007 '%s' INT 0\n", tag());
720		m_out_int_func(CLEAR_LINE);
	699	m_write_int(CLEAR_LINE);
721	700	break;
722	701
723	702	case 0x3b:
r29253	r29254
743	722	//  write - register write
744	723	//-------------------------------------------------
745	724
746		WRITE8_MEMBER( crt9007_device::write )
	725	WRITE8_MEMBER( crt9007_t::write )
747	726	{
748	727	m_reg[offset] = data;
749	728
r29253	r29254
913	892	//  ack_w - DMA acknowledge
914	893	//-------------------------------------------------
915	894
916		WRITE_LINE_MEMBER( crt9007_device::ack_w )
	895	WRITE_LINE_MEMBER( crt9007_t::ack_w )
917	896	{
918	897	if (LOG) logerror("CRT9007 '%s' ACK: %u\n", tag(), state);
919	898
r29253	r29254
931	910	//  lpstb_w - light pen strobe
932	911	//-------------------------------------------------
933	912
934		WRITE_LINE_MEMBER( crt9007_device::lpstb_w )
	913	WRITE_LINE_MEMBER( crt9007_t::lpstb_w )
935	914	{
936	915	if (LOG) logerror("CRT9007 '%s' LPSTB: %u\n", tag(), state);
937	916
r29253	r29254
945	924
946	925
947	926	//-------------------------------------------------
948		//  vlt_r -
	927	//  set_character_width -
949	928	//-------------------------------------------------
950	929
951		READ_LINE_MEMBER( crt9007_device::vlt_r )
	930	void crt9007_t::set_character_width(int value)
952	931	{
953		return m_vlt;
954		}
	932	m_hpixels_per_column = value;
955	933
956
957		//-------------------------------------------------
958		//  wben_r -
959		//-------------------------------------------------
960
961		READ_LINE_MEMBER( crt9007_device::wben_r )
962		{
963		return m_wben;
964		}
965
966
967		//-------------------------------------------------
968		//  set_hpixels_per_column -
969		//-------------------------------------------------
970
971		void crt9007_device::set_hpixels_per_column(int hpixels_per_column)
972		{
973		m_hpixels_per_column = hpixels_per_column;
974	934	recompute_parameters();
975	935	}

trunk/src/emu/video/crt9007.h

r29253	r29254
52	52	//  INTERFACE CONFIGURATION MACROS
53	53	//**************************************************************************
54	54
55		#define MCFG_CRT9007_ADD(_tag, _clock, _config, _map) \
56		MCFG_DEVICE_ADD(_tag, CRT9007, _clock) \
57		MCFG_DEVICE_CONFIG(_config) \
58		MCFG_DEVICE_ADDRESS_MAP(AS_0, _map)
	55	#define MCFG_CRT9007_CHARACTER_WIDTH(_value) \
	56	crt9007_t::static_set_character_width(*device, _value);
59	57
	58	#define MCFG_CRT9007_INT_CALLBACK(_write) \
	59	devcb = &crt9007_t::set_int_wr_callback(*device, DEVCB2_##_write);
60	60
61		#define CRT9007_INTERFACE(name) \
62		const crt9007_interface (name) =
	61	#define MCFG_CRT9007_DMAR_CALLBACK(_write) \
	62	devcb = &crt9007_t::set_dmar_wr_callback(*device, DEVCB2_##_write);
63	63
	64	#define MCFG_CRT9007_VS_CALLBACK(_write) \
	65	devcb = &crt9007_t::set_vs_wr_callback(*device, DEVCB2_##_write);
64	66
	67	#define MCFG_CRT9007_HS_CALLBACK(_write) \
	68	devcb = &crt9007_t::set_hs_wr_callback(*device, DEVCB2_##_write);
65	69
66		//**************************************************************************
67		//  TYPE DEFINITIONS
68		//**************************************************************************
	70	#define MCFG_CRT9007_VLT_CALLBACK(_write) \
	71	devcb = &crt9007_t::set_vlt_wr_callback(*device, DEVCB2_##_write);
69	72
	73	#define MCFG_CRT9007_CURS_CALLBACK(_write) \
	74	devcb = &crt9007_t::set_curs_wr_callback(*device, DEVCB2_##_write);
70	75
71		// ======================> crt9007_interface
	76	#define MCFG_CRT9007_DRB_CALLBACK(_write) \
	77	devcb = &crt9007_t::set_drb_wr_callback(*device, DEVCB2_##_write);
72	78
73		struct crt9007_interface
74		{
75		int hpixels_per_column;     /* number of pixels per video memory address */
	79	#define MCFG_CRT9007_CBLANK_CALLBACK(_write) \
	80	devcb = &crt9007_t::set_cblank_wr_callback(*device, DEVCB2_##_write);
76	81
77		devcb_write_line        m_out_int_cb;
78		devcb_write_line        m_out_dmar_cb;
	82	#define MCFG_CRT9007_SLG_CALLBACK(_write) \
	83	devcb = &crt9007_t::set_slg_wr_callback(*device, DEVCB2_##_write);
79	84
80		devcb_write_line        m_out_vs_cb;
81		devcb_write_line        m_out_hs_cb;
	85	#define MCFG_CRT9007_SLD_CALLBACK(_write) \
	86	devcb = &crt9007_t::set_sld_wr_callback(*device, DEVCB2_##_write);
82	87
83		devcb_write_line        m_out_vlt_cb;
84		devcb_write_line        m_out_curs_cb;
85		devcb_write_line        m_out_drb_cb;
86		devcb_write_line        m_out_cblank_cb;
87	88
88		devcb_write_line        m_out_slg_cb;
89		devcb_write_line        m_out_sld_cb;
90		};
91	89
	90	//**************************************************************************
	91	//  TYPE DEFINITIONS
	92	//**************************************************************************
92	93
	94	// ======================> crt9007_t
93	95
94		// ======================> crt9007_device
95
96		class crt9007_device :  public device_t,
97		public device_memory_interface,
98		public device_video_interface,
99		public crt9007_interface
	96	class crt9007_t :  public device_t,
	97	public device_memory_interface,
	98	public device_video_interface
100	99	{
101	100	public:
102	101	// construction/destruction
103		crt9007_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	102	crt9007_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
104	103
	104	static void static_set_character_width(device_t &device, int value) { downcast<crt9007_t &>(device).m_hpixels_per_column = value; }
	105
	106	template<class _Object> static devcb2_base &set_int_wr_callback(device_t &device, _Object object) { return downcast<crt9007_t &>(device).m_write_int.set_callback(object); }
	107	template<class _Object> static devcb2_base &set_dmar_wr_callback(device_t &device, _Object object) { return downcast<crt9007_t &>(device).m_write_dmar.set_callback(object); }
	108	template<class _Object> static devcb2_base &set_vs_wr_callback(device_t &device, _Object object) { return downcast<crt9007_t &>(device).m_write_vs.set_callback(object); }
	109	template<class _Object> static devcb2_base &set_hs_wr_callback(device_t &device, _Object object) { return downcast<crt9007_t &>(device).m_write_hs.set_callback(object); }
	110	template<class _Object> static devcb2_base &set_vlt_wr_callback(device_t &device, _Object object) { return downcast<crt9007_t &>(device).m_write_vlt.set_callback(object); }
	111	template<class _Object> static devcb2_base &set_curs_wr_callback(device_t &device, _Object object) { return downcast<crt9007_t &>(device).m_write_curs.set_callback(object); }
	112	template<class _Object> static devcb2_base &set_drb_wr_callback(device_t &device, _Object object) { return downcast<crt9007_t &>(device).m_write_drb.set_callback(object); }
	113	template<class _Object> static devcb2_base &set_cblank_wr_callback(device_t &device, _Object object) { return downcast<crt9007_t &>(device).m_write_cblank.set_callback(object); }
	114	template<class _Object> static devcb2_base &set_slg_wr_callback(device_t &device, _Object object) { return downcast<crt9007_t &>(device).m_write_slg.set_callback(object); }
	115	template<class _Object> static devcb2_base &set_sld_wr_callback(device_t &device, _Object object) { return downcast<crt9007_t &>(device).m_write_sld.set_callback(object); }
	116
105	117	DECLARE_READ8_MEMBER( read );
106	118	DECLARE_WRITE8_MEMBER( write );
107	119	DECLARE_WRITE_LINE_MEMBER( ack_w );
108	120	DECLARE_WRITE_LINE_MEMBER( lpstb_w );
109		DECLARE_READ_LINE_MEMBER( vlt_r );
110		DECLARE_READ_LINE_MEMBER( wben_r );
111	121
112		void set_hpixels_per_column(int hpixels_per_column);
	122	void set_character_width(int value);
113	123
114	124	protected:
115	125	// device-level overrides
116		virtual void device_config_complete();
117	126	virtual void device_start();
118	127	virtual void device_reset();
119	128	virtual void device_clock_changed();
r29253	r29254
123	132	virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
124	133
125	134	private:
126		static const device_timer_id TIMER_HSYNC = 0;
127		static const device_timer_id TIMER_VSYNC = 1;
128		static const device_timer_id TIMER_VLT = 2;
129		static const device_timer_id TIMER_CURS = 3;
130		static const device_timer_id TIMER_DRB = 4;
131		static const device_timer_id TIMER_DMA = 5;
	135	enum
	136	{
	137	TIMER_HSYNC,
	138	TIMER_VSYNC,
	139	TIMER_VLT,
	140	TIMER_CURS,
	141	TIMER_DRB,
	142	TIMER_DMA
	143	};
132	144
133	145	inline UINT8 readbyte(offs_t address);
134	146
r29253	r29254
143	155
144	156	inline void recompute_parameters();
145	157
146		devcb_resolved_write_line   m_out_int_func;
147		devcb_resolved_write_line   m_out_dmar_func;
148		devcb_resolved_write_line   m_out_hs_func;
149		devcb_resolved_write_line   m_out_vs_func;
150		devcb_resolved_write_line   m_out_vlt_func;
151		devcb_resolved_write_line   m_out_curs_func;
152		devcb_resolved_write_line   m_out_drb_func;
153		devcb_resolved_write_line   m_out_cblank_func;
154		devcb_resolved_write_line   m_out_slg_func;
155		devcb_resolved_write_line   m_out_sld_func;
	158	// address space configurations
	159	const address_space_config      m_space_config;
156	160
	161	devcb2_write_line   m_write_int;
	162	devcb2_write_line   m_write_dmar;
	163	devcb2_write_line   m_write_hs;
	164	devcb2_write_line   m_write_vs;
	165	devcb2_write_line   m_write_vlt;
	166	devcb2_write_line   m_write_curs;
	167	devcb2_write_line   m_write_drb;
	168	devcb2_write_line   m_write_cblank;
	169	devcb2_write_line   m_write_slg;
	170	devcb2_write_line   m_write_sld;
	171
157	172	// registers
158	173	UINT8 m_reg[0x3d];
159	174	UINT8 m_status;
r29253	r29254
175	190	int m_cblank;
176	191	int m_vlt;
177	192	int m_drb;
178		int m_wben;
	193	//int m_wben;
179	194	//int m_slg;
180	195	//int m_sld;
181	196	int m_lpstb;
r29253	r29254
194	209	emu_timer *m_curs_timer;
195	210	emu_timer *m_drb_timer;
196	211	emu_timer *m_dma_timer;
197
198		// address space configurations
199		const address_space_config      m_space_config;
200	212	};
201	213
202	214

trunk/src/emu/video/crt9212.c

r29253	r29254
9	9
10	10	**********************************************************************/
11	11
12		#include "emu.h"
13		#include "crt9212.h"
	12	/*
14	13
	14	TODO:
15	15
	16	- RCLK and WCLK are clocked simultaneously since that's what tandy2k does and we have no other users
16	17
17		//**************************************************************************
18		//  MACROS / CONSTANTS
19		//**************************************************************************
	18	*/
20	19
21		#define LOG 0
	20	#include "crt9212.h"
22	21
23	22
24		#define REN \
25		m_in_ren_cb()
26	23
27		#define WEN \
28		m_in_wen_cb()
	24	//**************************************************************************
	25	//  DEVICE DEFINITIONS
	26	//**************************************************************************
29	27
30		#define WEN2 \
31		m_in_wen2_cb()
	28	const device_type CRT9212 = &device_creator<crt9212_t>;
32	29
33		#define ROF(_state) \
34		m_out_rof_cb(_state);
35	30
36		#define WOF(_state) \
37		m_out_wof_cb(_state);
38	31
39
40
41	32	//**************************************************************************
42		//  INLINE HELPERS
	33	//  MACROS / CONSTANTS
43	34	//**************************************************************************
44	35
	36	#define LOG 0
45	37
	38
	39
46	40	//**************************************************************************
47	41	//  LIVE DEVICE
48	42	//**************************************************************************
49	43
50		// device type definition
51		const device_type CRT9212 = &device_creator<crt9212_device>;
52
53	44	//-------------------------------------------------
54		//  crt9212_device - constructor
	45	//  crt9212_t - constructor
55	46	//-------------------------------------------------
56	47
57		crt9212_device::crt9212_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
58		: device_t(mconfig, CRT9212, "SMC CRT9212", tag, owner, clock, "crt9212", __FILE__),
59		m_out_rof_cb(*this),
60		m_out_wof_cb(*this),
61		m_in_ren_cb(*this),
62		m_in_wen_cb(*this),
63		m_in_wen2_cb(*this)
	48	crt9212_t::crt9212_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
	49	device_t(mconfig, CRT9212, "SMC CRT9212", tag, owner, clock, "crt9212", __FILE__),
	50	m_write_dout(*this),
	51	m_write_rof(*this),
	52	m_write_wof(*this),
	53	m_data(0),
	54	m_clrcnt(0),
	55	m_tog(0),
	56	m_ren(0),
	57	m_wen1(1),
	58	m_wen2(0),
	59	m_oe(0),
	60	m_rclk(0),
	61	m_wclk(0),
	62	m_buffer(0),
	63	m_rac(0),
	64	m_wac(0)
64	65	{
65	66	}
66	67
	68
67	69	//-------------------------------------------------
68	70	//  device_start - device-specific startup
69	71	//-------------------------------------------------
70	72
71		void crt9212_device::device_start()
	73	void crt9212_t::device_start()
72	74	{
73	75	// resolve callbacks
74		m_out_rof_cb.resolve_safe();
75		m_out_wof_cb.resolve_safe();
76		m_in_ren_cb.resolve_safe(0);
77		m_in_wen_cb.resolve_safe(0);
78		m_in_wen2_cb.resolve_safe(0);
	76	m_write_dout.resolve_safe();
	77	m_write_rof.resolve_safe();
	78	m_write_wof.resolve_safe();
79	79
80		// register for state saving
81		save_item(NAME(m_input));
82		save_item(NAME(m_output));
83		save_item(NAME(m_buffer));
84		save_item(NAME(m_rac));
85		save_item(NAME(m_wac));
86		save_item(NAME(m_tog));
	80	// allocate timers
	81	m_rwclk_timer = timer_alloc();
	82
	83	if (clock())
	84	{
	85	m_rwclk_timer->adjust(attotime::from_hz(clock()), 0, attotime::from_hz(clock()));
	86	}
	87
	88	// state saving
	89	save_item(NAME(m_data));
87	90	save_item(NAME(m_clrcnt));
	91	save_item(NAME(m_tog));
	92	save_item(NAME(m_ren));
	93	save_item(NAME(m_wen1));
	94	save_item(NAME(m_wen2));
	95	save_item(NAME(m_oe));
88	96	save_item(NAME(m_rclk));
89	97	save_item(NAME(m_wclk));
	98	save_item(NAME(m_ram[0]));
	99	save_item(NAME(m_ram[1]));
	100	save_item(NAME(m_buffer));
	101	save_item(NAME(m_rac));
	102	save_item(NAME(m_wac));
90	103	}
91	104
92	105
93	106	//-------------------------------------------------
94		//  read - buffer read
	107	//  device_clock_changed - handle clock change
95	108	//-------------------------------------------------
96	109
97		READ8_MEMBER( crt9212_device::read )
	110	void crt9212_t::device_clock_changed()
98	111	{
99		return m_output;
	112	m_rwclk_timer->adjust(attotime::from_hz(clock()), 0, attotime::from_hz(clock()));
100	113	}
101	114
102	115
103	116	//-------------------------------------------------
104		//  write - buffer write
	117	//  device_timer - handle timer events
105	118	//-------------------------------------------------
106	119
107		WRITE8_MEMBER( crt9212_device::write )
	120	void crt9212_t::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
108	121	{
109		m_input = data;
110		}
	122	rclk_w(1);
	123	rclk_w(0);
111	124
112
113		//-------------------------------------------------
114		//  clrcnt_w - clear address counters
115		//-------------------------------------------------
116
117		WRITE_LINE_MEMBER( crt9212_device::clrcnt_w )
118		{
119		m_clrcnt = state;
	125	wclk_w(1);
	126	wclk_w(0);
120	127	}
121	128
122	129
123	130	//-------------------------------------------------
124		//  tog_w - toggle buffer
125		//-------------------------------------------------
126
127		WRITE_LINE_MEMBER( crt9212_device::tog_w )
128		{
129		m_tog = state;
130		}
131
132
133		//-------------------------------------------------
134	131	//  rclk_w - read clock
135	132	//-------------------------------------------------
136	133
137		WRITE_LINE_MEMBER( crt9212_device::rclk_w )
	134	WRITE_LINE_MEMBER( crt9212_t::rclk_w )
138	135	{
139	136	if (m_rclk && !state)
140	137	{
r29253	r29254
147	144
148	145	// clear write address counter
149	146	m_wac = 0;
150		WOF(0);
	147	m_write_wof(0);
151	148	}
152	149	else
153	150	{
154	151	// clear read address counter
155	152	m_rac = 0;
156		ROF(0);
	153	m_write_rof(0);
157	154	}
158	155	}
159	156	else
160	157	{
161		if (REN && (m_rac < CRT9212_RAM_SIZE))
	158	if (m_ren && (m_rac < CRT9212_RAM_SIZE))
162	159	{
163	160	//
164		m_output = m_ram[m_rac][!m_buffer];
	161	m_write_dout(m_ram[m_rac][!m_buffer]);
165	162
166	163	// increment read address counter
167	164	m_rac++;
r29253	r29254
169	166	if (m_rac == CRT9212_RAM_SIZE)
170	167	{
171	168	// set read overflow
172		ROF(1);
	169	m_write_rof(1);
173	170	}
174	171	}
175	172	}
r29253	r29254
183	180	//  wclk_w - write clock
184	181	//-------------------------------------------------
185	182
186		WRITE_LINE_MEMBER( crt9212_device::wclk_w )
	183	WRITE_LINE_MEMBER( crt9212_t::wclk_w )
187	184	{
188		if (!m_rclk && state)
	185	if (!m_wclk && state)
189	186	{
190		if (WEN && WEN2 && (m_wac < CRT9212_RAM_SIZE))
	187	if (m_wen1 && m_wen2 && (m_wac < CRT9212_RAM_SIZE))
191	188	{
192	189	//
193		m_ram[m_rac][m_buffer] = m_input;
	190	m_ram[m_rac][m_buffer] = m_data;
194	191
195	192	// increment read address counter
196	193	m_wac++;
r29253	r29254
198	195	if (m_wac == CRT9212_RAM_SIZE)
199	196	{
200	197	// set write overflow
201		WOF(1);
	198	m_write_wof(1);
202	199	}
203	200	}
204	201	}

trunk/src/emu/video/crt9212.h

r29253	r29254
47	47	//  INTERFACE CONFIGURATION MACROS
48	48	//**************************************************************************
49	49
50		#define MCFG_CRT9212_OUT_ROF_CB(_devcb) \
51		devcb = &crt9212_device::set_out_rof_callback(*device, DEVCB2_##_devcb);
	50	#define MCFG_CRT9212_DOUT_CALLBACK(_write) \
	51	devcb = &crt9212_t::set_dout_wr_callback(*device, DEVCB2_##_write);
52	52
53		#define MCFG_CRT9212_OUT_WOF_CB(_devcb) \
54		devcb = &crt9212_device::set_out_wof_callback(*device, DEVCB2_##_devcb);
55
56		#define MCFG_CRT9212_IN_REN_CB(_devcb) \
57		devcb = &crt9212_device::set_in_ren_callback(*device, DEVCB2_##_devcb);
	53	#define MCFG_CRT9212_ROF_CALLBACK(_write) \
	54	devcb = &crt9212_t::set_rof_wr_callback(*device, DEVCB2_##_write);
58	55
59		#define MCFG_CRT9212_IN_WEN_CB(_devcb) \
60		devcb = &crt9212_device::set_in_wen_callback(*device, DEVCB2_##_devcb);
	56	#define MCFG_CRT9212_WOF_CALLBACK(_write) \
	57	devcb = &crt9212_t::set_wof_wr_callback(*device, DEVCB2_##_write);
61	58
62		#define MCFG_CRT9212_IN_WEN2_CB(_devcb) \
63		devcb = &crt9212_device::set_in_wen2_callback(*device, DEVCB2_##_devcb);
64	59
65	60
66	61	//**************************************************************************
67	62	//  TYPE DEFINITIONS
68	63	//**************************************************************************
69	64
70		// ======================> crt9212_device
	65	// ======================> crt9212_t
71	66
72		class crt9212_device :  public device_t
	67	class crt9212_t :  public device_t
73	68	{
74	69	public:
75	70	// construction/destruction
76		crt9212_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	71	crt9212_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
77	72
78		template<class _Object> static devcb2_base &set_out_rof_callback(device_t &device, _Object object) { return downcast<crt9212_device &>(device).m_out_rof_cb.set_callback(object); }
79		template<class _Object> static devcb2_base &set_out_wof_callback(device_t &device, _Object object) { return downcast<crt9212_device &>(device).m_out_wof_cb.set_callback(object); }
80		template<class _Object> static devcb2_base &set_in_ren_callback(device_t &device, _Object object) { return downcast<crt9212_device &>(device).m_in_ren_cb.set_callback(object); }
81		template<class _Object> static devcb2_base &set_in_wen_callback(device_t &device, _Object object) { return downcast<crt9212_device &>(device).m_in_wen_cb.set_callback(object); }
82		template<class _Object> static devcb2_base &set_in_wen2_callback(device_t &device, _Object object) { return downcast<crt9212_device &>(device).m_in_wen2_cb.set_callback(object); }
	73	template<class _Object> static devcb2_base &set_dout_wr_callback(device_t &device, _Object object) { return downcast<crt9212_t &>(device).m_write_dout.set_callback(object); }
	74	template<class _Object> static devcb2_base &set_rof_wr_callback(device_t &device, _Object object) { return downcast<crt9212_t &>(device).m_write_rof.set_callback(object); }
	75	template<class _Object> static devcb2_base &set_wof_wr_callback(device_t &device, _Object object) { return downcast<crt9212_t &>(device).m_write_wof.set_callback(object); }
83	76
84		DECLARE_READ8_MEMBER( read );
85		DECLARE_WRITE8_MEMBER( write );
86		DECLARE_WRITE_LINE_MEMBER( clrcnt_w );
87		DECLARE_WRITE_LINE_MEMBER( tog_w );
	77	DECLARE_WRITE8_MEMBER( write ) { m_data = data; }
	78	DECLARE_WRITE_LINE_MEMBER( clrcnt_w ) { m_clrcnt = state; }
	79	DECLARE_WRITE_LINE_MEMBER( tog_w ) { m_tog = state; }
	80	DECLARE_WRITE_LINE_MEMBER( ren_w ) { m_ren = state; }
	81	DECLARE_WRITE_LINE_MEMBER( wen1_w ) { m_wen1 = state; }
	82	DECLARE_WRITE_LINE_MEMBER( wen2_w ) { m_wen2 = state; }
	83	DECLARE_WRITE_LINE_MEMBER( oe_w ) { m_oe = state; }
88	84	DECLARE_WRITE_LINE_MEMBER( rclk_w );
89	85	DECLARE_WRITE_LINE_MEMBER( wclk_w );
90	86
91	87	protected:
92	88	// device-level overrides
93	89	virtual void device_start();
	90	virtual void device_clock_changed();
	91	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
94	92
95	93	private:
96		devcb2_write_line        m_out_rof_cb;
97		devcb2_write_line        m_out_wof_cb;
98		devcb2_read_line         m_in_ren_cb;
99		devcb2_read_line         m_in_wen_cb;
100		devcb2_read_line         m_in_wen2_cb;
	94	devcb2_write8         m_write_dout;
	95	devcb2_write_line       m_write_rof;
	96	devcb2_write_line       m_write_wof;
101	97
	98	// inputs
	99	UINT8 m_data;
	100	int m_clrcnt;
	101	int m_tog;
	102	int m_ren;
	103	int m_wen1;
	104	int m_wen2;
	105	int m_oe;
	106	int m_rclk;
	107	int m_wclk;
	108
	109	// internal state
102	110	UINT8 m_ram[CRT9212_RAM_SIZE][2];
103
104		UINT8 m_input;
105		UINT8 m_output;
106
107	111	int m_buffer;
108	112	int m_rac;
109	113	int m_wac;
110		int m_tog;
111		int m_clrcnt;
112		int m_rclk;
113		int m_wclk;
	114
	115	// timers
	116	emu_timer *m_rwclk_timer;
114	117	};
115	118
116	119

trunk/src/emu/video/crt9021.c

r29253	r29254
14	14	TODO:
15	15
16	16	- attributes
17		- reverse video
18		- character blank
19	17	- character blink
20	18	- underline
21	19	- full/half intensity
r29253	r29254
26	24	- character mode w/underline
27	25	- double height characters
28	26	- double width characters
29		- parallel scan line
30	27	- serial scan line
31	28	- cursor
32	29	- underline
r29253	r29254
35	32	- blinking reverse video
36	33	- programmable character blink rate (75/25 duty)
37	34	- programmable cursor blink rate (50/50 duty)
38		- data/attribute latches
	35	- attribute latches
39	36
40	37	*/
41	38
42		#include "emu.h"
43	39	#include "crt9021.h"
44	40
45	41
46		// device type definition
47		const device_type CRT9021 = &device_creator<crt9021_device>;
48
49
50	42	//**************************************************************************
51		//  MACROS / CONSTANTS
	43	//  DEVICE DEFINITIONS
52	44	//**************************************************************************
53	45
54		#define LOG 0
	46	const device_type CRT9021 = &device_creator<crt9021_t>;
55	47
56	48
57		// attributes
58		enum
59		{
60		ATTRIBUTE_REVID = 0x80,
61		ATTRIBUTE_INT   = 0x40,
62		ATTRIBUTE_BLINK = 0x20,
63		ATTRIBUTE_MS1   = 0x10,
64		ATTRIBUTE_MS0   = 0x08,
65		ATTRIBUTE_CHABL = 0x04,
66		ATTRIBUTE_BKC   = 0x02,
67		ATTRIBUTE_BLC   = 0x01
68		};
69	49
70
71
72	50	//**************************************************************************
73		//  INLINE HELPERS
	51	//  MACROS / CONSTANTS
74	52	//**************************************************************************
75	53
	54	#define LOG 0
76	55
77	56
	57
78	58	//**************************************************************************
79	59	//  LIVE DEVICE
80	60	//**************************************************************************
81	61
82	62	//-------------------------------------------------
83		//  crt9021_device - constructor
	63	//  crt9021_t - constructor
84	64	//-------------------------------------------------
85	65
86		crt9021_device::crt9021_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
87		: device_t(mconfig, CRT9021, "SMC CRT9021", tag, owner, clock, "crt9021", __FILE__),
88		device_video_interface(mconfig, *this),
89		m_in_data_cb(*this),
90		m_in_attr_cb(*this),
91		m_in_atten_cb(*this)
	66	crt9021_t::crt9021_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
	67	device_t(mconfig, CRT9021, "SMC CRT9021", tag, owner, clock, "crt9021", __FILE__),
	68	device_video_interface(mconfig, *this),
	69	m_data(0),
	70	m_ms0(0),
	71	m_ms1(0),
	72	m_revid(0),
	73	m_chabl(0),
	74	m_blink(0),
	75	m_intin(0),
	76	m_atten(0),
	77	m_cursor(0),
	78	m_retbl(0),
	79	m_ld_sh(1),
	80	m_sld(1),
	81	m_slg(0),
	82	m_blc(0),
	83	m_bkc(0),
	84	m_sl0(0),
	85	m_sl1(0),
	86	m_sl2(0),
	87	m_sl3(0),
	88	m_vsync(0),
	89	m_sr(0),
	90	m_intout(0)
92	91	{
93	92	}
94	93
r29253	r29254
97	96	//  device_start - device-specific startup
98	97	//-------------------------------------------------
99	98
100		void crt9021_device::device_start()
	99	void crt9021_t::device_start()
101	100	{
102	101	// allocate timers
	102	m_vdc_timer = timer_alloc();
103	103
104		// resolve callbacks
105		m_in_data_cb.resolve_safe(0);
106		m_in_attr_cb.resolve_safe(0);
107		m_in_atten_cb.resolve_safe(0);
	104	if (!m_display_cb.isnull())
	105	{
	106	m_vdc_timer->adjust(clocks_to_attotime(8), 0, clocks_to_attotime(8));
	107	}
108	108
109		// register for state saving
110		save_item(NAME(m_slg));
111		save_item(NAME(m_sld));
	109	// register bitmap
	110	m_screen->register_screen_bitmap(m_bitmap);
	111
	112	// state saving
	113	save_item(NAME(m_data));
	114	save_item(NAME(m_ms0));
	115	save_item(NAME(m_ms1));
	116	save_item(NAME(m_revid));
	117	save_item(NAME(m_chabl));
	118	save_item(NAME(m_blink));
	119	save_item(NAME(m_intin));
	120	save_item(NAME(m_atten));
112	121	save_item(NAME(m_cursor));
113	122	save_item(NAME(m_retbl));
	123	save_item(NAME(m_ld_sh));
	124	save_item(NAME(m_sld));
	125	save_item(NAME(m_slg));
	126	save_item(NAME(m_blc));
	127	save_item(NAME(m_bkc));
	128	save_item(NAME(m_sl0));
	129	save_item(NAME(m_sl1));
	130	save_item(NAME(m_sl2));
	131	save_item(NAME(m_sl3));
114	132	save_item(NAME(m_vsync));
	133	save_item(NAME(m_sr));
	134	save_item(NAME(m_intout));
	135	save_item(NAME(m_sld));
115	136	}
116	137
117	138
r29253	r29254
119	140	//  device_clock_changed - handle clock change
120	141	//-------------------------------------------------
121	142
122		void crt9021_device::device_clock_changed()
	143	void crt9021_t::device_clock_changed()
123	144	{
	145	if (!m_display_cb.isnull())
	146	{
	147	m_vdc_timer->adjust(clocks_to_attotime(8), 0, clocks_to_attotime(8));
	148	}
124	149	}
125	150
126	151
r29253	r29254
128	153	//  device_timer - handle timer events
129	154	//-------------------------------------------------
130	155
131		void crt9021_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
	156	void crt9021_t::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
132	157	{
	158	m_display_cb(m_bitmap, m_screen->vpos(), m_screen->hpos(), m_sr, m_intout);
133	159	}
134	160
135	161
136	162	//-------------------------------------------------
137		//  slg_w - scan line gate
	163	//  ld_sh_w - load/shift
138	164	//-------------------------------------------------
139	165
140		WRITE_LINE_MEMBER( crt9021_device::slg_w )
	166	WRITE_LINE_MEMBER( crt9021_t::ld_sh_w )
141	167	{
142		if (LOG) logerror("CRT9021 '%s' SLG: %u\n", tag(), state);
	168	if (LOG) logerror("CRT9021 '%s' LD/SH: %u\n", tag(), state);
143	169
144		m_slg = state;
145		}
	170	if (!m_ld_sh && state)
	171	{
	172	// shift in scanline data
	173	if (!m_slg)
	174	{
	175	m_sl >>= 1;
	176	m_sl |= m_sld << 3;
	177	}
146	178
	179	// latch data
	180	if (m_retbl)
	181	{
	182	m_sr = 0;
	183	}
	184	else
	185	{
	186	m_sr = m_chabl ? 0 : m_data;
147	187
148		//-------------------------------------------------
149		//  sld_w - scan line data
150		//-------------------------------------------------
	188	if (m_revid) m_sr ^= 0xff;
	189	}
151	190
152		WRITE_LINE_MEMBER( crt9021_device::sld_w )
153		{
154		if (LOG) logerror("CRT9021 '%s' SLG: %u\n", tag(), state);
155
156		if (!m_slg)
157		{
158		m_sld <<= 1;
159		m_sld |= state;
	191	// latch attributes
	192	if (m_atten)
	193	{
	194	// TODO
	195	}
160	196	}
161	197	}
162	198
163	199
164	200	//-------------------------------------------------
165		//  cursor_w - cursor
166		//-------------------------------------------------
167
168		WRITE_LINE_MEMBER( crt9021_device::cursor_w )
169		{
170		if (LOG) logerror("CRT9021 '%s' CURSOR: %u\n", tag(), state);
171
172		m_cursor = state;
173		}
174
175
176		//-------------------------------------------------
177		//  retbl_w - retrace blank
178		//-------------------------------------------------
179
180		WRITE_LINE_MEMBER( crt9021_device::retbl_w )
181		{
182		if (LOG) logerror("CRT9021 '%s' RETBL: %u\n", tag(), state);
183
184		m_retbl = state;
185		}
186
187
188		//-------------------------------------------------
189	201	//  vsync_w - vertical sync
190	202	//-------------------------------------------------
191	203
192		WRITE_LINE_MEMBER( crt9021_device::vsync_w )
	204	WRITE_LINE_MEMBER( crt9021_t::vsync_w )
193	205	{
194	206	if (LOG) logerror("CRT9021 '%s' VSYNC: %u\n", tag(), state);
195
196		m_vsync = state;
197	207	}
198	208
199	209
r29253	r29254
201	211	//  screen_update - update screen
202	212	//-------------------------------------------------
203	213
204		UINT32 crt9021_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
	214	UINT32 crt9021_t::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
205	215	{
	216	m_bitmap.fill(rgb_t::black, cliprect);
	217
206	218	return 0;
207	219	}

trunk/src/emu/video/crt9021.h

r29253	r29254
36	36
37	37
38	38	//**************************************************************************
39		//  MACROS / CONSTANTS
	39	//  INTERFACE CONFIGURATION MACROS
40	40	//**************************************************************************
41	41
	42	#define CRT9021_DRAW_CHARACTER_MEMBER(_name) void _name(bitmap_rgb32 &bitmap, int y, int x, UINT8 data, int intout)
42	43
43	44
	45	#define MCFG_CRT9021_DRAW_CHARACTER_CALLBACK_OWNER(_class, _method) \
	46	crt9021_t::static_set_display_callback(*device, crt9021_draw_character_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
44	47
	48
45	49	//**************************************************************************
46		//  INTERFACE CONFIGURATION MACROS
	50	//  TYPE DEFINITIONS
47	51	//**************************************************************************
48	52
49		#define MCFG_CRT9021_IN_DATA_CB(_devcb) \
50		devcb = &crt9021_device::set_in_data_callback(*device, DEVCB2_##_devcb);
	53	typedef device_delegate<void (bitmap_rgb32 &bitmap, int y, int x, UINT8 data, int intout)> crt9021_draw_character_delegate;
51	54
52		#define MCFG_CRT9021_IN_ATTR_CB(_devcb) \
53		devcb = &crt9021_device::set_in_attr_callback(*device, DEVCB2_##_devcb);
54	55
55		#define MCFG_CRT9021_IN_ATTEN_CB(_devcb) \
56		devcb = &crt9021_device::set_in_atten_callback(*device, DEVCB2_##_devcb);
	56	// ======================> crt9021_t
57	57
58		//**************************************************************************
59		//  TYPE DEFINITIONS
60		//**************************************************************************
61
62		// ======================> crt9021_device
63
64		class crt9021_device :  public device_t,
65		public device_video_interface
	58	class crt9021_t :  public device_t,
	59	public device_video_interface
66	60	{
67	61	public:
68	62	// construction/destruction
69		crt9021_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
	63	crt9021_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
70	64
71		template<class _Object> static devcb2_base &set_in_data_callback(device_t &device, _Object object) { return downcast<crt9021_device &>(device).m_in_data_cb.set_callback(object); }
72		template<class _Object> static devcb2_base &set_in_attr_callback(device_t &device, _Object object) { return downcast<crt9021_device &>(device).m_in_attr_cb.set_callback(object); }
73		template<class _Object> static devcb2_base &set_in_atten_callback(device_t &device, _Object object) { return downcast<crt9021_device &>(device).m_in_atten_cb.set_callback(object); }
	65	static void static_set_display_callback(device_t &device, crt9021_draw_character_delegate callback) { downcast<crt9021_t &>(device).m_display_cb = callback; }
74	66
75		DECLARE_WRITE_LINE_MEMBER( slg_w );
76		DECLARE_WRITE_LINE_MEMBER( sld_w );
77		DECLARE_WRITE_LINE_MEMBER( cursor_w );
78		DECLARE_WRITE_LINE_MEMBER( retbl_w );
	67	DECLARE_WRITE8_MEMBER( write ) { m_data = data; }
	68	DECLARE_WRITE_LINE_MEMBER( ms0_w ) { m_ms0 = state; }
	69	DECLARE_WRITE_LINE_MEMBER( ms1_w ) { m_ms1 = state; }
	70	DECLARE_WRITE_LINE_MEMBER( revid_w ) { m_revid = state; }
	71	DECLARE_WRITE_LINE_MEMBER( chabl_w ) { m_chabl = state; }
	72	DECLARE_WRITE_LINE_MEMBER( blink_w ) { m_blink = state; }
	73	DECLARE_WRITE_LINE_MEMBER( intin_w ) { m_intin = state; }
	74	DECLARE_WRITE_LINE_MEMBER( atten_w ) { m_atten = state; }
	75	DECLARE_WRITE_LINE_MEMBER( cursor_w ) { m_cursor = state; }
	76	DECLARE_WRITE_LINE_MEMBER( retbl_w ) { m_retbl = state; }
	77	DECLARE_WRITE_LINE_MEMBER( ld_sh_w );
	78	DECLARE_WRITE_LINE_MEMBER( sld_w ) { m_sld = state; }
	79	DECLARE_WRITE_LINE_MEMBER( slg_w ) { m_slg = state; }
	80	DECLARE_WRITE_LINE_MEMBER( blc_w ) { m_blc = state; }
	81	DECLARE_WRITE_LINE_MEMBER( bkc_w ) { m_bkc = state; }
	82	DECLARE_WRITE_LINE_MEMBER( sl0_w ) { m_sl0 = state; }
	83	DECLARE_WRITE_LINE_MEMBER( sl1_w ) { m_sl1 = state; }
	84	DECLARE_WRITE_LINE_MEMBER( sl2_w ) { m_sl2 = state; }
	85	DECLARE_WRITE_LINE_MEMBER( sl3_w ) { m_sl3 = state; }
79	86	DECLARE_WRITE_LINE_MEMBER( vsync_w );
80	87
81	88	UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
r29253	r29254
87	94	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
88	95
89	96	private:
90		devcb2_read8             m_in_data_cb;
91		devcb2_read8             m_in_attr_cb;
	97	enum
	98	{
	99	MS_WIDE_GRAPHICS,
	100	MS_CHARACTER,
	101	MS_THIN_GRAPHICS,
	102	MS_UNDERLINE
	103	};
92	104
93		devcb2_read_line         m_in_atten_cb;
	105	crt9021_draw_character_delegate m_display_cb;
94	106
95		int m_slg;
96		int m_sld;
	107	bitmap_rgb32 m_bitmap;
	108
	109	// inputs
	110	UINT8 m_data;
	111	int m_ms0;
	112	int m_ms1;
	113	int m_revid;
	114	int m_chabl;
	115	int m_blink;
	116	int m_intin;
	117	int m_atten;
97	118	int m_cursor;
98	119	int m_retbl;
	120	int m_ld_sh;
	121	int m_sld;
	122	int m_slg;
	123	int m_blc;
	124	int m_bkc;
	125	int m_sl0;
	126	int m_sl1;
	127	int m_sl2;
	128	int m_sl3;
99	129	int m_vsync;
	130
	131	// outputs
	132	UINT8 m_sr;
	133	int m_intout;
	134	int m_sl;
	135
	136	// timers
	137	emu_timer *m_vdc_timer;
100	138	};
101	139
102	140

trunk/src/mess/includes/tandy2k.h

r29253	r29254
41	41	class tandy2k_state : public driver_device
42	42	{
43	43	public:
44		tandy2k_state(const machine_config &mconfig, device_type type, const char *tag)
45		: driver_device(mconfig, type, tag),
	44	tandy2k_state(const machine_config &mconfig, device_type type, const char *tag) :
	45	driver_device(mconfig, type, tag),
46	46	m_maincpu(*this, I80186_TAG),
47	47	m_uart(*this, I8251A_TAG),
48	48	m_i8255a(*this, I8255A_TAG),
r29253	r29254
73	73	required_device<i8272a_device> m_fdc;
74	74	required_device<pic8259_device> m_pic0;
75	75	required_device<pic8259_device> m_pic1;
76		required_device<crt9007_device> m_vpac;
77		required_device<crt9212_device> m_drb0;
78		required_device<crt9212_device> m_drb1;
79		required_device<crt9021_device> m_vac;
	76	required_device<crt9007_t> m_vpac;
	77	required_device<crt9212_t> m_drb0;
	78	required_device<crt9212_t> m_drb1;
	79	required_device<crt9021_t> m_vac;
80	80	required_device<centronics_device> m_centronics;
81	81	required_device<speaker_sound_device> m_speaker;
82	82	required_device<ram_device> m_ram;
r29253	r29254
115	115	DECLARE_WRITE_LINE_MEMBER( kbddat_w );
116	116	DECLARE_READ8_MEMBER( irq_callback );
117	117	DECLARE_WRITE_LINE_MEMBER( fdc_drq );
	118	DECLARE_WRITE8_MEMBER( drb_attr_w );
118	119
119	120	/* DMA state */
120	121	UINT8 m_dma_mux;

trunk/src/mess/drivers/tandy2k.c

r29253	r29254
235	235
236	236	if (m_clkcnt != BIT(data, 6))
237	237	{
238		m_vpac->set_hpixels_per_column(character_width);
	238	m_vpac->set_character_width(character_width);
239	239	m_clkcnt = BIT(data, 6);
240	240	}
241	241
r29253	r29254
279	279	AM_RANGE(0x00060, 0x00063) AM_DEVREADWRITE8(I8259A_0_TAG, pic8259_device, read, write, 0x00ff)
280	280	AM_RANGE(0x00070, 0x00073) AM_DEVREADWRITE8(I8259A_1_TAG, pic8259_device, read, write, 0x00ff)
281	281	AM_RANGE(0x00080, 0x00081) AM_DEVREADWRITE8(I8272A_TAG, i8272a_device, mdma_r, mdma_w, 0x00ff)
282		//  AM_RANGE(0x00100, 0x0017f) AM_DEVREADWRITE8(CRT9007_TAG, crt9007_device, read, write, 0x00ff) AM_WRITE8(addr_ctrl_w, 0xff00)
	282	//  AM_RANGE(0x00100, 0x0017f) AM_DEVREADWRITE8(CRT9007_TAG, crt9007_t, read, write, 0x00ff) AM_WRITE8(addr_ctrl_w, 0xff00)
283	283	AM_RANGE(0x00100, 0x0017f) AM_READWRITE(vpac_r, vpac_w)
284	284	//  AM_RANGE(0x00180, 0x00180) AM_READ8(hires_status_r, 0x00ff)
285	285	//  AM_RANGE(0x00180, 0x001bf) AM_WRITE(hires_palette_w)
r29253	r29254
353	353	m_drb1->tog_w(state);
354	354	}
355	355
356		static CRT9007_INTERFACE( vpac_intf )
	356	WRITE8_MEMBER( tandy2k_state::drb_attr_w )
357	357	{
358		10,
359		DEVCB_DEVICE_LINE_MEMBER(I8259A_1_TAG, pic8259_device, ir1_w),
360		DEVCB_NULL, // DMAR     80186 HOLD
361		DEVCB_DEVICE_LINE_MEMBER(CRT9021B_TAG, crt9021_device, vsync_w), // VS
362		DEVCB_NULL, // HS
363		DEVCB_DRIVER_LINE_MEMBER(tandy2k_state, vpac_vlt_w), // VLT
364		DEVCB_DEVICE_LINE_MEMBER(CRT9021B_TAG, crt9021_device, cursor_w), // CURS
365		DEVCB_DRIVER_LINE_MEMBER(tandy2k_state, vpac_drb_w), // DRB
366		DEVCB_DEVICE_LINE_MEMBER(CRT9021B_TAG, crt9021_device, retbl_w), // CBLANK
367		DEVCB_DEVICE_LINE_MEMBER(CRT9021B_TAG, crt9021_device, slg_w), // SLG
368		DEVCB_DEVICE_LINE_MEMBER(CRT9021B_TAG, crt9021_device, sld_w) // SLD
369		};
	358	/*
370	359
	360	bit     description
	361
	362	0       BLC -> DBLC
	363	1       BKC -> DBKC
	364	2       CHABL
	365	3       MS0
	366	4       MS1
	367	5       BLINK
	368	6       INT
	369	7       REVID
	370
	371	*/
	372
	373	m_vac->chabl_w(BIT(data, 2));
	374	m_vac->ms0_w(BIT(data, 3));
	375	m_vac->ms1_w(BIT(data, 4));
	376	m_vac->blink_w(BIT(data, 5));
	377	m_vac->intin_w(BIT(data, 6));
	378	m_vac->revid_w(BIT(data, 7));
	379	}
	380
371	381	// Intel 8251A Interface
372	382
373	383	WRITE_LINE_MEMBER( tandy2k_state::rxrdy_w )
r29253	r29254
632	642	MCFG_SCREEN_SIZE(640, 480)
633	643	MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1)
634	644
635		MCFG_CRT9007_ADD(CRT9007_TAG, XTAL_16MHz*28/16, vpac_intf, vpac_mem)
	645	MCFG_DEVICE_ADD(CRT9007_TAG, CRT9007, XTAL_16MHz*28/16)
	646	MCFG_DEVICE_ADDRESS_MAP(AS_0, vpac_mem)
	647	MCFG_CRT9007_CHARACTER_WIDTH(10)
	648	MCFG_CRT9007_INT_CALLBACK(DEVWRITELINE(I8259A_1_TAG, pic8259_device, ir1_w))
	649	//MCFG_CRT9007_DMAR_CALLBACK(80186 HOLD)
	650	MCFG_CRT9007_VS_CALLBACK(DEVWRITELINE(CRT9021B_TAG, crt9021_t, vsync_w))
	651	MCFG_CRT9007_VLT_CALLBACK(WRITELINE(tandy2k_state, vpac_vlt_w))
	652	MCFG_CRT9007_CURS_CALLBACK(DEVWRITELINE(CRT9021B_TAG, crt9021_t, cursor_w))
	653	MCFG_CRT9007_DRB_CALLBACK(WRITELINE(tandy2k_state, vpac_drb_w))
	654	MCFG_CRT9007_CBLANK_CALLBACK(DEVWRITELINE(CRT9021B_TAG, crt9021_t, retbl_w))
	655	MCFG_CRT9007_SLG_CALLBACK(DEVWRITELINE(CRT9021B_TAG, crt9021_t, slg_w))
	656	MCFG_CRT9007_SLD_CALLBACK(DEVWRITELINE(CRT9021B_TAG, crt9021_t, sld_w))
636	657	MCFG_VIDEO_SET_SCREEN(SCREEN_TAG)
637		MCFG_DEVICE_ADD(CRT9212_0_TAG, CRT9212, 0)
638		// ROF
639		// WOF
640		MCFG_CRT9212_IN_REN_CB(DEVREADLINE(CRT9007_TAG, crt9007_device, vlt_r)) // REN
641		MCFG_CRT9212_IN_WEN_CB(DEVREADLINE(CRT9007_TAG, crt9007_device, wben_r)) // WEN
642		MCFG_CRT9212_IN_WEN2_CB(VCC) // WEN2
643		MCFG_DEVICE_ADD(CRT9212_1_TAG, CRT9212, 0)
644		// ROF
645		// WOF
646		MCFG_CRT9212_IN_REN_CB(DEVREADLINE(CRT9007_TAG, crt9007_device, vlt_r)) // REN
647		MCFG_CRT9212_IN_WEN_CB(DEVREADLINE(CRT9007_TAG, crt9007_device, wben_r)) // WEN
648		MCFG_CRT9212_IN_WEN2_CB(VCC) // WEN2
	658
	659	MCFG_DEVICE_ADD(CRT9212_0_TAG, CRT9212, XTAL_16MHz*28/16/8)
	660	MCFG_CRT9212_DOUT_CALLBACK(DEVWRITE8(CRT9021B_TAG, crt9021_t, write))
	661
	662	MCFG_DEVICE_ADD(CRT9212_1_TAG, CRT9212, XTAL_16MHz*28/16/8)
	663	MCFG_CRT9212_DOUT_CALLBACK(WRITE8(tandy2k_state, drb_attr_w))
	664
649	665	MCFG_DEVICE_ADD(CRT9021B_TAG, CRT9021, XTAL_16MHz*28/16/8)
650		MCFG_CRT9021_IN_DATA_CB(DEVREAD8(CRT9212_0_TAG, crt9212_device, read)) // data
651		MCFG_CRT9021_IN_ATTR_CB(DEVREAD8(CRT9212_1_TAG, crt9212_device, read)) // attributes
652		MCFG_CRT9021_IN_ATTEN_CB(VCC)
653	666	MCFG_VIDEO_SET_SCREEN(SCREEN_TAG)
	667	MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette")
654	668
655	669	// sound hardware
656	670	MCFG_SPEAKER_STANDARD_MONO("mono")

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