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r29240 Friday 4th April, 2014 at 06:38:06 UTC by Miodrag Milanović
- New Z80 CPU derivate Toshiba TLCS-Z80 [Felipe Sanches]

- Improving emulation of SONY PVE-500 video editing station [Felipe Sanches]
[src/emu/cpu]cpu.mak
[src/emu/cpu/z80]tlcs_z80.c* z80.h
[src/mess]mess.mak
[src/mess/drivers]pve500.c
[src/mess/layout]pve500.lay*

trunk/src/emu/cpu/cpu.mak
r29239r29240
22092209
22102210ifneq ($(filter Z80,$(CPUS)),)
22112211OBJDIRS += $(CPUOBJ)/z80
2212CPUOBJS += $(CPUOBJ)/z80/z80.o $(CPUOBJ)/z80/z80daisy.o
2212CPUOBJS += $(CPUOBJ)/z80/z80.o $(CPUOBJ)/z80/tlcs_z80.o $(CPUOBJ)/z80/z80daisy.o
22132213DASMOBJS += $(CPUOBJ)/z80/z80dasm.o
22142214endif
22152215
22162216$(CPUOBJ)/z80/z80.o:    $(CPUSRC)/z80/z80.c \
22172217                  $(CPUSRC)/z80/z80.h
22182218
2219$(CPUOBJ)/z80/tlcs_z80.o:    $(CPUSRC)/z80/tlcs_z80.c \
2220                  $(CPUSRC)/z80/z80.h
22192221
2220
22212222#-------------------------------------------------
22222223# Sharp LR35902 (Game Boy CPU)
22232224#@src/emu/cpu/lr35902/lr35902.h,CPUS += LR35902
trunk/src/emu/cpu/z80/tlcs_z80.c
r0r29240
1/*****************************************************************************
2 *
3 *   tlcs_z80.c
4 *   TOSHIBA TLCS Z80 emulation
5 */
6
7#include "emu.h"
8#include "z80.h"
9#include "machine/z80ctc.h"
10#include "machine/z80pio.h"
11#include "machine/z80sio.h"
12
13//TODO: These interfaces should default to DEVCB_NULL pointers and
14// the actual callbacks should be provided by the driver that instantiates the TLCS-Z80 CPU.
15// We need methods for the driver to provide these interface configurations to the CPU core.
16// something like:
17//  m_tlcsz80->set_internal_ctc_interface (ctc_intf);
18//  m_tlcsz80->set_internal_pio_interface (pio_intf);
19//  m_tlcsz80->set_internal_sio_interface (sio_intf);
20
21static Z80CTC_INTERFACE( ctc_intf )
22{
23   DEVCB_CPU_INPUT_LINE(DEVICE_SELF_OWNER, INPUT_LINE_IRQ0), /* interrupt handler */
24   DEVCB_NULL, /* ZC/TO0 callback */
25   DEVCB_NULL, /* ZC/TO1 callback */
26   DEVCB_NULL  /* ZC/TO2 callback */
27};
28
29static Z80PIO_INTERFACE( pio_intf )
30{
31   DEVCB_CPU_INPUT_LINE(DEVICE_SELF_OWNER, INPUT_LINE_IRQ0),
32   DEVCB_NULL,
33   DEVCB_NULL,
34   DEVCB_NULL,
35   DEVCB_NULL,
36   DEVCB_NULL,
37   DEVCB_NULL
38};
39
40static const z80sio_interface sio_intf =
41{
42   DEVCB_CPU_INPUT_LINE(DEVICE_SELF_OWNER, INPUT_LINE_IRQ0), /* interrupt handler */
43  DEVCB_NULL, /* DTR changed handler */
44   DEVCB_NULL, /* RTS changed handler */
45   DEVCB_NULL, /* BREAK changed handler */
46   DEVCB_NULL, /* transmit handler */
47   DEVCB_NULL  /* receive handler */
48};
49
50/* Daisy Chaining */
51
52static const z80_daisy_config tlcsz80_daisy_chain[] =
53{
54   { TLCSZ80_INTERNAL_CTC_TAG },
55   { TLCSZ80_INTERNAL_PIO_TAG },
56   { TLCSZ80_INTERNAL_SIO_TAG },
57   { NULL }
58};
59
60static ADDRESS_MAP_START( tlcs_z80_internal_io_map, AS_IO, 8, tlcs_z80_device )
61   AM_RANGE(0x10, 0x13) AM_DEVREADWRITE(TLCSZ80_INTERNAL_CTC_TAG, z80ctc_device, read, write)
62   AM_RANGE(0x18, 0x1B) AM_DEVREADWRITE(TLCSZ80_INTERNAL_SIO_TAG, z80sio_device, read, write)
63   AM_RANGE(0x1C, 0x1F) AM_DEVREADWRITE(TLCSZ80_INTERNAL_PIO_TAG, z80pio_device, read, write)
64//   AM_RANGE(0xF0, 0xF0) TODO: Watchdog Timer: Stand-by mode Register
65//   AM_RANGE(0xF1, 0xF1) TODO: Watchdog Timer: command Register
66//   AM_RANGE(0xF4, 0xF4) TODO: Daisy chain interrupt precedence Register
67ADDRESS_MAP_END
68
69//This is wrong!
70//We should use the same clock as declared in the TLCS_Z80 instantiation in the driver that uses it.
71#define TLCS_Z80_CLOCK 8000000
72
73static MACHINE_CONFIG_FRAGMENT( tlcs_z80 )
74   MCFG_Z80CTC_ADD(TLCSZ80_INTERNAL_CTC_TAG, TLCS_Z80_CLOCK, ctc_intf)
75   MCFG_Z80SIO_ADD(TLCSZ80_INTERNAL_SIO_TAG, TLCS_Z80_CLOCK, sio_intf)
76   MCFG_Z80PIO_ADD(TLCSZ80_INTERNAL_PIO_TAG, TLCS_Z80_CLOCK, pio_intf)
77MACHINE_CONFIG_END
78
79tlcs_z80_device::tlcs_z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
80   : z80_device(mconfig, TLCS_Z80, "TLCS-Z80", tag, owner, clock, "tlcs_z80", __FILE__),
81      m_z80ctc(*this, TLCSZ80_INTERNAL_CTC_TAG),
82      m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 8, 0, ADDRESS_MAP_NAME( tlcs_z80_internal_io_map ) )
83   { }
84
85
86WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg0 ) { m_z80ctc->trg0(state ? 0 : 1); }
87WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg1 ) { m_z80ctc->trg1(state ? 0 : 1); }
88WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg2 ) { m_z80ctc->trg2(state ? 0 : 1); }
89WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg3 ) { m_z80ctc->trg3(state ? 0 : 1); }
90
91
92machine_config_constructor tlcs_z80_device::device_mconfig_additions() const
93{
94   return MACHINE_CONFIG_NAME( tlcs_z80 );
95}
96
97const device_type TLCS_Z80 = &device_creator<tlcs_z80_device>;
98
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trunk/src/emu/cpu/z80/z80.h
r29239r29240
44#define __Z80_H__
55
66#include "z80daisy.h"
7#include "machine/z80ctc.h"
78
9#define TLCSZ80_INTERNAL_CTC_TAG      "tlcsz80_int_ctc"
10#define TLCSZ80_INTERNAL_PIO_TAG      "tlcsz80_int_pio"
11#define TLCSZ80_INTERNAL_SIO_TAG      "tlcsz80_int_sio"
12
813enum
914{
1015   NSC800_RSTA = INPUT_LINE_IRQ0 + 1,
r29239r29240
301306
302307extern const device_type NSC800;
303308
309class tlcs_z80_device : public z80_device
310{
311public:
312   tlcs_z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
313
314   required_device<z80ctc_device> m_z80ctc;
315
316   DECLARE_WRITE8_MEMBER( ctc_w );
317   DECLARE_WRITE_LINE_MEMBER( ctc_trg0 );
318   DECLARE_WRITE_LINE_MEMBER( ctc_trg1 );
319   DECLARE_WRITE_LINE_MEMBER( ctc_trg2 );
320   DECLARE_WRITE_LINE_MEMBER( ctc_trg3 );
321
322protected:
323   virtual machine_config_constructor device_mconfig_additions() const;
324
325   const address_space_config m_io_space_config;
326
327   const address_space_config *memory_space_config(address_spacenum spacenum) const
328   {
329      switch (spacenum)
330      {
331         case AS_IO: return &m_io_space_config;
332         default: return z80_device::memory_space_config(spacenum);
333      }
334   }
335};
336
337extern const device_type TLCS_Z80;
338
304339#endif /* __Z80_H__ */
trunk/src/mess/layout/pve500.lay
r0r29240
1<?xml version="1.0"?>
2<mamelayout version="2">
3   <element name="digit" defstate="0">
4      <led7seg>
5         <color red="0.75" green="0.0" blue="0.0" />
6      </led7seg>
7   </element>
8   
9   <element name="led" defstate="0">
10      <disk state="1">
11         <color red="0.75" green="0.0" blue="0.0" />
12      </disk>
13      <disk state="0">
14         <color red="0.09375" green="0.0" blue="0.0" />
15      </disk>
16   </element>
17   
18   <element name="background">
19      <rect>
20          <bounds left="0" top="0" right="1" bottom="1" />
21      </rect>     
22   </element>
23
24   <view name="Default Layout">
25      <!-- Black background -->
26      <bezel element="background">
27         <bounds left="00" top="00" right="2360" bottom="300" />
28      </bezel>
29
30      <!-- PLAYER1 -->
31      <bezel name="digit0" element="digit">
32         <bounds x="10" y="15" width="50" height="80" />
33      </bezel>
34      <bezel name="digit1" element="digit">
35         <bounds x="70" y="15" width="50" height="80" />
36      </bezel>
37
38      <bezel name="digit2" element="digit">
39         <bounds x="170" y="15" width="50" height="80" />
40      </bezel>
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43      </bezel>
44
45      <bezel name="digit4" element="digit">
46         <bounds x="330" y="15" width="50" height="80" />
47      </bezel>
48      <bezel name="digit5" element="digit">
49         <bounds x="390" y="15" width="50" height="80" />
50      </bezel>
51
52      <bezel name="digit6" element="digit">
53         <bounds x="490" y="15" width="50" height="80" />
54      </bezel>
55      <bezel name="digit7" element="digit">
56         <bounds x="550" y="15" width="50" height="80" />
57      </bezel>
58
59      <!-- PLAYER2 -->
60      <bezel name="digit8" element="digit">
61         <bounds x="750" y="15" width="50" height="80" />
62      </bezel>
63      <bezel name="digit9" element="digit">
64         <bounds x="810" y="15" width="50" height="80" />
65      </bezel>
66
67      <bezel name="digit10" element="digit">
68         <bounds x="910" y="15" width="50" height="80" />
69      </bezel>
70      <bezel name="digit11" element="digit">
71         <bounds x="970" y="15" width="50" height="80" />
72      </bezel>
73
74      <bezel name="digit12" element="digit">
75         <bounds x="1070" y="15" width="50" height="80" />
76      </bezel>
77      <bezel name="digit13" element="digit">
78         <bounds x="1130" y="15" width="50" height="80" />
79      </bezel>
80
81      <bezel name="digit14" element="digit">
82         <bounds x="1230" y="15" width="50" height="80" />
83      </bezel>
84      <bezel name="digit15" element="digit">
85         <bounds x="1290" y="15" width="50" height="80" />
86      </bezel>
87
88
89      <!-- 3-digit 7seg display -->
90      <bezel name="digit24" element="digit">
91         <bounds x="1490" y="47" width="30" height="48" />
92      </bezel>
93      <bezel name="digit25" element="digit">
94         <bounds x="1526" y="47" width="30" height="48" />
95      </bezel>
96      <bezel name="digit26" element="digit">
97         <bounds x="1562" y="47" width="30" height="48" />
98      </bezel>
99
100
101      <!-- RECORDER -->
102      <bezel name="digit16" element="digit">
103         <bounds x="1762" y="15" width="50" height="80" />
104      </bezel>
105      <bezel name="digit17" element="digit">
106         <bounds x="1822" y="15" width="50" height="80" />
107      </bezel>
108
109      <bezel name="digit18" element="digit">
110         <bounds x="1922" y="15" width="50" height="80" />
111      </bezel>
112      <bezel name="digit19" element="digit">
113         <bounds x="1982" y="15" width="50" height="80" />
114      </bezel>
115
116      <bezel name="digit20" element="digit">
117         <bounds x="2082" y="15" width="50" height="80" />
118      </bezel>
119      <bezel name="digit21" element="digit">
120         <bounds x="2142" y="15" width="50" height="80" />
121      </bezel>
122
123      <bezel name="digit22" element="digit">
124         <bounds x="2242" y="15" width="50" height="80" />
125      </bezel>
126      <bezel name="digit23" element="digit">
127         <bounds x="2302" y="15" width="50" height="80" />
128      </bezel>
129   </view>
130</mamelayout>
Property changes on: trunk/src/mess/layout/pve500.lay
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trunk/src/mess/drivers/pve500.c
r29239r29240
2323
2424#include "emu.h"
2525#include "cpu/z80/z80.h"
26#include "machine/z80ctc.h"
27#include "machine/z80sio.h"
28#include "pve500.lh"
2629
30#define IO_EXPANDER_PORTA 0
31#define IO_EXPANDER_PORTB 1
32#define IO_EXPANDER_PORTC 2
33#define IO_EXPANDER_PORTD 3
34#define IO_EXPANDER_PORTE 4
35
2736class pve500_state : public driver_device
2837{
2938public:
r29239r29240
3342      , m_subcpu(*this, "subcpu")
3443   { }
3544
45   DECLARE_WRITE8_MEMBER(dualport_ram_left_w);
46   DECLARE_WRITE8_MEMBER(dualport_ram_right_w);
47   DECLARE_READ8_MEMBER(dualport_ram_left_r);
48   DECLARE_READ8_MEMBER(dualport_ram_right_r);
49
3650   DECLARE_WRITE8_MEMBER(io_expander_w);
3751   DECLARE_READ8_MEMBER(io_expander_r);
3852   DECLARE_DRIVER_INIT(pve500);
3953private:
54   UINT8 dualport_7FE_data;
55   UINT8 dualport_7FF_data;
56
4057   virtual void machine_start();
4158   virtual void machine_reset();
42   required_device<cpu_device> m_maincpu;
43   required_device<cpu_device> m_subcpu;
59   required_device<tlcs_z80_device> m_maincpu;
60   required_device<tlcs_z80_device> m_subcpu;
61   UINT8 io_SEL, io_LD, io_LE, io_SC, io_KY;
4462};
4563
64
65static Z80CTC_INTERFACE( external_ctc_intf )
66{
67   DEVCB_NULL, /* interrupt handler */
68   DEVCB_NULL, /* ZC/TO0 callback */
69   DEVCB_NULL, /* ZC/TO1 callback */
70   DEVCB_NULL  /* ZC/TO2 callback */
71};
72
73static const z80sio_interface external_sio_intf =
74{
75   DEVCB_NULL, /* interrupt handler */
76  DEVCB_NULL, /* DTR changed handler */
77   DEVCB_NULL, /* RTS changed handler */
78   DEVCB_NULL, /* BREAK changed handler */
79   DEVCB_NULL, /* transmit handler */
80   DEVCB_NULL  /* receive handler */
81};
82
83static ADDRESS_MAP_START(maincpu_io, AS_IO, 8, pve500_state)
84   AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("external_sio", z80sio_device, read, write)
85   AM_RANGE(0x08, 0x0B) AM_DEVREADWRITE("external_ctc", z80ctc_device, read, write)
86ADDRESS_MAP_END
87
4688static ADDRESS_MAP_START(maincpu_prg, AS_PROGRAM, 8, pve500_state)
4789   AM_RANGE (0x0000, 0xBFFF) AM_ROM // ICB7: 48kbytes EEPROM
4890   AM_RANGE (0xC000, 0xDFFF) AM_RAM // ICD6: 8kbytes of RAM
91   AM_RANGE (0xE7FE, 0xE7FE) AM_MIRROR(0x1800) AM_READ(dualport_ram_left_r)
92   AM_RANGE (0xE7FF, 0xE7FF) AM_MIRROR(0x1800) AM_WRITE(dualport_ram_left_w)
4993   AM_RANGE (0xE000, 0xE7FF) AM_MIRROR(0x1800) AM_RAM AM_SHARE("sharedram") //  ICF5: 2kbytes of RAM shared between the two CPUs
5094ADDRESS_MAP_END
5195
5296static ADDRESS_MAP_START(subcpu_prg, AS_PROGRAM, 8, pve500_state)
5397   AM_RANGE (0x0000, 0x7FFF) AM_ROM // ICG5: 32kbytes EEPROM
54   AM_RANGE (0x8000, 0xBFFF) AM_READWRITE(io_expander_r, io_expander_w) // ICG3: I/O Expander
98   AM_RANGE (0x8000, 0xBFFF) AM_MIRROR(0x3FF8) AM_READWRITE(io_expander_r, io_expander_w) // ICG3: I/O Expander
99   AM_RANGE (0xC7FE, 0xC7FE) AM_MIRROR(0x1800) AM_WRITE(dualport_ram_right_w)
100   AM_RANGE (0xC7FF, 0xC7FF) AM_MIRROR(0x1800) AM_READ(dualport_ram_right_r)
55101   AM_RANGE (0xC000, 0xC7FF) AM_MIRROR(0x3800) AM_RAM AM_SHARE("sharedram") //  ICF5: 2kbytes of RAM shared between the two CPUs
56102ADDRESS_MAP_END
57103
r29239r29240
66112
67113void pve500_state::machine_start()
68114{
115   io_LD = 0;
116   io_SC = 0;
117   io_LE = 0;
118   io_SEL = 0;
119   io_KY = 0;
120
121   for (int i=0; i<27; i++)
122      output_set_digit_value(i, 0xff);
69123}
70124
71125void pve500_state::machine_reset()
72126{
73127}
74128
129READ8_MEMBER(pve500_state::dualport_ram_left_r)
130{
131   //printf("dualport_ram: Left READ\n");
132   m_subcpu->ctc_trg1(1); //(INT_Right)
133   return dualport_7FE_data;
134}
135
136WRITE8_MEMBER(pve500_state::dualport_ram_left_w)
137{
138   //printf("dualport_ram: Left WRITE\n");
139   dualport_7FF_data = data;
140   m_subcpu->ctc_trg1(0); //(INT_Right)
141}
142
143READ8_MEMBER(pve500_state::dualport_ram_right_r)
144{
145   //printf("dualport_ram: Right READ\n");
146   m_maincpu->ctc_trg1(1); //(INT_Left)
147   return dualport_7FF_data;
148}
149
150WRITE8_MEMBER(pve500_state::dualport_ram_right_w)
151{
152   //printf("dualport_ram: Right WRITE\n");
153   dualport_7FE_data = data;
154   m_maincpu->ctc_trg1(0);   //(INT_Left)
155}
156
75157READ8_MEMBER(pve500_state::io_expander_r)
76158{
77   /* Implement-me ! */
78   return 0;
159   switch (offset){
160      case IO_EXPANDER_PORTA:
161         return io_SC;
162      case IO_EXPANDER_PORTB:
163         return io_LE;
164      case IO_EXPANDER_PORTC:
165         return io_KY;
166      case IO_EXPANDER_PORTD:
167         return io_LD;
168      case IO_EXPANDER_PORTE:
169         return io_SEL & 0x0F; //This is a 4bit port.
170      default:
171         return 0;
172   }
79173}
80174
81175WRITE8_MEMBER(pve500_state::io_expander_w)
82176{
83   /* Implement-me !*/
177   //printf("io_expander_w: offset=%d data=%02X\n", offset, data);
178   switch (offset){
179      case IO_EXPANDER_PORTA:
180         io_SC = data;
181         break;
182      case IO_EXPANDER_PORTB:
183         io_LE = data;
184         break;
185      case IO_EXPANDER_PORTC:
186         io_KY = data;
187         break;
188      case IO_EXPANDER_PORTD:
189         io_LD = data;
190         break;
191      case IO_EXPANDER_PORTE:
192         io_SEL = data;
193         for (int i=0; i<4; i++){
194            if (io_SEL & (1 << i)){
195               switch (io_SC){
196                  case 1:   output_set_digit_value(8*i + 0, io_LD & 0x7F); break;
197                  case 2:   output_set_digit_value(8*i + 1, io_LD & 0x7F); break;
198                  case 4:   output_set_digit_value(8*i + 2, io_LD & 0x7F); break;
199                  case 8:   output_set_digit_value(8*i + 3, io_LD & 0x7F); break;
200                  case 16:  output_set_digit_value(8*i + 4, io_LD & 0x7F); break;
201                  case 32:  output_set_digit_value(8*i + 5, io_LD & 0x7F); break;
202                  case 64:  output_set_digit_value(8*i + 6, io_LD & 0x7F); break;
203                  case 128: output_set_digit_value(8*i + 7, io_LD & 0x7F); break;
204                  default:
205                     /*software should not do it.
206                  any idea how to emulate that in case it does? */ break;
207               }
208            }
209         }
210         break;
211      default:
212         break;
213   }
84214}
85215
86216static MACHINE_CONFIG_START( pve500, pve500_state )
87/*
88I think we should emulate the TOSHIBA TLCS-Z80 and instantiate it here.
89TLCS-Z80 = Z80 CPU + internal CTC + internal SIO + some other things
90
91The PVE-500 board uses both the internal and additional external CTCs and SIOs
92*/
93   MCFG_CPU_ADD("maincpu", Z80, XTAL_12MHz / 2) /* Actual chip is TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */
217   MCFG_CPU_ADD("maincpu", TLCS_Z80, XTAL_12MHz / 2) /* TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */
94218   MCFG_CPU_PROGRAM_MAP(maincpu_prg)
95//   MCFG_Z80CTC_ADD("ctc", XTAL_?MHz, maincpu_ctc_intf)
96//   MCFG_Z80SIO_ADD("sio", XTAL_12MHz / 2, maincpu_sio_intf)
219   MCFG_CPU_IO_MAP(maincpu_io)
220   MCFG_Z80CTC_ADD("external_ctc", XTAL_12MHz / 2, external_ctc_intf)
221   MCFG_Z80SIO_ADD("external_sio", XTAL_12MHz / 2, external_sio_intf)
97222
98   MCFG_CPU_ADD("subcpu", Z80, XTAL_12MHz / 2) /* Actual chip is TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */
223   MCFG_CPU_ADD("subcpu", TLCS_Z80, XTAL_12MHz / 2) /* TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */
99224   MCFG_CPU_PROGRAM_MAP(subcpu_prg)
100//   MCFG_Z80CTC_ADD("ctc", XTAL_?MHz, subcpu_ctc_intf)
101//   MCFG_Z80SIO_ADD("sio", XTAL_12MHz / 2, subcpu_sio_intf)
102225
103226/* TODO:
104227-> There are a few LEDs and a sequence of 7-seg displays with atotal of 27 digits
105228-> Sound hardware consists of a buzzer connected to a signal of the maincpu SIO and a logic-gate that attaches/detaches it from the
106229   system clock Which apparently means you can only beep the buzzer to a certain predefined tone or keep it mute.
107230*/
231
232   /* video hardware */
233   MCFG_DEFAULT_LAYOUT(layout_pve500)
234
108235MACHINE_CONFIG_END
109236
110237ROM_START( pve500 )
trunk/src/mess/mess.mak
r29239r29240
22652265$(MESS_DRIVERS)/pmi80.o:    $(MESS_LAYOUT)/pmi80.lh
22662266$(MESS_DRIVERS)/poly880.o:  $(MESS_LAYOUT)/poly880.lh
22672267$(MESS_DRIVERS)/pro80.o:    $(MESS_LAYOUT)/pro80.lh
2268$(MESS_DRIVERS)/pve500.o:   $(MESS_LAYOUT)/pve500.lh
22682269$(MESS_DRIVERS)/px4.o:      $(MESS_LAYOUT)/px4.lh
22692270$(MESS_DRIVERS)/px8.o:      $(MESS_LAYOUT)/px8.lh
22702271$(MESS_DRIVERS)/ravens.o:   $(MESS_LAYOUT)/ravens.lh

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