Previous

199869 Revisions

Next

r29238 Friday 4th April, 2014 at 06:03:16 UTC by Fabio Priuli
(MESS) modernized friskyt and micronic nvram. nw.

[src/mame/drivers]	seicross.c
[src/mame/includes]	seicross.h
[src/mess/drivers]	micronic.c nc.c
[src/mess/includes]	micronic.h

trunk/src/mess/includes/micronic.h

r29237	r29238
13	13	#include "video/hd61830.h"
14	14	#include "machine/mc146818.h"
15	15	#include "machine/ram.h"
	16	#include "machine/nvram.h"
16	17	#include "sound/beep.h"
17	18	#include "imagedev/cassette.h"
18	19
r29237	r29238
30	31	m_lcdc(*this, HD61830_TAG),
31	32	m_beep(*this, "beeper"),
32	33	m_rtc(*this, MC146818_TAG),
	34	m_nvram1(*this, "nvram1"),
	35	m_nvram2(*this, "nvram2"),
33	36	m_ram(*this, RAM_TAG),
34	37	m_ram_base(*this, "ram_base"),
	38	m_status_flag(1),
35	39	m_bank1(*this, "bank1"),
36	40	m_bit0(*this, "BIT0"),
37	41	m_bit1(*this, "BIT1"),
r29237	r29238
41	45	m_bit5(*this, "BIT5"),
42	46	m_backbattery(*this, "BACKBATTERY"),
43	47	m_mainbattery(*this, "MAINBATTERY"),
44		m_cassette(*this, "cassette") { }
	48	m_cassette(*this, "cassette")
	49	{ }
45	50
46	51	required_device<cpu_device> m_maincpu;
47	52	required_device<hd61830_device> m_lcdc;
48	53	required_device<beep_device> m_beep;
49	54	required_device<mc146818_device> m_rtc;
	55	required_device<nvram_device> m_nvram1;
	56	required_device<nvram_device> m_nvram2;
50	57	required_device<ram_device> m_ram;
51	58
52	59	virtual void machine_start();
53	60	virtual void machine_reset();
	61	void nvram_init(nvram_device &nvram, void *data, size_t size);
54	62
55	63	DECLARE_READ8_MEMBER( keypad_r );
56	64	DECLARE_READ8_MEMBER( status_flag_r );
r29237	r29238
70	78	UINT8 m_banks_num;
71	79	UINT8 m_kp_matrix;
72	80	UINT8 m_lcd_contrast;
73		bool m_lcd_backlight;
	81	int m_lcd_backlight;
74	82	UINT8 m_status_flag;
75	83	DECLARE_PALETTE_INIT(micronic);
76	84

trunk/src/mess/drivers/micronic.c

r29237	r29238
116	116	#include "emu.h"
117	117	#include "includes/micronic.h"
118	118	#include "rendlay.h"
119		#include "mcfglgcy.h"
120	119
121	120	READ8_MEMBER( micronic_state::keypad_r )
122	121	{
r29237	r29238
300	299	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("END") PORT_CODE(KEYCODE_END)
301	300	INPUT_PORTS_END
302	301
303		static NVRAM_HANDLER( micronic )
304		{
305		micronic_state *state = machine.driver_data<micronic_state>();
306	302
307		if (read_or_write)
308		{
309		file->write(state->m_ram_base, 0x8000);
310		file->write(state->m_ram->pointer(), state->m_ram->size());
311		}
312		else
313		{
314		if (file)
315		{
316		file->read(state->m_ram_base, 0x8000);
317		file->read(state->m_ram->pointer(), state->m_ram->size());
318		state->m_status_flag = 0x01;
319		}
320		else
321		{
322		state->m_status_flag = 0x00;
323		}
324		}
	303	void micronic_state::nvram_init(nvram_device &nvram, void *data, size_t size)
	304	{
	305	m_status_flag = 0;
325	306	}
326	307
	308
327	309	PALETTE_INIT_MEMBER(micronic_state, micronic)
328	310	{
329	311	palette.set_pen_color(0, rgb_t(138, 146, 148));
r29237	r29238
336	318	m_bank1->configure_entries(0x00, 0x02, memregion(Z80_TAG)->base(), 0x10000);
337	319
338	320	/* RAM banks */
339		m_banks_num = (m_ram->size()>>15) + 1;
	321	m_banks_num = (m_ram->size() >> 15) + 1;
340	322	m_bank1->configure_entries(0x02, m_banks_num - 1, m_ram->pointer(), 0x8000);
341	323
	324	m_nvram1->set_base(m_ram_base, 0x8000);
	325	m_nvram2->set_base(m_ram->pointer(), m_ram->size());
	326
342	327	/* register for state saving */
343		//  save_item(NAME(state->));
	328	save_item(NAME(m_banks_num));
	329	save_item(NAME(m_kp_matrix));
	330	save_item(NAME(m_lcd_contrast));
	331	save_item(NAME(m_lcd_backlight));
	332	save_item(NAME(m_status_flag));
	333	// TODO: restore RAM bank at state load...
344	334	}
345	335
346	336	void micronic_state::machine_reset()
r29237	r29238
386	376	MCFG_RAM_ADD(RAM_TAG)
387	377	MCFG_RAM_DEFAULT_SIZE("224K")
388	378
389		MCFG_NVRAM_HANDLER(micronic)
	379	MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram1", micronic_state, nvram_init)   // base ram
	380	MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram2", micronic_state, nvram_init)   // additional ram banks
390	381
391	382	MCFG_MC146818_ADD( MC146818_TAG, XTAL_32_768kHz )
392	383	MCFG_MC146818_IRQ_HANDLER(WRITELINE(micronic_state, mc146818_irq))

trunk/src/mess/drivers/nc.c

r29237	r29238
105	105	#include "sound/beep.h"
106	106	#include "machine/ram.h"
107	107	#include "rendlay.h"
108		#include "mcfglgcy.h"
109	108
	109
110	110	#define VERBOSE 0
111	111	#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
112	112

trunk/src/mame/drivers/seicross.c

r29237	r29238
48	48	#include "sound/ay8910.h"
49	49	#include "sound/dac.h"
50	50	#include "includes/seicross.h"
51		#include "mcfglgcy.h"
52	51
53		static NVRAM_HANDLER( seicross )
54		{
55		seicross_state *state = machine.driver_data<seicross_state>();
56		UINT8 *nvram = state->m_nvram;
57		size_t nvram_size = state->m_nvram.bytes();
58	52
59		if (read_or_write)
60		file->write(nvram,nvram_size);
61		else
62		{
63		if (file)
64		file->read(nvram,nvram_size);
65		else
66		{
67		/* fill in the default values */
68		memset(nvram,0,nvram_size);
69		nvram[0x0d] = nvram[0x0f] = nvram[0x11] = nvram[0x13] = nvram[0x15] = nvram[0x19] = 1;
70		nvram[0x17] = 3;
71		}
72		}
	53	void seicross_state::nvram_init(nvram_device &nvram, void *data, size_t size)
	54	{
	55	static const UINT8 init[32] = {
	56	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
	57	0, 1, 0, 1, 0, 1, 0, 3, 0, 1, 0, 0, 0, 0, 0, 0, };
	58
	59	memset(data, 0x00, size);
	60	memcpy(data, init, sizeof(init));
73	61	}
74	62
75
76
77	63	void seicross_state::machine_reset()
78	64	{
79	65	/* start with the protection mcu halted */
r29237	r29238
395	381	}
396	382
397	383
398		static MACHINE_CONFIG_START( nvram, seicross_state )
	384	static MACHINE_CONFIG_START( no_nvram, seicross_state )
399	385
400	386	/* basic machine hardware */
401	387	MCFG_CPU_ADD("maincpu", Z80, 3072000)   /* 3.072 MHz? */
r29237	r29238
404	390	MCFG_CPU_VBLANK_INT_DRIVER("screen", seicross_state,  vblank_irq)
405	391
406	392	MCFG_CPU_ADD("mcu", NSC8105, 3072000)   /* ??? */
407		MCFG_CPU_PROGRAM_MAP(mcu_nvram_map)
	393	MCFG_CPU_PROGRAM_MAP(mcu_no_nvram_map)
408	394
409	395	MCFG_QUANTUM_TIME(attotime::from_hz(1200))  /* 20 CPU slices per frame - an high value to ensure proper */
410	396	/* synchronization of the CPUs */
411		MCFG_NVRAM_HANDLER(seicross)
412	397
413	398	/* video hardware */
414	399	MCFG_SCREEN_ADD("screen", RASTER)
r29237	r29238
435	420	MACHINE_CONFIG_END
436	421
437	422
438		static MACHINE_CONFIG_DERIVED( no_nvram, nvram )
	423	static MACHINE_CONFIG_DERIVED( nvram, no_nvram )
439	424
440	425	/* basic machine hardware */
441	426	MCFG_CPU_MODIFY("mcu")
442		MCFG_CPU_PROGRAM_MAP(mcu_no_nvram_map)
	427	MCFG_CPU_PROGRAM_MAP(mcu_nvram_map)
443	428
444		MCFG_NVRAM_HANDLER(0)
	429	MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram", seicross_state, nvram_init)
445	430	MACHINE_CONFIG_END
446	431
447	432

trunk/src/mame/includes/seicross.h

r29237	r29238
	1	#include "machine/nvram.h"
	2
1	3	class seicross_state : public driver_device
2	4	{
3	5	public:
r29237	r29238
8	10	m_row_scroll(*this, "row_scroll"),
9	11	m_spriteram2(*this, "spriteram2"),
10	12	m_colorram(*this, "colorram"),
11		m_nvram(*this, "nvram"),
12	13	m_maincpu(*this, "maincpu"),
13	14	m_mcu(*this, "mcu"),
	15	m_nvram(*this, "nvram"),
14	16	m_gfxdecode(*this, "gfxdecode"),
15	17	m_palette(*this, "palette") { }
16	18
r29237	r29238
19	21	required_shared_ptr<UINT8> m_row_scroll;
20	22	required_shared_ptr<UINT8> m_spriteram2;
21	23	required_shared_ptr<UINT8> m_colorram;
22		optional_shared_ptr<UINT8> m_nvram;
23	24
24	25	UINT8 m_portb;
25	26	tilemap_t *m_bg_tilemap;
	27	void nvram_init(nvram_device &nvram, void *data, size_t size);
26	28
27	29	UINT8 m_irq_mask;
28	30	DECLARE_WRITE8_MEMBER(seicross_videoram_w);
r29237	r29238
38	40	void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect );
39	41	required_device<cpu_device> m_maincpu;
40	42	required_device<cpu_device> m_mcu;
	43	optional_device<nvram_device> m_nvram;
41	44	required_device<gfxdecode_device> m_gfxdecode;
42	45	required_device<palette_device> m_palette;
43	46	};

Previous

199869 Revisions

Next

---

© 1997-2024 The MAME Team