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r27513 Thursday 6th February, 2014 at 16:34:50 UTC by Curt Coder
(MESS) pet: Floppy WIP. (nw)
[src/emu/bus]bus.mak
[src/emu/bus/ieee488]c2040fdc.c* c2040fdc.h*
[src/lib/formats]d67_dsk.c d67_dsk.h d80_dsk.c d80_dsk.h d82_dsk.c d82_dsk.h

trunk/src/emu/bus/bus.mak
r27512r27513
250250BUSOBJS += $(BUSOBJ)/ieee488/ieee488.o
251251BUSOBJS += $(BUSOBJ)/ieee488/c2031.o
252252BUSOBJS += $(BUSOBJ)/ieee488/c2040.o
253BUSOBJS += $(BUSOBJ)/ieee488/c2040fdc.o
253254BUSOBJS += $(BUSOBJ)/ieee488/c8280.o
254255BUSOBJS += $(BUSOBJ)/ieee488/d9060.o
255256BUSOBJS += $(BUSOBJ)/ieee488/d9060hd.o
trunk/src/emu/bus/ieee488/c2040fdc.c
r0r27513
1// license:BSD-3-Clause
2// copyright-holders:Curt Coder
3/**********************************************************************
4
5    Commodore 2040 floppy disk controller emulation
6
7    Copyright MESS Team.
8    Visit http://mamedev.org for licensing and usage restrictions.
9
10**********************************************************************/
11
12/*
13
14   TODO:
15
16   - writing (write sr shifted before write starts)
17   - 8050 PLL
18
19*/
20
21#include "c2040fdc.h"
22
23
24
25//**************************************************************************
26//  MACROS / CONSTANTS
27//**************************************************************************
28
29#define LOG 0
30
31
32
33//**************************************************************************
34//  DEVICE DEFINITIONS
35//**************************************************************************
36
37const device_type C2040_FDC = &device_creator<c2040_fdc_t>;
38const device_type C8050_FDC = &device_creator<c8050_fdc_t>;
39
40
41//-------------------------------------------------
42//  ROM( c2040_fdc )
43//-------------------------------------------------
44
45ROM_START( c2040_fdc )
46   ROM_REGION( 0x800, "gcr", 0)
47   ROM_LOAD( "901467.uk6", 0x000, 0x800, CRC(a23337eb) SHA1(97df576397608455616331f8e837cb3404363fa2) )
48ROM_END
49
50
51//-------------------------------------------------
52//  rom_region - device-specific ROM region
53//-------------------------------------------------
54
55const rom_entry *c2040_fdc_t::device_rom_region() const
56{
57   return ROM_NAME( c2040_fdc );
58}
59
60
61
62//**************************************************************************
63//  LIVE DEVICE
64//**************************************************************************
65
66//-------------------------------------------------
67//  c2040_fdc_t - constructor
68//-------------------------------------------------
69
70c2040_fdc_t::c2040_fdc_t(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
71   device_t(mconfig, type, name, tag, owner, clock, shortname, __FILE__),
72   m_read_pi(*this),
73   m_write_sync(*this),
74   m_write_ready(*this),
75   m_write_error(*this),
76   m_gcr_rom(*this, "gcr"),
77   m_floppy0(NULL),
78   m_floppy1(NULL),
79   m_mtr0(1),
80   m_mtr1(1),
81   m_stp0(0),
82   m_stp1(0),
83   m_ds(0),
84   m_drv_sel(0),
85   m_mode_sel(0),
86   m_rw_sel(0),
87   m_period(attotime::from_hz(clock))
88{
89}
90
91c2040_fdc_t::c2040_fdc_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
92   device_t(mconfig, C2040_FDC, "C2040 FDC", tag, owner, clock, "c2040fdc", __FILE__),
93   m_read_pi(*this),
94   m_write_sync(*this),
95   m_write_ready(*this),
96   m_write_error(*this),
97   m_gcr_rom(*this, "gcr"),
98   m_floppy0(NULL),
99   m_floppy1(NULL),
100   m_mtr0(1),
101   m_mtr1(1),
102   m_stp0(0),
103   m_stp1(0),
104   m_ds(0),
105   m_drv_sel(0),
106   m_mode_sel(0),
107   m_rw_sel(0),
108   m_period(attotime::from_hz(clock))
109{
110}
111
112c8050_fdc_t::c8050_fdc_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
113   c2040_fdc_t(mconfig, C2040_FDC, "C2040 FDC", tag, owner, clock, "c2040fdc", __FILE__) { }
114
115
116
117//-------------------------------------------------
118//  device_start - device-specific startup
119//-------------------------------------------------
120
121void c2040_fdc_t::device_start()
122{
123   // resolve callbacks
124   m_read_pi.resolve_safe(0);
125   m_write_sync.resolve_safe();
126   m_write_ready.resolve_safe();
127   m_write_error.resolve_safe();
128
129   // allocate timer
130   t_gen = timer_alloc(0);
131}
132
133
134//-------------------------------------------------
135//  device_reset - device-specific reset
136//-------------------------------------------------
137
138void c2040_fdc_t::device_reset()
139{
140   live_abort();
141}
142
143
144//-------------------------------------------------
145//  device_timer - handler timer events
146//-------------------------------------------------
147
148void c2040_fdc_t::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
149{
150   live_sync();
151   live_run();
152}
153
154floppy_image_device* c2040_fdc_t::get_floppy()
155{
156   return cur_live.drv_sel ? m_floppy1 : m_floppy0;
157}
158
159void c2040_fdc_t::live_start()
160{
161   cur_live.tm = machine().time();
162   cur_live.state = RUNNING;
163   cur_live.next_state = -1;
164
165   cur_live.shift_reg = 0;
166   cur_live.shift_reg_write = 0;
167   cur_live.cycle_counter = 0;
168   cur_live.cell_counter = 0;
169   cur_live.bit_counter = 0;
170   cur_live.ds = m_ds;
171   cur_live.drv_sel = m_drv_sel;
172   cur_live.mode_sel = m_mode_sel;
173   cur_live.rw_sel = m_rw_sel;
174
175   checkpoint_live = cur_live;
176
177   live_run();
178}
179
180void c2040_fdc_t::checkpoint()
181{
182   checkpoint_live = cur_live;
183}
184
185void c2040_fdc_t::rollback()
186{
187   cur_live = checkpoint_live;
188   get_next_edge(cur_live.tm);
189}
190
191void c2040_fdc_t::start_writing(attotime tm)
192{
193   cur_live.write_start_time = tm;
194   cur_live.write_position = 0;
195}
196
197void c2040_fdc_t::stop_writing(attotime tm)
198{
199   commit(tm);
200   cur_live.write_start_time = attotime::never;
201}
202
203bool c2040_fdc_t::write_next_bit(bool bit, attotime limit)
204{
205   if(cur_live.write_start_time.is_never()) {
206      cur_live.write_start_time = cur_live.tm;
207      cur_live.write_position = 0;
208   }
209
210   attotime etime = cur_live.tm + m_period;
211   if(etime > limit)
212      return true;
213
214   if(bit && cur_live.write_position < ARRAY_LENGTH(cur_live.write_buffer))
215      cur_live.write_buffer[cur_live.write_position++] = cur_live.tm;
216
217   return false;
218}
219
220void c2040_fdc_t::commit(attotime tm)
221{
222   if(cur_live.write_start_time.is_never() || tm == cur_live.write_start_time || !cur_live.write_position)
223      return;
224
225   if(get_floppy())
226      get_floppy()->write_flux(cur_live.write_start_time, tm, cur_live.write_position, cur_live.write_buffer);
227   cur_live.write_start_time = tm;
228   cur_live.write_position = 0;
229}
230
231void c2040_fdc_t::live_delay(int state)
232{
233   cur_live.next_state = state;
234   if(cur_live.tm != machine().time())
235      t_gen->adjust(cur_live.tm - machine().time());
236   else
237      live_sync();
238}
239
240void c2040_fdc_t::live_sync()
241{
242   if(!cur_live.tm.is_never()) {
243      if(cur_live.tm > machine().time()) {
244         rollback();
245         live_run(machine().time());
246         commit(cur_live.tm);
247      } else {
248         commit(cur_live.tm);
249         if(cur_live.next_state != -1) {
250            cur_live.state = cur_live.next_state;
251            cur_live.next_state = -1;
252         }
253         if(cur_live.state == IDLE) {
254            stop_writing(cur_live.tm);
255            cur_live.tm = attotime::never;
256         }
257      }
258      cur_live.next_state = -1;
259      checkpoint();
260   }
261}
262
263void c2040_fdc_t::live_abort()
264{
265   if(!cur_live.tm.is_never() && cur_live.tm > machine().time()) {
266      rollback();
267      live_run(machine().time());
268   }
269
270   stop_writing(cur_live.tm);
271
272   cur_live.tm = attotime::never;
273   cur_live.state = IDLE;
274   cur_live.next_state = -1;
275   cur_live.write_position = 0;
276   cur_live.write_start_time = attotime::never;
277
278   cur_live.ready = 1;
279   cur_live.sync = 1;
280   cur_live.error = 1;
281}
282
283void c2040_fdc_t::live_run(attotime limit)
284{
285   if(cur_live.state == IDLE || cur_live.next_state != -1)
286      return;
287
288   for(;;) {
289      switch(cur_live.state) {
290      case RUNNING: {
291         bool syncpoint = false;
292
293         int bit = get_next_bit(cur_live.tm, limit);
294         if(bit < 0)
295            return;
296
297         int cell_counter = cur_live.cell_counter;
298
299         if (bit) {
300            cur_live.cycle_counter = cur_live.ds;
301            cur_live.cell_counter = 0;
302         } else {
303            cur_live.cycle_counter++;
304         }
305
306         if (cur_live.cycle_counter == 16) {
307            cur_live.cycle_counter = cur_live.ds;
308
309            cur_live.cell_counter++;
310            cur_live.cell_counter &= 0xf;
311         }
312         
313         int ready = cur_live.ready;
314         
315         if (!BIT(cell_counter, 1) && BIT(cur_live.cell_counter, 1)) {
316            // read bit
317            cur_live.shift_reg <<= 1;
318            cur_live.shift_reg |= !(BIT(cur_live.cell_counter, 3) || BIT(cur_live.cell_counter, 2));
319            cur_live.shift_reg &= 0x3ff;
320
321            // write bit
322            if (!cur_live.rw_sel) {
323               write_next_bit(BIT(cur_live.shift_reg_write, 9), limit);
324            cur_live.shift_reg_write <<= 1;
325            cur_live.shift_reg_write &= 0x3ff;
326            }
327
328            // update bit counter
329            if ((cur_live.shift_reg == 0x3ff) && cur_live.rw_sel) {
330               cur_live.bit_counter = 0;
331            } else {
332               cur_live.bit_counter++;
333               if (cur_live.bit_counter == 10) {
334                  cur_live.bit_counter = 0;
335                  ready = 0;
336               } else {
337                  ready = 1;
338               }
339            }
340         }
341
342         // update GCR
343         if (cur_live.rw_sel) {
344            cur_live.i = (cur_live.rw_sel << 10) | cur_live.shift_reg;
345         } else {
346            cur_live.i = (cur_live.rw_sel << 10) | ((cur_live.pi & 0xf0) << 1) | (cur_live.mode_sel << 4) | (cur_live.pi & 0x0f);
347         }
348
349         cur_live.e = m_gcr_rom->base()[cur_live.i];
350   
351         // load write shift register
352         if (!ready) {
353            // E7 E6 I7 E5 E4 E3 E2 I2 E1 E0
354            UINT8 e = cur_live.e;
355            offs_t i = cur_live.i;
356
357            cur_live.shift_reg_write = BIT(e,7)<<9 | BIT(e,6)<<8 | BIT(i,7)<<7 | BIT(e,5)<<6 | BIT(e,4)<<5 | BIT(e,3)<<4 | BIT(e,2)<<3 | BIT(i,2)<<2 | (e & 0x03);
358         }
359
360         // update signals
361         int sync = !((cur_live.shift_reg == 0x3ff) && cur_live.rw_sel);
362         int error = !(BIT(cur_live.e, 3) || ready);
363
364         if (ready != cur_live.ready) {
365            cur_live.ready = ready;
366            syncpoint = true;
367         }
368
369         if (sync != cur_live.sync) {
370            cur_live.sync = sync;
371            syncpoint = true;
372         }
373
374         if (error != cur_live.error) {
375            cur_live.error = error;
376            syncpoint = true;
377         }
378
379         if (syncpoint) {
380            commit(cur_live.tm);
381            live_delay(RUNNING_SYNCPOINT);
382            return;
383         }
384         break;
385      }
386
387      case RUNNING_SYNCPOINT: {
388         cur_live.pi = m_read_pi(0);
389         m_write_ready(cur_live.ready);
390         m_write_sync(cur_live.sync);
391         m_write_error(cur_live.error);
392
393         cur_live.state = RUNNING;
394         checkpoint();
395         break;
396      }
397      }
398   }
399}
400
401void c2040_fdc_t::get_next_edge(attotime when)
402{
403   floppy_image_device *floppy = get_floppy();
404
405   m_edge = floppy ? floppy->get_next_transition(when) : attotime::never;
406}
407
408int c2040_fdc_t::get_next_bit(attotime &tm, attotime limit)
409{
410/*   floppy_image_device *floppy = cur_live.drv_sel ? m_floppy1 : m_floppy0;
411
412   attotime edge = floppy ? floppy->get_next_transition(tm) : attotime::never;*/
413   attotime edge = m_edge;
414   attotime next = tm + m_period;
415
416   tm = next;
417
418   int bit = (edge.is_never() || edge >= next) ? 0 : 1;
419
420   if (bit) {
421      get_next_edge(tm);
422   }
423
424   return bit && cur_live.rw_sel;
425}
426
427READ8_MEMBER( c2040_fdc_t::read )
428{
429   UINT8 e = checkpoint_live.e;
430   offs_t i = checkpoint_live.i;
431
432   return (BIT(e, 6) << 7) | (BIT(i, 7) << 6) | (e & 0x33) | (BIT(e, 2) << 3) | (i & 0x04);
433}
434
435WRITE8_MEMBER( c2040_fdc_t::write )
436{
437   live_sync();
438   cur_live.pi = data;
439   live_run();
440}
441
442WRITE_LINE_MEMBER( c2040_fdc_t::drv_sel_w )
443{
444   if (m_drv_sel != state)
445   {
446      live_sync();
447      m_drv_sel = cur_live.drv_sel = state;
448      get_next_edge(machine().time());
449      live_run();
450   }
451}
452
453WRITE_LINE_MEMBER( c2040_fdc_t::mode_sel_w )
454{
455   if (m_mode_sel != state)
456   {
457      live_sync();
458      m_mode_sel = cur_live.mode_sel = state;
459      live_run();
460   }
461}
462
463WRITE_LINE_MEMBER( c2040_fdc_t::rw_sel_w )
464{
465   if (m_rw_sel != state)
466   {
467      live_sync();
468      m_rw_sel = cur_live.rw_sel = state;
469      if (state)
470         stop_writing(machine().time());
471      live_run();
472   }
473}
474
475WRITE_LINE_MEMBER( c2040_fdc_t::mtr0_w )
476{
477   if (m_mtr0 != state)
478   {
479      live_sync();
480      m_mtr0 = state;
481      m_floppy0->mon_w(state);
482      get_next_edge(machine().time());
483
484      if (!m_mtr0 || !m_mtr1) {
485         if(cur_live.state == IDLE) {
486            live_start();
487         }
488      } else {
489         live_abort();
490      }
491
492      live_run();
493   }
494}
495
496WRITE_LINE_MEMBER( c2040_fdc_t::mtr1_w )
497{
498   if (m_mtr1 != state)
499   {
500      live_sync();
501      m_mtr1 = state;
502      if (m_floppy1) m_floppy1->mon_w(state);
503      get_next_edge(machine().time());
504
505      if (!m_mtr0 || !m_mtr1) {
506         if(cur_live.state == IDLE) {
507            live_start();
508         }
509      } else {
510         live_abort();
511      }
512
513      live_run();
514   }
515}
516
517WRITE_LINE_MEMBER( c2040_fdc_t::odd_hd_w )
518{
519   if (m_odd_hd != state)
520   {
521      live_sync();
522      m_odd_hd = cur_live.odd_hd = state;
523      m_floppy0->ss_w(!state);
524      if (m_floppy1) m_floppy1->ss_w(!state);
525      get_next_edge(machine().time());
526      live_run();
527   }
528}
529
530void c2040_fdc_t::stp_w(floppy_image_device *floppy, int mtr, int &old_stp, int stp)
531{
532   if (mtr) return;
533
534   int tracks = 0;
535
536   switch (old_stp)
537   {
538   case 0: if (stp == 1) tracks++; else if (stp == 3) tracks--; break;
539   case 1: if (stp == 2) tracks++; else if (stp == 0) tracks--; break;
540   case 2: if (stp == 3) tracks++; else if (stp == 1) tracks--; break;
541   case 3: if (stp == 0) tracks++; else if (stp == 2) tracks--; break;
542   }
543
544   if (tracks == -1)
545   {
546      floppy->dir_w(1);
547      floppy->stp_w(1);
548      floppy->stp_w(0);
549   }
550   else if (tracks == 1)
551   {
552      floppy->dir_w(0);
553      floppy->stp_w(1);
554      floppy->stp_w(0);
555   }
556
557   old_stp = stp;
558}
559
560void c8050_fdc_t::stp_w(floppy_image_device *floppy, int mtr, int &old_stp, int stp)
561{
562   if (mtr) return;
563
564   int tracks = 0;
565
566   switch (old_stp)
567   {
568   case 0: if (stp == 1) tracks++; else if (stp == 2) tracks--; break;
569   case 1: if (stp == 3) tracks++; else if (stp == 0) tracks--; break;
570   case 2: if (stp == 0) tracks++; else if (stp == 3) tracks--; break;
571   case 3: if (stp == 2) tracks++; else if (stp == 1) tracks--; break;
572   }
573
574   if (tracks == -1)
575   {
576      floppy->dir_w(1);
577      floppy->stp_w(1);
578      floppy->stp_w(0);
579   }
580   else if (tracks == 1)
581   {
582      floppy->dir_w(0);
583      floppy->stp_w(1);
584      floppy->stp_w(0);
585   }
586
587   old_stp = stp;
588}
589
590void c2040_fdc_t::stp0_w(int stp)
591{
592   if (m_stp0 != stp)
593   {
594      live_sync();
595      this->stp_w(m_floppy0, m_mtr0, m_stp0, stp);
596      get_next_edge(machine().time());
597      live_run();
598   }
599}
600
601void c2040_fdc_t::stp1_w(int stp)
602{
603   if (m_stp1 != stp)
604   {
605      live_sync();
606      if (m_floppy1) this->stp_w(m_floppy1, m_mtr1, m_stp1, stp);
607      get_next_edge(machine().time());
608      live_run();
609   }
610}
611
612void c2040_fdc_t::ds_w(int ds)
613{
614   if (m_ds != ds)
615   {
616      live_sync();
617      m_ds = cur_live.ds = ds;
618      live_run();
619   }
620}
621
622void c2040_fdc_t::set_floppy(floppy_image_device *floppy0, floppy_image_device *floppy1)
623{
624   m_floppy0 = floppy0;
625   m_floppy1 = floppy1;
626}
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trunk/src/emu/bus/ieee488/c2040fdc.h
r0r27513
1// license:BSD-3-Clause
2// copyright-holders:Curt Coder
3/**********************************************************************
4
5    Commodore 2040 floppy disk controller emulation
6
7    Copyright MESS Team.
8    Visit http://mamedev.org for licensing and usage restrictions.
9
10**********************************************************************/
11
12#pragma once
13
14#ifndef __C2040_FLOPPY__
15#define __C2040_FLOPPY__
16
17#include "emu.h"
18#include "imagedev/floppy.h"
19#include "formats/d64_dsk.h"
20#include "formats/d67_dsk.h"
21#include "formats/g64_dsk.h"
22
23
24
25//**************************************************************************
26//  INTERFACE CONFIGURATION MACROS
27//**************************************************************************
28
29#define MCFG_C2040_PI_CALLBACK(_read) \
30   devcb = &c2040_fdc_t::set_pi_rd_callback(*device, DEVCB2_##_read);
31
32#define MCFG_C2040_SYNC_CALLBACK(_write) \
33   devcb = &c2040_fdc_t::set_sync_wr_callback(*device, DEVCB2_##_write);
34
35#define MCFG_C2040_READY_CALLBACK(_write) \
36   devcb = &c2040_fdc_t::set_ready_wr_callback(*device, DEVCB2_##_write);
37
38#define MCFG_C2040_ERROR_CALLBACK(_write) \
39   devcb = &c2040_fdc_t::set_error_wr_callback(*device, DEVCB2_##_write);
40
41
42
43//**************************************************************************
44//  TYPE DEFINITIONS
45//**************************************************************************
46
47// ======================> c2040_fdc_t
48
49class c2040_fdc_t :  public device_t
50{
51public:
52   // construction/destruction
53   c2040_fdc_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
54   c2040_fdc_t(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
55
56   template<class _Object> static devcb2_base &set_pi_rd_callback(device_t &device, _Object object) { return downcast<c2040_fdc_t &>(device).m_read_pi.set_callback(object); }
57   template<class _Object> static devcb2_base &set_sync_wr_callback(device_t &device, _Object object) { return downcast<c2040_fdc_t &>(device).m_write_sync.set_callback(object); }
58   template<class _Object> static devcb2_base &set_ready_wr_callback(device_t &device, _Object object) { return downcast<c2040_fdc_t &>(device).m_write_ready.set_callback(object); }
59   template<class _Object> static devcb2_base &set_error_wr_callback(device_t &device, _Object object) { return downcast<c2040_fdc_t &>(device).m_write_error.set_callback(object); }
60
61   DECLARE_READ8_MEMBER( read );
62   DECLARE_WRITE8_MEMBER( write );
63
64   DECLARE_WRITE_LINE_MEMBER( drv_sel_w );
65   DECLARE_WRITE_LINE_MEMBER( mode_sel_w );
66   DECLARE_WRITE_LINE_MEMBER( rw_sel_w );
67   DECLARE_WRITE_LINE_MEMBER( mtr0_w );
68   DECLARE_WRITE_LINE_MEMBER( mtr1_w );
69   DECLARE_WRITE_LINE_MEMBER( odd_hd_w );
70   DECLARE_READ_LINE_MEMBER( wps_r ) { return checkpoint_live.drv_sel ? m_floppy1->wpt_r() : m_floppy0->wpt_r(); }
71   DECLARE_READ_LINE_MEMBER( sync_r ) { return checkpoint_live.sync; }
72   DECLARE_READ_LINE_MEMBER( ready_r ) { return checkpoint_live.ready; }
73   DECLARE_READ_LINE_MEMBER( error_r ) { return checkpoint_live.error; }
74
75   void stp0_w(int stp);
76   void stp1_w(int stp);
77   void ds_w(int ds);
78
79   void set_floppy(floppy_image_device *floppy0, floppy_image_device *floppy1);
80
81protected:
82   // device-level overrides
83   virtual void device_start();
84   virtual void device_reset();
85   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
86
87   // optional information overrides
88   virtual const rom_entry *device_rom_region() const;
89
90   void stp_w(floppy_image_device *floppy, int mtr, int &old_stp, int stp);
91
92private:
93   enum {
94      IDLE,
95      RUNNING,
96      RUNNING_SYNCPOINT
97   };
98
99   struct live_info {
100      attotime tm;
101      int state, next_state;
102      int sync;
103      int ready;
104      int error;
105      int ds;
106      int drv_sel;
107      int mode_sel;
108      int rw_sel;
109      int odd_hd;
110
111      UINT16 shift_reg;
112      int cycle_counter;
113      int cell_counter;
114      int bit_counter;
115      UINT8 e;
116      offs_t i;
117
118      UINT8 pi;
119      UINT16 shift_reg_write;
120      attotime write_start_time;
121      attotime write_buffer[32];
122      int write_position;
123   };
124
125   devcb2_read8 m_read_pi;
126   devcb2_write_line m_write_sync;
127   devcb2_write_line m_write_ready;
128   devcb2_write_line m_write_error;
129
130   required_memory_region m_gcr_rom;
131
132   floppy_image_device *m_floppy0;
133   floppy_image_device *m_floppy1;
134
135   int m_mtr0;
136   int m_mtr1;
137   int m_stp0;
138   int m_stp1;
139   int m_ds;
140   int m_drv_sel;
141   int m_mode_sel;
142   int m_rw_sel;
143   int m_odd_hd;
144
145   attotime m_period, m_edge;
146
147   live_info cur_live, checkpoint_live;
148   emu_timer *t_gen;
149
150   floppy_image_device* get_floppy();
151   void live_start();
152   void checkpoint();
153   void rollback();
154   bool write_next_bit(bool bit, attotime limit);
155   void start_writing(attotime tm);
156   void commit(attotime tm);
157   void stop_writing(attotime tm);
158   void live_delay(int state);
159   void live_sync();
160   void live_abort();
161   void live_run(attotime limit = attotime::never);
162   void get_next_edge(attotime when);
163   int get_next_bit(attotime &tm, attotime limit);
164};
165
166
167// ======================> c8050_fdc_t
168
169class c8050_fdc_t :  public c2040_fdc_t
170{
171public:
172   // construction/destruction
173   c8050_fdc_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
174
175protected:
176   void stp_w(floppy_image_device *floppy, int mtr, int &old_stp, int stp);
177};
178
179
180
181// device type definition
182extern const device_type C2040_FDC;
183extern const device_type C8050_FDC;
184//extern const device_type C8250_FDC;
185//extern const device_type SFD1001_FDC;
186
187
188
189#endif
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trunk/src/lib/formats/d80_dsk.c
r27512r27513
4141   {}
4242};
4343
44const UINT32 d80_format::cell_size[] =
44const UINT32 d80_format::d80_cell_size[] =
4545{
4646   2667, // 12MHz/16/2
4747   2500, // 12MHz/15/2
r27512r27513
4949   2167  // 12MHz/13/2
5050};
5151
52const int d80_format::sectors_per_track[] =
52const int d80_format::d80_sectors_per_track[] =
5353{
5454   29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, //  1-39
5555   29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
r27512r27513
5959   23, 23, 23, 23, 23, 23, 23                                                      // 78-84
6060};
6161
62const int d80_format::speed_zone[] =
62const int d80_format::d80_speed_zone[] =
6363{
6464   3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, //  1-39
6565   3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
r27512r27513
7676
7777UINT32 d80_format::get_cell_size(const format &f, int track)
7878{
79   return cell_size[speed_zone[track]];
79   return d80_cell_size[speed_zone[track]];
8080}
8181
8282int d80_format::get_sectors_per_track(const format &f, int track)
8383{
84   return sectors_per_track[track];
84   return d80_sectors_per_track[track];
8585}
8686
8787int d80_format::get_disk_id_offset(const format &f)
trunk/src/lib/formats/d80_dsk.h
r27512r27513
3333
3434   static const format file_formats[];
3535
36   static const UINT32 cell_size[];
37   static const int speed_zone[];
38   static const int sectors_per_track[];
36   static const UINT32 d80_cell_size[];
37   static const int d80_speed_zone[];
38   static const int d80_sectors_per_track[];
3939};
4040
4141extern const floppy_format_type FLOPPY_D80_FORMAT;
trunk/src/lib/formats/d82_dsk.c
r27512r27513
1111#include "emu.h"
1212#include "formats/d82_dsk.h"
1313
14d82_format::d82_format() : d80_format(formats)
14d82_format::d82_format() : d80_format(file_formats)
1515{
1616}
1717
r27512r27513
3030   return "d82";
3131}
3232
33const d82_format::format d82_format::formats[] = {
33const d82_format::format d82_format::file_formats[] = {
3434   { // d82, dos 2.5, 77 tracks, 2 heads, head/stepper 100 tpi
3535      floppy_image::FF_525, floppy_image::DSQD, 2083, 77, 2, 256, 9, 8
3636   },
trunk/src/lib/formats/d67_dsk.c
r27512r27513
1111#include "emu.h"
1212#include "formats/d67_dsk.h"
1313
14d67_format::d67_format() : d64_format(formats)
14d67_format::d67_format() : d64_format(file_formats)
1515{
1616}
1717
r27512r27513
3030   return "d67";
3131}
3232
33const d67_format::format d67_format::formats[] = {
33const d67_format::format d67_format::file_formats[] = {
3434   { // d67, dos 1, 35 tracks, head 48 tpi, stepper 96 tpi
3535      floppy_image::FF_525, floppy_image::SSSD, 690, 35, 1, 256, 9, 8
3636   },
3737   {}
3838};
3939
40const int d67_format::sectors_per_track[] =
40const int d67_format::d67_sectors_per_track[] =
4141{
4242   21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, //  1-17
4343   20, 20, 20, 20, 20, 20, 20,                                         // 18-24
r27512r27513
4949
5050int d67_format::get_sectors_per_track(const format &f, int track)
5151{
52   return sectors_per_track[track];
52   return d67_sectors_per_track[track];
5353}
5454
5555const floppy_format_type FLOPPY_D67_FORMAT = &floppy_image_format_creator<d67_format>;
trunk/src/lib/formats/d82_dsk.h
r27512r27513
2222   virtual const char *extensions() const;
2323
2424protected:
25   static const format formats[];
25   static const format file_formats[];
2626};
2727
2828extern const floppy_format_type FLOPPY_D82_FORMAT;
trunk/src/lib/formats/d67_dsk.h
r27512r27513
2424protected:
2525   virtual int get_sectors_per_track(const format &f, int track);
2626
27   static const format formats[];
27   static const format file_formats[];
2828
29   static const int sectors_per_track[];
29   static const int d67_sectors_per_track[];
3030};
3131
3232extern const floppy_format_type FLOPPY_D67_FORMAT;

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