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r26916 Friday 3rd January, 2014 at 16:33:21 UTC by R. Belmont
n68681: modernized and killed config struct in favor of devcb2. [R. Belmont]
[src/emu/machine]n68681.c n68681.h
[src/mame/drivers]adp.c bfm_sc4h.c bfm_sc5.c harddriv.c maygayv1.c tmaster.c vlc.c
[src/mess/drivers]cat.c dectalk.c esq1.c esq5505.c esqkt.c ht68k.c

trunk/src/mame/drivers/harddriv.c
r26915r26916
399399   hddsk_update_pif                /* a change has occurred on an output pin */
400400};
401401
402
403402/*************************************
404403 *
405 *  68681 DUART config
406 *
407 *************************************/
408
409static const duartn68681_config duart_config =
410{
411   DEVCB_DRIVER_LINE_MEMBER(harddriv_state, harddriv_duart_irq_handler),     /* irq callback */
412   DEVCB_NULL,                           /* serial transmit A */
413   DEVCB_NULL,                     /* serial transmit B */
414   DEVCB_NULL,                     /* input port */
415   DEVCB_NULL,                     /* output port */
416};
417
418
419
420/*************************************
421 *
422404 *  Driver board memory maps
423405 *
424406 *************************************/
r26915r26916
13531335   MCFG_M48T02_ADD("200e") // MK48T02
13541336   MCFG_EEPROM_2816_ADD("210e") // MK48Z02
13551337
1356   MCFG_DUARTN68681_ADD("duartn68681", XTAL_3_6864MHz, duart_config)
1338   MCFG_DUARTN68681_ADD("duartn68681", XTAL_3_6864MHz)
1339   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(harddriv_state, harddriv_duart_irq_handler))
13571340
13581341   /* video hardware */
13591342   MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
trunk/src/mame/drivers/vlc.c
r26915r26916
596596INPUT_PORTS_END
597597
598598/***************************************************************************/
599static const duartn68681_config nevada_duart18_68681_config =
600{
601   DEVCB_DRIVER_LINE_MEMBER(nevada_state, duart18_irq_handler),
602   DEVCB_NULL,
603   DEVCB_NULL,
604   DEVCB_INPUT_PORT("DSW1"),
605   DEVCB_NULL
606};
607/***************************************************************************/
608static const duartn68681_config nevada_duart39_68681_config =
609{
610   DEVCB_DRIVER_LINE_MEMBER(nevada_state, duart39_irq_handler),
611   DEVCB_NULL,
612   DEVCB_NULL,
613   DEVCB_INPUT_PORT("DSW2"),
614   DEVCB_NULL
615};
616/***************************************************************************/
617static const duartn68681_config nevada_duart40_68681_config =
618{
619   DEVCB_DRIVER_LINE_MEMBER(nevada_state, duart40_irq_handler),
620   DEVCB_DEVICE_LINE_MEMBER("microtouch", microtouch_serial_device, rx),
621   DEVCB_NULL,
622   DEVCB_INPUT_PORT("DSW3"),
623   DEVCB_NULL
624};
625
626/***************************************************************************/
627599/*************************
628600*     Machine Reset      *
629601*************************/
r26915r26916
667639   MCFG_SOUND_ADD("aysnd", AY8912, SOUND_CLOCK)
668640   MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
669641
670   MCFG_DUARTN68681_ADD( "duart18_68681", XTAL_3_6864MHz , nevada_duart18_68681_config )  // UARTA = Modem 1200Baud
671   MCFG_DUARTN68681_ADD( "duart39_68681", XTAL_3_6864MHz , nevada_duart39_68681_config )  // UARTA = Printer
672   MCFG_DUARTN68681_ADD( "duart40_68681", XTAL_3_6864MHz , nevada_duart40_68681_config )  // UARTA = Touch , UARTB = Bill Acceptor
642   MCFG_DUARTN68681_ADD( "duart18_68681", XTAL_3_6864MHz )  // UARTA = Modem 1200Baud
643   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(nevada_state, duart18_irq_handler))
644   MCFG_DUARTN68681_INPORT_CALLBACK(IOPORT("DSW1"))
645
646   MCFG_DUARTN68681_ADD( "duart39_68681", XTAL_3_6864MHz )  // UARTA = Printer
647   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(nevada_state, duart39_irq_handler))
648   MCFG_DUARTN68681_INPORT_CALLBACK(IOPORT("DSW2"))
649
650   MCFG_DUARTN68681_ADD( "duart40_68681", XTAL_3_6864MHz )  // UARTA = Touch , UARTB = Bill Acceptor
651   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(nevada_state, duart40_irq_handler))
652   MCFG_DUARTN68681_A_TX_CALLBACK(DEVWRITELINE("microtouch", microtouch_serial_device, rx))
653   MCFG_DUARTN68681_INPORT_CALLBACK(IOPORT("DSW3"))
654
673655   MCFG_MICROTOUCH_SERIAL_ADD( "microtouch", 9600, DEVWRITELINE("duart40_68681", duartn68681_device, rx_a_w) )
674656   /* devices */
675657   MCFG_MSM6242_ADD("rtc", nevada_rtc_intf)
trunk/src/mame/drivers/tmaster.c
r26915r26916
908908   // lev 2 triggered at the end of the blit
909909}
910910
911static const duartn68681_config tmaster_duart68681_config =
912{
913   DEVCB_DRIVER_LINE_MEMBER(tmaster_state, duart_irq_handler),
914   DEVCB_DEVICE_LINE_MEMBER("microtouch", microtouch_serial_device, rx),
915   DEVCB_NULL,
916   DEVCB_NULL,
917   DEVCB_NULL
918};
919
920911static MACHINE_CONFIG_START( tm, tmaster_state )
921912   MCFG_CPU_ADD("maincpu", M68000, XTAL_24MHz / 2) /* 12MHz */
922913   MCFG_CPU_PROGRAM_MAP(tmaster_map)
r26915r26916
924915
925916   MCFG_MACHINE_RESET_OVERRIDE(tmaster_state,tmaster)
926917
927   MCFG_DUARTN68681_ADD( "duart68681", XTAL_8_664MHz / 2 /*??*/, tmaster_duart68681_config )
918   MCFG_DUARTN68681_ADD( "duart68681", XTAL_8_664MHz / 2 /*??*/)
919   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(tmaster_state, duart_irq_handler))
920   MCFG_DUARTN68681_A_TX_CALLBACK(DEVWRITELINE("microtouch", microtouch_serial_device, rx))
921
928922   MCFG_MICROTOUCH_SERIAL_ADD( "microtouch", 9600, DEVWRITELINE("duart68681", duartn68681_device, rx_a_w) )
929923
930924   MCFG_NVRAM_ADD_0FILL("nvram")
trunk/src/mame/drivers/adp.c
r26915r26916
316316   m_register_active = 0;
317317}
318318
319static const duartn68681_config skattv_duart68681_config =
320{
321   DEVCB_DRIVER_LINE_MEMBER(adp_state, duart_irq_handler),
322   DEVCB_DEVICE_LINE_MEMBER("microtouch", microtouch_serial_device, rx),
323   DEVCB_NULL,
324   DEVCB_INPUT_PORT("DSW1"),
325   DEVCB_NULL
326};
327
328319PALETTE_INIT_MEMBER(adp_state,adp)
329320{
330321   int i;
r26915r26916
640631   MCFG_MACHINE_START_OVERRIDE(adp_state,skattv)
641632   MCFG_MACHINE_RESET_OVERRIDE(adp_state,skattv)
642633
643   MCFG_DUARTN68681_ADD( "duart68681", XTAL_8_664MHz / 2, skattv_duart68681_config )
634   MCFG_DUARTN68681_ADD( "duart68681", XTAL_8_664MHz / 2 )
635   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(adp_state, duart_irq_handler))
636   MCFG_DUARTN68681_A_TX_CALLBACK(DEVWRITELINE("microtouch", microtouch_serial_device, rx))
637   MCFG_DUARTN68681_INPORT_CALLBACK(IOPORT("DSW1"))
638
644639   MCFG_MICROTOUCH_SERIAL_ADD( "microtouch", 9600, DEVWRITELINE("duart68681", duartn68681_device, rx_a_w) )
645640
646641   MCFG_SCREEN_ADD("screen", RASTER)
r26915r26916
672667   MCFG_MACHINE_START_OVERRIDE(adp_state,skattv)
673668   MCFG_MACHINE_RESET_OVERRIDE(adp_state,skattv)
674669
675   MCFG_DUARTN68681_ADD( "duart68681", XTAL_8_664MHz / 2, skattv_duart68681_config )
670   MCFG_DUARTN68681_ADD( "duart68681", XTAL_8_664MHz / 2 )
671   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(adp_state, duart_irq_handler))
672   MCFG_DUARTN68681_A_TX_CALLBACK(DEVWRITELINE("microtouch", microtouch_serial_device, rx))
673   MCFG_DUARTN68681_INPORT_CALLBACK(IOPORT("DSW1"))
674
676675   MCFG_MICROTOUCH_SERIAL_ADD( "microtouch", 9600, DEVWRITELINE("duart68681", duartn68681_device, rx_a_w) )
677676
678677   MCFG_SCREEN_ADD("screen", RASTER)
r26915r26916
700699   MCFG_CPU_ADD("maincpu", M68000, 8000000)
701700   MCFG_CPU_PROGRAM_MAP(backgamn_mem)
702701
703   MCFG_DUARTN68681_ADD( "duart68681", XTAL_8_664MHz / 2, skattv_duart68681_config )
702   MCFG_DUARTN68681_ADD( "duart68681", XTAL_8_664MHz / 2 )
703   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(adp_state, duart_irq_handler))
704   MCFG_DUARTN68681_A_TX_CALLBACK(DEVWRITELINE("microtouch", microtouch_serial_device, rx))
705   MCFG_DUARTN68681_INPORT_CALLBACK(IOPORT("DSW1"))
706
704707   MCFG_MICROTOUCH_SERIAL_ADD( "microtouch", 9600, DEVWRITELINE("duart68681", duartn68681_device, rx_a_w) )
705708
706709   MCFG_MACHINE_START_OVERRIDE(adp_state,skattv)
trunk/src/mame/drivers/maygayv1.c
r26915r26916
957957   m_soundcpu->set_input_line(MCS51_RX_LINE, ASSERT_LINE);  // ?
958958};
959959
960static const duartn68681_config maygayv1_duart68681_config =
961{
962   DEVCB_DRIVER_LINE_MEMBER(maygayv1_state, duart_irq_handler),
963   DEVCB_DRIVER_LINE_MEMBER(maygayv1_state, duart_txa),
964   DEVCB_NULL,
965   DEVCB_NULL,
966   DEVCB_NULL
967};
968
969
970960READ8_MEMBER(maygayv1_state::data_to_i8031)
971961{
972962   return m_d68681_val;
r26915r26916
10611051
10621052   MCFG_PALETTE_LENGTH(16)
10631053
1064   MCFG_DUARTN68681_ADD("duart68681", DUART_CLOCK, maygayv1_duart68681_config)
1054   MCFG_DUARTN68681_ADD("duart68681", DUART_CLOCK)
1055   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(maygayv1_state, duart_irq_handler))
1056   MCFG_DUARTN68681_A_TX_CALLBACK(WRITELINE(maygayv1_state, duart_txa))
10651057
1066
10671058   MCFG_SPEAKER_STANDARD_MONO("mono")
10681059
10691060   MCFG_SOUND_ADD("ymsnd",YM2413, MASTER_CLOCK / 4)
trunk/src/mame/drivers/bfm_sc4h.c
r26915r26916
672672   awp_draw_reel(5);
673673}
674674
675
676static const duartn68681_config bfm_sc4_duart68681_config =
677{
678   DEVCB_DRIVER_LINE_MEMBER(sc4_state, bfm_sc4_duart_irq_handler),
679   DEVCB_DRIVER_LINE_MEMBER(sc4_state, bfm_sc4_duart_txa),
680   DEVCB_NULL,
681   DEVCB_DRIVER_MEMBER(sc4_state, bfm_sc4_duart_input_r),
682   DEVCB_DRIVER_MEMBER(sc4_state, bfm_sc4_duart_output_w),
683   // TODO: What are the actual frequencies?
684   XTAL_16MHz/2/8,     /* IP2/RxCB clock */
685   XTAL_16MHz/2/16,    /* IP3/TxCA clock */
686   XTAL_16MHz/2/16,    /* IP4/RxCA clock */
687   XTAL_16MHz/2/8,     /* IP5/TxCB clock */
688};
689
690
691
692675void m68307_duart_irq_handler(device_t *device, int state, UINT8 vector)
693676{
694677   sc4_state *drvstate = device->machine().driver_data<sc4_state>();
r26915r26916
758741
759742   MCFG_NVRAM_ADD_1FILL("nvram")
760743
761   MCFG_DUARTN68681_ADD("duart68681", 16000000/4, bfm_sc4_duart68681_config) // ?? Mhz
744   MCFG_DUARTN68681_ADD("duart68681", 16000000/4) // ?? Mhz
745   MCFG_DUARTN68681_SET_EXTERNAL_CLOCKS(XTAL_16MHz/2/8, XTAL_16MHz/2/16, XTAL_16MHz/2/16, XTAL_16MHz/2/8)
746   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(sc4_state, bfm_sc4_duart_irq_handler))
747   MCFG_DUARTN68681_A_TX_CALLBACK(WRITELINE(sc4_state, bfm_sc4_duart_txa))
748   MCFG_DUARTN68681_INPORT_CALLBACK(READ8(sc4_state, bfm_sc4_duart_input_r))
749   MCFG_DUARTN68681_OUTPORT_CALLBACK(WRITE8(sc4_state, bfm_sc4_duart_output_w))
762750
763751   MCFG_BFMBDA_ADD("vfd0",0)
764752
trunk/src/mame/drivers/bfm_sc5.c
r26915r26916
214214   logerror("bfm_sc5_duart_output_w\n");
215215}
216216
217
218static const duartn68681_config bfm_sc5_duart68681_config =
219{
220   DEVCB_DRIVER_LINE_MEMBER(bfm_sc5_state, bfm_sc5_duart_irq_handler),
221   DEVCB_DRIVER_LINE_MEMBER(bfm_sc5_state, bfm_sc5_duart_txa),
222   DEVCB_NULL,
223   DEVCB_DRIVER_MEMBER(bfm_sc5_state, bfm_sc5_duart_input_r),
224   DEVCB_DRIVER_MEMBER(bfm_sc5_state, bfm_sc5_duart_output_w),
225   // TODO: What are the actual frequencies?
226   16000000/2/8,     /* IP2/RxCB clock */
227   16000000/2/16,    /* IP3/TxCA clock */
228   16000000/2/16,    /* IP4/RxCA clock */
229   16000000/2/8,     /* IP5/TxCB clock */
230};
231
232
233217MACHINE_CONFIG_START( bfm_sc5, bfm_sc5_state )
234218   MCFG_CPU_ADD("maincpu", MCF5206E, 40000000) /* MCF5206eFT */
235219   MCFG_CPU_PROGRAM_MAP(sc5_map)
r26915r26916
238222   /* sound hardware */
239223   MCFG_SPEAKER_STANDARD_MONO("mono")
240224
241   MCFG_DUARTN68681_ADD("duart68681", 16000000/4, bfm_sc5_duart68681_config) // ?? Mhz
225   MCFG_DUARTN68681_ADD("duart68681", 16000000/4) // ?? Mhz
226   MCFG_DUARTN68681_SET_EXTERNAL_CLOCKS(16000000/2/8, 16000000/2/16, 16000000/2/16, 16000000/2/8)
227   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(bfm_sc5_state, bfm_sc5_duart_irq_handler))
228   MCFG_DUARTN68681_A_TX_CALLBACK(WRITELINE(bfm_sc5_state, bfm_sc5_duart_txa))
229   MCFG_DUARTN68681_INPORT_CALLBACK(READ8(bfm_sc5_state, bfm_sc5_duart_input_r))
230   MCFG_DUARTN68681_OUTPORT_CALLBACK(WRITE8(bfm_sc5_state, bfm_sc5_duart_output_w))
242231
243
244232   MCFG_BFMBDA_ADD("vfd0",0)
245233
246234   MCFG_DEFAULT_LAYOUT(layout_bfm_sc5)
trunk/src/emu/machine/n68681.c
r26915r26916
5454const device_type DUART68681CHANNEL = &device_creator<duart68681_channel>;
5555
5656MACHINE_CONFIG_FRAGMENT( duart68681 )
57   MCFG_DUART68681_CHANNEL_ADD(CHANA_TAG)
58   MCFG_DUART68681_CHANNEL_ADD(CHANB_TAG)
57   MCFG_DEVICE_ADD(CHANA_TAG, DUART68681CHANNEL, 0)
58   MCFG_DEVICE_ADD(CHANB_TAG, DUART68681CHANNEL, 0)
5959MACHINE_CONFIG_END
6060
6161//**************************************************************************
r26915r26916
6565duartn68681_device::duartn68681_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
6666   : device_t(mconfig, DUARTN68681, "DUART 68681 (new)", tag, owner, clock, "dun68681", __FILE__),
6767   m_chanA(*this, CHANA_TAG),
68   m_chanB(*this, CHANB_TAG)
68   m_chanB(*this, CHANB_TAG),
69   write_irq(*this),
70   write_a_tx(*this),
71   write_b_tx(*this),
72   read_inport(*this),
73   write_outport(*this)
6974{
7075}
7176
77//-------------------------------------------------
78//  static_set_clocks - configuration helper to set
79//  the external clocks
80//-------------------------------------------------
81
82void duartn68681_device::static_set_clocks(device_t &device, int clk3, int clk4, int clk5, int clk6)
83{
84   duartn68681_device &duart = downcast<duartn68681_device &>(device);
85   duart.ip3clk = clk3;
86   duart.ip4clk = clk4;
87   duart.ip5clk = clk5;
88   duart.ip6clk = clk6;
89}
90
7291/*-------------------------------------------------
7392    device start callback
7493-------------------------------------------------*/
7594
7695void duartn68681_device::device_start()
7796{
78   m_out_irq_func.resolve(m_out_irq_cb, *this);
79   m_out_a_tx_func.resolve(m_out_a_tx_cb, *this);
80   m_out_b_tx_func.resolve(m_out_b_tx_cb, *this);
81   m_in_port_func.resolve(m_in_port_cb, *this);
82   m_out_port_func.resolve(m_out_port_cb, *this);
97   write_irq.resolve_safe();
98   write_a_tx.resolve_safe();
99   write_b_tx.resolve_safe();
100   read_inport.resolve_safe(0);
101   write_outport.resolve_safe();
83102
84103   duart_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(duartn68681_device::duart_timer_callback),this), NULL);
85104
r26915r26916
109128   IP_last_state = 0;  /* last state of IP bits */
110129   // "reset clears internal registers (SRA, SRB, IMR, ISR, OPR, OPCR) puts OP0-7 in the high state, stops the counter/timer, and puts channels a/b in the inactive state"
111130
112   m_out_port_func(0, OPR ^ 0xff);
131   write_outport(OPR ^ 0xff);
113132}
114133
115//-------------------------------------------------
116//  device_config_complete - perform any
117//  operations now that the configuration is
118//  complete
119//-------------------------------------------------
120
121void duartn68681_device::device_config_complete()
122{
123   // inherit a copy of the static data
124   const duartn68681_config *intf = reinterpret_cast<const duartn68681_config *>(static_config());
125   if (intf != NULL)
126   {
127      *static_cast<duartn68681_config *>(this) = *intf;
128   }
129   // or initialize to defaults if none provided
130   else
131   {
132      memset(&m_out_irq_cb, 0, sizeof(m_out_irq_cb));
133      memset(&m_out_a_tx_cb, 0, sizeof(m_out_a_tx_cb));
134      memset(&m_out_b_tx_cb, 0, sizeof(m_out_b_tx_cb));
135      memset(&m_in_port_cb, 0, sizeof(m_in_port_cb));
136      memset(&m_out_port_cb, 0, sizeof(m_out_port_cb));
137   }
138}
139
140134machine_config_constructor duartn68681_device::device_mconfig_additions() const
141135{
142136   return MACHINE_CONFIG_NAME( duart68681 );
r26915r26916
162156   if ( (ISR & IMR) != 0 )
163157   {
164158      LOG(( "68681: Interrupt line active (IMR & ISR = %02X)\n", (ISR & IMR) ));
165      m_out_irq_func(ASSERT_LINE);
159      write_irq(ASSERT_LINE);
166160   }
167161   else
168162   {
169163      LOG(( "68681: Interrupt line not active (IMR & ISR = %02X)\n", ISR & IMR));
170      m_out_irq_func(CLEAR_LINE);
164      write_irq(CLEAR_LINE);
171165   }
172166};
173167
r26915r26916
271265
272266      case 0x04: /* IPCR */
273267      {
274         UINT8 IP = m_in_port_func(0);
268         UINT8 IP = read_inport();
275269
276270         r = (((IP_last_state ^ IP) & 0x0f) << 4) | (IP & 0x0f);
277271         IP_last_state = IP;
r26915r26916
299293         break;
300294
301295      case 0x0d: /* IP */
302         r = m_in_port_func(0);
296         r = read_inport();
303297         break;
304298
305299      case 0x0e: /* Start counter command */
r26915r26916
412406
413407      case 0x0e: /* Set Output Port Bits */
414408         OPR |= data;
415         m_out_port_func(0, OPR ^ 0xff);
409         write_outport(OPR ^ 0xff);
416410         break;
417411
418412      case 0x0f: /* Reset Output Port Bits */
419413         OPR &= ~data;
420         m_out_port_func(0, OPR ^ 0xff);
414         write_outport(OPR ^ 0xff);
421415         break;
422416   }
423417}
r26915r26916
583577//  printf("ch %d transmit %d\n", m_ch, bit);
584578   if (m_ch == 0)
585579   {
586      m_uart->m_out_a_tx_func(bit);
580      m_uart->write_a_tx(bit);
587581   }
588582   else
589583   {
590      m_uart->m_out_b_tx_func(bit);
584      m_uart->write_b_tx(bit);
591585   }
592586}
593587
trunk/src/emu/machine/n68681.h
r26915r26916
22#define _N68681_H
33
44
5#define MCFG_DUARTN68681_ADD(_tag, _clock, _config) \
6   MCFG_DEVICE_ADD(_tag, DUARTN68681, _clock) \
7   MCFG_DEVICE_CONFIG(_config)
5#define MCFG_DUARTN68681_ADD(_tag, _clock) \
6   MCFG_DEVICE_ADD(_tag, DUARTN68681, _clock)
87
9#define MCFG_DUARTN68681_REPLACE(_tag, _clock, _config) \
10   MCFG_DEVICE_REPLACE(_tag, DUARTN68681, _clock) \
11   MCFG_DEVICE_CONFIG(_config)
8#define MCFG_DUARTN68681_REPLACE(_tag, _clock) \
9   MCFG_DEVICE_REPLACE(_tag, DUARTN68681, _clock)
1210
13#define MCFG_DUART68681_CHANNEL_ADD(_tag) \
14   MCFG_DEVICE_ADD(_tag, DUART68681CHANNEL, 0)
11#define MCFG_DUARTN68681_IRQ_CALLBACK(_cb) \
12   downcast<duartn68681_device *>(device)->set_irq_cb(DEVCB2_##_cb);
13
14#define MCFG_DUARTN68681_A_TX_CALLBACK(_cb) \
15   downcast<duartn68681_device *>(device)->set_a_tx_cb(DEVCB2_##_cb);
16
17#define MCFG_DUARTN68681_B_TX_CALLBACK(_cb) \
18   downcast<duartn68681_device *>(device)->set_b_tx_cb(DEVCB2_##_cb);
19
20#define MCFG_DUARTN68681_INPORT_CALLBACK(_cb) \
21   downcast<duartn68681_device *>(device)->set_inport_cb(DEVCB2_##_cb);
22
23#define MCFG_DUARTN68681_OUTPORT_CALLBACK(_cb) \
24   downcast<duartn68681_device *>(device)->set_outport_cb(DEVCB2_##_cb);
25
26#define MCFG_DUARTN68681_SET_EXTERNAL_CLOCKS(_a, _b, _c, _d) \
27   duartn68681_device::static_set_clocks(*device, _a, _b, _c, _d);
28
1529// forward declaration
1630class duartn68681_device;
1731
18struct duartn68681_config
19{
20   devcb_write_line    m_out_irq_cb;
21   devcb_write_line    m_out_a_tx_cb;
22   devcb_write_line    m_out_b_tx_cb;
23   devcb_read8         m_in_port_cb;
24   devcb_write8        m_out_port_cb;
25
26   /* clocks for external baud rates */
27   INT32 ip3clk, ip4clk, ip5clk, ip6clk;
28};
29
3032#define MC68681_RX_FIFO_SIZE                3
3133
3234// forward declaration
r26915r26916
9193   void recalc_framing();
9294};
9395
94class duartn68681_device : public device_t, public duartn68681_config
96class duartn68681_device : public device_t
9597{
9698   friend class duart68681_channel;
9799
r26915r26916
101103   required_device<duart68681_channel> m_chanA;
102104   required_device<duart68681_channel> m_chanB;
103105
106   // inline configuration helpers
107   static void static_set_clocks(device_t &device, int clk3, int clk4, int clk5, int clk6);
108
104109   // API
105110   DECLARE_READ8_HANDLER(read);
106111   DECLARE_WRITE8_HANDLER(write);
r26915r26916
109114   DECLARE_WRITE_LINE_MEMBER( rx_a_w ) { m_chanA->device_serial_interface::rx_w((UINT8)state); }
110115   DECLARE_WRITE_LINE_MEMBER( rx_b_w ) { m_chanB->device_serial_interface::rx_w((UINT8)state); }
111116
117   template<class _write> void set_irq_cb(_write wr) { write_irq.set_callback(wr); }
118   template<class _write> void set_a_tx_cb(_write wr) { write_a_tx.set_callback(wr); }
119   template<class _write> void set_b_tx_cb(_write wr) { write_b_tx.set_callback(wr); }
120   template<class _read>  void set_inport_cb(_read rd) { read_inport.set_callback(rd); }
121   template<class _write> void set_outport_cb(_write wr) { write_outport.set_callback(wr); }
122
123   devcb2_write_line write_irq, write_a_tx, write_b_tx;
124   devcb2_read8 read_inport;
125   devcb2_write8 write_outport;
126   INT32 ip3clk, ip4clk, ip5clk, ip6clk;
127
112128protected:
113129   // device-level overrides
114   virtual void device_config_complete();
115130   virtual void device_start();
116131   virtual void device_reset();
117132   virtual machine_config_constructor device_mconfig_additions() const;
trunk/src/mess/drivers/cat.c
r26915r26916
11121112#endif
11131113}
11141114
1115static const duartn68681_config cat_duart_config =
1116{
1117   DEVCB_DRIVER_LINE_MEMBER(cat_state, cat_duart_irq_handler), /* irq callback */
1118   DEVCB_DRIVER_LINE_MEMBER(cat_state, cat_duart_txa),         /* serial transmit A */
1119   DEVCB_NULL,                                                 /* serial transmit B */
1120   DEVCB_DRIVER_MEMBER(cat_state, cat_duart_input),            /* input port */
1121   DEVCB_DRIVER_MEMBER(cat_state, cat_duart_output),           /* output port */
1122};
1123
11241115static MACHINE_CONFIG_START( cat, cat_state )
11251116
11261117   /* basic machine hardware */
r26915r26916
11431134
11441135   MCFG_VIDEO_START_OVERRIDE(cat_state,cat)
11451136
1146   MCFG_DUARTN68681_ADD( "duartn68681", XTAL_19_968MHz*2/11, cat_duart_config ) // duart is normally clocked by 3.6864mhz xtal, but cat seemingly uses a divider from the main xtal instead which probably yields 3.63054545Mhz. There is a trace to cut and a mounting area to allow using an actual 3.6864mhz xtal if you so desire
1137   MCFG_DUARTN68681_ADD( "duartn68681", XTAL_19_968MHz*2/11 ) // duart is normally clocked by 3.6864mhz xtal, but cat seemingly uses a divider from the main xtal instead which probably yields 3.63054545Mhz. There is a trace to cut and a mounting area to allow using an actual 3.6864mhz xtal if you so desire
1138   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(cat_state, cat_duart_irq_handler))
1139   MCFG_DUARTN68681_A_TX_CALLBACK(WRITELINE(cat_state, cat_duart_txa))
1140   MCFG_DUARTN68681_INPORT_CALLBACK(READ8(cat_state, cat_duart_input))
1141   MCFG_DUARTN68681_OUTPORT_CALLBACK(WRITE8(cat_state, cat_duart_output))
11471142
11481143   MCFG_NVRAM_ADD_0FILL("nvram")
11491144MACHINE_CONFIG_END
trunk/src/mess/drivers/esq5505.c
r26915r26916
188188   virtual void machine_start();
189189   virtual void machine_reset();
190190
191   DECLARE_READ16_MEMBER(es5510_dsp_r);
192   DECLARE_WRITE16_MEMBER(es5510_dsp_w);
193191   DECLARE_READ16_MEMBER(lower_r);
194192   DECLARE_WRITE16_MEMBER(lower_w);
195193
r26915r26916
512510   m_panel->rx_w(state);
513511}
514512
515static const duartn68681_config duart_config =
516{
517   DEVCB_DRIVER_LINE_MEMBER(esq5505_state, duart_irq_handler),
518   DEVCB_DRIVER_LINE_MEMBER(esq5505_state, duart_tx_a),
519   DEVCB_DRIVER_LINE_MEMBER(esq5505_state, duart_tx_b),
520   DEVCB_DRIVER_MEMBER(esq5505_state, duart_input),
521   DEVCB_DRIVER_MEMBER(esq5505_state, duart_output),
522
523   500000, 500000, // IP3, IP4
524   1000000, 1000000, // IP5, IP6
525};
526
527513static void esq_dma_end(running_machine &machine, int channel, int irq)
528514{
529515   device_t *device = machine.device("mc68450");
r26915r26916
666652
667653   MCFG_ESQPANEL2x40_ADD("panel", esqpanel_config)
668654
669   MCFG_DUARTN68681_ADD("duart", 4000000, duart_config)
655   MCFG_DUARTN68681_ADD("duart", 4000000)
656   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(esq5505_state, duart_irq_handler))
657   MCFG_DUARTN68681_A_TX_CALLBACK(WRITELINE(esq5505_state, duart_tx_a))
658   MCFG_DUARTN68681_B_TX_CALLBACK(WRITELINE(esq5505_state, duart_tx_b))
659   MCFG_DUARTN68681_INPORT_CALLBACK(READ8(esq5505_state, duart_input))
660   MCFG_DUARTN68681_OUTPORT_CALLBACK(WRITE8(esq5505_state, duart_output))
661   MCFG_DUARTN68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
670662
671663   MCFG_SERIAL_PORT_ADD("mdin", midiin_slot, "midiin")
672664   MCFG_SERIAL_OUT_RX_HANDLER(DEVWRITELINE("duart", duartn68681_device, rx_a_w)) // route MIDI Tx send directly to 68681 channel A Rx
r26915r26916
722714
723715   MCFG_ESQPANEL2x40_ADD("panel", esqpanel_config)
724716
725   MCFG_DUARTN68681_ADD("duart", 4000000, duart_config)
717   MCFG_DUARTN68681_ADD("duart", 4000000)
718   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(esq5505_state, duart_irq_handler))
719   MCFG_DUARTN68681_A_TX_CALLBACK(WRITELINE(esq5505_state, duart_tx_a))
720   MCFG_DUARTN68681_B_TX_CALLBACK(WRITELINE(esq5505_state, duart_tx_b))
721   MCFG_DUARTN68681_INPORT_CALLBACK(READ8(esq5505_state, duart_input))
722   MCFG_DUARTN68681_OUTPORT_CALLBACK(WRITE8(esq5505_state, duart_output))
723   MCFG_DUARTN68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
726724
727725   MCFG_SERIAL_PORT_ADD("mdin", midiin_slot, "midiin")
728726   MCFG_SERIAL_OUT_RX_HANDLER(DEVWRITELINE("duart", duartn68681_device, rx_a_w)) // route MIDI Tx send directly to 68681 channel A Rx
trunk/src/mess/drivers/ht68k.c
r26915r26916
121121   if (m_floppy) {m_floppy->ss_w(BIT(data,3) ? 0 : 1);}
122122}
123123
124static const duartn68681_config ht68k_duart68681_config =
125{
126   DEVCB_DRIVER_LINE_MEMBER(ht68k_state, duart_irq_handler),
127   DEVCB_DEVICE_LINE_MEMBER("rs232", serial_port_device, tx), //serial channel CON (console, for terminal, 9600 baud)
128   DEVCB_DRIVER_LINE_MEMBER(ht68k_state, duart_txb), // serial channel AUX (auxiliary, for modem or other serial device, 1200 baud)
129   DEVCB_DRIVER_MEMBER(ht68k_state, duart_input),
130   DEVCB_DRIVER_MEMBER(ht68k_state, duart_output)
131};
132
133124static SLOT_INTERFACE_START( ht68k_floppies )
134125   SLOT_INTERFACE( "525dd", FLOPPY_525_DD )
135126SLOT_INTERFACE_END
r26915r26916
143134   MCFG_SERIAL_OUT_RX_HANDLER(DEVWRITELINE("duart68681", duartn68681_device, rx_a_w))
144135
145136   /* video hardware */
146   MCFG_DUARTN68681_ADD( "duart68681", XTAL_8MHz / 2, ht68k_duart68681_config )
137   MCFG_DUARTN68681_ADD( "duart68681", XTAL_8MHz / 2 )
138   MCFG_DUARTN68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
139   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(ht68k_state, duart_irq_handler))
140   MCFG_DUARTN68681_A_TX_CALLBACK(DEVWRITELINE("rs232", serial_port_device, tx))
141   MCFG_DUARTN68681_B_TX_CALLBACK(WRITELINE(ht68k_state, duart_txb))
142   MCFG_DUARTN68681_INPORT_CALLBACK(READ8(ht68k_state, duart_input))
143   MCFG_DUARTN68681_OUTPORT_CALLBACK(WRITE8(ht68k_state, duart_output))
147144
148145   MCFG_WD1770x_ADD("wd1770", XTAL_8MHz )
149146
trunk/src/mess/drivers/esqkt.c
r26915r26916
197197   m_sq1panel->rx_w(state);
198198}
199199
200static const duartn68681_config duart_config =
201{
202   DEVCB_DRIVER_LINE_MEMBER(esqkt_state, duart_irq_handler),
203   DEVCB_DRIVER_LINE_MEMBER(esqkt_state, duart_tx_a),
204   DEVCB_DRIVER_LINE_MEMBER(esqkt_state, duart_tx_b),
205   DEVCB_DRIVER_MEMBER(esqkt_state, duart_input),
206   DEVCB_DRIVER_MEMBER(esqkt_state, duart_output),
207
208   500000, 500000,    // IP3, IP4
209   1000000, 1000000, // IP5, IP6
210};
211
212200static const es5506_interface es5506_config =
213201{
214202   "waverom",  /* Bank 0 */
r26915r26916
253241
254242   MCFG_ESQPANEL2x40_SQ1_ADD("sq1panel", esqpanel_config)
255243
256   MCFG_DUARTN68681_ADD("duart", 4000000, duart_config)
244   MCFG_DUARTN68681_ADD("duart", 4000000)
245   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(esqkt_state, duart_irq_handler))
246   MCFG_DUARTN68681_A_TX_CALLBACK(WRITELINE(esqkt_state, duart_tx_a))
247   MCFG_DUARTN68681_B_TX_CALLBACK(WRITELINE(esqkt_state, duart_tx_b))
248   MCFG_DUARTN68681_INPORT_CALLBACK(READ8(esqkt_state, duart_input))
249   MCFG_DUARTN68681_OUTPORT_CALLBACK(WRITE8(esqkt_state, duart_output))
250   MCFG_DUARTN68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
251   MCFG_DUARTN68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
257252
258253   MCFG_SERIAL_PORT_ADD("mdin", midiin_slot, "midiin")
259254   MCFG_SERIAL_OUT_RX_HANDLER(DEVWRITELINE("duart", duartn68681_device, rx_a_w)) // route MIDI Tx send directly to 68681 channel A Rx
trunk/src/mess/drivers/dectalk.c
r26915r26916
390390#endif
391391}
392392
393static const duartn68681_config dectalk_duart_config =
394{
395   DEVCB_DRIVER_LINE_MEMBER(dectalk_state, dectalk_duart_irq_handler), /* irq callback */
396   DEVCB_DRIVER_LINE_MEMBER(dectalk_state, dectalk_duart_txa),         /* serial transmit A (alternate) */
397   DEVCB_DEVICE_LINE_MEMBER("rs232", serial_port_device, tx),          /* serial transmit B (main/local terminal) */
398   DEVCB_DRIVER_MEMBER(dectalk_state, dectalk_duart_input),            /* input port */
399   DEVCB_DRIVER_MEMBER(dectalk_state, dectalk_duart_output),           /* output port */
400};
401
402
403393/* FIFO and TMS32010 stuff */
404394#define SPC_INITIALIZE state->m_m68k_spcflags_latch&0x1 // speech initialize flag
405395#define SPC_IRQ_ENABLED ((state->m_m68k_spcflags_latch&0x40)>>6) // irq enable flag
r26915r26916
890880   MCFG_CPU_ADD("maincpu", M68000, XTAL_20MHz/2) /* E74 20MHz OSC (/2) */
891881   MCFG_CPU_PROGRAM_MAP(m68k_mem)
892882   MCFG_CPU_IO_MAP(m68k_io)
893   MCFG_DUARTN68681_ADD( "duartn68681", XTAL_3_6864MHz, dectalk_duart_config ) /* 2681 duart (not 68681!); Y3 3.6864MHz Xtal */
883   MCFG_DUARTN68681_ADD( "duartn68681", XTAL_3_6864MHz ) /* 2681 duart (not 68681!); Y3 3.6864MHz Xtal */
884   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(dectalk_state, dectalk_duart_irq_handler))
885   MCFG_DUARTN68681_A_TX_CALLBACK(WRITELINE(dectalk_state, dectalk_duart_txa))
886   MCFG_DUARTN68681_B_TX_CALLBACK(DEVWRITELINE("rs232", serial_port_device, tx))
887   MCFG_DUARTN68681_INPORT_CALLBACK(READ8(dectalk_state, dectalk_duart_input))
888   MCFG_DUARTN68681_OUTPORT_CALLBACK(WRITE8(dectalk_state, dectalk_duart_output))
894889
895890   MCFG_CPU_ADD("dsp", TMS32010, XTAL_20MHz) /* Y1 20MHz xtal */
896891   MCFG_CPU_PROGRAM_MAP(tms32010_mem)
trunk/src/mess/drivers/esq1.c
r26915r26916
594594   SLOT_INTERFACE("midiout", MIDIOUT_PORT)
595595SLOT_INTERFACE_END
596596
597static const duartn68681_config duart_config =
598{
599   DEVCB_DRIVER_LINE_MEMBER(esq1_state, duart_irq_handler),
600   DEVCB_DRIVER_LINE_MEMBER(esq1_state, duart_tx_a),
601   DEVCB_DRIVER_LINE_MEMBER(esq1_state, duart_tx_b),
602   DEVCB_DRIVER_MEMBER(esq1_state, duart_input),
603   DEVCB_DRIVER_MEMBER(esq1_state, duart_output),
604
605   500000, 500000, // IP3, IP4
606   1000000, 1000000, // IP5, IP6
607};
608
609597static const esqpanel_interface esqpanel_config =
610598{
611599   DEVCB_DEVICE_LINE_MEMBER("duart", duartn68681_device, rx_b_w)
r26915r26916
615603   MCFG_CPU_ADD("maincpu", M6809E, 4000000)    // how fast is it?
616604   MCFG_CPU_PROGRAM_MAP(esq1_map)
617605
618   MCFG_DUARTN68681_ADD("duart", 4000000, duart_config)
606   MCFG_DUARTN68681_ADD("duart", 4000000)
607   MCFG_DUARTN68681_SET_EXTERNAL_CLOCKS(500000, 500000, 1000000, 1000000)
608   MCFG_DUARTN68681_IRQ_CALLBACK(WRITELINE(esq1_state, duart_irq_handler))
609   MCFG_DUARTN68681_A_TX_CALLBACK(WRITELINE(esq1_state, duart_tx_a))
610   MCFG_DUARTN68681_B_TX_CALLBACK(WRITELINE(esq1_state, duart_tx_b))
611   MCFG_DUARTN68681_INPORT_CALLBACK(READ8(esq1_state, duart_input))
612   MCFG_DUARTN68681_OUTPORT_CALLBACK(WRITE8(esq1_state, duart_output))
613
619614   MCFG_ESQPANEL2x40_ADD("panel", esqpanel_config)
620615
621616   MCFG_SERIAL_PORT_ADD("mdin", midiin_slot, "midiin")

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