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r26902 Thursday 2nd January, 2014 at 23:36:43 UTC by Dirk Best
px4.c: initial diserial support
[src/emu/imagedev]bitbngr.c
[src/mess/drivers]px4.c

trunk/src/emu/imagedev/bitbngr.c
r26901r26902
2727{
2828   m_output_timer = NULL;
2929   m_input_timer = NULL;
30   m_output_value = 0;
30   m_output_value = 1;
3131   m_build_count = 0;
3232   m_build_byte = 0;
3333   m_idle_delay = attotime::zero;
trunk/src/mess/drivers/px4.c
r26901r26902
5252#define ART_OE      0x10    // overrun error
5353#define ART_FE      0x20    // framing error
5454
55// art baud rates
56static const int transmit_rate[] = { 2112, 1536, 768, 384, 192, 96, 48, 24, 192, 3072, 12, 6, 1152 };
57static const int receive_rate[] = { 2112, 1536, 768, 384, 192, 96, 48, 24, 3072, 192, 12, 6, 1152 };
5855
59
6056//**************************************************************************
6157//  MACROS
6258//**************************************************************************
6359
6460#define ART_TX_ENABLED  (BIT(m_artcr, 0))
6561#define ART_RX_ENABLED  (BIT(m_artcr, 2))
62#define ART_BREAK       (BIT(m_artcr, 3))
6663
67#define ART_DATA        (BIT(m_artmr, 2))   // number of data bits, 7 or 8
68#define ART_PEN         (BIT(m_artmr, 4))   // parity enabled
69#define ART_EVEN        (BIT(m_artmr, 5))   // even or odd parity
70#define ART_STOP        (BIT(m_artmr, 7))   // number of stop bits, 1 or 2
7164
72
7365//**************************************************************************
7466//  TYPE DEFINITIONS
7567//**************************************************************************
7668
77class px4_state : public driver_device
69class px4_state : public driver_device,
70              public device_serial_interface
7871{
7972public:
80   px4_state(const machine_config &mconfig, device_type type, const char *tag)
81      : driver_device(mconfig, type, tag),
82         m_z80(*this, "maincpu"),
83         m_ram(*this, RAM_TAG),
84         m_centronics(*this, "centronics"),
85         m_ext_cas(*this, "extcas"),
86         m_speaker(*this, "speaker"),
87         m_sio(*this, "sio"),
88         m_rs232(*this, "rs232")
89         ,
90      m_maincpu(*this, "maincpu") { }
73   px4_state(const machine_config &mconfig, device_type type, const char *tag) :
74   driver_device(mconfig, type, tag),
75   device_serial_interface(mconfig, *this),
76   m_z80(*this, "maincpu"),
77   m_ram(*this, RAM_TAG),
78   m_centronics(*this, "centronics"),
79   m_ext_cas(*this, "extcas"),
80   m_ext_cas_timer(*this, "extcas_timer"),
81   m_speaker(*this, "speaker"),
82   m_sio(*this, "sio"),
83   m_rs232(*this, "rs232"),
84   m_isr(0), m_ier(0), m_str(0), m_sior(0xbf),
85   m_artdir(0xff), m_artdor(0xff), m_artsr(0), m_artcr(0),
86   m_swr(0),
87   m_one_sec_int_enabled(true), m_alarm_int_enabled(true),   m_key_int_enabled(true),
88   m_ramdisk_address(0),
89   m_ear_last_state(0)
90   { }
9191
9292   // internal devices
9393   required_device<cpu_device> m_z80;
9494   required_device<ram_device> m_ram;
9595   required_device<centronics_device> m_centronics;
9696   required_device<cassette_image_device> m_ext_cas;
97   required_device<timer_device> m_ext_cas_timer;
9798   required_device<speaker_sound_device> m_speaker;
9899   required_device<epson_sio_device> m_sio;
99100   required_device<rs232_port_device> m_rs232;
r26901r26902
123124   UINT8 m_artdir;
124125   UINT8 m_artdor;
125126   UINT8 m_artsr;
126   UINT8 m_artmr;
127127   UINT8 m_artcr;
128128   UINT8 m_swr;
129129
r26901r26902
143143   UINT8 *m_ramdisk;
144144
145145   // external cassette/barcode reader
146   emu_timer *m_ext_cas_timer;
147146   int m_ear_last_state;
148147
149148   void install_rom_capsule(address_space &space, int size, const char *region);
150149
150   // device_serial_interface overrides
151   virtual void tra_callback();
152   virtual void tra_complete();
153   virtual void rcv_callback();
154   virtual void rcv_complete();
155   virtual void input_callback(UINT8 state);
156
157   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
158
159   DECLARE_WRITE_LINE_MEMBER( serial_rx_w );
160   DECLARE_WRITE_LINE_MEMBER( serial_dcd_w );
161   DECLARE_WRITE_LINE_MEMBER( serial_dsr_w );
162   DECLARE_WRITE_LINE_MEMBER( serial_cts_w );
163
164   int m_rs232_dcd;
165   int m_rs232_cts;
166
151167   DECLARE_READ8_MEMBER(px4_icrlc_r);
152168   DECLARE_WRITE8_MEMBER(px4_ctrl1_w);
153169   DECLARE_READ8_MEMBER(px4_icrhc_r);
r26901r26902
187203   DECLARE_PALETTE_INIT(px4p);
188204   UINT32 screen_update_px4(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
189205   DECLARE_INPUT_CHANGED_MEMBER(key_callback);
190   TIMER_CALLBACK_MEMBER(ext_cassette_read);
206   TIMER_DEVICE_CALLBACK_MEMBER( ext_cassette_read );
191207   TIMER_CALLBACK_MEMBER(transmit_data);
192208   TIMER_CALLBACK_MEMBER(receive_data);
193209   TIMER_DEVICE_CALLBACK_MEMBER(frc_tick);
194210   TIMER_DEVICE_CALLBACK_MEMBER(upd7508_1sec_callback);
195   required_device<cpu_device> m_maincpu;
196211};
197212
198213
r26901r26902
222237}
223238
224239// external cassette or barcode reader input
225TIMER_CALLBACK_MEMBER(px4_state::ext_cassette_read)
240TIMER_DEVICE_CALLBACK_MEMBER( px4_state::ext_cassette_read )
226241{
227242   UINT8 result;
228243   int trigger = 0;
r26901r26902
260275}
261276
262277// free running counter
263TIMER_DEVICE_CALLBACK_MEMBER(px4_state::frc_tick)
278TIMER_DEVICE_CALLBACK_MEMBER( px4_state::frc_tick )
264279{
265280   m_frc_value++;
266281
r26901r26902
272287}
273288
274289// input capture register low command trigger
275READ8_MEMBER(px4_state::px4_icrlc_r)
290READ8_MEMBER( px4_state::px4_icrlc_r )
276291{
277292   if (VERBOSE)
278293      logerror("%s: px4_icrlc_r\n", machine().describe_context());
r26901r26902
284299}
285300
286301// control register 1
287WRITE8_MEMBER(px4_state::px4_ctrl1_w)
302WRITE8_MEMBER( px4_state::px4_ctrl1_w )
288303{
289   int baud;
304   const int rcv_rates[] = { 110, 150, 300, 600, 1200, 2400, 4800, 9600, 75, 1200, 19200, 38400, 200 };
305   const int tra_rates[] = { 110, 150, 300, 600, 1200, 2400, 4800, 9600, 1200, 75, 19200, 38400, 200 };
290306
291307   if (VERBOSE)
292308      logerror("%s: px4_ctrl1_w (0x%02x)\n", machine().describe_context(), data);
293309
294310   // baudrate generator
295   baud = data >> 4;
311   int baud = data >> 4;
296312
297313   if (baud <= 12)
298314   {
299      m_transmit_timer->adjust(attotime::zero, 0, attotime::from_hz(XTAL_7_3728MHz/2/transmit_rate[baud]));
300      m_receive_timer->adjust(attotime::zero, 0, attotime::from_hz(XTAL_7_3728MHz/2/receive_rate[baud]));
315      if (VERBOSE)
316         logerror("rcv baud = %d, tra baud = %d\n", rcv_rates[baud], tra_rates[baud]);
317
318      set_rcv_rate(rcv_rates[baud]);
319      set_tra_rate(tra_rates[baud]);
301320   }
302321
303322   m_ctrl1 = data;
304323}
305324
306325// input capture register high command trigger
307READ8_MEMBER(px4_state::px4_icrhc_r)
326READ8_MEMBER( px4_state::px4_icrhc_r )
308327{
309328   if (VERBOSE)
310329      logerror("%s: px4_icrhc_r\n", machine().describe_context());
r26901r26902
313332}
314333
315334// command register
316WRITE8_MEMBER(px4_state::px4_cmdr_w)
335WRITE8_MEMBER( px4_state::px4_cmdr_w )
317336{
318   if (VERBOSE)
337   if (0)
319338      logerror("%s: px4_cmdr_w (0x%02x)\n", machine().describe_context(), data);
320339
321340   // clear overflow interrupt?
r26901r26902
327346}
328347
329348// input capture register low barcode trigger
330READ8_MEMBER(px4_state::px4_icrlb_r)
349READ8_MEMBER( px4_state::px4_icrlb_r )
331350{
332351   if (VERBOSE)
333352      logerror("%s: px4_icrlb_r\n", machine().describe_context());
r26901r26902
336355}
337356
338357// control register 2
339WRITE8_MEMBER(px4_state::px4_ctrl2_w)
358WRITE8_MEMBER( px4_state::px4_ctrl2_w )
340359{
341360   if (VERBOSE)
342361      logerror("%s: px4_ctrl2_w (0x%02x)\n", machine().describe_context(), data);
r26901r26902
358377}
359378
360379// input capture register high barcode trigger
361READ8_MEMBER(px4_state::px4_icrhb_r)
380READ8_MEMBER( px4_state::px4_icrhb_r )
362381{
363382   if (VERBOSE)
364383      logerror("%s: px4_icrhb_r\n", machine().describe_context());
r26901r26902
371390}
372391
373392// interrupt status register
374READ8_MEMBER(px4_state::px4_isr_r)
393READ8_MEMBER( px4_state::px4_isr_r )
375394{
376395   if (VERBOSE)
377396      logerror("%s: px4_isr_r\n", machine().describe_context());
r26901r26902
380399}
381400
382401// interrupt enable register
383WRITE8_MEMBER(px4_state::px4_ier_w)
402WRITE8_MEMBER( px4_state::px4_ier_w )
384403{
385   if (VERBOSE)
404   if (0)
386405      logerror("%s: px4_ier_w (0x%02x)\n", machine().describe_context(), data);
387406
388407   m_ier = data;
r26901r26902
390409}
391410
392411// status register
393READ8_MEMBER(px4_state::px4_str_r)
412READ8_MEMBER( px4_state::px4_str_r )
394413{
395414   UINT8 result = 0;
396415
r26901r26902
426445}
427446
428447// bank register
429WRITE8_MEMBER(px4_state::px4_bankr_w)
448WRITE8_MEMBER( px4_state::px4_bankr_w )
430449{
431450   address_space &space_program = m_z80->space(AS_PROGRAM);
432451
433   if (VERBOSE)
452   if (0)
434453      logerror("%s: px4_bankr_w (0x%02x)\n", machine().describe_context(), data);
435454
436455   m_bankr = data;
r26901r26902
464483}
465484
466485// serial io register
467READ8_MEMBER(px4_state::px4_sior_r)
486READ8_MEMBER( px4_state::px4_sior_r )
468487{
469   if (VERBOSE)
488   if (0)
470489      logerror("%s: px4_sior_r 0x%02x\n", machine().describe_context(), m_sior);
471490
472491   return m_sior;
473492}
474493
475494// serial io register
476WRITE8_MEMBER(px4_state::px4_sior_w)
495WRITE8_MEMBER( px4_state::px4_sior_w )
477496{
478   if (VERBOSE)
497   if (0)
479498      logerror("%s: px4_sior_w (0x%02x)\n", machine().describe_context(), data);
480499
481500   m_sior = data;
r26901r26902
603622//**************************************************************************
604623
605624// vram start address register
606WRITE8_MEMBER(px4_state::px4_vadr_w)
625WRITE8_MEMBER( px4_state::px4_vadr_w )
607626{
608627   if (VERBOSE)
609628      logerror("%s: px4_vadr_w (0x%02x)\n", machine().describe_context(), data);
r26901r26902
612631}
613632
614633// y offset register
615WRITE8_MEMBER(px4_state::px4_yoff_w)
634WRITE8_MEMBER( px4_state::px4_yoff_w )
616635{
617636   if (VERBOSE)
618637      logerror("%s: px4_yoff_w (0x%02x)\n", machine().describe_context(), data);
r26901r26902
621640}
622641
623642// frame register
624WRITE8_MEMBER(px4_state::px4_fr_w)
643WRITE8_MEMBER( px4_state::px4_fr_w )
625644{
626645   if (VERBOSE)
627646      logerror("%s: px4_fr_w (0x%02x)\n", machine().describe_context(), data);
628647}
629648
630649// speed-up register
631WRITE8_MEMBER(px4_state::px4_spur_w)
650WRITE8_MEMBER( px4_state::px4_spur_w )
632651{
633652   if (VERBOSE)
634653      logerror("%s: px4_spur_w (0x%02x)\n", machine().describe_context(), data);
r26901r26902
639658//  GAPNIO
640659//**************************************************************************
641660
661WRITE_LINE_MEMBER( px4_state::serial_rx_w )
662{
663   // synchronize to the start bit
664   device_serial_interface::rx_w(state);
665
666   // update line state
667   if (state)
668      input_callback(m_input_state | RX);
669   else
670      input_callback(m_input_state & ~RX);
671}
672
673WRITE_LINE_MEMBER( px4_state::serial_dcd_w )
674{
675   m_rs232_dcd = state;
676}
677
678WRITE_LINE_MEMBER( px4_state::serial_dsr_w )
679{
680   m_artsr |= !state << 7;
681}
682
683WRITE_LINE_MEMBER( px4_state::serial_cts_w )
684{
685   m_rs232_cts = state;
686}
687
688void px4_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
689{
690   device_serial_interface::device_timer(timer, id, param, ptr);
691}
692
693void px4_state::tra_callback()
694{
695   if (ART_TX_ENABLED)
696   {
697      if (ART_BREAK)
698      {
699         // transmit break
700         txd_w(0);
701         set_out_data_bit(0);
702      }
703      else
704      {
705         // transmit data
706         txd_w(transmit_register_get_data_bit());
707      }
708   }
709   else
710   {
711      // transmit mark
712      txd_w(1);
713      set_out_data_bit(1);
714   }
715}
716
717void px4_state::tra_complete()
718{
719   if (m_artsr & ART_TXRDY)
720   {
721      // no more bytes, buffer now empty
722      m_artsr |= ART_TXEMPTY;
723   }
724   else
725   {
726      // transfer next byte
727      transmit_register_setup(m_artdor);
728      m_artsr |= ART_TXRDY;
729   }
730}
731
732void px4_state::rcv_callback()
733{
734   if (ART_RX_ENABLED)
735   {
736      // receive data
737      receive_register_update_bit(get_in_data_bit());
738   }
739}
740
741void px4_state::rcv_complete()
742{
743   receive_register_extract();
744   m_artdir = get_received_char();
745
746   // TODO: verify parity and framing
747
748   // overrun?
749   if (m_artsr & ART_RXRDY)
750      m_artsr |= ART_OE;
751
752   // set ready and signal interrupt
753   m_artsr |= ART_RXRDY;
754   m_isr |= INT1_ART;
755   gapnit_interrupt();
756}
757
758void px4_state::input_callback(UINT8 state)
759{
760   m_input_state = state;
761}
762
642763// helper function to read from selected serial port
643764int px4_state::rxd_r()
644765{
645766   if (BIT(m_swr, 3))
646767      // from rs232
647      return m_rs232->rx();
768      return get_in_data_bit();
648769   else
649770      if (BIT(m_swr, 2))
650771         // from sio
r26901r26902
664785      if (BIT(m_swr, 3))
665786         // from rs232
666787         m_rs232->tx(data);
667      // else from cartridge
788      // else to cartridge
668789}
669790
670TIMER_CALLBACK_MEMBER(px4_state::transmit_data)
671{
672   if (ART_TX_ENABLED)
673   {
674   }
675}
676
677TIMER_CALLBACK_MEMBER(px4_state::receive_data)
678{
679   if (ART_RX_ENABLED)
680   {
681   }
682}
683
684791// cartridge interface
685READ8_MEMBER(px4_state::px4_ctgif_r)
792READ8_MEMBER( px4_state::px4_ctgif_r )
686793{
687794   if (VERBOSE)
688795      logerror("%s: px4_ctgif_r @ 0x%02x\n", machine().describe_context(), offset);
689796
690   return 0xff;
797   return 0x00;
691798}
692799
693800// cartridge interface
694WRITE8_MEMBER(px4_state::px4_ctgif_w)
801WRITE8_MEMBER( px4_state::px4_ctgif_w )
695802{
696803   if (VERBOSE)
697804      logerror("%s: px4_ctgif_w (0x%02x @ 0x%02x)\n", machine().describe_context(), data, offset);
698805}
699806
700807// art data input register
701READ8_MEMBER(px4_state::px4_artdir_r)
808READ8_MEMBER( px4_state::px4_artdir_r )
702809{
703810   if (VERBOSE)
704811      logerror("%s: px4_artdir_r\n", machine().describe_context());
r26901r26902
706813   // clear ready
707814   m_artsr &= ~ART_RXRDY;
708815
816   // clear interrupt
817   m_isr &= ~INT1_ART;
818   gapnit_interrupt();
819
709820   return m_artdir;
710821}
711822
712823// art data output register
713WRITE8_MEMBER(px4_state::px4_artdor_w)
824WRITE8_MEMBER( px4_state::px4_artdor_w )
714825{
715826   if (VERBOSE)
716827      logerror("%s: px4_artdor_w (0x%02x)\n", machine().describe_context(), data);
717828
718   // clear ready
719   m_artsr &= ~ART_TXRDY;
829   m_artdor = data;
720830
721   m_artdor = data;
831   // new data to transmit?
832   if (ART_TX_ENABLED && is_transmit_register_empty())
833   {
834      transmit_register_setup(m_artdor);
835      m_artsr |= ART_TXRDY;
836   }
837   else
838   {
839      // clear ready
840      m_artsr &= ~ART_TXRDY;
841   }
722842}
723843
724844// art status register
725READ8_MEMBER(px4_state::px4_artsr_r)
845READ8_MEMBER( px4_state::px4_artsr_r )
726846{
727   UINT8 result = 0;
847   if (0)
848      logerror("%s: px4_artsr_r (%02x)\n", machine().describe_context(), m_artsr);
728849
729   if (VERBOSE)
730      logerror("%s: px4_artsr_r\n", machine().describe_context());
731
732   result |= m_rs232->dsr_r() << 7;
733
734   return result | m_artsr;
850   return m_artsr;
735851}
736852
737853// art mode register
738WRITE8_MEMBER(px4_state::px4_artmr_w)
854WRITE8_MEMBER( px4_state::px4_artmr_w )
739855{
856   int data_bits = BIT(data, 2) ? 8 : 7;
857   int parity = BIT(data, 4) ? (BIT(data, 5) ? PARITY_EVEN : PARITY_ODD) : PARITY_NONE;
858   int stop_bits = BIT(data, 7) ? 2 : 1;
859
740860   if (VERBOSE)
741      logerror("%s: px4_artmr_w (0x%02x)\n", machine().describe_context(), data);
861      logerror("%s: serial frame setup: %d-%d-%d\n", tag(), data_bits, stop_bits, parity);
742862
743   m_artmr = data;
863   set_data_frame(data_bits, stop_bits, parity, false);
744864}
745865
746866// io status register
747READ8_MEMBER(px4_state::px4_iostr_r)
867READ8_MEMBER( px4_state::px4_iostr_r )
748868{
749   UINT8 result = 0;
869   UINT8 data = 0;
750870
751   if (VERBOSE)
752      logerror("%s: px4_iostr_r\n", machine().describe_context());
753
754871   // centronics status
755   result |= m_centronics->busy_r() << 0;
756   result |= !m_centronics->pe_r() << 1;
872   data |= m_centronics->busy_r() << 0;
873   data |= !m_centronics->pe_r() << 1;
757874
758875   // sio status
759   result |= !m_sio->pin_r() << 2;
876   data |= !m_sio->pin_r() << 2;
760877
761878   // serial data
762   result |= rxd_r() << 3;
879   data |= rxd_r() << 3;
763880
764881   // rs232 status
765   result |= m_rs232->dcd_r() << 4;
766   result |= m_rs232->cts_r() << 5;
882   data |= !m_rs232_dcd << 4;
883   data |= !m_rs232_cts << 5;
767884
768   result |= 1 << 6;   // bit 6, csel, cartridge option select signal, set to 'other mode'
769   result |= 0 << 7;   // bit 7, caud - audio input from cartridge
885   data |= 1 << 6;   // bit 6, csel, cartridge option select signal
886   data |= 0 << 7;   // bit 7, caud - audio input from cartridge
770887
771   return result;
888   if (0)
889      logerror("%s: px4_iostr_r (%02x)\n", machine().describe_context(), data);
890
891   logerror("%s: px4_iostr_r: rx = %d, dcd = %d, cts = %d\n", machine().describe_context(), BIT(data, 3), BIT(data, 4), BIT(data, 5));
892
893   return data;
772894}
773895
774896// art command register
775WRITE8_MEMBER(px4_state::px4_artcr_w)
897WRITE8_MEMBER( px4_state::px4_artcr_w )
776898{
777899   if (VERBOSE)
778900      logerror("%s: px4_artcr_w (0x%02x)\n", machine().describe_context(), data);
779901
780902   m_artcr = data;
781903
782   // bit 0, txe - transmit enable
783   if (!ART_TX_ENABLED)
784      txd_w(1); // force high when disabled
785
786   // bit 3, sbrk - break output
787   if (ART_TX_ENABLED && BIT(data, 3))
788      txd_w(0); // force low when enabled and transmit enabled
789
790904   // error reset
791905   if (BIT(data, 4))
792906      m_artsr &= ~(ART_PE | ART_OE | ART_FE);
793907
794908   // rs232
795   m_rs232->dtr_w(BIT(data, 1));
796   m_rs232->rts_w(BIT(data, 5));
909   m_rs232->dtr_w(!BIT(data, 1));
910   m_rs232->rts_w(!BIT(data, 5));
797911}
798912
799913// switch register
800WRITE8_MEMBER(px4_state::px4_swr_w)
914WRITE8_MEMBER( px4_state::px4_swr_w )
801915{
802916   if (VERBOSE)
803      logerror("%s: px4_swr_w (0x%02x)\n", machine().describe_context(), data);
917   {
918      const char *cart_mode[] = { "hs", "io", "db", "ot" };
919      const char *ser_mode[] = { "cart sio / cart sio", "sio / sio", "rs232 / rs232", "rs232 / sio" };
920      logerror("%s: px4_swr_w: cartridge mode: %s, serial mode: %s, audio: %s\n", machine().describe_context(),
921         cart_mode[data & 0x03], ser_mode[(data >> 2) & 0x03], BIT(data, 4) ? "on" : "off");
922   }
804923
805924   m_swr = data;
806925}
807926
808927// io control register
809WRITE8_MEMBER(px4_state::px4_ioctlr_w)
928WRITE8_MEMBER( px4_state::px4_ioctlr_w )
810929{
811930   if (VERBOSE)
812931      logerror("%s: px4_ioctlr_w (0x%02x)\n", machine().describe_context(), data);
r26901r26902
830949//  7508 RELATED
831950//**************************************************************************
832951
833TIMER_DEVICE_CALLBACK_MEMBER(px4_state::upd7508_1sec_callback)
952TIMER_DEVICE_CALLBACK_MEMBER( px4_state::upd7508_1sec_callback )
834953{
835954   // adjust interrupt status
836955   m_interrupt_status |= UPD7508_INT_ONE_SECOND;
r26901r26902
843962   }
844963}
845964
846INPUT_CHANGED_MEMBER(px4_state::key_callback)
965INPUT_CHANGED_MEMBER( px4_state::key_callback )
847966{
848967   UINT32 oldvalue = oldval * field.mask(), newvalue = newval * field.mask();
849968   UINT32 delta = oldvalue ^ newvalue;
r26901r26902
8871006//  EXTERNAL RAM-DISK
8881007//**************************************************************************
8891008
890WRITE8_MEMBER(px4_state::px4_ramdisk_address_w)
1009WRITE8_MEMBER( px4_state::px4_ramdisk_address_w )
8911010{
8921011   switch (offset)
8931012   {
r26901r26902
8971016   }
8981017}
8991018
900READ8_MEMBER(px4_state::px4_ramdisk_data_r)
1019READ8_MEMBER( px4_state::px4_ramdisk_data_r )
9011020{
9021021   UINT8 ret = 0xff;
9031022
r26901r26902
9171036   return ret;
9181037}
9191038
920WRITE8_MEMBER(px4_state::px4_ramdisk_data_w)
1039WRITE8_MEMBER( px4_state::px4_ramdisk_data_w )
9211040{
9221041   if (m_ramdisk_address < 0x20000)
9231042      m_ramdisk[m_ramdisk_address] = data;
r26901r26902
9251044   m_ramdisk_address = (m_ramdisk_address & 0xffff00) | ((m_ramdisk_address & 0xff) + 1);
9261045}
9271046
928READ8_MEMBER(px4_state::px4_ramdisk_control_r)
1047READ8_MEMBER( px4_state::px4_ramdisk_control_r )
9291048{
9301049   // bit 7 determines the presence of a ram-disk
9311050   return 0x7f;
r26901r26902
9821101//  DRIVER INIT
9831102//**************************************************************************
9841103
985DRIVER_INIT_MEMBER(px4_state,px4)
1104DRIVER_INIT_MEMBER( px4_state, px4 )
9861105{
987   // init 7508
988   m_one_sec_int_enabled = true;
989   m_key_int_enabled = true;
990   m_alarm_int_enabled = true;
991
992   // art
993   m_receive_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(px4_state::receive_data), this));
994   m_transmit_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(px4_state::transmit_data), this));
995
996   // external cassette or barcode reader
997   m_ext_cas_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(px4_state::ext_cassette_read), this));
998   m_ear_last_state = 0;
999
10001106   // map os rom and last half of memory
10011107   membank("bank1")->set_base(memregion("os")->base());
10021108   membank("bank2")->set_base(m_ram->pointer() + 0x8000);
10031109}
10041110
1005DRIVER_INIT_MEMBER(px4_state, px4p)
1111DRIVER_INIT_MEMBER( px4_state, px4p )
10061112{
10071113   DRIVER_INIT_CALL(px4);
10081114
r26901r26902
10131119void px4_state::machine_reset()
10141120{
10151121   m_artsr = ART_TXRDY | ART_TXEMPTY;
1122   receive_register_reset();
1123   transmit_register_reset();
10161124}
10171125
1018MACHINE_START_MEMBER(px4_state, px4_ramdisk)
1126MACHINE_START_MEMBER( px4_state, px4_ramdisk )
10191127{
10201128   machine().device<nvram_device>("nvram")->set_base(m_ramdisk, 0x20000);
10211129}
10221130
1131
10231132//**************************************************************************
10241133//  ADDRESS MAPS
10251134//**************************************************************************
r26901r26902
10801189   PORT_START("dips")
10811190
10821191   PORT_DIPNAME(0x0f, 0x0f, "Character set")
1083   PORT_DIPLOCATION("PX-4 DIP:8,7,6,5")
1192   PORT_DIPLOCATION("DIP:8,7,6,5")
10841193   PORT_DIPSETTING(0x0f, "ASCII")
10851194   PORT_DIPSETTING(0x0e, "France")
10861195   PORT_DIPSETTING(0x0d, "Germany")
r26901r26902
12851394
12861395   // external cassette
12871396   MCFG_CASSETTE_ADD("extcas", px4_cassette_interface)
1397   MCFG_TIMER_DRIVER_ADD("extcas_timer", px4_state, ext_cassette_read)
12881398
12891399   // sio port
12901400   MCFG_EPSON_SIO_ADD("sio", NULL)
12911401
12921402   // rs232 port
12931403   MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, NULL)
1404   MCFG_SERIAL_OUT_RX_HANDLER(WRITELINE(px4_state, serial_rx_w))
1405   MCFG_RS232_OUT_DCD_HANDLER(WRITELINE(px4_state, serial_dcd_w))
1406   MCFG_RS232_OUT_DSR_HANDLER(WRITELINE(px4_state, serial_dsr_w))
1407   MCFG_RS232_OUT_CTS_HANDLER(WRITELINE(px4_state, serial_cts_w))
12941408
12951409   // rom capsules
12961410   MCFG_CARTSLOT_ADD("capsule1")

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