trunk/src/emu/machine/mc68901.c
| r26790 | r26791 | |
|---|
| 409 | 409 | save_item(NAME(m_tsr)); |
| 410 | 410 | save_item(NAME(m_udr)); |
| 411 | 411 | save_item(NAME(m_udr_written)); |
| 412 | save_item(NAME(m_rcv)); |
| 413 | save_item(NAME(m_rcv_pending)); |
| 412 | 414 | save_item(NAME(m_rxtx_word)); |
| 413 | 415 | save_item(NAME(m_rxtx_start)); |
| 414 | 416 | save_item(NAME(m_rxtx_stop)); |
| r26790 | r26791 | |
|---|
| 455 | 457 | register_w(REGISTER_RSR, 0); |
| 456 | 458 | |
| 457 | 459 | transmit_register_reset(); |
| 460 | receive_register_reset(); |
| 458 | 461 | } |
| 459 | 462 | |
| 460 | 463 | |
| r26790 | r26791 | |
|---|
| 497 | 500 | transmit_register_setup(m_udr); |
| 498 | 501 | m_udr_written = 0; |
| 499 | 502 | m_tsr |= TSR_BUFFER_EMPTY; |
| 503 | |
| 504 | if (m_ier & IR_XMIT_BUFFER_EMPTY) |
| 505 | { |
| 506 | take_interrupt(IR_XMIT_BUFFER_EMPTY); |
| 507 | } |
| 500 | 508 | } |
| 509 | else |
| 510 | { |
| 511 | m_tsr |= TSR_UNDERRUN_ERROR; |
| 512 | // TODO: transmit error? |
| 513 | } |
| 501 | 514 | } |
| 502 | 515 | else |
| 503 | 516 | { |
| r26790 | r26791 | |
|---|
| 507 | 520 | |
| 508 | 521 | |
| 509 | 522 | //------------------------------------------------- |
| 510 | | // rcv_callback - |
| 511 | | //------------------------------------------------- |
| 512 | | |
| 513 | | void mc68901_device::rcv_callback() |
| 514 | | { |
| 515 | | receive_register_update_bit(get_in_data_bit()); |
| 516 | | } |
| 517 | | |
| 518 | | |
| 519 | | //------------------------------------------------- |
| 520 | 523 | // rcv_complete - |
| 521 | 524 | //------------------------------------------------- |
| 522 | 525 | |
| 523 | 526 | void mc68901_device::rcv_complete() |
| 524 | 527 | { |
| 528 | receive_register_extract(); |
| 529 | m_rcv = get_received_char(); |
| 530 | //if (m_rcv_pending) TODO: error? |
| 531 | |
| 532 | m_rcv_pending = 1; |
| 533 | rx_buffer_full(); |
| 525 | 534 | } |
| 526 | 535 | |
| 527 | 536 | |
| r26790 | r26791 | |
|---|
| 570 | 579 | |
| 571 | 580 | case REGISTER_SCR: return m_scr; |
| 572 | 581 | case REGISTER_UCR: return m_ucr; |
| 573 | | case REGISTER_RSR: |
| 574 | | m_rsr_read = 1; |
| 575 | | return m_rsr; |
| 582 | case REGISTER_RSR: return m_rsr; |
| 576 | 583 | |
| 577 | 584 | case REGISTER_TSR: |
| 578 | 585 | { |
| r26790 | r26791 | |
|---|
| 584 | 591 | } |
| 585 | 592 | |
| 586 | 593 | case REGISTER_UDR: |
| 587 | | /* load RSR with latched value */ |
| 588 | | m_rsr = (m_next_rsr & 0x7c) | (m_rsr & 0x03); |
| 589 | | m_next_rsr = 0; |
| 594 | m_rcv_pending = 0; |
| 595 | return m_rcv; |
| 590 | 596 | |
| 591 | | if (m_rsr & 0x78) |
| 592 | | { |
| 593 | | /* signal receiver error interrupt */ |
| 594 | | rx_error(); |
| 595 | | } |
| 596 | | |
| 597 | | return m_udr; |
| 598 | | |
| 599 | 597 | default: return 0; |
| 600 | 598 | } |
| 601 | 599 | } |
| r26790 | r26791 | |
|---|
| 1135 | 1133 | |
| 1136 | 1134 | WRITE_LINE_MEMBER(mc68901_device::write_rx) |
| 1137 | 1135 | { |
| 1138 | | if (state) |
| 1139 | | { |
| 1140 | | input_callback(m_input_state | RX); |
| 1141 | | } |
| 1142 | | else |
| 1143 | | { |
| 1144 | | input_callback(m_input_state & ~RX); |
| 1145 | | } |
| 1136 | device_serial_interface::rx_w(state); |
| 1146 | 1137 | } |
| 1147 | 1138 | |
| 1148 | 1139 | WRITE_LINE_MEMBER(mc68901_device::write_dsr) |
trunk/src/emu/machine/mc68901.h
| r26790 | r26791 | |
|---|
| 134 | 134 | // device_serial_interface overrides |
| 135 | 135 | virtual void tra_callback(); |
| 136 | 136 | virtual void tra_complete(); |
| 137 | | virtual void rcv_callback(); |
| 138 | 137 | virtual void rcv_complete(); |
| 139 | 138 | virtual void input_callback(UINT8 state); |
| 140 | 139 | |
| r26790 | r26791 | |
|---|
| 271 | 270 | UINT8 m_rsr; /* receiver status register */ |
| 272 | 271 | UINT8 m_udr; /* USART data register */ |
| 273 | 272 | int m_udr_written; |
| 273 | UINT8 m_rcv; |
| 274 | int m_rcv_pending; |
| 274 | 275 | |
| 275 | 276 | /* counter timer state */ |
| 276 | 277 | UINT8 m_tmc[4]; /* timer main counters */ |