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r26769 Thursday 26th December, 2013 at 23:05:12 UTC by smf
removed unused code & variables (nw)
[src/mess/drivers]x68k.c
[src/mess/includes]x68k.h
[src/mess/video]x68k.c

trunk/src/mess/drivers/x68k.c
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140140
141141
142142
143//emu_timer* mfp_timer[4];
144//emu_timer* mfp_irq;
145
146// MFP is clocked at 4MHz, so at /4 prescaler the timer is triggered after 1us (4 cycles)
147// No longer necessary with the new MFP core
148#ifdef UNUSED_FUNCTION
149attotime x68k_state::prescale(int val)
150{
151   switch(val)
152   {
153      case 0: return attotime::from_nsec(0);
154      case 1: return attotime::from_nsec(1000);
155      case 2: return attotime::from_nsec(2500);
156      case 3: return attotime::from_nsec(4000);
157      case 4: return attotime::from_nsec(12500);
158      case 5: return attotime::from_nsec(16000);
159      case 6: return attotime::from_nsec(25000);
160      case 7: return attotime::from_nsec(50000);
161      default:
162         fatalerror("out of range\n");
163   }
164}
165#endif
166
167143void x68k_state::mfp_init()
168144{
169145   m_mfp.tadr = m_mfp.tbdr = m_mfp.tcdr = m_mfp.tddr = 0xff;
170146
171147   m_mfp.irqline = 6;  // MFP is connected to 68000 IRQ line 6
172148   m_mfp.current_irq = -1;  // No current interrupt
173
174#if 0
175   mfp_timer[0] = timer_alloc(TIMER_MFP_TIMER_A);
176   mfp_timer[1] = timer_alloc(TIMER_MFP_TIMER_B);
177   mfp_timer[2] = timer_alloc(TIMER_MFP_TIMER_C);
178   mfp_timer[3] = timer_alloc(TIMER_MFP_TIMER_D);
179   mfp_irq = timer_alloc(TIMER_MFP_UPDATE_IRQ);
180   mfp_irq->adjust(attotime::zero, 0, attotime::from_usec(32));
181#endif
182149}
183150
184151void x68k_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
185152{
186153   switch (id)
187154   {
188   case TIMER_MFP_UPDATE_IRQ:
189      //mfp_update_irq(ptr, param);
190      break;
191   case TIMER_MFP_TIMER_A:
192      //mfp_timer_a_callback(ptr, param);
193      break;
194   case TIMER_MFP_TIMER_B:
195      //mfp_timer_b_callback(ptr, param);
196      break;
197   case TIMER_MFP_TIMER_C:
198      //mfp_timer_c_callback(ptr, param);
199      break;
200   case TIMER_MFP_TIMER_D:
201      //mfp_timer_d_callback(ptr, param);
202      break;
203155   case TIMER_X68K_LED:
204156      x68k_led_callback(ptr, param);
205157      break;
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245197   }
246198}
247199
248
249#ifdef UNUSED_FUNCTION
250TIMER_CALLBACK_MEMBER(x68k_state::mfp_update_irq)
251{
252   int x;
253
254   if((m_ioc.irqstatus & 0xc0) != 0)
255      return;
256
257   // check for pending IRQs, in priority order
258   if(m_mfp.ipra != 0)
259   {
260      for(x=7;x>=0;x--)
261      {
262         if((m_mfp.ipra & (1 << x)) && (m_mfp.imra & (1 << x)))
263         {
264            m_current_irq_line = m_mfp.irqline;
265            m_mfp.current_irq = x + 8;
266            // assert IRQ line
267//              if(m_mfp.iera & (1 << x))
268            {
269               m_current_vector[6] = (m_mfp.vr & 0xf0) | (x+8);
270               m_maincpu->set_input_line_and_vector(m_mfp.irqline,ASSERT_LINE,(m_mfp.vr & 0xf0) | (x + 8));
271//                  logerror("MFP: Sent IRQ vector 0x%02x (IRQ line %i)\n",(m_mfp.vr & 0xf0) | (x+8),m_mfp.irqline);
272               return;  // one at a time only
273            }
274         }
275      }
276   }
277   if(m_mfp.iprb != 0)
278   {
279      for(x=7;x>=0;x--)
280      {
281         if((m_mfp.iprb & (1 << x)) && (m_mfp.imrb & (1 << x)))
282         {
283            m_current_irq_line = m_mfp.irqline;
284            m_mfp.current_irq = x;
285            // assert IRQ line
286//              if(m_mfp.ierb & (1 << x))
287            {
288               m_current_vector[6] = (m_mfp.vr & 0xf0) | x;
289               m_maincpu->set_input_line_and_vector(m_mfp.irqline,ASSERT_LINE,(m_mfp.vr & 0xf0) | x);
290//                  logerror("MFP: Sent IRQ vector 0x%02x (IRQ line %i)\n",(m_mfp.vr & 0xf0) | x,m_mfp.irqline);
291               return;  // one at a time only
292            }
293         }
294      }
295   }
296}
297
298void x68k_state::mfp_trigger_irq(int irq)
299{
300   // check if interrupt is enabled
301   if(irq > 7)
302   {
303      if(!(m_mfp.iera & (1 << (irq-8))))
304         return;  // not enabled, no action taken
305   }
306   else
307   {
308      if(!(m_mfp.ierb & (1 << irq)))
309         return;  // not enabled, no action taken
310   }
311
312   // set requested IRQ as pending
313   if(irq > 7)
314      m_mfp.ipra |= (1 << (irq-8));
315   else
316      m_mfp.iprb |= (1 << irq);
317
318   // check for IRQs to be called
319//  mfp_update_irq(0);
320
321}
322
323TIMER_CALLBACK_MEMBER(x68k_state::mfp_timer_a_callback)
324{
325   m_mfp.timer[0].counter--;
326   if(m_mfp.timer[0].counter == 0)
327   {
328      m_mfp.timer[0].counter = m_mfp.tadr;
329      mfp_trigger_irq(MFP_IRQ_TIMERA);
330   }
331}
332
333TIMER_CALLBACK_MEMBER(x68k_state::mfp_timer_b_callback)
334{
335   m_mfp.timer[1].counter--;
336   if(m_mfp.timer[1].counter == 0)
337   {
338      m_mfp.timer[1].counter = m_mfp.tbdr;
339         mfp_trigger_irq(MFP_IRQ_TIMERB);
340   }
341}
342
343TIMER_CALLBACK_MEMBER(x68k_state::mfp_timer_c_callback)
344{
345   m_mfp.timer[2].counter--;
346   if(m_mfp.timer[2].counter == 0)
347   {
348      m_mfp.timer[2].counter = m_mfp.tcdr;
349         mfp_trigger_irq(MFP_IRQ_TIMERC);
350   }
351}
352
353TIMER_CALLBACK_MEMBER(x68k_state::mfp_timer_d_callback)
354{
355   m_mfp.timer[3].counter--;
356   if(m_mfp.timer[3].counter == 0)
357   {
358      m_mfp.timer[3].counter = m_mfp.tddr;
359         mfp_trigger_irq(MFP_IRQ_TIMERD);
360   }
361}
362
363void x68k_state::mfp_set_timer(int timer, unsigned char data)
364{
365   if((data & 0x07) == 0x0000)
366   {  // Timer stop
367      mfp_timer[timer]->adjust(attotime::zero);
368      logerror("MFP: Timer #%i stopped. \n",timer);
369      return;
370   }
371
372   mfp_timer[timer]->adjust(attotime::zero, 0, prescale(data & 0x07));
373   logerror("MFP: Timer #%i set to %2.1fus\n",timer, prescale(data & 0x07).as_double() * 1000000);
374
375}
376#endif
377
378200// LED timer callback
379201TIMER_CALLBACK_MEMBER(x68k_state::x68k_led_callback)
380202{
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570392}
571393
572394
573#ifdef UNUSED_FUNCTION
574void x68k_state::mfp_recv_data(int data)
575{
576   m_mfp.rsr |= 0x80;  // Buffer full
577   m_mfp.tsr |= 0x80;
578   m_mfp.usart.recv_buffer = 0x00;   // TODO: set up keyboard data
579   m_mfp.vector = m_current_vector[6] = (m_mfp.vr & 0xf0) | 0x0c;
580//  mfp_trigger_irq(MFP_IRQ_RX_FULL);
581//  logerror("MFP: Receive buffer full IRQ sent\n");
582}
583#endif
584
585395// mouse input
586396// port B of the Z8530 SCC
587397// typically read from the SCC data port on receive buffer full interrupt per byte
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12771087   }
12781088}
12791089
1280#ifdef UNUSED_FUNCTION
12811090READ16_MEMBER(x68k_state::x68k_mfp_r)
12821091{
1283   device_t *x68k_mfp = machine().device(MC68901_TAG);
1284
1285   return mc68901_register_r(x68k_mfp, offset);
1286}
1287#endif
1288
1289READ16_MEMBER(x68k_state::x68k_mfp_r)
1290{
12911092   // Initial settings indicate that IRQs are generated for FM (YM2151), Receive buffer error or full,
12921093   // MFP Timer C, and the power switch
12931094//  logerror("MFP: [%08x] Reading offset %i\n",space.device().safe_pc(),offset);
12941095   switch(offset)
12951096   {
1296#if 0
1297   case 0x00:  // GPIP - General purpose I/O register (read-only)
1298      ret = 0x23;
1299      if(machine.primary_screen->vpos() == m_crtc.reg[9])
1300         ret |= 0x40;
1301      if(m_crtc.vblank == 0)
1302         ret |= 0x10;  // Vsync signal (low if in vertical retrace)
1303//      if(m_mfp.isrb & 0x08)
1304//          ret |= 0x08;  // FM IRQ signal
1305      if(machine.primary_screen->hpos() > m_crtc.width - 32)
1306         ret |= 0x80;  // Hsync signal
1307//      logerror("MFP: [%08x] Reading offset %i (ret=%02x)\n",space.device().safe_pc(),offset,ret);
1308      return ret;  // bit 5 is always 1
1309   case 3:
1310      return m_mfp.iera;
1311   case 4:
1312      return m_mfp.ierb;
1313   case 5:
1314      return m_mfp.ipra;
1315   case 6:
1316      return m_mfp.iprb;
1317   case 7:
1318      if(m_mfp.eoi_mode == 0)  // forced low in auto EOI mode
1319         return 0;
1320      else
1321         return m_mfp.isra;
1322   case 8:
1323      if(m_mfp.eoi_mode == 0)  // forced low in auto EOI mode
1324         return 0;
1325      else
1326         return m_mfp.isrb;
1327   case 9:
1328      return m_mfp.imra;
1329   case 10:
1330      return m_mfp.imrb;
1331   case 15:  // TADR
1332      return m_mfp.timer[0].counter;  // Timer data registers return their main counter values
1333   case 16:  // TBDR
1334      return m_mfp.timer[1].counter;
1335   case 17:  // TCDR
1336      return m_mfp.timer[2].counter;
1337   case 18:  // TDDR
1338      return m_mfp.timer[3].counter;
1339#endif
13401097   case 21:  // RSR
13411098      return m_mfp.rsr;
13421099   case 22:  // TSR
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13711128   */
13721129   switch(offset)
13731130   {
1374#if 0
1375   case 0:  // GPDR
1376      // All bits are inputs generally, so no action taken.
1377      break;
1378   case 1:  // AER
1379      m_mfp.aer = data;
1380      break;
1381   case 2:  // DDR
1382      m_mfp.ddr = data;  // usually all bits are 0 (input)
1383      break;
1384   case 3:  // IERA
1385      m_mfp.iera = data;
1386      break;
1387   case 4:  // IERB
1388      m_mfp.ierb = data;
1389      break;
1390   case 5:  // IPRA
1391      m_mfp.ipra = data;
1392      break;
1393   case 6:  // IPRB
1394      m_mfp.iprb = data;
1395      break;
1396   case 7:
1397      m_mfp.isra = data;
1398      break;
1399   case 8:
1400      m_mfp.isrb = data;
1401      break;
1402   case 9:
1403      m_mfp.imra = data;
1404//      mfp_update_irq(0);
1405//      logerror("MFP: IRQ Mask A write: %02x\n",data);
1406      break;
1407   case 10:
1408      m_mfp.imrb = data;
1409//      mfp_update_irq(0);
1410//      logerror("MFP: IRQ Mask B write: %02x\n",data);
1411      break;
1412   case 11:  // VR
1413      m_mfp.vr = 0x40;//data;  // High 4 bits = high 4 bits of IRQ vector
1414      m_mfp.eoi_mode = data & 0x08;  // 0 = Auto, 1 = Software End-of-interrupt
1415      if(m_mfp.eoi_mode == 0)  // In-service registers are cleared if this bit is cleared.
1416      {
1417         m_mfp.isra = 0;
1418         m_mfp.isrb = 0;
1419      }
1420      break;
1421   case 12:  // TACR
1422      m_mfp.tacr = data;
1423      mfp_set_timer(0,data & 0x0f);
1424      break;
1425   case 13:  // TBCR
1426      m_mfp.tbcr = data;
1427      mfp_set_timer(1,data & 0x0f);
1428      break;
1429   case 14:  // TCDCR
1430      m_mfp.tcdcr = data;
1431      mfp_set_timer(2,(data & 0x70)>>4);
1432      mfp_set_timer(3,data & 0x07);
1433      break;
1434   case 15:  // TADR
1435      m_mfp.tadr = data;
1436      m_mfp.timer[0].counter = data;
1437      break;
1438   case 16:  // TBDR
1439      m_mfp.tbdr = data;
1440      m_mfp.timer[1].counter = data;
1441      break;
1442   case 17:  // TCDR
1443      m_mfp.tcdr = data;
1444      m_mfp.timer[2].counter = data;
1445      break;
1446   case 18:  // TDDR
1447      m_mfp.tddr = data;
1448      m_mfp.timer[3].counter = data;
1449      break;
1450   case 20:
1451      m_mfp.ucr = data;
1452      break;
1453#endif
14541131   case 21:
14551132      if(data & 0x01)
14561133         m_mfp.usart.recv_enable = 1;
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15091186      {
15101187         m_mfp.gpio |= 0x01;
15111188         m_mfpdev->i0_w(1);
1512         //mfp_trigger_irq(MFP_IRQ_GPIP0);  // RTC ALARM
15131189      }
15141190   }
15151191   else
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15181194      {
15191195         m_mfp.gpio &= ~0x01;
15201196         m_mfpdev->i0_w(0);
1521         //mfp_trigger_irq(MFP_IRQ_GPIP0);  // RTC ALARM
15221197      }
15231198   }
15241199}
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15391214//      return 0x0000;
15401215   if(offset == 0x08/2)
15411216      return m_ram->size() >> 16;  // RAM size
1542#if 0
1543   if(offset == 0x46/2)
1544      return 0x0024;
1545   if(offset == 0x6e/2)
1546      return 0xff00;
1547   if(offset == 0x70/2)
1548      return 0x0700;
1549#endif
15501217   return m_nvram16[offset];
15511218}
15521219
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15541221{
15551222   if(offset == 0x08/4)
15561223      return (m_ram->size() & 0xffff0000);  // RAM size
1557#if 0
1558   if(offset == 0x46/2)
1559      return 0x0024;
1560   if(offset == 0x6e/2)
1561      return 0xff00;
1562   if(offset == 0x70/2)
1563      return 0x0700;
1564#endif
15651224   return m_nvram32[offset];
15661225}
15671226
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18401499   data &= ~(m_crtc.vblank << 4);
18411500   data |= 0x23;  // GPIP5 is unused, always 1
18421501
1843//  m_mfpdev->tai_w(state->m_crtc.vblank);
1844
18451502   return data;
18461503}
18471504
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18711528   m_mfp_prev = state;
18721529}
18731530
1874INTERRUPT_GEN_MEMBER(x68k_state::x68k_vsync_irq)
1875{
1876#if 0
1877   x68k_state *state = machine.driver_data<x68k_state>();
1878   if(m_mfp.ierb & 0x40)
1879   {
1880      m_mfp.isrb |= 0x40;
1881      m_current_vector[6] = (m_mfp.vr & 0xf0) | 0x06;  // GPIP4 (V-DISP)
1882      m_current_irq_line = 6;
1883      mfp_timer_a_callback(0);  // Timer A is usually always in event count mode, and is tied to V-DISP
1884      mfp_trigger_irq(MFP_IRQ_GPIP4);
1885   }
1886   if(m_crtc.height == 256)
1887      machine.primary_screen->update_partial(256);//m_crtc.reg[4]/2);
1888   else
1889      machine.primary_screen->update_partial(512);//m_crtc.reg[4]);
1890#endif
1891}
1892
18931531IRQ_CALLBACK_MEMBER(x68k_state::x68k_int_ack)
18941532{
18951533   if(irqline == 6)  // MFP
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27012339   /* basic machine hardware */
27022340   MCFG_CPU_ADD("maincpu", M68000, 10000000)  /* 10 MHz */
27032341   MCFG_CPU_PROGRAM_MAP(x68k_map)
2704   MCFG_CPU_VBLANK_INT_DRIVER("screen", x68k_state,  x68k_vsync_irq)
27052342   MCFG_QUANTUM_TIME(attotime::from_hz(60))
27062343
27072344   MCFG_MACHINE_START_OVERRIDE(x68k_state, x68000 )
trunk/src/mess/video/x68k.c
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254254      {
255255         hsync_time = machine().primary_screen->time_until_pos(machine().primary_screen->vpos()+1,m_crtc.hbegin);
256256         m_scanline_timer->adjust(hsync_time, 1);
257   //      if(!(m_mfp.gpio & 0x40))  // if GPIP6 is active, clear it
258   //          m_mfp.gpio |= 0x40;
259257      }
260258   }
261259}
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457455
458456READ16_MEMBER(x68k_state::x68k_crtc_r )
459457{
460#if 0
461   switch(offset)
462   {
463   default:
464      logerror("CRTC: [%08x] Read from CRTC register %i\n",activecpu_get_pc(),offset);
465      return 0xff;
466   }
467#endif
468
469458   if(offset < 24)
470459   {
471460//      logerror("CRTC: [%08x] Read %04x from CRTC register %i\n",m_maincpu->safe_pc(),m_crtc.reg[offset],offset);
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10691058   128*8
10701059};
10711060
1072#if 0
1073static GFXDECODEINFO_START( x68k )
1074   GFXDECODE_ENTRY( "user1", 0, x68k_pcg_8, 0x100, 16 )  // 8x8 sprite tiles
1075   GFXDECODE_ENTRY( "user1", 0, x68k_pcg_16, 0x100, 16 )  // 16x16 sprite tiles
1076GFXDECODEINFO_END
1077#endif
1078
10791061TILE_GET_INFO_MEMBER(x68k_state::x68k_get_bg0_tile)
10801062{
10811063   int code = m_spriteram[0x3000+tile_index] & 0x00ff;
trunk/src/mess/includes/x68k.h
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4646public:
4747   enum
4848   {
49      TIMER_MFP_UPDATE_IRQ,
50      TIMER_MFP_TIMER_A,
51      TIMER_MFP_TIMER_B,
52      TIMER_MFP_TIMER_C,
53      TIMER_MFP_TIMER_D,
5449      TIMER_X68K_LED,
5550      TIMER_X68K_KEYBOARD_POLL,
5651      TIMER_X68K_SCC_ACK,
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136131   } m_adpcm;
137132   struct
138133   {
139      int gpdr;  // [0]  GPIP data register.  Typically all inputs.
140134      int aer;   // [1]  GPIP active edge register.  Determines on which transition an IRQ is triggered.  0 = 1->0
141      int ddr;   // [2]  GPIP data direction register.  Determines which GPIP bits are inputs (0) or outputs (1)
142      int iera;  // [3]  Interrupt enable register A.
143      int ierb;  // [4]  Interrupt enable register B.
144      int ipra;  // [5]  Interrupt pending register A.
145      int iprb;  // [6]  Interrupt pending register B.
146      int isra;  // [7]  Interrupt in-service register A.
147      int isrb;  // [8]  Interrupt in-service register B.
148      int imra;  // [9]  Interrupt mask register A.
149      int imrb;  // [10] Interrupt mask register B.
150      int vr;    // [11] Vector register
151      int tacr;  // [12] Timer A control register
152      int tbcr;  // [13] Timer B control register
153      int tcdcr; // [14] Timer C & D control register
154135      int tadr;  // [15] Timer A data register
155136      int tbdr;  // [16] Timer B data register
156137      int tcdr;  // [17] Timer C data register
157138      int tddr;  // [18] Timer D data register
158      int scr;   // [19] Synchronous character register
159      int ucr;   // [20] USART control register
160139      int rsr;   // [21] Receiver status register
161140      int tsr;   // [22] Transmitter status register
162      int udr;   // [23] USART data register
163141      struct
164142      {
165         int counter;
166         int prescaler;
167      } timer[4];
168      struct
169      {
170143         unsigned char recv_buffer;
171144         unsigned char send_buffer;
172145         int recv_enable;
173146         int send_enable;
174147      } usart;
175      int vector;
176148      int irqline;
177      int eoi_mode;
178149      int current_irq;
179150      unsigned char gpio;
180151   } m_mfp;  // MC68901 Multifunction Peripheral (4MHz)
r26768r26769
303274   DECLARE_VIDEO_START(x68000);
304275   DECLARE_PALETTE_INIT(x68000);
305276   UINT32 screen_update_x68000(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
306   INTERRUPT_GEN_MEMBER(x68k_vsync_irq);
307277   TIMER_CALLBACK_MEMBER(mfp_update_irq);
308278   TIMER_CALLBACK_MEMBER(mfp_timer_a_callback);
309279   TIMER_CALLBACK_MEMBER(mfp_timer_b_callback);

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