Previous 199869 Revisions Next

r26748 Wednesday 25th December, 2013 at 04:18:47 UTC by R. Belmont
(MESS) DEC Rainbow updates: [M. Burke, R. Belmont]
- LK201 keyboard matrix hooked up and working
- LK201 serial I/O first pass


(nw part)
diserial is currently misframing the input bits so the LK201 doesn't get the proper commands from the Rainbow.  If someone with experience in this area is bored, I won't be able to look at this again for about a week.  The LK201 also needs a devcb2 hookup for the send back to the system once things are resolved.
[src/mess/drivers]rainbow.c
[src/mess/machine]dec_lk201.c dec_lk201.h

trunk/src/mess/drivers/rainbow.c
r26747r26748
11341134WRITE_LINE_MEMBER(rainbow_state::kbd_tx)
11351135{
11361136//    printf("%02x to keyboard\n", state);
1137   m_lk201->rx_w(state);
11371138}
11381139
11391140WRITE_LINE_MEMBER(rainbow_state::kbd_rxready_w)
r26747r26748
12771278   MCFG_SOFTWARE_LIST_ADD("flop_list","rainbow")
12781279
12791280   MCFG_I8251_ADD("kbdser", i8251_intf)
1280   MCFG_TIMER_DRIVER_ADD_PERIODIC("keyboard", rainbow_state, keyboard_tick, attotime::from_hz(4800))
1281   MCFG_TIMER_DRIVER_ADD_PERIODIC("keyboard", rainbow_state, keyboard_tick, attotime::from_hz(4800*16))   // 8251 is set to /16 on the clock input
12811282
12821283   MCFG_LK201_ADD()
12831284   MCFG_NVRAM_ADD_0FILL("nvram")
trunk/src/mess/machine/dec_lk201.c
r26747r26748
11/*
22    DEC LK-201 keyboard
3    Emulation by R. Belmont
3    Emulation by R. Belmont & M. Burke
44
55    This is the later "cost-reduced" 6805 version; there's also an 8048 version.
66*/
r26747r26748
108108//  MACROS / CONSTANTS
109109//**************************************************************************
110110
111#define LK201_CPU_TAG   "lk201"
111#define LK201_CPU_TAG   "lk201_cpu"
112#define LK201_SPK_TAG   "beeper"
112113
114//-------------------------------------------------
115//  SERIAL COMMUNICATIONS INTERFACE
116//-------------------------------------------------
117
118#define SCI_BAUD      0                        // Baud rate register
119#define BAUD_SCR      0x07                     // SCI baud rate select
120#define BAUD_SCP      0x30                     // SCI prescaler select
121
122#define SCI_SCCR1      1                        // Control register 1
123#define SCCR1_WAKE      0x08                     // Wakeup method
124#define SCCR1_M         0x10                     // Character length
125#define SCCR1_T8      0x40                     // Transmit bit 8
126#define SCCR1_R8      0x80                     // Receive bit 8
127
128#define SCI_SCCR2      2                        // Control register 2
129#define SCCR2_SBK      0x01                     // Send break
130#define SCCR2_RWU      0x02                     // Receiver wakeup enable
131#define SCCR2_RE      0x04                     // Receiver enable
132#define SCCR2_TE      0x08                     // Transmitter enable
133#define SCCR2_ILIE      0x10                     // Idle line interrupt enable
134#define SCCR2_RIE      0x20                     // Receiver interrupt enable
135#define SCCR2_TCIE      0x40                     // Transmit complete interrupt enable
136#define SCCR2_TIE      0x80                     // Transmit interrupt enable
137
138#define SCI_SCSR      3                        // Status register
139#define SCSR_FE         0x02                     // Receiver framing error
140#define SCSR_NF         0x04                     // Receiver noise
141#define SCSR_OR         0x08                     // Receiver overrun
142#define SCSR_IDLE      0x10                     // Receiver idle
143#define SCSR_RDRF      0x20                     // Receive data register full
144#define SCSR_TC         0x40                     // Transmit complete
145#define SCSR_TDRE      0x80                     // Transmit data register empty
146#define SCSR_INT      (SCSR_IDLE | SCSR_RDRF| \
147                     SCSR_TC | SCSR_TDRE)      // Interrupt sources
148
149#define SCI_SCDR      4                        // Data register
150
151//-------------------------------------------------
152//  SERIAL PERIPHERAL INTERFACE
153//-------------------------------------------------
154
155#define SPI_SPCR      0                        // Control register
156#define SPCR_SPR      0x03                     // SPI clock rate select
157#define SPCR_CPHA      0x04                     // Clock phase
158#define SPCR_CPOL      0x08                     // Clock polarity
159#define SPCR_MSTR      0x10                     // Master mode select
160#define SPCR_DWOM      0x20                     // Port D wire-or mode option
161#define SPCR_SPE      0x40                     // Serial peripheral system enable
162#define SPCR_SPIE      0x80                     // Serial peripheral interrupt enable
163
164#define SPI_SPSR      1                        // Status register
165#define SPSR_MODF      0x10                     // Mode fault flag
166#define SPSR_WCOL      0x40                     // Write collision
167#define SPSR_SPIF      0x80                     // SPI transfer complete
168
169#define SPI_SPDR      2                        // Data I/O Register
170
113171//**************************************************************************
114172//  DEVICE DEFINITIONS
115173//**************************************************************************
r26747r26748
141199static MACHINE_CONFIG_FRAGMENT( lk201 )
142200   MCFG_CPU_ADD(LK201_CPU_TAG, M68HC05EG, 2000000) // actually 68HC05C4
143201   MCFG_CPU_PROGRAM_MAP(lk201_map)
202
203   MCFG_SPEAKER_STANDARD_MONO("mono")
204   MCFG_SOUND_ADD(LK201_SPK_TAG, BEEP, 0)
205   MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
144206MACHINE_CONFIG_END
145207
146208
r26747r26748
159221   return ROM_NAME( lk201 );
160222}
161223
224//-------------------------------------------------
225//  INPUT_PORTS( lk201 )
226//-------------------------------------------------
227
228INPUT_PORTS_START( lk201 )
229   PORT_START("KBD0")
230   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED )
231   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED )
232   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
233   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
234   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
235   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
236   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
237   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT)
238
239   PORT_START("KBD1")
240   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED )
241   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED )
242   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
243   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
244   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
245   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Compose") PORT_CODE(KEYCODE_LALT)
246   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Caps Lock") PORT_CODE(KEYCODE_CAPSLOCK)
247   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_RCONTROL)
248
249   PORT_START("KBD2")
250   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Z") PORT_CODE(KEYCODE_Z)
251   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("A") PORT_CODE(KEYCODE_A)
252   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Q") PORT_CODE(KEYCODE_Q)
253   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("1") PORT_CODE(KEYCODE_1)
254   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Esc") PORT_CODE(KEYCODE_TILDE)
255   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
256   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
257   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
258
259   PORT_START("KBD3")
260   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("<")
261   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("X") PORT_CODE(KEYCODE_X)
262   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("S") PORT_CODE(KEYCODE_S)
263   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("W") PORT_CODE(KEYCODE_W)
264   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB)
265   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
266   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Z") PORT_CODE(KEYCODE_2)
267   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Hold Screen") PORT_CODE(KEYCODE_F1)
268
269   PORT_START("KBD4")
270   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("C") PORT_CODE(KEYCODE_C)
271   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("D") PORT_CODE(KEYCODE_D)
272   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("E") PORT_CODE(KEYCODE_E)
273   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("3") PORT_CODE(KEYCODE_3)
274   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Setup") PORT_CODE(KEYCODE_F3)
275   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
276   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Print Screen") PORT_CODE(KEYCODE_F2)
277   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
278
279   PORT_START("KBD5")
280   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE)
281   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("V") PORT_CODE(KEYCODE_V)
282   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F") PORT_CODE(KEYCODE_F)
283   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("R") PORT_CODE(KEYCODE_R)
284   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("4") PORT_CODE(KEYCODE_4)
285   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
286   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Break") PORT_CODE(KEYCODE_F5)
287   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F4") PORT_CODE(KEYCODE_F4)
288
289   PORT_START("KBD6")
290   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("B") PORT_CODE(KEYCODE_B)
291   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("G") PORT_CODE(KEYCODE_G)
292   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("T") PORT_CODE(KEYCODE_T)
293   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("5") PORT_CODE(KEYCODE_5)
294   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Interrupt") PORT_CODE(KEYCODE_F6)
295   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
296   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
297   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
298
299   PORT_START("KBD7")
300   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("N") PORT_CODE(KEYCODE_N)
301   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("H") PORT_CODE(KEYCODE_H)
302   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Y") PORT_CODE(KEYCODE_Y)
303   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("6") PORT_CODE(KEYCODE_6)
304   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Resume") PORT_CODE(KEYCODE_F7)
305   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
306   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Cancel") PORT_CODE(KEYCODE_F8)
307   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
308
309   PORT_START("KBD8")
310   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("M") PORT_CODE(KEYCODE_M)
311   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("J") PORT_CODE(KEYCODE_J)
312   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("U") PORT_CODE(KEYCODE_U)
313   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("7") PORT_CODE(KEYCODE_7)
314   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Exit") PORT_CODE(KEYCODE_F10)
315   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
316   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Main Screen") PORT_CODE(KEYCODE_F9)
317   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
318
319   PORT_START("KBD9")
320   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(",") PORT_CODE(KEYCODE_COMMA)
321   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("K") PORT_CODE(KEYCODE_K)
322   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("I") PORT_CODE(KEYCODE_I)
323   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("8") PORT_CODE(KEYCODE_8)
324   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
325   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
326   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F11") PORT_CODE(KEYCODE_F11)
327   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
328
329   PORT_START("KBD10")
330   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(".") PORT_CODE(KEYCODE_STOP)
331   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("L") PORT_CODE(KEYCODE_L)
332   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("O") PORT_CODE(KEYCODE_O)
333   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("9") PORT_CODE(KEYCODE_9)
334   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F13")
335   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
336   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F12") PORT_CODE(KEYCODE_F12)
337   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
338
339   PORT_START("KBD11")
340   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("/")
341   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(";")
342   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED ) // FIXME - duplicate "Return"
343   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("P") PORT_CODE(KEYCODE_P)
344   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("0") PORT_CODE(KEYCODE_0)
345   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
346   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Delete") PORT_CODE(KEYCODE_BACKSPACE)
347   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Additional Options")
348
349   PORT_START("KBD12")
350   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("\\") PORT_CODE(KEYCODE_BACKSLASH)
351   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Left") PORT_CODE(KEYCODE_LEFT)
352   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Return") PORT_CODE(KEYCODE_ENTER)
353   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("]") PORT_CODE(KEYCODE_CLOSEBRACE)
354   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Select") PORT_CODE(KEYCODE_DEL)
355   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Help")
356   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("=") PORT_CODE(KEYCODE_EQUALS)
357   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Find") PORT_CODE(KEYCODE_INSERT)
358
359   PORT_START("KBD13")
360   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED )
361   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED )
362   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("'") PORT_CODE(KEYCODE_QUOTE)
363   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("[") PORT_CODE(KEYCODE_OPENBRACE)
364   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Previous") PORT_CODE(KEYCODE_END)
365   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("-") PORT_CODE(KEYCODE_MINUS)
366   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD )
367   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Insert Here") PORT_CODE(KEYCODE_HOME)
368
369   PORT_START("KBD14")
370   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num 0") PORT_CODE(KEYCODE_0_PAD)
371   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num 1") PORT_CODE(KEYCODE_1_PAD)
372   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num 4") PORT_CODE(KEYCODE_4_PAD)
373   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num 7") PORT_CODE(KEYCODE_7_PAD)
374   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Up") PORT_CODE(KEYCODE_UP)
375   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Remove") PORT_CODE(KEYCODE_PGUP)
376   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Next") PORT_CODE(KEYCODE_PGDN)
377   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("PF1") PORT_CODE(KEYCODE_NUMLOCK)
378
379   PORT_START("KBD15")
380   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) // FIXME - duplicate "Num 0"
381   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num 2") PORT_CODE(KEYCODE_2_PAD)
382   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Right") PORT_CODE(KEYCODE_RIGHT)
383   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num 5") PORT_CODE(KEYCODE_5_PAD)
384   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num 8") PORT_CODE(KEYCODE_8_PAD)
385   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
386   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("PF2") PORT_CODE(KEYCODE_SLASH_PAD)
387   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F17")
388
389   PORT_START("KBD16")
390   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD )
391   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num 3") PORT_CODE(KEYCODE_3_PAD)
392   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num 6") PORT_CODE(KEYCODE_6_PAD)
393   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN)
394   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num 9") PORT_CODE(KEYCODE_9_PAD)
395   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
396   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("PF3") PORT_CODE(KEYCODE_ASTERISK)
397   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F18")
398
399   PORT_START("KBD17")
400   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER_PAD)
401   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num ,") PORT_CODE(KEYCODE_PLUS_PAD)
402   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num -")
403   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("PF4") PORT_CODE(KEYCODE_MINUS_PAD)
404   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F20")
405   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
406   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F19")
407   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
408INPUT_PORTS_END
409
410
411//-------------------------------------------------
412//  input_ports - device-specific input ports
413//-------------------------------------------------
414
415ioport_constructor lk201_device::device_input_ports() const
416{
417   return INPUT_PORTS_NAME( lk201 );
418}
419
162420//**************************************************************************
163421//  LIVE DEVICE
164422//**************************************************************************
r26747r26748
169427
170428lk201_device::lk201_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
171429   : device_t(mconfig, LK201, "DEC LK201 keyboard", tag, owner, clock, "lk201", __FILE__),
172   m_maincpu(*this, LK201_CPU_TAG)
430   device_serial_interface(mconfig, *this),
431   m_maincpu(*this, LK201_CPU_TAG),
432   m_speaker(*this, LK201_SPK_TAG),
433   m_kbd0(*this, "KBD0"),
434   m_kbd1(*this, "KBD1"),
435   m_kbd2(*this, "KBD2"),
436   m_kbd3(*this, "KBD3"),
437   m_kbd4(*this, "KBD4"),
438   m_kbd5(*this, "KBD5"),
439   m_kbd6(*this, "KBD6"),
440   m_kbd7(*this, "KBD7"),
441   m_kbd8(*this, "KBD8"),
442   m_kbd9(*this, "KBD9"),
443   m_kbd10(*this, "KBD10"),
444   m_kbd11(*this, "KBD11"),
445   m_kbd12(*this, "KBD12"),
446   m_kbd13(*this, "KBD13"),
447   m_kbd14(*this, "KBD14"),
448   m_kbd15(*this, "KBD15"),
449   m_kbd16(*this, "KBD16"),
450   m_kbd17(*this, "KBD17")
173451{
174452}
175453
r26747r26748
188466
189467void lk201_device::device_reset()
190468{
469   set_rate(4800);
470   set_data_frame(8, 1, PARITY_NONE, false);
471
472   sci_status = (SCSR_TC | SCSR_TDRE);
473
474   spi_status = 0;
475   spi_data = 0;
476
477   kbd_data = 0;
478   led_data = 0;
479
480   transmit_register_reset();
481   receive_register_reset();
191482}
192483
484void lk201_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
485{
486   device_serial_interface::device_timer(timer, id, param, ptr);
487}
488
489void lk201_device::rcv_complete()
490{
491   printf("lk201 got %02x\n", get_received_char());
492   sci_status |= SCSR_RDRF;
493   update_interrupts();
494   receive_register_extract();
495}
496
497void lk201_device::tra_complete()
498{
499   sci_status |= (SCSR_TC | SCSR_TDRE);
500   update_interrupts();
501}
502
503void lk201_device::tra_callback()
504{
505   transmit_register_send_bit();
506}
507
508void lk201_device::input_callback(UINT8 state)
509{
510}
511
512void lk201_device::update_interrupts()
513{
514   if (sci_ctl2 & sci_status & SCSR_INT)
515   {
516      m_maincpu->set_input_line(M68HC05EG_INT_CPI, 1);
517   }
518   else
519   {
520      m_maincpu->set_input_line(M68HC05EG_INT_CPI, 0);
521   }
522}
523
193524READ8_MEMBER( lk201_device::ddr_r )
194525{
195526   return ddrs[offset];
r26747r26748
197528
198529WRITE8_MEMBER( lk201_device::ddr_w )
199530{
200//    printf("%02x to PORT %c DDR (PC=%x)\n", data, 'A' + offset, m_maincpu->pc());
531//   printf("%02x to PORT %c DDR (PC=%x)\n", data, 'A' + offset, m_maincpu->pc());
201532
202533   send_port(space, offset, ports[offset] & data);
203534
r26747r26748
208539{
209540   UINT8 incoming = 0;
210541
211   switch (offset)
212   {
213      case 0:     // port A
214         break;
215
216      case 1:     // port B
217         break;
218
219      case 2:     // port C
220         break;
221   }
222
223542   // apply data direction registers
224543   incoming &= (ddrs[offset] ^ 0xff);
225544   // add in ddr-masked version of port writes
226545   incoming |= (ports[offset] & ddrs[offset]);
227546
228//    printf("PORT %c read = %02x (DDR = %02x latch = %02x) (PC=%x)\n", 'A' + offset, ports[offset], ddrs[offset], ports[offset], m_maincpu->pc());
547//   printf("PORT %c read = %02x (DDR = %02x latch = %02x) (PC=%x)\n", 'A' + offset, ports[offset], ddrs[offset], ports[offset], m_maincpu->pc());
229548
230549   return incoming;
231550}
r26747r26748
239558
240559void lk201_device::send_port(address_space &space, UINT8 offset, UINT8 data)
241560{
242//    printf("PORT %c write %02x (DDR = %02x) (PC=%x)\n", 'A' + offset, data, ddrs[offset], m_maincpu->pc());
561//   printf("PORT %c write %02x (DDR = %02x) (PC=%x)\n", 'A' + offset, data, ddrs[offset], m_maincpu->pc());
243562
244563   switch (offset)
245564   {
r26747r26748
250569         break;
251570
252571      case 2: // port C
572         // Check for keyboard read strobe
573         if (((data & 0x40) == 0) && (ports[offset] & 0x40))
574         {
575            if (ports[0] & 0x1) kbd_data = m_kbd0->read();
576            if (ports[0] & 0x2) kbd_data = m_kbd1->read();
577            if (ports[0] & 0x4) kbd_data = m_kbd2->read();
578            if (ports[0] & 0x8) kbd_data = m_kbd3->read();
579            if (ports[0] & 0x10) kbd_data = m_kbd4->read();
580            if (ports[0] & 0x20) kbd_data = m_kbd5->read();
581            if (ports[0] & 0x40) kbd_data = m_kbd6->read();
582            if (ports[0] & 0x80) kbd_data = m_kbd7->read();
583            if (ports[1] & 0x1) kbd_data = m_kbd8->read();
584            if (ports[1] & 0x2) kbd_data = m_kbd9->read();
585            if (ports[1] & 0x4) kbd_data = m_kbd10->read();
586            if (ports[1] & 0x8) kbd_data = m_kbd11->read();
587            if (ports[1] & 0x10) kbd_data = m_kbd12->read();
588            if (ports[1] & 0x20) kbd_data = m_kbd13->read();
589            if (ports[1] & 0x40) kbd_data = m_kbd14->read();
590            if (ports[1] & 0x80) kbd_data = m_kbd15->read();
591            if (ports[2] & 0x1) kbd_data = m_kbd16->read();
592            if (ports[2] & 0x2) kbd_data = m_kbd17->read();
593         }
594         // Check for LED update strobe
595         if (((data & 0x80) == 0) && (ports[offset] & 0x80))
596         {
597            // Lower nibble contains the LED values (1 = on, 0 = off)
598            output_set_value("led_wait", (led_data & 0x1) == 0);
599            output_set_value("led_comp", (led_data & 0x2) == 0);
600            output_set_value("led_hold", (led_data & 0x4) == 0);
601            output_set_value("led_lock", (led_data & 0x8) == 0);
602         }
253603         break;
254604   }
255605}
r26747r26748
260610
261611   switch (offset)
262612   {
263      case 0:     // baud rate
613      case SCI_BAUD:   // Baud rate
264614         break;
265615
266      case 1:     // control 1
616      case SCI_SCCR1:   // Control 1
267617         break;
268618
269      case 2:     // control 2
619      case SCI_SCCR2:   // Control 2
620         incoming = sci_ctl2;
270621         break;
271622
272      case 3:     // status
273         incoming |= 0x40;   // indicate transmit ready
623      case SCI_SCSR:   // Status
624         incoming = sci_status;
274625         break;
275626
276      case 4:     // data
627      case SCI_SCDR:   // Data
628         incoming = get_received_char();
629         sci_status &= ~SCSR_RDRF;
630         m_maincpu->set_input_line(M68HC05EG_INT_CPI, 0);
631         update_interrupts();
277632         break;
278633   }
279634
280//    printf("SCI read @ %x = %02x (PC=%x)\n", offset, incoming, m_maincpu->pc());
635//   printf("SCI read @ %x = %02x (PC=%x)\n", offset, incoming, m_maincpu->pc());
281636
282637   return incoming;
283638}
r26747r26748
286641{
287642   switch (offset)
288643   {
289      case 0:     // baud rate
644      case SCI_BAUD:   // Baud rate
290645         break;
291646
292      case 1:     // control 1
647      case SCI_SCCR1:   // Control 1
293648         break;
294649
295      case 2:     // control 2
650      case SCI_SCCR2:   // Control 2
651         sci_ctl2 = data;
652         update_interrupts();
296653         break;
297654
298      case 3:     // status
655      case SCI_SCSR:   // Status
299656         break;
300657
301      case 4:     // data
658      case SCI_SCDR:   // Data
659         transmit_register_setup(data);
660         sci_status &= ~(SCSR_TC | SCSR_TDRE);
661         m_maincpu->set_input_line(M68HC05EG_INT_CPI, 0);
662         update_interrupts();
302663         break;
303664   }
304665
305//    printf("SCI %02x to %x (PC=%x)\n", data, offset, m_maincpu->pc());
666//   printf("SCI %02x to %x (PC=%x)\n", data, offset, m_maincpu->pc());
306667}
307668
308669READ8_MEMBER( lk201_device::spi_r )
r26747r26748
311672
312673   switch (offset)
313674   {
314      case 0:     // control
675      case SPI_SPCR:   // Control
315676         break;
316677
317      case 1:     // status
318         incoming |= 0x80;
678      case SPI_SPSR:   // Status
679         incoming = spi_status;
680         spi_status &= ~SPSR_SPIF;
319681         break;
320682
321      case 2:     // data
683      case SPI_SPDR:   // Data I/O
684         incoming = spi_data;
322685         break;
323686   }
324687
325//    printf("SPI read @ %x = %02x (PC=%x)\n", offset, incoming, m_maincpu->pc());
688//   printf("SPI read @ %x = %02x (PC=%x)\n", offset, incoming, m_maincpu->pc());
326689
327690   return incoming;
328691}
r26747r26748
331694{
332695   switch (offset)
333696   {
334      case 0:     // control
697      case SPI_SPCR:   // Control
335698         break;
336699
337      case 1:     // status
700      case SPI_SPSR:   // Status (read only)
338701         break;
339702
340      case 2:     // data
703      case SPI_SPDR:   // Data I/O
704         spi_data = data;
705
706         // Transfer only allowed if transfer complete flag has been acknowleged
707         if ((spi_status & SPSR_SPIF) == 0)
708         {
709            // Data out
710            led_data = data;
711
712            // Data in
713            spi_data = kbd_data;
714
715            // Indicate transfer complete
716            spi_status |= SPSR_SPIF;
717         }
341718         break;
342719   }
343720
344//    printf("SPI %02x to %x (PC=%x)\n", data, offset, m_maincpu->pc());
721//   printf("SPI %02x to %x (PC=%x)\n", data, offset, m_maincpu->pc());
345722}
346723
347/*
348
349SCI 01 to 4 (PC=24b)        firmware ID
350SCI 00 to 4 (PC=cb2)        hardware jumpers ID (port C & 0x30)
351SCI 00 to 4 (PC=cb2)        self-test result OK
352SCI 00 to 4 (PC=cb2)        keycode if there was a self-test error
353
354*/
trunk/src/mess/machine/dec_lk201.h
r26747r26748
44#define __LK201_H__
55
66#include "emu.h"
7#include "sound/beep.h"
78
89//**************************************************************************
910//  MACROS / CONSTANTS
r26747r26748
4445
4546// ======================> lk201_device
4647
47class lk201_device :  public device_t
48class lk201_device : public device_t, public device_serial_interface
4849{
4950public:
5051   // construction/destruction
r26747r26748
6162
6263protected:
6364   // device-level overrides
65   virtual machine_config_constructor device_mconfig_additions() const;
66   virtual const rom_entry *device_rom_region() const;
67   virtual ioport_constructor device_input_ports() const;
6468   virtual void device_start();
6569   virtual void device_reset();
66   virtual machine_config_constructor device_mconfig_additions() const;
67   virtual const rom_entry *device_rom_region() const;
70   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
6871
69   required_device<cpu_device> m_maincpu;
72   // device_serial overrides
73   virtual void rcv_complete();    // Rx completed receiving byte
74   virtual void tra_complete();    // Tx completed sending byte
75   virtual void tra_callback();    // Tx send bit
76   void input_callback(UINT8 state);
7077
7178private:
7279   UINT8 ddrs[3];
7380   UINT8 ports[3];
81   UINT8 led_data;
82   UINT8 kbd_data;
7483
84   UINT8 sci_ctl2;
85   UINT8 sci_status;
86   UINT8 sci_data;
87
88   UINT8 spi_status;
89   UINT8 spi_data;
90
91   required_device<cpu_device> m_maincpu;
92   required_device<beep_device> m_speaker;
93
94   required_ioport m_kbd0;
95   required_ioport m_kbd1;
96   required_ioport m_kbd2;
97   required_ioport m_kbd3;
98   required_ioport m_kbd4;
99   required_ioport m_kbd5;
100   required_ioport m_kbd6;
101   required_ioport m_kbd7;
102   required_ioport m_kbd8;
103   required_ioport m_kbd9;
104   required_ioport m_kbd10;
105   required_ioport m_kbd11;
106   required_ioport m_kbd12;
107   required_ioport m_kbd13;
108   required_ioport m_kbd14;
109   required_ioport m_kbd15;
110   required_ioport m_kbd16;
111   required_ioport m_kbd17;
112
75113   void send_port(address_space &space, UINT8 offset, UINT8 data);
114   void update_interrupts();
76115};
77116
78117// device type definition

Previous 199869 Revisions Next

© 1997-2024 The MAME Team