MAME SVN History

199869 Revisions

r26737 Tuesday 24th December, 2013 at 07:24:51 UTC by Miodrag Milanović
Cleanups and version bump

[hash]	gp32.xml pet_hdd.xml
[src]	version.c
[src/build]	makedep.c
[src/emu]	diimage.c diserial.h
[src/emu/bus/a2bus]	a2alfam2.c
[src/emu/bus/abcbus]	lux21046.c lux21056.c
[src/emu/bus/adamnet]	fdc.c
[src/emu/bus/c64]	pagefox.c
[src/emu/bus/pc_kbd]	iskr1030.c
[src/emu/bus/plus4]	std.h
[src/emu/bus/vic10]	std.h
[src/emu/cpu]	cpu.mak
[src/emu/cpu/8x300]	8x300.c 8x300.h 8x300dasm.c
[src/emu/cpu/t11]	t11.c
[src/emu/cpu/tms57002]	tms57002.c
[src/emu/cpu/z8]	z8.c
[src/emu/machine]	mc2661.c netlist.c netlist.h nscsi_cb.c nscsi_s1410.c nscsi_s1410.h t10mmc.c t10sbc.c tmp68301.c tmp68301.h upd4992.c upd4992.h z80dart.c z80dma.c
[src/emu/netlist]	nl_base.c nl_base.h nl_config.h nl_lists.h nl_parser.c nl_parser.h nl_setup.c nl_setup.h nl_time.h nl_util.h pstate.c pstate.h pstring.c pstring.h
[src/emu/netlist/devices]	net_lib.c net_lib.h nld_7400.h nld_7402.h nld_7404.c nld_7404.h nld_7410.h nld_7420.h nld_7425.h nld_7427.h nld_7430.h nld_7474.c nld_7474.h nld_7483.c nld_7483.h nld_7486.c nld_7486.h nld_7490.c nld_7490.h nld_7493.c nld_7493.h nld_9316.c nld_9316.h nld_legacy.c nld_legacy.h nld_log.c nld_log.h nld_ne555.c nld_ne555.h nld_signal.h nld_solver.c nld_solver.h nld_system.c nld_system.h nld_twoterm.c nld_twoterm.h
[src/emu/sound]	discrete.c discrete.h es5506.c es5506.h k054539.c k054539.h k056800.c k056800.h mpeg_audio.c nes_apu.h sn76477.c sn76477.h speaker.h wave.h ymz770.c
[src/emu/video]	fixfreq.c mb_vcu.c v9938.c
[src/lib/formats]	abc800_dsk.c adam_dsk.c itt3030_dsk.c
[src/mame]	mame.lst
[src/mame/audio]	taito_en.c taito_en.h
[src/mame/drivers]	1942.c 2mindril.c acefruit.c arachnid.c arcadia.c aristmk4.c atari_s1.c atarig42.c bfm_sc4h.c capbowl.c cham24.c cinemat.c csplayh5.c deco_ld.c exidy440.c famibox.c galaxold.c ghosteo.c harddriv.c hng64.c hornet.c konamigq.c konendev.c lbeach.c legionna.c lethal.c maygayv1.c mcr3.c meritm.c midyunit.c midzeus.c multigam.c mw18w.c naomi.c peplus.c pgm.c pinkiri8.c plygonet.c pong.c qdrmfgp.c rungun.c sangho.c seta.c superchs.c toaplan2.c twinkle.c ultrsprt.c vegas.c zr107.c
[src/mame/includes]	40love.h astrocde.h bfm_sc45.h bfm_sc5.h harddriv.h maygay1b.h namcos1.h pgm.h plygonet.h rungun.h stv.h vsnes.h
[src/mame/machine]	asic65.c asic65.h harddriv.c igs025.c k573npu.c pgmprot_igs027a_type3.c pgmprot_orlegend.c seicop.c seicop.h zs01.h
[src/mame/video]	1942.c hng64.c tia.c
[src/mess]	mess.lst
[src/mess/drivers]	a7800.c apple2gs.c atari400.c bullet.c c80.c cbm2.c ec184x.c esqasr.c esqkt.c ht68k.c isbc.c iskr103x.c itt3030.c mc1502.c mkit09.c myvision.c next.c pc.c poisk1.c prof80.c rainbow.c sh4robot.c tiki100.c v1050.c v6809.c wicat.c xavix.c xerox820.c
[src/mess/includes]	mc1502.h poisk1.h prof80.h
[src/mess/layout]	rainbow.lay
[src/mess/machine]	dec_lk201.c kb_poisk1.h mb8795.c mc1502_fdc.c nes_mmc5.c p1_fdc.c p1_hdc.c prof80mmu.c prof80mmu.h xsu_cards.c
[src/mess/video]	isa_cga.c isa_cga.h pc_t1t.h poisk1.c vtvideo.c
[src/osd/windows]	drawd3d.c vconv.c window.c
[src/tools]	jedutil.c nltool.c romcmp.c

trunk/hash/pet_hdd.xml
r26736	r26737
27	27	</diskarea>
28	28	</part>
29	29	</software>
30
	30
31	31	</softwarelist>

trunk/hash/gp32.xml
r26736	r26737
11	11
12	12	* 강행돌파 [same as herknite?!?]
13	13
14		* Tears - Another Story added (not 100% verified whether it is a final version or not)
	14	* Tears - Another Story added (not 100% verified whether it is a final version or not)
15	15
16	16	It is recommended to use the firmware 1.6.6 as default BIOS!
17	17
r26736	r26737
409	409	</dataarea>
410	410	</part>
411	411	</software>
412
	412
413	413	<software name="pinbdrea">
414	414	<description>Pinball Dreams (Eur)</description>
415	415	<year>2002</year>
r26736	r26737
421	421	</dataarea>
422	422	</part>
423	423	</software>
424
	424
425	425	<software name="sobemons">
426	426	<description>Story of Bug eyed Monster (Kor)</description>
427	427	<year>2003</year>
r26736	r26737
444	444	<rom name="winter is.smc" size="69207040" crc="62c4a3fb" sha1="cf072fae0825164ff8c7393ab513058b78c46061" offset="0" />
445	445	</dataarea>
446	446	</part>
447		</software>
448
	447	</software>
	448
449	449	<software name="suplusha">
450	450	<description>Super Plusha (Eur)</description>
451	451	<year>2002</year>
r26736	r26737
456	456	<rom name="super plusha.smc" size="17302528" crc="65da87fc" sha1="1e2e984014f184759a35df93160f0fb4d11c7742" offset="0" />
457	457	</dataarea>
458	458	</part>
459		</software>
	459	</software>
460	460
461	461	<software name="talowila">
462	462	<description>Tales of Windy Land (Kor)</description>
r26736	r26737
468	468	<rom name="tales of windy land.smc" size="17302528" crc="83b9c315" sha1="51679a8197f721fc601ea0cd8c91a3bbabed9585" offset="0" />
469	469	</dataarea>
470	470	</part>
471		</software>
	471	</software>
472	472
473	473	<software name="totogogo">
474	474	<description>Topy Topy Gogo (Eur)</description>
r26736	r26737
480	480	<rom name="topy topy gogo.smc" size="17302528" crc="9a5faa26" sha1="46e1f08ec260a633e8e4c44b3b46b5135e6c76a6" offset="0" />
481	481	</dataarea>
482	482	</part>
483		</software>
484
	483	</software>
	484
485	485	<software name="tearsast">
486	486	<description>Tears - Another Story (Kor)</description>
487	487	<year>2003</year>
r26736	r26737
493	493	</dataarea>
494	494	</part>
495	495	</software>
496
	496
497	497	</softwarelist>

trunk/src/mame/machine/k573npu.c
r26736	r26737
48	48	Notes: (all IC's shown)
49	49	TMPR3927 - Toshiba TMPR3927CF Risc Microprocessor (QFP240)
50	50	FLASH - Fujitsu 29F400TC Flash ROM (TSOP48)
51		IDE44 - IDE44 44-pin laptop type HDD connector. The Hard Drive connected is a
	51	IDE44 - IDE44 44-pin laptop type HDD connector. The Hard Drive connected is a
52	52	2.5" Fujitsu MHR2010AT 10GB HDD with Konami sticker C07JAA03
53	53	48LC4M16 - Micron Technology 48LC4M16 4M x16-bit SDRAM (TSSOP54)
54	54	XC9572XL - XILINX XC9572XL In-system Programmable CPLD stamped 'UC07A1' (TQFP100)
r26736	r26737
57	57	93LC46 - 128 bytes x8-bit EEPROM (SOIC8)
58	58	MB3793 - Fujitsu MB3793 Power-Voltage Monitoring IC with Watchdog Timer (SOIC8)
59	59	PE68515L - Pulse PE-68515L 10/100 Base-T Single Port Transformer Module
60		DP83815 - National Semiconductor DP83815 10/100 Mb/s Integrated PCI Ethernet Media
	60	DP83815 - National Semiconductor DP83815 10/100 Mb/s Integrated PCI Ethernet Media
61	61	Access Controller and Physical Layer (TQFP144)
62	62	SP232 - Sipex Corporation SP232 Enhanced RS-232 Line Drivers/Receiver (SOIC16)
63	63	RJ45 - RJ45 network connector
r26736	r26737
82	82
83	83	ROM_START( k573npu )
84	84	ROM_REGION( 0x080000, "tmpr3927", 0 )
85		ROM_LOAD( "29f400.24e", 0x000000, 0x080000, CRC(8dcf294b) SHA1(efac79e18db22c30886463ec1bc448187da7a95a) )
	85	ROM_LOAD( "29f400.24e", 0x000000, 0x080000, CRC(8dcf294b) SHA1(efac79e18db22c30886463ec1bc448187da7a95a) )
86	86	ROM_END
87	87
88	88	const rom_entry *k573npu_device::device_rom_region() const

trunk/src/mame/machine/zs01.h
r26736	r26737
15	15	#include "machine/ds2401.h"
16	16
17	17	#define MCFG_ZS01_ADD( _tag ) \
18		MCFG_DEVICE_ADD( _tag, ZS01, 0 ) \
19
	18	MCFG_DEVICE_ADD( _tag, ZS01, 0 )
20	19	#define MCFG_ZS01_DS2401( ds2401_tag ) \
21	20	zs01_device::static_set_ds2401_tag( *device, ds2401_tag );
22	21

trunk/src/mame/machine/igs025.c
r26736	r26737
273	273
274	274	case 0x05:
275	275	{
276		switch (m_kb_ptr)
277		{
278		case 1:
279		return 0x3f00 \| ((m_kb_game_id >> 0) & 0xff);
	276	switch (m_kb_ptr)
	277	{
	278	case 1:
	279	return 0x3f00 \| ((m_kb_game_id >> 0) & 0xff);
280	280
281		case 2:
282		return 0x3f00 \| ((m_kb_game_id >> 8) & 0xff);
	281	case 2:
	282	return 0x3f00 \| ((m_kb_game_id >> 8) & 0xff);
283	283
284		case 3:
285		return 0x3f00 \| ((m_kb_game_id >> 16) & 0xff);
	284	case 3:
	285	return 0x3f00 \| ((m_kb_game_id >> 16) & 0xff);
286	286
287		case 4:
288		return 0x3f00 \| ((m_kb_game_id >> 24) & 0xff);
	287	case 4:
	288	return 0x3f00 \| ((m_kb_game_id >> 24) & 0xff);
289	289
290		default: // >= 5
291		return 0x3f00 \| BITSWAP8(m_kb_prot_hold, 5, 2, 9, 7, 10, 13, 12, 15);
292		}
	290	default: // >= 5
	291	return 0x3f00 \| BITSWAP8(m_kb_prot_hold, 5, 2, 9, 7, 10, 13, 12, 15);
	292	}
293	293
294		return 0x3f00;
295		//return 0;
	294	return 0x3f00;
	295	//return 0;
296	296	}
297	297
298	298	case 0x40:

trunk/src/mame/machine/pgmprot_orlegend.c
r26736	r26737
81	81	case 0x33: return 0x49;
82	82	case 0x34: return 0x32;
83	83
84		// default:
85		// logerror("ASIC3 R: CMD %2.2X PC: %6.6x\n", m_asic3_reg, space.device().safe_pc());
	84	// default:
	85	// logerror("ASIC3 R: CMD %2.2X PC: %6.6x\n", m_asic3_reg, space.device().safe_pc());
86	86	}
87	87
88	88	return 0;
r26736	r26737
103	103	m_asic3_latch[m_asic3_reg] = data << 1;
104	104	break;
105	105
106		// case 0x03: // move.w #$88, $c0400e.l
107		// case 0x04: // move.w #$84, $c0400e.l
108		// case 0x05: // move.w #$A0, $c0400e.l
109		// break;
	106	// case 0x03: // move.w #$88, $c0400e.l
	107	// case 0x04: // move.w #$84, $c0400e.l
	108	// case 0x05: // move.w #$A0, $c0400e.l
	109	// break;
110	110
111	111	case 0x40:
112	112	m_asic3_hilo = (m_asic3_hilo << 8) \| data;
r26736	r26737
131	131	}
132	132	break;
133	133
134		// case 0x50: // move.w #$50, $c0400e.l
135		// break;
	134	// case 0x50: // move.w #$50, $c0400e.l
	135	// break;
136	136
137	137	case 0x80:
138	138	case 0x81:
r26736	r26737
150	150	break;
151	151
152	152	default:
153		logerror("ASIC3 W: CMD %2.2X DATA: %4.4x, PC: %6.6x\n", m_asic3_reg, data, space.device().safe_pc());
	153	logerror("ASIC3 W: CMD %2.2X DATA: %4.4x, PC: %6.6x\n", m_asic3_reg, data, space.device().safe_pc());
154	154	}
155	155	}
156	156

trunk/src/mame/machine/harddriv.c
r26736	r26737
322	322	{
323	323	static const char *const adc8names[] = { "8BADC0", "8BADC1", "8BADC2", "8BADC3", "8BADC4", "8BADC5", "8BADC6", "8BADC7" };
324	324	static const char *const adc12names[] = { "12BADC0", "12BADC1", "12BADC2", "12BADC3" };
325
	325
326	326	COMBINE_DATA(&m_adc_control);
327	327
328	328	/* handle a write to the 8-bit ADC address select */

trunk/src/mame/machine/pgmprot_igs027a_type3.c
r26736	r26737
54	54	READ32_MEMBER(pgm_arm_type3_state::svg_arm7_shareram_r )
55	55	{
56	56	UINT32 retdata = m_svg_shareram[m_svg_ram_sel & 1][offset];
57		// printf("(%08x) ARM7: shared read (bank %02x) offset - %08x retdata - %08x mask - %08x\n", space.device().safe_pc(), m_svg_ram_sel, offset*4, retdata, mem_mask );
	57	// printf("(%08x) ARM7: shared read (bank %02x) offset - %08x retdata - %08x mask - %08x\n", space.device().safe_pc(), m_svg_ram_sel, offset*4, retdata, mem_mask );
58	58	return retdata;
59	59	}
60	60
61	61	WRITE32_MEMBER(pgm_arm_type3_state::svg_arm7_shareram_w )
62	62	{
63		// printf("(%08x) ARM7: shared write (bank %02x) offset - %08x retdata - %08x mask - %08x\n", space.device().safe_pc(), m_svg_ram_sel, offset*4, data, mem_mask );
	63	// printf("(%08x) ARM7: shared write (bank %02x) offset - %08x retdata - %08x mask - %08x\n", space.device().safe_pc(), m_svg_ram_sel, offset*4, data, mem_mask );
64	64	COMBINE_DATA(&m_svg_shareram[m_svg_ram_sel & 1][offset]);
65	65	}
66	66
r26736	r26737
145	145	AM_RANGE(0x40000018, 0x4000001b) AM_WRITE(svg_arm7_ram_sel_w) /* RAM SEL */
146	146	AM_RANGE(0x50000000, 0x500003ff) AM_RAM
147	147
148		// AM_RANGE(0xc0000000, 0xffffffff) AM_RAM
	148	// AM_RANGE(0xc0000000, 0xffffffff) AM_RAM
149	149
150	150	ADDRESS_MAP_END
151	151
r26736	r26737
169	169	int regionhack = ioport("RegionHack")->read();
170	170	if (regionhack != 0xff)
171	171	{
172		// printf("%04x\n", temp16[(base) / 2]);
	172	// printf("%04x\n", temp16[(base) / 2]);
173	173	temp16[(base) / 2] = regionhack; base += 2;
174	174	}
175	175	}
r26736	r26737
260	260	{
261	261	int pc = space.device().safe_pc();
262	262	if (pc == 0x9e0) space.device().execute().eat_cycles(500);
263		// else printf("killbldp_speedup_r %08x\n", pc);
	263	// else printf("killbldp_speedup_r %08x\n", pc);
264	264	return m_armrom[0x9e0/4];
265	265	}
266	266
r26736	r26737
376	376	temp16[(base) /2] = 0xE080; base += 2;
377	377	temp16[(base) /2] = 0x6000; base += 2;
378	378	temp16[(base) /2] = 0xE587; base += 2;
379
	379
380	380	// set the SR13 to something sensible
381	381	temp16[(base) /2] = 0x00D3; base += 2;
382	382	temp16[(base) /2] = 0xE3A0; base += 2;
r26736	r26737
410	410	base = 0x154;
411	411
412	412	// this actually makes matters worse here
413		// temp16[(base) / 2] = 0x1010; base += 2;
414		// temp16[(base) / 2] = 0xe59f; base += 2;
415		// temp16[(base) / 2] = 0x0001; base += 2;
416		// temp16[(base) / 2] = 0xe3a0; base += 2;
417		// temp16[(base) / 2] = 0x0000; base += 2;
418		// temp16[(base) / 2] = 0xe581; base += 2;
	413	// temp16[(base) / 2] = 0x1010; base += 2;
	414	// temp16[(base) / 2] = 0xe59f; base += 2;
	415	// temp16[(base) / 2] = 0x0001; base += 2;
	416	// temp16[(base) / 2] = 0xe3a0; base += 2;
	417	// temp16[(base) / 2] = 0x0000; base += 2;
	418	// temp16[(base) / 2] = 0xe581; base += 2;
419	419
420	420	temp16[(base) / 2] = 0xf000; base += 2;
421	421	temp16[(base) / 2] = 0xe59f; base += 2;
r26736	r26737
424	424	temp16[(base) / 2] = 0x0028; base += 2;
425	425	temp16[(base) / 2] = 0x0800; base += 2;
426	426
427		// temp16[(base) / 2] = 0x003c; base += 2;
428		// temp16[(base) / 2] = 0x1000; base += 2;
	427	// temp16[(base) / 2] = 0x003c; base += 2;
	428	// temp16[(base) / 2] = 0x1000; base += 2;
429	429
430	430	}
431	431
432
	432
433	433	base = 0;
434	434	temp16[(base) /2] = 0x000a; base += 2;
435	435	temp16[(base) /2] = 0xEA00; base += 2;
r26736	r26737
459	459	temp16[(base) /2] = 0xFF1E; base += 2;
460	460	temp16[(base) /2] = 0xE12F; base += 2;
461	461
462		// base = 0xfc; // already at 0xfc
	462	// base = 0xfc; // already at 0xfc
463	463	temp16[(base) /2] = 0xE004; base += 2; // based on killbldp
464	464	temp16[(base) /2] = 0xE52D; base += 2;
465	465	temp16[(base) /2] = 0x0013; base += 2;
r26736	r26737
471	471	temp16[(base) /2] = 0xFF1E; base += 2;
472	472	temp16[(base) /2] = 0xE12F; base += 2;
473	473
474		// base = 0x110; // already at 0x110
475		// temp16[(base) /2] = 0xff1e; base += 2;
476		// temp16[(base) /2] = 0xe12f; base += 2;
477		// temp16[(base) /2] = 0xf302; base += 2;
478		// temp16[(base) /2] = 0xe3a0; base += 2;
	474	// base = 0x110; // already at 0x110
	475	// temp16[(base) /2] = 0xff1e; base += 2;
	476	// temp16[(base) /2] = 0xe12f; base += 2;
	477	// temp16[(base) /2] = 0xf302; base += 2;
	478	// temp16[(base) /2] = 0xe3a0; base += 2;
479	479	// set up stack again, soft-reset reset with a ram variable set to 0
480	480	temp16[(base) /2] = 0x00D1; base += 2;
481	481	temp16[(base) /2] = 0xE3A0; base += 2;
r26736	r26737
499	499	temp16[(base) /2] = 0xE3A0; base += 2;
500	500
501	501
502
503	502
	503
504	504	base = 0x150;
505	505	temp16[(base) /2] = 0xff1e; base += 2;
506	506	temp16[(base) /2] = 0xe12f; base += 2;
r26736	r26737
517	517	svg_basic_init();
518	518	pgm_theglad_decrypt(machine());
519	519	svg_latch_init();
520		// pgm_create_dummy_internal_arm_region(0x188);
	520	// pgm_create_dummy_internal_arm_region(0x188);
521	521
522	522	pgm_create_dummy_internal_arm_region_theglad(0);
523
524	523
	524
525	525	machine().device("prot")->memory().space(AS_PROGRAM).install_read_handler(0x1000000c, 0x1000000f, read32_delegate(FUNC(pgm_arm_type3_state::theglad_speedup_r),this));
526	526	}
527	527
r26736	r26737
606	606
607	607	for (int i = 0; i < 131; i++)
608	608	{
609		// UINT32 addr = extprot[(base/2)] \| (extprot[(base/2) + 1] << 16);
	609	// UINT32 addr = extprot[(base/2)] \| (extprot[(base/2) + 1] << 16);
610	610	extprot[(base / 2)] = subroutine_addresses[i];
611	611
612	612	base += 4;
613		// printf("%04x (%08x)\n", subroutine_addresses[i], addr );
	613	// printf("%04x (%08x)\n", subroutine_addresses[i], addr );
614	614	}
615	615	}
616	616
r26736	r26737
619	619	DRIVER_INIT_CALL(theglad);
620	620
621	621	pgm_patch_external_arm_rom_jumptable_theglada(0x82078);
622
	622
623	623	}
624	624
625	625	INPUT_PORTS_START( theglad )
r26736	r26737
692	692
693	693	machine().device("prot")->memory().space(AS_PROGRAM).install_read_handler(0x1000000c, 0x1000000f, read32_delegate(FUNC(pgm_arm_type3_state::killbldp_speedup_r),this));
694	694
695		// UINT16 temp16 = (UINT16 )memregion("prot")->base();
696		// int base = 0xfc; // startup table uploads
697		// temp16[(base) /2] = 0x0000; base += 2;
698		// temp16[(base) /2] = 0xE1A0; base += 2;
699
700		// base = 0xd4; // startup table uploads
701		// temp16[(base) /2] = 0x0000; base += 2;
702		// temp16[(base) /2] = 0xE1A0; base += 2;
	695	// UINT16 temp16 = (UINT16 )memregion("prot")->base();
	696	// int base = 0xfc; // startup table uploads
	697	// temp16[(base) /2] = 0x0000; base += 2;
	698	// temp16[(base) /2] = 0xE1A0; base += 2;
	699
	700	// base = 0xd4; // startup table uploads
	701	// temp16[(base) /2] = 0x0000; base += 2;
	702	// temp16[(base) /2] = 0xE1A0; base += 2;
703	703	//
704		// base = 0x120; // reset game state, uncomment this to break boot sequence how theglad was broken...
705		// temp16[(base) /2] = 0x0000; base += 2;
706		// temp16[(base) /2] = 0xE1A0; base += 2;
	704	// base = 0x120; // reset game state, uncomment this to break boot sequence how theglad was broken...
	705	// temp16[(base) /2] = 0x0000; base += 2;
	706	// temp16[(base) /2] = 0xE1A0; base += 2;
707	707
708	708	}
709	709
r26736	r26737
757	757	{
758	758	UINT8* buffer = auto_alloc_array(machine(), UINT8, 0x800000);
759	759	int writeaddress = 0;
760
	760
761	761	for (int j = 0; j < 0x800; j += 0x200)
762	762	{
763	763	for (int i = j; i < 0x800000; i += 0x800)
r26736	r26737
807	807	DRIVER_INIT_MEMBER(pgm_arm_type3_state,happy6)
808	808	{
809	809	UINT8 *src;
810
	810
811	811	src = (UINT8 *)(machine().root_device().memregion("tiles")->base()) + 0x180000;
812	812	pgm_descramble_happy6(src);
813	813	pgm_descramble_happy6_2(src);

trunk/src/mame/machine/seicop.c
r26736	r26737
1649	1649	memset(m_cop_dma_size, 0, sizeof(UINT16)*0x200);
1650	1650	memset(m_cop_dma_dst, 0, sizeof(UINT16)*0x200);
1651	1651	memset(m_seibu_vregs, 0, sizeof(UINT16)*0x50/2);
1652
	1652
1653	1653	for (int i = 0; i < 8; i++)
1654	1654	{
1655	1655	m_cop_register[i] = 0;
r26736	r26737
1673	1673	void seibu_cop_legacy_device::device_start()
1674	1674	{
1675	1675	m_cop_mcu_ram = reinterpret_cast<UINT16 *>(machine().root_device().memshare("cop_mcu_ram")->ptr());
1676
	1676
1677	1677	save_item(NAME(m_cop_438));
1678	1678	save_item(NAME(m_cop_43a));
1679	1679	save_item(NAME(m_cop_43c));
r26736	r26737
2238	2238	WRITE16_MEMBER( seibu_cop_legacy_device::generic_cop_w )
2239	2239	{
2240	2240	UINT32 temp32;
2241
	2241
2242	2242	switch (offset)
2243	2243	{
2244	2244	default:

trunk/src/mame/machine/seicop.h
r26736	r26737
11	11	hitbox(0),
12	12	hitbox_x(0),
13	13	hitbox_y(0) {}
14
	14
15	15	int x,y;
16	16	INT16 min_x,min_y,max_x,max_y;
17	17	UINT16 hitbox;
r26736	r26737
41	41	DECLARE_READ16_MEMBER( legionna_mcu_r );
42	42	DECLARE_WRITE16_MEMBER( legionna_mcu_w );
43	43
44		//DECLARE_READ16_MEMBER( raiden2_mcu_r ); unused
45		//DECLARE_WRITE16_MEMBER( raiden2_mcu_w ); unused
	44	//DECLARE_READ16_MEMBER( raiden2_mcu_r ); unused
	45	//DECLARE_WRITE16_MEMBER( raiden2_mcu_w ); unused
46	46
47	47	protected:
48	48	// device-level overrides
r26736	r26737
97	97	extern const device_type SEIBU_COP_LEGACY;
98	98
99	99	#define MCFG_SEIBU_COP_ADD(_tag) \
100		MCFG_DEVICE_ADD(_tag, SEIBU_COP_LEGACY, 0)
	100	MCFG_DEVICE_ADD(_tag, SEIBU_COP_LEGACY, 0)

trunk/src/mame/machine/asic65.c
r26736	r26737
555	555	MCFG_CPU_ADD("asic65cpu", TMS32010, 20000000)
556	556	MCFG_CPU_PROGRAM_MAP(asic65_program_map)
557	557	MCFG_CPU_IO_MAP(asic65_io_map)
558		MACHINE_CONFIG_END
	558	MACHINE_CONFIG_END
559	559
560	560	//-------------------------------------------------
561	561	// machine_config_additions - device-specific

trunk/src/mame/machine/asic65.h
r26736	r26737
5	5	* Implementation of ASIC65
6	6	*
7	7	*************************************/
8
9		#include "cpu/tms32010/tms32010.h"
10
11		enum {
	8
	9	#include "cpu/tms32010/tms32010.h"
	10
	11	enum {
12	12	ASIC65_STANDARD,
13	13	ASIC65_STEELTAL,
14	14	ASIC65_GUARDIANS,
r26736	r26737
19	19	{
20	20	public:
21	21	asic65_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
22
	22
23	23	// (static) configuration helpers
24	24	static void set_type(device_t &device, int type) { downcast<asic65_device &>(device).m_asic65_type = type; }
25	25
r26736	r26737
27	27	DECLARE_WRITE16_MEMBER( data_w );
28	28	DECLARE_READ16_MEMBER( read );
29	29	DECLARE_READ16_MEMBER( io_r );
30
	30
31	31	TIMER_CALLBACK_MEMBER( m68k_asic65_deferred_w );
32	32	WRITE16_MEMBER( m68k_w );
33	33	READ16_MEMBER( m68k_r );
34	34	WRITE16_MEMBER( stat_w );
35	35	READ16_MEMBER( stat_r );
36	36	READ16_MEMBER( get_bio );
37
	37
38	38	enum
39	39	{
40	40	TIMER_M68K_ASIC65_DEFERRED_W

trunk/src/mame/includes/harddriv.h
r26736	r26737
292	292	required_device<duartn68681_device> m_duart;
293	293	optional_device<asic65_device> m_asic65;
294	294	DECLARE_WRITE_LINE_MEMBER(harddriv_duart_irq_handler);
295
	295
296	296	/----------- defined in audio/harddriv.c -----------/
297	297
298	298	void hdsnd_init();
299
	299
300	300	/----------- defined in machine/harddriv.c -----------/
301	301
302	302	/* Driver/Multisync board */
r26736	r26737
329	329	DECLARE_WRITE16_MEMBER( hdgsp_io_w );
330	330
331	331	DECLARE_WRITE16_MEMBER( hdgsp_protection_w );
332
	332
333	333	/* ADSP board */
334	334	DECLARE_READ16_MEMBER( hd68k_adsp_program_r );
335	335	DECLARE_WRITE16_MEMBER( hd68k_adsp_program_w );
r26736	r26737
346	346
347	347	DECLARE_READ16_MEMBER( hdadsp_special_r );
348	348	DECLARE_WRITE16_MEMBER( hdadsp_special_w );
349
	349
350	350	/* DS III/IV board */
351	351	void update_ds3_irq();
352	352	void update_ds3_sirq();
353
	353
354	354	DECLARE_WRITE16_MEMBER( hd68k_ds3_control_w );
355	355	DECLARE_READ16_MEMBER( hd68k_ds3_girq_state_r );
356	356
r26736	r26737
377	377	DECLARE_WRITE16_MEMBER( hdds3_sdsp_control_w );
378	378	DECLARE_READ16_MEMBER( hdds3_xdsp_control_r );
379	379	DECLARE_WRITE16_MEMBER( hdds3_xdsp_control_w );
380
	380
381	381	/* DSK board */
382	382	DECLARE_WRITE16_MEMBER( hd68k_dsk_control_w );
383	383	DECLARE_READ16_MEMBER( hd68k_dsk_ram_r );
r26736	r26737
418	418	/* ADSP optimizations */
419	419	DECLARE_READ16_MEMBER( hdadsp_speedup_r );
420	420	DECLARE_READ16_MEMBER( hdds3_speedup_r );
421
	421
422	422	/----------- defined in video/harddriv.c -----------/
423	423	DECLARE_READ16_MEMBER( hdgsp_control_lo_r );
424	424	DECLARE_WRITE16_MEMBER( hdgsp_control_lo_w );

trunk/src/mame/includes/rungun.h
r26736	r26737
46	46	int m_sprite_colorbase;
47	47
48	48	/* sound */
49		UINT8 m_sound_ctrl;
50		UINT8 m_sound_status;
51		UINT8 m_sound_nmi_clk;
	49	UINT8 m_sound_ctrl;
	50	UINT8 m_sound_status;
	51	UINT8 m_sound_nmi_clk;
52	52
53	53	DECLARE_READ16_MEMBER(rng_sysregs_r);
54	54	DECLARE_WRITE16_MEMBER(rng_sysregs_w);

trunk/src/mame/includes/maygay1b.h
r26736	r26737
52	52	optional_device<roc10937_t> m_vfd;
53	53	optional_device<okim6376_device> m_msm6376;
54	54	required_device<duartn68681_device> m_duart68681;
55
	55
56	56	UINT8 m_lamppos;
57	57	int m_alpha_clock;
58	58	int m_RAMEN;

trunk/src/mame/includes/pgm.h
r26736	r26737
80	80	DECLARE_WRITE8_MEMBER(z80_l3_w);
81	81	DECLARE_WRITE16_MEMBER(pgm_tx_videoram_w);
82	82	DECLARE_WRITE16_MEMBER(pgm_bg_videoram_w);
83
	83
84	84	DECLARE_DRIVER_INIT(pgm);
85	85
86	86	TILE_GET_INFO_MEMBER(get_pgm_tx_tilemap_tile_info);

trunk/src/mame/includes/stv.h
r26736	r26737
739	739	DECLARE_READ16_MEMBER( adsp_control_r );
740	740	DECLARE_WRITE16_MEMBER( adsp_control_w );
741	741	DECLARE_WRITE32_MEMBER(batmanfr_sound_comms_w);
742
	742
743	743	// protection specific variables and functions (see machine/stvprot.c)
744	744	UINT32 m_abus_protenable;
745	745	UINT32 m_abus_prot_addr;
r26736	r26737
751	751	UINT8 m_char_offset; //helper to jump the decoding of the NULL chars.
752	752
753	753	UINT32 (*m_prot_readback)(address_space&,int,UINT32);
754
	754
755	755	DECLARE_READ32_MEMBER( common_prot_r );
756	756	DECLARE_WRITE32_MEMBER( common_prot_w );
757
	757
758	758	void install_common_protection();
759
	759
760	760	void install_twcup98_protection();
761	761	void install_sss_protection();
762	762	void install_astrass_protection();
763	763	void install_rsgun_protection();
764	764	void install_elandore_protection();
765	765	void install_ffreveng_protection();
766
767		void stv_register_protection_savestates();
768
	766
	767	void stv_register_protection_savestates();
	768
769	769	// Decathlete specific variables and functions (see machine/decathlt.c)
770	770	UINT32 m_decathlt_protregs[4];
771	771	UINT32 m_decathlt_lastcount;
r26736	r26737
774	774	UINT32 m_decathlt_prot_uploadoffset;
775	775	UINT16 m_decathlt_prottable1[24];
776	776	UINT16 m_decathlt_prottable2[128];
777
	777
778	778	DECLARE_READ32_MEMBER( decathlt_prot_r );
779	779	DECLARE_WRITE32_MEMBER( decathlt_prot1_w );
780	780	DECLARE_WRITE32_MEMBER( decathlt_prot2_w );

trunk/src/mame/includes/bfm_sc5.h
r26736	r26737
24	24	DECLARE_READ8_MEMBER( sc5_mux1_r );
25	25	DECLARE_WRITE8_MEMBER( sc5_mux1_w );
26	26	DECLARE_WRITE8_MEMBER( sc5_mux2_w );
27
	27
28	28	DECLARE_WRITE_LINE_MEMBER(bfm_sc5_duart_irq_handler);
29	29	DECLARE_WRITE_LINE_MEMBER(bfm_sc5_duart_txa);
30	30	DECLARE_READ8_MEMBER(bfm_sc5_duart_input_r);

trunk/src/mame/includes/vsnes.h
r26736	r26737
10	10	m_subcpu(*this, "sub"),
11	11	m_nesapu1(*this, "nesapu1"),
12	12	m_nesapu2(*this, "nesapu2"),
13		m_ppu1(*this, "ppu1"),
14		m_ppu2(*this, "ppu2"),
	13	m_ppu1(*this, "ppu1"),
	14	m_ppu2(*this, "ppu2"),
15	15	m_work_ram(*this, "work_ram"),
16	16	m_work_ram_1(*this, "work_ram_1")
17	17	{ }

trunk/src/mame/includes/40love.h
r26736	r26737
25	25	required_shared_ptr<UINT8> m_colorram;
26	26	required_shared_ptr<UINT8> m_spriteram2;
27	27	optional_shared_ptr<UINT8> m_mcu_ram;
28
	28
29	29	/* video-related */
30	30	bitmap_ind16 *m_tmp_bitmap1;
31	31	bitmap_ind16 *m_tmp_bitmap2;
r26736	r26737
114	114	void fortyl_plot_pix( int offset );
115	115	void draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect );
116	116	void draw_pixram( bitmap_ind16 &bitmap, const rectangle &cliprect );
117
	117
118	118	enum
119	119	{
120	120	TIMER_NMI_CALLBACK
121	121	};
122	122
123	123	protected:
124		virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
	124	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
125	125	};

trunk/src/mame/includes/plygonet.h
r26736	r26737
46	46	tilemap_t *m_roz_tilemap;
47	47	UINT16 m_ttl_vram[0x800];
48	48	UINT16 m_roz_vram[0x800];
49
	49
50	50	/* sound */
51		UINT8 m_sound_ctrl;
	51	UINT8 m_sound_ctrl;
52	52	UINT8 m_sound_intck;
53	53
54	54	/* memory buffers */

trunk/src/mame/includes/namcos1.h
r26736	r26737
113	113	virtual void video_start();
114	114	UINT32 screen_update_namcos1(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
115	115	void screen_eof_namcos1(screen_device &screen, bool state);
116
117	116
	117
118	118	private:
119	119	inline void bg_get_info(tile_data &tileinfo,int tile_index,UINT8 *info_vram);
120	120	inline void fg_get_info(tile_data &tileinfo,int tile_index,UINT8 *info_vram);

trunk/src/mame/includes/bfm_sc45.h
r26736	r26737
103	103	DECLARE_WRITE16_MEMBER(sc4_mem_w);
104	104
105	105	DECLARE_READ16_MEMBER(sc4_cs1_r);
106
	106
107	107	DECLARE_WRITE_LINE_MEMBER(bfm_sc4_duart_irq_handler);
108	108	DECLARE_WRITE_LINE_MEMBER(bfm_sc4_duart_txa);
109	109	DECLARE_READ8_MEMBER(bfm_sc4_duart_input_r);

trunk/src/mame/includes/astrocde.h
r26736	r26737
43	43	optional_device<astrocade_device> m_astrocade_sound1;
44	44	optional_shared_ptr<UINT8> m_videoram;
45	45	optional_shared_ptr<UINT8> m_protected_ram;
46
	46
47	47	UINT8 m_video_config;
48	48	UINT8 m_sparkle[4];
49	49	char m_totalword[256];
r26736	r26737
152	152	void execute_blit(address_space &space);
153	153	void init_sparklestar();
154	154	virtual void machine_start();
155
	155
156	156	/----------- defined in audio/wow.c -----------/
157	157	DECLARE_READ8_MEMBER( wow_speech_r );
158	158	CUSTOM_INPUT_MEMBER( wow_speech_status_r );
159
	159
160	160	/----------- defined in audio/gorf.c -----------/
161	161	DECLARE_READ8_MEMBER( gorf_speech_r );
162	162	CUSTOM_INPUT_MEMBER( gorf_speech_status_r );

trunk/src/mame/video/1942.c
r26736	r26737
26	26
27	27	void _1942_state::create_palette()
28	28	{
29
30
31	29	const UINT8 *color_prom = memregion("proms")->base();
32	30	int i;
33	31
r26736	r26737
63	61	machine().colortable = colortable_alloc(machine(), 0x600);
64	62
65	63	create_palette();
66
	64
67	65	const UINT8 *color_prom = memregion("proms")->base();
68	66	int i, colorbase;
69	67	color_prom += 3 * 256;
r26736	r26737
97	95	{
98	96	colortable_entry_set_value(machine().colortable, i, i);
99	97	}
100
	98
101	99	}
102	100
103	101	void _1942_state::palette_init_1942p()
104	102	{
105	103	machine().colortable = colortable_alloc(machine(), 0x500);
106
	104
107	105	for (int i = 0; i < 0x400; i++)
108	106	{
109	107	colortable_entry_set_value(machine().colortable, i, i);
r26736	r26737
291	289	code = (m_spriteram[offs] & 0x7f) + 4 * (m_spriteram[offs + 3] & 0x20)
292	290	+ 2 * (m_spriteram[offs] & 0x80);
293	291	col = m_spriteram[offs + 3] & 0x0f;
294
295
	292
	293
296	294	sx = m_spriteram[offs + 2] - 0x10 * (m_spriteram[offs + 3] & 0x10);
297	295	sy = m_spriteram[offs + 1];
298	296

trunk/src/mame/video/hng64.c
r26736	r26737
1637	1637	{
1638	1638	// rising edge
1639	1639	//if (state)
1640		// clear3d();
	1640	// clear3d();
1641	1641	}
1642	1642
1643	1643	void hng64_state::video_start()

trunk/src/mame/video/tia.c
r26736	r26737
51	51	/********************************************************************
52	52	Atari 2600 NTSC Palette Notes:
53	53
54		Palette on a modern flat panel display (LCD, LED, Plasma, etc.)
55		appears different from a traditional CRT. The most outstanding
56		difference is Hue 1x, the hue begin point. Hue 1x looks very
57		'green' (~-60 to -45 degrees - depending on how poor or well it
58		handles the signal conversion and its calibration) on a modern
	54	Palette on a modern flat panel display (LCD, LED, Plasma, etc.)
	55	appears different from a traditional CRT. The most outstanding
	56	difference is Hue 1x, the hue begin point. Hue 1x looks very
	57	'green' (~-60 to -45 degrees - depending on how poor or well it
	58	handles the signal conversion and its calibration) on a modern
59	59	flat panel display, as opposed to 'gold' (~-33 degrees) on a CRT.
60	60
61		The official technical documents: "Television Interface Adaptor
62		[TIA] (Model 1A)", "Atari VCS POP Field Service Manual", and
	61	The official technical documents: "Television Interface Adaptor
	62	[TIA] (Model 1A)", "Atari VCS POP Field Service Manual", and
63	63	"Stella Programmer's Guide" stipulate Hue 1x to be gold.
64	64
65		The system's pot adjustment manually manipulates the degree of
66		phase shift, while the system 'warming-up' will automatically
67		push whatever degrees has been manually set, higher. According
68		to the Atari VCS POP Field Service Manual and system diagnostic
69		and test (color) cart, instructions are provide to set the pot
70		adjustment having Hue 1x and Hue 15x (F$) match or within one
	65	The system's pot adjustment manually manipulates the degree of
	66	phase shift, while the system 'warming-up' will automatically
	67	push whatever degrees has been manually set, higher. According
	68	to the Atari VCS POP Field Service Manual and system diagnostic
	69	and test (color) cart, instructions are provide to set the pot
	70	adjustment having Hue 1x and Hue 15x (F$) match or within one
71	71	shade of each other, both a 'goldenrod'.
72	72
73		At power on, the system's phase shift appears as low as ~23
74		degrees and after a considerable consistent runtime, can be as
75		high as ~28 degrees.
76
77		In general, the low end of ~23 degrees lasts for several seconds,
78		whereas higher values such as ~25-27 degrees are the most
79		dominant during system run time. 180 degrees colorburst takes
80		place at ~25.7 degrees (A near exact match of Hue 1x and 15x -
81		To the naked eye they appear to be the same).
82
83		However, if the system is adjusted within the first several
84		minutes of running, the warm up, consistent system run time,
85		causes Hue 15x (F$) to become stronger/darker gold (More brown
86		then ultimately red-brown); as well as leans Hue 14x (E$) more
87		brown than green. Once achieving a phase shift of 27.7 degrees,
88		Hue 14x (E$) and Hue 15x (F$) near-exact match Hue 1x and 2x
89		respectively.
90
91		Therefore, an ideal phase shift while accounting for properly
92		calibrating a system's color palette within the first several
93		minutes of it running via the pot adjustment, the reality of
94		shifting while warming up, as well as maintaining differences
95		between Hues 1x, 2x and 14x, 15x, would likely fall between 25.7
96		and 27.7 degrees. Phase shifts 26.2 and 26.7 places Hue 15x/F$
97		between Hue 1x and Hue 2x, having 26.2 degrees leaning closer to
	73	At power on, the system's phase shift appears as low as ~23
	74	degrees and after a considerable consistent runtime, can be as
	75	high as ~28 degrees.
	76
	77	In general, the low end of ~23 degrees lasts for several seconds,
	78	whereas higher values such as ~25-27 degrees are the most
	79	dominant during system run time. 180 degrees colorburst takes
	80	place at ~25.7 degrees (A near exact match of Hue 1x and 15x -
	81	To the naked eye they appear to be the same).
	82
	83	However, if the system is adjusted within the first several
	84	minutes of running, the warm up, consistent system run time,
	85	causes Hue 15x (F$) to become stronger/darker gold (More brown
	86	then ultimately red-brown); as well as leans Hue 14x (E$) more
	87	brown than green. Once achieving a phase shift of 27.7 degrees,
	88	Hue 14x (E$) and Hue 15x (F$) near-exact match Hue 1x and 2x
	89	respectively.
	90
	91	Therefore, an ideal phase shift while accounting for properly
	92	calibrating a system's color palette within the first several
	93	minutes of it running via the pot adjustment, the reality of
	94	shifting while warming up, as well as maintaining differences
	95	between Hues 1x, 2x and 14x, 15x, would likely fall between 25.7
	96	and 27.7 degrees. Phase shifts 26.2 and 26.7 places Hue 15x/F$
	97	between Hue 1x and Hue 2x, having 26.2 degrees leaning closer to
98	98	Hue 1x and 26.7 degrees leaning closer to Hue 2x.
99
100		The above notion would also harmonize with what has been
101		documented within "Stella Programmer's Guide" for the colors of
102		1x, 2x, 14x, 15x on the 2600 and 7800. 1x = Gold, 2x = Orange,
103		14x (E$) = Orange-Green. 15x (F$) = Light Orange. Color
104		descriptions are best measured in the middle of the brightness
105		scale. It should be mentioned that Green-Yellow is referenced
106		at Hue 13x (D$), nowhere near Hue 1x. A Green-Yellow Hue 1x is
107		how the palette is manipulated and modified (in part) under a
	99
	100	The above notion would also harmonize with what has been
	101	documented within "Stella Programmer's Guide" for the colors of
	102	1x, 2x, 14x, 15x on the 2600 and 7800. 1x = Gold, 2x = Orange,
	103	14x (E$) = Orange-Green. 15x (F$) = Light Orange. Color
	104	descriptions are best measured in the middle of the brightness
	105	scale. It should be mentioned that Green-Yellow is referenced
	106	at Hue 13x (D$), nowhere near Hue 1x. A Green-Yellow Hue 1x is
	107	how the palette is manipulated and modified (in part) under a
108	108	modern flat panel display.
109	109
110		Additionally, the blue to red (And consequently blue to green)
111		ratio proportions may appear different on a modern flat panel
112		display than a CRT in some instances for the Atari 2600 system.
113		Furthermore, you may have some variation of proportions even
	110	Additionally, the blue to red (And consequently blue to green)
	111	ratio proportions may appear different on a modern flat panel
	112	display than a CRT in some instances for the Atari 2600 system.
	113	Furthermore, you may have some variation of proportions even
114	114	within the same display type.
115
116		One side effect of this on the console's palette is that some
117		values of red may appear too pinkish - Too much blue to red.
118		This is not the same as a traditional tint-hue control adjustment;
119		rather, can be demonstrated by changing the blue ratio values
	115
	116	One side effect of this on the console's palette is that some
	117	values of red may appear too pinkish - Too much blue to red.
	118	This is not the same as a traditional tint-hue control adjustment;
	119	rather, can be demonstrated by changing the blue ratio values
120	120	via MESS HLSL settings.
121	121
122		Lastly, the Atari 5200 & 7800 NTSC color palettes hold the same
123		hue structure order and have similar appearance differences that
	122	Lastly, the Atari 5200 & 7800 NTSC color palettes hold the same
	123	hue structure order and have similar appearance differences that
124	124	are dependent upon display type.
125	125	********************************************************************/
126	126	/*********************************

trunk/src/mame/drivers/meritm.c
r26736	r26737
1484	1484	ROM_RELOAD( 0x380000, 0x080000)
1485	1485
1486	1486	ROM_REGION( 0x000022, "ds1204", 0 )
1487		ROM_LOAD( "9255-10-01-u5-r0", 0x000000, 0x000022, BAD_DUMP CRC(b13c68d2) SHA1(99f9584ba005d32ad8abefd64159a8c296dcd580) )
	1487	ROM_LOAD( "9255-10-01-u5-r0", 0x000000, 0x000022, BAD_DUMP CRC(b13c68d2) SHA1(99f9584ba005d32ad8abefd64159a8c296dcd580) )
1488	1488	ROM_END
1489	1489
1490	1490	ROM_START( megat2a ) /* Dallas DS1204U-3 security key labeled 9255-10-01-U5-R0 */
r26736	r26737
1499	1499	ROM_RELOAD( 0x380000, 0x080000)
1500	1500
1501	1501	ROM_REGION( 0x000022, "ds1204", 0 )
1502		ROM_LOAD( "9255-10-01-u5-r0", 0x000000, 0x000022, BAD_DUMP CRC(b13c68d2) SHA1(99f9584ba005d32ad8abefd64159a8c296dcd580) )
	1502	ROM_LOAD( "9255-10-01-u5-r0", 0x000000, 0x000022, BAD_DUMP CRC(b13c68d2) SHA1(99f9584ba005d32ad8abefd64159a8c296dcd580) )
1503	1503	ROM_END
1504	1504
1505	1505	ROM_START( megat2b ) /* Dallas DS1204U-3 security key labeled 9255-10-01-U5-R0 */
r26736	r26737
1514	1514	ROM_RELOAD( 0x380000, 0x080000)
1515	1515
1516	1516	ROM_REGION( 0x000022, "ds1204", 0 )
1517		ROM_LOAD( "9255-10-01-u5-r0", 0x000000, 0x000022, BAD_DUMP CRC(b13c68d2) SHA1(99f9584ba005d32ad8abefd64159a8c296dcd580) )
	1517	ROM_LOAD( "9255-10-01-u5-r0", 0x000000, 0x000022, BAD_DUMP CRC(b13c68d2) SHA1(99f9584ba005d32ad8abefd64159a8c296dcd580) )
1518	1518	ROM_END
1519	1519
1520	1520	ROM_START( megat2mn ) /* Dallas DS1204U-3 security key labeled 9255-10-01-U5-R0 */
r26736	r26737
1529	1529	ROM_RELOAD( 0x380000, 0x080000)
1530	1530
1531	1531	ROM_REGION( 0x000022, "ds1204", 0 )
1532		ROM_LOAD( "9255-10-01-u5-r0", 0x000000, 0x000022, BAD_DUMP CRC(b13c68d2) SHA1(99f9584ba005d32ad8abefd64159a8c296dcd580) )
	1532	ROM_LOAD( "9255-10-01-u5-r0", 0x000000, 0x000022, BAD_DUMP CRC(b13c68d2) SHA1(99f9584ba005d32ad8abefd64159a8c296dcd580) )
1533	1533	ROM_END
1534	1534
1535	1535	ROM_START( megat2ca ) /* Dallas DS1204U-3 security key labeled 9255-10-01-U5-R0 */
r26736	r26737
1544	1544	ROM_RELOAD( 0x380000, 0x080000)
1545	1545
1546	1546	ROM_REGION( 0x000022, "ds1204", 0 )
1547		ROM_LOAD( "9255-10-01-u5-r0", 0x000000, 0x000022, BAD_DUMP CRC(b13c68d2) SHA1(99f9584ba005d32ad8abefd64159a8c296dcd580) )
	1547	ROM_LOAD( "9255-10-01-u5-r0", 0x000000, 0x000022, BAD_DUMP CRC(b13c68d2) SHA1(99f9584ba005d32ad8abefd64159a8c296dcd580) )
1548	1548	ROM_END
1549	1549
1550	1550	ROM_START( megat2caa ) /* Dallas DS1204U-3 security key labeled 9255-10-01-U5-R0 */
r26736	r26737
1559	1559	ROM_RELOAD( 0x380000, 0x080000)
1560	1560
1561	1561	ROM_REGION( 0x000022, "ds1204", 0 )
1562		ROM_LOAD( "9255-10-01-u5-r0", 0x000000, 0x000022, BAD_DUMP CRC(b13c68d2) SHA1(99f9584ba005d32ad8abefd64159a8c296dcd580) )
	1562	ROM_LOAD( "9255-10-01-u5-r0", 0x000000, 0x000022, BAD_DUMP CRC(b13c68d2) SHA1(99f9584ba005d32ad8abefd64159a8c296dcd580) )
1563	1563	ROM_END
1564	1564
1565	1565	ROM_START( megat3 ) /* Dallas DS1204V security key at U5 labeled 9255-20-01 U5-RO1 C1995 MII */

trunk/src/mame/drivers/capbowl.c
r26736	r26737
92	92	#include "sound/2203intf.h"
93	93	#include "sound/dac.h"
94	94
95		#define MASTER_CLOCK XTAL_8MHz
	95	#define MASTER_CLOCK XTAL_8MHz
96	96
97	97
98	98	/*************************************
r26736	r26737
370	370
371	371	MCFG_CPU_ADD("audiocpu", M6809E, MASTER_CLOCK)
372	372	MCFG_CPU_PROGRAM_MAP(sound_map)
373		// MCFG_WATCHDOG_TIME_INIT(PERIOD_OF_555_ASTABLE(100000.0, 100000.0, 0.1e-6) * 15.5) // TODO
	373	// MCFG_WATCHDOG_TIME_INIT(PERIOD_OF_555_ASTABLE(100000.0, 100000.0, 0.1e-6) * 15.5) // TODO
374	374
375	375	MCFG_NVRAM_ADD_RANDOM_FILL("nvram")
376	376

trunk/src/mame/drivers/cinemat.c
r26736	r26737
631	631	PORT_BIT( 0xe000, IP_ACTIVE_LOW, IPT_UNUSED )
632	632
633	633	PORT_START("SWITCHES")
634		PORT_DIPNAME( 0x03, 0x02, "Time" ) PORT_DIPLOCATION("SW1:!1,!2")
	634	PORT_DIPNAME( 0x03, 0x02, "Time" ) PORT_DIPLOCATION("SW1:!1,!2")
635	635	PORT_DIPSETTING( 0x00, "0:30/coin" )
636	636	PORT_DIPSETTING( 0x02, "1:00/coin" )
637	637	PORT_DIPSETTING( 0x01, "1:30/coin" )
638	638	PORT_DIPSETTING( 0x03, "2:00/coin" )
639	639	PORT_SERVICE_DIPLOC( 0x04, IP_ACTIVE_HIGH, "SW1:!3" )
640		PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:!4")
	640	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:!4")
641	641	PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
642	642	PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) )
643	643	PORT_DIPUNUSED_DIPLOC( 0x10, IP_ACTIVE_HIGH, "SW1:!5" )

trunk/src/mame/drivers/vegas.c
r26736	r26737
1610	1610	/* unmap everything we know about */
1611	1611	for (addr = 0; addr < m_dynamic_count; addr++)
1612	1612	m_maincpu->space(AS_PROGRAM).unmap_readwrite(dynamic[addr].start, dynamic[addr].end);
1613
	1613
1614	1614	for (l_addr = 0; l_addr < m_legacy_dynamic_count; l_addr++)
1615	1615	m_maincpu->space(AS_PROGRAM).unmap_readwrite(l_dynamic[l_addr].start, l_dynamic[l_addr].end);
1616	1616
r26736	r26737
1741	1741	if (!dynamic[addr].write.isnull())
1742	1742	space.install_write_handler(dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].write);
1743	1743	}
1744
	1744
1745	1745	for (l_addr = 0; l_addr < m_legacy_dynamic_count; l_addr++)
1746	1746	{
1747	1747	if (LOG_DYNAMIC) logerror(" installing: %08X-%08X %s,%s\n", l_dynamic[l_addr].start, l_dynamic[l_addr].end, l_dynamic[l_addr].rdname, l_dynamic[l_addr].wrname);

trunk/src/mame/drivers/csplayh5.c
r26736	r26737
11	11	- Implement DVD routing and YUV decoding;
12	12	- game timings seem busted, could be due of missing DVD hook-up
13	13	- csplayh1: inputs doesn't work at all, slower than the others too
14		- h8 type is almost likely to be wrong;
	14	- h8 type is almost likely to be wrong;
15	15
16		DVD Notes:
17		- TMP68301 communicates with h8 via their respective internal serial comms
18		- First command is a "?P<CR>", which, according to the Pioneer V5000 protocol manual
19		is an Active Mode request. Manual is at:
20		http://www.pioneerelectronics.com/ephox/StaticFiles/Manuals/Business/Pio%20V5000-RS232%20-%20CPM.pdf
	16	DVD Notes:
	17	- TMP68301 communicates with h8 via their respective internal serial comms
	18	- First command is a "?P<CR>", which, according to the Pioneer V5000 protocol manual
	19	is an Active Mode request. Manual is at:
	20	http://www.pioneerelectronics.com/ephox/StaticFiles/Manuals/Business/Pio%20V5000-RS232%20-%20CPM.pdf
21	21	After returning a correct status code, tmp68301 sends "FSDVD04.MPG00001<CR>" to serial, probably tries
22	22	to playback the file ...
23	23

trunk/src/mame/drivers/lbeach.c
r26736	r26737
8	8	16MHz XTAL, M6800 @ 500kHz
9	9	2x 5101 sram 256x4bit (256 byte) battery backed
10	10	4x 4045 sram 1kx4 (2K byte)
11
	11
12	12	Game should be in b&w? But then highlighted blocks in testmode
13	13	would be invisible.
14	14
r26736	r26737
129	129
130	130	m_fg_tilemap = &machine().tilemap().create(tilemap_get_info_delegate(FUNC(lbeach_state::get_fg_tile_info),this), TILEMAP_SCAN_ROWS, 16, 8, 32, 32);
131	131	m_fg_tilemap->set_transparent_pen(0);
132
	132
133	133	m_screen->register_screen_bitmap(m_colmap_car);
134	134	}
135	135
r26736	r26737
151	151
152	152	m_collision_bg_car = 0;
153	153	m_collision_fg_car = 0;
154
	154
155	155	for (int y = sprite_y; y < (sprite_y + 16); y++)
156	156	{
157	157	for (int x = sprite_x; x < (sprite_x + 16) && cliprect.contains(x, y); x++)
r26736	r26737
160	160	m_collision_fg_car \|= (fg_bitmap.pix16(y, x) & m_colmap_car.pix16(y, x) & 1);
161	161	}
162	162	}
163
	163
164	164	// draw fg layer (tiles)
165	165	m_fg_tilemap->draw(screen, bitmap, cliprect, 0, 0);
166	166
r26736	r26737
202	202	// d6 and d7 are for collision detection
203	203	UINT8 d6 = m_collision_fg_car ? 0x40 : 0;
204	204	UINT8 d7 = m_collision_bg_car ? 0x80 : 0;
205
	205
206	206	return (ioport("IN2")->read() & 0x3f) \| d6 \| d7;
207	207	}
208	208
r26736	r26737
216	216	AM_RANGE(0x8000, 0x8000) AM_WRITEONLY AM_SHARE("scroll_y")
217	217	AM_RANGE(0x8001, 0x8001) AM_WRITEONLY AM_SHARE("sprite_x")
218	218	AM_RANGE(0x8002, 0x8002) AM_WRITEONLY AM_SHARE("sprite_code")
219		// AM_RANGE(0x8003, 0x8003) AM_WRITENOP // ?
220		// AM_RANGE(0x8004, 0x8004) AM_WRITENOP // ?
221		// AM_RANGE(0x8005, 0x8005) AM_WRITENOP // ?
	219	// AM_RANGE(0x8003, 0x8003) AM_WRITENOP // ?
	220	// AM_RANGE(0x8004, 0x8004) AM_WRITENOP // ?
	221	// AM_RANGE(0x8005, 0x8005) AM_WRITENOP // ?
222	222	AM_RANGE(0x8007, 0x8007) AM_WRITENOP // probably watchdog
223	223	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("IN0")
224		// AM_RANGE(0xa003, 0xa003) AM_READNOP // ? tests d7 at game over
	224	// AM_RANGE(0xa003, 0xa003) AM_READNOP // ? tests d7 at game over
225	225	AM_RANGE(0xc000, 0xcfff) AM_ROM
226	226	AM_RANGE(0xf000, 0xffff) AM_ROM
227	227	ADDRESS_MAP_END

trunk/src/mame/drivers/cham24.c
r26736	r26737
73	73	required_device<cpu_device> m_maincpu;
74	74	required_device<nesapu_device> m_nesapu;
75	75	required_device<ppu2c0x_device> m_ppu;
76
	76
77	77	UINT8* m_nt_ram;
78	78	UINT8* m_nt_page[4];
79	79	UINT32 m_in_0;

trunk/src/mame/drivers/arcadia.c
r26736	r26737
395	395	ROM_LOAD16_BYTE_BIOS( 5, "gcp_v400_1-hi.u16", 0x000000, 0x10000, CRC(69295167) SHA1(855f53abbb9dc15e5518e16c5c2dfe4134d07306) ) \
396	396	ROM_LOAD16_BYTE_BIOS( 5, "gcp_v400_1-lo.u11", 0x000001, 0x10000, CRC(504c2171) SHA1(a93367f520afb86c97c0a191714b72823c95cdd2) ) \
397	397	ROM_LOAD16_BYTE_BIOS( 5, "gcp_v400_2-hi.u17", 0x020000, 0x10000, CRC(13fb4e2d) SHA1(3eef07aecc3a201ae0b20634c7fd0c87c89fd7f1) ) \
398		ROM_LOAD16_BYTE_BIOS( 5, "gcp_v400_2-lo.u12", 0x020001, 0x10000, CRC(a5cc4515) SHA1(80070521476e92323a6baa6e55928ca5b751a332) ) \
	398	ROM_LOAD16_BYTE_BIOS( 5, "gcp_v400_2-lo.u12", 0x020001, 0x10000, CRC(a5cc4515) SHA1(80070521476e92323a6baa6e55928ca5b751a332) )
399	399
400
401	400	ROM_START( ar_bios )
402	401	ARCADIA_BIOS
403	402
r26736	r26737
952	951	DRIVER_INIT_MEMBER(arcadia_amiga_state,sprg) { arcadia_init(); generic_decode("user3", 4, 7, 3, 0, 6, 5, 2, 1); }
953	952	DRIVER_INIT_MEMBER(arcadia_amiga_state,xeon) { arcadia_init(); generic_decode("user3", 3, 1, 2, 4, 0, 5, 6, 7); }
954	953	DRIVER_INIT_MEMBER(arcadia_amiga_state,pm) { arcadia_init(); generic_decode("user3", 7, 6, 5, 4, 3, 2, 1, 0); } // no scramble
955		DRIVER_INIT_MEMBER(arcadia_amiga_state,dlta) { arcadia_init(); generic_decode("user3", 4, 6, 5, 7, 3, 2, 1, 0); generic_decode("user3", 7, 6, 0, 4, 3, 2, 1, 5); generic_decode("user3", 7, 6, 5, 4, 1, 2, 3, 0); generic_decode("user3", 7, 6, 2, 4, 3, 5, 1, 0); generic_decode("user3", 7, 6, 3, 4, 5, 2, 1, 0); generic_decode("user3", 7, 4, 5, 6, 3, 2, 1, 0); generic_decode("user3", 7, 5, 6, 4, 3, 2, 1, 0); }
	954	DRIVER_INIT_MEMBER(arcadia_amiga_state,dlta) { arcadia_init(); generic_decode("user3", 4, 6, 5, 7, 3, 2, 1, 0); generic_decode("user3", 7, 6, 0, 4, 3, 2, 1, 5); generic_decode("user3", 7, 6, 5, 4, 1, 2, 3, 0); generic_decode("user3", 7, 6, 2, 4, 3, 5, 1, 0); generic_decode("user3", 7, 6, 3, 4, 5, 2, 1, 0); generic_decode("user3", 7, 4, 5, 6, 3, 2, 1, 0); generic_decode("user3", 7, 5, 6, 4, 3, 2, 1, 0); }
956	955
957	956
958	957

trunk/src/mame/drivers/pinkiri8.c
r26736	r26737
198	198	{
199	199	/* "vram1" (video map 0xfc2000)
200	200
201		tttt tttt \| 00tt tttt \| cccc c000 \| xxxx xxxx \|
	201	tttt tttt \| 00tt tttt \| cccc c000 \| xxxx xxxx \|
202	202
203		"vram2" (video map 0xfc3800)
	203	"vram2" (video map 0xfc3800)
204	204
205		yyyy yyyy \| ???? ???? \|
	205	yyyy yyyy \| ???? ???? \|
206	206
207	207
208		widths come from "widthflags" (0xfc3780)
209		"unk1" (0xfc3700) and "unk2" (0xfc37c0) are a mystery
	208	widths come from "widthflags" (0xfc3780)
	209	"unk1" (0xfc3700) and "unk2" (0xfc37c0) are a mystery
210	210
211		*/
	211	*/
212	212
213	213	spr_offs = ((m_janshi_vram1[(i4)+0] & 0xff) \| (m_janshi_vram1[(i4)+1]<<8)) & 0xffff;
214	214	col = (m_janshi_vram1[(i*4)+2] & 0xf8) >> 3;
r26736	r26737
321	321
322	322	UINT32 pinkiri8_state::screen_update_pinkiri8(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
323	323	{
324
325	324	/* update palette */
326	325	for (int pen = 0; pen < 0x800 ; pen++)
327	326	{

trunk/src/mame/drivers/rungun.c
r26736	r26737
201	201	WRITE8_MEMBER(rungun_state::sound_ctrl_w)
202	202	{
203	203	/*
204		.... xxxx - Z80 ROM bank
205		...x .... - NMI enable/acknowledge
206		xx.. .... - BLT2/1 (?)
	204	.... xxxx - Z80 ROM bank
	205	...x .... - NMI enable/acknowledge
	206	xx.. .... - BLT2/1 (?)
207	207	*/
208	208
209	209	membank("bank2")->set_entry(data & 0x07);

trunk/src/mame/drivers/atari_s1.c
r26736	r26737
328	328	// ROM_LOAD("atarianb.e00", 0x7000, 0x0800, CRC(74fc86e4) SHA1(135d75e5c03feae0929fa84caa3c802353cdd94e))
329	329	// ROM_LOAD("atarian.e0", 0x7800, 0x0800, CRC(45cb0427) SHA1(e286930ca36bdd0f79acefd142d2a5431fa8005b))
330	330	//
331		// ROM_REGION(0x1000, "sound1", 0)
332		// ROM_LOAD("82s130.bin", 0x0000, 0x0200, CRC(da1f77b4) SHA1(b21fdc1c6f196c320ec5404013d672c35f95890b))
	331	// ROM_REGION(0x1000, "sound1", 0)
	332	// ROM_LOAD("82s130.bin", 0x0000, 0x0200, CRC(da1f77b4) SHA1(b21fdc1c6f196c320ec5404013d672c35f95890b))
333	333	//ROM_END
334	334
335	335	/*-------------------------------------------------------------------

trunk/src/mame/drivers/konamigq.c
r26736	r26737
94	94	DECLARE_MACHINE_RESET(konamigq);
95	95	INTERRUPT_GEN_MEMBER(tms_sync);
96	96	DECLARE_WRITE_LINE_MEMBER(k054539_irq_gen);
97
	97
98	98	void scsi_dma_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size );
99	99	void scsi_dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size );
100	100	};

trunk/src/mame/drivers/toaplan2.c
r26736	r26737
37	37	batsuguna TP-030 Toaplan Batsugun (older)
38	38	batsugunsp TP-030 Toaplan Batsugun (Special Version)
39	39	pwrkick ?????? Sunwise Power Kick
40		othldrby ?????? Sunwise Othello Derby
	40	othldrby ?????? Sunwise Othello Derby
41	41	snowbro2 ?????? Hanafram Snow Bros. 2 - With New Elves
42	42
43	43	* This version of Whoopee!! is on a board labeled TP-020
r26736	r26737
5348	5348	GAME( 1999, bbakraidj, bbakraid, bbakraid, bbakraid, toaplan2_state, bbakraid, ROT270, "Eighting", "Battle Bakraid - Unlimited Version (Japan) (Tue Jun 8 1999)", GAME_SUPPORTS_SAVE )
5349	5349	// older revision of the code
5350	5350	GAME( 1999, bbakraidja, bbakraid, bbakraid, bbakraid, toaplan2_state, bbakraid, ROT270, "Eighting", "Battle Bakraid (Japan) (Wed Apr 7 1999)", GAME_SUPPORTS_SAVE )
5351

trunk/src/mame/drivers/maygayv1.c
r26736	r26737
227	227	required_device<i8052_device> m_soundcpu;
228	228	required_device<upd7759_device> m_upd7759;
229	229	required_device<duartn68681_device> m_duart68681;
230
	230
231	231	int m_vsync_latch_preset;
232	232	UINT8 m_p1;
233	233	UINT8 m_p3;

trunk/src/mame/drivers/pgm.c
r26736	r26737
483	483	int scanline = param;
484	484
485	485	// already being generated by MCFG_CPU_VBLANK_INT_DRIVER("screen", pgm_state, irq6_line_hold)
486		// if(scanline == 224)
487		// m_maincpu->set_input_line(6, HOLD_LINE);
	486	// if(scanline == 224)
	487	// m_maincpu->set_input_line(6, HOLD_LINE);
488	488
489	489	if(scanline == 0)
490	490	if (!m_irq4_disabled) m_maincpu->set_input_line(4, HOLD_LINE);
r26736	r26737
3288	3288	ROM_START( thegladpcb )
3289	3289	ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */
3290	3290	ROM_LOAD16_WORD_SWAP( "bios.42", 0x000000, 0x020000, CRC(517cf7a2) SHA1(f5720b29e3be6ec22be03a768618cb2a1aa4ade7) )
3291		ROM_LOAD16_WORD_SWAP( "glad_v100.43", 0x100000, 0x080000, CRC(bcf3b172) SHA1(df7e2808c0341be0a59eefa852c857a3a919223e) )
	3291	ROM_LOAD16_WORD_SWAP( "glad_v100.43", 0x100000, 0x080000, CRC(bcf3b172) SHA1(df7e2808c0341be0a59eefa852c857a3a919223e) )
3292	3292
3293	3293	ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */
3294	3294	ROM_LOAD( "thegladpcb_igs027a_execute_only_area", 0x0000, 0x00188, NO_DUMP )
3295		ROM_LOAD( "thegladpcb_igs027a_v100_japan.bin", 0x0188, 0x3e78, CRC(d7f06e2d) SHA1(9c3aca7a487f5329d84731e2c63d5ed591bf9d24) ) // from 'thegladpcb set'
	3295	ROM_LOAD( "thegladpcb_igs027a_v100_japan.bin", 0x0188, 0x3e78, CRC(d7f06e2d) SHA1(9c3aca7a487f5329d84731e2c63d5ed591bf9d24) ) // from 'thegladpcb set'
3296	3296
3297	3297	ROM_REGION( 0x800000, "user1", 0 ) /* Protection Data (encrypted external ARM data, internal missing) */
3298	3298	ROM_LOAD( "igs_v100.62", 0x000000, 0x200000, CRC(0f3f511e) SHA1(28dd8d27495cec86e968a3ea549c5b30513dbb6e) )
r26736	r26737
3581	3581
3582	3582	ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */
3583	3583	/* the first 0x268 bytes of this are EXECUTE ONLY in the original chip, attempting to read them even via the original CPU just returns what is on the bus */
3584		// ROM_LOAD( "killbldp_igs027a.bin", 0x000000, 0x04000, CRC(c7868d90) SHA1(335c99933a38b77fcfc3f8004063f35124364f3e) ) // this is the original rom with the first 0x268 bytes from the bootleg - but it doesn't work?
	3584	// ROM_LOAD( "killbldp_igs027a.bin", 0x000000, 0x04000, CRC(c7868d90) SHA1(335c99933a38b77fcfc3f8004063f35124364f3e) ) // this is the original rom with the first 0x268 bytes from the bootleg - but it doesn't work?
3585	3585	/* there are some differences around 0x2e80, investigate - maybe above is badly dumped?, padding at 0x3ac0 is also different */
3586	3586	ROM_LOAD( "killbldp_igs027a_alt.bin", 0x000000, 0x04000, CRC(98316b06) SHA1(09be9fad24d68980a0a5beae60ced48012286216) ) // from a bootleg
3587	3587
r26736	r26737
3614	3614	ROM_LOAD16_WORD_SWAP( "u30.bin", 0x100000, 0x080000, CRC(34c18f3f) SHA1(42d1edd0dcfaa5e44861c6a1d4cb24f51ba23de8) )
3615	3615
3616	3616	ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */
3617		// ROM_LOAD( "svg_igs027a.bin", 0x000000, 0x04000, NO_DUMP ) // different from PCB version..
	3617	// ROM_LOAD( "svg_igs027a.bin", 0x000000, 0x04000, NO_DUMP ) // different from PCB version..
3618	3618	ROM_LOAD( "svg_igs027a_execute_only_area", 0x0000, 0x00188, NO_DUMP )
3619	3619	ROM_LOAD( "svg_igs027a.bin", 0x0188, 0x3e78, BAD_DUMP CRC(7a59da5d) SHA1(d67ba465db40ca716b4b901b1c8e762716fb954e) ) // taken from svgpcb
3620	3620
r26736	r26737
3652	3652	ROM_LOAD( "svgpcb_igs027a_execute_only_area", 0x0000, 0x00188, NO_DUMP )
3653	3653	ROM_LOAD( "svgcpb_igs027a_v100_japan.bin", 0x0188, 0x3e78, CRC(7a59da5d) SHA1(d67ba465db40ca716b4b901b1c8e762716fb954e) )
3654	3654
3655
	3655
3656	3656	ROM_REGION( 0x800000, "user1", 0 ) /* Protection Data (encrypted external ARM data) */
3657	3657	ROM_LOAD( "svg_v100jp.u64", 0x000000, 0x400000, CRC(399d4a8b) SHA1(b120e8386a259e6fd7941acf3c33cf288eda616c) )
3658	3658	ROM_LOAD( "svg_v100jp.u65", 0x400000, 0x400000, CRC(6e1c33b1) SHA1(66f26b2f4c0b3dcf6d1bb1df48e2ddbcc9d9432d) )
r26736	r26737
3685	3685
3686	3686	ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */
3687	3687	// data before 0x188 is read-protected and cannot be read even with a trojan (as with most 2001/2+ IGS titles)
3688		// ROM_LOAD( "happy6_igs027a.bin", 0x000000, 0x04000, NO_DUMP )
	3688	// ROM_LOAD( "happy6_igs027a.bin", 0x000000, 0x04000, NO_DUMP )
3689	3689	// for testing only, this is from the gladiator and wrong for this game.
3690	3690	ROM_LOAD( "happy6_igs027a_execute_only_area", 0x0000, 0x00188, NO_DUMP )
3691		ROM_LOAD( "happy6_igs027a_v100_japan.bin", 0x0188, 0x3e78, BAD_DUMP CRC(d7f06e2d) SHA1(9c3aca7a487f5329d84731e2c63d5ed591bf9d24) ) // from 'thegladpcb set'
	3691	ROM_LOAD( "happy6_igs027a_v100_japan.bin", 0x0188, 0x3e78, BAD_DUMP CRC(d7f06e2d) SHA1(9c3aca7a487f5329d84731e2c63d5ed591bf9d24) ) // from 'thegladpcb set'
3692	3692
3693	3693
3694	3694	ROM_REGION( 0x800000, "user1", 0 ) /* Protection Data (encrypted external ARM data) */
r26736	r26737
4175	4175	GAME( 2003, theglad, pgm, pgm_arm_type3, theglad, pgm_arm_type3_state, theglad, ROT0, "IGS", "The Gladiator / Road of the Sword / Shen Jian (M68k label V101) (ARM label V107, ROM 06/06/03 SHEN JIAN V107)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // ARM time: 16:17:27
4176	4176	GAME( 2003, theglad101, theglad, pgm_arm_type3, theglad, pgm_arm_type3_state, theglad, ROT0, "IGS", "The Gladiator / Road of the Sword / Shen Jian (M68k label V100) (ARM label V101, ROM 03/13/03 SHEN JIAN)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) // ARM time: 14:06:44
4177	4177	// the v100 68k ROM on this is older than the v101 set, this set also uses a different internal ROM to everything else, must be a very early release, maybe pre v100 proto with v100 strings?
4178		GAME( 2003, theglad100, theglad, pgm_arm_type3, theglad, pgm_arm_type3_state, theglada, ROT0, "IGS", "The Gladiator / Road of the Sword / Shen Jian (M68k label V100) (ARM label V100, ROM 01/16/03 SHEN JIAN)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) /* need correct internal rom of IGS027A - we currently patch the one we have */ // ARM time: 10:39:25
	4178	GAME( 2003, theglad100, theglad, pgm_arm_type3, theglad, pgm_arm_type3_state, theglada, ROT0, "IGS", "The Gladiator / Road of the Sword / Shen Jian (M68k label V100) (ARM label V100, ROM 01/16/03 SHEN JIAN)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE ) /* need correct internal rom of IGS027A - we currently patch the one we have */ // ARM time: 10:39:25
4179	4179	// newer than ARM V100 Cart, older than ARM V101 Cart, same 68k rom as V101 Cart.
4180	4180	GAME( 2003, thegladpcb, theglad, pgm_arm_type3, pgm, pgm_arm_type3_state, theglad, ROT0, "IGS", "The Gladiator / Road of the Sword / Shen Jian (M68k label V100) (ARM label V100, ROM 02/25/03 SHEN JIAN) (Japan, JAMMA PCB)", GAME_IMPERFECT_SOUND \| GAME_SUPPORTS_SAVE )// ARM time: 16:32:21 // PCB version only released in Japan?
4181	4181

trunk/src/mame/drivers/sangho.c
r26736	r26737
81	81	};
82	82
83	83	/*
84		slot 0 selects RAM
85		slot 1 selects ?
86		slot 2 selects code ROMs
87		slot 3 selects data ROMs
	84	slot 0 selects RAM
	85	slot 1 selects ?
	86	slot 2 selects code ROMs
	87	slot 3 selects data ROMs
88	88	*/
89	89	void sangho_state::pzlestar_map_banks()
90	90	{

trunk/src/mame/drivers/zr107.c
r26736	r26737
207	207	int m_ccu_vctl;
208	208	UINT8 m_sound_ctrl;
209	209	UINT8 m_sound_intck;
210
	210
211	211	DECLARE_WRITE32_MEMBER(paletteram32_w);
212	212	DECLARE_READ8_MEMBER(sysreg_r);
213	213	DECLARE_WRITE8_MEMBER(sysreg_w);
r26736	r26737
841	841	MCFG_K001604_ADD("k001604", jetwave_k001604_intf)
842	842
843	843	MCFG_K056800_ADD("k056800", XTAL_18_432MHz)
844		MCFG_K056800_INT_HANDLER(INPUTLINE("audiocpu", M68K_IRQ_1))
	844	MCFG_K056800_INT_HANDLER(INPUTLINE("audiocpu", M68K_IRQ_1))
845	845
846	846	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
847	847
848	848	MCFG_K054539_ADD("k054539_1", XTAL_18_432MHz, k054539_config)
849		MCFG_K054539_TIMER_HANDLER(WRITELINE(zr107_state, k054539_irq_gen))
	849	MCFG_K054539_TIMER_HANDLER(WRITELINE(zr107_state, k054539_irq_gen))
850	850	MCFG_SOUND_ROUTE(0, "lspeaker", 0.75)
851	851	MCFG_SOUND_ROUTE(1, "rspeaker", 0.75)
852	852

trunk/src/mame/drivers/superchs.c
r26736	r26737
530	530	ROM_LOAD16_BYTE( "ic127 ae27.bin", 0x00000, 0x40000, CRC(8c8cd2a1) SHA1(178ab2df0ea7371ce275d38051643ea19ba88047) )
531	531
532	532	ROM_REGION( 0x200000, "gfx1", 0 ) /* SCR 16x16 tiles */
533		ROM_LOAD32_BYTE( "0scn.ic9", 0x00000, 0x080000, CRC(d54e80ec) SHA1(83460cf97b0da8523486ede5bd504710c790b1a6) )
534		ROM_LOAD32_BYTE( "8scn.ic8", 0x00002, 0x080000, CRC(b3da122d) SHA1(1e4198b2d5ce2144a7ca01f418aca33f799dcad2) )
535		ROM_LOAD32_BYTE( "16scn.ic12", 0x00001, 0x080000, CRC(dd26932c) SHA1(31bcc4e0195a6d966829976b89e81e6eb7dde8b6) )
536		ROM_LOAD32_BYTE( "24scn.ic13", 0x00003, 0x080000, CRC(4f560680) SHA1(6398013b8fa5aebc905bf31918e990dd7f5d9490) )
	533	ROM_LOAD32_BYTE( "0scn.ic9", 0x00000, 0x080000, CRC(d54e80ec) SHA1(83460cf97b0da8523486ede5bd504710c790b1a6) )
	534	ROM_LOAD32_BYTE( "8scn.ic8", 0x00002, 0x080000, CRC(b3da122d) SHA1(1e4198b2d5ce2144a7ca01f418aca33f799dcad2) )
	535	ROM_LOAD32_BYTE( "16scn.ic12", 0x00001, 0x080000, CRC(dd26932c) SHA1(31bcc4e0195a6d966829976b89e81e6eb7dde8b6) )
	536	ROM_LOAD32_BYTE( "24scn.ic13", 0x00003, 0x080000, CRC(4f560680) SHA1(6398013b8fa5aebc905bf31918e990dd7f5d9490) )
537	537
538	538	ROM_REGION( 0x800000, "gfx2", 0 )
539	539	ROMX_LOAD( "0lobj.ic14", 0x000003, 0x80000, CRC(972d0866) SHA1(7787312ba99d971eee30d50ddff12629e3bdc8b9) , ROM_SKIP(7) )

trunk/src/mame/drivers/famibox.c
r26736	r26737
79	79	required_device<cpu_device> m_maincpu;
80	80	required_device<nesapu_device> m_nesapu;
81	81	required_device<ppu2c0x_device> m_ppu;
82
	82
83	83	UINT8* m_nt_ram;
84	84	UINT8* m_nt_page[4];
85	85

trunk/src/mame/drivers/exidy440.c
r26736	r26737
1698	1698	ROM_LOAD( "wda6.s2", 0x0c000, 0x2000, CRC(23d5c5a9) SHA1(ab8997556b6a9c4a011c367a2035aeba3c752be1) ) // WDL-9_2-S_2764.bin
1699	1699	ROM_LOAD( "wda6.t2", 0x0e000, 0x2000, CRC(a807536d) SHA1(154564c189c7e6f755acda95178db503991ecbaa) ) // WDL-9_2-T_2764.bin
1700	1700	ROM_LOAD( "wda8.l1", 0x12000, 0x2000, CRC(27b856bd) SHA1(f66f6f898d2a7f044b7d331290a7bf32715b5587) ) // WDL-9_1-L_2764.bin
1701		ROM_LOAD( "wda8.m1", 0x14000, 0x2000, CRC(8e15c601) SHA1(924b10523cf8ff802c0907dae96cbc9bae9fe4b0) ) // WDL-9_1-M_2764.bin
	1701	ROM_LOAD( "wda8.m1", 0x14000, 0x2000, CRC(8e15c601) SHA1(924b10523cf8ff802c0907dae96cbc9bae9fe4b0) ) // WDL-9_1-M_2764.bin
1702	1702	ROM_LOAD( "xba1.1n", 0x16000, 0x2000, CRC(2e855698) SHA1(fa4c3ec03fdd1c569c0ca2418899ffa81b5259ec) ) // WDL-9_1-N_2764.bin
1703	1703	ROM_LOAD( "wda6.p1", 0x18000, 0x2000, CRC(3ffaaa22) SHA1(a0848c0f4d799c3b6e9fe8e8f89e7e36754174f6) ) // WDL-9_1-P_2764.bin
1704	1704	ROM_LOAD( "wda6.r1", 0x1a000, 0x2000, CRC(0579a3b8) SHA1(554bced664c12547a766ee6df1278b967714b5ae) ) // WDL-9_1-R_2764.bin

trunk/src/mame/drivers/twinkle.c
r26736	r26737
1086	1086	ROM_LOAD( "a03", 0x000000, 0x000100, BAD_DUMP CRC(8860cfb6) SHA1(85a5b27f24d4baa7960e692b91c0cf3dc5388e72) )
1087	1087
1088	1088	DISK_REGION( "scsi:cdrom" )
1089		DISK_IMAGE_READONLY( "a03jaa01", 0, SHA1(f54fc778c2187ccd950402a159babef956b71492 ) )
	1089	DISK_IMAGE_READONLY( "a03jaa01", 0, SHA1(f54fc778c2187ccd950402a159babef956b71492 ) )
1090	1090
1091	1091	DISK_REGION( "cdrom1" ) // video CD
1092	1092	DISK_IMAGE_READONLY( "a03jaa02", 0, SHA1(d6f01d666e8de285a02215f7ef987073e2b25019) )

trunk/src/mame/drivers/legionna.c
r26736	r26737
1066	1066	MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold)/* VBL */
1067	1067
1068	1068	SEIBU_SOUND_SYSTEM_CPU(14318180/4)
1069
	1069
1070	1070	MCFG_SEIBU_COP_ADD("seibucop")
1071	1071
1072	1072	/* video hardware */
r26736	r26737
1096	1096	MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold)/* VBL */
1097	1097
1098	1098	SEIBU_SOUND_SYSTEM_CPU(14318180/4)
1099
	1099
1100	1100	MCFG_SEIBU_COP_ADD("seibucop")
1101	1101
1102	1102	/* video hardware */
r26736	r26737
1125	1125	MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold)
1126	1126
1127	1127	SEIBU2_SOUND_SYSTEM_CPU(14318180/4)
1128
	1128
1129	1129	MCFG_SEIBU_COP_ADD("seibucop")
1130	1130
1131	1131	/* video hardware */
r26736	r26737
1155	1155	MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold)
1156	1156
1157	1157	SEIBU2_SOUND_SYSTEM_CPU(14318180/4)
1158
	1158
1159	1159	MCFG_SEIBU_COP_ADD("seibucop")
1160	1160
1161	1161	/* video hardware */
r26736	r26737
1184	1184	MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold)
1185	1185
1186	1186	SEIBU2_SOUND_SYSTEM_CPU(14318180/4)
1187
	1187
1188	1188	MCFG_SEIBU_COP_ADD("seibucop")
1189	1189
1190	1190	/* video hardware */
r26736	r26737
1214	1214	MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold)/* VBL */
1215	1215
1216	1216	SEIBU_SOUND_SYSTEM_CPU(14318180/4)
1217
	1217
1218	1218	MCFG_SEIBU_COP_ADD("seibucop")
1219	1219
1220	1220	/* video hardware */
r26736	r26737
1248	1248	MCFG_CPU_VBLANK_INT_DRIVER("screen", legionna_state, irq4_line_hold) /* VBL */
1249	1249
1250	1250	MCFG_SEIBU_COP_ADD("seibucop")
1251
	1251
1252	1252	/Different Sound hardware/
1253	1253	//SEIBU_SOUND_SYSTEM_CPU(14318180/4)
1254	1254	MCFG_CPU_ADD("audiocpu", Z80,14318180/4)

trunk/src/mame/drivers/aristmk4.c
r26736	r26737
170	170	Promoted Fortune Hunter and clone to working status, as they were in fact working for quite a while.
171	171	Fixed ROM names for kgbird/kgbirda; 5c and 10c variants were mixed up.
172	172
173		11/12/13 - Lord-Data
174		Added hopper and meter outputs.
	173	11/12/13 - Lord-Data
	174	Added hopper and meter outputs.
175	175
176	176	****************************************************************************
177	177
r26736	r26737
631	631	printf("Unhandled Mechanical meter %d pulse: %02d\n",i+1, emet[i]);
632	632	break;
633	633	}
634
	634
635	635	m_samples->start(i,0); // pulse sound for mechanical meters
636	636	}
637	637	else
638	638	{
639		// if there is not a value set, this meter is not active, reset output to 0
	639	// if there is not a value set, this meter is not active, reset output to 0
640	640	switch(i+1)
641	641	{
642	642	case 4:
r26736	r26737
649	649	break;
650	650	}
651	651	}
652		}
	652	}
653	653	}
654	654
655	655	/* sound interface for playing mechanical meter sound */
r26736	r26737
715	715	// CBOPT1 - Bit7 - Cash box optics
716	716	/* Coin input... CBOPT2 goes LOW, then the optic detectors OPTA1 / OPTB1 detect the coin passing */
717	717	/* The timer causes one credit, per 150ms or so... */
718
	718
719	719	switch(m_inscrd)
720	720	{
721	721	case 0x00:
r26736	r26737
864	864	if (data==0x01)
865	865	m_hopper_motor=data;
866	866	else if (m_hopper_motor<0x02)
867		m_hopper_motor=data;
	867	m_hopper_motor=data;
868	868
869	869	output_set_value("hopper_motor", m_hopper_motor); // stop motor
870	870	}
r26736	r26737
1016	1016	static INPUT_PORTS_START(aristmk4)
1017	1017
1018	1018	PORT_START("via_port_b")
1019		PORT_DIPNAME( 0x10, 0x00, "1" ) // "COIN FAULT"
	1019	PORT_DIPNAME( 0x10, 0x00, "1" ) // "COIN FAULT"
1020	1020	PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1021	1021	PORT_DIPSETTING( 0x10, DEF_STR( On ) ) PORT_DIPLOCATION("AY:1")
1022		PORT_DIPNAME( 0x20, 0x00, "2" ) // "COIN FAULT"
	1022	PORT_DIPNAME( 0x20, 0x00, "2" ) // "COIN FAULT"
1023	1023	PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1024	1024	PORT_DIPSETTING( 0x20, DEF_STR( On ) ) PORT_DIPLOCATION("AY:2")
1025		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Hopper Coin Release") PORT_CODE(KEYCODE_BACKSLASH) // "ILLEGAL COIN PAID"
1026
	1025	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Hopper Coin Release") PORT_CODE(KEYCODE_BACKSLASH) // "ILLEGAL COIN PAID"
	1026
1027	1027	PORT_DIPNAME( 0x80, 0x00, "CBOPT1" )
1028	1028	PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1029	1029	PORT_DIPSETTING( 0x80, DEF_STR( On ) ) PORT_DIPLOCATION("AY:4")
r26736	r26737
1037	1037	PORT_DIPNAME( 0x04, 0x00, "HOPHI2") // hopper 2 full
1038	1038	PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPLOCATION("5002:3")
1039	1039	PORT_DIPSETTING( 0x04, DEF_STR( On ) )
1040		PORT_DIPNAME( 0x08, 0x00, "DOPTI") // photo optic door DOOR OPEN SENSE SWITCH
	1040	PORT_DIPNAME( 0x08, 0x00, "DOPTI") // photo optic door DOOR OPEN SENSE SWITCH
1041	1041	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1042	1042	PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1043	1043	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) PORT_NAME("Audit Key") PORT_TOGGLE PORT_CODE(KEYCODE_K) // AUDTSW

trunk/src/mame/drivers/mcr3.c
r26736	r26737
536	536
537	537	WRITE8_MEMBER(mcr3_state::spyhuntpr_a800_w)
538	538	{
539
540	539	}
541	540
542	541	WRITE8_MEMBER(mcr3_state::spyhuntpr_a801_w)
543	542	{
544
545	543	}
546	544
547	545	WRITE8_MEMBER(mcr3_state::spyhuntpr_a802_w)
548	546	{
549
550	547	}
551	548
552	549	WRITE8_MEMBER(mcr3_state::spyhuntpr_a803_w)
553	550	{
554
555	551	}
556	552
557	553	WRITE8_MEMBER(mcr3_state::spyhuntpr_a900_w)
558	554	{
559
560	555	}
561	556
562	557	WRITE8_MEMBER(mcr3_state::spyhuntpr_fd00_w)
563	558	{
564
565	559	}
566	560
567	561	static ADDRESS_MAP_START( spyhuntpr_map, AS_PROGRAM, 8, mcr3_state )
r26736	r26737
579	573	AM_RANGE(0xf000, 0xf7ff) AM_RAM //AM_SHARE("nvram")
580	574	AM_RANGE(0xf800, 0xf9ff) AM_RAM AM_SHARE("spriteram")
581	575	AM_RANGE(0xfa00, 0xfa7f) AM_MIRROR(0x0180) AM_RAM AM_WRITE(spyhuntpr_paletteram_w) AM_SHARE("paletteram")
582
	576
583	577	AM_RANGE(0xfc00, 0xfc00) AM_READ_PORT("DSW0")
584	578	AM_RANGE(0xfc01, 0xfc01) AM_READ_PORT("DSW1")
585	579	AM_RANGE(0xfc02, 0xfc02) AM_READ_PORT("IN2")
586	580	AM_RANGE(0xfc03, 0xfc03) AM_READ_PORT("IN3")
587
	581
588	582	AM_RANGE(0xfd00, 0xfd00) AM_WRITE( spyhuntpr_fd00_w )
589	583
590	584	AM_RANGE(0xfe00, 0xffff) AM_RAM // a modified copy of spriteram for this hw??
r26736	r26737
592	586
593	587	WRITE8_MEMBER(mcr3_state::spyhuntpr_port04_w)
594	588	{
595
596	589	}
597	590
598	591	static ADDRESS_MAP_START( spyhuntpr_portmap, AS_IO, 8, mcr3_state )
r26736	r26737
601	594	AM_RANGE(0x04, 0x04) AM_WRITE(spyhuntpr_port04_w)
602	595	AM_RANGE(0x84, 0x86) AM_WRITE(spyhunt_scroll_value_w)
603	596	AM_RANGE(0xe0, 0xe0) AM_WRITENOP // was watchdog
604		// AM_RANGE(0xe8, 0xe8) AM_WRITENOP
	597	// AM_RANGE(0xe8, 0xe8) AM_WRITENOP
605	598	AM_RANGE(0xf0, 0xf3) AM_DEVREADWRITE("ctc", z80ctc_device, read, write)
606	599	ADDRESS_MAP_END
607	600
r26736	r26737
1404	1397	static ADDRESS_MAP_START( spyhuntpr_sound_map, AS_PROGRAM, 8, mcr3_state )
1405	1398	AM_RANGE(0x0000, 0x1fff) AM_ROM
1406	1399	AM_RANGE(0x8000, 0x83ff) AM_RAM
1407		// AM_RANGE(0xfe00, 0xffff) AM_RAM
	1400	// AM_RANGE(0xfe00, 0xffff) AM_RAM
1408	1401	ADDRESS_MAP_END
1409	1402
1410	1403	static ADDRESS_MAP_START( spyhuntpr_sound_portmap, AS_IO, 8, mcr3_state )
r26736	r26737
1437	1430	MCFG_MACHINE_START_OVERRIDE(mcr3_state,mcr)
1438	1431	MCFG_MACHINE_RESET_OVERRIDE(mcr3_state,mcr)
1439	1432
1440		// MCFG_NVRAM_ADD_0FILL("nvram")
	1433	// MCFG_NVRAM_ADD_0FILL("nvram")
1441	1434
1442
	1435
1443	1436	/* video hardware */
1444	1437	MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
1445	1438
r26736	r26737
1461	1454	MCFG_CPU_ADD("audiocpu", Z80, 3000000 )
1462	1455	MCFG_CPU_PROGRAM_MAP(spyhuntpr_sound_map)
1463	1456	MCFG_CPU_IO_MAP(spyhuntpr_sound_portmap)
1464		// MCFG_CPU_PERIODIC_INT_DRIVER(mcr3_state, irq0_line_hold, 4*60)
	1457	// MCFG_CPU_PERIODIC_INT_DRIVER(mcr3_state, irq0_line_hold, 4*60)
1465	1458
1466	1459	MCFG_SPEAKER_STANDARD_MONO("mono")
1467	1460
r26736	r26737
1787	1780	ROM_CONTINUE(0x3002, 0x200)
1788	1781	ROM_CONTINUE(0x3003, 0x200)
1789	1782	ROM_CONTINUE(0x3802, 0x200)
1790		ROM_CONTINUE(0x3803, 0x200)
	1783	ROM_CONTINUE(0x3803, 0x200)
1791	1784	ROM_LOAD32_BYTE( "8.bin", 0x4000, 0x200, CRC(e699b329) SHA1(cb4b8c7b6fa1cb1144a18f1442dc3b267c408914) )
1792	1785	ROM_CONTINUE(0x4001, 0x200)
1793	1786	ROM_CONTINUE(0x4800, 0x200)
r26736	r26737
1819	1812	ROM_CONTINUE(0x7002, 0x200)
1820	1813	ROM_CONTINUE(0x7003, 0x200)
1821	1814	ROM_CONTINUE(0x7802, 0x200)
1822		ROM_CONTINUE(0x7803, 0x200)
	1815	ROM_CONTINUE(0x7803, 0x200)
1823	1816
1824	1817	ROM_REGION( 0x10000, "gfx2", ROMREGION_INVERT )
1825	1818	ROM_LOAD( "10.bin", 0x00000, 0x4000, CRC(6f9fd416) SHA1(a51c86e5b22c91fc44673f53400b58af40b18065) )
r26736	r26737
1994	1987	DRIVER_INIT_MEMBER(mcr3_state,spyhuntpr)
1995	1988	{
1996	1989	mcr_common_init();
1997		// machine().device<midway_ssio_device>("ssio")->set_custom_input(1, 0x60, read8_delegate(FUNC(mcr3_state::spyhunt_ip1_r),this));
1998		// machine().device<midway_ssio_device>("ssio")->set_custom_input(2, 0xff, read8_delegate(FUNC(mcr3_state::spyhunt_ip2_r),this));
1999		// machine().device<midway_ssio_device>("ssio")->set_custom_output(4, 0xff, write8_delegate(FUNC(mcr3_state::spyhunt_op4_w),this));
	1990	// machine().device<midway_ssio_device>("ssio")->set_custom_input(1, 0x60, read8_delegate(FUNC(mcr3_state::spyhunt_ip1_r),this));
	1991	// machine().device<midway_ssio_device>("ssio")->set_custom_input(2, 0xff, read8_delegate(FUNC(mcr3_state::spyhunt_ip2_r),this));
	1992	// machine().device<midway_ssio_device>("ssio")->set_custom_output(4, 0xff, write8_delegate(FUNC(mcr3_state::spyhunt_op4_w),this));
2000	1993
2001	1994	m_spyhunt_sprite_color_mask = 0x00;
2002	1995	m_spyhunt_scroll_offset = 16;

trunk/src/mame/drivers/mw18w.c
r26736	r26737
63	63	// d0-d5: engine sound
64	64	// d6: bell sound
65	65	// d7: backdrop lamp dim control
66
	66
67	67	output_set_lamp_value(80, data >> 7 & 1);
68	68	}
69	69
r26736	r26737
71	71	{
72	72	// d0-3, d7: selected rows
73	73	int rows = (data & 0xf) \| (data >> 3 & 0x10);
74
	74
75	75	// d4-d6: column
76	76	int col = data >> 4 & 7;
77
	77
78	78	// refresh lamp status
79	79	for (int i = 0; i < 5; i++)
80	80	output_set_lamp_value(col * 10 + i, rows >> i & 1);
81	81
82	82	/* lamps info:
83
	83
84	84	00: upper right load zone
85	85	01: lower right load zone
86	86	02: lost cargo
r26736	r26737
128	128	72: extended play
129	129	73: credit
130	130	74: game over
131
	131
132	132	(80: backdrop dim)
133
	133
134	134	*/
135	135	}
136	136

trunk/src/mame/drivers/hng64.c
r26736	r26737
650	650
651	651	switch (offset*4)
652	652	{
653		case 0x000: return 0x00000400;
	653	case 0x000: return 0x00000400;
654	654	case 0x004: return ioport("SYSTEM")->read();
655	655	case 0x008: return ioport("P1_P2")->read();
656	656	case 0x600: return m_no_machine_error_code;
r26736	r26737
921	921	clear3d();
922	922	}
923	923
924		// printf("%02x\n",data);
	924	// printf("%02x\n",data);
925	925
926		// if(data & 1) // swap buffers?
	926	// if(data & 1) // swap buffers?
927	927
928	928	// if(data & 4) // reset buffer count
929	929	}
r26736	r26737
983	983	*/
984	984	READ32_MEMBER(hng64_state::unk_vreg_r)
985	985	{
986		// m_unk_vreg_toggle^=0x8000;
	986	// m_unk_vreg_toggle^=0x8000;
987	987
988	988	return 0;
989	989
990		// return ++m_unk_vreg_toggle;
	990	// return ++m_unk_vreg_toggle;
991	991	}
992	992
993	993	/*** I don't think there is a soundram2, having it NOT hooked up causes xrally to copy the sound program to the expected location, see memory map note ***/
r26736	r26737
1892	1892
1893	1893	switch(scanline)
1894	1894	{
1895		case 224*2: m_set_irq(0x0001); break; // lv 0 vblank irq
1896		// case 0*2: m_set_irq(0x0002); break; // lv 1
1897		// case 32*2: m_set_irq(0x0008); break; // lv 2
1898		// case 64*2: m_set_irq(0x0008); break; // lv 2
1899		case 128*2: m_set_irq(0x0800); break; // lv 11 network irq?
	1895	case 224*2: m_set_irq(0x0001); break; // lv 0 vblank irq
	1896	// case 0*2: m_set_irq(0x0002); break; // lv 1
	1897	// case 32*2: m_set_irq(0x0008); break; // lv 2
	1898	// case 64*2: m_set_irq(0x0008); break; // lv 2
	1899	case 128*2: m_set_irq(0x0800); break; // lv 11 network irq?
1900	1900	}
1901	1901	}
1902	1902
r26736	r26737
1925	1925	m_audiocpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
1926	1926	m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
1927	1927
1928		// m_comm->set_input_line(INPUT_LINE_RESET, PULSE_LINE); // reset the CPU and let 'er rip
	1928	// m_comm->set_input_line(INPUT_LINE_RESET, PULSE_LINE); // reset the CPU and let 'er rip
1929	1929	// m_comm->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); // hold on there pardner...
1930	1930
1931	1931	// "Display List" init - ugly
1932		// m_activeBuffer = 0;
	1932	// m_activeBuffer = 0;
1933	1933
1934	1934	/* For simulate MCU stepping */
1935	1935	m_mcu_fake_time = 0;

trunk/src/mame/drivers/bfm_sc4h.c
r26736	r26737
702	702	void m68307_duart_tx(device_t *device, int channel, UINT8 data)
703	703	{
704	704	if (channel==0)
705		{
	705	{
706	706	logerror("m68307_duart_tx %02x\n",data);
707	707	}
708	708	else

trunk/src/mame/drivers/qdrmfgp.c
r26736	r26737
30	30	#include "includes/qdrmfgp.h"
31	31
32	32
33		#define IDE_HACK 1
	33	#define IDE_HACK 1
34	34
35	35
36	36	/*************************************

trunk/src/mame/drivers/multigam.c
r26736	r26737
119	119	m_maincpu(*this, "maincpu"),
120	120	m_nesapu(*this, "nesapu"),
121	121	m_ppu(*this, "ppu") { }
122
	122
123	123	required_device<cpu_device> m_maincpu;
124	124	required_device<nesapu_device> m_nesapu;
125	125	required_device<ppu2c0x_device> m_ppu;
126
	126
127	127	UINT8* m_nt_ram;
128	128	UINT8* m_vram;
129	129	UINT8* m_nt_page[4];
r26736	r26737
875	875	void multigam_state::multigam_init_mmc1(UINT8 *prg_base, int prg_size, int chr_bank_base)
876	876	{
877	877	UINT8* dst = memregion("maincpu")->base();
878
	878
879	879	memcpy(&dst[0x8000], prg_base + (prg_size - 0x8000), 0x8000);
880	880
881	881	m_maincpu->space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::mmc1_rom_switch_w),this));

trunk/src/mame/drivers/lethal.c
r26736	r26737
561	561	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_er5911_device, ready_read)
562	562	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
563	563	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
564		PORT_DIPNAME( 0x10, 0x10, DEF_STR(Language) ) PORT_DIPLOCATION("DSW:4")
	564	PORT_DIPNAME( 0x10, 0x10, DEF_STR(Language) ) PORT_DIPLOCATION("DSW:4")
565	565	PORT_DIPSETTING( 0x10, DEF_STR(English) )
566	566	PORT_DIPSETTING( 0x00, DEF_STR(Spanish) )
567		PORT_DIPNAME( 0x20, 0x00, "Game Type" ) PORT_DIPLOCATION("DSW:3")
	567	PORT_DIPNAME( 0x20, 0x00, "Game Type" ) PORT_DIPLOCATION("DSW:3")
568	568	PORT_DIPSETTING( 0x20, "Street" )
569	569	PORT_DIPSETTING( 0x00, "Arcade" )
570		PORT_DIPNAME( 0x40, 0x40, "Coin Mechanism" ) PORT_DIPLOCATION("DSW:2")
	570	PORT_DIPNAME( 0x40, 0x40, "Coin Mechanism" ) PORT_DIPLOCATION("DSW:2")
571	571	PORT_DIPSETTING( 0x40, "Common" )
572	572	PORT_DIPSETTING( 0x00, "Independent" )
573		PORT_DIPNAME( 0x80, 0x80, "Sound Output" ) PORT_DIPLOCATION("DSW:1")
	573	PORT_DIPNAME( 0x80, 0x80, "Sound Output" ) PORT_DIPLOCATION("DSW:1")
574	574	PORT_DIPSETTING( 0x00, DEF_STR( Mono ) )
575	575	PORT_DIPSETTING( 0x80, DEF_STR( Stereo ) )
576	576
r26736	r26737
595	595	static INPUT_PORTS_START( lethalenj )
596	596	PORT_INCLUDE( lethalen )
597	597
598		PORT_MODIFY("DSW") /* Normal DIPs appear to do nothing for Japan region - wrong location? Set to unknown */
599		PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "DSW:4")
600		PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "DSW:3")
601		PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "DSW:2")
602		PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "DSW:1")
	598	PORT_MODIFY("DSW") /* Normal DIPs appear to do nothing for Japan region - wrong location? Set to unknown */
	599	PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "DSW:4")
	600	PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "DSW:3")
	601	PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "DSW:2")
	602	PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "DSW:1")
603	603
604		PORT_MODIFY("LIGHT0_X")
	604	PORT_MODIFY("LIGHT0_X")
605	605	PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(25) PORT_KEYDELTA(15) PORT_PLAYER(1) PORT_REVERSE
606	606
607	607	PORT_MODIFY("LIGHT0_Y")
r26736	r26737
618	618	PORT_INCLUDE( lethalen )
619	619
620	620	PORT_MODIFY("DSW")
621		PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "DSW:4")
	621	PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "DSW:4")
622	622	INPUT_PORTS_END
623	623
624	624	static const gfx_layout lethal_6bpp =

trunk/src/mame/drivers/seta.c
r26736	r26737
5802	5802
5803	5803	static INPUT_PORTS_START( thunderlbl )
5804	5804	PORT_INCLUDE(thunderl)
5805
	5805
5806	5806	PORT_MODIFY("DSW")
5807	5807	PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:2")
5808	5808	PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
r26736	r26737
8758	8758
8759	8759	/* the sound hardware / program is ripped from Tetris (S16B) */
8760	8760	MCFG_DEVICE_REMOVE("x1snd")
8761
	8761
8762	8762	MCFG_YM2151_ADD("ymsnd", 16000000/2)
8763	8763	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
8764	8764	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)

trunk/src/mame/drivers/ultrsprt.c
r26736	r26737
1	1	/*
2		Konami Ultra Sports hardware
	2	Konami Ultra Sports hardware
3	3
4		Driver by Ville Linde
	4	Driver by Ville Linde
5	5	*/
6	6
7	7	#include "emu.h"
r26736	r26737
22	22	m_k056800(*this, "k056800"),
23	23	m_workram(*this, "workram") { }
24	24
25		static const UINT32 VRAM_PAGES = 2;
26		static const UINT32 VRAM_PAGE_BYTES = 512 * 1024;
	25	static const UINT32 VRAM_PAGES = 2;
	26	static const UINT32 VRAM_PAGE_BYTES = 512 * 1024;
27	27
28	28	required_device<cpu_device> m_maincpu;
29	29	required_device<cpu_device> m_audiocpu;
r26736	r26737
109	109	if (ACCESSING_BITS_24_31)
110	110	{
111	111	/*
112		.... ...x - EEPROM DI
113		.... ..x. - EEPROM CLK
114		.... .x.. - EEPROM /CS
115		.... x... - VRAM page (CPU access)
116		...x .... - Coin counter
117		..x. .... - Watchdog /Reset
118		.x.. .... - Trackball /Reset
119		x... .... - Sound CPU /Reset
	112	.... ...x - EEPROM DI
	113	.... ..x. - EEPROM CLK
	114	.... .x.. - EEPROM /CS
	115	.... x... - VRAM page (CPU access)
	116	...x .... - Coin counter
	117	..x. .... - Watchdog /Reset
	118	.x.. .... - Trackball /Reset
	119	x... .... - Sound CPU /Reset
120	120	*/
121	121	ioport("EEPROMOUT")->write(data, 0xffffffff);
122	122

trunk/src/mame/drivers/midyunit.c
r26736	r26737
412	412	PORT_DIPSETTING( 0x0058, DEF_STR( 2C_1C )) PORT_CONDITION("DSW", 0xc000, EQUALS, 0xc000)
413	413	PORT_DIPSETTING( 0x0068, "2 Coins/1 Credit 4/3" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0xc000)
414	414	PORT_DIPSETTING( 0x0048, "2 Coins/1 Credit 4/4" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0xc000)
415		PORT_DIPSETTING( 0x0070, "ECA" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0xc000) /* 25 cents; 4 chutes - dollar/quarter/dime/nickel */
	415	PORT_DIPSETTING( 0x0070, "ECA" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0xc000) /* 25 cents; 4 chutes - dollar/quarter/dime/nickel */
416	416	PORT_DIPSETTING( 0x0078, "1DM/1 Credit 6/5" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x4000) /* German coinage; these 4 have 2 chutes (1DM/5DM) */
417	417	PORT_DIPSETTING( 0x0058, "1DM/1 Credit 7/5" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x4000)
418	418	PORT_DIPSETTING( 0x0068, "1DM/1 Credit 8/5" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x4000)
419	419	PORT_DIPSETTING( 0x0048, "1DM/1 Credit" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x4000)
420		PORT_DIPSETTING( 0x0070, "ECA" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x4000) /* 1/1DM 6/5DM; 3 chutes (5DM/2DM/1DM) */
	420	PORT_DIPSETTING( 0x0070, "ECA" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x4000) /* 1/1DM 6/5DM; 3 chutes (5DM/2DM/1DM) */
421	421	PORT_DIPSETTING( 0x0078, "5F/2 Credits 10/5" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x8000) /* French coinage; 2 chutes (5F/10F) */
422	422	PORT_DIPSETTING( 0x0058, "5F/2 Credits" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x8000)
423	423	PORT_DIPSETTING( 0x0068, "5F/1 Credit 10/3" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x8000)
424	424	PORT_DIPSETTING( 0x0048, "5F/1 Credit" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x8000)
425		PORT_DIPSETTING( 0x0070, "ECA" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x8000) /* 1/3F 2/5F 5/10F; 3 chutes (1F/5F/10F) */
	425	PORT_DIPSETTING( 0x0070, "ECA" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x8000) /* 1/3F 2/5F 5/10F; 3 chutes (1F/5F/10F) */
426	426	PORT_DIPSETTING( 0x0040, DEF_STR( Free_Play ))
427	427	PORT_DIPSETTING( 0x0038, "Other (See Service Menu)" )
428	428	PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Players )) PORT_DIPLOCATION("SW1:1")

trunk/src/mame/drivers/arachnid.c
r26736	r26737
1	1	/*
2		Arachnid - English Mark Darts
	2	Arachnid - English Mark Darts
3	3
4		Driver by Jim Stolis.
	4	Driver by Jim Stolis.
5	5
6	6	--- Technical Notes ---
7	7	Name: English Mark Darts
r26736	r26737
9	9	Year: 1987/88/89/90
10	10
11	11	--- Hardware ---
12		A 6809 CPU (U3) is clocked by a 556 (U2) circuit with 3 Pin addressing decoding via a 74LS138 (U14)
13		Program ROM is a 27256 (U15)
14		Two 6821 PIAs (U4/U17) are used for I/O
15		Video is processed via a TMS9118 (U11) with two TMS4416 (U12/U13) as RAM
16		Main RAM is a 2K 6116 (U23) chip
17		Sound is generated via a PTM 6840 (U16) directly to an amplified speaker
	12	A 6809 CPU (U3) is clocked by a 556 (U2) circuit with 3 Pin addressing decoding via a 74LS138 (U14)
	13	Program ROM is a 27256 (U15)
	14	Two 6821 PIAs (U4/U17) are used for I/O
	15	Video is processed via a TMS9118 (U11) with two TMS4416 (U12/U13) as RAM
	16	Main RAM is a 2K 6116 (U23) chip
	17	Sound is generated via a PTM 6840 (U16) directly to an amplified speaker
18	18
19		--- Target Interface Board ---
20		The target interface board is used to combine 33 conductors from the switch matrix
21		into 16 conductors. The middle 13 pin connector is common to all switches.
	19	--- Target Interface Board ---
	20	The target interface board is used to combine 33 conductors from the switch matrix
	21	into 16 conductors. The middle 13 pin connector is common to all switches.
22	22
23		3 connectors and their labels
24		EFBHDACGH NMPLMNJOMIKOP EBACFDCEAHB
	23	3 connectors and their labels
	24	EFBHDACGH NMPLMNJOMIKOP EBACFDCEAHB
25	25
26		Switch Matrix Table
27		Score Single Double Triple
28		1 DN EN FN
29		2 AL BL CL
30		3 AN BN CN
31		4 DL EL FL
32		5 AP BP CP
33		6 GL HL GP
34		7 DO EO FO
35		8 GI HI GM
36		9 AO BO CO
37		10 AI BI CI
38		11 AK BK CK
39		12 DP EP FP
40		13 AM BM CM
41		14 GK HK GO
42		15 GJ HJ GN
43		16 AJ BJ CJ
44		17 DM EM FM
45		18 DI EI FI
46		19 DJ EJ FJ
47		20 DK EK FK
48		Bull -- HM --
	26	Switch Matrix Table
	27	Score Single Double Triple
	28	1 DN EN FN
	29	2 AL BL CL
	30	3 AN BN CN
	31	4 DL EL FL
	32	5 AP BP CP
	33	6 GL HL GP
	34	7 DO EO FO
	35	8 GI HI GM
	36	9 AO BO CO
	37	10 AI BI CI
	38	11 AK BK CK
	39	12 DP EP FP
	40	13 AM BM CM
	41	14 GK HK GO
	42	15 GJ HJ GN
	43	16 AJ BJ CJ
	44	17 DM EM FM
	45	18 DI EI FI
	46	19 DJ EJ FJ
	47	20 DK EK FK
	48	Bull -- HM --
49	49
50	50
51		TODO:
52		- Dip Switches (Controls credits per coin), Currently 2 coins per credit
53		- Test Mode Won't Activate
54		- Layout with Lamps
	51	TODO:
	52	- Dip Switches (Controls credits per coin), Currently 2 coins per credit
	53	- Test Mode Won't Activate
	54	- Layout with Lamps
55	55	*/
56	56
57	57	#include "emu.h"
r26736	r26737
65	65	#define SCREEN_TAG "screen"
66	66	#define M6809_TAG "u3"
67	67	#define TMS9118_TAG "u11"
68		#define PIA6821_U4_TAG "u4"
69		#define PIA6821_U17_TAG "u17"
70		#define PTM6840_TAG "u16"
71		#define SPEAKER_TAG "speaker"
	68	#define PIA6821_U4_TAG "u4"
	69	#define PIA6821_U17_TAG "u17"
	70	#define PTM6840_TAG "u16"
	71	#define SPEAKER_TAG "speaker"
72	72
73	73	class arachnid_state : public driver_device
74	74	{
r26736	r26737
95	95	DECLARE_WRITE8_MEMBER( pia_u4_pb_w );
96	96	DECLARE_WRITE8_MEMBER( pia_u4_pca_w );
97	97	DECLARE_WRITE8_MEMBER( pia_u4_pcb_w );
98
	98
99	99	DECLARE_READ8_MEMBER( pia_u17_pa_r );
100	100	DECLARE_READ8_MEMBER( pia_u17_pca_r );
101		DECLARE_WRITE8_MEMBER( pia_u17_pb_w );
102		DECLARE_WRITE8_MEMBER( pia_u17_pcb_w );
	101	DECLARE_WRITE8_MEMBER( pia_u17_pb_w );
	102	DECLARE_WRITE8_MEMBER( pia_u17_pcb_w );
103	103
104	104	DECLARE_WRITE8_MEMBER(ptm_o1_callback);
105	105
r26736	r26737
421	421
422	422	static const pia6821_interface pia_u4_intf =
423	423	{
424		DEVCB_DRIVER_MEMBER(arachnid_state, pia_u4_pa_r), // input A - From Switch Matrix
	424	DEVCB_DRIVER_MEMBER(arachnid_state, pia_u4_pa_r), // input A - From Switch Matrix
425	425	DEVCB_DRIVER_MEMBER(arachnid_state, pia_u4_pb_r), // input B - From Switch Matrix
426	426	DEVCB_DRIVER_MEMBER(arachnid_state, pia_u4_pca_r), // input CA1 - SW1 Coin In (Coin Door)
427		DEVCB_DRIVER_MEMBER(arachnid_state, pia_u4_pcb_r), // input CB1 - SW2 Test Mode (Coin Door)
	427	DEVCB_DRIVER_MEMBER(arachnid_state, pia_u4_pcb_r), // input CB1 - SW2 Test Mode (Coin Door)
428	428	DEVCB_NULL, // input CA2
429		DEVCB_NULL, // input CB2
430		DEVCB_DRIVER_MEMBER(arachnid_state, pia_u4_pa_w), // output A - To Switch Matrix
431		DEVCB_DRIVER_MEMBER(arachnid_state, pia_u4_pb_w), // output B - To Switch Matrix
	429	DEVCB_NULL, // input CB2
	430	DEVCB_DRIVER_MEMBER(arachnid_state, pia_u4_pa_w), // output A - To Switch Matrix
	431	DEVCB_DRIVER_MEMBER(arachnid_state, pia_u4_pb_w), // output B - To Switch Matrix
432	432	DEVCB_DRIVER_MEMBER(arachnid_state, pia_u4_pca_w), // output CA2 - Remove Darts Lamp
433	433	DEVCB_DRIVER_MEMBER(arachnid_state, pia_u4_pcb_w), // output CB2 - Throw Darts Lamp
434	434	DEVCB_NULL, // irq A
r26736	r26737
437	437
438	438	static const pia6821_interface pia_u17_intf =
439	439	{
440		DEVCB_DRIVER_MEMBER(arachnid_state, pia_u17_pa_r), // input A - Select, Player Change, Coin, Test, DIPSW1
441		DEVCB_NULL, // input B
	440	DEVCB_DRIVER_MEMBER(arachnid_state, pia_u17_pa_r), // input A - Select, Player Change, Coin, Test, DIPSW1
	441	DEVCB_NULL, // input B
442	442	DEVCB_DRIVER_MEMBER(arachnid_state, pia_u17_pca_r), // input CA1 - 1000 Hz Input
443		DEVCB_NULL, // input CB1
	443	DEVCB_NULL, // input CB1
444	444	DEVCB_NULL, // input CA2
445		DEVCB_NULL, // input CB2
446		DEVCB_NULL, // output A
447		DEVCB_DRIVER_MEMBER(arachnid_state, pia_u17_pb_w), // output B - Select Lamp, Player Change Lamp
448		DEVCB_NULL, // output CA2
	445	DEVCB_NULL, // input CB2
	446	DEVCB_NULL, // output A
	447	DEVCB_DRIVER_MEMBER(arachnid_state, pia_u17_pb_w), // output B - Select Lamp, Player Change Lamp
	448	DEVCB_NULL, // output CA2
449	449	DEVCB_DRIVER_MEMBER(arachnid_state, pia_u17_pcb_w), // output CB2 - Target Lamp
450	450	DEVCB_NULL, // irq A
451	451	DEVCB_NULL // irq B
r26736	r26737
461	461
462	462	void arachnid_state::machine_start()
463	463	{
464
465	464	}
466	465
467	466	/***************************************************************************

trunk/src/mame/drivers/1942.c
r26736	r26737
107	107
108	108	WRITE8_MEMBER(_1942_state::c1942p_f600_w)
109	109	{
110		// printf("c1942p_f600_w %02x\n", data);
	110	// printf("c1942p_f600_w %02x\n", data);
111	111	}
112	112
113	113	WRITE8_MEMBER(_1942_state::c1942p_palette_w)
r26736	r26737
124	124	static ADDRESS_MAP_START( c1942p_map, AS_PROGRAM, 8, _1942_state )
125	125	AM_RANGE(0x0000, 0x7fff) AM_ROM
126	126	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
127
	127
128	128	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(c1942_fgvideoram_w) AM_SHARE("fg_videoram")
129	129	AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE(c1942_bgvideoram_w) AM_SHARE("bg_videoram")
130	130
r26736	r26737
146	146	AM_RANGE(0xf701, 0xf701) AM_READ_PORT("SYSTEM")
147	147	AM_RANGE(0xf702, 0xf702) AM_READ_PORT("DSWB")
148	148	AM_RANGE(0xf703, 0xf703) AM_READ_PORT("P1")
149		AM_RANGE(0xf704, 0xf704) AM_READ_PORT("P2")
	149	AM_RANGE(0xf704, 0xf704) AM_READ_PORT("P2")
150	150	ADDRESS_MAP_END
151	151
152	152	static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, _1942_state )

trunk/src/mame/drivers/peplus.c
r26736	r26737
5534	5534
5535	5535	Super Aces shows as just Bonus Poker
5536	5536	Triple Bonus Poker Plus shows as just Triple Bonus
5537
	5537
5538	5538	*/
5539	5539	ROM_REGION( 0x10000, "maincpu", 0 )
5540	5540	ROM_LOAD( "xmp00017.u67", 0x00000, 0x10000, CRC(129e6eaa) SHA1(1dd2b83a672a618f338b553a6cbd598b6d4ce672) )

trunk/src/mame/drivers/ghosteo.c
r26736	r26737
93	93	required_device<i2cmem_device> m_i2cmem;
94	94	required_device<s3c2410_device> m_s3c2410;
95	95	required_shared_ptr<UINT32> m_system_memory;
96
	96
97	97	int m_security_count;
98	98	UINT32 m_bballoon_port[20];
99	99	struct nand_t m_nand;
r26736	r26737
614	614	void ghosteo_state::machine_start()
615	615	{
616	616	m_flash = (UINT8 *)memregion( "user1")->base();
617
	617
618	618	// Set up the QS1000 program ROM banking, taking care not to overlap the internal RAM
619	619	machine().device("qs1000:cpu")->memory().space(AS_IO).install_read_bank(0x0100, 0xffff, "bank");
620	620	membank("qs1000:bank")->configure_entries(0, 8, memregion("qs1000:cpu")->base()+0x100, 0x10000);
r26736	r26737
665	665
666	666	/* sound hardware */
667	667	MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
668
	668
669	669	MCFG_QS1000_ADD("qs1000", XTAL_24MHz, qs1000_intf)
670	670	MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
671	671	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
r26736	r26737
736	736	ROM_LOAD( "flash.u1", 0x000000, 0x2000000, BAD_DUMP CRC(73285634) SHA1(4d0210c1bebdf3113a99978ffbcd77d6ee854168) ) // missing ECC data
737	737
738	738	// banked every 0x10000 bytes ?
739		ROM_REGION( 0x080000, "qs1000:cpu", 0 )
	739	ROM_REGION( 0x080000, "qs1000:cpu", 0 )
740	740	ROM_LOAD( "b2.u20", 0x000000, 0x080000, CRC(0a12334c) SHA1(535b5b34f28435517218100d70147d87809f485a) )
741	741
742		ROM_REGION( 0x1000000, "qs1000", 0 )
	742	ROM_REGION( 0x1000000, "qs1000", 0 )
743	743	ROM_LOAD( "b1.u16", 0x000000, 0x100000, CRC(c42c1c85) SHA1(e1f49d556ffd6bc27142a7784c3bb8e37999857d) ) /* QDSP samples (SFX) */
744	744	ROM_LOAD( "qs1001a.u17", 0x200000, 0x080000, CRC(d13c6407) SHA1(57b14f97c7d4f9b5d9745d3571a0b7115fbe3176) ) /* QDSP wavetable rom */
745	745	ROM_END
r26736	r26737
752	752	ROM_REGION( 0x080000, "qs1000:cpu", 0 )
753	753	ROM_LOAD( "ht.u20", 0x000000, 0x080000, CRC(c0581fce) SHA1(dafce679002534ffabed249a92e6b83301b8312b) )
754	754
755		ROM_REGION( 0x1000000, "qs1000", 0 )
	755	ROM_REGION( 0x1000000, "qs1000", 0 )
756	756	ROM_LOAD( "ht.u16", 0x000000, 0x100000, CRC(6a590a3a) SHA1(c1140f70c919661162334db66c6aa0ad656bfc47) ) /* QDSP samples (SFX) */
757	757	ROM_LOAD( "qs1001a.u17", 0x200000, 0x080000, CRC(d13c6407) SHA1(57b14f97c7d4f9b5d9745d3571a0b7115fbe3176) ) /* QDSP wavetable rom */
758	758	ROM_END
r26736	r26737
766	766	ROM_REGION( 0x080000, "qs1000:cpu", 0 )
767	767	ROM_LOAD( "4m.eeprom_c.s(bad1h).u20", 0x000000, 0x080000, CRC(f81a6530) SHA1(c7fa412102328d06823e73d7d07cadfc25db6d28) )
768	768
769		ROM_REGION( 0x1000000, "qs1000", 0 )
	769	ROM_REGION( 0x1000000, "qs1000", 0 )
770	770	ROM_LOAD( "8m.eprom_c.s(f8b1h).u16", 0x000000, 0x100000, CRC(238a85ab) SHA1(ddd79429c0c1e67fcbca1e4ebded97ea46229f0b) ) /* QDSP samples (SFX) */
771	771	ROM_LOAD( "qs1001a.u17", 0x200000, 0x080000, CRC(d13c6407) SHA1(57b14f97c7d4f9b5d9745d3571a0b7115fbe3176) ) /* QDSP wavetable rom */
772	772	ROM_END

trunk/src/mame/drivers/deco_ld.c
r26736	r26737
640	640	ROM_REGION( 0x40000, "misc", 0 )
641	641	ROM_LOAD( "lp4-1.pal16l8cn.bin", 0x0000, 0x40000, CRC(4aeb2c7e) SHA1(3c962656cffc8d927047c64a15afccab767d776f) ) // dumped with cgfm's tool
642	642	ROM_LOAD( "lp4-1.pal16l8cn.pld", 0x0000, 0x00f71, CRC(ac1f1177) SHA1(ab721a840207354916c96e0ae83220fed12c6352) )
643		// ROM_LOAD( "lp4-2-pal10l8.d6.jed", 0x0000, 0x00249, CRC(309b3ce5) SHA1(04f185911d33730004c7cd44a693dd1b69b82032) )
	643	// ROM_LOAD( "lp4-2-pal10l8.d6.jed", 0x0000, 0x00249, CRC(309b3ce5) SHA1(04f185911d33730004c7cd44a693dd1b69b82032) )
644	644	ROM_LOAD( "lp4-2-pal10l8.d6.bin", 0x0000, 0x0002c, CRC(e594fd13) SHA1(4bb8a9b7cf8f8eaa3c9f290b6e5085a10c927e20) )
645	645
646	646	ROM_REGION( 0x20, "proms", 0 )

trunk/src/mame/drivers/acefruit.c
r26736	r26737
44	44	UINT32 screen_update_acefruit(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
45	45	INTERRUPT_GEN_MEMBER(acefruit_vblank);
46	46	void acefruit_update_irq(int vpos);
47
	47
48	48	enum
49	49	{
50	50	TIMER_ACEFRUIT_REFRESH
51	51	};
52	52
53	53	protected:
54		virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
	54	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
55	55	};
56	56
57	57
r26736	r26737
83	83	switch(id)
84	84	{
85	85	case TIMER_ACEFRUIT_REFRESH:
86
	86
87	87	m_screen->update_partial(vpos );
88	88	acefruit_update_irq(vpos);
89	89

trunk/src/mame/drivers/hornet.c
r26736	r26737
393	393	DECLARE_WRITE_LINE_MEMBER(voodoo_vblank_1);
394	394	DECLARE_WRITE16_MEMBER(soundtimer_en_w);
395	395	DECLARE_WRITE16_MEMBER(soundtimer_count_w);
396
	396
397	397	DECLARE_DRIVER_INIT(hornet);
398	398	DECLARE_DRIVER_INIT(hornet_2board);
399	399	virtual void machine_start();

trunk/src/mame/drivers/naomi.c
r26736	r26737
3955	3955	ROM_LOAD16_WORD("main_eeprom.bin", 0x0000, 0x0080, CRC(fea29cbb) SHA1(4099f1747aafa07db34f6e072cd9bfaa83bae10e) )
3956	3956
3957	3957	ROM_REGION( 0x4000000, "rom_board", ROMREGION_ERASEFF)
3958		ROM_LOAD( "epr-22073.ic22", 0x0000000, 0x200000, CRC(dbeee93c) SHA1(95a761aa07b231f36e1656f46d3a711a4eea0210) )
3959		ROM_LOAD( "mpr-22074.ic1", 0x0800000, 0x800000, CRC(fd6070a4) SHA1(8fb01c39e5deb002401b971aa415f7d7e220134d) )
3960		ROM_LOAD( "mpr-22075.ic2", 0x1000000, 0x800000, CRC(4c11d298) SHA1(d4edfd2a2c81dd45356ee53de27a86e04a13011b) )
3961		ROM_LOAD( "mpr-22076.ic3", 0x1800000, 0x800000, CRC(e4c98898) SHA1(c13c842874a9266a7bd5856f298687e0f8c07fc1) )
3962		ROM_LOAD( "mpr-22077.ic4", 0x2000000, 0x400000, CRC(f33d7620) SHA1(82c3e2bb6feed68670798efa3e17c9f6d6d0070a) )
	3958	ROM_LOAD( "epr-22073.ic22", 0x0000000, 0x200000, CRC(dbeee93c) SHA1(95a761aa07b231f36e1656f46d3a711a4eea0210) )
	3959	ROM_LOAD( "mpr-22074.ic1", 0x0800000, 0x800000, CRC(fd6070a4) SHA1(8fb01c39e5deb002401b971aa415f7d7e220134d) )
	3960	ROM_LOAD( "mpr-22075.ic2", 0x1000000, 0x800000, CRC(4c11d298) SHA1(d4edfd2a2c81dd45356ee53de27a86e04a13011b) )
	3961	ROM_LOAD( "mpr-22076.ic3", 0x1800000, 0x800000, CRC(e4c98898) SHA1(c13c842874a9266a7bd5856f298687e0f8c07fc1) )
	3962	ROM_LOAD( "mpr-22077.ic4", 0x2000000, 0x400000, CRC(f33d7620) SHA1(82c3e2bb6feed68670798efa3e17c9f6d6d0070a) )
3963	3963
3964	3964	// on-cart X76F100 eeprom contents
3965	3965	ROM_REGION( 0x84, "naomibd_eeprom", 0 )
3966		ROM_LOAD( "x76f100.ic37", 0x000000, 0x000084, CRC(c79251d5) SHA1(3e70bbbb6d28bade7eec7e27d716463045656f98) )
	3966	ROM_LOAD( "x76f100.ic37", 0x000000, 0x000084, CRC(c79251d5) SHA1(3e70bbbb6d28bade7eec7e27d716463045656f98) )
3967	3967
3968	3968	ROM_REGION( 4, "rom_key", 0 )
3969		ROM_LOAD( "tduno.key", 0x000000, 0x000004, CRC(217ce9d0) SHA1(39d71a84b2769cd0c1521ddf1c617c18f577020c) )
	3969	ROM_LOAD( "tduno.key", 0x000000, 0x000004, CRC(217ce9d0) SHA1(39d71a84b2769cd0c1521ddf1c617c18f577020c) )
3970	3970	ROM_END
3971	3971
3972	3972	ROM_START( tduno2 )
r26736	r26737
5645	5645	NAOMI_DEFAULT_EEPROM
5646	5646
5647	5647	ROM_REGION( 0xb000000, "rom_board", ROMREGION_ERASEFF)
5648		ROM_LOAD( "wk3vera_fl1.2d", 0x0400000, 0x800000, CRC(cfdd5c5d) SHA1(ffc5d38edb600462574d4ed8ce5ada8625d59c74) )
5649		ROM_LOAD( "wk3vera_fl2.2c", 0x0c00000, 0x800000, CRC(ad2577d5) SHA1(f7b6bab001c5f5cf0b33a70cd0dfdca8f7d25921) )
	5648	ROM_LOAD( "wk3vera_fl1.2d", 0x0400000, 0x800000, CRC(cfdd5c5d) SHA1(ffc5d38edb600462574d4ed8ce5ada8625d59c74) )
	5649	ROM_LOAD( "wk3vera_fl2.2c", 0x0c00000, 0x800000, CRC(ad2577d5) SHA1(f7b6bab001c5f5cf0b33a70cd0dfdca8f7d25921) )
5650	5650	ROM_LOAD( "wk1ma2.4m", 0x1000000, 0x1000000, CRC(650590ec) SHA1(bb9d5d5df2321df24ee0fb9e8bf2757d5277f8ea) )
5651	5651	ROM_RELOAD( 0x800000, 0x400000)
5652	5652	ROM_LOAD( "wk1ma3.4l", 0x2000000, 0x1000000, CRC(3b340dc0) SHA1(2412e41d5bd74d1233fb91f8ce2276a318bfc53d) )

trunk/src/mame/drivers/galaxold.c
r26736	r26737
934	934
935	935	static ADDRESS_MAP_START( racknrol_io, AS_IO, 8, galaxold_state )
936	936	AM_RANGE(0x1d, 0x1d) AM_DEVWRITE("snsnd", sn76489a_device, write)
937		// AM_RANGE(0x1e, 0x1e) AM_WRITENOP
938		// AM_RANGE(0x1f, 0x1f) AM_WRITENOP
	937	// AM_RANGE(0x1e, 0x1e) AM_WRITENOP
	938	// AM_RANGE(0x1f, 0x1f) AM_WRITENOP
939	939	AM_RANGE(0x20, 0x3f) AM_WRITE(racknrol_tiles_bank_w) AM_SHARE("racknrol_tbank")
940	940	AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
941	941	ADDRESS_MAP_END

trunk/src/mame/drivers/atarig42.c
r26736	r26737
569	569
570	570	static MACHINE_CONFIG_DERIVED( atarig42_0x200, atarig42 )
571	571	MCFG_ATARIRLE_ADD("rle", modesc_0x200)
572
	572
573	573	/* ASIC65 */
574	574	MCFG_ASIC65_ADD("asic65", ASIC65_ROMBASED)
575	575	MACHINE_CONFIG_END
576	576
577	577	static MACHINE_CONFIG_DERIVED( atarig42_0x400, atarig42 )
578	578	MCFG_ATARIRLE_ADD("rle", modesc_0x400)
579
	579
580	580	/* ASIC65 */
581	581	MCFG_ASIC65_ADD("asic65", ASIC65_GUARDIANS)
582	582	MACHINE_CONFIG_END
r26736	r26737
783	783	main.set_direct_update_handler(direct_update_delegate(FUNC(atarig42_state::atarig42_sloop_direct_handler), this));
784	784
785	785	/*
786		Road Riot color MUX
	786	Road Riot color MUX
787	787
788		CRA10=!MGEP!AN.VID7AN.0 -- if (mopri < pfpri) && (!alpha)
789		+!AN.VID7AN.0MO.0 or if (mopix == 0) && (!alpha)
	788	CRA10=!MGEP!AN.VID7AN.0 -- if (mopri < pfpri) && (!alpha)
	789	+!AN.VID7AN.0MO.0 or if (mopix == 0) && (!alpha)
790	790
791		CRA9=MGEP!AN.VID7AN.0*!MO.0 -- if (mopri >= pfpri) && (mopix != 0) && (!alpha)
792		+!AN.VID7AN.0PF.VID9 or if (pfpix & 0x200) && (!alpha)
	791	CRA9=MGEP!AN.VID7AN.0*!MO.0 -- if (mopri >= pfpri) && (mopix != 0) && (!alpha)
	792	+!AN.VID7AN.0PF.VID9 or if (pfpix & 0x200) && (!alpha)
793	793
794		CRA8=MGEP!AN.VID7AN.0!MO.0MVID8 -- if (mopri >= pfpri) && (mopix != 0) && (mopix & 0x100) && (!alpha)
795		+!MGEP!AN.VID7AN.0*PF.VID8 or if (mopri < pfpri) && (pfpix & 0x100) && (!alpha)
796		+!AN.VID7AN.0MO.0*PF.VID8 or if (pfpix & 0x100) && (!alpha)
	794	CRA8=MGEP!AN.VID7AN.0!MO.0MVID8 -- if (mopri >= pfpri) && (mopix != 0) && (mopix & 0x100) && (!alpha)
	795	+!MGEP!AN.VID7AN.0*PF.VID8 or if (mopri < pfpri) && (pfpix & 0x100) && (!alpha)
	796	+!AN.VID7AN.0MO.0*PF.VID8 or if (pfpix & 0x100) && (!alpha)
797	797
798		CRMUXB=!AN.VID7*AN.0 -- if (!alpha)
	798	CRMUXB=!AN.VID7*AN.0 -- if (!alpha)
799	799
800		CRMUXA=!MGEP -- if (mopri < pfpri)
801		+MO.0 or (mopix == 0)
802		+AN.VID7 or (alpha)
803		+!AN.0
	800	CRMUXA=!MGEP -- if (mopri < pfpri)
	801	+MO.0 or (mopix == 0)
	802	+AN.VID7 or (alpha)
	803	+!AN.0
804	804	*/
805	805	}
806	806
r26736	r26737
818	818	main.set_direct_update_handler(direct_update_delegate(FUNC(atarig42_state::atarig42_sloop_direct_handler), this));
819	819
820	820	/*
821		Guardians color MUX
	821	Guardians color MUX
822	822
823		CRA10=MGEP!AN.VID7AN.0*!MO.0 -- if (mopri >= pfpri) && (!alpha) && (mopix != 0)
	823	CRA10=MGEP!AN.VID7AN.0*!MO.0 -- if (mopri >= pfpri) && (!alpha) && (mopix != 0)
824	824
825		CRA9=MGEP!AN.VID7AN.0!MO.0MVID9 -- if (mopri >= pfpri) && (!alpha) && (mopix != 0) && (mopix & 0x200)
826		+!MGEP!AN.VID7AN.0*PF.VID9 or if (mopri < pfpri) && (!alpha) && (pfpix & 0x200)
827		+!AN.VID7AN.0MO.0*PF.VID9 or if (mopix == 0) && (!alpha) && (pfpix & 0x200)
	825	CRA9=MGEP!AN.VID7AN.0!MO.0MVID9 -- if (mopri >= pfpri) && (!alpha) && (mopix != 0) && (mopix & 0x200)
	826	+!MGEP!AN.VID7AN.0*PF.VID9 or if (mopri < pfpri) && (!alpha) && (pfpix & 0x200)
	827	+!AN.VID7AN.0MO.0*PF.VID9 or if (mopix == 0) && (!alpha) && (pfpix & 0x200)
828	828
829		CRA8=MGEP!AN.VID7AN.0!MO.0MVID8 -- if (mopri >= pfpri) && (!alpha) && (mopix != 0) && (mopix & 0x100)
830		+!MGEP!AN.VID7AN.0*PF.VID8 or if (mopri < pfpri) && (!alpha) && (pfpix & 0x100)
831		+!AN.VID7AN.0MO.0*PF.VID8 or if (mopix == 0) && (!alpha) && (pfpix & 0x100)
	829	CRA8=MGEP!AN.VID7AN.0!MO.0MVID8 -- if (mopri >= pfpri) && (!alpha) && (mopix != 0) && (mopix & 0x100)
	830	+!MGEP!AN.VID7AN.0*PF.VID8 or if (mopri < pfpri) && (!alpha) && (pfpix & 0x100)
	831	+!AN.VID7AN.0MO.0*PF.VID8 or if (mopix == 0) && (!alpha) && (pfpix & 0x100)
832	832
833		CRMUXB=!AN.VID7*AN.0 -- if (!alpha)
	833	CRMUXB=!AN.VID7*AN.0 -- if (!alpha)
834	834
835		CRMUXA=!MGEP -- if (mopri < pfpri)
836		+MO.0 or (mopix == 0)
837		+AN.VID7 or (alpha)
838		+!AN.0
	835	CRMUXA=!MGEP -- if (mopri < pfpri)
	836	+MO.0 or (mopix == 0)
	837	+AN.VID7 or (alpha)
	838	+!AN.0
839	839	*/
840	840	}
841	841

trunk/src/mame/drivers/plygonet.c
r26736	r26737
546	546	{
547	547	// .... .xxx - Sound bank
548	548	// ...x .... - NMI clear (clocked?)
549
	549
550	550	if ((m_sound_ctrl & 7) != (data & 7))
551	551	membank("bank1")->set_entry(data & 7);
552	552

trunk/src/mame/drivers/pong.c
r26736	r26737
148	148
149	149	// ----------------------------------------------------------------------------------------
150	150	// horizontal counter
151		// ----------------------------------------------------------------------------------------
	151	// ----------------------------------------------------------------------------------------
152	152	TTL_7493(ic_f8, clk, ic_f8.QA, ic_e7b.QQ, ic_e7b.QQ) // f8, f9, f6b
153	153	TTL_7493(ic_f9, ic_f8.QD, ic_f9.QA, ic_e7b.QQ, ic_e7b.QQ) // f8, f9, f6b
154	154	TTL_74107(ic_f6b, ic_f9.QD, high, high, ic_e7b.Q)
r26736	r26737
166	166	NET_ALIAS(256H, ic_f6b.Q)
167	167	NET_ALIAS(256HQ, ic_f6b.QQ)
168	168
169		// ----------------------------------------------------------------------------------------
	169	// ----------------------------------------------------------------------------------------
170	170	// vertical counter
171		// ----------------------------------------------------------------------------------------
	171	// ----------------------------------------------------------------------------------------
172	172	TTL_7493(ic_e8, hreset, ic_e8.QA, ic_e7a.QQ, ic_e7a.QQ) // e8, e9, d9b
173	173	TTL_7493(ic_e9, ic_e8.QD,ic_e9.QA, ic_e7a.QQ, ic_e7a.QQ) // e8, e9, d9b
174	174	TTL_74107(ic_d9b, ic_e9.QD, high, high, ic_e7a.Q)
r26736	r26737
186	186	NET_ALIAS(256VQ, ic_d9b.QQ)
187	187
188	188
189		// ----------------------------------------------------------------------------------------
	189	// ----------------------------------------------------------------------------------------
190	190	// hblank flip flop
191		// ----------------------------------------------------------------------------------------
	191	// ----------------------------------------------------------------------------------------
192	192
193	193	TTL_7400_NAND(ic_g5b, 16H, 64H)
194	194
r26736	r26737
200	200	NET_ALIAS(hblankQ, ic_h5b.Q)
201	201	TTL_7400_NAND(hsyncQ, hblank, 32H)
202	202
203		// ----------------------------------------------------------------------------------------
	203	// ----------------------------------------------------------------------------------------
204	204	// vblank flip flop
205		// ----------------------------------------------------------------------------------------
	205	// ----------------------------------------------------------------------------------------
206	206	TTL_7402_NOR(ic_f5c, ic_f5d.Q, vreset)
207	207	TTL_7402_NOR(ic_f5d, ic_f5c.Q, 16V)
208	208
r26736	r26737
213	213	TTL_7410_NAND(ic_g5a, vblank, 4V, ic_h5a.Q)
214	214	NET_ALIAS(vsyncQ, ic_g5a.Q)
215	215
216		// ----------------------------------------------------------------------------------------
	216	// ----------------------------------------------------------------------------------------
217	217	// move logic
218		// ----------------------------------------------------------------------------------------
	218	// ----------------------------------------------------------------------------------------
219	219
220	220	TTL_7400_NAND(ic_e1d, hit_sound, ic_e1c.Q)
221	221	TTL_7400_NAND(ic_e1c, ic_f1.QC, ic_f1.QD)
r26736	r26737
245	245	NET_ALIAS(Aa, ic_h4c.Q)
246	246	NET_ALIAS(Ba, ic_h4b.Q)
247	247
248		// ----------------------------------------------------------------------------------------
	248	// ----------------------------------------------------------------------------------------
249	249	// hvid circuit
250		// ----------------------------------------------------------------------------------------
	250	// ----------------------------------------------------------------------------------------
251	251
252	252	TTL_7400_NAND(hball_resetQ, Serve, attractQ)
253	253
r26736	r26737
258	258	TTL_7420_NAND(ic_h6b, ic_g6b.Q, ic_h7.RC, ic_g7.QC, ic_g7.QD)
259	259	NET_ALIAS(hvidQ, ic_h6b.Q)
260	260
261		// ----------------------------------------------------------------------------------------
	261	// ----------------------------------------------------------------------------------------
262	262	// vvid circuit
263		// ----------------------------------------------------------------------------------------
	263	// ----------------------------------------------------------------------------------------
264	264
265	265	TTL_9316(ic_b3, hsyncQ, high, vblankQ, high, ic_b2b.Q, a6, b6, c6, d6)
266	266	TTL_9316(ic_a3, hsyncQ, ic_b3.RC, high, high, ic_b2b.Q, low, low, low, low)
r26736	r26737
272	272	NET_ALIAS(vpos32, ic_a3.QB)
273	273	NET_ALIAS(vpos16, ic_a3.QA)
274	274
275		// ----------------------------------------------------------------------------------------
	275	// ----------------------------------------------------------------------------------------
276	276	// vball ctrl circuit
277		// ----------------------------------------------------------------------------------------
	277	// ----------------------------------------------------------------------------------------
278	278
279	279	TTL_7450_ANDORINVERT(ic_a6a, b1, 256HQ, b2, 256H)
280	280	TTL_7450_ANDORINVERT(ic_a6b, c1, 256HQ, c2, 256H)
r26736	r26737
298	298	NET_ALIAS(c6, ic_b4.SC)
299	299	NET_ALIAS(d6, ic_b4.SD)
300	300
301		// ----------------------------------------------------------------------------------------
	301	// ----------------------------------------------------------------------------------------
302	302	// serve monoflop
303		// ----------------------------------------------------------------------------------------
	303	// ----------------------------------------------------------------------------------------
304	304
305	305	TTL_7404_INVERT(f4_trig, rstspeed)
306	306
307	307	NETDEV_R(ic_f4_serve_R, RES_K(330))
308		NETDEV_C(ic_f4_serve_C, CAP_U(4.7))
309		NETDEV_NE555(ic_f4_serve)
	308	NETDEV_C(ic_f4_serve_C, CAP_U(4.7))
	309	NETDEV_NE555(ic_f4_serve)
310	310
311		NET_C(ic_f4_serve.VCC, V5)
312		NET_C(ic_f4_serve.GND, GND)
313		NET_C(ic_f4_serve.RESET, V5)
314		NET_C(ic_f4_serve_R.1, V5)
315		NET_C(ic_f4_serve_R.2, ic_f4_serve.THRESH)
316		NET_C(ic_f4_serve_R.2, ic_f4_serve.DISCH)
317		NET_C(f4_trig, ic_f4_serve.TRIG)
318		NET_C(ic_f4_serve_R.2, ic_f4_serve_C.1)
319		NET_C(GND, ic_f4_serve_C.2)
	311	NET_C(ic_f4_serve.VCC, V5)
	312	NET_C(ic_f4_serve.GND, GND)
	313	NET_C(ic_f4_serve.RESET, V5)
	314	NET_C(ic_f4_serve_R.1, V5)
	315	NET_C(ic_f4_serve_R.2, ic_f4_serve.THRESH)
	316	NET_C(ic_f4_serve_R.2, ic_f4_serve.DISCH)
	317	NET_C(f4_trig, ic_f4_serve.TRIG)
	318	NET_C(ic_f4_serve_R.2, ic_f4_serve_C.1)
	319	NET_C(GND, ic_f4_serve_C.2)
320	320
321		TTL_7427_NOR(ic_e5a, ic_f4_serve.OUT, StopG, runQ)
	321	TTL_7427_NOR(ic_e5a, ic_f4_serve.OUT, StopG, runQ)
322	322	TTL_7474(ic_b5b_serve, pad1, ic_e5a, ic_e5a, high)
323	323
324	324	NET_ALIAS(Serve, ic_b5b_serve.QQ)
325	325	NET_ALIAS(ServeQ, ic_b5b_serve.Q)
326	326
327		// ----------------------------------------------------------------------------------------
	327	// ----------------------------------------------------------------------------------------
328	328	// score logic
329		// ----------------------------------------------------------------------------------------
	329	// ----------------------------------------------------------------------------------------
330	330
331	331	TTL_7474(ic_h3a, 4H, 128H, high, attractQ)
332	332
333		// ----------------------------------------------------------------------------------------
	333	// ----------------------------------------------------------------------------------------
334	334	// sound logic
335		// ----------------------------------------------------------------------------------------
	335	// ----------------------------------------------------------------------------------------
336	336	TTL_7474(ic_c2a, vpos256, high, hitQ, high)
337	337	TTL_74107(ic_f3_topbot, vblank, vvid, vvidQ, ServeQ)
338	338
339		// ----------------------------------------------------------------------------------------
	339	// ----------------------------------------------------------------------------------------
340	340	// monoflop with NE555 determines duration of score sound
341		// ----------------------------------------------------------------------------------------
	341	// ----------------------------------------------------------------------------------------
342	342
343	343	NETDEV_R(ic_g4_R, RES_K(220))
344		NETDEV_C(ic_g4_C, CAP_U(1))
345		NETDEV_NE555(ic_g4_sc)
346		NET_ALIAS(SC, ic_g4_sc.OUT)
	344	NETDEV_C(ic_g4_C, CAP_U(1))
	345	NETDEV_NE555(ic_g4_sc)
	346	NET_ALIAS(SC, ic_g4_sc.OUT)
347	347
348		NET_C(ic_g4_sc.VCC, V5)
349		NET_C(ic_g4_sc.GND, GND)
350		NET_C(ic_g4_sc.RESET, V5)
351		NET_C(ic_g4_R.1, V5)
352		NET_C(ic_g4_R.2, ic_g4_sc.THRESH)
353		NET_C(ic_g4_R.2, ic_g4_sc.DISCH)
354		NET_C(MissQ, ic_g4_sc.TRIG)
355		NET_C(ic_g4_R.2, ic_g4_C.1)
356		NET_C(GND, ic_g4_C.2)
	348	NET_C(ic_g4_sc.VCC, V5)
	349	NET_C(ic_g4_sc.GND, GND)
	350	NET_C(ic_g4_sc.RESET, V5)
	351	NET_C(ic_g4_R.1, V5)
	352	NET_C(ic_g4_R.2, ic_g4_sc.THRESH)
	353	NET_C(ic_g4_R.2, ic_g4_sc.DISCH)
	354	NET_C(MissQ, ic_g4_sc.TRIG)
	355	NET_C(ic_g4_R.2, ic_g4_C.1)
	356	NET_C(GND, ic_g4_C.2)
357	357
358		NET_ALIAS(hit_sound_en, ic_c2a.QQ)
	358	NET_ALIAS(hit_sound_en, ic_c2a.QQ)
359	359	TTL_7400_NAND(hit_sound, hit_sound_en, vpos16)
360	360	TTL_7400_NAND(score_sound, SC, vpos32)
361	361	TTL_7400_NAND(topbothitsound, ic_f3_topbot.Q, vpos32)
r26736	r26737
365	365	NET_ALIAS(sound, ic_c1b.Q)
366	366
367	367
368		// ----------------------------------------------------------------------------------------
	368	// ----------------------------------------------------------------------------------------
369	369	// paddle1 logic 1
370		// ----------------------------------------------------------------------------------------
	370	// ----------------------------------------------------------------------------------------
371	371
372		NETDEV_POT(ic_b9_POT, RES_K(1)) // This is a guess!!
373		NETDEV_R(ic_b9_RPRE, 470)
	372	NETDEV_POT(ic_b9_POT, RES_K(1)) // This is a guess!!
	373	NETDEV_R(ic_b9_RPRE, 470)
374	374
375		NET_C(ic_b9_POT.1, V5)
376		NET_C(ic_b9_POT.3, GND)
377		NET_C(ic_b9_POT.2, ic_b9_RPRE.1)
378		NET_C(ic_b9_RPRE.2, ic_b9.CONT)
	375	NET_C(ic_b9_POT.1, V5)
	376	NET_C(ic_b9_POT.3, GND)
	377	NET_C(ic_b9_POT.2, ic_b9_RPRE.1)
	378	NET_C(ic_b9_RPRE.2, ic_b9.CONT)
379	379
380		NETDEV_R(ic_b9_R, RES_K(71))
381		NETDEV_C(ic_b9_C, CAP_U(.1))
382		NETDEV_D(ic_b9_D, 1N914)
383		NETDEV_NE555(ic_b9)
	380	NETDEV_R(ic_b9_R, RES_K(71))
	381	NETDEV_C(ic_b9_C, CAP_U(.1))
	382	NETDEV_D(ic_b9_D, 1N914)
	383	NETDEV_NE555(ic_b9)
384	384
385		NET_C(ic_b9.VCC, V5)
386		NET_C(ic_b9.GND, GND)
387		NET_C(ic_b9.RESET, V5)
388		NET_C(ic_b9_R.1, V5)
389		NET_C(ic_b9_R.2, ic_b9.THRESH)
390		NET_C(ic_b9_R.2, ic_b9_D.A)
391		NET_C(ic_b9_D.K, ic_b9.DISCH)
392		NET_C(256VQ, ic_b9.TRIG)
393		NET_C(ic_b9_R.2, ic_b9_C.1)
394		NET_C(GND, ic_b9_C.2)
	385	NET_C(ic_b9.VCC, V5)
	386	NET_C(ic_b9.GND, GND)
	387	NET_C(ic_b9.RESET, V5)
	388	NET_C(ic_b9_R.1, V5)
	389	NET_C(ic_b9_R.2, ic_b9.THRESH)
	390	NET_C(ic_b9_R.2, ic_b9_D.A)
	391	NET_C(ic_b9_D.K, ic_b9.DISCH)
	392	NET_C(256VQ, ic_b9.TRIG)
	393	NET_C(ic_b9_R.2, ic_b9_C.1)
	394	NET_C(GND, ic_b9_C.2)
395	395
396	396	TTL_7404_INVERT(ic_c9b, ic_b9.OUT)
397	397	TTL_7400_NAND(ic_b7b, ic_a7b.Q, hsyncQ)
r26736	r26737
404	404	NET_ALIAS(c1, ic_b8.QC)
405	405	NET_ALIAS(d1, ic_b8.QD)
406	406
407		// ----------------------------------------------------------------------------------------
	407	// ----------------------------------------------------------------------------------------
408	408	// paddle1 logic 2
409		// ----------------------------------------------------------------------------------------
	409	// ----------------------------------------------------------------------------------------
410	410
411	411	NETDEV_POT(ic_a9_POT, RES_K(1)) // This is a guess!!
412		NETDEV_R(ic_a9_RPRE, 470)
	412	NETDEV_R(ic_a9_RPRE, 470)
413	413
414		NET_C(ic_a9_POT.1, V5)
415		NET_C(ic_a9_POT.3, GND)
416		NET_C(ic_a9_POT.2, ic_a9_RPRE.1)
417		NET_C(ic_a9_RPRE.2, ic_a9.CONT)
	414	NET_C(ic_a9_POT.1, V5)
	415	NET_C(ic_a9_POT.3, GND)
	416	NET_C(ic_a9_POT.2, ic_a9_RPRE.1)
	417	NET_C(ic_a9_RPRE.2, ic_a9.CONT)
418	418
419		NETDEV_R(ic_a9_R, RES_K(71))
420		NETDEV_C(ic_a9_C, CAP_U(.1))
421		NETDEV_D(ic_a9_D, 1N914)
422		NETDEV_NE555(ic_a9)
	419	NETDEV_R(ic_a9_R, RES_K(71))
	420	NETDEV_C(ic_a9_C, CAP_U(.1))
	421	NETDEV_D(ic_a9_D, 1N914)
	422	NETDEV_NE555(ic_a9)
423	423
424		NET_C(ic_a9.VCC, V5)
425		NET_C(ic_a9.GND, GND)
426		NET_C(ic_a9.RESET, V5)
427		NET_C(ic_a9_R.1, V5)
428		NET_C(ic_a9_R.2, ic_a9.THRESH)
429		NET_C(ic_a9_R.2, ic_a9_D.A)
430		NET_C(ic_a9_D.K, ic_a9.DISCH)
431		NET_C(256VQ, ic_a9.TRIG)
432		NET_C(ic_a9_R.2, ic_a9_C.1)
433		NET_C(GND, ic_a9_C.2)
	424	NET_C(ic_a9.VCC, V5)
	425	NET_C(ic_a9.GND, GND)
	426	NET_C(ic_a9.RESET, V5)
	427	NET_C(ic_a9_R.1, V5)
	428	NET_C(ic_a9_R.2, ic_a9.THRESH)
	429	NET_C(ic_a9_R.2, ic_a9_D.A)
	430	NET_C(ic_a9_D.K, ic_a9.DISCH)
	431	NET_C(256VQ, ic_a9.TRIG)
	432	NET_C(ic_a9_R.2, ic_a9_C.1)
	433	NET_C(GND, ic_a9_C.2)
434	434
435	435	TTL_7404_INVERT(ic_c9a, ic_a9.OUT)
436	436	TTL_7400_NAND(ic_b7c, ic_a7a.Q, hsyncQ)
r26736	r26737
443	443	NET_ALIAS(c2, ic_a8.QC)
444	444	NET_ALIAS(d2, ic_a8.QD)
445	445
446		// ----------------------------------------------------------------------------------------
	446	// ----------------------------------------------------------------------------------------
447	447	// C5-EN Logic
448		// ----------------------------------------------------------------------------------------
	448	// ----------------------------------------------------------------------------------------
449	449
450	450	TTL_7404_INVERT(ic_e3a, 128H)
451	451	TTL_7427_NOR( ic_e3b, 256H, 64H, ic_e3a.Q)
r26736	r26737
456	456	TTL_7425_NOR(ic_f2a, ic_g1a.Q, 64V, 128V, ic_d2c.Q)
457	457	NET_ALIAS(c5-en, ic_f2a.Q)
458	458
459		// ----------------------------------------------------------------------------------------
	459	// ----------------------------------------------------------------------------------------
460	460	// Score logic ...
461		// ----------------------------------------------------------------------------------------
	461	// ----------------------------------------------------------------------------------------
462	462
463	463	TTL_7402_NOR(ic_f5b, L, Missed)
464	464	TTL_7490(ic_c7, ic_f5b, SRST, SRST, low, low)
r26736	r26737
490	490	NET_ALIAS(score2_10, ic_c8b.Q)
491	491	NET_ALIAS(score2_10Q, ic_c8b.QQ)
492	492
493		// ----------------------------------------------------------------------------------------
	493	// ----------------------------------------------------------------------------------------
494	494	// Score display
495		// ----------------------------------------------------------------------------------------
	495	// ----------------------------------------------------------------------------------------
496	496
497	497	TTL_74153(ic_d6a, score1_10Q, score1_4, score2_10Q, score2_4, 32H, 64H, low)
498	498	TTL_74153(ic_d6b, score1_10Q, score1_8, score2_10Q, score2_8, 32H, 64H, low)
r26736	r26737
537	537	TTL_7427_NOR(ic_g2b, ic_g3b.Q, vblank, 4V)
538	538	NET_ALIAS(net, ic_g2b.Q)
539	539
540		// ----------------------------------------------------------------------------------------
	540	// ----------------------------------------------------------------------------------------
541	541	// video
542		// ----------------------------------------------------------------------------------------
	542	// ----------------------------------------------------------------------------------------
543	543
544	544	TTL_7402_NOR(ic_g1b, hvidQ, vvidQ)
545	545	TTL_7425_NOR(ic_f2b, ic_g1b.Q, pad1, pad2, net)
r26736	r26737
550	550	TTL_7404_INVERT(ic_e4f, ic_a4d.Q)
551	551
552	552	NETDEV_R(RV1, RES_K(1))
553		NETDEV_R(RV2, RES_K(1.2))
554		NETDEV_R(RV3, RES_K(22))
555		NET_C(video, RV1.1)
556		NET_C(score, RV2.1)
557		NET_C(ic_e4f.Q, RV3.1)
558		NET_C(RV1.2, RV2.2)
559		NET_C(RV2.2, RV3.2)
	553	NETDEV_R(RV2, RES_K(1.2))
	554	NETDEV_R(RV3, RES_K(22))
	555	NET_C(video, RV1.1)
	556	NET_C(score, RV2.1)
	557	NET_C(ic_e4f.Q, RV3.1)
	558	NET_C(RV1.2, RV2.2)
	559	NET_C(RV2.2, RV3.2)
560	560
561		NET_ALIAS(videomix, RV3.2)
	561	NET_ALIAS(videomix, RV3.2)
562	562
563		NETDEV_SOLVER(Solver)
564		NETDEV_PARAM(Solver.FREQ, 48000)
565		NETDEV_ANALOG_CONST(V5, 5)
566		NETDEV_ANALOG_CONST(V1, 1)
567		NETDEV_ANALOG_CONST(GND, 0)
	563	NETDEV_SOLVER(Solver)
	564	NETDEV_PARAM(Solver.FREQ, 48000)
	565	NETDEV_ANALOG_CONST(V5, 5)
	566	NETDEV_ANALOG_CONST(V1, 1)
	567	NETDEV_ANALOG_CONST(GND, 0)
568	568
569	569	#if 0
570		NETDEV_R(R1, 10)
571		NETDEV_R(R2, 10)
572		NETDEV_R(R3, 10)
573		NET_C(V5,R1.1)
574		NET_C(R1.2, R2.1)
575		NET_C(R2.2, R3.1)
576		NET_C(R3.2, GND)
	570	NETDEV_R(R1, 10)
	571	NETDEV_R(R2, 10)
	572	NETDEV_R(R3, 10)
	573	NET_C(V5,R1.1)
	574	NET_C(R1.2, R2.1)
	575	NET_C(R2.2, R3.1)
	576	NET_C(R3.2, GND)
577	577	#endif
578	578	#if 0
579		NETDEV_R(R4, 1000)
580		NETDEV_C(C1, 1e-6)
581		NET_C(V5,R4.1)
582		NET_C(R4.2, C1.1)
583		NET_C(C1.2, GND)
584		//NETDEV_LOG(log1, C1.1)
	579	NETDEV_R(R4, 1000)
	580	NETDEV_C(C1, 1e-6)
	581	NET_C(V5,R4.1)
	582	NET_C(R4.2, C1.1)
	583	NET_C(C1.2, GND)
	584	//NETDEV_LOG(log1, C1.1)
585	585	#endif
586	586
587	587	#define tt(_n) \
588		NETDEV_R(R ## _n, 1000) \
	588	NETDEV_R(R ## _n, 1000) \
589	589	NETDEV_D(D ## _n) \
590		NET_C(V5, R ## _n.1) \
591		NET_C(R ## _n.2, D ## _n.A) \
592		NET_C(D ## _n.K, GND)
	590	NET_C(V5, R ## _n.1) \
	591	NET_C(R ## _n.2, D ## _n.A) \
	592	NET_C(D ## _n.K, GND)
593	593
594	594	/* tt(20)
595	595	tt(21)
r26736	r26737
604	604	*/
605	605
606	606	#if 0
607		NETDEV_R(R5, 1000)
608		NETDEV_1N914(D1)
609		NET_C(V5, R5.1)
610		NET_C(R5.2, D1.A)
611		NET_C(D1.K, GND)
612		//NETDEV_LOG(log1, D1.A)
	607	NETDEV_R(R5, 1000)
	608	NETDEV_1N914(D1)
	609	NET_C(V5, R5.1)
	610	NET_C(R5.2, D1.A)
	611	NET_C(D1.K, GND)
	612	//NETDEV_LOG(log1, D1.A)
613	613	#endif
614	614
615	615	#if 0
616		// astable NAND Multivibrator
617		NETDEV_R(R1, 1000)
618		NETDEV_C(C1, 1e-6)
619		TTL_7400_NAND(n1,R1.1,R1.1)
620		TTL_7400_NAND(n2,R1.2,R1.2)
621		NET_C(n1.Q, R1.2)
622		NET_C(n2.Q, C1.1)
623		NET_C(C1.2, R1.1)
624		//NETDEV_LOG(log2, C1.2)
625		//NETDEV_LOG(log2, n1.Q)
626		//NETDEV_LOG(log3, n2.Q)
	616	// astable NAND Multivibrator
	617	NETDEV_R(R1, 1000)
	618	NETDEV_C(C1, 1e-6)
	619	TTL_7400_NAND(n1,R1.1,R1.1)
	620	TTL_7400_NAND(n2,R1.2,R1.2)
	621	NET_C(n1.Q, R1.2)
	622	NET_C(n2.Q, C1.1)
	623	NET_C(C1.2, R1.1)
	624	//NETDEV_LOG(log2, C1.2)
	625	//NETDEV_LOG(log2, n1.Q)
	626	//NETDEV_LOG(log3, n2.Q)
627	627	#endif
628	628
629	629	#if 0
630		// astable NE555, 1.13 ms period
631		NETDEV_R(RA, 5000)
632		NETDEV_R(RB, 3000)
633		NETDEV_C(C, 0.15e-6)
634		NETDEV_NE555(555)
	630	// astable NE555, 1.13 ms period
	631	NETDEV_R(RA, 5000)
	632	NETDEV_R(RB, 3000)
	633	NETDEV_C(C, 0.15e-6)
	634	NETDEV_NE555(555)
635	635
636		NET_C(GND, 555.GND)
637		NET_C(V5, 555.VCC)
	636	NET_C(GND, 555.GND)
	637	NET_C(V5, 555.VCC)
638	638
639		NET_C(RA.1, 555.VCC)
640		NET_C(RA.2, 555.DISCH)
	639	NET_C(RA.1, 555.VCC)
	640	NET_C(RA.2, 555.DISCH)
641	641
642		NET_C(RB.1, 555.DISCH)
643		NET_C(RB.2, 555.TRIG)
	642	NET_C(RB.1, 555.DISCH)
	643	NET_C(RB.2, 555.TRIG)
644	644
645		NET_C(RB.2, 555.THRESH)
	645	NET_C(RB.2, 555.THRESH)
646	646
647		NET_C(555.TRIG, C.1)
648		NET_C(C.2, GND)
649		//NETDEV_LOG(log2, C.1)
650		//NETDEV_LOG(log3, 555.OUT)
	647	NET_C(555.TRIG, C.1)
	648	NET_C(C.2, GND)
	649	//NETDEV_LOG(log2, C.1)
	650	//NETDEV_LOG(log3, 555.OUT)
651	651	#endif
652	652
653	653	#if 0
654		NETDEV_BC238B(Q)
655		NETDEV_R(RB, 1000)
656		NETDEV_R(RC, 1000)
	654	NETDEV_BC238B(Q)
	655	NETDEV_R(RB, 1000)
	656	NETDEV_R(RC, 1000)
657	657
658		NET_C(RC.1, V5)
659		NET_C(RC.2, Q.C)
660		NET_C(RB.1, 128H)
661		NET_C(RB.2, Q.B)
662		NET_C(Q.E, GND)
663		//NETDEV_LOG(logB, Q.B)
664		//NETDEV_LOG(logC, Q.C)
	658	NET_C(RC.1, V5)
	659	NET_C(RC.2, Q.C)
	660	NET_C(RB.1, 128H)
	661	NET_C(RB.2, Q.B)
	662	NET_C(Q.E, GND)
	663	//NETDEV_LOG(logB, Q.B)
	664	//NETDEV_LOG(logC, Q.C)
665	665	#endif
666	666
667	667	#if 0
668		NETDEV_VCVS(VV)
669		NETDEV_R(R1, 1000)
670		NETDEV_R(R2, 10000)
	668	NETDEV_VCVS(VV)
	669	NETDEV_R(R1, 1000)
	670	NETDEV_R(R2, 10000)
671	671
672		NET_C(V5, R1.1)
673		NET_C(R1.2, VV.IN)
674		NET_C(R2.1, VV.OP)
675		NET_C(R2.2, VV.IN)
676		NET_C(VV.ON, GND)
677		NET_C(VV.IP, GND)
678		NETDEV_LOG(logX, VV.OP)
	672	NET_C(V5, R1.1)
	673	NET_C(R1.2, VV.IN)
	674	NET_C(R2.1, VV.OP)
	675	NET_C(R2.2, VV.IN)
	676	NET_C(VV.ON, GND)
	677	NET_C(VV.IP, GND)
	678	NETDEV_LOG(logX, VV.OP)
679	679
680	680	#endif
681	681
682	682	#if 0
683		NETDEV_VCCS(VV)
684		NETDEV_PARAM(VV.G, 100000) // typical OP-AMP amplification
685		NETDEV_R(R1, 1000)
686		NETDEV_R(R2, 1)
687		NETDEV_R(R3, 10000)
	683	NETDEV_VCCS(VV)
	684	NETDEV_PARAM(VV.G, 100000) // typical OP-AMP amplification
	685	NETDEV_R(R1, 1000)
	686	NETDEV_R(R2, 1)
	687	NETDEV_R(R3, 10000)
688	688
689		NET_C(4V, R1.1)
690		NET_C(R1.2, VV.IN)
691		NET_C(R2.1, VV.OP)
692		NET_C(R3.1, VV.IN)
693		NET_C(R3.2, VV.OP)
694		NET_C(R2.2, GND)
695		NET_C(VV.ON, GND)
696		NET_C(VV.IP, GND)
697		//NETDEV_LOG(logX, VV.OP)
698		//NETDEV_LOG(logY, 4V)
	689	NET_C(4V, R1.1)
	690	NET_C(R1.2, VV.IN)
	691	NET_C(R2.1, VV.OP)
	692	NET_C(R3.1, VV.IN)
	693	NET_C(R3.2, VV.OP)
	694	NET_C(R2.2, GND)
	695	NET_C(VV.ON, GND)
	696	NET_C(VV.IP, GND)
	697	//NETDEV_LOG(logX, VV.OP)
	698	//NETDEV_LOG(logY, 4V)
699	699
700	700	#endif
701	701
702	702	#if 0
703		NETDEV_VCVS(VV)
704		NETDEV_PARAM(VV.G, 100000) // typical OP-AMP amplification
705		NETDEV_PARAM(VV.RO, 50) // typical OP-AMP amplification
706		NETDEV_R(R1, 1000)
707		NETDEV_R(R3, 10000) // ==> 10x amplification (inverting)
	703	NETDEV_VCVS(VV)
	704	NETDEV_PARAM(VV.G, 100000) // typical OP-AMP amplification
	705	NETDEV_PARAM(VV.RO, 50) // typical OP-AMP amplification
	706	NETDEV_R(R1, 1000)
	707	NETDEV_R(R3, 10000) // ==> 10x amplification (inverting)
708	708
709		NET_C(4V, R1.1)
710		NET_C(R1.2, VV.IN)
711		NET_C(R3.1, VV.IN)
712		NET_C(R3.2, VV.OP)
713		NET_C(VV.ON, GND)
714		NET_C(VV.IP, GND)
715		NETDEV_LOG(logX, VV.OP)
716		NETDEV_LOG(logY, 4V)
	709	NET_C(4V, R1.1)
	710	NET_C(R1.2, VV.IN)
	711	NET_C(R3.1, VV.IN)
	712	NET_C(R3.2, VV.OP)
	713	NET_C(VV.ON, GND)
	714	NET_C(VV.IP, GND)
	715	NETDEV_LOG(logX, VV.OP)
	716	NETDEV_LOG(logY, 4V)
717	717
718	718	#endif
719	719
720	720	#if 0
721		// Impedance converter with resistor
722		NETDEV_VCVS(VV)
723		NETDEV_PARAM(VV.G, 100000) // typical OP-AMP amplification
724		NETDEV_PARAM(VV.RO, 50) // typical OP-AMP amplification
725		NETDEV_R(R3, 10000)
	721	// Impedance converter with resistor
	722	NETDEV_VCVS(VV)
	723	NETDEV_PARAM(VV.G, 100000) // typical OP-AMP amplification
	724	NETDEV_PARAM(VV.RO, 50) // typical OP-AMP amplification
	725	NETDEV_R(R3, 10000)
726	726
727		NET_C(4V, VV.IP)
728		NET_C(R3.1, VV.IN)
729		NET_C(R3.2, VV.OP)
730		NET_C(VV.ON, GND)
731		NETDEV_LOG(logX, VV.OP)
732		NETDEV_LOG(logY, 4V)
	727	NET_C(4V, VV.IP)
	728	NET_C(R3.1, VV.IN)
	729	NET_C(R3.2, VV.OP)
	730	NET_C(VV.ON, GND)
	731	NETDEV_LOG(logX, VV.OP)
	732	NETDEV_LOG(logY, 4V)
733	733
734	734	#endif
735	735
736	736	#if 0
737		// Impedance converter without resistor
738		NETDEV_VCVS(VV)
739		NETDEV_PARAM(VV.G, 100000) // typical OP-AMP amplification
740		NETDEV_PARAM(VV.RO, 50) // typical OP-AMP amplification
	737	// Impedance converter without resistor
	738	NETDEV_VCVS(VV)
	739	NETDEV_PARAM(VV.G, 100000) // typical OP-AMP amplification
	740	NETDEV_PARAM(VV.RO, 50) // typical OP-AMP amplification
741	741
742		NET_C(4V, VV.IP)
743		NET_C(VV.IN, VV.OP)
744		NET_C(VV.ON, GND)
745		NETDEV_LOG(logX, VV.OP)
746		NETDEV_LOG(logY, 4V)
	742	NET_C(4V, VV.IP)
	743	NET_C(VV.IN, VV.OP)
	744	NET_C(VV.ON, GND)
	745	NETDEV_LOG(logX, VV.OP)
	746	NETDEV_LOG(logY, 4V)
747	747
748	748	#endif
749	749
750	750	#if 0
751		/* Impedance converter current source opamp model from
752		*
753		* http://www.ecircuitcenter.com/Circuits/opmodel1/opmodel1.htm
754		*
755		* Bandwidth 10Mhz
756		*
757		*/
758		NETDEV_VCCS(G1)
759		NETDEV_PARAM(G1.G, 100) // typical OP-AMP amplification 100 * 1000 = 100000
760		NETDEV_R(RP1, 1000)
761		NETDEV_C(CP1, 1.59e-6) // <== change to 1.59e-3 for 10Khz bandwidth
762		NETDEV_VCVS(EBUF)
763		NETDEV_PARAM(EBUF.RO, 50)
764		NETDEV_PARAM(EBUF.G, 1)
	751	/* Impedance converter current source opamp model from
	752	*
	753	* http://www.ecircuitcenter.com/Circuits/opmodel1/opmodel1.htm
	754	*
	755	* Bandwidth 10Mhz
	756	*
	757	*/
	758	NETDEV_VCCS(G1)
	759	NETDEV_PARAM(G1.G, 100) // typical OP-AMP amplification 100 * 1000 = 100000
	760	NETDEV_R(RP1, 1000)
	761	NETDEV_C(CP1, 1.59e-6) // <== change to 1.59e-3 for 10Khz bandwidth
	762	NETDEV_VCVS(EBUF)
	763	NETDEV_PARAM(EBUF.RO, 50)
	764	NETDEV_PARAM(EBUF.G, 1)
765	765
766		NET_C(G1.IP, 4V)
767		NET_C(G1.IN, EBUF.OP)
768		NET_C(EBUF.ON, GND)
	766	NET_C(G1.IP, 4V)
	767	NET_C(G1.IN, EBUF.OP)
	768	NET_C(EBUF.ON, GND)
769	769
770		NET_C(G1.ON, GND)
771		NET_C(RP1.2, GND)
772		NET_C(CP1.2, GND)
773		NET_C(EBUF.IN, GND)
	770	NET_C(G1.ON, GND)
	771	NET_C(RP1.2, GND)
	772	NET_C(CP1.2, GND)
	773	NET_C(EBUF.IN, GND)
774	774
775		NET_C(RP1.1, G1.OP)
776		NET_C(CP1.1, RP1.1)
777		NET_C(EBUF.IP, RP1.1)
	775	NET_C(RP1.1, G1.OP)
	776	NET_C(CP1.1, RP1.1)
	777	NET_C(EBUF.IP, RP1.1)
778	778
779		//NETDEV_LOG(logX, EBUF.OP)
780		//NETDEV_LOG(logY, 4V)
	779	//NETDEV_LOG(logX, EBUF.OP)
	780	//NETDEV_LOG(logY, 4V)
781	781
782	782	#endif
783	783
r26736	r26737
794	794	m_dac(this, "dac"), / just to have a sound device */
795	795	m_srst(*this, "maincpu", "SRST"),
796	796	m_p_P0(*this, "maincpu", "ic_b9_POT.DIAL"),
797		m_p_P1(*this, "maincpu", "ic_a9_POT.DIAL"),
	797	m_p_P1(*this, "maincpu", "ic_a9_POT.DIAL"),
798	798	m_sw1a(*this, "maincpu", "sw1a.POS"),
799	799	m_sw1b(*this, "maincpu", "sw1b.POS"),
800	800	m_p_R0(*this, "maincpu", "ic_a9_R.R"),
r26736	r26737
809	809
810	810	// sub devices
811	811	netlist_mame_device::required_output<netlist_logic_output_t> m_srst;
812		netlist_mame_device::required_param<netlist_param_double_t> m_p_P0;
813		netlist_mame_device::required_param<netlist_param_double_t> m_p_P1;
	812	netlist_mame_device::required_param<netlist_param_double_t> m_p_P0;
	813	netlist_mame_device::required_param<netlist_param_double_t> m_p_P1;
814	814	netlist_mame_device::required_param<netlist_param_int_t> m_sw1a;
815	815	netlist_mame_device::required_param<netlist_param_int_t> m_sw1b;
816	816	netlist_mame_device::required_param<netlist_param_double_t> m_p_R0;
r26736	r26737
847	847
848	848	static NETLIST_START(pong)
849	849
850		//NETLIST_INCLUDE(pong_schematics)
851		NETLIST_MEMREGION("maincpu")
	850	//NETLIST_INCLUDE(pong_schematics)
	851	NETLIST_MEMREGION("maincpu")
852	852
853		NETDEV_ANALOG_CALLBACK(sound_cb, sound, pong_state, sound_cb, "")
854		NETDEV_ANALOG_CALLBACK(video_cb, videomix, pong_state, video_cb, "")
	853	NETDEV_ANALOG_CALLBACK(sound_cb, sound, pong_state, sound_cb, "")
	854	NETDEV_ANALOG_CALLBACK(video_cb, videomix, pong_state, video_cb, "")
855	855	NETLIST_END
856	856
857	857	static NETLIST_START(pong_fast)
858	858
859		NETLIST_INCLUDE(pong_schematics)
	859	NETLIST_INCLUDE(pong_schematics)
860	860
861		NETDEV_ANALOG_CALLBACK(sound_cb, sound, pong_state, sound_cb, "")
862		NETDEV_ANALOG_CALLBACK(video_cb, videomix, pong_state, video_cb, "")
	861	NETDEV_ANALOG_CALLBACK(sound_cb, sound, pong_state, sound_cb, "")
	862	NETDEV_ANALOG_CALLBACK(video_cb, videomix, pong_state, video_cb, "")
863	863
864	864	NETLIST_END
865	865
r26736	r26737
891	891
892	892	double fac = (double) newval / (double) 256;
893	893	fac = (exp(fac) - 1.0) / (exp(1.0) -1.0) ;
894		switch (numpad)
895		{
896		case IC_PADDLE1: m_p_P0->setTo(fac); break;
897		case IC_PADDLE2: m_p_P1->setTo(fac); break;
898		}
	894	switch (numpad)
	895	{
	896	case IC_PADDLE1: m_p_P0->setTo(fac); break;
	897	case IC_PADDLE2: m_p_P1->setTo(fac); break;
	898	}
899	899	break;
900	900	}
901	901	case IC_SWITCH:
r26736	r26737
908	908	case IC_VR1:
909	909	case IC_VR2:
910	910	pad = (double) newval / (double) 100 * RES_K(50) + RES_K(56);
911		switch (numpad)
912		{
913		case IC_VR1: m_p_R0->setTo(pad); break;
914		case IC_VR2: m_p_R1->setTo(pad); break;
915		}
	911	switch (numpad)
	912	{
	913	case IC_VR1: m_p_R0->setTo(pad); break;
	914	case IC_VR2: m_p_R1->setTo(pad); break;
	915	}
916	916	break;
917	917	}
918	918

trunk/src/mame/drivers/harddriv.c
r26736	r26737
1599	1599	MCFG_DEVICE_REMOVE("rspeaker")
1600	1600
1601	1601	MCFG_ASIC65_ADD("asic65", ASIC65_STEELTAL) /* ASIC65 on DSPCOM board */
1602
	1602
1603	1603	/* sund hardware */
1604	1604	MCFG_SPEAKER_STANDARD_MONO("mono")
1605	1605
r26736	r26737
4390	4390	/* COMMON INIT: initialize the DSPCOM add-on board */
4391	4391	void harddriv_state::init_dspcom()
4392	4392	{
4393		/* install ASIC65 */
	4393	/* install ASIC65 */
4394	4394	m_maincpu->space(AS_PROGRAM).install_write_handler(0x900000, 0x900003, write16_delegate(FUNC(asic65_device::data_w), (asic65_device*)m_asic65));
4395	4395	m_maincpu->space(AS_PROGRAM).install_read_handler(0x900000, 0x900003, read16_delegate(FUNC(asic65_device::read), (asic65_device*)m_asic65));
4396	4396	m_maincpu->space(AS_PROGRAM).install_read_handler(0x901000, 0x910001, read16_delegate(FUNC(asic65_device::io_r), (asic65_device*)m_asic65));

trunk/src/mame/drivers/2mindril.c
r26736	r26737
50	50
51	51	/* memory pointers */
52	52	required_shared_ptr<UINT16> m_iodata;
53
	53
54	54	/* input-related */
55	55	UINT16 m_defender_sensor;
56	56	UINT16 m_shutter_sensor;
r26736	r26737
76	76	TIMER_SHUTTER_REQ,
77	77	TIMER_DEFENDER_REQ
78	78	};
79
	79
80	80	protected:
81	81	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
82	82	#endif
r26736	r26737
152	152	m_shutter_sensor = param;
153	153	break;
154	154	case TIMER_DEFENDER_REQ:
155		m_defender_sensor = param;
	155	m_defender_sensor = param;
156	156	break;
157	157	default:
158	158	assert_always(FALSE, "Unknown id in _2mindril_state::device_timer");

trunk/src/mame/drivers/midzeus.c
r26736	r26737
1271	1271	ROM_LOAD32_WORD( "invasion2.u15", 0x0800002, 0x200000, CRC(584b0596) SHA1(cab8222977ecc8a689f1f3f7ebc38ff7bec6a43f) )
1272	1272	ROM_LOAD32_WORD( "invasion2.u16", 0x0c00000, 0x200000, CRC(5d422855) SHA1(ceafd60b020b03de051765b9e9dd0d01285a0335) )
1273	1273	ROM_LOAD32_WORD( "invasion2.u17", 0x0c00002, 0x200000, CRC(c6555769) SHA1(a97361001311dd6fb28f79df422e6e8c27ea2495) )
1274		ROM_LOAD32_WORD( "invasion2.u18", 0x1000000, 0x200000, CRC(dbc9548e) SHA1(6deac9fde26144a61bd63833a197801d159f0c9a) )
1275		ROM_LOAD32_WORD( "invasion2.u19", 0x1000002, 0x200000, CRC(4b05a2a9) SHA1(3d47c22a809f5883e4795a9153161d3e29c64662) )
	1274	ROM_LOAD32_WORD( "invasion2.u18", 0x1000000, 0x200000, CRC(dbc9548e) SHA1(6deac9fde26144a61bd63833a197801d159f0c9a) )
	1275	ROM_LOAD32_WORD( "invasion2.u19", 0x1000002, 0x200000, CRC(4b05a2a9) SHA1(3d47c22a809f5883e4795a9153161d3e29c64662) )
1276	1276	ROM_END
1277	1277
1278	1278	ROM_START( crusnexo )

trunk/src/mame/drivers/konendev.c
r26736	r26737
1	1	/*
2		Konami Endeavour hardware (gambling games)
	2	Konami Endeavour hardware (gambling games)
3	3
4	4
5		Hardware:
	5	Hardware:
6	6
7		1. Backplane PCB (GGAT2 PWB(A1) 10000094517)
8		- VGA connector
9		- RJ45 connector
	7	1. Backplane PCB (GGAT2 PWB(A1) 10000094517)
	8	- VGA connector
	9	- RJ45 connector
10	10
11		2. Main PCB (GGAT2 PWB(B2) 0000093536)
12		- PowerPC 403GCX
13		- Unknown large QFP IC under heatsink (0000057714/Firebeat GCU?)
14		- Xilinx CPLD
15		- 2 x Hynix RAM
16		- 4 x HY57V641620 SDRAM
17		- 2 x Hynix RAM (sound?)
18		- 2 x EPROMs
19		- 1 x SRAM (battery backup?)
20		- 2 x CR2032, 2 x supercaps
21		- Unknown Fujitsu IC
22		- YMZ280B
23		- Sound amplifier with heatsink
	11	2. Main PCB (GGAT2 PWB(B2) 0000093536)
	12	- PowerPC 403GCX
	13	- Unknown large QFP IC under heatsink (0000057714/Firebeat GCU?)
	14	- Xilinx CPLD
	15	- 2 x Hynix RAM
	16	- 4 x HY57V641620 SDRAM
	17	- 2 x Hynix RAM (sound?)
	18	- 2 x EPROMs
	19	- 1 x SRAM (battery backup?)
	20	- 2 x CR2032, 2 x supercaps
	21	- Unknown Fujitsu IC
	22	- YMZ280B
	23	- Sound amplifier with heatsink
24	24
25		3. I/O PCB (GGAT2 PWB(B2) ???????????)
26		- H8/3001
27		- EPROM socket
28		- Various CPLDs
	25	3. I/O PCB (GGAT2 PWB(B2) ???????????)
	26	- H8/3001
	27	- EPROM socket
	28	- Various CPLDs
29	29
30		I think they use CF cards for resources, one game has what appears to be a dump of one
31		but the rest don't. It's quite possibly (even likely) that all the sets here are incomplete.
	30	I think they use CF cards for resources, one game has what appears to be a dump of one
	31	but the rest don't. It's quite possibly (even likely) that all the sets here are incomplete.
32	32	*/
33	33
34	34
r26736	r26737
238	238
239	239	DRIVER_INIT_MEMBER(konendev_state,konendev)
240	240	{
241
242	241	}
243	242
244	243	// has a flash dump?

trunk/src/mame/mame.lst
r26736	r26737
307	307	strfbomb // bootleg
308	308	scrambp // bootleg (Billport S.A.)
309	309	scrampt // bootleg (Petaco S.A.)
310		scramrf // bootleg (Recreativos Franco)
	310	scramrf // bootleg (Recreativos Franco)
311	311	atlantis // (c) 1981 Comsoft
312	312	atlantis2 // (c) 1981 Comsoft
313	313	theend // (c) 1980 Konami
r26736	r26737
1629	1629	maxrpm // (c) 1986
1630	1630	spyhunt // (c) 1983
1631	1631	spyhuntp // (c) 1983
1632		spyhuntpr //
	1632	spyhuntpr //
1633	1633	turbotag // (c) 1985
1634	1634	crater // (c) 1984
1635	1635	// MCR 68000
r26736	r26737
2113	2113	cadashi // C21 (c) 1989 Taito Corporation Japan
2114	2114	cadashf // C21 (c) 1989 Taito Corporation Japan
2115	2115	cadashg // C21 (c) 1989 Taito Corporation Japan
2116		cadashp // prototype
	2116	cadashp // prototype
2117	2117	parentj // C42 (c) 199? Taito
2118	2118	galmedes // (c) 1992 Visco (Japan)
2119	2119	earthjkr // (c) 1993 Visco (Japan)
2120		earthjkrp //
	2120	earthjkrp //
2121	2121	eto // (c) 1994 Visco (Japan)
2122	2122	wgp // C32 (c) 1989 Taito America Corporation (US)
2123	2123	wgpj // C32 (c) 1989 Taito Corporation (Japan)
r26736	r26737
2219	2219
2220	2220	// Taito H-System games
2221	2221	syvalion // B51 (c) 1988 Taito Corporation (Japan)
2222		syvalionp //
	2222	syvalionp //
2223	2223	recordbr // B56 (c) 1988 Taito Corporation Japan (World)
2224	2224	gogold // B56 (c) 1988 Taito Corporation (Japan)
2225	2225	dleague // C02 (c) 1990 Taito America Corporation (US)
r26736	r26737
2309	2309	superchs // D46 (c) 1992 Taito Corporation Japan (World)
2310	2310	superchsu // D46 (c) 1992 Taito America Corporation (US)
2311	2311	superchsj // D46 (c) 1992 Taito Corporation (Japan)
2312		superchsp // prototype
	2312	superchsp // prototype
2313	2313	groundfx // D51 (c) 1992 Taito Coporation
2314	2314	undrfire // D67 (c) 1993 Taito Coporation Japan (World)
2315	2315	undrfireu // D67 (c) 1993 Taito America Corporation (US)
2316	2316	undrfirej // D67 (c) 1993 Taito Coporation (Japan)
2317	2317	cbombers // D83 (c) 1993 Taito Coporation Japan (World)
2318	2318	cbombersj // D83 (c) 1993 Taito Coporation (Japan)
2319		cbombersp //
	2319	cbombersp //
2320	2320
2321	2321	// Taito F2 games
2322	2322	finalb // 1989.?? B82 (c) 1988 Taito Corporation Japan (World)
r26736	r26737
2653	2653	batsuguna // TP-030 (c) 1993 Toaplan
2654	2654	batsugunsp // TP-??? (c) 1993 Toaplan
2655	2655	snowbro2 // TP-??? (c) 1994 Hanafram
2656		pwrkick // (c) 1994 Sunwise
	2656	pwrkick // (c) 1994 Sunwise
2657	2657	sstriker // (c) 1993 Raizing
2658	2658	sstrikera // (c) 1993 Raizing
2659	2659	mahoudai // (c) 1993 Raizing + Able license
r26736	r26737
2862	2862	1942abl // bootleg
2863	2863	1942b // 12/1984 (c) 1984
2864	2864	1942w // 12/1984 (c) 1984 + Williams Electronics license (c) 1985
2865		1942p // prototype
	2865	1942p // prototype
2866	2866	exedexes // 2/1985 (c) 1985
2867	2867	savgbees // 2/1985 (c) 1985 + Memetron license
2868	2868	commando // 5/1985 (c) 1985 (World)
r26736	r26737
5132	5132	f355 // 1999.07 F355 Challenge
5133	5133	f355twin // 1999.07 F355 Challenge Twin
5134	5134	shangril // 1999.08 Dengen Tenshi Taisen Janshi Shangri-la
5135		tduno // 1999.08 Touch de UNO! / Unou Nouryoku Check Machine
	5135	tduno // 1999.08 Touch de UNO! / Unou Nouryoku Check Machine
5136	5136	vs2_2k // 1999.08 Virtua Striker 2 version 2000 (Rev C)
5137	5137	suchie3 // 1999.09 Idol Janshi Su-Chi-Pi 3
5138	5138	jambo // 1999.09 Jambo! Safari (Rev A)
r26736	r26737
5612	5612	begas // (c) 1983
5613	5613	begas1 // (c) 1983
5614	5614	cobra // (c) 1984
5615		cobraa //
	5615	cobraa //
5616	5616	rblaster // (c) 1985
5617	5617
5618	5618	// other Data East games
r26736	r26737
8938	8938	hardhea2 // (c) 1991 SunA
8939	8939	brickzn // (c) 1992 SunA
8940	8940	brickznv4 // (c) 1992 SunA
8941		brickzn11 // (c) 1992 SunA
	8941	brickzn11 // (c) 1992 SunA
8942	8942	bestbest // (c) 1994 SunA
8943	8943	sunaq // (c) 1994 SunA
8944	8944	bssoccer // (c) 1996 SunA
r26736	r26737
9271	9271	quizchq // "73" (c) 1993 Nakanihon
9272	9272	quizchql // "73" (c) 1993 Laxan
9273	9273	funkyfig // "74" (c) 1993 Nakanihon + East Technology
9274		funkyfiga //
	9274	funkyfiga //
9275	9275	animaljr // "75" 1993 Nakanihon/Taito (USA)
9276	9276	animaljrs // "75" 1993 Nakanihon/Taito (Spanish version)
9277	9277	animaljrj // "75" 1993 Nakanihon/Taito (Japan)
r26736	r26737
9527	9527	martmastc102 //
9528	9528	theglad // (c) 2003 The Gladiator
9529	9529	theglad100 //
9530		theglad101 //
	9530	theglad101 //
9531	9531	thegladpcb //
9532	9532	dw2001 // (c) 2001 Dragon World 2001
9533	9533	dwpc // (c) 2001 Dragon World Pretty Chance
r26736	r26737
9744	9744	ar_bios
9745	9745	ar_airh // (c) 1988
9746	9746	ar_airh2 // (c) 1988
9747		ar_blast // (c) 1988
	9747	ar_blast // (c) 1988
9748	9748	ar_bowl // (c) 1988
9749	9749	ar_dart // (c) 1987
9750	9750	ar_dart2 // (c) 1987
r26736	r26737
9755	9755	ar_ldrbb // (c) 1988
9756	9756	ar_ninj // (c) 1987
9757	9757	ar_ninj2 // (c) 1987
9758		ar_pm // (c) 198?
	9758	ar_pm // (c) 198?
9759	9759	ar_rdwr // (c) 1988
9760	9760	ar_sdwr // (c) 1988
9761	9761	ar_sdwr2 // (c) 1988
r26736	r26737
9763	9763	ar_spot // (c) 1990
9764	9764	ar_sprg // (c) 1987
9765	9765	ar_xeon // (c) 1988
9766		ar_dlta // (c) 198?
	9766	ar_dlta // (c) 198?
9767	9767
9768	9768	// Sente Super System
9769	9769	mquake // (c) 1987
r26736	r26737
9977	9977	nostj // (c) 1993 Face
9978	9978	nostk // (c) 1993 Face
9979	9979	4enraya // (c) 1990 IDSA
9980		4enrayaa //
	9980	4enrayaa //
9981	9981	unkpacg // (c) 19?? ???
9982	9982	oneshot // no copyright notice
9983	9983	maddonna // (c) 1995 Tuning
r26736	r26737
10447	10447	mosaicf2 // (c) 1999 F2 System
10448	10448	finalgdr // (c) 2001 Semicom
10449	10449	mrkicker // (c) 2001 Semicom
10450		wivernwg // (c) 2001 Semicom
	10450	wivernwg // (c) 2001 Semicom
10451	10451	wyvernwg // (c) 2001 Semicom / Game Vision
10452	10452	wyvernwga // (c) 2001 Semicom / Game Vision
10453	10453	rbmk // (c) 1995 GMS

trunk/src/mame/audio/taito_en.c
r26736	r26737
50	50	save_item(NAME(m_es5510_dadr_latch));
51	51	save_item(NAME(m_es5510_gpr_latch));
52	52	save_item(NAME(m_es5510_ram_sel));
53
	53
54	54	m_duart68681 = machine().device<duartn68681_device>("duart68681");
55	55	}
56	56

trunk/src/mame/audio/taito_en.h
r26736	r26737
17	17	//todo: hook up cpu/es5510
18	18	DECLARE_READ16_MEMBER( es5510_dsp_r );
19	19	DECLARE_WRITE16_MEMBER( es5510_dsp_w );
20
	20
21	21	DECLARE_WRITE_LINE_MEMBER(duart_irq_handler);
22	22
23	23	protected:
r26736	r26737
40	40	UINT8 m_es5510_ram_sel;
41	41
42	42	UINT32 *m_snd_shared_ram;
43
	43
44	44	duartn68681_device *m_duart68681;
45	45
46	46	};

trunk/src/build/makedep.c
r26736	r26737
138	138	(excpathhead)->pathlen = (excpathhead)->path.len();
139	139	excpathhead = &(*excpathhead)->next;
140	140	}
141
	141
142	142	else if (arg[0] == '-' && arg[1] == 'F')
143	143	{
144	144	argnum++;
145	145	}
146	146
147		else if (arg[0] == '-' && arg[1] == 'D')
148		{
149		// some pkgconfigs return defines (e.g. pkg-config QtGui --cflags) ==> ignore
150		argnum++;
151		}
	147	else if (arg[0] == '-' && arg[1] == 'D')
	148	{
	149	// some pkgconfigs return defines (e.g. pkg-config QtGui --cflags) ==> ignore
	150	argnum++;
	151	}
152	152
153	153	// ignore -include which is used by sdlmame to include sdlprefix.h before all other includes
154	154	else if (strcmp(arg,"-include") == 0)

trunk/src/tools/romcmp.c
r26736	r26737
472	472	UINT64 size = d->size;
473	473	while (size && (size & 1) == 0) size >>= 1;
474	474	//if (size & ~1)
475		// printf("%-23s %-23s ignored (not a ROM)\n",i ? "" : d_name,i ? d_name : "");
	475	// printf("%-23s %-23s ignored (not a ROM)\n",i ? "" : d_name,i ? d_name : "");
476	476	//else
477	477	{
478	478	strcpy(files[i][found[i]].name,d_name);

trunk/src/tools/jedutil.c
r26736	r26737
232	232	struct _pal_data
233	233	{
234	234	const char *name;
235		UINT32 numfuses;
	235	UINT32 numfuses;
236	236	const pin_fuse_rows *pinfuserows;
237	237	UINT16 pinfuserowscount;
238	238	const pin_fuse_columns *pinfusecolumns;
r26736	r26737
698	698	static pin_fuse_rows epl16rp8pinfuserows[] = {
699	699	{12, NO_OUTPUT_ENABLE_FUSE_ROW, 1792, 2016}, /* Registered Output */
700	700	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760}, /* Registered Output */
701		{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
	701	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
702	702	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
703	703	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992}, /* Registered Output */
704	704	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736}, /* Registered Output */
r26736	r26737
795	795	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}}; /* Registered Output */
796	796
797	797	static pin_fuse_rows pal6l16pinfuserows[] = {
798		{1, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
799		{2, NO_OUTPUT_ENABLE_FUSE_ROW, 24, 24},
800		{3, NO_OUTPUT_ENABLE_FUSE_ROW, 36, 36},
801		{10, NO_OUTPUT_ENABLE_FUSE_ROW, 132, 132},
802		{11, NO_OUTPUT_ENABLE_FUSE_ROW, 168, 168},
803		{13, NO_OUTPUT_ENABLE_FUSE_ROW, 180, 180},
804		{14, NO_OUTPUT_ENABLE_FUSE_ROW, 156, 156},
805		{15, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 144},
806		{16, NO_OUTPUT_ENABLE_FUSE_ROW, 120, 120},
807		{17, NO_OUTPUT_ENABLE_FUSE_ROW, 108, 108},
808		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 96},
809		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 84, 84},
810		{20, NO_OUTPUT_ENABLE_FUSE_ROW, 72, 72},
811		{21, NO_OUTPUT_ENABLE_FUSE_ROW, 60, 60},
812		{22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 48},
813		{23, NO_OUTPUT_ENABLE_FUSE_ROW, 12, 12}};
	798	{1, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	799	{2, NO_OUTPUT_ENABLE_FUSE_ROW, 24, 24},
	800	{3, NO_OUTPUT_ENABLE_FUSE_ROW, 36, 36},
	801	{10, NO_OUTPUT_ENABLE_FUSE_ROW, 132, 132},
	802	{11, NO_OUTPUT_ENABLE_FUSE_ROW, 168, 168},
	803	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 180, 180},
	804	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 156, 156},
	805	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 144},
	806	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 120, 120},
	807	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 108, 108},
	808	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 96},
	809	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 84, 84},
	810	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 72, 72},
	811	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 60, 60},
	812	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 48},
	813	{23, NO_OUTPUT_ENABLE_FUSE_ROW, 12, 12}};
814	814
815	815	static pin_fuse_rows pal8l14pinfuserows[] = {
816		{1, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
817		{2, NO_OUTPUT_ENABLE_FUSE_ROW, 32, 32},
818		{11, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 192},
819		{13, NO_OUTPUT_ENABLE_FUSE_ROW, 208, 208},
820		{14, NO_OUTPUT_ENABLE_FUSE_ROW, 176, 176},
821		{15, NO_OUTPUT_ENABLE_FUSE_ROW, 160, 160},
822		{16, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 144},
823		{17, NO_OUTPUT_ENABLE_FUSE_ROW, 128, 128},
824		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 112},
825		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 96},
826		{20, NO_OUTPUT_ENABLE_FUSE_ROW, 80, 80},
827		{21, NO_OUTPUT_ENABLE_FUSE_ROW, 64, 64},
828		{22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 48},
829		{23, NO_OUTPUT_ENABLE_FUSE_ROW, 16, 16}};
	816	{1, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 0},
	817	{2, NO_OUTPUT_ENABLE_FUSE_ROW, 32, 32},
	818	{11, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 192},
	819	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 208, 208},
	820	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 176, 176},
	821	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 160, 160},
	822	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 144},
	823	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 128, 128},
	824	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 112},
	825	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 96},
	826	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 80, 80},
	827	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 64, 64},
	828	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 48},
	829	{23, NO_OUTPUT_ENABLE_FUSE_ROW, 16, 16}};
830	830
831	831	static pin_fuse_rows pal12h10pinfuserows[] = {
832		{14, NO_OUTPUT_ENABLE_FUSE_ROW, 432, 456},
833		{15, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 408},
834		{16, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 360},
835		{17, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 312},
836		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 264},
837		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 216},
838		{20, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 168},
839		{21, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 120},
840		{22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 72},
841		{23, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 24}};
	832	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 432, 456},
	833	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 408},
	834	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 360},
	835	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 312},
	836	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 264},
	837	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 216},
	838	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 168},
	839	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 120},
	840	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 72},
	841	{23, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 24}};
842	842
843	843	static pin_fuse_rows pal12l10pinfuserows[] = {
844		{14, NO_OUTPUT_ENABLE_FUSE_ROW, 432, 456},
845		{15, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 408},
846		{16, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 360},
847		{17, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 312},
848		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 264},
849		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 216},
850		{20, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 168},
851		{21, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 120},
852		{22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 72},
853		{23, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 24}};
	844	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 432, 456},
	845	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 408},
	846	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 360},
	847	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 312},
	848	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 264},
	849	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 216},
	850	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 168},
	851	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 120},
	852	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 48, 72},
	853	{23, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 24}};
854	854
855	855	static pin_fuse_rows pal14h8pinfuserows[] = {
856		{15, NO_OUTPUT_ENABLE_FUSE_ROW, 448, 532},
857		{16, NO_OUTPUT_ENABLE_FUSE_ROW, 392, 420},
858		{17, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 364},
859		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 280, 308},
860		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 252},
861		{20, NO_OUTPUT_ENABLE_FUSE_ROW, 168, 196},
862		{21, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 140},
863		{22, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 84}};
	856	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 448, 532},
	857	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 392, 420},
	858	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 364},
	859	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 280, 308},
	860	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 252},
	861	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 168, 196},
	862	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 140},
	863	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 84}};
864	864
865	865	static pin_fuse_rows pal14l8pinfuserows[] = {
866		{15, NO_OUTPUT_ENABLE_FUSE_ROW, 448, 532},
867		{16, NO_OUTPUT_ENABLE_FUSE_ROW, 392, 420},
868		{17, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 364},
869		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 280, 308},
870		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 252},
871		{20, NO_OUTPUT_ENABLE_FUSE_ROW, 168, 196},
872		{21, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 140},
873		{22, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 84}};
	866	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 448, 532},
	867	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 392, 420},
	868	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 364},
	869	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 280, 308},
	870	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 252},
	871	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 168, 196},
	872	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 140},
	873	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 84}};
874	874
875	875	static pin_fuse_rows pal16h6pinfuserows[] = {
876		{16, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 608},
877		{17, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 480},
878		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 352},
879		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 288},
880		{20, NO_OUTPUT_ENABLE_FUSE_ROW, 128, 224},
881		{21, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 96}};
	876	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 608},
	877	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 480},
	878	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 352},
	879	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 288},
	880	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 128, 224},
	881	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 96}};
882	882
883	883	static pin_fuse_rows pal16l6pinfuserows[] = {
884		{16, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 608},
885		{17, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 480},
886		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 352},
887		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 288},
888		{20, NO_OUTPUT_ENABLE_FUSE_ROW, 128, 224},
889		{21, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 96}};
	884	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 608},
	885	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 384, 480},
	886	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 352},
	887	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 288},
	888	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 128, 224},
	889	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 96}};
890	890
891	891	static pin_fuse_rows pal18h4pinfuserows[] = {
892		{17, NO_OUTPUT_ENABLE_FUSE_ROW, 504, 684},
893		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 360, 468},
894		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 216, 324},
895		{20, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 180}};
	892	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 504, 684},
	893	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 360, 468},
	894	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 216, 324},
	895	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 180}};
896	896
897	897	static pin_fuse_rows pal18l4pinfuserows[] = {
898		{17, NO_OUTPUT_ENABLE_FUSE_ROW, 504, 684},
899		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 360, 468},
900		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 216, 324},
901		{20, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 180}};
	898	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 504, 684},
	899	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 360, 468},
	900	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 216, 324},
	901	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 180}};
902	902
903	903	static pin_fuse_rows pal20c1pinfuserows[] = {
904		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 280},
905		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 600}};
	904	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 280},
	905	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 600}};
906	906
907	907	static pin_fuse_rows pal20l2pinfuserows[] = {
908		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 600},
909		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 280}};
	908	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 600},
	909	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 280}};
910	910
911	911	static pin_fuse_columns pal10l8pinfusecolumns[] = {
912	912	{1, 3, 2},
r26736	r26737
1501	1501	{9, 29, 28},
1502	1502	{12, 31, 30},
1503	1503	{13, 27, 26},
1504		{14, 23, 22},
1505		{15, 19, 18},
1506		{16, 15, 14},
1507		{17, 11, 10},
	1504	{14, 23, 22},
	1505	{15, 19, 18},
	1506	{16, 15, 14},
	1507	{17, 11, 10},
1508	1508	{18, 7, 6},
1509	1509	{19, 3, 2}};
1510	1510
r26736	r26737
1519	1519	{9, 29, 28},
1520	1520	{12, 31, 30},
1521	1521	{13, 27, 26},
1522		{14, 23, 22},
1523		{15, 19, 18},
1524		{16, 15, 14},
1525		{17, 11, 10},
	1522	{14, 23, 22},
	1523	{15, 19, 18},
	1524	{16, 15, 14},
	1525	{17, 11, 10},
1526	1526	{18, 7, 6},
1527	1527	{19, 3, 2}};
1528	1528
r26736	r26737
1674	1674	{19, 3, 2}}; /* Registered Output */
1675	1675
1676	1676	static pin_fuse_columns pal6l16pinfusecolumns[] = {
1677		{4, 1, 0},
1678		{5, 3, 2},
1679		{6, 5, 4},
1680		{7, 7, 6},
1681		{8, 9, 8},
1682		{9, 11, 10}};
	1677	{4, 1, 0},
	1678	{5, 3, 2},
	1679	{6, 5, 4},
	1680	{7, 7, 6},
	1681	{8, 9, 8},
	1682	{9, 11, 10}};
1683	1683
1684	1684	static pin_fuse_columns pal8l14pinfusecolumns[] = {
1685		{3, 1, 0},
1686		{4, 3, 2},
1687		{5, 5, 4},
1688		{6, 7, 6},
1689		{7, 9, 8},
1690		{8, 11, 10},
1691		{9, 13, 12},
1692		{10, 15, 14}};
	1685	{3, 1, 0},
	1686	{4, 3, 2},
	1687	{5, 5, 4},
	1688	{6, 7, 6},
	1689	{7, 9, 8},
	1690	{8, 11, 10},
	1691	{9, 13, 12},
	1692	{10, 15, 14}};
1693	1693
1694	1694	static pin_fuse_columns pal12h10pinfusecolumns[] = {
1695		{1, 3, 2},
1696		{2, 1, 0},
1697		{3, 5, 4},
1698		{4, 7, 6},
1699		{5, 9, 8},
1700		{6, 11, 10},
1701		{7, 13, 12},
1702		{8, 15, 14},
1703		{9, 17, 16},
1704		{10, 19, 18},
1705		{11, 21, 20},
1706		{13, 23, 22}};
	1695	{1, 3, 2},
	1696	{2, 1, 0},
	1697	{3, 5, 4},
	1698	{4, 7, 6},
	1699	{5, 9, 8},
	1700	{6, 11, 10},
	1701	{7, 13, 12},
	1702	{8, 15, 14},
	1703	{9, 17, 16},
	1704	{10, 19, 18},
	1705	{11, 21, 20},
	1706	{13, 23, 22}};
1707	1707
1708	1708	static pin_fuse_columns pal12l10pinfusecolumns[] = {
1709		{1, 3, 2},
1710		{2, 1, 0},
1711		{3, 5, 4},
1712		{4, 7, 6},
1713		{5, 9, 8},
1714		{6, 11, 10},
1715		{7, 13, 12},
1716		{8, 15, 14},
1717		{9, 17, 16},
1718		{10, 19, 18},
1719		{11, 21, 20},
1720		{13, 23, 22}};
	1709	{1, 3, 2},
	1710	{2, 1, 0},
	1711	{3, 5, 4},
	1712	{4, 7, 6},
	1713	{5, 9, 8},
	1714	{6, 11, 10},
	1715	{7, 13, 12},
	1716	{8, 15, 14},
	1717	{9, 17, 16},
	1718	{10, 19, 18},
	1719	{11, 21, 20},
	1720	{13, 23, 22}};
1721	1721
1722	1722	static pin_fuse_columns pal14h8pinfusecolumns[] = {
1723		{1, 3, 2},
1724		{2, 1, 0},
1725		{3, 5, 4},
1726		{4, 9, 8},
1727		{5, 11, 10},
1728		{6, 13, 12},
1729		{7, 15, 14},
1730		{8, 17, 16},
1731		{9, 19, 18},
1732		{10, 21, 20},
1733		{11, 25, 24},
1734		{13, 27, 26},
1735		{14, 23, 22},
1736		{23, 7, 6}};
	1723	{1, 3, 2},
	1724	{2, 1, 0},
	1725	{3, 5, 4},
	1726	{4, 9, 8},
	1727	{5, 11, 10},
	1728	{6, 13, 12},
	1729	{7, 15, 14},
	1730	{8, 17, 16},
	1731	{9, 19, 18},
	1732	{10, 21, 20},
	1733	{11, 25, 24},
	1734	{13, 27, 26},
	1735	{14, 23, 22},
	1736	{23, 7, 6}};
1737	1737
1738	1738	static pin_fuse_columns pal14l8pinfusecolumns[] = {
1739		{1, 3, 2},
1740		{2, 1, 0},
1741		{3, 5, 4},
1742		{4, 9, 8},
1743		{5, 11, 10},
1744		{6, 13, 12},
1745		{7, 15, 14},
1746		{8, 17, 16},
1747		{9, 19, 18},
1748		{10, 21, 20},
1749		{11, 25, 24},
1750		{13, 27, 26},
1751		{14, 23, 22},
1752		{23, 7, 6}};
	1739	{1, 3, 2},
	1740	{2, 1, 0},
	1741	{3, 5, 4},
	1742	{4, 9, 8},
	1743	{5, 11, 10},
	1744	{6, 13, 12},
	1745	{7, 15, 14},
	1746	{8, 17, 16},
	1747	{9, 19, 18},
	1748	{10, 21, 20},
	1749	{11, 25, 24},
	1750	{13, 27, 26},
	1751	{14, 23, 22},
	1752	{23, 7, 6}};
1753	1753
1754	1754	static pin_fuse_columns pal16h6pinfusecolumns[] = {
1755		{1, 3, 2},
1756		{2, 1, 0},
1757		{3, 5, 4},
1758		{4, 9, 8},
1759		{5, 13, 12},
1760		{6, 15, 14},
1761		{7, 17, 16},
1762		{8, 19, 18},
1763		{9, 21, 20},
1764		{10, 25, 24},
1765		{11, 29, 28},
1766		{13, 31, 30},
1767		{14, 27, 26},
1768		{15, 23, 22},
1769		{22, 11, 10},
1770		{23, 7, 6}};
	1755	{1, 3, 2},
	1756	{2, 1, 0},
	1757	{3, 5, 4},
	1758	{4, 9, 8},
	1759	{5, 13, 12},
	1760	{6, 15, 14},
	1761	{7, 17, 16},
	1762	{8, 19, 18},
	1763	{9, 21, 20},
	1764	{10, 25, 24},
	1765	{11, 29, 28},
	1766	{13, 31, 30},
	1767	{14, 27, 26},
	1768	{15, 23, 22},
	1769	{22, 11, 10},
	1770	{23, 7, 6}};
1771	1771
1772	1772	static pin_fuse_columns pal16l6pinfusecolumns[] = {
1773		{1, 3, 2},
1774		{2, 1, 0},
1775		{3, 5, 4},
1776		{4, 9, 8},
1777		{5, 13, 12},
1778		{6, 15, 14},
1779		{7, 17, 16},
1780		{8, 19, 18},
1781		{9, 21, 20},
1782		{10, 25, 24},
1783		{11, 29, 28},
1784		{13, 31, 30},
1785		{14, 27, 26},
1786		{15, 23, 22},
1787		{22, 11, 10},
1788		{23, 7, 6}};
	1773	{1, 3, 2},
	1774	{2, 1, 0},
	1775	{3, 5, 4},
	1776	{4, 9, 8},
	1777	{5, 13, 12},
	1778	{6, 15, 14},
	1779	{7, 17, 16},
	1780	{8, 19, 18},
	1781	{9, 21, 20},
	1782	{10, 25, 24},
	1783	{11, 29, 28},
	1784	{13, 31, 30},
	1785	{14, 27, 26},
	1786	{15, 23, 22},
	1787	{22, 11, 10},
	1788	{23, 7, 6}};
1789	1789
1790	1790	static pin_fuse_columns pal18h4pinfusecolumns[] = {
1791		{1, 3, 2},
1792		{2, 1, 0},
1793		{3, 5, 4},
1794		{4, 9, 8},
1795		{5, 13, 12},
1796		{6, 17, 16},
1797		{7, 19, 18},
1798		{8, 21, 20},
1799		{9, 25, 24},
1800		{10, 29, 28},
1801		{11, 33, 32},
1802		{13, 35, 34},
1803		{14, 31, 30},
1804		{15, 27, 26},
1805		{16, 23, 22},
1806		{21, 15, 14},
1807		{22, 11, 10},
1808		{23, 7, 6}};
	1791	{1, 3, 2},
	1792	{2, 1, 0},
	1793	{3, 5, 4},
	1794	{4, 9, 8},
	1795	{5, 13, 12},
	1796	{6, 17, 16},
	1797	{7, 19, 18},
	1798	{8, 21, 20},
	1799	{9, 25, 24},
	1800	{10, 29, 28},
	1801	{11, 33, 32},
	1802	{13, 35, 34},
	1803	{14, 31, 30},
	1804	{15, 27, 26},
	1805	{16, 23, 22},
	1806	{21, 15, 14},
	1807	{22, 11, 10},
	1808	{23, 7, 6}};
1809	1809
1810	1810	static pin_fuse_columns pal18l4pinfusecolumns[] = {
1811		{1, 3, 2},
1812		{2, 1, 0},
1813		{3, 5, 4},
1814		{4, 9, 8},
1815		{5, 13, 12},
1816		{6, 17, 16},
1817		{7, 19, 18},
1818		{8, 21, 20},
1819		{9, 25, 24},
1820		{10, 29, 28},
1821		{11, 33, 32},
1822		{13, 35, 34},
1823		{14, 31, 30},
1824		{15, 27, 26},
1825		{16, 23, 22},
1826		{21, 15, 14},
1827		{22, 11, 10},
1828		{23, 7, 6}};
	1811	{1, 3, 2},
	1812	{2, 1, 0},
	1813	{3, 5, 4},
	1814	{4, 9, 8},
	1815	{5, 13, 12},
	1816	{6, 17, 16},
	1817	{7, 19, 18},
	1818	{8, 21, 20},
	1819	{9, 25, 24},
	1820	{10, 29, 28},
	1821	{11, 33, 32},
	1822	{13, 35, 34},
	1823	{14, 31, 30},
	1824	{15, 27, 26},
	1825	{16, 23, 22},
	1826	{21, 15, 14},
	1827	{22, 11, 10},
	1828	{23, 7, 6}};
1829	1829
1830	1830	static pin_fuse_columns pal20c1pinfusecolumns[] = {
1831		{1, 3, 2},
1832		{2, 1, 0},
1833		{3, 5, 4},
1834		{4, 9, 8},
1835		{5, 13, 12},
1836		{6, 17, 16},
1837		{7, 21, 20},
1838		{8, 25, 24},
1839		{9, 29, 28},
1840		{10, 33, 32},
1841		{11, 37, 36},
1842		{13, 39, 38},
1843		{14, 35, 34},
1844		{15, 31, 30},
1845		{16, 27, 26},
1846		{17, 23, 22},
1847		{20, 19, 18},
1848		{21, 15, 14},
1849		{22, 11, 10},
1850		{23, 7, 6}};
	1831	{1, 3, 2},
	1832	{2, 1, 0},
	1833	{3, 5, 4},
	1834	{4, 9, 8},
	1835	{5, 13, 12},
	1836	{6, 17, 16},
	1837	{7, 21, 20},
	1838	{8, 25, 24},
	1839	{9, 29, 28},
	1840	{10, 33, 32},
	1841	{11, 37, 36},
	1842	{13, 39, 38},
	1843	{14, 35, 34},
	1844	{15, 31, 30},
	1845	{16, 27, 26},
	1846	{17, 23, 22},
	1847	{20, 19, 18},
	1848	{21, 15, 14},
	1849	{22, 11, 10},
	1850	{23, 7, 6}};
1851	1851
1852	1852	static pin_fuse_columns pal20l2pinfusecolumns[] = {
1853		{1, 3, 2},
1854		{2, 1, 0},
1855		{3, 5, 4},
1856		{4, 9, 8},
1857		{5, 13, 12},
1858		{6, 17, 16},
1859		{7, 21, 20},
1860		{8, 25, 24},
1861		{9, 29, 28},
1862		{10, 33, 32},
1863		{11, 37, 36},
1864		{13, 39, 38},
1865		{14, 35, 34},
1866		{15, 31, 30},
1867		{16, 27, 26},
1868		{17, 23, 22},
1869		{20, 19, 18},
1870		{21, 15, 14},
1871		{22, 11, 10},
1872		{23, 7, 6}};
	1853	{1, 3, 2},
	1854	{2, 1, 0},
	1855	{3, 5, 4},
	1856	{4, 9, 8},
	1857	{5, 13, 12},
	1858	{6, 17, 16},
	1859	{7, 21, 20},
	1860	{8, 25, 24},
	1861	{9, 29, 28},
	1862	{10, 33, 32},
	1863	{11, 37, 36},
	1864	{13, 39, 38},
	1865	{14, 35, 34},
	1866	{15, 31, 30},
	1867	{16, 27, 26},
	1868	{17, 23, 22},
	1869	{20, 19, 18},
	1870	{21, 15, 14},
	1871	{22, 11, 10},
	1872	{23, 7, 6}};
1873	1873
1874	1874	static pal_data paldata[] = {
1875	1875	{"PAL10L8", 320,
r26736	r26737
2124	2124	print_epl16rp6_product_terms,
2125	2125	config_epl16rp6_pins,
2126	2126	NULL,
2127		NULL},
	2127	NULL},
2128	2128	{"EPL16RP4", 2072,
2129	2129	epl16rp4pinfuserows, ARRAY_LEN(epl16rp4pinfuserows),
2130	2130	epl16rp4pinfusecolumns, ARRAY_LEN(epl16rp4pinfusecolumns),
2131	2131	print_epl16rp4_product_terms,
2132	2132	config_epl16rp4_pins,
2133	2133	NULL,
2134		NULL},
	2134	NULL},
2135	2135	#endif
2136	2136	{"PAL10P8", 328,
2137	2137	pal10p8pinfuserows, ARRAY_LEN(pal10p8pinfuserows),
r26736	r26737
2139	2139	print_pal10p8_product_terms,
2140	2140	config_pal10p8_pins,
2141	2141	NULL,
2142		NULL},
	2142	NULL},
2143	2143	{"PAL12P6", 390,
2144	2144	pal12p6pinfuserows, ARRAY_LEN(pal12p6pinfuserows),
2145	2145	pal12p6pinfusecolumns, ARRAY_LEN(pal12p6pinfusecolumns),
2146	2146	print_pal12p6_product_terms,
2147	2147	config_pal12p6_pins,
2148	2148	NULL,
2149		NULL},
	2149	NULL},
2150	2150	{"PAL14P4", 452,
2151	2151	pal14p4pinfuserows, ARRAY_LEN(pal14p4pinfuserows),
2152	2152	pal14p4pinfusecolumns, ARRAY_LEN(pal14p4pinfusecolumns),
2153	2153	print_pal14p4_product_terms,
2154	2154	config_pal14p4_pins,
2155	2155	NULL,
2156		NULL},
	2156	NULL},
2157	2157	{"PAL16P2", 514,
2158	2158	pal16p2pinfuserows, ARRAY_LEN(pal16p2pinfuserows),
2159	2159	pal16p2pinfusecolumns, ARRAY_LEN(pal16p2pinfusecolumns),
2160	2160	print_pal16p2_product_terms,
2161	2161	config_pal16p2_pins,
2162	2162	NULL,
2163		NULL},
	2163	NULL},
2164	2164	{"PAL16P8", 2056,
2165	2165	pal16p8pinfuserows, ARRAY_LEN(pal16p8pinfuserows),
2166	2166	pal16p8pinfusecolumns, ARRAY_LEN(pal16p8pinfusecolumns),
2167	2167	print_pal16p8_product_terms,
2168		config_pal16p8_pins,
2169		NULL,
2170		NULL},
	2168	config_pal16p8_pins,
	2169	NULL,
	2170	NULL},
2171	2171	{"PAL16RP4", 2056,
2172	2172	pal16rp4pinfuserows, ARRAY_LEN(pal16rp4pinfuserows),
2173	2173	pal16rp4pinfusecolumns, ARRAY_LEN(pal16rp4pinfusecolumns),
2174	2174	print_pal16rp4_product_terms,
2175		config_pal16rp4_pins,
2176		NULL,
2177		NULL},
	2175	config_pal16rp4_pins,
	2176	NULL,
	2177	NULL},
2178	2178	{"PAL16RP6", 2056,
2179	2179	pal16rp6pinfuserows, ARRAY_LEN(pal16rp6pinfuserows),
2180	2180	pal16rp6pinfusecolumns, ARRAY_LEN(pal16rp6pinfusecolumns),
2181	2181	print_pal16rp6_product_terms,
2182		config_pal16rp6_pins,
2183		NULL,
2184		NULL},
	2182	config_pal16rp6_pins,
	2183	NULL,
	2184	NULL},
2185	2185	{"PAL16RP8", 2056,
2186	2186	pal16rp8pinfuserows, ARRAY_LEN(pal16rp8pinfuserows),
2187	2187	pal16rp8pinfusecolumns, ARRAY_LEN(pal16rp8pinfusecolumns),
2188	2188	print_pal16rp8_product_terms,
2189		config_pal16rp8_pins,
2190		NULL,
2191		NULL},
2192		{"PAL6L16", 192,
2193		pal6l16pinfuserows, ARRAY_LEN(pal6l16pinfuserows),
2194		pal6l16pinfusecolumns, ARRAY_LEN(pal6l16pinfusecolumns),
2195		print_pal6l16_product_terms,
2196		config_pal6l16_pins,
2197		NULL,
2198		NULL},
2199		{"PAL8L14", 224,
2200		pal8l14pinfuserows, ARRAY_LEN(pal8l14pinfuserows),
2201		pal8l14pinfusecolumns, ARRAY_LEN(pal8l14pinfusecolumns),
2202		print_pal8l14_product_terms,
2203		config_pal8l14_pins,
2204		NULL,
2205		NULL},
2206		{"PAL12H10", 480,
2207		pal12h10pinfuserows, ARRAY_LEN(pal12h10pinfuserows),
2208		pal12h10pinfusecolumns, ARRAY_LEN(pal12h10pinfusecolumns),
2209		print_pal12h10_product_terms,
2210		config_pal12h10_pins,
2211		NULL,
2212		NULL},
2213		{"PAL12L10", 480,
2214		pal12l10pinfuserows, ARRAY_LEN(pal12l10pinfuserows),
2215		pal12l10pinfusecolumns, ARRAY_LEN(pal12l10pinfusecolumns),
2216		print_pal12l10_product_terms,
2217		config_pal12l10_pins,
2218		NULL,
2219		NULL},
2220		{"PAL14H8", 560,
2221		pal14h8pinfuserows, ARRAY_LEN(pal14h8pinfuserows),
2222		pal14h8pinfusecolumns, ARRAY_LEN(pal14h8pinfusecolumns),
2223		print_pal14h8_product_terms,
2224		config_pal14h8_pins,
2225		NULL,
2226		NULL},
2227		{"PAL14L8", 560,
2228		pal14l8pinfuserows, ARRAY_LEN(pal14l8pinfuserows),
2229		pal14l8pinfusecolumns, ARRAY_LEN(pal14l8pinfusecolumns),
2230		print_pal14l8_product_terms,
2231		config_pal14l8_pins,
2232		NULL,
2233		NULL},
2234		{"PAL16H6", 640,
2235		pal16h6pinfuserows, ARRAY_LEN(pal16h6pinfuserows),
2236		pal16h6pinfusecolumns, ARRAY_LEN(pal16h6pinfusecolumns),
2237		print_pal16h6_product_terms,
2238		config_pal16h6_pins,
2239		NULL,
2240		NULL},
2241		{"PAL16L6", 640,
2242		pal16l6pinfuserows, ARRAY_LEN(pal16l6pinfuserows),
2243		pal16l6pinfusecolumns, ARRAY_LEN(pal16l6pinfusecolumns),
2244		print_pal16l6_product_terms,
2245		config_pal16l6_pins,
2246		NULL,
2247		NULL},
2248		{"PAL18H4", 720,
2249		pal18h4pinfuserows, ARRAY_LEN(pal18h4pinfuserows),
2250		pal18h4pinfusecolumns, ARRAY_LEN(pal18h4pinfusecolumns),
2251		print_pal18h4_product_terms,
2252		config_pal18h4_pins,
2253		NULL,
2254		NULL},
2255		{"PAL18L4", 720,
2256		pal18l4pinfuserows, ARRAY_LEN(pal18l4pinfuserows),
2257		pal18l4pinfusecolumns, ARRAY_LEN(pal18l4pinfusecolumns),
2258		print_pal18l4_product_terms,
2259		config_pal18l4_pins,
2260		NULL,
2261		NULL},
2262		{"PAL20C1", 640,
2263		pal20c1pinfuserows, ARRAY_LEN(pal20c1pinfuserows),
2264		pal20c1pinfusecolumns, ARRAY_LEN(pal20c1pinfusecolumns),
2265		print_pal20c1_product_terms,
2266		config_pal20c1_pins,
2267		NULL,
2268		NULL},
2269		{"PAL20L2", 640,
2270		pal20l2pinfuserows, ARRAY_LEN(pal20l2pinfuserows),
2271		pal20l2pinfusecolumns, ARRAY_LEN(pal20l2pinfusecolumns),
2272		print_pal20l2_product_terms,
2273		config_pal20l2_pins,
2274		NULL,
2275		NULL}};
	2189	config_pal16rp8_pins,
	2190	NULL,
	2191	NULL},
	2192	{"PAL6L16", 192,
	2193	pal6l16pinfuserows, ARRAY_LEN(pal6l16pinfuserows),
	2194	pal6l16pinfusecolumns, ARRAY_LEN(pal6l16pinfusecolumns),
	2195	print_pal6l16_product_terms,
	2196	config_pal6l16_pins,
	2197	NULL,
	2198	NULL},
	2199	{"PAL8L14", 224,
	2200	pal8l14pinfuserows, ARRAY_LEN(pal8l14pinfuserows),
	2201	pal8l14pinfusecolumns, ARRAY_LEN(pal8l14pinfusecolumns),
	2202	print_pal8l14_product_terms,
	2203	config_pal8l14_pins,
	2204	NULL,
	2205	NULL},
	2206	{"PAL12H10", 480,
	2207	pal12h10pinfuserows, ARRAY_LEN(pal12h10pinfuserows),
	2208	pal12h10pinfusecolumns, ARRAY_LEN(pal12h10pinfusecolumns),
	2209	print_pal12h10_product_terms,
	2210	config_pal12h10_pins,
	2211	NULL,
	2212	NULL},
	2213	{"PAL12L10", 480,
	2214	pal12l10pinfuserows, ARRAY_LEN(pal12l10pinfuserows),
	2215	pal12l10pinfusecolumns, ARRAY_LEN(pal12l10pinfusecolumns),
	2216	print_pal12l10_product_terms,
	2217	config_pal12l10_pins,
	2218	NULL,
	2219	NULL},
	2220	{"PAL14H8", 560,
	2221	pal14h8pinfuserows, ARRAY_LEN(pal14h8pinfuserows),
	2222	pal14h8pinfusecolumns, ARRAY_LEN(pal14h8pinfusecolumns),
	2223	print_pal14h8_product_terms,
	2224	config_pal14h8_pins,
	2225	NULL,
	2226	NULL},
	2227	{"PAL14L8", 560,
	2228	pal14l8pinfuserows, ARRAY_LEN(pal14l8pinfuserows),
	2229	pal14l8pinfusecolumns, ARRAY_LEN(pal14l8pinfusecolumns),
	2230	print_pal14l8_product_terms,
	2231	config_pal14l8_pins,
	2232	NULL,
	2233	NULL},
	2234	{"PAL16H6", 640,
	2235	pal16h6pinfuserows, ARRAY_LEN(pal16h6pinfuserows),
	2236	pal16h6pinfusecolumns, ARRAY_LEN(pal16h6pinfusecolumns),
	2237	print_pal16h6_product_terms,
	2238	config_pal16h6_pins,
	2239	NULL,
	2240	NULL},
	2241	{"PAL16L6", 640,
	2242	pal16l6pinfuserows, ARRAY_LEN(pal16l6pinfuserows),
	2243	pal16l6pinfusecolumns, ARRAY_LEN(pal16l6pinfusecolumns),
	2244	print_pal16l6_product_terms,
	2245	config_pal16l6_pins,
	2246	NULL,
	2247	NULL},
	2248	{"PAL18H4", 720,
	2249	pal18h4pinfuserows, ARRAY_LEN(pal18h4pinfuserows),
	2250	pal18h4pinfusecolumns, ARRAY_LEN(pal18h4pinfusecolumns),
	2251	print_pal18h4_product_terms,
	2252	config_pal18h4_pins,
	2253	NULL,
	2254	NULL},
	2255	{"PAL18L4", 720,
	2256	pal18l4pinfuserows, ARRAY_LEN(pal18l4pinfuserows),
	2257	pal18l4pinfusecolumns, ARRAY_LEN(pal18l4pinfusecolumns),
	2258	print_pal18l4_product_terms,
	2259	config_pal18l4_pins,
	2260	NULL,
	2261	NULL},
	2262	{"PAL20C1", 640,
	2263	pal20c1pinfuserows, ARRAY_LEN(pal20c1pinfuserows),
	2264	pal20c1pinfusecolumns, ARRAY_LEN(pal20c1pinfusecolumns),
	2265	print_pal20c1_product_terms,
	2266	config_pal20c1_pins,
	2267	NULL,
	2268	NULL},
	2269	{"PAL20L2", 640,
	2270	pal20l2pinfuserows, ARRAY_LEN(pal20l2pinfuserows),
	2271	pal20l2pinfusecolumns, ARRAY_LEN(pal20l2pinfusecolumns),
	2272	print_pal20l2_product_terms,
	2273	config_pal20l2_pins,
	2274	NULL,
	2275	NULL}};
2276	2276
2277	2277	/***************************************************************************
2278	2278	CORE IMPLEMENTATION
r26736	r26737
2976	2976
2977	2977	static void config_palce16v8_pin_as_7_product_terms_and_oe_term(UINT16 pin)
2978	2978	{
2979		static pin_fuse_rows pinfuserows[] = {
2980		{12, 1792, 1824, 2016},
2981		{13, 1536, 1568, 1760},
2982		{14, 1280, 1312, 1504},
2983		{15, 1024, 1056, 1248},
2984		{16, 768, 800, 992},
2985		{17, 512, 544, 736},
2986		{18, 256, 288, 480},
2987		{19, 0, 32, 224}};
2988		UINT16 index;
	2979	static pin_fuse_rows pinfuserows[] = {
	2980	{12, 1792, 1824, 2016},
	2981	{13, 1536, 1568, 1760},
	2982	{14, 1280, 1312, 1504},
	2983	{15, 1024, 1056, 1248},
	2984	{16, 768, 800, 992},
	2985	{17, 512, 544, 736},
	2986	{18, 256, 288, 480},
	2987	{19, 0, 32, 224}};
	2988	UINT16 index;
2989	2989
2990		for (index = 0; index < ARRAY_LEN(pinfuserows); ++index)
2991		{
2992		if (pinfuserows[index].pin == pin)
2993		{
2994		palce16v8pinfuserows[index].fuserowoutputenable = pinfuserows[index].fuserowoutputenable;
2995		palce16v8pinfuserows[index].fuserowtermstart = pinfuserows[index].fuserowtermstart;
2996		palce16v8pinfuserows[index].fuserowtermend = pinfuserows[index].fuserowtermend;
	2990	for (index = 0; index < ARRAY_LEN(pinfuserows); ++index)
	2991	{
	2992	if (pinfuserows[index].pin == pin)
	2993	{
	2994	palce16v8pinfuserows[index].fuserowoutputenable = pinfuserows[index].fuserowoutputenable;
	2995	palce16v8pinfuserows[index].fuserowtermstart = pinfuserows[index].fuserowtermstart;
	2996	palce16v8pinfuserows[index].fuserowtermend = pinfuserows[index].fuserowtermend;
2997	2997
2998		break;
2999		}
3000		}
	2998	break;
	2999	}
	3000	}
3001	3001	}
3002	3002
3003	3003
r26736	r26737
3010	3010
3011	3011	static void config_palce16v8_pin_as_8_product_terms(UINT16 pin)
3012	3012	{
3013		static pin_fuse_rows pinfuserows[] = {
3014		{12, NO_OUTPUT_ENABLE_FUSE_ROW, 1792, 2016},
3015		{13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760},
3016		{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504},
3017		{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248},
3018		{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},
3019		{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},
3020		{18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},
3021		{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};
3022		UINT16 index;
	3013	static pin_fuse_rows pinfuserows[] = {
	3014	{12, NO_OUTPUT_ENABLE_FUSE_ROW, 1792, 2016},
	3015	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760},
	3016	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504},
	3017	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248},
	3018	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},
	3019	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},
	3020	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},
	3021	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};
	3022	UINT16 index;
3023	3023
3024		for (index = 0; index < ARRAY_LEN(pinfuserows); ++index)
3025		{
3026		if (pinfuserows[index].pin == pin)
3027		{
3028		palce16v8pinfuserows[index].fuserowoutputenable = pinfuserows[index].fuserowoutputenable;
3029		palce16v8pinfuserows[index].fuserowtermstart = pinfuserows[index].fuserowtermstart;
3030		palce16v8pinfuserows[index].fuserowtermend = pinfuserows[index].fuserowtermend;
	3024	for (index = 0; index < ARRAY_LEN(pinfuserows); ++index)
	3025	{
	3026	if (pinfuserows[index].pin == pin)
	3027	{
	3028	palce16v8pinfuserows[index].fuserowoutputenable = pinfuserows[index].fuserowoutputenable;
	3029	palce16v8pinfuserows[index].fuserowtermstart = pinfuserows[index].fuserowtermstart;
	3030	palce16v8pinfuserows[index].fuserowtermend = pinfuserows[index].fuserowtermend;
3031	3031
3032		break;
3033		}
3034		}
	3032	break;
	3033	}
	3034	}
3035	3035	}
3036	3036
3037	3037
r26736	r26737
3061	3061
3062	3062	indent = 0;
3063	3063
3064		if (flags & OUTPUT_COMBINATORIAL)
3065		{
3066		sprintf(buffer, LOW_SYMBOL OUTPUT_SYMBOL "%d " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
	3064	if (flags & OUTPUT_COMBINATORIAL)
	3065	{
	3066	sprintf(buffer, LOW_SYMBOL OUTPUT_SYMBOL "%d " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
3067	3067
3068		printf("%s", buffer);
	3068	printf("%s", buffer);
3069	3069
3070		haveterms = 0;
3071		indent += strlen(buffer);
	3070	haveterms = 0;
	3071	indent += strlen(buffer);
3072	3072
3073		fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
	3073	fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
3074	3074
3075		for (row = fuse_rows->fuserowtermstart; row <= fuse_rows->fuserowtermend;
3076		row += columncount)
3077		{
	3075	for (row = fuse_rows->fuserowtermstart; row <= fuse_rows->fuserowtermend;
	3076	row += columncount)
	3077	{
3078	3078	generate_product_terms(pal, jed, row, buffer);
3079	3079
3080	3080	if (strlen(buffer) > 0)
r26736	r26737
3082	3082	if (haveterms)
3083	3083	{
3084	3084	printf(" ");
3085		printf(OR_SYMBOL);
3086		printf("\n");
	3085	printf(OR_SYMBOL);
	3086	printf("\n");
3087	3087
3088	3088	for (indentindex = 0; indentindex < indent; ++indentindex)
3089	3089	{
r26736	r26737
3097	3097
3098	3098	printf("%s", buffer);
3099	3099	}
3100		}
	3100	}
3101	3101
3102		printf("\n");
	3102	printf("\n");
3103	3103
3104		/* output enable equation */
	3104	/* output enable equation */
3105	3105
3106		printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
	3106	printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " ", outputpins[index].pin);
3107	3107
3108		if (all_fuses_in_row_blown(pal, jed, fuse_rows->fuserowoutputenable))
3109		{
3110		printf("vcc\n");
3111		}
3112		else
3113		{
3114		generate_product_terms(pal, jed, fuse_rows->fuserowoutputenable, buffer);
	3108	if (all_fuses_in_row_blown(pal, jed, fuse_rows->fuserowoutputenable))
	3109	{
	3110	printf("vcc\n");
	3111	}
	3112	else
	3113	{
	3114	generate_product_terms(pal, jed, fuse_rows->fuserowoutputenable, buffer);
3115	3115
3116		printf("%s\n", buffer);
3117		}
3118		}
3119		else if (flags & OUTPUT_REGISTERED)
3120		{
3121		sprintf(buffer, LOW_SYMBOL REGISTERED_FEEDBACK_SYMBOL "%d " REGISTERED_ASSIGNMENT " ", outputpins[index].pin);
	3116	printf("%s\n", buffer);
	3117	}
	3118	}
	3119	else if (flags & OUTPUT_REGISTERED)
	3120	{
	3121	sprintf(buffer, LOW_SYMBOL REGISTERED_FEEDBACK_SYMBOL "%d " REGISTERED_ASSIGNMENT " ", outputpins[index].pin);
3122	3122
3123		printf("%s", buffer);
	3123	printf("%s", buffer);
3124	3124
3125		haveterms = 0;
3126		indent += strlen(buffer);
	3125	haveterms = 0;
	3126	indent += strlen(buffer);
3127	3127
3128		fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
3129		tmpindex = 0;
	3128	fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
	3129	tmpindex = 0;
3130	3130
3131		memset(rowhasterms, 0, sizeof(rowhasterms));
	3131	memset(rowhasterms, 0, sizeof(rowhasterms));
3132	3132
3133		for (row = fuse_rows->fuserowtermstart; row <= fuse_rows->fuserowtermend;
3134		row += columncount)
3135		{
	3133	for (row = fuse_rows->fuserowtermstart; row <= fuse_rows->fuserowtermend;
	3134	row += columncount)
	3135	{
3136	3136	generate_product_terms(pal, jed, row, buffer);
3137	3137
3138	3138	if (strlen(buffer) > 0)
3139		{
3140		rowhasterms[tmpindex] = 1;
	3139	{
	3140	rowhasterms[tmpindex] = 1;
3141	3141
3142	3142	if (haveterms)
3143	3143	{
3144		if (tmpindex == 1)
3145		{
3146		printf(" " OR_SYMBOL "\n");
3147		}
3148		else if (tmpindex == 2)
3149		{
3150		printf(" " XOR_SYMBOL "\n");
3151		}
3152		else if (tmpindex == 3)
3153		{
3154		if (rowhasterms[2])
3155		{
3156		printf(" " OR_SYMBOL "\n");
3157		}
3158		else
3159		{
3160		printf(" " XOR_SYMBOL "\n");
3161		}
3162		}
	3144	if (tmpindex == 1)
	3145	{
	3146	printf(" " OR_SYMBOL "\n");
	3147	}
	3148	else if (tmpindex == 2)
	3149	{
	3150	printf(" " XOR_SYMBOL "\n");
	3151	}
	3152	else if (tmpindex == 3)
	3153	{
	3154	if (rowhasterms[2])
	3155	{
	3156	printf(" " OR_SYMBOL "\n");
	3157	}
	3158	else
	3159	{
	3160	printf(" " XOR_SYMBOL "\n");
	3161	}
	3162	}
3163	3163
3164	3164	for (indentindex = 0; indentindex < indent; ++indentindex)
3165	3165	{
r26736	r26737
3172	3172	}
3173	3173
3174	3174	printf("%s", buffer);
3175		}
	3175	}
3176	3176
3177		++tmpindex;
3178		}
	3177	++tmpindex;
	3178	}
3179	3179
3180		printf("\n");
	3180	printf("\n");
3181	3181
3182		/* output enable equation */
	3182	/* output enable equation */
3183	3183
3184		printf(REGISTERED_FEEDBACK_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " OE\n", outputpins[index].pin);
3185		}
3186		else
3187		{
3188		fprintf(stderr, "Unknown output type for pin %d!\n", outputpins[index].pin);
3189		}
	3184	printf(REGISTERED_FEEDBACK_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " OE\n", outputpins[index].pin);
	3185	}
	3186	else
	3187	{
	3188	fprintf(stderr, "Unknown output type for pin %d!\n", outputpins[index].pin);
	3189	}
3190	3190
3191		printf("\n");
	3191	printf("\n");
3192	3192	}
3193	3193	}
3194	3194
r26736	r26737
3706	3706	{
3707	3707	if (haveterms)
3708	3708	{
3709		printf(" " OR_SYMBOL "\n");
	3709	printf(" " OR_SYMBOL "\n");
3710	3710
3711	3711	for (indentindex = 0; indentindex < indent; ++indentindex)
3712	3712	{
r26736	r26737
3761	3761	{
3762	3762	UINT16 pin;
3763	3763	UINT16 or_fuse; /* 0 - intact? */
3764		UINT16 xor_fuse; /* 0 - intact? */
	3764	UINT16 xor_fuse; /* 0 - intact? */
3765	3765	};
3766	3766
3767		static memory_cell memory_cells[] = {
3768		{12, 661, 662},
3769		{13, 658, 659},
3770		{14, 655, 656},
3771		{15, 652, 653},
3772		{16, 649, 650},
3773		{17, 646, 647},
3774		{18, 643, 644},
3775		{19, 640, 641}};
	3767	static memory_cell memory_cells[] = {
	3768	{12, 661, 662},
	3769	{13, 658, 659},
	3770	{14, 655, 656},
	3771	{15, 652, 653},
	3772	{16, 649, 650},
	3773	{17, 646, 647},
	3774	{18, 643, 644},
	3775	{19, 640, 641}};
3776	3776	UINT16 index, columncount, flags, haveterms, fuserow;
3777	3777	char buffer[200];
3778	3778	int indent, row, indentindex;
3779	3779	const pin_fuse_rows* fuse_rows;
3780	3780
3781		printf("Warning: This is experimental support!\n");
	3781	printf("Warning: This is experimental support!\n");
3782	3782
3783	3783	columncount = calc_fuse_column_count(pal);
3784	3784
r26736	r26737
3786	3786	print_output_pins();
3787	3787
3788	3788	printf("Equations:\n\n");
3789
3790		for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
3791		{
	3789
	3790	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	3791	{
3792	3792	flags = outputpins[index].flags;
3793	3793
3794	3794	indent = 0;
r26736	r26737
3810	3810	fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
3811	3811
3812	3812	if (!jed_get_fuse(jed, memory_cells[index].or_fuse) \|\|
3813		!jed_get_fuse(jed, memory_cells[index].xor_fuse))
3814		{
3815		/* MMI PAL pin compatible configuration */
	3813	!jed_get_fuse(jed, memory_cells[index].xor_fuse))
	3814	{
	3815	/* MMI PAL pin compatible configuration */
3816	3816
3817		fuserow = fuse_rows->fuserowtermstart;
	3817	fuserow = fuse_rows->fuserowtermstart;
3818	3818
3819		for (row = 0; row < 2; ++row)
3820		{
	3819	for (row = 0; row < 2; ++row)
	3820	{
3821	3821	generate_product_terms(pal, jed, fuserow, buffer);
3822	3822
3823	3823	if (strlen(buffer) > 0)
3824	3824	{
3825	3825	if (haveterms)
3826	3826	{
3827		printf(" " OR_SYMBOL "\n");
	3827	printf(" " OR_SYMBOL "\n");
3828	3828
3829	3829	for (indentindex = 0; indentindex < indent; ++indentindex)
3830	3830	{
r26736	r26737
3839	3839	printf("%s", buffer);
3840	3840	}
3841	3841
3842		fuserow += columncount;
3843		}
	3842	fuserow += columncount;
	3843	}
3844	3844
3845		printf("\n");
	3845	printf("\n");
3846	3846
3847		printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " vcc\n", outputpins[index].pin);
	3847	printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " vcc\n", outputpins[index].pin);
3848	3848
3849		printf("\n");
3850		}
	3849	printf("\n");
	3850	}
3851	3851	else if (!jed_get_fuse(jed, memory_cells[index].or_fuse) \|\|
3852		jed_get_fuse(jed, memory_cells[index].xor_fuse))
3853		{
3854		/* or configuration */
	3852	jed_get_fuse(jed, memory_cells[index].xor_fuse))
	3853	{
	3854	/* or configuration */
3855	3855
3856		fuserow = fuse_rows->fuserowtermstart;
	3856	fuserow = fuse_rows->fuserowtermstart;
3857	3857
3858		for (row = 0; row < 4; ++row)
3859		{
	3858	for (row = 0; row < 4; ++row)
	3859	{
3860	3860	generate_product_terms(pal, jed, fuserow, buffer);
3861	3861
3862	3862	if (strlen(buffer) > 0)
3863	3863	{
3864	3864	if (haveterms)
3865	3865	{
3866		printf(" " OR_SYMBOL "\n");
	3866	printf(" " OR_SYMBOL "\n");
3867	3867
3868	3868	for (indentindex = 0; indentindex < indent; ++indentindex)
3869	3869	{
r26736	r26737
3878	3878	printf("%s", buffer);
3879	3879	}
3880	3880
3881		fuse_rows += columncount;
3882		}
	3881	fuse_rows += columncount;
	3882	}
3883	3883
3884		printf("\n");
	3884	printf("\n");
3885	3885
3886		printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " vcc\n", outputpins[index].pin);
	3886	printf(OUTPUT_SYMBOL "%d.oe " COMBINATORIAL_ASSIGNMENT " vcc\n", outputpins[index].pin);
3887	3887
3888		printf("\n");
3889		}
	3888	printf("\n");
	3889	}
3890	3890	else if (jed_get_fuse(jed, memory_cells[index].or_fuse) \|\|
3891		!jed_get_fuse(jed, memory_cells[index].xor_fuse))
3892		{
3893		/* xor configuration */
3894		}
3895		else
3896		{
3897		fprintf(stderr, "Unknown fuse configuration for pin %d!", memory_cells[index].pin);
3898		}
3899		}
	3891	!jed_get_fuse(jed, memory_cells[index].xor_fuse))
	3892	{
	3893	/* xor configuration */
	3894	}
	3895	else
	3896	{
	3897	fprintf(stderr, "Unknown fuse configuration for pin %d!", memory_cells[index].pin);
	3898	}
	3899	}
3900	3900
3901		printf("Warning: This is experimental support!\n");
	3901	printf("Warning: This is experimental support!\n");
3902	3902	}
3903	3903
3904	3904
r26736	r26737
3910	3910
3911	3911	static void print_epl12p6_product_terms(const pal_data* pal, const jed_data* jed)
3912	3912	{
3913		fprintf(stderr, "Printing product terms not supported for this device!\n");
	3913	fprintf(stderr, "Printing product terms not supported for this device!\n");
3914	3914	}
3915	3915
3916	3916
r26736	r26737
3922	3922
3923	3923	static void print_epl14p4_product_terms(const pal_data* pal, const jed_data* jed)
3924	3924	{
3925		fprintf(stderr, "Printing product terms not supported for this device!\n");
	3925	fprintf(stderr, "Printing product terms not supported for this device!\n");
3926	3926	}
3927	3927
3928	3928
r26736	r26737
3934	3934
3935	3935	static void print_epl16p2_product_terms(const pal_data* pal, const jed_data* jed)
3936	3936	{
3937		fprintf(stderr, "Printing product terms not supported for this device!\n");
	3937	fprintf(stderr, "Printing product terms not supported for this device!\n");
3938	3938	}
3939	3939
3940	3940
r26736	r26737
3946	3946
3947	3947	static void print_epl16p8_product_terms(const pal_data* pal, const jed_data* jed)
3948	3948	{
3949		fprintf(stderr, "Printing product terms not supported for this device!\n");
	3949	fprintf(stderr, "Printing product terms not supported for this device!\n");
3950	3950	}
3951	3951
3952	3952
r26736	r26737
3958	3958
3959	3959	static void print_epl16rp8_product_terms(const pal_data* pal, const jed_data* jed)
3960	3960	{
3961		fprintf(stderr, "Printing product terms not supported for this device!\n");
	3961	fprintf(stderr, "Printing product terms not supported for this device!\n");
3962	3962	}
3963	3963
3964	3964
r26736	r26737
3970	3970
3971	3971	static void print_epl16rp6_product_terms(const pal_data* pal, const jed_data* jed)
3972	3972	{
3973		fprintf(stderr, "Printing product terms not supported for this device!\n");
	3973	fprintf(stderr, "Printing product terms not supported for this device!\n");
3974	3974	}
3975	3975
3976	3976
r26736	r26737
3982	3982
3983	3983	static void print_epl16rp4_product_terms(const pal_data* pal, const jed_data* jed)
3984	3984	{
3985		fprintf(stderr, "Printing product terms not supported for this device!\n");
	3985	fprintf(stderr, "Printing product terms not supported for this device!\n");
3986	3986	}
3987	3987	#endif
3988	3988
r26736	r26737
4091	4091
4092	4092	static void print_pal6l16_product_terms(const pal_data* pal, const jed_data* jed)
4093	4093	{
4094		print_product_terms(pal, jed);
	4094	print_product_terms(pal, jed);
4095	4095	}
4096	4096
4097	4097
r26736	r26737
4585	4585	UINT16 pin;
4586	4586	UINT16 sl0_fuse; /* registers allowed (0 - registered, 1 - not registered) */
4587	4587	UINT16 sl1_fuse; /* output polarity (0 - low, 1 - high) */
4588		UINT16 fuserowoutputenable;
	4588	UINT16 fuserowoutputenable;
4589	4589	};
4590	4590
4591	4591	static output_logic_macrocell macrocells[] = {
r26736	r26737
4598	4598	{18, 2121, 2049, 256},
4599	4599	{19, 2120, 2048, 0}};
4600	4600	static pin_fuse_columns pinfusecolumns_i_or_o[] = {
4601		{1, 3, 2},
4602		{2, 1, 0},
4603		{3, 5, 4},
4604		{4, 9, 8},
4605		{5, 13, 12},
4606		{6, 17, 16},
4607		{7, 21, 20},
4608		{8, 25, 24},
4609		{9, 29, 28},
4610		{11, 31, 30},
4611		{12, 27, 26},
4612		{13, 23, 22},
4613		{14, 19, 18},
4614		{17, 15, 14},
4615		{18, 11, 10},
4616		{19, 7, 6}};
	4601	{1, 3, 2},
	4602	{2, 1, 0},
	4603	{3, 5, 4},
	4604	{4, 9, 8},
	4605	{5, 13, 12},
	4606	{6, 17, 16},
	4607	{7, 21, 20},
	4608	{8, 25, 24},
	4609	{9, 29, 28},
	4610	{11, 31, 30},
	4611	{12, 27, 26},
	4612	{13, 23, 22},
	4613	{14, 19, 18},
	4614	{17, 15, 14},
	4615	{18, 11, 10},
	4616	{19, 7, 6}};
4617	4617	static pin_fuse_columns pinfusecolumns_io[] = {
4618		{1, 3, 2},
4619		{2, 1, 0},
4620		{3, 5, 4},
4621		{4, 9, 8},
4622		{5, 13, 12},
4623		{6, 17, 16},
4624		{7, 21, 20},
4625		{8, 25, 24},
4626		{9, 29, 28},
4627		{11, 31, 30},
4628		{13, 27, 26},
4629		{14, 23, 22},
4630		{15, 19, 18},
4631		{16, 15, 14},
4632		{17, 11, 10},
4633		{18, 7, 6}};
	4618	{1, 3, 2},
	4619	{2, 1, 0},
	4620	{3, 5, 4},
	4621	{4, 9, 8},
	4622	{5, 13, 12},
	4623	{6, 17, 16},
	4624	{7, 21, 20},
	4625	{8, 25, 24},
	4626	{9, 29, 28},
	4627	{11, 31, 30},
	4628	{13, 27, 26},
	4629	{14, 23, 22},
	4630	{15, 19, 18},
	4631	{16, 15, 14},
	4632	{17, 11, 10},
	4633	{18, 7, 6}};
4634	4634	static pin_fuse_columns pinfusecolumns_regs[] = {
4635		{2, 1, 0},
4636		{3, 5, 4},
4637		{4, 9, 8},
4638		{5, 13, 12},
4639		{6, 17, 16},
4640		{7, 21, 20},
4641		{8, 25, 24},
4642		{9, 29, 28},
4643		{12, 31, 30},
4644		{13, 27, 26},
4645		{14, 23, 22},
4646		{15, 19, 18},
4647		{16, 15, 14},
4648		{17, 11, 10},
4649		{18, 7, 6},
4650		{19, 3, 2}};
4651		static UINT16 input_pins_i_or_o[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
4652		static UINT16 input_pins_io[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
4653		static UINT16 input_pins_regs[] = {2, 3, 4, 5, 6, 7, 8, 9};
4654		static UINT16 sg0 = 2192;
4655		static UINT16 sg1 = 2193;
4656		UINT16 input_pins[18];
4657		pin_output_config output_pins[ARRAY_LEN(macrocells)];
4658		UINT16 index, input_pin_count, output_pin_count;
	4635	{2, 1, 0},
	4636	{3, 5, 4},
	4637	{4, 9, 8},
	4638	{5, 13, 12},
	4639	{6, 17, 16},
	4640	{7, 21, 20},
	4641	{8, 25, 24},
	4642	{9, 29, 28},
	4643	{12, 31, 30},
	4644	{13, 27, 26},
	4645	{14, 23, 22},
	4646	{15, 19, 18},
	4647	{16, 15, 14},
	4648	{17, 11, 10},
	4649	{18, 7, 6},
	4650	{19, 3, 2}};
	4651	static UINT16 input_pins_i_or_o[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
	4652	static UINT16 input_pins_io[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
	4653	static UINT16 input_pins_regs[] = {2, 3, 4, 5, 6, 7, 8, 9};
	4654	static UINT16 sg0 = 2192;
	4655	static UINT16 sg1 = 2193;
	4656	UINT16 input_pins[18];
	4657	pin_output_config output_pins[ARRAY_LEN(macrocells)];
	4658	UINT16 index, input_pin_count, output_pin_count;
4659	4659
4660		input_pin_count = 0;
	4660	input_pin_count = 0;
4661	4661	output_pin_count = 0;
4662	4662
4663		if (!jed_get_fuse(jed, sg0))
4664		{
4665		/* Device uses registers */
	4663	if (!jed_get_fuse(jed, sg0))
	4664	{
	4665	/* Device uses registers */
4666	4666
4667		if (jed_get_fuse(jed, sg1))
4668		{
4669		memcpy(palce16v8pinfusecolumns, pinfusecolumns_regs, sizeof(pinfusecolumns_regs));
	4667	if (jed_get_fuse(jed, sg1))
	4668	{
	4669	memcpy(palce16v8pinfusecolumns, pinfusecolumns_regs, sizeof(pinfusecolumns_regs));
4670	4670
4671		memcpy(input_pins, input_pins_regs, sizeof(input_pins_regs));
	4671	memcpy(input_pins, input_pins_regs, sizeof(input_pins_regs));
4672	4672
4673		input_pin_count = ARRAY_LEN(input_pins_regs);
	4673	input_pin_count = ARRAY_LEN(input_pins_regs);
4674	4674
4675		for (index = 0; index < ARRAY_LEN(macrocells); ++index)
4676		{
4677		if (!jed_get_fuse(jed, macrocells[index].sl0_fuse))
4678		{
4679		/* Registered output */
	4675	for (index = 0; index < ARRAY_LEN(macrocells); ++index)
	4676	{
	4677	if (!jed_get_fuse(jed, macrocells[index].sl0_fuse))
	4678	{
	4679	/* Registered output */
4680	4680
4681		config_palce16v8_pin_as_8_product_terms(macrocells[index].pin);
	4681	config_palce16v8_pin_as_8_product_terms(macrocells[index].pin);
4682	4682
4683		output_pins[output_pin_count].pin = macrocells[index].pin;
4684		output_pins[output_pin_count].flags = OUTPUT_REGISTERED \| OUTPUT_FEEDBACK_REGISTERED;
	4683	output_pins[output_pin_count].pin = macrocells[index].pin;
	4684	output_pins[output_pin_count].flags = OUTPUT_REGISTERED \| OUTPUT_FEEDBACK_REGISTERED;
4685	4685
4686		if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
4687		{
4688		output_pins[output_pin_count].flags \|= OUTPUT_ACTIVELOW;
4689		}
4690		else
4691		{
4692		output_pins[output_pin_count].flags \|= OUTPUT_ACTIVEHIGH;
4693		}
	4686	if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
	4687	{
	4688	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVELOW;
	4689	}
	4690	else
	4691	{
	4692	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVEHIGH;
	4693	}
4694	4694
4695		++output_pin_count;
	4695	++output_pin_count;
4696	4696
4697		input_pins[input_pin_count] = macrocells[index].pin;
	4697	input_pins[input_pin_count] = macrocells[index].pin;
4698	4698
4699		++input_pin_count;
4700		}
4701		else
4702		{
4703		/* Combinatorial I/O */
	4699	++input_pin_count;
	4700	}
	4701	else
	4702	{
	4703	/* Combinatorial I/O */
4704	4704
4705		if (does_output_enable_fuse_row_allow_output(pal, jed, macrocells[index].fuserowoutputenable))
4706		{
4707		config_palce16v8_pin_as_7_product_terms_and_oe_term(macrocells[index].pin);
	4705	if (does_output_enable_fuse_row_allow_output(pal, jed, macrocells[index].fuserowoutputenable))
	4706	{
	4707	config_palce16v8_pin_as_7_product_terms_and_oe_term(macrocells[index].pin);
4708	4708
4709		output_pins[output_pin_count].pin = macrocells[index].pin;
4710		output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
	4709	output_pins[output_pin_count].pin = macrocells[index].pin;
	4710	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
4711	4711
4712		if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
4713		{
4714		output_pins[output_pin_count].flags \|= OUTPUT_ACTIVELOW;
4715		}
4716		else
4717		{
4718		output_pins[output_pin_count].flags \|= OUTPUT_ACTIVEHIGH;
4719		}
	4712	if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
	4713	{
	4714	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVELOW;
	4715	}
	4716	else
	4717	{
	4718	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVEHIGH;
	4719	}
4720	4720
4721		++output_pin_count;
4722		}
	4721	++output_pin_count;
	4722	}
4723	4723
4724		input_pins[input_pin_count] = macrocells[index].pin;
	4724	input_pins[input_pin_count] = macrocells[index].pin;
4725	4725
4726		++input_pin_count;
4727		}
4728		}
4729		}
4730		else
4731		{
4732		fprintf(stderr, "Unknown configuration type!\n");
4733		}
4734		}
4735		else
4736		{
4737		/* Device uses no registers */
	4726	++input_pin_count;
	4727	}
	4728	}
	4729	}
	4730	else
	4731	{
	4732	fprintf(stderr, "Unknown configuration type!\n");
	4733	}
	4734	}
	4735	else
	4736	{
	4737	/* Device uses no registers */
4738	4738
4739		if (jed_get_fuse(jed, sg1))
4740		{
4741		/* Combinatorial I/O (7 product terms and 1 output enable product term) */
	4739	if (jed_get_fuse(jed, sg1))
	4740	{
	4741	/* Combinatorial I/O (7 product terms and 1 output enable product term) */
4742	4742
4743		memcpy(palce16v8pinfusecolumns, pinfusecolumns_io, sizeof(pinfusecolumns_io));
	4743	memcpy(palce16v8pinfusecolumns, pinfusecolumns_io, sizeof(pinfusecolumns_io));
4744	4744
4745		memcpy(input_pins, input_pins_io, sizeof(input_pins_io));
	4745	memcpy(input_pins, input_pins_io, sizeof(input_pins_io));
4746	4746
4747		input_pin_count = ARRAY_LEN(input_pins_io);
	4747	input_pin_count = ARRAY_LEN(input_pins_io);
4748	4748
4749		for (index = 0; index < ARRAY_LEN(macrocells); ++index)
4750		{
4751		if (does_output_enable_fuse_row_allow_output(pal, jed, macrocells[index].fuserowoutputenable))
4752		{
4753		config_palce16v8_pin_as_7_product_terms_and_oe_term(macrocells[index].pin);
	4749	for (index = 0; index < ARRAY_LEN(macrocells); ++index)
	4750	{
	4751	if (does_output_enable_fuse_row_allow_output(pal, jed, macrocells[index].fuserowoutputenable))
	4752	{
	4753	config_palce16v8_pin_as_7_product_terms_and_oe_term(macrocells[index].pin);
4754	4754
4755		output_pins[output_pin_count].pin = macrocells[index].pin;
4756		output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
	4755	output_pins[output_pin_count].pin = macrocells[index].pin;
	4756	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
4757	4757
4758		if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
4759		{
4760		output_pins[output_pin_count].flags \|= OUTPUT_ACTIVELOW;
4761		}
4762		else
4763		{
4764		output_pins[output_pin_count].flags \|= OUTPUT_ACTIVEHIGH;
4765		}
	4758	if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
	4759	{
	4760	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVELOW;
	4761	}
	4762	else
	4763	{
	4764	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVEHIGH;
	4765	}
4766	4766
4767		++output_pin_count;
4768		}
	4767	++output_pin_count;
	4768	}
4769	4769
4770		/* Pins 12 and 19 cannot be used as an input only an output. */
	4770	/* Pins 12 and 19 cannot be used as an input only an output. */
4771	4771
4772		if (macrocells[index].pin != 12 && macrocells[index].pin != 19)
4773		{
4774		input_pins[input_pin_count] = macrocells[index].pin;
	4772	if (macrocells[index].pin != 12 && macrocells[index].pin != 19)
	4773	{
	4774	input_pins[input_pin_count] = macrocells[index].pin;
4775	4775
4776		++input_pin_count;
4777		}
4778		}
4779		}
4780		else
4781		{
4782		/* Combinatorial Output or Input */
	4776	++input_pin_count;
	4777	}
	4778	}
	4779	}
	4780	else
	4781	{
	4782	/* Combinatorial Output or Input */
4783	4783
4784		memcpy(palce16v8pinfusecolumns, pinfusecolumns_i_or_o, sizeof(pinfusecolumns_i_or_o));
	4784	memcpy(palce16v8pinfusecolumns, pinfusecolumns_i_or_o, sizeof(pinfusecolumns_i_or_o));
4785	4785
4786		memcpy(input_pins, input_pins_i_or_o, sizeof(input_pins_i_or_o));
	4786	memcpy(input_pins, input_pins_i_or_o, sizeof(input_pins_i_or_o));
4787	4787
4788		input_pin_count = ARRAY_LEN(input_pins_i_or_o);
	4788	input_pin_count = ARRAY_LEN(input_pins_i_or_o);
4789	4789
4790		for (index = 0; index < ARRAY_LEN(macrocells); ++index)
4791		{
4792		if (!jed_get_fuse(jed, macrocells[index].sl0_fuse))
4793		{
4794		/* pin configured as an output only */
	4790	for (index = 0; index < ARRAY_LEN(macrocells); ++index)
	4791	{
	4792	if (!jed_get_fuse(jed, macrocells[index].sl0_fuse))
	4793	{
	4794	/* pin configured as an output only */
4795	4795
4796		config_palce16v8_pin_as_8_product_terms(macrocells[index].pin);
	4796	config_palce16v8_pin_as_8_product_terms(macrocells[index].pin);
4797	4797
4798		output_pins[output_pin_count].pin = macrocells[index].pin;
4799		output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
	4798	output_pins[output_pin_count].pin = macrocells[index].pin;
	4799	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
4800	4800
4801		if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
4802		{
4803		output_pins[output_pin_count].flags \|= OUTPUT_ACTIVELOW;
4804		}
4805		else
4806		{
4807		output_pins[output_pin_count].flags \|= OUTPUT_ACTIVEHIGH;
4808		}
	4801	if (!jed_get_fuse(jed, macrocells[index].sl1_fuse))
	4802	{
	4803	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVELOW;
	4804	}
	4805	else
	4806	{
	4807	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVEHIGH;
	4808	}
4809	4809
4810		++output_pin_count;
4811		}
4812		else
4813		{
4814		/* pin configured as an input only */
	4810	++output_pin_count;
	4811	}
	4812	else
	4813	{
	4814	/* pin configured as an input only */
4815	4815
4816		input_pins[input_pin_count] = macrocells[index].pin;
	4816	input_pins[input_pin_count] = macrocells[index].pin;
4817	4817
4818		++input_pin_count;
4819		}
4820		}
4821		}
4822		}
	4818	++input_pin_count;
	4819	}
	4820	}
	4821	}
	4822	}
4823	4823
4824		set_input_pins(input_pins, input_pin_count);
	4824	set_input_pins(input_pins, input_pin_count);
4825	4825	set_output_pins(output_pins, output_pin_count);
4826	4826
4827		/* 2056 - 2119 are the 64 bit signature fuses */
	4827	/* 2056 - 2119 are the 64 bit signature fuses */
4828	4828
4829		/* 2128 - 2135 product term 8? */
4830		/* 2136 - 2143 product term 7? */
4831		/* 2144 - 2151 product term 6? */
4832		/* 2152 - 2159 product term 5? */
4833		/* 2160 - 2167 product term 4? */
4834		/* 2168 - 2175 product term 3? */
4835		/* 2176 - 2183 product term 2? */
4836		/* 2184 - 2191 product term 1? */
	4829	/* 2128 - 2135 product term 8? */
	4830	/* 2136 - 2143 product term 7? */
	4831	/* 2144 - 2151 product term 6? */
	4832	/* 2152 - 2159 product term 5? */
	4833	/* 2160 - 2167 product term 4? */
	4834	/* 2168 - 2175 product term 3? */
	4835	/* 2176 - 2183 product term 2? */
	4836	/* 2184 - 2191 product term 1? */
4837	4837	}
4838	4838
4839	4839
r26736	r26737
5698	5698	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
5699	5699	};
5700	5700
5701		static memory_cell memory_cells[] = {
5702		{12, 663},
5703		{13, 660},
5704		{14, 657},
5705		{15, 654},
5706		{16, 651},
5707		{17, 648},
5708		{18, 645},
5709		{19, 642}};
	5701	static memory_cell memory_cells[] = {
	5702	{12, 663},
	5703	{13, 660},
	5704	{14, 657},
	5705	{15, 654},
	5706	{16, 651},
	5707	{17, 648},
	5708	{18, 645},
	5709	{19, 642}};
5710	5710	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
5711	5711	pin_output_config output_pins[8];
5712	5712	UINT16 index;
5713
5714		for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
5715		{
	5713
	5714	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	5715	{
5716	5716	output_pins[index].pin = memory_cells[index].pin;
5717	5717	output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
5718	5718
r26736	r26737
5724	5724	{
5725	5725	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
5726	5726	}
5727		}
	5727	}
5728	5728
5729	5729	set_input_pins(input_pins, ARRAY_LEN(input_pins));
5730	5730	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
5745	5745	UINT16 pin;
5746	5746	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
5747	5747	UINT16 or_fuse; /* 0 - intact? */
5748		UINT16 xor_fuse; /* 0 - intact? */
	5748	UINT16 xor_fuse; /* 0 - intact? */
5749	5749	};
5750	5750
5751		static memory_cell memory_cells[] = {
5752		{13, 785, 783, 784},
5753		{14, 782, 780, 781},
5754		{15, 779, 777, 778},
5755		{16, 776, 774, 775},
5756		{17, 773, 771, 772},
5757		{18, 770, 768, 769}};
	5751	static memory_cell memory_cells[] = {
	5752	{13, 785, 783, 784},
	5753	{14, 782, 780, 781},
	5754	{15, 779, 777, 778},
	5755	{16, 776, 774, 775},
	5756	{17, 773, 771, 772},
	5757	{18, 770, 768, 769}};
5758	5758	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 19};
5759	5759	pin_output_config output_pins[8];
5760	5760	UINT16 index;
5761
5762		for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
5763		{
	5761
	5762	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	5763	{
5764	5764	output_pins[index].pin = memory_cells[index].pin;
5765	5765	output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
5766	5766
r26736	r26737
5772	5772	{
5773	5773	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
5774	5774	}
5775		}
	5775	}
5776	5776
5777	5777	set_input_pins(input_pins, ARRAY_LEN(input_pins));
5778	5778	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
5793	5793	UINT16 pin;
5794	5794	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
5795	5795	UINT16 or_fuse; /* 0 - intact? */
5796		UINT16 xor_fuse; /* 0 - intact? */
	5796	UINT16 xor_fuse; /* 0 - intact? */
5797	5797	};
5798	5798
5799		static memory_cell memory_cells[] = {
5800		{14, 907, 905, 906},
5801		{15, 904, 902, 903},
5802		{16, 901, 899, 900},
5803		{17, 898, 896, 897}};
	5799	static memory_cell memory_cells[] = {
	5800	{14, 907, 905, 906},
	5801	{15, 904, 902, 903},
	5802	{16, 901, 899, 900},
	5803	{17, 898, 896, 897}};
5804	5804	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 18, 19};
5805	5805	pin_output_config output_pins[8];
5806	5806	UINT16 index;
5807
5808		for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
5809		{
	5807
	5808	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	5809	{
5810	5810	output_pins[index].pin = memory_cells[index].pin;
5811	5811	output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
5812	5812
r26736	r26737
5818	5818	{
5819	5819	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
5820	5820	}
5821		}
	5821	}
5822	5822
5823	5823	set_input_pins(input_pins, ARRAY_LEN(input_pins));
5824	5824	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
5839	5839	UINT16 pin;
5840	5840	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
5841	5841	UINT16 or_fuse; /* 0 - intact? */
5842		UINT16 xor_fuse; /* 0 - intact? */
	5842	UINT16 xor_fuse; /* 0 - intact? */
5843	5843	};
5844	5844
5845		static memory_cell memory_cells[] = {
5846		{15, 1029, 1027, 1028},
5847		{16, 1026, 1024, 1025}};
	5845	static memory_cell memory_cells[] = {
	5846	{15, 1029, 1027, 1028},
	5847	{16, 1026, 1024, 1025}};
5848	5848	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19};
5849	5849	pin_output_config output_pins[8];
5850	5850	UINT16 index;
5851
5852		for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
5853		{
	5851
	5852	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	5853	{
5854	5854	output_pins[index].pin = memory_cells[index].pin;
5855	5855	output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
5856	5856
r26736	r26737
5862	5862	{
5863	5863	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
5864	5864	}
5865		}
	5865	}
5866	5866
5867	5867	set_input_pins(input_pins, ARRAY_LEN(input_pins));
5868	5868	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
5883	5883	UINT16 pin;
5884	5884	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
5885	5885	UINT16 or_fuse; /* 0 - intact? */
5886		UINT16 xor_fuse; /* 0 - intact? */
	5886	UINT16 xor_fuse; /* 0 - intact? */
5887	5887	};
5888	5888
5889		static memory_cell memory_cells[] = {
5890		{12, 2071, 2069, 2070},
5891		{13, 2068, 2066, 2067},
5892		{14, 2065, 2063, 2064},
5893		{15, 2062, 2060, 2061},
5894		{16, 2059, 2057, 2058},
5895		{17, 2056, 2054, 2055},
5896		{18, 2053, 2051, 2052},
5897		{19, 2050, 2048, 2049}};
	5889	static memory_cell memory_cells[] = {
	5890	{12, 2071, 2069, 2070},
	5891	{13, 2068, 2066, 2067},
	5892	{14, 2065, 2063, 2064},
	5893	{15, 2062, 2060, 2061},
	5894	{16, 2059, 2057, 2058},
	5895	{17, 2056, 2054, 2055},
	5896	{18, 2053, 2051, 2052},
	5897	{19, 2050, 2048, 2049}};
5898	5898	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
5899	5899	pin_output_config output_pins[8];
5900	5900	UINT16 index;
5901
5902		for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
5903		{
	5901
	5902	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	5903	{
5904	5904	output_pins[index].pin = memory_cells[index].pin;
5905	5905	output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
5906	5906
r26736	r26737
5912	5912	{
5913	5913	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
5914	5914	}
5915		}
	5915	}
5916	5916
5917	5917	set_input_pins(input_pins, ARRAY_LEN(input_pins));
5918	5918	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
5933	5933	UINT16 pin;
5934	5934	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
5935	5935	UINT16 or_fuse; /* 0 - intact? */
5936		UINT16 xor_fuse; /* 0 - intact? */
	5936	UINT16 xor_fuse; /* 0 - intact? */
5937	5937	};
5938	5938
5939		static memory_cell memory_cells[] = {
5940		{12, 2071, 2069, 2070},
5941		{13, 2068, 2066, 2067},
5942		{14, 2065, 2063, 2064},
5943		{15, 2062, 2060, 2061},
5944		{16, 2059, 2057, 2058},
5945		{17, 2056, 2054, 2055},
5946		{18, 2053, 2051, 2052},
5947		{19, 2050, 2048, 2049}};
	5939	static memory_cell memory_cells[] = {
	5940	{12, 2071, 2069, 2070},
	5941	{13, 2068, 2066, 2067},
	5942	{14, 2065, 2063, 2064},
	5943	{15, 2062, 2060, 2061},
	5944	{16, 2059, 2057, 2058},
	5945	{17, 2056, 2054, 2055},
	5946	{18, 2053, 2051, 2052},
	5947	{19, 2050, 2048, 2049}};
5948	5948	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
5949	5949	pin_output_config output_pins[8];
5950	5950	UINT16 index;
5951
5952		for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
5953		{
	5951
	5952	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	5953	{
5954	5954	output_pins[index].pin = memory_cells[index].pin;
5955		output_pins[index].flags = OUTPUT_REGISTERED \| OUTPUT_FEEDBACK_REGISTERED;
	5955	output_pins[index].flags = OUTPUT_REGISTERED \| OUTPUT_FEEDBACK_REGISTERED;
5956	5956
5957	5957	if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
5958	5958	{
r26736	r26737
5962	5962	{
5963	5963	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
5964	5964	}
5965		}
	5965	}
5966	5966
5967	5967	set_input_pins(input_pins, ARRAY_LEN(input_pins));
5968	5968	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
5983	5983	UINT16 pin;
5984	5984	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
5985	5985	UINT16 or_fuse; /* 0 - intact? */
5986		UINT16 xor_fuse; /* 0 - intact? */
	5986	UINT16 xor_fuse; /* 0 - intact? */
5987	5987	};
5988	5988
5989		static memory_cell memory_cells[] = {
5990		{12, 2071, 2069, 2070},
5991		{13, 2068, 2066, 2067},
5992		{14, 2065, 2063, 2064},
5993		{15, 2062, 2060, 2061},
5994		{16, 2059, 2057, 2058},
5995		{17, 2056, 2054, 2055},
5996		{18, 2053, 2051, 2052},
5997		{19, 2050, 2048, 2049}};
	5989	static memory_cell memory_cells[] = {
	5990	{12, 2071, 2069, 2070},
	5991	{13, 2068, 2066, 2067},
	5992	{14, 2065, 2063, 2064},
	5993	{15, 2062, 2060, 2061},
	5994	{16, 2059, 2057, 2058},
	5995	{17, 2056, 2054, 2055},
	5996	{18, 2053, 2051, 2052},
	5997	{19, 2050, 2048, 2049}};
5998	5998	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
5999	5999	pin_output_config output_pins[8];
6000	6000	UINT16 index;
6001
6002		for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
6003		{
	6001
	6002	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	6003	{
6004	6004	output_pins[index].pin = memory_cells[index].pin;
6005	6005
6006		if (memory_cells[index].pin == 13 \|\| memory_cells[index].pin == 14 \|\|
6007		memory_cells[index].pin == 15 \|\| memory_cells[index].pin == 16 \|\|
6008		memory_cells[index].pin == 17 \|\| memory_cells[index].pin == 18)
6009		{
6010		output_pins[index].flags = OUTPUT_REGISTERED \| OUTPUT_FEEDBACK_REGISTERED;
6011		}
6012		else
6013		{
6014		output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
6015		}
	6006	if (memory_cells[index].pin == 13 \|\| memory_cells[index].pin == 14 \|\|
	6007	memory_cells[index].pin == 15 \|\| memory_cells[index].pin == 16 \|\|
	6008	memory_cells[index].pin == 17 \|\| memory_cells[index].pin == 18)
	6009	{
	6010	output_pins[index].flags = OUTPUT_REGISTERED \| OUTPUT_FEEDBACK_REGISTERED;
	6011	}
	6012	else
	6013	{
	6014	output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
	6015	}
6016	6016
6017	6017	if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
6018	6018	{
r26736	r26737
6022	6022	{
6023	6023	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
6024	6024	}
6025		}
	6025	}
6026	6026
6027	6027	set_input_pins(input_pins, ARRAY_LEN(input_pins));
6028	6028	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
6043	6043	UINT16 pin;
6044	6044	UINT16 polarity_fuse; /* 0 - active low?, 1 - active high? */
6045	6045	UINT16 or_fuse; /* 0 - intact? */
6046		UINT16 xor_fuse; /* 0 - intact? */
	6046	UINT16 xor_fuse; /* 0 - intact? */
6047	6047	};
6048	6048
6049		static memory_cell memory_cells[] = {
6050		{12, 2071, 2069, 2070},
6051		{13, 2068, 2066, 2067},
6052		{14, 2065, 2063, 2064},
6053		{15, 2062, 2060, 2061},
6054		{16, 2059, 2057, 2058},
6055		{17, 2056, 2054, 2055},
6056		{18, 2053, 2051, 2052},
6057		{19, 2050, 2048, 2049}};
	6049	static memory_cell memory_cells[] = {
	6050	{12, 2071, 2069, 2070},
	6051	{13, 2068, 2066, 2067},
	6052	{14, 2065, 2063, 2064},
	6053	{15, 2062, 2060, 2061},
	6054	{16, 2059, 2057, 2058},
	6055	{17, 2056, 2054, 2055},
	6056	{18, 2053, 2051, 2052},
	6057	{19, 2050, 2048, 2049}};
6058	6058	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
6059	6059	pin_output_config output_pins[8];
6060	6060	UINT16 index;
6061
6062		for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
6063		{
	6061
	6062	for (index = 0; index < ARRAY_LEN(memory_cells); ++index)
	6063	{
6064	6064	output_pins[index].pin = memory_cells[index].pin;
6065	6065
6066		if (memory_cells[index].pin == 14 \|\| memory_cells[index].pin == 15 \|\|
6067		memory_cells[index].pin == 16 \|\| memory_cells[index].pin == 17)
6068		{
6069		output_pins[index].flags = OUTPUT_REGISTERED \| OUTPUT_FEEDBACK_REGISTERED;
6070		}
6071		else
6072		{
6073		output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
6074		}
	6066	if (memory_cells[index].pin == 14 \|\| memory_cells[index].pin == 15 \|\|
	6067	memory_cells[index].pin == 16 \|\| memory_cells[index].pin == 17)
	6068	{
	6069	output_pins[index].flags = OUTPUT_REGISTERED \| OUTPUT_FEEDBACK_REGISTERED;
	6070	}
	6071	else
	6072	{
	6073	output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
	6074	}
6075	6075
6076	6076	if (!jed_get_fuse(jed, memory_cells[index].polarity_fuse))
6077	6077	{
r26736	r26737
6081	6081	{
6082	6082	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
6083	6083	}
6084		}
	6084	}
6085	6085
6086	6086	set_input_pins(input_pins, ARRAY_LEN(input_pins));
6087	6087	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
6101	6101	pin_output_config output_pins[8];
6102	6102	UINT16 index;
6103	6103
6104		for (index = 0; index < ARRAY_LEN(output_pins); ++index)
6105		{
	6104	for (index = 0; index < ARRAY_LEN(output_pins); ++index)
	6105	{
6106	6106	output_pins[index].pin = index + 12;
6107		output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
	6107	output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
6108	6108
6109	6109	if (!jed_get_fuse(jed, 327 - index))
6110	6110	{
r26736	r26737
6114	6114	{
6115	6115	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
6116	6116	}
6117		}
	6117	}
6118	6118
6119	6119	set_input_pins(input_pins, ARRAY_LEN(input_pins));
6120	6120	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
6133	6133	pin_output_config output_pins[6];
6134	6134	UINT16 index;
6135	6135
6136		for (index = 0; index < ARRAY_LEN(output_pins); ++index)
6137		{
	6136	for (index = 0; index < ARRAY_LEN(output_pins); ++index)
	6137	{
6138	6138	output_pins[index].pin = index + 13;
6139		output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
	6139	output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
6140	6140
6141	6141	if (!jed_get_fuse(jed, 389 - index))
6142	6142	{
r26736	r26737
6146	6146	{
6147	6147	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
6148	6148	}
6149		}
	6149	}
6150	6150
6151	6151	set_input_pins(input_pins, ARRAY_LEN(input_pins));
6152	6152	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
6165	6165	pin_output_config output_pins[4];
6166	6166	UINT16 index;
6167	6167
6168		for (index = 0; index < ARRAY_LEN(output_pins); ++index)
6169		{
	6168	for (index = 0; index < ARRAY_LEN(output_pins); ++index)
	6169	{
6170	6170	output_pins[index].pin = index + 14;
6171		output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
	6171	output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
6172	6172
6173	6173	if (!jed_get_fuse(jed, 451 - index))
6174	6174	{
r26736	r26737
6178	6178	{
6179	6179	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
6180	6180	}
6181		}
	6181	}
6182	6182
6183	6183	set_input_pins(input_pins, ARRAY_LEN(input_pins));
6184	6184	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
6197	6197	pin_output_config output_pins[2];
6198	6198	UINT16 index;
6199	6199
6200		for (index = 0; index < ARRAY_LEN(output_pins); ++index)
6201		{
	6200	for (index = 0; index < ARRAY_LEN(output_pins); ++index)
	6201	{
6202	6202	output_pins[index].pin = index + 15;
6203		output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
	6203	output_pins[index].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_NONE;
6204	6204
6205	6205	if (!jed_get_fuse(jed, 513 - index))
6206	6206	{
r26736	r26737
6210	6210	{
6211	6211	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
6212	6212	}
6213		}
	6213	}
6214	6214
6215	6215	set_input_pins(input_pins, ARRAY_LEN(input_pins));
6216	6216	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
6310	6310	output_pins[output_pin_count].pin = registered_pins[index];
6311	6311	output_pins[output_pin_count].flags = OUTPUT_REGISTERED \| OUTPUT_FEEDBACK_REGISTERED;
6312	6312
6313		if (!jed_get_fuse(jed, 2053 - index))
	6313	if (!jed_get_fuse(jed, 2053 - index))
6314	6314	{
6315	6315	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVELOW;
6316	6316	}
r26736	r26737
6398	6398	output_pins[output_pin_count].pin = registered_pins[index];
6399	6399	output_pins[output_pin_count].flags = OUTPUT_REGISTERED \| OUTPUT_FEEDBACK_REGISTERED;
6400	6400
6401		if (!jed_get_fuse(jed, 2054 - index))
	6401	if (!jed_get_fuse(jed, 2054 - index))
6402	6402	{
6403	6403	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVELOW;
6404	6404	}
r26736	r26737
6415	6415	output_pins[output_pin_count].pin = 19;
6416	6416	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL \| OUTPUT_FEEDBACK_OUTPUT;
6417	6417
6418		if (!jed_get_fuse(jed, 2048))
	6418	if (!jed_get_fuse(jed, 2048))
6419	6419	{
6420	6420	output_pins[output_pin_count].flags \|= OUTPUT_ACTIVELOW;
6421	6421	}
r26736	r26737
6454	6454
6455	6455	for (index = 0; index < ARRAY_LEN(output_pins); ++index)
6456	6456	{
6457		if (!jed_get_fuse(jed, 2055 - index))
	6457	if (!jed_get_fuse(jed, 2055 - index))
6458	6458	{
6459	6459	output_pins[index].flags \|= OUTPUT_ACTIVELOW;
6460	6460	}
r26736	r26737
6462	6462	{
6463	6463	output_pins[index].flags \|= OUTPUT_ACTIVEHIGH;
6464	6464	}
6465		}
	6465	}
6466	6466
6467	6467	set_input_pins(input_pins, ARRAY_LEN(input_pins));
6468	6468	set_output_pins(output_pins, ARRAY_LEN(output_pins));
r26736	r26737
7114	7114
7115	7115	static int command_view(int argc, char *argv[])
7116	7116	{
7117		int result = 0;
	7117	int result = 0;
7118	7118	const char srcfile, palname;
7119	7119	int is_jed;
7120	7120	const pal_data* pal;
r26736	r26737
7145	7145	err = read_source_file(srcfile);
7146	7146	if (err != 0)
7147	7147	{
7148		result = 1;
7149		goto end;
	7148	result = 1;
	7149	goto end;
7150	7150	}
7151	7151
7152	7152	/* if the source is JED, convert to binary */
r26736	r26737
7171	7171	}
7172	7172	}
7173	7173
7174		if (jed.numfuses != pal->numfuses)
7175		{
	7174	if (jed.numfuses != pal->numfuses)
	7175	{
7176	7176	fprintf(stderr, "Fuse count does not match this pal type.");
7177		result = 1;
7178		goto end;
7179		}
	7177	result = 1;
	7178	goto end;
	7179	}
7180	7180
7181	7181	/* generate equations from fuse map */
7182	7182

trunk/src/tools/nltool.c
r26736	r26737
25	25	#if 0
26	26	void mame_printf_warning(const char *format, ...)
27	27	{
28		va_list argptr;
	28	va_list argptr;
29	29
30		/* do the output */
31		va_start(argptr, format);
32		vprintf(format, argptr);
33		va_end(argptr);
	30	/* do the output */
	31	va_start(argptr, format);
	32	vprintf(format, argptr);
	33	va_end(argptr);
34	34	}
35	35	#endif
36	36
37	37	void malloc_file_line(size_t size, const char file, int line)
38	38	{
39		// allocate the memory and fail if we can't
40		void *ret = osd_malloc(size);
41		memset(ret, 0, size);
42		return ret;
	39	// allocate the memory and fail if we can't
	40	void *ret = osd_malloc(size);
	41	memset(ret, 0, size);
	42	return ret;
43	43	}
44	44
45	45	void malloc_array_file_line(size_t size, const char file, int line)
46	46	{
47		// allocate the memory and fail if we can't
48		void *ret = osd_malloc_array(size);
49		memset(ret, 0, size);
50		return ret;
	47	// allocate the memory and fail if we can't
	48	void *ret = osd_malloc_array(size);
	49	memset(ret, 0, size);
	50	return ret;
51	51	}
52	52
53	53	void free_file_line( void memory, const char file, int line )
54	54	{
55		osd_free( memory );
	55	osd_free( memory );
56	56	}
57	57
58	58
59	59	struct options_entry oplist[] =
60	60	{
61		{ "time_to_run;ttr", "1.0", OPTION_FLOAT, "time to run the emulation (seconds)" },
62		{ "f", "-", OPTION_STRING, "file to process (default is stdin)" },
63		{ "help;h", "0", OPTION_BOOLEAN, "display help" },
64		{ NULL }
	61	{ "time_to_run;ttr", "1.0", OPTION_FLOAT, "time to run the emulation (seconds)" },
	62	{ "f", "-", OPTION_STRING, "file to process (default is stdin)" },
	63	{ "help;h", "0", OPTION_BOOLEAN, "display help" },
	64	{ NULL }
65	65	};
66	66
67	67	/***************************************************************************
r26736	r26737
70	70
71	71	const char *filetobuf(pstring fname)
72	72	{
73		static pstring pbuf = "";
	73	static pstring pbuf = "";
74	74
75		if (fname == "-")
76		{
77		char lbuf[1024];
78		while (!feof(stdin))
79		{
80		fgets(lbuf, 1024, stdin);
81		pbuf += lbuf;
82		}
83		printf("%d\n",*(pbuf.right(1).cstr()+1));
84		return pbuf.cstr();
85		}
86		else
87		{
88		FILE *f;
89		f = fopen(fname, "rb");
90		fseek(f, 0, SEEK_END);
91		long fsize = ftell(f);
92		fseek(f, 0, SEEK_SET);
	75	if (fname == "-")
	76	{
	77	char lbuf[1024];
	78	while (!feof(stdin))
	79	{
	80	fgets(lbuf, 1024, stdin);
	81	pbuf += lbuf;
	82	}
	83	printf("%d\n",*(pbuf.right(1).cstr()+1));
	84	return pbuf.cstr();
	85	}
	86	else
	87	{
	88	FILE *f;
	89	f = fopen(fname, "rb");
	90	fseek(f, 0, SEEK_END);
	91	long fsize = ftell(f);
	92	fseek(f, 0, SEEK_SET);
93	93
94		char buf = (char ) malloc(fsize);
95		fread(buf, fsize, 1, f);
96		buf[fsize] = 0;
97		fclose(f);
98		return buf;
99		}
	94	char buf = (char ) malloc(fsize);
	95	fread(buf, fsize, 1, f);
	96	buf[fsize] = 0;
	97	fclose(f);
	98	return buf;
	99	}
100	100	}
101	101
102	102	class netlist_tool_t : public netlist_base_t
103	103	{
104	104	public:
105	105
106		netlist_tool_t()
107		: netlist_base_t(), m_setup(NULL)
108		{
	106	netlist_tool_t()
	107	: netlist_base_t(), m_setup(NULL)
	108	{
	109	}
109	110
110		}
	111	virtual ~netlist_tool_t() { };
111	112
112		virtual ~netlist_tool_t() { };
	113	void read_netlist(const char *buffer)
	114	{
	115	m_setup = new netlist_setup_t(*this);
	116	this->set_clock_freq(NETLIST_CLOCK);
113	117
114		void read_netlist(const char *buffer)
115		{
116		m_setup = new netlist_setup_t(*this);
117		this->set_clock_freq(NETLIST_CLOCK);
	118	// register additional devices
	119	//m_setup->factory().register_device<nld_analog_callback>( "NETDEV_CALLBACK", "nld_analog_callback");
118	120
119		// register additional devices
120		//m_setup->factory().register_device<nld_analog_callback>( "NETDEV_CALLBACK", "nld_analog_callback");
	121	// read the netlist ...
	122	//m_setup_func(*m_setup);
121	123
122		// read the netlist ...
123		//m_setup_func(*m_setup);
	124	m_setup->parse(buffer);
124	125
125		m_setup->parse(buffer);
	126	// start devices
	127	m_setup->start_devices();
	128	m_setup->resolve_inputs();
	129	// reset
	130	this->reset();
	131	}
126	132
127		// start devices
128		m_setup->start_devices();
129		m_setup->resolve_inputs();
130		// reset
131		this->reset();
132		}
133
134	133	protected:
135	134
136		void vfatalerror(const char *format, va_list ap) const
137		{
138		vprintf(format, ap);
139		throw;
140		}
	135	void vfatalerror(const char *format, va_list ap) const
	136	{
	137	vprintf(format, ap);
	138	throw;
	139	}
141	140
142	141	private:
143		netlist_setup_t *m_setup;
	142	netlist_setup_t *m_setup;
144	143	};
145	144
146	145	void usage(core_options &opts)
147	146	{
148		astring buffer;
149		fprintf(stderr,
150		"Usage:\n"
151		" nltool -help\n"
152		" nltool [options]\n"
153		"\n"
154		"Where:\n"
155		);
156		fprintf(stderr, "%s\n", opts.output_help(buffer));
	147	astring buffer;
	148	fprintf(stderr,
	149	"Usage:\n"
	150	" nltool -help\n"
	151	" nltool [options]\n"
	152	"\n"
	153	"Where:\n"
	154	);
	155	fprintf(stderr, "%s\n", opts.output_help(buffer));
157	156	}
158	157
159	158	/*-------------------------------------------------
r26736	r26737
166	165	netlist_tool_t nt;
167	166	core_options opts(oplist);
168	167	astring aerror("");
169		osd_ticks_t t = osd_ticks();
	168	osd_ticks_t t = osd_ticks();
170	169
171		fprintf(stderr, "%s", "WARNING: This is Work In Progress! - It may fail anytime\n");
	170	fprintf(stderr, "%s", "WARNING: This is Work In Progress! - It may fail anytime\n");
172	171	if (!opts.parse_command_line(argc, argv, OPTION_PRIORITY_DEFAULT, aerror))
173	172	{
174		fprintf(stderr, "%s\n", aerror.cstr());
175		usage(opts);
176		return 1;
	173	fprintf(stderr, "%s\n", aerror.cstr());
	174	usage(opts);
	175	return 1;
177	176	}
178	177	if (opts.bool_value("h"))
179	178	{
180		usage(opts);
181		return 1;
	179	usage(opts);
	180	return 1;
182	181	}
183	182
184		nt.read_netlist(filetobuf(opts.value("f")));
185		double ttr = opts.float_value("ttr");
	183	nt.read_netlist(filetobuf(opts.value("f")));
	184	double ttr = opts.float_value("ttr");
186	185
187		INT64 tt = ttr * NETLIST_CLOCK;
	186	INT64 tt = ttr * NETLIST_CLOCK;
188	187
189		printf("startup time ==> %5.3f\n", (double) (osd_ticks() - t) / (double) osd_ticks_per_second() );
190		printf("runnning ...\n");
191		t = osd_ticks();
192		while (tt>0)
193		{
194		INT32 tr = MIN(tt, NETLIST_CLOCK / 10);
195		tt -= tr;
196		nt.process_queue(tr);
197		}
198		double emutime = (double) (osd_ticks() - t) / (double) osd_ticks_per_second();
199		printf("%f seconds emulation took %f real time ==> %5.2f%%\n", ttr, emutime, ttr/emutime*100.0);
200
201		return 0;
	188	printf("startup time ==> %5.3f\n", (double) (osd_ticks() - t) / (double) osd_ticks_per_second() );
	189	printf("runnning ...\n");
	190	t = osd_ticks();
	191	while (tt>0)
	192	{
	193	INT32 tr = MIN(tt, NETLIST_CLOCK / 10);
	194	tt -= tr;
	195	nt.process_queue(tr);
	196	}
	197	double emutime = (double) (osd_ticks() - t) / (double) osd_ticks_per_second();
	198	printf("%f seconds emulation took %f real time ==> %5.2f%%\n", ttr, emutime, ttr/emutime*100.0);
	199
	200	return 0;
202	201	}

trunk/src/osd/windows/window.c
r26736	r26737
1347	1347	case WM_SYSCOMMAND:
1348	1348	{
1349	1349	UINT16 cmd = wparam & 0xfff0;
1350
	1350
1351	1351	// prevent screensaver or monitor power events
1352	1352	if (cmd == SC_MONITORPOWER \|\| cmd == SC_SCREENSAVE)
1353	1353	return 1;

trunk/src/osd/windows/vconv.c
r26736	r26737
318	318	else if (!strcmp(argv[1], "ar"))
319	319	{
320	320	transtable = ar_translate;
321
	321
322	322	if (!icl_compile)
323	323	{
324	324	executable = "link.exe";

trunk/src/osd/windows/drawd3d.c
r26736	r26737
777	777	}
778	778
779	779	m_line_count = 0;
780
	780
781	781	// loop over primitives
782	782	for (render_primitive *prim = m_window->primlist->first(); prim != NULL; prim = prim->next())
783	783	if (prim->type == render_primitive::LINE && PRIMFLAG_GET_VECTOR(prim->flags))
r26736	r26737
1485	1485	{
1486	1486	start_index %= m_line_count;
1487	1487	}
1488
	1488
1489	1489	m_line_count = 0;
1490	1490	}
1491	1491

trunk/src/emu/diimage.c
r26736	r26737
442	442	bool device_image_interface::load_software_region(const char *tag, optional_shared_ptr<UINT8> &ptr)
443	443	{
444	444	size_t size = get_software_region_length(tag);
445
	445
446	446	if (size)
447	447	{
448	448	ptr.allocate(size);

trunk/src/emu/sound/wave.h
r26736	r26737
13	13	{
14	14	public:
15	15	wave_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
16
	16
17	17	static void static_set_cassette_tag(device_t &device, const char *cassette_tag);
18
	18
19	19	protected:
20	20	// device-level overrides
21	21	virtual void device_config_complete();

trunk/src/emu/sound/discrete.c
r26736	r26737
698	698	{
699	699	const discrete_block *block = block_list[i];
700	700
701		//discrete_base_node *node = block->factory->Create(this, block);
	701	//discrete_base_node *node = block->factory->Create(this, block);
702	702	discrete_base_node *node = block->factory(this, block);
703	703	/* keep track of special nodes */
704	704	if (block->node == NODE_SPECIAL)

trunk/src/emu/sound/discrete.h
r26736	r26737
4531	4531	template <class C>
4532	4532	discrete_base_node discrete_create_node(discrete_device pdev, const discrete_block *block)
4533	4533	{
4534		return discrete_node_factory< C >().Create(pdev, block);
	4534	return discrete_node_factory< C >().Create(pdev, block);
4535	4535	}
4536	4536
4537	4537	#define DISCRETE_SOUND_EXTERN(name) extern const discrete_block name##_discrete_interface[]

trunk/src/emu/sound/mpeg_audio.c
r26736	r26737
128	128	int stereo_mode_ext = gb(2);
129	129	param_index = gb(3);
130	130	gb(1); // must be zero
131
	131
132	132	channel_count = stereo_mode != 3 ? 2 : 1;
133	133
134	134	total_bands = total_band_counts[param_index];
r26736	r26737
137	137	joint_bands = joint_band_counts[stereo_mode_ext];
138	138	if(joint_bands > total_bands )
139	139	joint_bands = total_bands;
140
	140
141	141	return true;
142	142	}
143	143

trunk/src/emu/sound/k056800.c
r26736	r26737
59	59	{
60	60	UINT32 r = offset & 7;
61	61	UINT8 data = 0;
62
	62
63	63	switch (r)
64	64	{
65	65	case 0:
r26736	r26737
102	102	// .... ...x - Mute front
103	103	// .... ..x. - Mute rear
104	104	break;
105
	105
106	106	case 7:
107	107	// Sound interrupt
108	108	m_int_pending = true;
r26736	r26737
119	119	{
120	120	UINT32 r = offset & 7;
121	121	UINT8 data = 0;
122
	122
123	123	switch (r)
124	124	{
125	125	case 0:
r26736	r26737
144	144	case 1:
145	145	m_snd_to_host_regs[r] = data;
146	146	break;
147
	147
148	148	case 2:
149	149	case 3:
150	150	// TODO: Unknown
r26736	r26737
167	167	m_int_handler(CLEAR_LINE);
168	168	}
169	169	break;
170
	170
171	171	case 5:
172	172	// TODO: Unknown
173	173	break;
174	174	}
175		}
		No newline at end of file
	175	}

trunk/src/emu/sound/k056800.h
r26736	r26737
13	13	***************************************************************************/
14	14
15	15	#define MCFG_K056800_ADD(_tag, _clock) \
16		MCFG_DEVICE_ADD(_tag, K056800, _clock) \
17
	16	MCFG_DEVICE_ADD(_tag, K056800, _clock)
18	17	#define MCFG_K056800_INT_HANDLER(_devcb) \
19	18	devcb = &k056800_device::set_int_handler(*device, DEVCB2_##_devcb);
20	19
r26736	r26737
45	44
46	45	private:
47	46	// internal state
48		bool m_int_pending;
49		bool m_int_enabled;
50		UINT8 m_host_to_snd_regs[4];
51		UINT8 m_snd_to_host_regs[2];
	47	bool m_int_pending;
	48	bool m_int_enabled;
	49	UINT8 m_host_to_snd_regs[4];
	50	UINT8 m_snd_to_host_regs[2];
52	51
53		devcb2_write_line m_int_handler;
	52	devcb2_write_line m_int_handler;
54	53	};
55	54
56	55	extern const device_type K056800;

trunk/src/emu/sound/speaker.h
r26736	r26737
83	83	void speaker_postload();
84	84
85	85	// DC blocker state
86		double m_prevx, m_prevy;
	86	double m_prevx, m_prevy;
87	87	};
88	88
89	89	extern const device_type SPEAKER_SOUND;

trunk/src/emu/sound/es5506.c
r26736	r26737
381	381	/* initialize the regions */
382	382	m_region_base[0] = m_es5505_region0 ? (UINT16 *)machine().root_device().memregion(m_es5505_region0)->base() : NULL;
383	383	m_region_base[1] = m_es5505_region1 ? (UINT16 *)machine().root_device().memregion(m_es5505_region1)->base() : NULL;
384
	384
385	385	/* initialize the rest of the structure */
386	386	m_master_clock = clock();
387	387	m_irq_callback_func.resolve(m_es5505_irq_callback, *this);
r26736	r26737
2208	2208
2209	2209	void es5505_device::voice_bank_w(int voice, int bank)
2210	2210	{
2211
2212	2211	#if RAINE_CHECK
2213	2212	m_voice[voice].control = CONTROL_STOPMASK;
2214	2213	#endif
r26736	r26737
2226	2225
2227	2226	void es5506_device::sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples)
2228	2227	{
2229
2230	2228	#if MAKE_WAVS
2231	2229	/* start the logging once we have a sample rate */
2232	2230	if (m_sample_rate)
r26736	r26737
2273	2271
2274	2272	void es5505_device::sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples)
2275	2273	{
2276
2277	2274	#if MAKE_WAVS
2278	2275	/* start the logging once we have a sample rate */
2279	2276	if (m_sample_rate)
r26736	r26737
2316	2313	offset += length;
2317	2314	samples -= length;
2318	2315	}
2319		}
		No newline at end of file
	2316	}

trunk/src/emu/sound/es5506.h
r26736	r26737
64	64	index(0),
65	65	filtcount(0),
66	66	accum_mask(0) {}
67
	67
68	68	/* external state */
69	69	UINT32 control; /* control register */
70	70	UINT32 freqcount; /* frequency count register */
r26736	r26737
139	139	#if MAKE_WAVS
140	140	void * m_wavraw; /* raw waveform */
141	141	#endif
142
	142
143	143	FILE *m_eslog;
144
	144
145	145	void update_irq_state();
146	146	void update_internal_irq_state();
147	147	void compute_tables();
r26736	r26737
158	158	public:
159	159	es5506_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
160	160	~es5506_device() {}
161
	161
162	162	DECLARE_READ8_MEMBER( read );
163	163	DECLARE_WRITE8_MEMBER( write );
164	164	void voice_bank_w(int voice, int bank);
r26736	r26737
170	170
171	171	// sound stream update overrides
172	172	virtual void sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples);
173
174
	173
	174
175	175	void generate_samples(INT32 **outputs, int offset, int samples);
176	176
177	177	private:
r26736	r26737
191	191	{
192	192	public:
193	193	es5505_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
194
	194
195	195	DECLARE_READ16_MEMBER( read );
196	196	DECLARE_WRITE16_MEMBER( write );
197	197	void voice_bank_w(int voice, int bank);
r26736	r26737
200	200	// device-level overrides
201	201	virtual void device_config_complete();
202	202	virtual void device_start();
203
	203
204	204	virtual void sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples);
205
	205
206	206	void generate_samples(INT32 **outputs, int offset, int samples);
207
	207
208	208	private:
209	209	// internal state
210	210	inline void reg_write_low(es550x_voice *voice, offs_t offset, UINT16 data, UINT16 mem_mask);

trunk/src/emu/sound/sn76477.c
r26736	r26737
301	301	}
302	302
303	303	intialize_noise();
304
	304
305	305	/* set up interface values */
306	306	_SN76477_enable_w(m_intf_enable);
307	307	_SN76477_vco_w(m_intf_vco);

trunk/src/emu/sound/sn76477.h
r26736	r26737
82	82	public:
83	83	sn76477_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
84	84	~sn76477_device() {}
85
	85
86	86	/* these functions take 0 or 1 as a logic input */
87	87	WRITE_LINE_MEMBER( enable_w ); /* active LO, 0 = enabled, 1 = disabled */
88	88	WRITE_LINE_MEMBER( mixer_a_w );
r26736	r26737
106	106
107	107	/* these functions take a capacitor value in Farads or the voltage on it in Volts */
108	108	#define SN76477_EXTERNAL_VOLTAGE_DISCONNECT (-1.0) /* indicates that the voltage is internally computed,
109		can be used in all the functions that take a
110		voltage on a capacitor */
	109	can be used in all the functions that take a
	110	voltage on a capacitor */
111	111	void one_shot_cap_w(double data);
112	112	void one_shot_cap_voltage_w(double data);
113	113	void slf_cap_w(double data);
r26736	r26737
131	131
132	132	// sound stream update overrides
133	133	virtual void sound_stream_update(sound_stream &stream, stream_sample_t inputs, stream_sample_t outputs, int samples);
134
	134
135	135	private:
136	136	/* chip's external interface */
137	137	UINT32 m_enable;
r26736	r26737
167	167	double m_amplitude_res;
168	168	double m_feedback_res;
169	169	double m_pitch_voltage;
170
	170
171	171	// internal state
172	172	double m_one_shot_cap_voltage; /* voltage on the one-shot cap */
173	173	UINT32 m_one_shot_running_ff; /* 1 = one-shot running, 0 = stopped */
r26736	r26737
191	191	/* others */
192	192	sound_stream m_channel; / returned by stream_create() */
193	193	int m_our_sample_rate; /* from machine.sample_rate() */
194
	194
195	195	wav_file m_file; / handle of the wave file to produce */
196
	196
197	197	double compute_one_shot_cap_charging_rate();
198	198	double compute_one_shot_cap_discharging_rate();
199	199	double compute_slf_cap_charging_rate();
r26736	r26737
206	206	double compute_attack_decay_cap_charging_rate();
207	207	double compute_attack_decay_cap_discharging_rate();
208	208	double compute_center_to_peak_voltage_out();
209
	209
210	210	void log_enable_line();
211	211	void log_mixer_mode();
212	212	void log_envelope_mode();
r26736	r26737
223	223	void log_decay_time();
224	224	void log_voltage_out();
225	225	void log_complete_state();
226
	226
227	227	void open_wav_file();
228	228	void close_wav_file();
229	229	void add_wav_data(INT16 data_l, INT16 data_r);
230
	230
231	231	void intialize_noise();
232	232	inline UINT32 generate_next_real_noise_bit();
233
	233
234	234	void state_save_register();
235
	235
236	236	void _SN76477_enable_w(UINT32 data);
237	237	void _SN76477_vco_w(UINT32 data);
238	238	void _SN76477_mixer_a_w(UINT32 data);

trunk/src/emu/sound/nes_apu.h
r26736	r26737
34	34	* Also make sure to correspond the memory regions to those used in the
35	35	* processor, as each is shared.
36	36	*/
37
	37
38	38	#include "nes_defs.h"
39
	39
40	40	/* GLOBAL CONSTANTS */
41	41	#define SYNCS_MAX1 0x20
42	42	#define SYNCS_MAX2 0x80
r26736	r26737
56	56
57	57	DECLARE_READ8_MEMBER( read );
58	58	DECLARE_WRITE8_MEMBER( write );
59
	59
60	60	protected:
61	61	// device-level overrides
62	62	virtual void device_config_complete();
r26736	r26737
77	77	uint32 m_sync_times1[SYNCS_MAX1]; /* Samples per sync table */
78	78	uint32 m_sync_times2[SYNCS_MAX2]; /* Samples per sync table */
79	79	sound_stream *m_stream;
80
	80
81	81	void create_syncs(unsigned long sps);
82	82	int8 apu_square(square_t *chan);
83	83	int8 apu_triangle(triangle_t *chan);

trunk/src/emu/sound/k054539.c
r26736	r26737
63	63	22d: Data read/write port
64	64	22e: ROM/RAM select (00..7f == ROM banks, 80 = Reverb RAM)
65	65	22f: Global control:
66		.......x - Enable PCM
67		......x. - Timer related?
68		...x.... - Enable ROM/RAM readback from 0x22d
69		..x..... - Timer output enable?
70		x....... - Disable register RAM updates
	66	.......x - Enable PCM
	67	......x. - Timer related?
	68	...x.... - Enable ROM/RAM readback from 0x22d
	69	..x..... - Timer output enable?
	70	x....... - Disable register RAM updates
71	71
72		The chip has an optional 0x8000 byte reverb buffer.
73		The reverb delay is actually an offset in this buffer.
	72	The chip has an optional 0x8000 byte reverb buffer.
	73	The reverb delay is actually an offset in this buffer.
74	74	*/
75	75
76	76	void k054539_device::init_flags(int _flags)
r26736	r26737
440	440	cur_limit = data == 0x80 ? 0x4000 : 0x20000;
441	441	cur_ptr = 0;
442	442	break;
443
	443
444	444	case 0x22f:
445	445	if (!(data & 0x20)) // Disable timer output?
446	446	{
r26736	r26737
537	537	void k054539_device::device_reset()
538	538	{
539	539	m_timer->enable(false);
540		}
		No newline at end of file
	540	}

trunk/src/emu/sound/k054539.h
r26736	r26737
49	49	k054539_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);
50	50
51	51	// static configuration helpers
52		static void static_set_interface(device_t &device, const k054539_interface &interface);
	52	static void static_set_interface(device_t &device, const k054539_interface &interface);
53	53	template<class _Object> static devcb2_base &set_timer_handler(device_t &device, _Object object) { return downcast<k054539_device &>(device).m_timer_handler.set_callback(object); }
54
55	54
	55
56	56	DECLARE_WRITE8_MEMBER(write);
57	57	DECLARE_READ8_MEMBER(read);
58	58
r26736	r26737
109	109
110	110	channel channels[8];
111	111	sound_stream *stream;
112
113		emu_timer *m_timer;
114		UINT32 m_timer_state;
115		devcb2_write_line m_timer_handler;
116	112
	113	emu_timer *m_timer;
	114	UINT32 m_timer_state;
	115	devcb2_write_line m_timer_handler;
	116
117	117	bool regupdate();
118	118	void keyon(int channel);
119	119	void keyoff(int channel);

trunk/src/emu/sound/ymz770.c
r26736	r26737
163	163	}
164	164	}
165	165	}
166
	166
167	167	// process channels
168	168	INT32 mix = 0;
169	169
r26736	r26737
174	174	// force finish current block
175	175	mix += (m_channels[ch].output_data[m_channels[ch].output_ptr++]*m_channels[ch].volume);
176	176	m_channels[ch].output_remaining--;
177
	177
178	178	if (m_channels[ch].output_remaining == 0 && !m_channels[ch].is_playing)
179	179	m_channels[ch].decoder->clear();
180	180	}
181
	181
182	182	else if (m_channels[ch].is_playing)
183	183	{
184	184	retry:
r26736	r26737
254	254	m_mute = data & 1;
255	255	m_doen = data >> 1 & 1;
256	256	break;
257
	257
258	258	case 0x01:
259	259	m_vlma = data;
260	260	break;
261
	261
262	262	case 0x02:
263	263	m_bsl = data & 7;
264	264	m_cpl = data >> 4 & 7;
r26736	r26737
308	308	break;
309	309	}
310	310	}
311
	311
312	312	// sequencer registers
313	313	else
314	314	{

trunk/src/emu/bus/plus4/std.h
r26736	r26737
40	40	// device_plus4_expansion_card_interface overrides
41	41	virtual UINT8 plus4_cd_r(address_space &space, offs_t offset, UINT8 data, int ba, int cs0, int c1l, int c2l, int cs1, int c1h, int c2h);
42	42
43
	43
44	44	};
45	45
46	46

trunk/src/emu/bus/adamnet/fdc.c
r26736	r26737
10	10	**********************************************************************/
11	11
12	12	/*
13
14		TODO:
15	13
16		- 320KB DSDD 5.25"
17		- 720KB DSDD 3.5"
18		- 1.44MB DSHD 3.5"
	14	TODO:
19	15
	16	- 320KB DSDD 5.25"
	17	- 720KB DSDD 3.5"
	18	- 1.44MB DSHD 3.5"
	19
20	20	*/
21	21
22	22	#include "fdc.h"

trunk/src/emu/bus/a2bus/a2alfam2.c
r26736	r26737
177	177	case 3:
178	178	if (m_has4thsn)
179	179	{
180		m_sn4->write(space, 0, data);
	180	m_sn4->write(space, 0, data);
181	181	m_latch3 = data;
182	182	}
183	183	break;

trunk/src/emu/bus/vic10/std.h
r26736	r26737
26	26	// ======================> vic10_standard_cartridge_device
27	27
28	28	class vic10_standard_cartridge_device : public device_t,
29		public device_vic10_expansion_card_interface
	29	public device_vic10_expansion_card_interface
30	30	{
31	31	public:
32	32	// construction/destruction

trunk/src/emu/bus/pc_kbd/iskr1030.c
r26736	r26737
66	66	AM_RANGE(0x00, 0xFF) AM_RAM
67	67	AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(p1_r, p1_w)
68	68	AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(p2_w)
69		// AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(t0_r)
	69	// AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(t0_r)
70	70	AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(t1_r)
71	71	ADDRESS_MAP_END
72	72
r26736	r26737
358	358	READ8_MEMBER( iskr_1030_keyboard_device::t0_r )
359	359	{
360	360	return 0;
361		// return clock_signal();
	361	// return clock_signal();
362	362	}
363	363
364	364

trunk/src/emu/bus/c64/pagefox.c
r26736	r26737
67	67	{
68	68	// allocate memory
69	69	m_ram.allocate(0x8000);
70
	70
71	71	// state saving
72	72	save_item(NAME(m_bank));
73	73	}

trunk/src/emu/bus/abcbus/lux21046.c
r26736	r26737
498	498	PORT_START("SW3")
499	499	PORT_DIPNAME( 0x7f, 0x2d, "Card Address" ) PORT_DIPLOCATION("SW3:1,2,3,4,5,6,7")
500	500	PORT_DIPSETTING( 0x2d, "45" )
501
	501
502	502	PORT_START("S1") // also S3,S5
503	503	PORT_DIPNAME( 0x01, 0x01, "Interface Type" )
504	504	PORT_DIPSETTING( 0x00, "ABC 1600" )
r26736	r26737
549	549	PORT_START("SW3")
550	550	PORT_DIPNAME( 0x7f, 0x2c, "Card Address" ) PORT_DIPLOCATION("SW3:1,2,3,4,5,6,7")
551	551	PORT_DIPSETTING( 0x2c, "44" )
552
	552
553	553	PORT_START("S1") // also S3,S5
554	554	PORT_DIPNAME( 0x01, 0x01, "Interface Type" )
555	555	PORT_DIPSETTING( 0x00, "ABC 1600" )
r26736	r26737
629	629	PORT_START("SW1")
630	630	PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
631	631	PORT_DIPSETTING( 0x00, DEF_STR( Unused ) )
632
	632
633	633	PORT_START("SW2")
634	634	PORT_DIPNAME( 0x0f, 0x0e, "Drive Type" ) PORT_DIPLOCATION("SW2:1,2,3,4")
635	635	PORT_DIPSETTING( 0x0e, "BASF 6105" )
r26736	r26737
688	688	PORT_START("SW3")
689	689	PORT_DIPNAME( 0x7f, 0x2c, "Card Address" ) PORT_DIPLOCATION("SW3:1,2,3,4,5,6,7")
690	690	PORT_DIPSETTING( 0x2c, "44" )
691
	691
692	692	PORT_START("S1") // also S3,S5
693	693	PORT_DIPNAME( 0x01, 0x01, "Interface Type" )
694	694	PORT_DIPSETTING( 0x00, "ABC 1600" )
r26736	r26737
1125	1125
1126	1126	if (BIT(data, 2))
1127	1127	{
1128		m_fdc->set_unscaled_clock(XTAL_16MHz/16);
	1128	m_fdc->set_unscaled_clock(XTAL_16MHz/16);
1129	1129	}
1130	1130	else
1131	1131	{
1132		m_fdc->set_unscaled_clock(XTAL_16MHz/8);
	1132	m_fdc->set_unscaled_clock(XTAL_16MHz/8);
1133	1133	}
1134	1134	}
1135	1135

trunk/src/emu/bus/abcbus/lux21056.c
r26736	r26737
30	30
31	31	$ mess abc800m -bus abc850 -flop1 ufd631 -hard ro202.chd
32	32	$ mess abc800m -bus abc850 -bus:abc850:io2 xebec,bios=basf6186 -flop1 ufd631 -hard basf6186.chd
33
34		or with the ABC 852 attached:
35	33
	34	or with the ABC 852 attached:
	35
36	36	$ mess abc800m -bus abc852 -flop1 ufd631 -hard basf6185.chd
37	37	$ mess abc800m -bus abc852 -bus:abc852:io2 xebec,bios=nec5126 -flop1 ufd631 -hard nec5126.chd
38
	38
39	39	or with the ABC 856 attached:
40	40
41	41	$ mess abc800m -bus abc856 -flop1 ufd631 -hard micr1325.chd
r26736	r26737
59	59	Enter "DOSGEN,F HD0:" to start the formatting utility.
60	60	Enter "J", and enter "J" to confirm the formatting.
61	61
62		If you have a 20MB image, format the second partition by entering "DOSGEN,F HD1:", "J", and "J".
	62	If you have a 20MB image, format the second partition by entering "DOSGEN,F HD1:", "J", and "J".
63	63
64		If you have a 60MB image, format the third partition by entering "DOSGEN,F HD2:", "J", and "J",
65		and format the fourth partition by entering "DOSGEN,F HD3:", "J", and "J".
	64	If you have a 60MB image, format the third partition by entering "DOSGEN,F HD2:", "J", and "J",
	65	and format the fourth partition by entering "DOSGEN,F HD3:", "J", and "J".
66	66
67		You can now list your freshly created partitions by entering "LIB".
	67	You can now list your freshly created partitions by entering "LIB".
68	68
69	69	Or skip all of the above and use the preformatted images in the software list:
70	70

trunk/src/emu/machine/tmp68301.h
r26736	r26737
29	29	{
30	30	devcb_read16 m_in_parallel_cb;
31	31	devcb_write16 m_out_parallel_cb;
32		// TODO: serial ports
	32	// TODO: serial ports
33	33	};
34	34
35	35	class tmp68301_device : public device_t,

trunk/src/emu/machine/z80dart.c
r26736	r26737
1227	1227	m_rx_clock++;
1228	1228	if (m_rx_clock == clocks)
1229	1229	m_rx_clock = 0;
1230
	1230
1231	1231	}
1232	1232	}
1233	1233
r26736	r26737
1249	1249	m_tx_clock++;
1250	1250	if (m_tx_clock == clocks)
1251	1251	m_tx_clock = 0;
1252
	1252
1253	1253	}
1254	1254	}
1255	1255
r26736	r26737
1339	1339	input_callback(m_input_state & ~RX);
1340	1340	}
1341	1341	}
1342

trunk/src/emu/machine/t10sbc.c
r26736	r26737
42	42
43	43	case T10SBC_CMD_SEEK_6:
44	44	m_lba = (command[1]&0x1f)<<16 \| command[2]<<8 \| command[3];
45
	45
46	46	logerror("S1410: SEEK to LBA %x\n", m_lba);
47
	47
48	48	m_phase = SCSI_PHASE_STATUS;
49	49	m_transfer_length = 0;
50	50	break;

trunk/src/emu/machine/netlist.c
r26736	r26737
63	63	netlist_mame_device::netlist_mame_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
64	64	: device_t(mconfig, NETLIST, "netlist", tag, owner, clock, "netlist_mame", __FILE__),
65	65	device_execute_interface(mconfig, *this),
66		//device_state_interface(mconfig, *this),
	66	//device_state_interface(mconfig, *this),
67	67	m_device_start_list(100),
68	68	m_netlist(NULL),
69	69	m_setup(NULL),
r26736	r26737
81	81
82	82	void netlist_mame_device::device_config_complete()
83	83	{
84		LOG_DEV_CALLS(("device_config_complete\n"));
	84	LOG_DEV_CALLS(("device_config_complete\n"));
85	85	}
86	86
87	87	void netlist_mame_device::device_start()
88	88	{
89		LOG_DEV_CALLS(("device_start\n"));
	89	LOG_DEV_CALLS(("device_start\n"));
90	90
91	91	m_netlist = global_alloc_clear(netlist_mame_t(*this));
92	92	m_setup = global_alloc_clear(netlist_setup_t(*m_netlist));
93		m_netlist->init_object(*m_netlist, "netlist");
94		m_setup->init();
	93	m_netlist->init_object(*m_netlist, "netlist");
	94	m_setup->init();
95	95
96		m_netlist->set_clock_freq(this->clock());
	96	m_netlist->set_clock_freq(this->clock());
97	97
98		// register additional devices
	98	// register additional devices
99	99
100	100	m_setup->factory().register_device<nld_analog_callback>( "NETDEV_CALLBACK", "nld_analog_callback");
101	101
r26736	r26737
104	104	m_setup->start_devices();
105	105	m_setup->resolve_inputs();
106	106
107		bool allok = true;
108		for (device_start_list_t::entry_t *ods = m_device_start_list.first(); ods != NULL; ods = m_device_start_list.next(ods))
109		allok &= ods->object()->OnDeviceStart();
	107	bool allok = true;
	108	for (device_start_list_t::entry_t *ods = m_device_start_list.first(); ods != NULL; ods = m_device_start_list.next(ods))
	109	allok &= ods->object()->OnDeviceStart();
110	110
111		if (!allok)
112		m_netlist->xfatalerror("required elements not found\n");
	111	if (!allok)
	112	m_netlist->xfatalerror("required elements not found\n");
113	113
114	114	save_state();
115	115
r26736	r26737
119	119
120	120	void netlist_mame_device::device_reset()
121	121	{
122		LOG_DEV_CALLS(("device_reset\n"));
	122	LOG_DEV_CALLS(("device_reset\n"));
123	123	m_netlist->reset();
124	124	}
125	125
126	126	void netlist_mame_device::device_stop()
127	127	{
128		LOG_DEV_CALLS(("device_stop\n"));
	128	LOG_DEV_CALLS(("device_stop\n"));
129	129	m_setup->print_stats();
130	130
131	131	global_free(m_setup);
r26736	r26737
136	136
137	137	ATTR_COLD void netlist_mame_device::device_post_load()
138	138	{
139		LOG_DEV_CALLS(("device_post_load\n"));
140		m_netlist->queue().clear();
141		NL_VERBOSE_OUT(("current time %f qsize %d\n", m_netlist->time().as_double(), qsize));
142		for (int i = 0; i < qsize; i++ )
143		{
144		netlist_net_t *n = m_netlist->find_net(qtemp[i].m_name);
145		NL_VERBOSE_OUT(("Got %s ==> %p\n", qtemp[i].m_name, n));
146		NL_VERBOSE_OUT(("schedule time %f (%f)\n", n->time().as_double(), qtemp[i].m_time.as_double()));
147		m_netlist->queue().push(netlist_base_t::queue_t::entry_t(qtemp[i].m_time, *n));
148		}
	139	LOG_DEV_CALLS(("device_post_load\n"));
	140	m_netlist->queue().clear();
	141	NL_VERBOSE_OUT(("current time %f qsize %d\n", m_netlist->time().as_double(), qsize));
	142	for (int i = 0; i < qsize; i++ )
	143	{
	144	netlist_net_t *n = m_netlist->find_net(qtemp[i].m_name);
	145	NL_VERBOSE_OUT(("Got %s ==> %p\n", qtemp[i].m_name, n));
	146	NL_VERBOSE_OUT(("schedule time %f (%f)\n", n->time().as_double(), qtemp[i].m_time.as_double()));
	147	m_netlist->queue().push(netlist_base_t::queue_t::entry_t(qtemp[i].m_time, *n));
	148	}
149	149	}
150	150
151	151	ATTR_COLD void netlist_mame_device::device_pre_save()
152	152	{
153		LOG_DEV_CALLS(("device_pre_save\n"));
	153	LOG_DEV_CALLS(("device_pre_save\n"));
154	154
155		qsize = m_netlist->queue().count();
156		NL_VERBOSE_OUT(("current time %f qsize %d\n", m_netlist->time().as_double(), qsize));
157		for (int i = 0; i < qsize; i++ )
158		{
159		qtemp[i].m_time = m_netlist->queue().listptr()[i].time();
160		const char *p = m_netlist->queue().listptr()[i].object().name().cstr();
161		int n = MIN(63, strlen(p));
162		strncpy(qtemp[i].m_name, p, n);
163		qtemp[i].m_name[n] = 0;
164		}
	155	qsize = m_netlist->queue().count();
	156	NL_VERBOSE_OUT(("current time %f qsize %d\n", m_netlist->time().as_double(), qsize));
	157	for (int i = 0; i < qsize; i++ )
	158	{
	159	qtemp[i].m_time = m_netlist->queue().listptr()[i].time();
	160	const char *p = m_netlist->queue().listptr()[i].object().name().cstr();
	161	int n = MIN(63, strlen(p));
	162	strncpy(qtemp[i].m_name, p, n);
	163	qtemp[i].m_name[n] = 0;
	164	}
165	165	#if 0
166	166
167		netlist_time nlt = (netlist_time ) ;
168		netlist_base_t::queue_t::entry_t *p = m_netlist->queue().listptr()[i];
169		netlist_time nlt = (netlist_time ) p->time_ptr();
170		save_pointer(nlt->get_internaltype_ptr(), "queue", 1, i);
	167	netlist_time nlt = (netlist_time ) ;
	168	netlist_base_t::queue_t::entry_t *p = m_netlist->queue().listptr()[i];
	169	netlist_time nlt = (netlist_time ) p->time_ptr();
	170	save_pointer(nlt->get_internaltype_ptr(), "queue", 1, i);
171	171	#endif
172	172	}
173	173
r26736	r26737
179	179
180	180	ATTR_COLD void netlist_mame_device::save_state()
181	181	{
182		for (pstate_entry_t::list_t::entry_t *p = m_netlist->save_list().first(); p != NULL; p = m_netlist->save_list().next(p))
183		{
184		pstate_entry_t *s = p->object();
185		NL_VERBOSE_OUT(("saving state for %s\n", s->m_name.cstr()));
186		switch (s->m_dt)
187		{
188		case DT_DOUBLE:
189		save_pointer((double *) s->m_ptr, s->m_name, s->m_count);
190		break;
191		case DT_INT64:
192		save_pointer((INT64 *) s->m_ptr, s->m_name, s->m_count);
193		break;
194		case DT_INT8:
195		save_pointer((INT8 *) s->m_ptr, s->m_name, s->m_count);
196		break;
197		case DT_INT:
198		save_pointer((int *) s->m_ptr, s->m_name, s->m_count);
199		break;
200		case DT_BOOLEAN:
201		save_pointer((bool *) s->m_ptr, s->m_name, s->m_count);
202		break;
203		case NOT_SUPPORTED:
204		default:
205		m_netlist->xfatalerror("found unsupported save element %s\n", s->m_name.cstr());
206		break;
207		}
208		}
	182	for (pstate_entry_t::list_t::entry_t *p = m_netlist->save_list().first(); p != NULL; p = m_netlist->save_list().next(p))
	183	{
	184	pstate_entry_t *s = p->object();
	185	NL_VERBOSE_OUT(("saving state for %s\n", s->m_name.cstr()));
	186	switch (s->m_dt)
	187	{
	188	case DT_DOUBLE:
	189	save_pointer((double *) s->m_ptr, s->m_name, s->m_count);
	190	break;
	191	case DT_INT64:
	192	save_pointer((INT64 *) s->m_ptr, s->m_name, s->m_count);
	193	break;
	194	case DT_INT8:
	195	save_pointer((INT8 *) s->m_ptr, s->m_name, s->m_count);
	196	break;
	197	case DT_INT:
	198	save_pointer((int *) s->m_ptr, s->m_name, s->m_count);
	199	break;
	200	case DT_BOOLEAN:
	201	save_pointer((bool *) s->m_ptr, s->m_name, s->m_count);
	202	break;
	203	case NOT_SUPPORTED:
	204	default:
	205	m_netlist->xfatalerror("found unsupported save element %s\n", s->m_name.cstr());
	206	break;
	207	}
	208	}
209	209
210		// handle the queue
	210	// handle the queue
211	211
212		save_item(NAME(qsize));
213		for (int i = 0; i < m_netlist->queue().capacity(); i++ )
214		{
215		save_pointer(qtemp[i].m_time.get_internaltype_ptr(), "queue_time", 1, i);
216		save_pointer(qtemp[i].m_name, "queue_name", sizeof(qtemp[i].m_name), i);
	212	save_item(NAME(qsize));
	213	for (int i = 0; i < m_netlist->queue().capacity(); i++ )
	214	{
	215	save_pointer(qtemp[i].m_time.get_internaltype_ptr(), "queue_time", 1, i);
	216	save_pointer(qtemp[i].m_name, "queue_name", sizeof(qtemp[i].m_name), i);
217	217
218		}
	218	}
219	219	}
220	220
221	221	ATTR_COLD UINT64 netlist_mame_device::execute_clocks_to_cycles(UINT64 clocks) const
r26736	r26737
235	235	// debugging
236	236	//m_ppc = m_pc; // copy PC to previous PC
237	237	if (check_debugger)
238		debugger_instruction_hook(this, 0); //m_pc);
	238	debugger_instruction_hook(this, 0); //m_pc);
239	239
240	240	m_netlist->process_queue(m_icount);
241	241	}

trunk/src/emu/machine/nscsi_cb.c
r26736	r26737
4	4
5	5	nscsi_callback_device::nscsi_callback_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
6	6	: nscsi_device(mconfig, NSCSI_CB, "SCSI callback (new)", tag, owner, clock, "nscsi_cb", __FILE__),
7		m_write_rst(*this),
8		m_write_atn(*this),
9		m_write_ack(*this),
10		m_write_req(*this),
11		m_write_msg(*this),
12		m_write_io(*this),
13		m_write_cd(*this),
14		m_write_sel(*this),
15		m_write_bsy(*this)
	7	m_write_rst(*this),
	8	m_write_atn(*this),
	9	m_write_ack(*this),
	10	m_write_req(*this),
	11	m_write_msg(*this),
	12	m_write_io(*this),
	13	m_write_cd(*this),
	14	m_write_sel(*this),
	15	m_write_bsy(*this)
16	16	{
17	17	}
18	18

trunk/src/emu/machine/netlist.h
r26736	r26737
70	70	// ----------------------------------------------------------------------------------------
71	71
72	72	#define NETLIST_MEMREGION(_name) \
73		netlist.parse((char *)downcast<netlist_mame_t &>(netlist.netlist()).machine().root_device().memregion(_name)->base());
	73	netlist.parse((char *)downcast<netlist_mame_t &>(netlist.netlist()).machine().root_device().memregion(_name)->base());
74	74
75	75	#define NETDEV_ANALOG_CALLBACK(_name, _IN, _class, _member, _tag) \
76		{ \
77		NETLIB_NAME(analog_callback) dev = downcast<NETLIB_NAME(analog_callback) >(netlist.register_dev(NET_NEW(analog_callback), # _name)); \
78		netlist_analog_output_delegate d = netlist_analog_output_delegate(& _class :: _member, # _class "::" # _member, _tag, (_class *) 0); \
79		dev->register_callback(d); \
80		} \
81		NET_CONNECT(_name, IN, _IN)
	76	{ \
	77	NETLIB_NAME(analog_callback) dev = downcast<NETLIB_NAME(analog_callback) >(netlist.register_dev(NET_NEW(analog_callback), # _name)); \
	78	netlist_analog_output_delegate d = netlist_analog_output_delegate(& _class :: _member, # _class "::" # _member, _tag, (_class *) 0); \
	79	dev->register_callback(d); \
	80	} \
	81	NET_CONNECT(_name, IN, _IN)
82	82
83	83	#define NETDEV_ANALOG_CALLBACK_MEMBER(_name) \
84		void _name(const double data, const attotime &time)
	84	void _name(const double data, const attotime &time)
85	85
86	86	class netlist_mame_device;
87	87
r26736	r26737
89	89	{
90	90	public:
91	91
92		netlist_mame_t(netlist_mame_device &parent)
93		: netlist_base_t(),
94		m_parent(parent)
95		{}
96		virtual ~netlist_mame_t() { };
	92	netlist_mame_t(netlist_mame_device &parent)
	93	: netlist_base_t(),
	94	m_parent(parent)
	95	{}
	96	virtual ~netlist_mame_t() { };
97	97
98		inline running_machine &machine();
	98	inline running_machine &machine();
99	99
100		netlist_mame_device &parent() { return m_parent; }
	100	netlist_mame_device &parent() { return m_parent; }
101	101
102	102	protected:
103	103
104		void vfatalerror(const char *format, va_list ap) const
105		{
106		emu_fatalerror error(format, ap);
107		throw error;
108		}
	104	void vfatalerror(const char *format, va_list ap) const
	105	{
	106	emu_fatalerror error(format, ap);
	107	throw error;
	108	}
109	109
110	110	private:
111		netlist_mame_device &m_parent;
	111	netlist_mame_device &m_parent;
112	112	};
113	113
114	114	// ----------------------------------------------------------------------------------------
r26736	r26737
121	121	// ======================> netlist_mame_device
122	122
123	123	class netlist_mame_device : public device_t,
124		public device_execute_interface
125		//public device_state_interface
126		//, public device_memory_interface
	124	public device_execute_interface
	125	//public device_state_interface
	126	//, public device_memory_interface
127	127	{
128	128	public:
129	129
130	130	template<bool _Required, class _NETClass>
131	131	class output_finder;
132		template<class C>
	132	template<class C>
133	133	class optional_output;
134	134	template<class C>
135	135	class required_output;
136		template<class C>
	136	template<class C>
137	137	class optional_param;
138		template<class C>
	138	template<class C>
139	139	class required_param;
140	140	class on_device_start;
141	141
r26736	r26737
159	159	virtual void device_stop();
160	160	virtual void device_reset();
161	161	virtual void device_post_load();
162		virtual void device_pre_save();
	162	virtual void device_pre_save();
163	163	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
164	164	virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const;
165	165	virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const;
r26736	r26737
173	173	// more save state ... needs to go somewhere else
174	174
175	175	struct qentry {
176		netlist_time m_time;
177		char m_name[64];
	176	netlist_time m_time;
	177	char m_name[64];
178	178	};
179	179
180	180	qentry qtemp[1024];
r26736	r26737
193	193
194	194	inline running_machine &netlist_mame_t::machine()
195	195	{
196		return m_parent.machine();
	196	return m_parent.machine();
197	197	}
198	198
199	199	// ----------------------------------------------------------------------------------------
r26736	r26737
205	205	class NETLIB_NAME(analog_callback) : public netlist_device_t
206	206	{
207	207	public:
208		NETLIB_NAME(analog_callback)()
209		: netlist_device_t() { }
	208	NETLIB_NAME(analog_callback)()
	209	: netlist_device_t() { }
210	210
211		ATTR_COLD void start()
212		{
213		register_input("IN", m_in);
214		m_callback.bind_relative_to(downcast<netlist_mame_t &>(netlist()).machine().root_device());
215		}
	211	ATTR_COLD void start()
	212	{
	213	register_input("IN", m_in);
	214	m_callback.bind_relative_to(downcast<netlist_mame_t &>(netlist()).machine().root_device());
	215	}
216	216
217		ATTR_COLD void register_callback(netlist_analog_output_delegate callback)
218		{
219		m_callback = callback;
220		}
	217	ATTR_COLD void register_callback(netlist_analog_output_delegate callback)
	218	{
	219	m_callback = callback;
	220	}
221	221
222		ATTR_HOT void update()
223		{
224		// FIXME: Remove after device cleanup
225		if (!m_callback.isnull())
226		m_callback(INPANALOG(m_in), downcast<netlist_mame_t &>(netlist()).parent().local_time());
227		}
	222	ATTR_HOT void update()
	223	{
	224	// FIXME: Remove after device cleanup
	225	if (!m_callback.isnull())
	226	m_callback(INPANALOG(m_in), downcast<netlist_mame_t &>(netlist()).parent().local_time());
	227	}
228	228
229	229	private:
230		netlist_analog_input_t m_in;
231		netlist_analog_output_delegate m_callback;
	230	netlist_analog_input_t m_in;
	231	netlist_analog_output_delegate m_callback;
232	232	};
233	233
234	234	class NETLIB_NAME(sound) : public netlist_device_t
235	235	{
236	236	public:
237		NETLIB_NAME(sound)()
238		: netlist_device_t() { }
	237	NETLIB_NAME(sound)()
	238	: netlist_device_t() { }
239	239
240		static const int BUFSIZE = 2048;
	240	static const int BUFSIZE = 2048;
241	241
242		ATTR_COLD void start()
243		{
244		register_input("IN", m_in);
245		m_cur = 0;
246		m_last_pos = 0;
247		m_last_buffer = netlist_time::zero;
248		m_sample = netlist_time::zero; // FIXME: divide by zero
249		}
	242	ATTR_COLD void start()
	243	{
	244	register_input("IN", m_in);
	245	m_cur = 0;
	246	m_last_pos = 0;
	247	m_last_buffer = netlist_time::zero;
	248	m_sample = netlist_time::zero; // FIXME: divide by zero
	249	}
250	250
251		ATTR_HOT void sound_update()
252		{
253		netlist_time current = netlist().time();
254		int pos = (current - m_last_buffer) / m_sample;
255		if (pos >= BUFSIZE)
256		netlist().xfatalerror("sound %s: exceeded BUFSIZE\n", name().cstr());
257		while (m_last_pos < pos )
258		{
259		m_buffer[m_last_pos++] = m_cur;
260		}
261		}
	251	ATTR_HOT void sound_update()
	252	{
	253	netlist_time current = netlist().time();
	254	int pos = (current - m_last_buffer) / m_sample;
	255	if (pos >= BUFSIZE)
	256	netlist().xfatalerror("sound %s: exceeded BUFSIZE\n", name().cstr());
	257	while (m_last_pos < pos )
	258	{
	259	m_buffer[m_last_pos++] = m_cur;
	260	}
	261	}
262	262
263		ATTR_HOT void update()
264		{
265		double val = INPANALOG(m_in);
266		sound_update();
267		m_cur = val;
268		}
	263	ATTR_HOT void update()
	264	{
	265	double val = INPANALOG(m_in);
	266	sound_update();
	267	m_cur = val;
	268	}
269	269
270	270	private:
271		netlist_analog_input_t m_in;
272		netlist_time m_sample;
273		double m_cur;
274		int m_last_pos;
275		netlist_time m_last_buffer;
276		stream_sample_t m_buffer[BUFSIZE];
	271	netlist_analog_input_t m_in;
	272	netlist_time m_sample;
	273	double m_cur;
	274	int m_last_pos;
	275	netlist_time m_last_buffer;
	276	stream_sample_t m_buffer[BUFSIZE];
277	277	};
278	278
279	279

trunk/src/emu/machine/nscsi_s1410.c
r26736	r26737
10	10	void nscsi_s1410_device::device_reset()
11	11	{
12	12	nscsi_harddisk_device::device_reset();
13
	13
14	14	// initialize drive characteristics
15	15	params[0] = 0;
16	16	params[1] = 153;
r26736	r26737
44	44	scsi_status_complete(SS_NOT_READY);
45	45	return;
46	46	}
47
	47
48	48	scsi_status_complete(SS_GOOD);
49	49	break;
50	50
r26736	r26737
56	56
57	57	lba = ((scsi_cmdbuf[1] & 0x1f)<<16) \| (scsi_cmdbuf[2]<<8) \| scsi_cmdbuf[3];
58	58	blocks = (bytes_per_sector == 256) ? 32 : 17;
59
	59
60	60	int track_length = blocks*bytes_per_sector;
61	61	UINT8 *data = global_alloc_array(UINT8,track_length);
62	62	memset(data, 0xc6, track_length);
r26736	r26737
76	76	scsi_status_complete(SS_NOT_READY);
77	77	return;
78	78	}
79
	79
80	80	scsi_data_in(2, 3);
81	81	scsi_status_complete(SS_GOOD);
82	82	break;
r26736	r26737
103	103	}
104	104	scsi_status_complete(SS_GOOD);
105	105	break;
106
	106
107	107	case SC_READ_ECC_BURST:
108	108	case SC_RAM_DIAG:
109	109	case SC_DRIVE_DIAG:
r26736	r26737
135	135	switch(scsi_cmdbuf[0]) {
136	136	case SC_FORMAT_ALT_TRACK:
137	137	break;
138
	138
139	139	case SC_INIT_DRIVE_PARAMS:
140	140	params[pos] = data;
141	141	break;

trunk/src/emu/machine/nscsi_s1410.h
r26736	r26737
12	12	protected:
13	13	// SCSI status returns
14	14	enum {
15		SS_GOOD = 0x00,
16		SS_NO_INDEX = 0x01,
17		SS_NO_SEEK_COMPLETE = 0x02,
18		SS_WRITE_FAULT = 0x03,
19		SS_NOT_READY = 0x04,
20		SS_TK00_NOT_FOUND = 0x06,
21		SS_SEEK_IN_PROGRESS = 0x08,
22		SS_ID_FIELD_ERROR = 0x10,
23		SS_DATA_ERROR = 0x11,
24		SS_SAM_NOT_FOUND = 0x12,
25		SS_SECTOR_NOT_FOUND = 0x14,
26		SS_SEEK_ERROR = 0x15,
27		SS_ECC = 0x18,
28		SS_BAD_TRACK = 0x19,
29		SS_FORMAT_ERROR = 0x1a,
30		SS_ALT_TRACK = 0x1c,
31		SS_ALT_TRACK_DEFECT = 0x1d,
	15	SS_GOOD = 0x00,
	16	SS_NO_INDEX = 0x01,
	17	SS_NO_SEEK_COMPLETE = 0x02,
	18	SS_WRITE_FAULT = 0x03,
	19	SS_NOT_READY = 0x04,
	20	SS_TK00_NOT_FOUND = 0x06,
	21	SS_SEEK_IN_PROGRESS = 0x08,
	22	SS_ID_FIELD_ERROR = 0x10,
	23	SS_DATA_ERROR = 0x11,
	24	SS_SAM_NOT_FOUND = 0x12,
	25	SS_SECTOR_NOT_FOUND = 0x14,
	26	SS_SEEK_ERROR = 0x15,
	27	SS_ECC = 0x18,
	28	SS_BAD_TRACK = 0x19,
	29	SS_FORMAT_ERROR = 0x1a,
	30	SS_ALT_TRACK = 0x1c,
	31	SS_ALT_TRACK_DEFECT = 0x1d,
32	32	SS_ALT_TRACK_NOT_FOUND = 0x1e,
33	33	SS_ALT_TRACK_SAME = 0x1f,
34		SS_RAM_ERROR = 0x30,
35		SS_ROM_ERROR = 0x31,
36		SS_ECC_CHECK_FAILURE = 0x32
	34	SS_RAM_ERROR = 0x30,
	35	SS_ROM_ERROR = 0x31,
	36	SS_ECC_CHECK_FAILURE = 0x32
37	37	};
38	38
39	39	// SCSI commands
40	40	enum {
41		SC_TEST_UNIT_READY = 0x00,
42		SC_REZERO = 0x01,
43		SC_REQUEST_SENSE = 0x03,
44		SC_FORMAT_UNIT = 0x04,
45		SC_CHECK_TRACK_FORMAT = 0x05,
46		SC_FORMAT_TRACK = 0x06,
47		SC_REASSIGN_BLOCKS = 0x07,
48		SC_READ = 0x08,
49		SC_WRITE = 0x0a,
50		SC_SEEK = 0x0b,
	41	SC_TEST_UNIT_READY = 0x00,
	42	SC_REZERO = 0x01,
	43	SC_REQUEST_SENSE = 0x03,
	44	SC_FORMAT_UNIT = 0x04,
	45	SC_CHECK_TRACK_FORMAT = 0x05,
	46	SC_FORMAT_TRACK = 0x06,
	47	SC_REASSIGN_BLOCKS = 0x07,
	48	SC_READ = 0x08,
	49	SC_WRITE = 0x0a,
	50	SC_SEEK = 0x0b,
51	51	SC_INIT_DRIVE_PARAMS = 0x0c,
52	52	SC_READ_ECC_BURST = 0x0d,
53	53	SC_FORMAT_ALT_TRACK = 0x0e,

trunk/src/emu/machine/upd4992.c
r26736	r26737
2	2	// copyright-holders: Angelo Salese
3	3	/***************************************************************************
4	4
5		uPD4992 parallel RTC
	5	uPD4992 parallel RTC
6	6
7		TODO:
8		- Add timers
9		- Add leap year count
10		- Add 12 hours mode
11		- Add mode/control register
	7	TODO:
	8	- Add timers
	9	- Add leap year count
	10	- Add 12 hours mode
	11	- Add mode/control register
12	12
13	13	***************************************************************************/
14	14
r26736	r26737
35	35
36	36	upd4992_device::upd4992_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
37	37	: device_t(mconfig, UPD4992, "uPD4992", tag, owner, clock, "upd4992", __FILE__),
38		device_rtc_interface(mconfig, *this)
	38	device_rtc_interface(mconfig, *this)
39	39	{
40	40	}
41	41

trunk/src/emu/machine/upd4992.h
r26736	r26737
2	2	// copyright-holders: Angelo Salese
3	3	/***************************************************************************
4	4
5		uPD4992 RTC
	5	uPD4992 RTC
6	6
7	7	***************************************************************************/
8	8
r26736	r26737
27	27	// ======================> upd4992_device
28	28
29	29	class upd4992_device : public device_t,
30		public device_rtc_interface
	30	public device_rtc_interface
31	31	{
32	32	public:
33	33	// construction/destruction

trunk/src/emu/machine/z80dma.c
r26736	r26737
123	123	#define EOB_F_CLEAR (m_status \|= 0x20)
124	124
125	125	#define READY_ACTIVE_HIGH ((WR5>>3) & 0x01)
126		#define AUTO_RESTART ((WR5>>5) & 0x01)
	126	#define AUTO_RESTART ((WR5>>5) & 0x01)
127	127
128	128	#define INTERRUPT_ENABLE (WR3 & 0x20)
129	129	#define INT_ON_MATCH (INTERRUPT_CTRL & 0x01)

trunk/src/emu/machine/mc2661.c
r26736	r26737
370	370	UINT32 tx_baud = baud_rates[data & 0x0f];
371	371	if(data & 0x10) // internal receiver clock
372	372	{
373		// if((m_mr[0] & 0x03) != 0)
374		// rx_baud *= 16;
	373	// if((m_mr[0] & 0x03) != 0)
	374	// rx_baud *= 16;
375	375	}
376	376	else // external receiver clock
377	377	{
r26736	r26737
390	390	}
391	391	if(data & 0x20) // internal transmitter clock
392	392	{
393		// if((m_mr[0] & 0x03) != 0)
394		// tx_baud *= 16;
	393	// if((m_mr[0] & 0x03) != 0)
	394	// tx_baud *= 16;
395	395	}
396	396	else // external transmitter clock
397	397	{

trunk/src/emu/machine/t10mmc.c
r26736	r26737
550	550
551	551	case T10MMC_CMD_READ_TOC_PMA_ATIP:
552	552	/*
553		Track numbers are problematic here: 0 = lead-in, 0xaa = lead-out.
554		That makes sense in terms of how real-world CDs are referred to, but
555		our internal routines for tracks use "0" as track 1. That probably
556		should be fixed...
	553	Track numbers are problematic here: 0 = lead-in, 0xaa = lead-out.
	554	That makes sense in terms of how real-world CDs are referred to, but
	555	our internal routines for tracks use "0" as track 1. That probably
	556	should be fixed...
557	557	*/
558	558	{
559	559	bool msf = (command[1] & 0x2) != 0;

trunk/src/emu/machine/tmp68301.c
r26736	r26737
6	6	3 timers, address decoder, wait generator, interrupt controller,
7	7	all integrated in a single chip.
8	8
9		TODO:
10		- Interrupt generation: handle pending / in-service mechanisms
11		- Parallel port: handle timing latency
12		- Serial port: not done at all
13		- (and many other things)
	9	TODO:
	10	- Interrupt generation: handle pending / in-service mechanisms
	11	- Parallel port: handle timing latency
	12	- Serial port: not done at all
	13	- (and many other things)
14	14
15	15	***************************************************************************/
16	16
r26736	r26737
20	20	const device_type TMP68301 = &device_creator<tmp68301_device>;
21	21
22	22	static ADDRESS_MAP_START( tmp68301_regs, AS_0, 16, tmp68301_device )
23		// AM_RANGE(0x000,0x3ff) AM_RAM
	23	// AM_RANGE(0x000,0x3ff) AM_RAM
24	24	AM_RANGE(0x094,0x095) AM_READWRITE(imr_r,imr_w)
25	25	AM_RANGE(0x098,0x099) AM_READWRITE(iisr_r,iisr_w)
26	26
r26736	r26737
63	63	WRITE16_MEMBER(tmp68301_device::scr_w)
64	64	{
65	65	/*
66		*--- ---- CKSE
67		--*- ---- RES
68		---- ---* INTM
	66	*--- ---- CKSE
	67	--*- ---- RES
	68	---- ---* INTM
69	69	*/
70	70
71	71	COMBINE_DATA(&m_scr);

trunk/src/emu/netlist/nl_parser.c
r26736	r26737
27	27	NL_VERBOSE_OUT(("Parser: Device: %s\n", n.cstr()));
28	28	if (n == "NET_ALIAS")
29	29	net_alias();
30		else if (n == "NET_C")
31		net_c();
	30	else if (n == "NET_C")
	31	net_c();
32	32	else if (n == "NETDEV_PARAM")
33	33	netdev_param();
34		else if (n == "NETDEV_R")
35		netdev_device(n, "R");
36		else if (n == "NETDEV_C")
37		netdev_device(n, "C");
38		else if (n == "NETDEV_POT")
39		netdev_device(n, "R");
40		else if (n == "NETDEV_D")
41		netdev_device(n, "model", true);
	34	else if (n == "NETDEV_R")
	35	netdev_device(n, "R");
	36	else if (n == "NETDEV_C")
	37	netdev_device(n, "C");
	38	else if (n == "NETDEV_POT")
	39	netdev_device(n, "R");
	40	else if (n == "NETDEV_D")
	41	netdev_device(n, "model", true);
42	42	else if ((n == "NETDEV_TTL_CONST") \|\| (n == "NETDEV_ANALOG_CONST"))
43	43	netdev_const(n);
44	44	else
r26736	r26737
60	60
61	61	void netlist_parser::net_c()
62	62	{
63		pstring t1;
64		pstring t2;
65		skipws();
66		t1 = getname(',');
67		skipws();
68		t2 = getname(')');
69		NL_VERBOSE_OUT(("Parser: Connect: %s %s\n", t1.cstr(), t2.cstr()));
70		m_setup.register_link(t1 , t2);
	63	pstring t1;
	64	pstring t2;
	65	skipws();
	66	t1 = getname(',');
	67	skipws();
	68	t2 = getname(')');
	69	NL_VERBOSE_OUT(("Parser: Connect: %s %s\n", t1.cstr(), t2.cstr()));
	70	m_setup.register_link(t1 , t2);
71	71	}
72	72
73	73	void netlist_parser::netdev_param()
r26736	r26737
98	98	val = eval_param();
99	99	paramfq = name + ".CONST";
100	100	NL_VERBOSE_OUT(("Parser: Const: %s %f\n", name.cstr(), val));
101		check_char(')');
	101	check_char(')');
102	102	m_setup.register_param(paramfq, val);
103	103	}
104	104
r26736	r26737
126	126	}
127	127	/*
128	128	if (cnt != dev->m_terminals.count() && !dev->variable_input_count())
129		fatalerror("netlist: input count mismatch for %s - expected %d found %d\n", devname.cstr(), dev->m_terminals.count(), cnt);
130		if (dev->variable_input_count())
131		{
132		NL_VERBOSE_OUT(("variable inputs %s: %d\n", dev->name().cstr(), cnt));
133		}
134		*/
	129	fatalerror("netlist: input count mismatch for %s - expected %d found %d\n", devname.cstr(), dev->m_terminals.count(), cnt);
	130	if (dev->variable_input_count())
	131	{
	132	NL_VERBOSE_OUT(("variable inputs %s: %d\n", dev->name().cstr(), cnt));
	133	}
	134	*/
135	135	}
136	136
137	137	void netlist_parser::netdev_device(const pstring &dev_type, const pstring &default_param, bool isString)
138	138	{
139		netlist_device_t *dev;
	139	netlist_device_t *dev;
140	140
141		skipws();
142		pstring devname = getname2(',', ')');
143		pstring defparam = devname + "." + default_param;
144		dev = m_setup.factory().new_device_by_name(dev_type, m_setup);
145		m_setup.register_dev(dev, devname);
146		NL_VERBOSE_OUT(("Parser: IC: %s\n", devname.cstr()));
147		if (getc() != ')')
148		{
149		// have a default param
150		skipws();
151		if (isString)
152		{
153		pstring val = getname(')');
154		ungetc();
155		NL_VERBOSE_OUT(("Parser: Default param: %s %s\n", defparam.cstr(), val.cstr()));
156		m_setup.register_param(defparam, val);
157		}
158		else
159		{
160		double val = eval_param();
161		NL_VERBOSE_OUT(("Parser: Default param: %s %f\n", defparam.cstr(), val));
162		m_setup.register_param(defparam, val);
163		}
164		}
165		check_char(')');
	141	skipws();
	142	pstring devname = getname2(',', ')');
	143	pstring defparam = devname + "." + default_param;
	144	dev = m_setup.factory().new_device_by_name(dev_type, m_setup);
	145	m_setup.register_dev(dev, devname);
	146	NL_VERBOSE_OUT(("Parser: IC: %s\n", devname.cstr()));
	147	if (getc() != ')')
	148	{
	149	// have a default param
	150	skipws();
	151	if (isString)
	152	{
	153	pstring val = getname(')');
	154	ungetc();
	155	NL_VERBOSE_OUT(("Parser: Default param: %s %s\n", defparam.cstr(), val.cstr()));
	156	m_setup.register_param(defparam, val);
	157	}
	158	else
	159	{
	160	double val = eval_param();
	161	NL_VERBOSE_OUT(("Parser: Default param: %s %f\n", defparam.cstr(), val));
	162	m_setup.register_param(defparam, val);
	163	}
	164	}
	165	check_char(')');
166	166	}
167	167
168	168	// ----------------------------------------------------------------------------------------
r26736	r26737
171	171
172	172	void netlist_parser::skipeol()
173	173	{
174		char c = getc();
	174	char c = getc();
175	175	while (c)
176	176	{
177	177	if (c == 10)
r26736	r26737
197	197	case 13:
198	198	break;
199	199	case '/':
200		c = getc();
	200	c = getc();
201	201	if (c == '/')
202	202	{
203		skipeol();
	203	skipeol();
204	204	}
205	205	else if (c == '*')
206	206	{
207		int f=0;
208		while ((c = getc()) != 0 )
209		{
210		if (f == 0 && c == '*')
211		f=1;
212		else if (f == 1 && c== '/' )
213		break;
214		else
215		f=0;
216		}
	207	int f=0;
	208	while ((c = getc()) != 0 )
	209	{
	210	if (f == 0 && c == '*')
	211	f=1;
	212	else if (f == 1 && c== '/' )
	213	break;
	214	else
	215	f=0;
	216	}
217	217	}
218	218	break;
219	219	default:
220		ungetc();
	220	ungetc();
221	221	return;
222	222	}
223	223	}
r26736	r26737
243	243
244	244	while ((c != sep1) && (c != sep2))
245	245	{
246		*p1++ = c;
247		c = getc();
	246	*p1++ = c;
	247	c = getc();
248	248	}
249	249	*p1 = 0;
250	250	ungetc();
r26736	r26737
278	278	f = i;
279	279	ret = s.substr(strlen(macs[f])).as_double(&e);
280	280	if ((f>0) && e)
281		m_setup.netlist().xfatalerror("Parser: Error with parameter ...\n");
282		if (f>0)
283		check_char(')');
	281	m_setup.netlist().xfatalerror("Parser: Error with parameter ...\n");
	282	if (f>0)
	283	check_char(')');
284	284	return ret * facs[f];
285	285	}
286	286
287	287	unsigned char netlist_parser::getc()
288	288	{
289		if (*m_px)
290		return *(m_px++);
291		else
292		return *m_px;
	289	if (*m_px)
	290	return *(m_px++);
	291	else
	292	return *m_px;
293	293	}
294	294
295	295	void netlist_parser::ungetc()
296	296	{
297		m_px--;
	297	m_px--;
298	298	}

trunk/src/emu/netlist/pstring.c
r26736	r26737
24	24	//#define DEBUG_MODE (0)
25	25
26	26	#ifdef MAME_DEBUG
27		#ifndef IMMEDIATE_MODE
28		#define IMMEDIATE_MODE (0)
29		#endif
30		#ifndef DEBUG_MODE
31		#define DEBUG_MODE (1)
32		#endif
	27	#ifndef IMMEDIATE_MODE
	28	#define IMMEDIATE_MODE (0)
	29	#endif
	30	#ifndef DEBUG_MODE
	31	#define DEBUG_MODE (1)
	32	#endif
33	33	#else
34		#ifndef IMMEDIATE_MODE
35		#define IMMEDIATE_MODE (1)
36		#endif
37		#ifndef DEBUG_MODE
38		#define DEBUG_MODE (0)
39		#endif
	34	#ifndef IMMEDIATE_MODE
	35	#define IMMEDIATE_MODE (1)
	36	#endif
	37	#ifndef DEBUG_MODE
	38	#define DEBUG_MODE (0)
	39	#endif
40	40	#endif
41	41
42	42	pstring::~pstring()
43	43	{
44		sfree(m_ptr);
	44	sfree(m_ptr);
45	45	}
46	46
47	47	void pstring::pcat(const char *s)
48	48	{
49		int slen = strlen(s);
50		str_t *n = salloc(m_ptr->len() + slen);
51		if (m_ptr->len() > 0)
52		memcpy(n->str(), m_ptr->str(), m_ptr->len());
53		if (slen > 0)
54		memcpy(n->str() + m_ptr->len(), s, slen);
55		*(n->str() + n->len()) = 0;
56		sfree(m_ptr);
57		m_ptr = n;
	49	int slen = strlen(s);
	50	str_t *n = salloc(m_ptr->len() + slen);
	51	if (m_ptr->len() > 0)
	52	memcpy(n->str(), m_ptr->str(), m_ptr->len());
	53	if (slen > 0)
	54	memcpy(n->str() + m_ptr->len(), s, slen);
	55	*(n->str() + n->len()) = 0;
	56	sfree(m_ptr);
	57	m_ptr = n;
58	58	}
59	59
60	60	void pstring::pcopy(const char *from, int size)
61	61	{
62		str_t *n = salloc(size);
63		if (size > 0)
64		memcpy(n->str(), from, size);
65		*(n->str() + size) = 0;
66		sfree(m_ptr);
67		m_ptr = n;
	62	str_t *n = salloc(size);
	63	if (size > 0)
	64	memcpy(n->str(), from, size);
	65	*(n->str() + size) = 0;
	66	sfree(m_ptr);
	67	m_ptr = n;
68	68	}
69	69
70	70	pstring pstring::substr(unsigned int start, int count) const
71	71	{
72		int alen = len();
73		if (start >= alen)
74		return pstring();
75		if (count <0 \|\| start + count > alen)
76		count = alen - start;
77		pstring ret;
78		ret.pcopy(cstr() + start, count);
79		return ret;
	72	int alen = len();
	73	if (start >= alen)
	74	return pstring();
	75	if (count <0 \|\| start + count > alen)
	76	count = alen - start;
	77	pstring ret;
	78	ret.pcopy(cstr() + start, count);
	79	return ret;
80	80	}
81	81
82	82	pstring pstring::ucase() const
83	83	{
84		pstring ret = *this;
85		ret.pcopy(cstr(), len());
86		for (int i=0; i<ret.len(); i++)
87		ret.m_ptr->m_str[i] = toupper((unsigned) ret.m_ptr->m_str[i]);
88		return ret;
	84	pstring ret = *this;
	85	ret.pcopy(cstr(), len());
	86	for (int i=0; i<ret.len(); i++)
	87	ret.m_ptr->m_str[i] = toupper((unsigned) ret.m_ptr->m_str[i]);
	88	return ret;
89	89	}
90	90
91	91	//-------------------------------------------------
r26736	r26737
94	94
95	95	int pstring::pcmpi(const char lhs, const char rhs, int count) const
96	96	{
97		// loop while equal until we hit the end of strings
98		int index;
99		for (index = 0; index < count; index++)
100		if (lhs[index] == 0 \|\| tolower(lhs[index]) != tolower(rhs[index]))
101		break;
	97	// loop while equal until we hit the end of strings
	98	int index;
	99	for (index = 0; index < count; index++)
	100	if (lhs[index] == 0 \|\| tolower(lhs[index]) != tolower(rhs[index]))
	101	break;
102	102
103		// determine the final result
104		if (index < count)
105		return tolower(lhs[index]) - tolower(rhs[index]);
106		if (lhs[index] == 0)
107		return 0;
108		return 1;
	103	// determine the final result
	104	if (index < count)
	105	return tolower(lhs[index]) - tolower(rhs[index]);
	106	if (lhs[index] == 0)
	107	return 0;
	108	return 1;
109	109	}
110	110
111	111	double pstring::as_double(bool *error) const
112	112	{
113		double ret;
114		char *e = NULL;
	113	double ret;
	114	char *e = NULL;
115	115
116		if (error != NULL)
117		*error = false;
118		ret = strtod(cstr(), &e);
119		if (*e != 0)
120		if (error != NULL)
121		*error = true;
122		return ret;
	116	if (error != NULL)
	117	*error = false;
	118	ret = strtod(cstr(), &e);
	119	if (*e != 0)
	120	if (error != NULL)
	121	*error = true;
	122	return ret;
123	123	}
124	124
125	125	long pstring::as_long(bool *error) const
126	126	{
127		double ret;
128		char *e = NULL;
	127	double ret;
	128	char *e = NULL;
129	129
130		if (error != NULL)
131		*error = false;
132		if (startsWith("0x"))
133		ret = strtol(&(cstr()[2]), &e, 16);
134		else
135		ret = strtol(cstr(), &e, 10);
136		if (*e != 0)
137		if (error != NULL)
138		*error = true;
139		return ret;
	130	if (error != NULL)
	131	*error = false;
	132	if (startsWith("0x"))
	133	ret = strtol(&(cstr()[2]), &e, 16);
	134	else
	135	ret = strtol(cstr(), &e, 10);
	136	if (*e != 0)
	137	if (error != NULL)
	138	*error = true;
	139	return ret;
140	140	}
141	141
142	142	pstring pstring::vprintf(va_list args) const
143	143	{
144		// sprintf into the temporary buffer
145		char tempbuf[4096];
146		vsprintf(tempbuf, cstr(), args);
	144	// sprintf into the temporary buffer
	145	char tempbuf[4096];
	146	vsprintf(tempbuf, cstr(), args);
147	147
148		return pstring(tempbuf);
	148	return pstring(tempbuf);
149	149	}
150	150
151	151	// ----------------------------------------------------------------------------------------
r26736	r26737
154	154
155	155	void pstring::sfree(str_t *s)
156	156	{
157		s->m_ref_count--;
158		if (s->m_ref_count == 0)
159		m_pool.dealloc(s);
	157	s->m_ref_count--;
	158	if (s->m_ref_count == 0)
	159	m_pool.dealloc(s);
160	160	}
161	161
162	162	pstring::str_t *pstring::salloc(int n)
163	163	{
164		str_t *ret = new(m_pool, n+1) str_t(n);
165		return ret;
	164	str_t *ret = new(m_pool, n+1) str_t(n);
	165	return ret;
166	166	}
167	167
168	168	pstring pstring::sprintf(const char *format, ...)
169	169	{
170		va_list ap;
171		va_start(ap, format);
172		pstring ret = pstring(format).vprintf(ap);
173		va_end(ap);
174		return ret;
	170	va_list ap;
	171	va_start(ap, format);
	172	pstring ret = pstring(format).vprintf(ap);
	173	va_end(ap);
	174	return ret;
175	175	}
176	176
177	177
178	178	void pstring::resetmem()
179	179	{
180		// Release the 0 string
181		if (m_zero != NULL)
182		sfree(m_zero);
183		m_zero = NULL;
184		m_pool.m_shutdown = true;
185		m_pool.resetmem();
	180	// Release the 0 string
	181	if (m_zero != NULL)
	182	sfree(m_zero);
	183	m_zero = NULL;
	184	m_pool.m_shutdown = true;
	185	m_pool.resetmem();
186	186	}
187	187
188	188	// ----------------------------------------------------------------------------------------
r26736	r26737
191	191
192	192
193	193	pblockpool::pblockpool()
194		: m_shutdown(false)
195		, m_first(NULL)
196		, m_blocksize((DEBUG_MODE) ? 16384 : 16384)
197		, m_align(8)
	194	: m_shutdown(false)
	195	, m_first(NULL)
	196	, m_blocksize((DEBUG_MODE) ? 16384 : 16384)
	197	, m_align(8)
198	198	{
199	199	}
200	200
r26736	r26737
205	205
206	206	void *pblockpool::alloc(const std::size_t n)
207	207	{
208		if (IMMEDIATE_MODE)
209		return (char *) malloc(n);
210		else
211		{
212		int memsize = ((n + m_align - 1) / m_align) * m_align;
213		int min_alloc = MAX(m_blocksize, memsize+sizeof(memblock)-MINDATASIZE);
214		char *ret = NULL;
215		//std::printf("m_first %p\n", m_first);
216		for (memblock *p = m_first; p != NULL && ret == NULL; p = p->next)
217		{
218		if (p->remaining > memsize)
219		{
220		ret = p->cur;
221		p->cur += memsize;
222		p->allocated += 1;
223		p->remaining -= memsize;
224		}
225		}
	208	if (IMMEDIATE_MODE)
	209	return (char *) malloc(n);
	210	else
	211	{
	212	int memsize = ((n + m_align - 1) / m_align) * m_align;
	213	int min_alloc = MAX(m_blocksize, memsize+sizeof(memblock)-MINDATASIZE);
	214	char *ret = NULL;
	215	//std::printf("m_first %p\n", m_first);
	216	for (memblock *p = m_first; p != NULL && ret == NULL; p = p->next)
	217	{
	218	if (p->remaining > memsize)
	219	{
	220	ret = p->cur;
	221	p->cur += memsize;
	222	p->allocated += 1;
	223	p->remaining -= memsize;
	224	}
	225	}
226	226
227		if (ret == NULL)
228		{
229		// need to allocate a new block
230		memblock p = (memblock ) malloc(min_alloc); //new char[min_alloc];
231		p->allocated = 0;
232		p->cur = &p->data[0];
233		p->size = p->remaining = min_alloc - (sizeof(memblock)-MINDATASIZE);
234		p->next = m_first;
235		//std::printf("allocated block size %d\n", sizeof(p->data));
	227	if (ret == NULL)
	228	{
	229	// need to allocate a new block
	230	memblock p = (memblock ) malloc(min_alloc); //new char[min_alloc];
	231	p->allocated = 0;
	232	p->cur = &p->data[0];
	233	p->size = p->remaining = min_alloc - (sizeof(memblock)-MINDATASIZE);
	234	p->next = m_first;
	235	//std::printf("allocated block size %d\n", sizeof(p->data));
236	236
237		ret = p->cur;
238		p->cur += memsize;
239		p->allocated += 1;
240		p->remaining -= memsize;
	237	ret = p->cur;
	238	p->cur += memsize;
	239	p->allocated += 1;
	240	p->remaining -= memsize;
241	241
242		m_first = p;
243		}
	242	m_first = p;
	243	}
244	244
245		return ret;
246		}
	245	return ret;
	246	}
247	247	}
248	248
249	249	void pblockpool::dealloc(void *ptr)
250	250	{
251		if (IMMEDIATE_MODE)
252		free(ptr);
253		else
254		{
255		for (memblock *p = m_first; p != NULL; p = p->next)
256		{
257		if (ptr >= &p->data[0] && ptr < &p->data[p->size])
258		{
259		p->allocated -= 1;
260		if (p->allocated < 0)
261		std::fprintf(stderr, "nstring: memory corruption - crash likely\n");
262		if (p->allocated == 0)
263		{
264		//std::printf("Block entirely freed\n");
265		p->remaining = p->size;
266		p->cur = &p->data[0];
267		}
268		// shutting down ?
269		if (m_shutdown)
270		resetmem(); // try to free blocks
271		return;
272		}
273		}
274		std::fprintf(stderr, "nstring: string <%p> not found on free\n", ptr);
275		}
	251	if (IMMEDIATE_MODE)
	252	free(ptr);
	253	else
	254	{
	255	for (memblock *p = m_first; p != NULL; p = p->next)
	256	{
	257	if (ptr >= &p->data[0] && ptr < &p->data[p->size])
	258	{
	259	p->allocated -= 1;
	260	if (p->allocated < 0)
	261	std::fprintf(stderr, "nstring: memory corruption - crash likely\n");
	262	if (p->allocated == 0)
	263	{
	264	//std::printf("Block entirely freed\n");
	265	p->remaining = p->size;
	266	p->cur = &p->data[0];
	267	}
	268	// shutting down ?
	269	if (m_shutdown)
	270	resetmem(); // try to free blocks
	271	return;
	272	}
	273	}
	274	std::fprintf(stderr, "nstring: string <%p> not found on free\n", ptr);
	275	}
276	276	}
277	277
278	278	void pblockpool::resetmem()
279	279	{
280		if (!IMMEDIATE_MODE)
281		{
282		memblock **p = &m_first;
283		int totalblocks = 0;
284		int freedblocks = 0;
	280	if (!IMMEDIATE_MODE)
	281	{
	282	memblock **p = &m_first;
	283	int totalblocks = 0;
	284	int freedblocks = 0;
285	285
286		while (*p != NULL)
287		{
288		totalblocks++;
289		memblock *next = &((p)->next);
290		if ((*p)->allocated == 0)
291		{
292		//std::printf("freeing block %p\n", *p);
293		memblock freeme = p;
294		p = next;
295		free(freeme); //delete[] *p;
296		freedblocks++;
297		}
298		else
299		{
300		//if (DEBUG_MODE)
301		// std::printf("Allocated: <%s>\n", ((str_t )(&(p)->data[0]))->str());
	286	while (*p != NULL)
	287	{
	288	totalblocks++;
	289	memblock *next = &((p)->next);
	290	if ((*p)->allocated == 0)
	291	{
	292	//std::printf("freeing block %p\n", *p);
	293	memblock freeme = p;
	294	p = next;
	295	free(freeme); //delete[] *p;
	296	freedblocks++;
	297	}
	298	else
	299	{
	300	//if (DEBUG_MODE)
	301	// std::printf("Allocated: <%s>\n", ((str_t )(&(p)->data[0]))->str());
302	302
303		p = next;
304		}
305		}
306		if (DEBUG_MODE)
307		std::printf("Freed %d out of total %d blocks\n", freedblocks, totalblocks);
308		}
	303	p = next;
	304	}
	305	}
	306	if (DEBUG_MODE)
	307	std::printf("Freed %d out of total %d blocks\n", freedblocks, totalblocks);
	308	}
309	309	}

trunk/src/emu/netlist/nl_setup.c
r26736	r26737
17	17	NETDEV_TTL_CONST(ttllow, 0)
18	18	NETDEV_ANALOG_CONST(NC, NETLIST_HIGHIMP_V)
19	19
20		NET_MODEL(".model 1N914 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)")
21		NET_MODEL(".model 1N4148 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)")
22		NET_MODEL(".MODEL BC237B NPN(IS=1.8E-14 ISE=5.0E-14 ISC=1.72E-13 XTI=3 BF=400 BR=35.5 IKF=0.14 IKR=0.03 XTB=1.5 VAF=80 VAR=12.5 VJE=0.58 VJC=0.54 RE=0.6 RC=0.25 RB=0.56 CJE=13E-12 CJC=4E-12 XCJC=0.75 FC=0.5 NF=0.9955 NR=1.005 NE=1.46 NC=1.27 MJE=0.33 MJC=0.33 TF=0.64E-9 TR=50.72E-9 EG=1.11 KF=0 AF=1 VCEO=45V ICRATING=100M MFG=ZETEX)")
	20	NET_MODEL(".model 1N914 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)")
	21	NET_MODEL(".model 1N4148 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)")
	22	NET_MODEL(".MODEL BC237B NPN(IS=1.8E-14 ISE=5.0E-14 ISC=1.72E-13 XTI=3 BF=400 BR=35.5 IKF=0.14 IKR=0.03 XTB=1.5 VAF=80 VAR=12.5 VJE=0.58 VJC=0.54 RE=0.6 RC=0.25 RB=0.56 CJE=13E-12 CJC=4E-12 XCJC=0.75 FC=0.5 NF=0.9955 NR=1.005 NE=1.46 NC=1.27 MJE=0.33 MJC=0.33 TF=0.64E-9 TR=50.72E-9 EG=1.11 KF=0 AF=1 VCEO=45V ICRATING=100M MFG=ZETEX)")
23	23
24	24	NETLIST_END
25	25
r26736	r26737
30	30
31	31	netlist_setup_t::netlist_setup_t(netlist_base_t &netlist)
32	32	: m_netlist(netlist)
33		, m_proxy_cnt(0)
	33	, m_proxy_cnt(0)
34	34	{
35		netlist.set_setup(this);
	35	netlist.set_setup(this);
36	36	}
37	37
38	38	void netlist_setup_t::init()
39	39	{
40		m_factory.initialize();
41		NETLIST_NAME(base)(*this);
	40	m_factory.initialize();
	41	NETLIST_NAME(base)(*this);
42	42	}
43	43
44	44
r26736	r26737
59	59	netlist_device_t netlist_setup_t::register_dev(netlist_device_t dev, const pstring &name)
60	60	{
61	61	if (!(netlist().m_devices.add(name, dev, false)==TMERR_NONE))
62		netlist().xfatalerror("Error adding %s to device list\n", name.cstr());
	62	netlist().xfatalerror("Error adding %s to device list\n", name.cstr());
63	63	return dev;
64	64	}
65	65
r26736	r26737
85	85	netlist_device_t *dev = netlist().m_devices.find(name);
86	86	pstring temp = name + ".";
87	87	if (dev == NULL)
88		netlist().xfatalerror("Device %s does not exist\n", name.cstr());
	88	netlist().xfatalerror("Device %s does not exist\n", name.cstr());
89	89
90	90	//remove_start_with<tagmap_input_t>(m_inputs, temp);
91	91	remove_start_with<tagmap_terminal_t>(m_terminals, temp);
r26736	r26737
94	94	tagmap_link_t::entry_t *p = m_links.first();
95	95	while (p != NULL)
96	96	{
97		tagmap_link_t::entry_t *n = m_links.next(p);
98		if (temp.equals(p->object().e1.substr(0,temp.len())) \|\| temp.equals(p->object().e2.substr(0,temp.len())))
99		m_links.remove(p->object());
100		p = n;
	97	tagmap_link_t::entry_t *n = m_links.next(p);
	98	if (temp.equals(p->object().e1.substr(0,temp.len())) \|\| temp.equals(p->object().e2.substr(0,temp.len())))
	99	m_links.remove(p->object());
	100	p = n;
101	101	}
102	102	netlist().m_devices.remove(name);
103	103	}
104	104
105	105	void netlist_setup_t::register_model(const pstring &model)
106	106	{
107		m_models.add(model);
	107	m_models.add(model);
108	108	}
109	109
110	110	void netlist_setup_t::register_alias(const pstring &alias, const pstring &out)
111	111	{
112		//if (!(m_alias.add(alias, new nstring(out), false)==TMERR_NONE))
	112	//if (!(m_alias.add(alias, new nstring(out), false)==TMERR_NONE))
113	113	if (!(m_alias.add(alias, out, false)==TMERR_NONE))
114		netlist().xfatalerror("Error adding alias %s to alias list\n", alias.cstr());
	114	netlist().xfatalerror("Error adding alias %s to alias list\n", alias.cstr());
115	115	}
116	116
117	117	pstring netlist_setup_t::objtype_as_astr(netlist_object_t &in)
118	118	{
119		switch (in.type())
120		{
121		case netlist_terminal_t::TERMINAL:
122		return "TERMINAL";
123		break;
124		case netlist_terminal_t::INPUT:
125		return "INPUT";
126		break;
127		case netlist_terminal_t::OUTPUT:
128		return "OUTPUT";
129		break;
130		case netlist_terminal_t::NET:
131		return "NET";
132		break;
133		case netlist_terminal_t::PARAM:
134		return "PARAM";
135		break;
136		case netlist_terminal_t::DEVICE:
137		return "DEVICE";
138		break;
139		case netlist_terminal_t::NETLIST:
140		return "NETLIST";
141		break;
142		}
143		// FIXME: noreturn
144		netlist().xfatalerror("Unknown object type %d\n", in.type());
145		return "Error";
	119	switch (in.type())
	120	{
	121	case netlist_terminal_t::TERMINAL:
	122	return "TERMINAL";
	123	break;
	124	case netlist_terminal_t::INPUT:
	125	return "INPUT";
	126	break;
	127	case netlist_terminal_t::OUTPUT:
	128	return "OUTPUT";
	129	break;
	130	case netlist_terminal_t::NET:
	131	return "NET";
	132	break;
	133	case netlist_terminal_t::PARAM:
	134	return "PARAM";
	135	break;
	136	case netlist_terminal_t::DEVICE:
	137	return "DEVICE";
	138	break;
	139	case netlist_terminal_t::NETLIST:
	140	return "NETLIST";
	141	break;
	142	}
	143	// FIXME: noreturn
	144	netlist().xfatalerror("Unknown object type %d\n", in.type());
	145	return "Error";
146	146	}
147	147
148	148	void netlist_setup_t::register_object(netlist_device_t &dev, netlist_core_device_t &upd_dev, const pstring &name, netlist_object_t &obj, const netlist_input_t::state_e state)
149	149	{
150		switch (obj.type())
151		{
152		case netlist_terminal_t::TERMINAL:
153		case netlist_terminal_t::INPUT:
154		case netlist_terminal_t::OUTPUT:
155		{
156		netlist_core_terminal_t &term = dynamic_cast<netlist_core_terminal_t &>(obj);
157		if (obj.isType(netlist_terminal_t::OUTPUT))
158		dynamic_cast<netlist_output_t &>(term).init_object(upd_dev, dev.name() + "." + name);
159		else
160		term.init_object(upd_dev, dev.name() + "." + name, state);
	150	switch (obj.type())
	151	{
	152	case netlist_terminal_t::TERMINAL:
	153	case netlist_terminal_t::INPUT:
	154	case netlist_terminal_t::OUTPUT:
	155	{
	156	netlist_core_terminal_t &term = dynamic_cast<netlist_core_terminal_t &>(obj);
	157	if (obj.isType(netlist_terminal_t::OUTPUT))
	158	dynamic_cast<netlist_output_t &>(term).init_object(upd_dev, dev.name() + "." + name);
	159	else
	160	term.init_object(upd_dev, dev.name() + "." + name, state);
161	161
162		if (!(m_terminals.add(term.name(), &term, false)==TMERR_NONE))
163		netlist().xfatalerror("Error adding %s %s to terminal list\n", objtype_as_astr(term).cstr(), term.name().cstr());
164		NL_VERBOSE_OUT(("%s %s\n", objtype_as_astr(term).cstr(), name.cstr()));
165		}
166		break;
167		case netlist_terminal_t::NET:
168		break;
169		case netlist_terminal_t::PARAM:
170		{
171		netlist_param_t &param = dynamic_cast<netlist_param_t &>(obj);
172		const pstring val = m_params_temp.find(name);
173		if (val != "")
174		{
175		switch (param.param_type())
176		{
177		case netlist_param_t::DOUBLE:
178		{
179		NL_VERBOSE_OUT(("Found parameter ... %s : %s\n", temp.cstr(), val->cstr()));
180		double vald = 0;
181		if (sscanf(val.cstr(), "%lf", &vald) != 1)
182		netlist().xfatalerror("Invalid number conversion %s : %s\n", name.cstr(), val.cstr());
183		dynamic_cast<netlist_param_double_t &>(param).initial(vald);
184		}
185		break;
186		case netlist_param_t::INTEGER:
187		case netlist_param_t::LOGIC:
188		{
189		NL_VERBOSE_OUT(("Found parameter ... %s : %s\n", name.cstr(), val->cstr()));
190		int vald = 0;
191		if (sscanf(val.cstr(), "%d", &vald) != 1)
192		netlist().xfatalerror("Invalid number conversion %s : %s\n", name.cstr(), val.cstr());
193		dynamic_cast<netlist_param_int_t &>(param).initial(vald);
194		}
195		break;
196		case netlist_param_t::STRING:
197		{
198		dynamic_cast<netlist_param_str_t &>(param).initial(val);
199		}
200		break;
201		case netlist_param_t::MODEL:
202		{
203		pstring search = (".model " + val + " ").ucase();
204		bool found = false;
205		for (int i=0; i < m_models.count(); i++)
206		{
207		if (m_models[i].ucase().startsWith(search))
208		{
209		int pl=m_models[i].find("(");
210		int pr=m_models[i].find("(");
211		dynamic_cast<netlist_param_model_t &>(param).initial(m_models[i].substr(pl+1,pr-pl-1));
212		found = true;
213		break;
214		}
215		}
216		if (!found)
217		netlist().xfatalerror("Model %s not found\n", val.cstr());
218		}
219		break;
220		default:
221		netlist().xfatalerror("Parameter is not supported %s : %s\n", name.cstr(), val.cstr());
222		}
223		}
224		if (!(m_params.add(name, &param, false)==TMERR_NONE))
225		netlist().xfatalerror("Error adding parameter %s to parameter list\n", name.cstr());
226		}
227		break;
228		case netlist_terminal_t::DEVICE:
229		netlist().xfatalerror("Device registration not yet supported - \n", name.cstr());
230		break;
231		case netlist_terminal_t::NETLIST:
232		netlist().xfatalerror("Netlist registration not yet supported - \n", name.cstr());
233		break;
234		}
	162	if (!(m_terminals.add(term.name(), &term, false)==TMERR_NONE))
	163	netlist().xfatalerror("Error adding %s %s to terminal list\n", objtype_as_astr(term).cstr(), term.name().cstr());
	164	NL_VERBOSE_OUT(("%s %s\n", objtype_as_astr(term).cstr(), name.cstr()));
	165	}
	166	break;
	167	case netlist_terminal_t::NET:
	168	break;
	169	case netlist_terminal_t::PARAM:
	170	{
	171	netlist_param_t &param = dynamic_cast<netlist_param_t &>(obj);
	172	const pstring val = m_params_temp.find(name);
	173	if (val != "")
	174	{
	175	switch (param.param_type())
	176	{
	177	case netlist_param_t::DOUBLE:
	178	{
	179	NL_VERBOSE_OUT(("Found parameter ... %s : %s\n", temp.cstr(), val->cstr()));
	180	double vald = 0;
	181	if (sscanf(val.cstr(), "%lf", &vald) != 1)
	182	netlist().xfatalerror("Invalid number conversion %s : %s\n", name.cstr(), val.cstr());
	183	dynamic_cast<netlist_param_double_t &>(param).initial(vald);
	184	}
	185	break;
	186	case netlist_param_t::INTEGER:
	187	case netlist_param_t::LOGIC:
	188	{
	189	NL_VERBOSE_OUT(("Found parameter ... %s : %s\n", name.cstr(), val->cstr()));
	190	int vald = 0;
	191	if (sscanf(val.cstr(), "%d", &vald) != 1)
	192	netlist().xfatalerror("Invalid number conversion %s : %s\n", name.cstr(), val.cstr());
	193	dynamic_cast<netlist_param_int_t &>(param).initial(vald);
	194	}
	195	break;
	196	case netlist_param_t::STRING:
	197	{
	198	dynamic_cast<netlist_param_str_t &>(param).initial(val);
	199	}
	200	break;
	201	case netlist_param_t::MODEL:
	202	{
	203	pstring search = (".model " + val + " ").ucase();
	204	bool found = false;
	205	for (int i=0; i < m_models.count(); i++)
	206	{
	207	if (m_models[i].ucase().startsWith(search))
	208	{
	209	int pl=m_models[i].find("(");
	210	int pr=m_models[i].find("(");
	211	dynamic_cast<netlist_param_model_t &>(param).initial(m_models[i].substr(pl+1,pr-pl-1));
	212	found = true;
	213	break;
	214	}
	215	}
	216	if (!found)
	217	netlist().xfatalerror("Model %s not found\n", val.cstr());
	218	}
	219	break;
	220	default:
	221	netlist().xfatalerror("Parameter is not supported %s : %s\n", name.cstr(), val.cstr());
	222	}
	223	}
	224	if (!(m_params.add(name, &param, false)==TMERR_NONE))
	225	netlist().xfatalerror("Error adding parameter %s to parameter list\n", name.cstr());
	226	}
	227	break;
	228	case netlist_terminal_t::DEVICE:
	229	netlist().xfatalerror("Device registration not yet supported - \n", name.cstr());
	230	break;
	231	case netlist_terminal_t::NETLIST:
	232	netlist().xfatalerror("Netlist registration not yet supported - \n", name.cstr());
	233	break;
	234	}
235	235	}
236	236
237	237	void netlist_setup_t::register_link(const pstring &sin, const pstring &sout)
238	238	{
239	239	link_t temp = link_t(sin, sout);
240	240	NL_VERBOSE_OUT(("link %s <== %s\n", sin.cstr(), sout.cstr()));
241		m_links.add(temp);
	241	m_links.add(temp);
242	242	//if (!(m_links.add(sin + "." + sout, temp, false)==TMERR_NONE))
243		// fatalerror("Error adding link %s<==%s to link list\n", sin.cstr(), sout.cstr());
	243	// fatalerror("Error adding link %s<==%s to link list\n", sin.cstr(), sout.cstr());
244	244	}
245	245
246	246	void netlist_setup_t::register_param(const pstring &param, const double value)
247	247	{
248		// FIXME: there should be a better way
249		register_param(param, pstring::sprintf("%.9e", value));
	248	// FIXME: there should be a better way
	249	register_param(param, pstring::sprintf("%.9e", value));
250	250	}
251	251
252	252	void netlist_setup_t::register_param(const pstring &param, const pstring &value)
253	253	{
254		//if (!(m_params_temp.add(param, new nstring(value), false)==TMERR_NONE))
255		if (!(m_params_temp.add(param, value, false)==TMERR_NONE))
256		netlist().xfatalerror("Error adding parameter %s to parameter list\n", param.cstr());
	254	//if (!(m_params_temp.add(param, new nstring(value), false)==TMERR_NONE))
	255	if (!(m_params_temp.add(param, value, false)==TMERR_NONE))
	256	netlist().xfatalerror("Error adding parameter %s to parameter list\n", param.cstr());
257	257	}
258	258
259	259	const pstring netlist_setup_t::resolve_alias(const pstring &name) const
260	260	{
261		pstring temp = name;
262		pstring ret;
	261	pstring temp = name;
	262	pstring ret;
263	263
264		/* FIXME: Detect endless loop */
265		do {
266		ret = temp;
267		temp = m_alias.find(ret);
268		} while (temp != "");
	264	/* FIXME: Detect endless loop */
	265	do {
	266	ret = temp;
	267	temp = m_alias.find(ret);
	268	} while (temp != "");
269	269
270		int p = ret.find(".[");
	270	int p = ret.find(".[");
271	271	if (p > 0)
272	272	{
273		pstring dname = ret;
274		netlist_device_t *dev = netlist().m_devices.find(dname.substr(0,p));
275		if (dev == NULL)
276		netlist().xfatalerror("Device for %s not found\n", name.cstr());
277		int c = atoi(ret.substr(p+2,ret.len()-p-3));
278		temp = dev->name() + "." + dev->m_terminals[c];
279		// reresolve ....
280		do {
281		ret = temp;
282		temp = m_alias.find(ret);
283		} while (temp != "");
	273	pstring dname = ret;
	274	netlist_device_t *dev = netlist().m_devices.find(dname.substr(0,p));
	275	if (dev == NULL)
	276	netlist().xfatalerror("Device for %s not found\n", name.cstr());
	277	int c = atoi(ret.substr(p+2,ret.len()-p-3));
	278	temp = dev->name() + "." + dev->m_terminals[c];
	279	// reresolve ....
	280	do {
	281	ret = temp;
	282	temp = m_alias.find(ret);
	283	} while (temp != "");
284	284	}
285	285
286	286	NL_VERBOSE_OUT(("%s==>%s\n", name.cstr(), ret.cstr()));
r26736	r26737
289	289
290	290	netlist_core_terminal_t *netlist_setup_t::find_terminal(const pstring &terminal_in, bool required)
291	291	{
292		const pstring &tname = resolve_alias(terminal_in);
293		netlist_core_terminal_t *ret;
	292	const pstring &tname = resolve_alias(terminal_in);
	293	netlist_core_terminal_t *ret;
294	294
295		ret = m_terminals.find(tname);
296		/* look for default */
297		if (ret == NULL)
298		{
299		/* look for ".Q" std output */
300		pstring s = tname + ".Q";
301		ret = m_terminals.find(s);
302		}
303		if (ret == NULL && required)
304		netlist().xfatalerror("terminal %s(%s) not found!\n", terminal_in.cstr(), tname.cstr());
305		if (ret != NULL)
306		NL_VERBOSE_OUT(("Found input %s\n", tname.cstr()));
307		return ret;
	295	ret = m_terminals.find(tname);
	296	/* look for default */
	297	if (ret == NULL)
	298	{
	299	/* look for ".Q" std output */
	300	pstring s = tname + ".Q";
	301	ret = m_terminals.find(s);
	302	}
	303	if (ret == NULL && required)
	304	netlist().xfatalerror("terminal %s(%s) not found!\n", terminal_in.cstr(), tname.cstr());
	305	if (ret != NULL)
	306	NL_VERBOSE_OUT(("Found input %s\n", tname.cstr()));
	307	return ret;
308	308	}
309	309
310	310	netlist_core_terminal_t *netlist_setup_t::find_terminal(const pstring &terminal_in, netlist_object_t::type_t atype, bool required)
r26736	r26737
322	322	}
323	323	if (ret == NULL && required)
324	324	netlist().xfatalerror("terminal %s(%s) not found!\n", terminal_in.cstr(), tname.cstr());
325		if (ret != NULL && ret->type() != atype)
326		{
327		if (required)
328		netlist().xfatalerror("object %s(%s) found but wrong type\n", terminal_in.cstr(), tname.cstr());
329		else
330		ret = NULL;
331		}
332		if (ret != NULL)
333		NL_VERBOSE_OUT(("Found input %s\n", tname.cstr()));
	325	if (ret != NULL && ret->type() != atype)
	326	{
	327	if (required)
	328	netlist().xfatalerror("object %s(%s) found but wrong type\n", terminal_in.cstr(), tname.cstr());
	329	else
	330	ret = NULL;
	331	}
	332	if (ret != NULL)
	333	NL_VERBOSE_OUT(("Found input %s\n", tname.cstr()));
334	334	return ret;
335	335	}
336	336
r26736	r26737
341	341
342	342	ret = m_params.find(outname);
343	343	if (ret == NULL && required)
344		netlist().xfatalerror("parameter %s(%s) not found!\n", param_in.cstr(), outname.cstr());
	344	netlist().xfatalerror("parameter %s(%s) not found!\n", param_in.cstr(), outname.cstr());
345	345	if (ret != NULL)
346		NL_VERBOSE_OUT(("Found parameter %s\n", outname.cstr()));
	346	NL_VERBOSE_OUT(("Found parameter %s\n", outname.cstr()));
347	347	return ret;
348	348	}
349	349
350	350
351	351	void netlist_setup_t::connect_input_output(netlist_input_t &in, netlist_output_t &out)
352	352	{
353		if (out.isFamily(netlist_terminal_t::ANALOG) && in.isFamily(netlist_terminal_t::LOGIC))
354		{
355		nld_a_to_d_proxy *proxy = new nld_a_to_d_proxy(in);
356		pstring x = pstring::sprintf("proxy_ad_%d", m_proxy_cnt);
357		m_proxy_cnt++;
	353	if (out.isFamily(netlist_terminal_t::ANALOG) && in.isFamily(netlist_terminal_t::LOGIC))
	354	{
	355	nld_a_to_d_proxy *proxy = new nld_a_to_d_proxy(in);
	356	pstring x = pstring::sprintf("proxy_ad_%d", m_proxy_cnt);
	357	m_proxy_cnt++;
358	358
359		proxy->init(netlist(), x);
360		register_dev(proxy, x);
	359	proxy->init(netlist(), x);
	360	register_dev(proxy, x);
361	361
362		proxy->m_Q.net().register_con(in);
363		out.net().register_con(proxy->m_I);
	362	proxy->m_Q.net().register_con(in);
	363	out.net().register_con(proxy->m_I);
364	364
365		}
366		else if (out.isFamily(netlist_terminal_t::LOGIC) && in.isFamily(netlist_terminal_t::ANALOG))
367		{
368		nld_d_to_a_proxy *proxy = new nld_d_to_a_proxy(out);
369		pstring x = pstring::sprintf("proxy_da_%d", m_proxy_cnt);
370		m_proxy_cnt++;
	365	}
	366	else if (out.isFamily(netlist_terminal_t::LOGIC) && in.isFamily(netlist_terminal_t::ANALOG))
	367	{
	368	nld_d_to_a_proxy *proxy = new nld_d_to_a_proxy(out);
	369	pstring x = pstring::sprintf("proxy_da_%d", m_proxy_cnt);
	370	m_proxy_cnt++;
371	371
372		proxy->init(netlist(), x);
373		register_dev(proxy, x);
	372	proxy->init(netlist(), x);
	373	register_dev(proxy, x);
374	374
375		proxy->m_Q.net().register_con(in);
376		out.net().register_con(proxy->m_I);
377		}
378		else
379		{
380		out.net().register_con(in);
381		}
	375	proxy->m_Q.net().register_con(in);
	376	out.net().register_con(proxy->m_I);
	377	}
	378	else
	379	{
	380	out.net().register_con(in);
	381	}
382	382	}
383	383
384	384	void netlist_setup_t::connect_terminal_input(netlist_terminal_t &term, netlist_input_t &inp)
385	385	{
386		if (inp.isFamily(netlist_terminal_t::ANALOG))
387		{
388		connect_terminals(inp, term);
389		}
390		else if (inp.isFamily(netlist_terminal_t::LOGIC))
391		{
392		NL_VERBOSE_OUT(("connect_terminal_input: connecting proxy\n"));
393		nld_a_to_d_proxy *proxy = new nld_a_to_d_proxy(inp);
394		pstring x = pstring::sprintf("proxy_da_%d", m_proxy_cnt);
395		m_proxy_cnt++;
	386	if (inp.isFamily(netlist_terminal_t::ANALOG))
	387	{
	388	connect_terminals(inp, term);
	389	}
	390	else if (inp.isFamily(netlist_terminal_t::LOGIC))
	391	{
	392	NL_VERBOSE_OUT(("connect_terminal_input: connecting proxy\n"));
	393	nld_a_to_d_proxy *proxy = new nld_a_to_d_proxy(inp);
	394	pstring x = pstring::sprintf("proxy_da_%d", m_proxy_cnt);
	395	m_proxy_cnt++;
396	396
397		proxy->init(netlist(), x);
398		register_dev(proxy, x);
	397	proxy->init(netlist(), x);
	398	register_dev(proxy, x);
399	399
400		connect_terminals(term, proxy->m_I);
	400	connect_terminals(term, proxy->m_I);
401	401
402		if (inp.has_net())
403		//fatalerror("logic inputs can only belong to one net!\n");
404		proxy->m_Q.net().merge_net(&inp.net());
405		else
406		proxy->m_Q.net().register_con(inp);
407		}
408		else
409		{
410		netlist().xfatalerror("Netlist: Severe Error");
411		}
	402	if (inp.has_net())
	403	//fatalerror("logic inputs can only belong to one net!\n");
	404	proxy->m_Q.net().merge_net(&inp.net());
	405	else
	406	proxy->m_Q.net().register_con(inp);
	407	}
	408	else
	409	{
	410	netlist().xfatalerror("Netlist: Severe Error");
	411	}
412	412	}
413	413
414	414	// FIXME: optimize code ...
415	415	void netlist_setup_t::connect_terminal_output(netlist_terminal_t &in, netlist_output_t &out)
416	416	{
417		if (out.isFamily(netlist_terminal_t::ANALOG))
418		{
419		/* no proxy needed, just merge existing terminal net */
420		if (in.has_net())
421		out.net().merge_net(&in.net());
422		else
423		out.net().register_con(in);
	417	if (out.isFamily(netlist_terminal_t::ANALOG))
	418	{
	419	/* no proxy needed, just merge existing terminal net */
	420	if (in.has_net())
	421	out.net().merge_net(&in.net());
	422	else
	423	out.net().register_con(in);
424	424
425		}
426		else if (out.isFamily(netlist_terminal_t::LOGIC))
427		{
428		NL_VERBOSE_OUT(("connect_terminal_output: connecting proxy\n"));
429		nld_d_to_a_proxy *proxy = new nld_d_to_a_proxy(out);
430		pstring x = pstring::sprintf("proxy_da_%d", m_proxy_cnt);
431		m_proxy_cnt++;
	425	}
	426	else if (out.isFamily(netlist_terminal_t::LOGIC))
	427	{
	428	NL_VERBOSE_OUT(("connect_terminal_output: connecting proxy\n"));
	429	nld_d_to_a_proxy *proxy = new nld_d_to_a_proxy(out);
	430	pstring x = pstring::sprintf("proxy_da_%d", m_proxy_cnt);
	431	m_proxy_cnt++;
432	432
433		proxy->init(netlist(), x);
434		register_dev(proxy, x);
	433	proxy->init(netlist(), x);
	434	register_dev(proxy, x);
435	435
436		out.net().register_con(proxy->m_I);
	436	out.net().register_con(proxy->m_I);
437	437
438		if (in.has_net())
439		proxy->m_Q.net().merge_net(&in.net());
440		else
441		proxy->m_Q.net().register_con(in);
442		}
443		else
444		{
445		netlist().xfatalerror("Netlist: Severe Error");
446		}
	438	if (in.has_net())
	439	proxy->m_Q.net().merge_net(&in.net());
	440	else
	441	proxy->m_Q.net().register_con(in);
	442	}
	443	else
	444	{
	445	netlist().xfatalerror("Netlist: Severe Error");
	446	}
447	447	}
448	448
449	449	void netlist_setup_t::connect_terminals(netlist_core_terminal_t &t1, netlist_core_terminal_t &t2)
450	450	{
451		//assert(in.isType(netlist_terminal_t::TERMINAL));
452		//assert(out.isType(netlist_terminal_t::TERMINAL));
	451	//assert(in.isType(netlist_terminal_t::TERMINAL));
	452	//assert(out.isType(netlist_terminal_t::TERMINAL));
453	453
454		if (t1.has_net() && t2.has_net())
455		{
456		NL_VERBOSE_OUT(("T2 and T1 have net\n"));
457		t1.net().merge_net(&t2.net());
458		}
459		else if (t2.has_net())
460		{
461		NL_VERBOSE_OUT(("T2 has net\n"));
462		t2.net().register_con(t1);
463		}
464		else if (t1.has_net())
465		{
466		NL_VERBOSE_OUT(("T1 has net\n"));
467		t1.net().register_con(t2);
468		}
469		else
470		{
471		NL_VERBOSE_OUT(("adding net ...\n"));
472		netlist_net_t *anet = new netlist_net_t(netlist_object_t::NET, netlist_object_t::ANALOG);
473		t1.set_net(*anet);
474		//m_netlist.solver()->m_nets.add(anet);
475		// FIXME: Nets should have a unique name
476		t1.net().init_object(netlist(),"net." + t1.name() );
477		t1.net().register_con(t2);
478		t1.net().register_con(t1);
479		}
	454	if (t1.has_net() && t2.has_net())
	455	{
	456	NL_VERBOSE_OUT(("T2 and T1 have net\n"));
	457	t1.net().merge_net(&t2.net());
	458	}
	459	else if (t2.has_net())
	460	{
	461	NL_VERBOSE_OUT(("T2 has net\n"));
	462	t2.net().register_con(t1);
	463	}
	464	else if (t1.has_net())
	465	{
	466	NL_VERBOSE_OUT(("T1 has net\n"));
	467	t1.net().register_con(t2);
	468	}
	469	else
	470	{
	471	NL_VERBOSE_OUT(("adding net ...\n"));
	472	netlist_net_t *anet = new netlist_net_t(netlist_object_t::NET, netlist_object_t::ANALOG);
	473	t1.set_net(*anet);
	474	//m_netlist.solver()->m_nets.add(anet);
	475	// FIXME: Nets should have a unique name
	476	t1.net().init_object(netlist(),"net." + t1.name() );
	477	t1.net().register_con(t2);
	478	t1.net().register_con(t1);
	479	}
480	480	}
481	481
482	482	void netlist_setup_t::connect(netlist_core_terminal_t &t1, netlist_core_terminal_t &t2)
483	483	{
484		NL_VERBOSE_OUT(("Connecting %s to %s\n", t1.name().cstr(), t2.name().cstr()));
485		// FIXME: amend device design so that warnings can be turned into errors
486		// Only variable inputs have this issue
487		if (t1.isType(netlist_core_terminal_t::OUTPUT) && t2.isType(netlist_core_terminal_t::INPUT))
488		{
489		if (t2.has_net())
490		NL_VERBOSE_OUT(("Input %s already connected\n", t2.name().cstr()));
491		connect_input_output(dynamic_cast<netlist_input_t &>(t2), dynamic_cast<netlist_output_t &>(t1));
492		}
493		else if (t1.isType(netlist_core_terminal_t::INPUT) && t2.isType(netlist_core_terminal_t::OUTPUT))
494		{
495		if (t1.has_net())
496		NL_VERBOSE_OUT(("Input %s already connected\n", t1.name().cstr()));
497		connect_input_output(dynamic_cast<netlist_input_t &>(t1), dynamic_cast<netlist_output_t &>(t2));
498		}
499		else if (t1.isType(netlist_core_terminal_t::OUTPUT) && t2.isType(netlist_core_terminal_t::TERMINAL))
500		{
501		connect_terminal_output(dynamic_cast<netlist_terminal_t &>(t2), dynamic_cast<netlist_output_t &>(t1));
502		}
503		else if (t1.isType(netlist_core_terminal_t::TERMINAL) && t2.isType(netlist_core_terminal_t::OUTPUT))
504		{
505		connect_terminal_output(dynamic_cast<netlist_terminal_t &>(t1), dynamic_cast<netlist_output_t &>(t2));
506		}
507		else if (t1.isType(netlist_core_terminal_t::INPUT) && t2.isType(netlist_core_terminal_t::TERMINAL))
508		{
509		connect_terminal_input(dynamic_cast<netlist_terminal_t &>(t2), dynamic_cast<netlist_input_t &>(t1));
510		}
511		else if (t1.isType(netlist_core_terminal_t::TERMINAL) && t2.isType(netlist_core_terminal_t::INPUT))
512		{
513		connect_terminal_input(dynamic_cast<netlist_terminal_t &>(t1), dynamic_cast<netlist_input_t &>(t2));
514		}
515		else if (t1.isType(netlist_core_terminal_t::TERMINAL) && t2.isType(netlist_core_terminal_t::TERMINAL))
516		{
517		connect_terminals(dynamic_cast<netlist_terminal_t &>(t1), dynamic_cast<netlist_terminal_t &>(t2));
518		}
519		else
520		netlist().xfatalerror("Connecting %s to %s not supported!\n", t1.name().cstr(), t2.name().cstr());
	484	NL_VERBOSE_OUT(("Connecting %s to %s\n", t1.name().cstr(), t2.name().cstr()));
	485	// FIXME: amend device design so that warnings can be turned into errors
	486	// Only variable inputs have this issue
	487	if (t1.isType(netlist_core_terminal_t::OUTPUT) && t2.isType(netlist_core_terminal_t::INPUT))
	488	{
	489	if (t2.has_net())
	490	NL_VERBOSE_OUT(("Input %s already connected\n", t2.name().cstr()));
	491	connect_input_output(dynamic_cast<netlist_input_t &>(t2), dynamic_cast<netlist_output_t &>(t1));
	492	}
	493	else if (t1.isType(netlist_core_terminal_t::INPUT) && t2.isType(netlist_core_terminal_t::OUTPUT))
	494	{
	495	if (t1.has_net())
	496	NL_VERBOSE_OUT(("Input %s already connected\n", t1.name().cstr()));
	497	connect_input_output(dynamic_cast<netlist_input_t &>(t1), dynamic_cast<netlist_output_t &>(t2));
	498	}
	499	else if (t1.isType(netlist_core_terminal_t::OUTPUT) && t2.isType(netlist_core_terminal_t::TERMINAL))
	500	{
	501	connect_terminal_output(dynamic_cast<netlist_terminal_t &>(t2), dynamic_cast<netlist_output_t &>(t1));
	502	}
	503	else if (t1.isType(netlist_core_terminal_t::TERMINAL) && t2.isType(netlist_core_terminal_t::OUTPUT))
	504	{
	505	connect_terminal_output(dynamic_cast<netlist_terminal_t &>(t1), dynamic_cast<netlist_output_t &>(t2));
	506	}
	507	else if (t1.isType(netlist_core_terminal_t::INPUT) && t2.isType(netlist_core_terminal_t::TERMINAL))
	508	{
	509	connect_terminal_input(dynamic_cast<netlist_terminal_t &>(t2), dynamic_cast<netlist_input_t &>(t1));
	510	}
	511	else if (t1.isType(netlist_core_terminal_t::TERMINAL) && t2.isType(netlist_core_terminal_t::INPUT))
	512	{
	513	connect_terminal_input(dynamic_cast<netlist_terminal_t &>(t1), dynamic_cast<netlist_input_t &>(t2));
	514	}
	515	else if (t1.isType(netlist_core_terminal_t::TERMINAL) && t2.isType(netlist_core_terminal_t::TERMINAL))
	516	{
	517	connect_terminals(dynamic_cast<netlist_terminal_t &>(t1), dynamic_cast<netlist_terminal_t &>(t2));
	518	}
	519	else
	520	netlist().xfatalerror("Connecting %s to %s not supported!\n", t1.name().cstr(), t2.name().cstr());
521	521	}
522	522
523	523	void netlist_setup_t::resolve_inputs()
524	524	{
	525	NL_VERBOSE_OUT(("Resolving ...\n"));
	526	for (tagmap_link_t::entry_t *entry = m_links.first(); entry != NULL; entry = m_links.next(entry))
	527	{
	528	const pstring t1s = entry->object().e1;
	529	const pstring t2s = entry->object().e2;
	530	netlist_core_terminal_t *t1 = find_terminal(t1s);
	531	netlist_core_terminal_t *t2 = find_terminal(t2s);
525	532
526		NL_VERBOSE_OUT(("Resolving ...\n"));
527		for (tagmap_link_t::entry_t *entry = m_links.first(); entry != NULL; entry = m_links.next(entry))
528		{
529		const pstring t1s = entry->object().e1;
530		const pstring t2s = entry->object().e2;
531		netlist_core_terminal_t *t1 = find_terminal(t1s);
532		netlist_core_terminal_t *t2 = find_terminal(t2s);
	533	connect(t1, t2);
	534	}
533	535
534		connect(t1, t2);
535		}
	536	/* print all outputs */
	537	for (tagmap_terminal_t::entry_t *entry = m_terminals.first(); entry != NULL; entry = m_terminals.next(entry))
	538	{
	539	ATTR_UNUSED netlist_output_t out = dynamic_cast<netlist_output_t >(entry->object());
	540	//if (out != NULL)
	541	//VERBOSE_OUT(("%s %d\n", out->netdev()->name(), *out->Q_ptr()));
	542	}
536	543
537		/* print all outputs */
538		for (tagmap_terminal_t::entry_t *entry = m_terminals.first(); entry != NULL; entry = m_terminals.next(entry))
539		{
540		ATTR_UNUSED netlist_output_t out = dynamic_cast<netlist_output_t >(entry->object());
541		//if (out != NULL)
542		//VERBOSE_OUT(("%s %d\n", out->netdev()->name(), *out->Q_ptr()));
543		}
544
545	544	#if 0
546		NL_VERBOSE_OUT(("deleting empty nets ...\n"));
	545	NL_VERBOSE_OUT(("deleting empty nets ...\n"));
547	546
548		// delete empty nets ...
549		for (netlist_net_t::list_t::entry_t *pn = netlist().m_nets.first(); pn != NULL; pn = netlist().m_nets.next(pn))
550		{
551		if (pn->object()->m_head == NULL)
552		{
553		NL_VERBOSE_OUT(("Deleting net ...\n"));
554		netlist_net_t *to_delete = pn->object();
555		netlist().m_nets.remove(to_delete);
556		if (!to_delete->isRailNet())
557		delete to_delete;
558		pn--;
559		}
560		}
	547	// delete empty nets ...
	548	for (netlist_net_t::list_t::entry_t *pn = netlist().m_nets.first(); pn != NULL; pn = netlist().m_nets.next(pn))
	549	{
	550	if (pn->object()->m_head == NULL)
	551	{
	552	NL_VERBOSE_OUT(("Deleting net ...\n"));
	553	netlist_net_t *to_delete = pn->object();
	554	netlist().m_nets.remove(to_delete);
	555	if (!to_delete->isRailNet())
	556	delete to_delete;
	557	pn--;
	558	}
	559	}
561	560	#endif
562		if (m_netlist.solver() != NULL)
563		m_netlist.solver()->post_start();
	561	if (m_netlist.solver() != NULL)
	562	m_netlist.solver()->post_start();
564	563
565	564
566	565	}
567	566
568	567	void netlist_setup_t::start_devices()
569	568	{
	569	if (getenv("NL_LOGS"))
	570	{
	571	NL_VERBOSE_OUT(("Creating dynamic logs ...\n"));
	572	nl_util::pstring_list ll = nl_util::split(getenv("NL_LOGS"), ":");
	573	for (int i=0; i < ll.count(); i++)
	574	{
	575	NL_VERBOSE_OUT(("%d: <%s>\n",i, ll[i].cstr()));
	576	netlist_device_t nc = factory().new_device_by_classname("nld_log", this);
	577	pstring name = "log_" + ll[i];
	578	register_dev(nc, name);
	579	register_link(name + ".I", ll[i]);
	580	}
	581	}
570	582
571		if (getenv("NL_LOGS"))
572		{
573		NL_VERBOSE_OUT(("Creating dynamic logs ...\n"));
574		nl_util::pstring_list ll = nl_util::split(getenv("NL_LOGS"), ":");
575		for (int i=0; i < ll.count(); i++)
576		{
577		NL_VERBOSE_OUT(("%d: <%s>\n",i, ll[i].cstr()));
578		netlist_device_t nc = factory().new_device_by_classname("nld_log", this);
579		pstring name = "log_" + ll[i];
580		register_dev(nc, name);
581		register_link(name + ".I", ll[i]);
582		}
583		}
584	583
	584	NL_VERBOSE_OUT(("Searching for mainclock and solver ...\n"));
	585	/* find the main clock ... */
	586	for (tagmap_devices_t::entry_t *entry = netlist().m_devices.first(); entry != NULL; entry = netlist().m_devices.next(entry))
	587	{
	588	netlist_device_t *dev = entry->object();
	589	if (dynamic_cast<NETLIB_NAME(mainclock)*>(dev) != NULL)
	590	{
	591	m_netlist.set_mainclock_dev(dynamic_cast<NETLIB_NAME(mainclock)*>(dev));
	592	}
	593	if (dynamic_cast<NETLIB_NAME(solver)*>(dev) != NULL)
	594	{
	595	m_netlist.set_solver_dev(dynamic_cast<NETLIB_NAME(solver)*>(dev));
	596	}
	597	}
585	598
586		NL_VERBOSE_OUT(("Searching for mainclock and solver ...\n"));
587		/* find the main clock ... */
588		for (tagmap_devices_t::entry_t *entry = netlist().m_devices.first(); entry != NULL; entry = netlist().m_devices.next(entry))
589		{
590		netlist_device_t *dev = entry->object();
591		if (dynamic_cast<NETLIB_NAME(mainclock)*>(dev) != NULL)
592		{
593		m_netlist.set_mainclock_dev(dynamic_cast<NETLIB_NAME(mainclock)*>(dev));
594		}
595		if (dynamic_cast<NETLIB_NAME(solver)*>(dev) != NULL)
596		{
597		m_netlist.set_solver_dev(dynamic_cast<NETLIB_NAME(solver)*>(dev));
598		}
599		}
	599	NL_VERBOSE_OUT(("Initializing devices ...\n"));
	600	for (tagmap_devices_t::entry_t *entry = netlist().m_devices.first(); entry != NULL; entry = netlist().m_devices.next(entry))
	601	{
	602	netlist_device_t *dev = entry->object();
	603	dev->init(netlist(), entry->tag().cstr());
	604	}
600	605
601		NL_VERBOSE_OUT(("Initializing devices ...\n"));
602		for (tagmap_devices_t::entry_t *entry = netlist().m_devices.first(); entry != NULL; entry = netlist().m_devices.next(entry))
603		{
604		netlist_device_t *dev = entry->object();
605		dev->init(netlist(), entry->tag().cstr());
606		}
607
608	606	}
609	607
610	608	void netlist_setup_t::parse(const char *buf)

trunk/src/emu/netlist/nl_parser.h
r26736	r26737
12	12
13	13	class netlist_parser
14	14	{
15		NETLIST_PREVENT_COPYING(netlist_parser)
	15	NETLIST_PREVENT_COPYING(netlist_parser)
16	16	public:
17	17	netlist_parser(netlist_setup_t &setup)
18	18	: m_setup(setup) {}
r26736	r26737
20	20	void parse(const char *buf);
21	21	void net_alias();
22	22	void netdev_param();
23		void net_c();
	23	void net_c();
24	24	void netdev_const(const pstring &dev_name);
25	25	void netdev_device(const pstring &dev_type);
26		void netdev_device(const pstring &dev_type, const pstring &default_param, bool isString = false);
	26	void netdev_device(const pstring &dev_type, const pstring &default_param, bool isString = false);
27	27
28	28	private:
29	29

trunk/src/emu/netlist/pstring.h
r26736	r26737
15	15	// ----------------------------------------------------------------------------------------
16	16
17	17	struct pblockpool {
18		NETLIST_PREVENT_COPYING(pblockpool)
	18	NETLIST_PREVENT_COPYING(pblockpool)
19	19	public:
20		static const int MINDATASIZE = 8;
	20	static const int MINDATASIZE = 8;
21	21
22		pblockpool();
23		~pblockpool();
	22	pblockpool();
	23	~pblockpool();
24	24
25		void resetmem();
	25	void resetmem();
26	26
27		void *alloc(std::size_t n);
28		void dealloc(void *ptr);
	27	void *alloc(std::size_t n);
	28	void dealloc(void *ptr);
29	29
30		template<class T>
31		void destroy(T* object)
32		{
33		object->~T();
34		dealloc(object);
35		}
36		bool m_shutdown;
	30	template<class T>
	31	void destroy(T* object)
	32	{
	33	object->~T();
	34	dealloc(object);
	35	}
	36	bool m_shutdown;
37	37
38	38	private:
39		struct memblock
40		{
41		memblock *next;
42		int size;
43		int allocated;
44		int remaining;
45		char *cur;
46		char data[MINDATASIZE];
47		};
	39	struct memblock
	40	{
	41	memblock *next;
	42	int size;
	43	int allocated;
	44	int remaining;
	45	char *cur;
	46	char data[MINDATASIZE];
	47	};
48	48
49		memblock *m_first;
50		int m_blocksize;
51		int m_align;
	49	memblock *m_first;
	50	int m_blocksize;
	51	int m_align;
52	52	};
53	53
54	54	/* objects must be destroyed using destroy above */
55	55
56	56	inline void *operator new(std::size_t size, pblockpool &pool, int extra = 0) throw (std::bad_alloc)
57	57	{
58		void *result = pool.alloc(size + extra);
59		//std::printf("allocating %ld + %d\n", size, extra);
60		if (result == NULL)
61		throw std::bad_alloc();
62		return result;
	58	void *result = pool.alloc(size + extra);
	59	//std::printf("allocating %ld + %d\n", size, extra);
	60	if (result == NULL)
	61	throw std::bad_alloc();
	62	return result;
63	63	}
64	64
65	65	inline void operator delete(void *pMem, pblockpool &pool, int extra)
66	66	{
67		pool.dealloc(pMem);
	67	pool.dealloc(pMem);
68	68	}
69	69
70	70	// ----------------------------------------------------------------------------------------
r26736	r26737
77	77	struct pstring
78	78	{
79	79	public:
80		// simple construction/destruction
81		pstring()
82		{
83		init();
84		}
85		~pstring();
	80	// simple construction/destruction
	81	pstring()
	82	{
	83	init();
	84	}
	85	~pstring();
86	86
87		// construction with copy
88		pstring(const char string) {init(); if (string != NULL && string != 0) pcopy(string); }
89		pstring(const pstring &string) {init(); pcopy(string); }
	87	// construction with copy
	88	pstring(const char string) {init(); if (string != NULL && string != 0) pcopy(string); }
	89	pstring(const pstring &string) {init(); pcopy(string); }
90	90
91		// assignment operators
92		pstring &operator=(const char string) { pcopy(string); return this; }
93		pstring &operator=(const pstring &string) { pcopy(string); return *this; }
	91	// assignment operators
	92	pstring &operator=(const char string) { pcopy(string); return this; }
	93	pstring &operator=(const pstring &string) { pcopy(string); return *this; }
94	94
95		// C string conversion operators and helpers
96		operator const char *() const { return m_ptr->str(); }
97		inline const char *cstr() const { return m_ptr->str(); }
	95	// C string conversion operators and helpers
	96	operator const char *() const { return m_ptr->str(); }
	97	inline const char *cstr() const { return m_ptr->str(); }
98	98
99		// concatenation operators
100		pstring& operator+=(const pstring &string) { pcat(string.cstr()); return *this; }
101		friend pstring operator+(const pstring &lhs, const pstring &rhs) { return pstring(lhs) += rhs; }
102		friend pstring operator+(const pstring &lhs, const char *rhs) { return pstring(lhs) += rhs; }
103		friend pstring operator+(const char *lhs, const pstring &rhs) { return pstring(lhs) += rhs; }
	99	// concatenation operators
	100	pstring& operator+=(const pstring &string) { pcat(string.cstr()); return *this; }
	101	friend pstring operator+(const pstring &lhs, const pstring &rhs) { return pstring(lhs) += rhs; }
	102	friend pstring operator+(const pstring &lhs, const char *rhs) { return pstring(lhs) += rhs; }
	103	friend pstring operator+(const char *lhs, const pstring &rhs) { return pstring(lhs) += rhs; }
104	104
105		// comparison operators
106		bool operator==(const char *string) const { return (pcmp(string) == 0); }
107		bool operator==(const pstring &string) const { return (pcmp(string.cstr()) == 0); }
108		bool operator!=(const char *string) const { return (pcmp(string) != 0); }
109		bool operator!=(const pstring &string) const { return (pcmp(string.cstr()) != 0); }
110		bool operator<(const char *string) const { return (pcmp(string) < 0); }
111		bool operator<(const pstring &string) const { return (pcmp(string.cstr()) < 0); }
112		bool operator<=(const char *string) const { return (pcmp(string) <= 0); }
113		bool operator<=(const pstring &string) const { return (pcmp(string.cstr()) <= 0); }
114		bool operator>(const char *string) const { return (pcmp(string) > 0); }
115		bool operator>(const pstring &string) const { return (pcmp(string.cstr()) > 0); }
116		bool operator>=(const char *string) const { return (pcmp(string) >= 0); }
117		bool operator>=(const pstring &string) const { return (pcmp(string.cstr()) >= 0); }
	105	// comparison operators
	106	bool operator==(const char *string) const { return (pcmp(string) == 0); }
	107	bool operator==(const pstring &string) const { return (pcmp(string.cstr()) == 0); }
	108	bool operator!=(const char *string) const { return (pcmp(string) != 0); }
	109	bool operator!=(const pstring &string) const { return (pcmp(string.cstr()) != 0); }
	110	bool operator<(const char *string) const { return (pcmp(string) < 0); }
	111	bool operator<(const pstring &string) const { return (pcmp(string.cstr()) < 0); }
	112	bool operator<=(const char *string) const { return (pcmp(string) <= 0); }
	113	bool operator<=(const pstring &string) const { return (pcmp(string.cstr()) <= 0); }
	114	bool operator>(const char *string) const { return (pcmp(string) > 0); }
	115	bool operator>(const pstring &string) const { return (pcmp(string.cstr()) > 0); }
	116	bool operator>=(const char *string) const { return (pcmp(string) >= 0); }
	117	bool operator>=(const pstring &string) const { return (pcmp(string.cstr()) >= 0); }
118	118
119		//
120		inline int len() const { return m_ptr->len(); }
	119	//
	120	inline int len() const { return m_ptr->len(); }
121	121
122		inline bool equals(const pstring &string) { return (pcmp(string.cstr(), m_ptr->str()) == 0); }
123		inline bool iequals(const pstring &string) { return (pcmpi(string.cstr(), m_ptr->str()) == 0); }
	122	inline bool equals(const pstring &string) { return (pcmp(string.cstr(), m_ptr->str()) == 0); }
	123	inline bool iequals(const pstring &string) { return (pcmpi(string.cstr(), m_ptr->str()) == 0); }
124	124
125		inline int cmp(const pstring &string) const { return pcmp(string.cstr()); }
126		inline int cmpi(const pstring &string) const { return pcmpi(cstr(), string.cstr()); }
	125	inline int cmp(const pstring &string) const { return pcmp(string.cstr()); }
	126	inline int cmpi(const pstring &string) const { return pcmpi(cstr(), string.cstr()); }
127	127
128		inline int find(const char *search, int start = 0) const
129		{
130		int alen = len();
131		const char *result = strstr(cstr() + MIN(start, alen), search);
132		return (result != NULL) ? (result - cstr()) : -1;
133		}
	128	inline int find(const char *search, int start = 0) const
	129	{
	130	int alen = len();
	131	const char *result = strstr(cstr() + MIN(start, alen), search);
	132	return (result != NULL) ? (result - cstr()) : -1;
	133	}
134	134
135		// various
	135	// various
136	136
137		inline bool startsWith(const pstring &arg) const { return (pcmp(cstr(), arg.cstr(), arg.len()) == 0); }
138		inline bool startsWith(const char *arg) const { return (pcmp(cstr(), arg, strlen(arg)) == 0); }
	137	inline bool startsWith(const pstring &arg) const { return (pcmp(cstr(), arg.cstr(), arg.len()) == 0); }
	138	inline bool startsWith(const char *arg) const { return (pcmp(cstr(), arg, strlen(arg)) == 0); }
139	139
140		// these return nstring ...
141		inline pstring cat(const pstring &s) const { return *this + s; }
142		inline pstring cat(const char s) const { return this + s; }
	140	// these return nstring ...
	141	inline pstring cat(const pstring &s) const { return *this + s; }
	142	inline pstring cat(const char s) const { return this + s; }
143	143
144		pstring substr(unsigned int start, int count = -1) const ;
	144	pstring substr(unsigned int start, int count = -1) const ;
145	145
146		inline pstring left(unsigned int count) const { return substr(0, count); }
147		inline pstring right(unsigned int count) const { return substr(len() - count, count); }
	146	inline pstring left(unsigned int count) const { return substr(0, count); }
	147	inline pstring right(unsigned int count) const { return substr(len() - count, count); }
148	148
149		pstring ucase() const;
	149	pstring ucase() const;
150	150
151		// conversions
	151	// conversions
152	152
153		double as_double(bool *error = NULL) const;
	153	double as_double(bool *error = NULL) const;
154	154
155		long as_long(bool *error = NULL) const;
	155	long as_long(bool *error = NULL) const;
156	156
157		// printf using string as format ...
	157	// printf using string as format ...
158	158
159		pstring vprintf(va_list args) const;
	159	pstring vprintf(va_list args) const;
160	160
161		// static
162		static pstring sprintf(const char *format, ...);
163		static void resetmem();
	161	// static
	162	static pstring sprintf(const char *format, ...);
	163	static void resetmem();
164	164
165	165	protected:
166	166
167		struct str_t
168		{
169		str_t(int alen) : m_ref_count(1), m_len(alen) { m_str[0] = 0; }
	167	struct str_t
	168	{
	169	str_t(int alen) : m_ref_count(1), m_len(alen) { m_str[0] = 0; }
170	170
171		char *str() { return &m_str[0]; }
172		int len() { return m_len; }
173		//private:
174		int m_ref_count;
175		int m_len;
176		char m_str[1];
177		};
	171	char *str() { return &m_str[0]; }
	172	int len() { return m_len; }
	173	//private:
	174	int m_ref_count;
	175	int m_len;
	176	char m_str[1];
	177	};
178	178
179		str_t *m_ptr;
	179	str_t *m_ptr;
180	180
181		static pblockpool m_pool;
	181	static pblockpool m_pool;
182	182
183	183	private:
184		inline void init()
185		{
186		if (m_zero == NULL)
187		{
188		m_zero = new(pstring::m_pool, 0) pstring::str_t(0);
189		}
190		m_ptr = m_zero;
191		m_ptr->m_ref_count++;
192		}
	184	inline void init()
	185	{
	186	if (m_zero == NULL)
	187	{
	188	m_zero = new(pstring::m_pool, 0) pstring::str_t(0);
	189	}
	190	m_ptr = m_zero;
	191	m_ptr->m_ref_count++;
	192	}
193	193
194		inline int pcmp(const char *right) const
195		{
196		return pcmp(m_ptr->str(), right);
197		}
	194	inline int pcmp(const char *right) const
	195	{
	196	return pcmp(m_ptr->str(), right);
	197	}
198	198
199		inline int pcmp(const char left, const char right, int count = -1) const
200		{
201		if (count < 0)
202		return strcmp(left, right);
203		else
204		return strncmp(left, right, count);
205		}
	199	inline int pcmp(const char left, const char right, int count = -1) const
	200	{
	201	if (count < 0)
	202	return strcmp(left, right);
	203	else
	204	return strncmp(left, right, count);
	205	}
206	206
207		int pcmpi(const char lhs, const char rhs, int count = -1) const;
	207	int pcmpi(const char lhs, const char rhs, int count = -1) const;
208	208
209		void pcopy(const char *from, int size);
	209	void pcopy(const char *from, int size);
210	210
211		inline void pcopy(const char *from)
212		{
213		pcopy(from, strlen(from));
214		}
	211	inline void pcopy(const char *from)
	212	{
	213	pcopy(from, strlen(from));
	214	}
215	215
216		inline void pcopy(const pstring &from)
217		{
218		sfree(m_ptr);
219		m_ptr = from.m_ptr;
220		m_ptr->m_ref_count++;
221		}
	216	inline void pcopy(const pstring &from)
	217	{
	218	sfree(m_ptr);
	219	m_ptr = from.m_ptr;
	220	m_ptr->m_ref_count++;
	221	}
222	222
223		void pcat(const char *s);
	223	void pcat(const char *s);
224	224
225		static str_t *salloc(int n);
226		static void sfree(str_t *s);
	225	static str_t *salloc(int n);
	226	static void sfree(str_t *s);
227	227
228		static str_t *m_zero;
	228	static str_t *m_zero;
229	229	};
230	230
231	231
232	232
233	233	#endif /* _PSTRING_H_ */
234

trunk/src/emu/netlist/nl_time.h
r26736	r26737
26	26	{
27	27	public:
28	28
29		typedef UINT64 INTERNALTYPE;
	29	typedef UINT64 INTERNALTYPE;
30	30
31		static const INTERNALTYPE RESOLUTION = NETLIST_INTERNAL_RES;
	31	static const INTERNALTYPE RESOLUTION = NETLIST_INTERNAL_RES;
32	32
33		ATTR_HOT inline netlist_time() : m_time(0) {}
	33	ATTR_HOT inline netlist_time() : m_time(0) {}
34	34
35		ATTR_HOT friend inline const netlist_time operator-(const netlist_time &left, const netlist_time &right);
36		ATTR_HOT friend inline const netlist_time operator+(const netlist_time &left, const netlist_time &right);
37		ATTR_HOT friend inline const netlist_time operator*(const netlist_time &left, const UINT32 factor);
38		ATTR_HOT friend inline const UINT32 operator/(const netlist_time &left, const netlist_time &right);
39		ATTR_HOT friend inline bool operator>(const netlist_time &left, const netlist_time &right);
40		ATTR_HOT friend inline bool operator<(const netlist_time &left, const netlist_time &right);
41		ATTR_HOT friend inline bool operator>=(const netlist_time &left, const netlist_time &right);
42		ATTR_HOT friend inline bool operator<=(const netlist_time &left, const netlist_time &right);
	35	ATTR_HOT friend inline const netlist_time operator-(const netlist_time &left, const netlist_time &right);
	36	ATTR_HOT friend inline const netlist_time operator+(const netlist_time &left, const netlist_time &right);
	37	ATTR_HOT friend inline const netlist_time operator*(const netlist_time &left, const UINT32 factor);
	38	ATTR_HOT friend inline const UINT32 operator/(const netlist_time &left, const netlist_time &right);
	39	ATTR_HOT friend inline bool operator>(const netlist_time &left, const netlist_time &right);
	40	ATTR_HOT friend inline bool operator<(const netlist_time &left, const netlist_time &right);
	41	ATTR_HOT friend inline bool operator>=(const netlist_time &left, const netlist_time &right);
	42	ATTR_HOT friend inline bool operator<=(const netlist_time &left, const netlist_time &right);
43	43
44		ATTR_HOT inline const netlist_time &operator=(const netlist_time &right) { m_time = right.m_time; return *this; }
45		ATTR_HOT inline const netlist_time &operator=(const double &right) { m_time = (INTERNALTYPE) ( right * (double) RESOLUTION); return *this; }
46		ATTR_HOT inline operator double() const { return as_double(); }
	44	ATTR_HOT inline const netlist_time &operator=(const netlist_time &right) { m_time = right.m_time; return *this; }
	45	ATTR_HOT inline const netlist_time &operator=(const double &right) { m_time = (INTERNALTYPE) ( right * (double) RESOLUTION); return *this; }
	46	ATTR_HOT inline operator double() const { return as_double(); }
47	47
48		ATTR_HOT inline const netlist_time &operator+=(const netlist_time &right) { m_time += right.m_time; return *this; }
	48	ATTR_HOT inline const netlist_time &operator+=(const netlist_time &right) { m_time += right.m_time; return *this; }
49	49
50		ATTR_HOT inline const INTERNALTYPE as_raw() const { return m_time; }
51		ATTR_HOT inline const double as_double() const { return (double) m_time / (double) RESOLUTION; }
	50	ATTR_HOT inline const INTERNALTYPE as_raw() const { return m_time; }
	51	ATTR_HOT inline const double as_double() const { return (double) m_time / (double) RESOLUTION; }
52	52
53		// for save states ....
54		ATTR_HOT inline INTERNALTYPE *get_internaltype_ptr() { return &m_time; }
	53	// for save states ....
	54	ATTR_HOT inline INTERNALTYPE *get_internaltype_ptr() { return &m_time; }
55	55
56		ATTR_HOT static inline const netlist_time from_nsec(const int ns) { return netlist_time((UINT64) ns * (RESOLUTION / U64(1000000000))); }
57		ATTR_HOT static inline const netlist_time from_usec(const int us) { return netlist_time((UINT64) us * (RESOLUTION / U64(1000000))); }
58		ATTR_HOT static inline const netlist_time from_msec(const int ms) { return netlist_time((UINT64) ms * (RESOLUTION / U64(1000))); }
59		ATTR_HOT static inline const netlist_time from_hz(const UINT64 hz) { return netlist_time(RESOLUTION / hz); }
60		ATTR_HOT static inline const netlist_time from_double(const double t) { return netlist_time((INTERNALTYPE) ( t * (double) RESOLUTION)); }
61		ATTR_HOT static inline const netlist_time from_raw(const INTERNALTYPE raw) { return netlist_time(raw); }
	56	ATTR_HOT static inline const netlist_time from_nsec(const int ns) { return netlist_time((UINT64) ns * (RESOLUTION / U64(1000000000))); }
	57	ATTR_HOT static inline const netlist_time from_usec(const int us) { return netlist_time((UINT64) us * (RESOLUTION / U64(1000000))); }
	58	ATTR_HOT static inline const netlist_time from_msec(const int ms) { return netlist_time((UINT64) ms * (RESOLUTION / U64(1000))); }
	59	ATTR_HOT static inline const netlist_time from_hz(const UINT64 hz) { return netlist_time(RESOLUTION / hz); }
	60	ATTR_HOT static inline const netlist_time from_double(const double t) { return netlist_time((INTERNALTYPE) ( t * (double) RESOLUTION)); }
	61	ATTR_HOT static inline const netlist_time from_raw(const INTERNALTYPE raw) { return netlist_time(raw); }
62	62
63		static const netlist_time zero;
	63	static const netlist_time zero;
64	64
65	65	protected:
66	66
67		ATTR_HOT inline netlist_time(const INTERNALTYPE val) : m_time(val) {}
	67	ATTR_HOT inline netlist_time(const INTERNALTYPE val) : m_time(val) {}
68	68
69		INTERNALTYPE m_time;
	69	INTERNALTYPE m_time;
70	70	};
71	71
72	72	ATTR_HOT inline const netlist_time operator-(const netlist_time &left, const netlist_time &right)
73	73	{
74		return netlist_time::from_raw(left.m_time - right.m_time);
	74	return netlist_time::from_raw(left.m_time - right.m_time);
75	75	}
76	76
77	77	ATTR_HOT inline const netlist_time operator*(const netlist_time &left, const UINT32 factor)
78	78	{
79		return netlist_time::from_raw(left.m_time * factor);
	79	return netlist_time::from_raw(left.m_time * factor);
80	80	}
81	81
82	82	ATTR_HOT inline const UINT32 operator/(const netlist_time &left, const netlist_time &right)
83	83	{
84		return left.m_time / right.m_time;
	84	return left.m_time / right.m_time;
85	85	}
86	86
87	87	ATTR_HOT inline const netlist_time operator+(const netlist_time &left, const netlist_time &right)
88	88	{
89		return netlist_time::from_raw(left.m_time + right.m_time);
	89	return netlist_time::from_raw(left.m_time + right.m_time);
90	90	}
91	91
92	92	ATTR_HOT inline bool operator<(const netlist_time &left, const netlist_time &right)
93	93	{
94		return (left.m_time < right.m_time);
	94	return (left.m_time < right.m_time);
95	95	}
96	96
97	97	ATTR_HOT inline bool operator>(const netlist_time &left, const netlist_time &right)
98	98	{
99		return (left.m_time > right.m_time);
	99	return (left.m_time > right.m_time);
100	100	}
101	101
102	102	ATTR_HOT inline bool operator<=(const netlist_time &left, const netlist_time &right)
103	103	{
104		return (left.m_time <= right.m_time);
	104	return (left.m_time <= right.m_time);
105	105	}
106	106
107	107	ATTR_HOT inline bool operator>=(const netlist_time &left, const netlist_time &right)
108	108	{
109		return (left.m_time >= right.m_time);
	109	return (left.m_time >= right.m_time);
110	110	}
111	111
112	112

trunk/src/emu/netlist/nl_lists.h
r26736	r26737
20	20	{
21	21	public:
22	22
23		struct entry_t {
	23	struct entry_t {
	24	// keep compatibility with tagmap
	25	_ListClass object() { return m_obj; }
24	26
25		// keep compatibility with tagmap
26		_ListClass object() { return m_obj; }
	27	_ListClass m_obj;
	28	};
27	29
28		_ListClass m_obj;
29		};
30
31	30	ATTR_COLD netlist_list_t(int numElements = _NumElem)
32	31	{
33	32	m_num_elements = numElements;
r26736	r26737
36	35	m_ptr--;
37	36	}
38	37
39		ATTR_COLD netlist_list_t(const netlist_list_t &rhs)
40		{
41		m_list = new entry_t[m_num_elements];
42		m_ptr = m_list;
43		m_ptr--;
44		for (int i=0; i<rhs.count(); i++)
45		{
46		this->add(rhs[i]);
47		}
48		}
	38	ATTR_COLD netlist_list_t(const netlist_list_t &rhs)
	39	{
	40	m_list = new entry_t[m_num_elements];
	41	m_ptr = m_list;
	42	m_ptr--;
	43	for (int i=0; i<rhs.count(); i++)
	44	{
	45	this->add(rhs[i]);
	46	}
	47	}
49	48
50		ATTR_COLD netlist_list_t &operator=(const netlist_list_t &rhs)
51		{
52		for (int i=0; i<rhs.count(); i++)
53		{
54		this->add(rhs[i]);
55		}
56		return *this;
57		}
	49	ATTR_COLD netlist_list_t &operator=(const netlist_list_t &rhs)
	50	{
	51	for (int i=0; i<rhs.count(); i++)
	52	{
	53	this->add(rhs[i]);
	54	}
	55	return *this;
	56	}
58	57
59	58
60	59	ATTR_COLD ~netlist_list_t()
r26736	r26737
64	63	ATTR_HOT inline void add(const _ListClass elem)
65	64	{
66	65	if (m_ptr-m_list >= m_num_elements - 1)
67		resize(m_num_elements * 2);
	66	resize(m_num_elements * 2);
68	67
69	68	(++m_ptr)->m_obj = elem;
70	69	}
71	70	ATTR_HOT inline void resize(const int new_size)
72	71	{
73		int cnt = count();
74		entry_t *m_new = new entry_t[new_size];
75		entry_t *pd = m_new;
	72	int cnt = count();
	73	entry_t *m_new = new entry_t[new_size];
	74	entry_t *pd = m_new;
76	75
77		for (entry_t *ps = m_list; ps <= m_ptr; ps++, pd++)
78		pd = ps;
79		delete[] m_list;
80		m_list = m_new;
81		m_ptr = m_list + cnt - 1;
82		m_num_elements = new_size;
	76	for (entry_t *ps = m_list; ps <= m_ptr; ps++, pd++)
	77	pd = ps;
	78	delete[] m_list;
	79	m_list = m_new;
	80	m_ptr = m_list + cnt - 1;
	81	m_num_elements = new_size;
83	82	}
84		ATTR_HOT inline void remove(const _ListClass elem)
85		{
86		for (entry_t *i = m_list; i <= m_ptr; i++)
87		{
88		if (i->object() == elem)
89		{
90		while (i < m_ptr)
91		{
92		i = (i+1);
93		i++;
94		}
95		m_ptr--;
96		return;
97		}
98		}
99		}
100		ATTR_HOT inline bool contains(const _ListClass elem) const
101		{
102		for (entry_t *i = m_list; i <= m_ptr; i++)
103		{
104		if (i->object() == elem)
105		return true;
106		}
107		return false;
108		}
	83	ATTR_HOT inline void remove(const _ListClass elem)
	84	{
	85	for (entry_t *i = m_list; i <= m_ptr; i++)
	86	{
	87	if (i->object() == elem)
	88	{
	89	while (i < m_ptr)
	90	{
	91	i = (i+1);
	92	i++;
	93	}
	94	m_ptr--;
	95	return;
	96	}
	97	}
	98	}
	99	ATTR_HOT inline bool contains(const _ListClass elem) const
	100	{
	101	for (entry_t *i = m_list; i <= m_ptr; i++)
	102	{
	103	if (i->object() == elem)
	104	return true;
	105	}
	106	return false;
	107	}
109	108	ATTR_HOT inline entry_t *first() const { return (m_ptr >= m_list ? &m_list[0] : NULL ); }
110		ATTR_HOT inline entry_t next(entry_t lc) const { return (lc < last() ? lc + 1 : NULL ); }
	109	ATTR_HOT inline entry_t next(entry_t lc) const { return (lc < last() ? lc + 1 : NULL ); }
111	110	ATTR_HOT inline entry_t *last() const { return m_ptr; }
112	111	ATTR_HOT inline int count() const { return m_ptr - m_list + 1; }
113	112	ATTR_HOT inline bool empty() const { return (m_ptr < m_list); }
r26736	r26737
115	114
116	115	ATTR_COLD void reset_and_free()
117	116	{
118		for (entry_t *i = m_list; i <= m_ptr; i++)
119		{
120		delete i->object();
121		}
122		reset();
	117	for (entry_t *i = m_list; i <= m_ptr; i++)
	118	{
	119	delete i->object();
	120	}
	121	reset();
123	122	}
124	123
125		//ATTR_HOT inline entry_t *item(int i) const { return &m_list[i]; }
	124	//ATTR_HOT inline entry_t *item(int i) const { return &m_list[i]; }
126	125	ATTR_HOT inline _ListClass& operator[](const int & index) { return m_list[index].m_obj; }
127		ATTR_HOT inline const _ListClass& operator[](const int & index) const { return m_list[index].m_obj; }
	126	ATTR_HOT inline const _ListClass& operator[](const int & index) const { return m_list[index].m_obj; }
128	127
129	128	private:
130	129	entry_t * m_ptr;
r26736	r26737
140	139	template <class _Element, class _Time, int _Size>
141	140	class netlist_timed_queue
142	141	{
143		NETLIST_PREVENT_COPYING(netlist_timed_queue)
	142	NETLIST_PREVENT_COPYING(netlist_timed_queue)
144	143	public:
145	144
146	145	struct entry_t
r26736	r26737
153	152	ATTR_HOT inline _Element & object() const { return *m_object; }
154	153
155	154	ATTR_HOT inline const _Time *time_ptr() const { return &m_time; }
156		ATTR_HOT inline _Element *object_ptr() const { return m_object; }
	155	ATTR_HOT inline _Element *object_ptr() const { return m_object; }
157	156	private:
158	157	_Time m_time;
159	158	_Element *m_object;
r26736	r26737
165	164	clear();
166	165	}
167	166
168		ATTR_HOT inline int capacity() const { return _Size; }
	167	ATTR_HOT inline int capacity() const { return _Size; }
169	168	ATTR_HOT inline bool is_empty() const { return (m_end == &m_list[0]); }
170	169	ATTR_HOT inline bool is_not_empty() const { return (m_end > &m_list[0]); }
171	170

trunk/src/emu/netlist/nl_setup.h
r26736	r26737
19	19	#define NET_STR(_x) # _x
20	20
21	21	#define NET_MODEL(_model) \
22		netlist.register_model(_model);
	22	netlist.register_model(_model);
23	23
24	24	#define NET_ALIAS(_alias, _name) \
25	25	netlist.register_alias(# _alias, # _name);
r26736	r26737
39	39	netlist.register_link(# _name "." # _input, # _output);
40	40
41	41	#define NET_C(_input, _output) \
42		netlist.register_link(NET_STR(_input) , NET_STR(_output));
	42	netlist.register_link(NET_STR(_input) , NET_STR(_output));
43	43
44	44	#define NETDEV_PARAM(_name, _val) \
45	45	netlist.register_param(# _name, _val);
46	46
47	47	#define NETDEV_PARAMI(_name, _param, _val) \
48		netlist.register_param(# _name "." # _param, _val);
	48	netlist.register_param(# _name "." # _param, _val);
49	49
50	50	#define NETLIST_NAME(_name) netlist ## _ ## _name
51	51
r26736	r26737
69	69
70	70	class netlist_setup_t
71	71	{
72		NETLIST_PREVENT_COPYING(netlist_setup_t)
	72	NETLIST_PREVENT_COPYING(netlist_setup_t)
73	73	public:
74	74
75		struct link_t
76		{
77		link_t() { }
78		// Copy constructor
79		link_t(const link_t &from)
80		{
81		e1 = from.e1;
82		e2 = from.e2;
83		}
	75	struct link_t
	76	{
	77	link_t() { }
	78	// Copy constructor
	79	link_t(const link_t &from)
	80	{
	81	e1 = from.e1;
	82	e2 = from.e2;
	83	}
84	84
85		link_t(const pstring &ae1, const pstring &ae2)
86		{
87		e1 = ae1;
88		e2 = ae2;
89		}
90		pstring e1;
91		pstring e2;
	85	link_t(const pstring &ae1, const pstring &ae2)
	86	{
	87	e1 = ae1;
	88	e2 = ae2;
	89	}
	90	pstring e1;
	91	pstring e2;
92	92
93		bool operator==(const link_t &rhs) const { return (e1 == rhs.e1) && (e2 == rhs.e2); }
94		link_t &operator=(const link_t &rhs) { e1 = rhs.e1; e2 = rhs.e2; return *this; }
95		};
	93	bool operator==(const link_t &rhs) const { return (e1 == rhs.e1) && (e2 == rhs.e2); }
	94	link_t &operator=(const link_t &rhs) { e1 = rhs.e1; e2 = rhs.e2; return *this; }
	95	};
96	96
97	97	typedef tagmap_t<pstring, 393> tagmap_nstring_t;
98	98	typedef tagmap_t<netlist_param_t *, 393> tagmap_param_t;
r26736	r26737
105	105	void init();
106	106
107	107	netlist_base_t &netlist() { return m_netlist; }
108		const netlist_base_t &netlist() const { return m_netlist; }
	108	const netlist_base_t &netlist() const { return m_netlist; }
109	109	netlist_factory &factory() { return m_factory; }
110	110
111	111	netlist_device_t register_dev(netlist_device_t dev, const pstring &name);
112	112	void remove_dev(const pstring &name);
113	113
114		void register_model(const pstring &model);
115		void register_alias(const pstring &alias, const pstring &out);
116		void register_link(const pstring &sin, const pstring &sout);
117		void register_param(const pstring &param, const pstring &value);
118		void register_param(const pstring &param, const double value);
	114	void register_model(const pstring &model);
	115	void register_alias(const pstring &alias, const pstring &out);
	116	void register_link(const pstring &sin, const pstring &sout);
	117	void register_param(const pstring &param, const pstring &value);
	118	void register_param(const pstring &param, const double value);
119	119
120		void register_object(netlist_device_t &dev, netlist_core_device_t &upd_dev, const pstring &name, netlist_object_t &obj, netlist_input_t::state_e state);
121		void connect(netlist_core_terminal_t &t1, netlist_core_terminal_t &t2);
	120	void register_object(netlist_device_t &dev, netlist_core_device_t &upd_dev, const pstring &name, netlist_object_t &obj, netlist_input_t::state_e state);
	121	void connect(netlist_core_terminal_t &t1, netlist_core_terminal_t &t2);
122	122
123		netlist_core_terminal_t *find_terminal(const pstring &outname_in, bool required = true);
124		netlist_core_terminal_t *find_terminal(const pstring &outname_in, netlist_object_t::type_t atype, bool required = true);
	123	netlist_core_terminal_t *find_terminal(const pstring &outname_in, bool required = true);
	124	netlist_core_terminal_t *find_terminal(const pstring &outname_in, netlist_object_t::type_t atype, bool required = true);
125	125
126		netlist_param_t *find_param(const pstring &param_in, bool required = true);
	126	netlist_param_t *find_param(const pstring &param_in, bool required = true);
127	127
128		void parse(const char *buf);
	128	void parse(const char *buf);
129	129
130		void start_devices();
	130	void start_devices();
131	131	void resolve_inputs();
132	132
133	133	/* not ideal, but needed for save_state */
r26736	r26737
144	144	tagmap_nstring_t m_alias;
145	145	tagmap_param_t m_params;
146	146	tagmap_link_t m_links;
147		tagmap_nstring_t m_params_temp;
	147	tagmap_nstring_t m_params_temp;
148	148
149		netlist_factory m_factory;
	149	netlist_factory m_factory;
150	150
151		netlist_list_t<pstring> m_models;
	151	netlist_list_t<pstring> m_models;
152	152
153	153	int m_proxy_cnt;
154	154
155	155	void connect_terminals(netlist_core_terminal_t &in, netlist_core_terminal_t &out);
156	156	void connect_input_output(netlist_input_t &in, netlist_output_t &out);
157		void connect_terminal_output(netlist_terminal_t &in, netlist_output_t &out);
158		void connect_terminal_input(netlist_terminal_t &term, netlist_input_t &inp);
	157	void connect_terminal_output(netlist_terminal_t &in, netlist_output_t &out);
	158	void connect_terminal_input(netlist_terminal_t &term, netlist_input_t &inp);
159	159
160		// helpers
161		pstring objtype_as_astr(netlist_object_t &in);
	160	// helpers
	161	pstring objtype_as_astr(netlist_object_t &in);
162	162
163	163	const pstring resolve_alias(const pstring &name) const;
164	164	};

trunk/src/emu/netlist/pstate.c
r26736	r26737
7	7
8	8	ATTR_COLD pstate_manager_t::~pstate_manager_t()
9	9	{
10		m_save.reset_and_free();
	10	m_save.reset_and_free();
11	11	}
12	12
13	13
14	14
15	15	ATTR_COLD void pstate_manager_t::save_state_ptr(const pstring &stname, const netlist_data_type_e dt, const int size, const int count, void *ptr)
16	16	{
17		pstring fullname = stname;
18		ATTR_UNUSED pstring ts[] = {
19		"NOT_SUPPORTED",
20		"DT_DOUBLE",
21		"DT_INT64",
22		"DT_INT8",
23		"DT_INT",
24		"DT_BOOLEAN"
25		};
	17	pstring fullname = stname;
	18	ATTR_UNUSED pstring ts[] = {
	19	"NOT_SUPPORTED",
	20	"DT_DOUBLE",
	21	"DT_INT64",
	22	"DT_INT8",
	23	"DT_INT",
	24	"DT_BOOLEAN"
	25	};
26	26
27		NL_VERBOSE_OUT(("SAVE: <%s> %s(%d) %p\n", fullname.cstr(), ts[dt].cstr(), size, ptr));
28		pstate_entry_t *p = new pstate_entry_t(stname, dt, size, count, ptr);
29		m_save.add(p);
	27	NL_VERBOSE_OUT(("SAVE: <%s> %s(%d) %p\n", fullname.cstr(), ts[dt].cstr(), size, ptr));
	28	pstate_entry_t *p = new pstate_entry_t(stname, dt, size, count, ptr);
	29	m_save.add(p);
30	30	}

trunk/src/emu/netlist/devices/nld_signal.h
r26736	r26737
93	93	{
94	94	register_input(sIN[i], m_i[i]);
95	95	}
96		save(NAME(m_active));
	96	save(NAME(m_active));
97	97	}
98	98
99	99	#if (USE_DEACTIVE_DEVICE)
r26736	r26737
167	167	{
168	168	register_input(sIN[i], m_i[i], netlist_input_t::STATE_INP_ACTIVE);
169	169	}
170		save(NAME(m_active));
	170	save(NAME(m_active));
171	171	}
172	172
173	173	#if (USE_DEACTIVE_DEVICE)

trunk/src/emu/netlist/devices/nld_log.h
r26736	r26737
21	21	#include "../nl_base.h"
22	22
23	23	#define NETDEV_LOG(_name, _I) \
24		NET_REGISTER_DEV(log, _name) \
25		NET_CONNECT(_name, I, _I)
	24	NET_REGISTER_DEV(log, _name) \
	25	NET_CONNECT(_name, I, _I)
26	26
27	27	NETLIB_DEVICE(log,
28		~NETLIB_NAME(log)();
29		netlist_analog_input_t m_I;
	28	~NETLIB_NAME(log)();
	29	netlist_analog_input_t m_I;
30	30	protected:
31		FILE *m_file;
	31	FILE *m_file;
32	32	);
33	33
34	34	#define NETDEV_LOGD(_name, _I, _I2) \
35		NET_REGISTER_DEV(logD, _name) \
36		NET_CONNECT(_name, I, _I) \
37		NET_CONNECT(_name, I2, _I2)
	35	NET_REGISTER_DEV(logD, _name) \
	36	NET_CONNECT(_name, I, _I) \
	37	NET_CONNECT(_name, I2, _I2)
38	38
39	39	NETLIB_DEVICE_DERIVED(logD, log,
40		netlist_analog_input_t m_I2;
	40	netlist_analog_input_t m_I2;
41	41	);
42	42
43	43	#if 0
44	44	NETLIB_DEVICE(wav,
45		~NETLIB_NAME(wav)();
46		netlist_analog_input_t m_I;
	45	~NETLIB_NAME(wav)();
	46	netlist_analog_input_t m_I;
47	47	private:
48		// FIXME: rewrite sound/wavwrite.h to be an object ...
49		void *m_file;
	48	// FIXME: rewrite sound/wavwrite.h to be an object ...
	49	void *m_file;
50	50	);
51	51	#endif
52	52

trunk/src/emu/netlist/devices/nld_7404.c
r26736	r26737
7	7
8	8	NETLIB_START(nic7404)
9	9	{
10		register_input("A", m_I);
11		register_output("Q", m_Q);
12		m_Q.initial(1);
	10	register_input("A", m_I);
	11	register_output("Q", m_Q);
	12	m_Q.initial(1);
13	13	}
14	14
15	15	NETLIB_UPDATE(nic7404)
16	16	{
17		static const netlist_time delay[2] = { NLTIME_FROM_NS(15), NLTIME_FROM_NS(22) };
18		UINT8 t = (INPLOGIC(m_I)) ^ 1;
19		OUTLOGIC(m_Q, t, delay[t]);
	17	static const netlist_time delay[2] = { NLTIME_FROM_NS(15), NLTIME_FROM_NS(22) };
	18	UINT8 t = (INPLOGIC(m_I)) ^ 1;
	19	OUTLOGIC(m_Q, t, delay[t]);
20	20	}

trunk/src/emu/netlist/devices/nld_7400.h
r26736	r26737
43	43
44	44	NETLIB_DEVICE(7400pin,
45	45
46		NETLIB_NAME(7400) m_1;
47		NETLIB_NAME(7400) m_2;
48		NETLIB_NAME(7400) m_3;
49		NETLIB_NAME(7400) m_4;
	46	NETLIB_NAME(7400) m_1;
	47	NETLIB_NAME(7400) m_2;
	48	NETLIB_NAME(7400) m_3;
	49	NETLIB_NAME(7400) m_4;
50	50	);
51	51
52	52	inline NETLIB_START(7400pin)
53	53	{
54		register_sub(m_1, "1");
55		register_sub(m_2, "2");
56		register_sub(m_3, "3");
57		register_sub(m_4, "4");
	54	register_sub(m_1, "1");
	55	register_sub(m_2, "2");
	56	register_sub(m_3, "3");
	57	register_sub(m_4, "4");
58	58
59		register_subalias("1", m_1.m_i[0]);
60		register_subalias("2", m_1.m_i[1]);
61		register_subalias("3", m_1.m_Q);
	59	register_subalias("1", m_1.m_i[0]);
	60	register_subalias("2", m_1.m_i[1]);
	61	register_subalias("3", m_1.m_Q);
62	62
63		register_subalias("4", m_2.m_i[0]);
64		register_subalias("5", m_2.m_i[1]);
65		register_subalias("6", m_2.m_Q);
	63	register_subalias("4", m_2.m_i[0]);
	64	register_subalias("5", m_2.m_i[1]);
	65	register_subalias("6", m_2.m_Q);
66	66
67		register_subalias("9", m_3.m_i[0]);
68		register_subalias("10", m_3.m_i[1]);
69		register_subalias("8", m_3.m_Q);
	67	register_subalias("9", m_3.m_i[0]);
	68	register_subalias("10", m_3.m_i[1]);
	69	register_subalias("8", m_3.m_Q);
70	70
71		register_subalias("12", m_4.m_i[0]);
72		register_subalias("13", m_4.m_i[1]);
73		register_subalias("11", m_4.m_Q);
	71	register_subalias("12", m_4.m_i[0]);
	72	register_subalias("13", m_4.m_i[1]);
	73	register_subalias("11", m_4.m_Q);
74	74	}
75	75
76	76	#endif /* NLD_7400_H_ */

trunk/src/emu/netlist/devices/nld_ne555.c
r26736	r26737
11	11
12	12	inline double NETLIB_NAME(NE555)::clamp(const double v, const double a, const double b)
13	13	{
14		double ret = v;
15		double vcc = TERMANALOG(m_R1.m_P);
	14	double ret = v;
	15	double vcc = TERMANALOG(m_R1.m_P);
16	16
17		if (ret > vcc - a)
18		ret = vcc - a;
19		if (ret < b)
20		ret = b;
21		return ret;
	17	if (ret > vcc - a)
	18	ret = vcc - a;
	19	if (ret < b)
	20	ret = b;
	21	return ret;
22	22	}
23	23
24	24	NETLIB_START(NE555)
25	25	{
	26	register_sub(m_R1, "R1");
	27	register_sub(m_R2, "R2");
	28	register_sub(m_R3, "R3");
	29	register_sub(m_RDIS, "RDIS");
26	30
27		register_sub(m_R1, "R1");
28		register_sub(m_R2, "R2");
29		register_sub(m_R3, "R3");
30		register_sub(m_RDIS, "RDIS");
	31	register_subalias("GND", m_R3.m_N); // Pin 1
	32	register_input("TRIG", m_TRIG); // Pin 2
	33	register_output("OUT", m_OUT); // Pin 3
	34	register_input("RESET", m_RESET); // Pin 4
	35	register_subalias("CONT", m_R1.m_N); // Pin 5
	36	register_input("THRESH", m_THRES); // Pin 6
	37	register_subalias("DISCH", m_RDIS.m_P); // Pin 7
	38	register_subalias("VCC", m_R1.m_P); // Pin 8
31	39
32		register_subalias("GND", m_R3.m_N); // Pin 1
33		register_input("TRIG", m_TRIG); // Pin 2
34		register_output("OUT", m_OUT); // Pin 3
35		register_input("RESET", m_RESET); // Pin 4
36		register_subalias("CONT", m_R1.m_N); // Pin 5
37		register_input("THRESH", m_THRES); // Pin 6
38		register_subalias("DISCH", m_RDIS.m_P); // Pin 7
39		register_subalias("VCC", m_R1.m_P); // Pin 8
	40	m_R1.set_R(5000);
	41	m_R2.set_R(5000);
	42	m_R3.set_R(5000);
	43	m_RDIS.set_R(R_OFF);
40	44
41		m_R1.set_R(5000);
42		m_R2.set_R(5000);
43		m_R3.set_R(5000);
44		m_RDIS.set_R(R_OFF);
	45	setup().connect(m_R1.m_N, m_R2.m_P);
	46	setup().connect(m_R2.m_N, m_R3.m_P);
	47	setup().connect(m_RDIS.m_N, m_R3.m_N);
45	48
46		setup().connect(m_R1.m_N, m_R2.m_P);
47		setup().connect(m_R2.m_N, m_R3.m_P);
48		setup().connect(m_RDIS.m_N, m_R3.m_N);
	49	m_last_out = false;
49	50
50		m_last_out = false;
51
52		save(NAME(m_last_out));
	51	save(NAME(m_last_out));
53	52	}
54	53
55	54	NETLIB_UPDATE(NE555)
56	55	{
57		// FIXME: assumes GND is connected to 0V.
	56	// FIXME: assumes GND is connected to 0V.
58	57
59		double vt = clamp(TERMANALOG(m_R2.m_P), 0.7, 1.4);
60		bool bthresh = (INPANALOG(m_THRES) > vt);
61		bool btrig = (INPANALOG(m_TRIG) > clamp(TERMANALOG(m_R2.m_N), 0.7, 1.4));
62		bool out = m_last_out;
	58	double vt = clamp(TERMANALOG(m_R2.m_P), 0.7, 1.4);
	59	bool bthresh = (INPANALOG(m_THRES) > vt);
	60	bool btrig = (INPANALOG(m_TRIG) > clamp(TERMANALOG(m_R2.m_N), 0.7, 1.4));
	61	bool out = m_last_out;
63	62
64		if (!btrig)
65		{
66		out = true;
67		}
68		else if (bthresh)
69		{
70		out = false;
71		}
	63	if (!btrig)
	64	{
	65	out = true;
	66	}
	67	else if (bthresh)
	68	{
	69	out = false;
	70	}
72	71
73		if (!m_last_out && out)
74		{
75		OUTANALOG(m_OUT, TERMANALOG(m_R1.m_P), NLTIME_FROM_NS(100));
76		m_RDIS.set_R(R_OFF);
77		}
78		else if (m_last_out && !out)
79		{
80		OUTANALOG(m_OUT, TERMANALOG(m_R3.m_N), NLTIME_FROM_NS(100));
81		m_RDIS.set_R(R_ON);
82		}
83		m_last_out = out;
	72	if (!m_last_out && out)
	73	{
	74	OUTANALOG(m_OUT, TERMANALOG(m_R1.m_P), NLTIME_FROM_NS(100));
	75	m_RDIS.set_R(R_OFF);
	76	}
	77	else if (m_last_out && !out)
	78	{
	79	OUTANALOG(m_OUT, TERMANALOG(m_R3.m_N), NLTIME_FROM_NS(100));
	80	m_RDIS.set_R(R_ON);
	81	}
	82	m_last_out = out;
84	83	}

trunk/src/emu/netlist/devices/nld_twoterm.c
r26736	r26737
12	12	// ----------------------------------------------------------------------------------------
13	13
14	14	ATTR_COLD NETLIB_NAME(twoterm)::NETLIB_NAME(twoterm)(const family_t afamily) :
15		netlist_device_t(afamily)
	15	netlist_device_t(afamily)
16	16	{
17		m_P.m_otherterm = &m_N;
18		m_N.m_otherterm = &m_P;
	17	m_P.m_otherterm = &m_N;
	18	m_N.m_otherterm = &m_P;
19	19	}
20	20
21	21	NETLIB_START(twoterm)
r26736	r26737
24	24
25	25	NETLIB_UPDATE(twoterm)
26	26	{
27		/* only called if connected to a rail net ==> notify the solver to recalculate */
28		netlist().solver()->schedule();
	27	/* only called if connected to a rail net ==> notify the solver to recalculate */
	28	netlist().solver()->schedule();
29	29	}
30	30
31	31	// ----------------------------------------------------------------------------------------
r26736	r26737
34	34
35	35	NETLIB_START(R_base)
36	36	{
37		register_terminal("1", m_P);
38		register_terminal("2", m_N);
	37	register_terminal("1", m_P);
	38	register_terminal("2", m_N);
39	39	}
40	40
41	41	NETLIB_UPDATE(R_base)
42	42	{
43		NETLIB_NAME(twoterm)::update();
	43	NETLIB_NAME(twoterm)::update();
44	44	}
45	45
46	46	NETLIB_START(R)
47	47	{
48		NETLIB_NAME(R_base)::start();
49		register_param("R", m_R, 1.0 / NETLIST_GMIN);
	48	NETLIB_NAME(R_base)::start();
	49	register_param("R", m_R, 1.0 / NETLIST_GMIN);
50	50	}
51	51
52	52	NETLIB_UPDATE(R)
53	53	{
54		NETLIB_NAME(twoterm)::update();
	54	NETLIB_NAME(twoterm)::update();
55	55	}
56	56
57	57	NETLIB_UPDATE_PARAM(R)
58	58	{
59		set_R(m_R.Value());
	59	set_R(m_R.Value());
60	60	}
61	61
62	62	// ----------------------------------------------------------------------------------------
r26736	r26737
65	65
66	66	NETLIB_START(POT)
67	67	{
68		register_sub(m_R1, "R1");
69		register_sub(m_R2, "R2");
	68	register_sub(m_R1, "R1");
	69	register_sub(m_R2, "R2");
70	70
71		register_subalias("1", m_R1.m_P);
72		register_subalias("2", m_R1.m_N);
73		register_subalias("3", m_R2.m_N);
	71	register_subalias("1", m_R1.m_P);
	72	register_subalias("2", m_R1.m_N);
	73	register_subalias("3", m_R2.m_N);
74	74
75		setup().connect(m_R2.m_P, m_R1.m_N);
	75	setup().connect(m_R2.m_P, m_R1.m_N);
76	76
77		register_param("R", m_R, 1.0 / NETLIST_GMIN);
78		register_param("DIAL", m_Dial, 0.5);
	77	register_param("R", m_R, 1.0 / NETLIST_GMIN);
	78	register_param("DIAL", m_Dial, 0.5);
79	79
80	80	}
81	81
82	82	NETLIB_UPDATE(POT)
83	83	{
84		m_R1.update_dev();
85		m_R2.update_dev();
	84	m_R1.update_dev();
	85	m_R2.update_dev();
86	86	}
87	87
88	88	NETLIB_UPDATE_PARAM(POT)
89	89	{
90		m_R1.set_R(MAX(m_R.Value() * m_Dial.Value(), NETLIST_GMIN));
91		m_R2.set_R(MAX(m_R.Value() * (1.0 - m_Dial.Value()), NETLIST_GMIN));
	90	m_R1.set_R(MAX(m_R.Value() * m_Dial.Value(), NETLIST_GMIN));
	91	m_R2.set_R(MAX(m_R.Value() * (1.0 - m_Dial.Value()), NETLIST_GMIN));
92	92	}
93	93	// ----------------------------------------------------------------------------------------
94	94	// nld_C
r26736	r26737
96	96
97	97	NETLIB_START(C)
98	98	{
99		register_terminal("1", m_P);
100		register_terminal("2", m_N);
	99	register_terminal("1", m_P);
	100	register_terminal("2", m_N);
101	101
102		register_param("C", m_C, 1e-6);
	102	register_param("C", m_C, 1e-6);
103	103	}
104	104
105	105	NETLIB_UPDATE_PARAM(C)
106	106	{
107		// set to some very small step time for now
108		step_time(1e-9);
	107	// set to some very small step time for now
	108	step_time(1e-9);
109	109	}
110	110
111	111	NETLIB_UPDATE(C)
112	112	{
113		NETLIB_NAME(twoterm)::update();
	113	NETLIB_NAME(twoterm)::update();
114	114	}
115	115
116	116	// ----------------------------------------------------------------------------------------
r26736	r26737
119	119
120	120	NETLIB_START(D)
121	121	{
122		register_terminal("A", m_P);
123		register_terminal("K", m_N);
124		register_param("model", m_model, "");
	122	register_terminal("A", m_P);
	123	register_terminal("K", m_N);
	124	register_param("model", m_model, "");
125	125
126		m_Vd = 0.7;
	126	m_Vd = 0.7;
127	127
128		save(NAME(m_Vd));
	128	save(NAME(m_Vd));
129	129
130	130	}
131	131
132	132
133	133	NETLIB_UPDATE_PARAM(D)
134	134	{
135		m_Is = m_model.dValue("Is", 1e-15);
136		m_n = m_model.dValue("N", 1);
	135	m_Is = m_model.dValue("Is", 1e-15);
	136	m_n = m_model.dValue("N", 1);
137	137
138		m_Vt = 0.0258 * m_n;
	138	m_Vt = 0.0258 * m_n;
139	139
140		m_Vcrit = m_Vt * log(m_Vt / m_Is / sqrt(2.0));
141		m_VtInv = 1.0 / m_Vt;
142		NL_VERBOSE_OUT(("VCutoff: %f\n", m_Vcrit));
	140	m_Vcrit = m_Vt * log(m_Vt / m_Is / sqrt(2.0));
	141	m_VtInv = 1.0 / m_Vt;
	142	NL_VERBOSE_OUT(("VCutoff: %f\n", m_Vcrit));
143	143	}
144	144
145	145	NETLIB_UPDATE(D)
146	146	{
147		NETLIB_NAME(twoterm)::update();
	147	NETLIB_NAME(twoterm)::update();
148	148	}
149	149
150	150	class diode
151	151	{
152	152	public:
153		diode() : m_Is(1e-15), m_VT(0.0258), m_VT_inv(1.0 / m_VT) {}
154		diode(const double Is, const double n)
155		{
156		m_Is = Is;
157		m_VT = 0.0258 * n;
158		m_VT_inv = 1.0 / m_VT;
159		}
160		void set(const double Is, const double n)
161		{
162		m_Is = Is;
163		m_VT = 0.0258 * n;
164		m_VT_inv = 1.0 / m_VT;
165		}
166		double I(const double V) const { return m_Is * exp(V * m_VT_inv) - m_Is; }
167		double g(const double V) const { return m_Is * m_VT_inv * exp(V * m_VT_inv); }
168		double V(const double I) const { return log(1.0 + I / m_Is) * m_VT; }
169		double gI(const double I) const { return m_VT_inv * (I + m_Is); }
	153	diode() : m_Is(1e-15), m_VT(0.0258), m_VT_inv(1.0 / m_VT) {}
	154	diode(const double Is, const double n)
	155	{
	156	m_Is = Is;
	157	m_VT = 0.0258 * n;
	158	m_VT_inv = 1.0 / m_VT;
	159	}
	160	void set(const double Is, const double n)
	161	{
	162	m_Is = Is;
	163	m_VT = 0.0258 * n;
	164	m_VT_inv = 1.0 / m_VT;
	165	}
	166	double I(const double V) const { return m_Is * exp(V * m_VT_inv) - m_Is; }
	167	double g(const double V) const { return m_Is * m_VT_inv * exp(V * m_VT_inv); }
	168	double V(const double I) const { return log(1.0 + I / m_Is) * m_VT; }
	169	double gI(const double I) const { return m_VT_inv * (I + m_Is); }
170	170
171	171	private:
172		double m_Is;
173		double m_VT;
174		double m_VT_inv;
	172	double m_Is;
	173	double m_VT;
	174	double m_VT_inv;
175	175	};
176	176
177	177	// ----------------------------------------------------------------------------------------
r26736	r26737
180	180
181	181	NETLIB_START(Q)
182	182	{
183		register_param("model", m_model, "");
	183	register_param("model", m_model, "");
184	184	}
185	185
186	186	template <NETLIB_NAME(Q)::q_type _type>
187	187	NETLIB_START(QBJT_switch<_type>)
188	188	{
189		NETLIB_NAME(Q)::start();
	189	NETLIB_NAME(Q)::start();
190	190
191		register_sub(m_RB, "RB");
192		register_sub(m_RC, "RC");
193		register_input("BV", m_BV);
194		register_input("EV", m_EV);
	191	register_sub(m_RB, "RB");
	192	register_sub(m_RC, "RC");
	193	register_input("BV", m_BV);
	194	register_input("EV", m_EV);
195	195
196		register_subalias("B", m_RB.m_P);
197		register_subalias("E", m_RB.m_N);
198		register_subalias("C", m_RC.m_P);
	196	register_subalias("B", m_RB.m_P);
	197	register_subalias("E", m_RB.m_N);
	198	register_subalias("C", m_RC.m_P);
199	199
200		setup().connect(m_RB.m_N, m_RC.m_N);
201		setup().connect(m_RB.m_P, m_BV);
202		setup().connect(m_RB.m_N, m_EV);
	200	setup().connect(m_RB.m_N, m_RC.m_N);
	201	setup().connect(m_RB.m_P, m_BV);
	202	setup().connect(m_RB.m_N, m_EV);
203	203
204		save(NAME(m_state_on));
	204	save(NAME(m_state_on));
205	205	}
206	206
207	207	NETLIB_UPDATE(Q)
208	208	{
209		netlist().solver()->schedule();
	209	netlist().solver()->schedule();
210	210	}
211	211
212	212	template <NETLIB_NAME(Q)::q_type _type>
213	213	NETLIB_UPDATE_PARAM(QBJT_switch<_type>)
214	214	{
215		double IS = m_model.dValue("IS", 1e-15);
216		double BF = m_model.dValue("BF", 100);
217		double NF = m_model.dValue("NF", 1);
218		//double VJE = m_model.dValue("VJE", 0.75);
	215	double IS = m_model.dValue("IS", 1e-15);
	216	double BF = m_model.dValue("BF", 100);
	217	double NF = m_model.dValue("NF", 1);
	218	//double VJE = m_model.dValue("VJE", 0.75);
219	219
220		double alpha = BF / (1.0 + BF);
	220	double alpha = BF / (1.0 + BF);
221	221
222		diode d(IS, NF);
	222	diode d(IS, NF);
223	223
224		// Assume 5mA Collector current for switch operation
	224	// Assume 5mA Collector current for switch operation
225	225
226		if (_type == BJT_NPN)
227		m_V = d.V(0.005 / alpha);
228		else
229		m_V = - d.V(0.005 / alpha);
	226	if (_type == BJT_NPN)
	227	m_V = d.V(0.005 / alpha);
	228	else
	229	m_V = - d.V(0.005 / alpha);
230	230
231		m_gB = d.gI(0.005 / alpha);
232		if (m_gB < NETLIST_GMIN)
233		m_gB = NETLIST_GMIN;
234		m_gC = BF * m_gB; // very rough estimate
235		//printf("%f %f \n", m_V, m_gB);
236		m_RB.set(NETLIST_GMIN, 0.0, 0.0);
237		m_RC.set(NETLIST_GMIN, 0.0, 0.0);
	231	m_gB = d.gI(0.005 / alpha);
	232	if (m_gB < NETLIST_GMIN)
	233	m_gB = NETLIST_GMIN;
	234	m_gC = BF * m_gB; // very rough estimate
	235	//printf("%f %f \n", m_V, m_gB);
	236	m_RB.set(NETLIST_GMIN, 0.0, 0.0);
	237	m_RC.set(NETLIST_GMIN, 0.0, 0.0);
238	238	}
239	239
240	240	template NETLIB_START(QBJT_switch<NETLIB_NAME(Q)::BJT_NPN>);
r26736	r26737
248	248
249	249	NETLIB_START(VCCS)
250	250	{
251		configure(1.0, NETLIST_GMIN);
	251	configure(1.0, NETLIST_GMIN);
252	252	}
253	253
254	254	ATTR_COLD void NETLIB_NAME(VCCS)::configure(const double Gfac, const double GI)
255	255	{
	256	register_param("G", m_G, 1.0);
256	257
257		register_param("G", m_G, 1.0);
	258	register_terminal("IP", m_IP);
	259	register_terminal("IN", m_IN);
	260	register_terminal("OP", m_OP);
	261	register_terminal("ON", m_ON);
258	262
259		register_terminal("IP", m_IP);
260		register_terminal("IN", m_IN);
261		register_terminal("OP", m_OP);
262		register_terminal("ON", m_ON);
	263	m_OP1.init_object(*this, name() + ".OP1", netlist_core_terminal_t::STATE_INP_ACTIVE);
	264	m_ON1.init_object(*this, name() + ".ON1", netlist_core_terminal_t::STATE_INP_ACTIVE);
263	265
264		m_OP1.init_object(*this, name() + ".OP1", netlist_core_terminal_t::STATE_INP_ACTIVE);
265		m_ON1.init_object(*this, name() + ".ON1", netlist_core_terminal_t::STATE_INP_ACTIVE);
	266	const double m_mult = m_G.Value() * Gfac; // 1.0 ==> 1V ==> 1A
	267	m_IP.set(GI);
	268	m_IP.m_otherterm = &m_IN; // <= this should be NULL and terminal be filtered out prior to solving...
	269	m_IN.set(GI);
	270	m_IN.m_otherterm = &m_IP; // <= this should be NULL and terminal be filtered out prior to solving...
266	271
267		const double m_mult = m_G.Value() * Gfac; // 1.0 ==> 1V ==> 1A
268		m_IP.set(GI);
269		m_IP.m_otherterm = &m_IN; // <= this should be NULL and terminal be filtered out prior to solving...
270		m_IN.set(GI);
271		m_IN.m_otherterm = &m_IP; // <= this should be NULL and terminal be filtered out prior to solving...
	272	m_OP.set(m_mult, 0.0);
	273	m_OP.m_otherterm = &m_IP;
	274	m_OP1.set(-m_mult, 0.0);
	275	m_OP1.m_otherterm = &m_IN;
272	276
273		m_OP.set(m_mult, 0.0);
274		m_OP.m_otherterm = &m_IP;
275		m_OP1.set(-m_mult, 0.0);
276		m_OP1.m_otherterm = &m_IN;
	277	m_ON.set(-m_mult, 0.0);
	278	m_ON.m_otherterm = &m_IP;
	279	m_ON1.set(m_mult, 0.0);
	280	m_ON1.m_otherterm = &m_IN;
277	281
278		m_ON.set(-m_mult, 0.0);
279		m_ON.m_otherterm = &m_IP;
280		m_ON1.set(m_mult, 0.0);
281		m_ON1.m_otherterm = &m_IN;
282
283		setup().connect(m_OP, m_OP1);
284		setup().connect(m_ON, m_ON1);
	282	setup().connect(m_OP, m_OP1);
	283	setup().connect(m_ON, m_ON1);
285	284	}
286	285
287	286	NETLIB_UPDATE_PARAM(VCCS)
r26736	r26737
290	289
291	290	NETLIB_UPDATE(VCCS)
292	291	{
293		/* only called if connected to a rail net ==> notify the solver to recalculate */
294		netlist().solver()->schedule();
	292	/* only called if connected to a rail net ==> notify the solver to recalculate */
	293	netlist().solver()->schedule();
295	294	}
296	295
297	296	// ----------------------------------------------------------------------------------------
r26736	r26737
300	299
301	300	NETLIB_START(VCVS)
302	301	{
303		register_param("RO", m_RO, 1.0);
	302	register_param("RO", m_RO, 1.0);
304	303
305		const double gRO = 1.0 / m_RO.Value();
	304	const double gRO = 1.0 / m_RO.Value();
306	305
307		configure(gRO, NETLIST_GMIN);
	306	configure(gRO, NETLIST_GMIN);
308	307
309		m_OP2.init_object(*this, "OP2", netlist_core_terminal_t::STATE_INP_ACTIVE);
310		m_ON2.init_object(*this, "ON2", netlist_core_terminal_t::STATE_INP_ACTIVE);
	308	m_OP2.init_object(*this, "OP2", netlist_core_terminal_t::STATE_INP_ACTIVE);
	309	m_ON2.init_object(*this, "ON2", netlist_core_terminal_t::STATE_INP_ACTIVE);
311	310
312		m_OP2.set(gRO);
313		m_ON2.set(gRO);
314		m_OP2.m_otherterm = &m_ON2;
315		m_ON2.m_otherterm = &m_OP2;
	311	m_OP2.set(gRO);
	312	m_ON2.set(gRO);
	313	m_OP2.m_otherterm = &m_ON2;
	314	m_ON2.m_otherterm = &m_OP2;
316	315
317		setup().connect(m_OP2, m_OP1);
318		setup().connect(m_ON2, m_ON1);
	316	setup().connect(m_OP2, m_OP1);
	317	setup().connect(m_ON2, m_ON1);
319	318	}
320	319
321	320	NETLIB_UPDATE_PARAM(VCVS)
322	321	{
323	322	}
324

trunk/src/emu/netlist/devices/nld_7420.h
r26736	r26737
36	36	#include "nld_signal.h"
37	37
38	38	#define TTL_7420_NAND(_name, _I1, _I2, _I3, _I4) \
39		NET_REGISTER_DEV(7420, _name) \
40		NET_CONNECT(_name, A, _I1) \
41		NET_CONNECT(_name, B, _I2) \
42		NET_CONNECT(_name, C, _I3) \
43		NET_CONNECT(_name, D, _I4)
	39	NET_REGISTER_DEV(7420, _name) \
	40	NET_CONNECT(_name, A, _I1) \
	41	NET_CONNECT(_name, B, _I2) \
	42	NET_CONNECT(_name, C, _I3) \
	43	NET_CONNECT(_name, D, _I4)
44	44
45	45
46	46	NETLIB_SIGNAL(7420, 4, 0, 0);

trunk/src/emu/netlist/devices/nld_7402.h
r26736	r26737
35	35	#include "nld_signal.h"
36	36
37	37	#define TTL_7402_NOR(_name, _I1, _I2) \
38		NET_REGISTER_DEV(7402, _name) \
39		NET_CONNECT(_name, A, _I1) \
40		NET_CONNECT(_name, B, _I2)
	38	NET_REGISTER_DEV(7402, _name) \
	39	NET_CONNECT(_name, A, _I1) \
	40	NET_CONNECT(_name, B, _I2)
41	41
42	42	NETLIB_SIGNAL(7402, 2, 1, 0);
43	43

trunk/src/emu/netlist/devices/nld_7404.h
r26736	r26737
33	33	#include "nld_signal.h"
34	34
35	35	NETLIB_DEVICE(nic7404,
36		netlist_ttl_input_t m_I;
37		netlist_ttl_output_t m_Q;
	36	netlist_ttl_input_t m_I;
	37	netlist_ttl_output_t m_Q;
38	38	);
39	39
40	40	#define TTL_7404_INVERT(_name, _A) \
41		NET_REGISTER_DEV(nic7404, _name) \
42		NET_CONNECT(_name, A, _A)
	41	NET_REGISTER_DEV(nic7404, _name) \
	42	NET_CONNECT(_name, A, _A)
43	43
44	44	#endif /* NLD_7404_H_ */

trunk/src/emu/netlist/devices/nld_legacy.c
r26736	r26737
7	7
8	8	NETLIB_START(nicMultiSwitch)
9	9	{
10		static const char *sIN[8] = { "i1", "i2", "i3", "i4", "i5", "i6", "i7", "i8" };
11		int i;
	10	static const char *sIN[8] = { "i1", "i2", "i3", "i4", "i5", "i6", "i7", "i8" };
	11	int i;
12	12
13		m_position = 0;
14		m_low.initial(0);
	13	m_position = 0;
	14	m_low.initial(0);
15	15
16		for (i=0; i<8; i++)
17		{
18		register_input(sIN[i], m_I[i]);
19		m_low.net().register_con(m_I[i]);
20		//m_I[i].set_net(m_low.m_net);
21		}
22		register_param("POS", m_POS, 0);
23		register_output("Q", m_Q);
	16	for (i=0; i<8; i++)
	17	{
	18	register_input(sIN[i], m_I[i]);
	19	m_low.net().register_con(m_I[i]);
	20	//m_I[i].set_net(m_low.m_net);
	21	}
	22	register_param("POS", m_POS, 0);
	23	register_output("Q", m_Q);
24	24
25		save(NAME(m_position));
	25	save(NAME(m_position));
26	26
27	27	}
28	28
29	29	NETLIB_UPDATE(nicMultiSwitch)
30	30	{
31		assert(m_position<8);
32		OUTANALOG(m_Q, INPANALOG(m_I[m_position]), NLTIME_FROM_NS(1));
	31	assert(m_position<8);
	32	OUTANALOG(m_Q, INPANALOG(m_I[m_position]), NLTIME_FROM_NS(1));
33	33	}
34	34
35	35	NETLIB_UPDATE_PARAM(nicMultiSwitch)
36	36	{
37		m_position = m_POS.Value();
38		//update();
	37	m_position = m_POS.Value();
	38	//update();
39	39	}
40	40
41	41	NETLIB_START(nicMixer8)
42	42	{
43		static const char *sI[8] = { "I1", "I2", "I3", "I4", "I5", "I6", "I7", "I8" };
44		static const char *sR[8] = { "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8" };
45		int i;
	43	static const char *sI[8] = { "I1", "I2", "I3", "I4", "I5", "I6", "I7", "I8" };
	44	static const char *sR[8] = { "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8" };
	45	int i;
46	46
47		m_low.initial(0);
	47	m_low.initial(0);
48	48
49		for (i=0; i<8; i++)
50		{
51		register_input(sI[i], m_I[i]);
52		m_low.net().register_con(m_I[i]);
53		//m_I[i].set_output(m_low);
54		register_param(sR[i], m_R[i], 1e12);
55		}
56		register_output("Q", m_Q);
	49	for (i=0; i<8; i++)
	50	{
	51	register_input(sI[i], m_I[i]);
	52	m_low.net().register_con(m_I[i]);
	53	//m_I[i].set_output(m_low);
	54	register_param(sR[i], m_R[i], 1e12);
	55	}
	56	register_output("Q", m_Q);
57	57	}
58	58
59	59	NETLIB_UPDATE(nicMixer8)
60	60	{
61		int i;
62		double r = 0;
	61	int i;
	62	double r = 0;
63	63
64		for (i=0; i<8; i++)
65		{
66		r += m_w[i] * INPANALOG(m_I[i]);
67		}
68		OUTANALOG(m_Q, r, NLTIME_IMMEDIATE);
	64	for (i=0; i<8; i++)
	65	{
	66	r += m_w[i] * INPANALOG(m_I[i]);
	67	}
	68	OUTANALOG(m_Q, r, NLTIME_IMMEDIATE);
69	69	}
70	70
71	71	NETLIB_UPDATE_PARAM(nicMixer8)
72	72	{
73		double t = 0;
74		int i;
	73	double t = 0;
	74	int i;
75	75
76		for (i=0; i<8; i++)
77		t += 1.0 / m_R[i].Value();
78		t = 1.0 / t;
	76	for (i=0; i<8; i++)
	77	t += 1.0 / m_R[i].Value();
	78	t = 1.0 / t;
79	79
80		for (i=0; i<8; i++)
81		m_w[i] = t / m_R[i].Value();
	80	for (i=0; i<8; i++)
	81	m_w[i] = t / m_R[i].Value();
82	82	}
83	83
84	84
85	85
86	86	NETLIB_START(nicRSFF)
87	87	{
88		register_input("S", m_S);
89		register_input("R", m_R);
90		register_output("Q", m_Q);
91		register_output("QQ", m_QQ);
92		m_Q.initial(0);
93		m_QQ.initial(1);
	88	register_input("S", m_S);
	89	register_input("R", m_R);
	90	register_output("Q", m_Q);
	91	register_output("QQ", m_QQ);
	92	m_Q.initial(0);
	93	m_QQ.initial(1);
94	94	}
95	95
96	96	NETLIB_UPDATE(nicRSFF)
97	97	{
98		if (INPLOGIC(m_S))
99		{
100		OUTLOGIC(m_Q, 1, NLTIME_FROM_NS(10));
101		OUTLOGIC(m_QQ, 0, NLTIME_FROM_NS(10));
102		}
103		else if (INPLOGIC(m_R))
104		{
105		OUTLOGIC(m_Q, 0, NLTIME_FROM_NS(10));
106		OUTLOGIC(m_QQ, 1, NLTIME_FROM_NS(10));
107		}
	98	if (INPLOGIC(m_S))
	99	{
	100	OUTLOGIC(m_Q, 1, NLTIME_FROM_NS(10));
	101	OUTLOGIC(m_QQ, 0, NLTIME_FROM_NS(10));
	102	}
	103	else if (INPLOGIC(m_R))
	104	{
	105	OUTLOGIC(m_Q, 0, NLTIME_FROM_NS(10));
	106	OUTLOGIC(m_QQ, 1, NLTIME_FROM_NS(10));
	107	}
108	108	}
109	109
110	110
111	111	NETLIB_START(nicNE555N_MSTABLE)
112	112	{
113		register_input("TRIG", m_trigger);
114		register_input("CV", m_CV);
	113	register_input("TRIG", m_trigger);
	114	register_input("CV", m_CV);
115	115
116		register_output("Q", m_Q);
117		register_param("R", m_R, 0.0);
118		register_param("C", m_C, 0.0);
119		register_param("VS", m_VS, 5.0);
120		register_param("VL", m_VL, 0.0 *5.0);
	116	register_output("Q", m_Q);
	117	register_param("R", m_R, 0.0);
	118	register_param("C", m_C, 0.0);
	119	register_param("VS", m_VS, 5.0);
	120	register_param("VL", m_VL, 0.0 *5.0);
121	121
122		m_THRESHOLD_OUT.init_object(*this, name() + "THRESHOLD");
123		register_link_internal(m_THRESHOLD, m_THRESHOLD_OUT, netlist_input_t::STATE_INP_ACTIVE);
	122	m_THRESHOLD_OUT.init_object(*this, name() + "THRESHOLD");
	123	register_link_internal(m_THRESHOLD, m_THRESHOLD_OUT, netlist_input_t::STATE_INP_ACTIVE);
124	124
125		m_Q.initial(5.0 * 0.4);
126		m_last = false;
	125	m_Q.initial(5.0 * 0.4);
	126	m_last = false;
127	127
128		save(NAME(m_last));
	128	save(NAME(m_last));
129	129
130	130	}
131	131
132	132	inline double NETLIB_NAME(nicNE555N_MSTABLE)::nicNE555N_cv()
133	133	{
134		return (m_CV.is_highz() ? 0.67 * m_VS.Value() : INPANALOG(m_CV));
	134	return (m_CV.is_highz() ? 0.67 * m_VS.Value() : INPANALOG(m_CV));
135	135	}
136	136
137	137	inline double NETLIB_NAME(nicNE555N_MSTABLE)::nicNE555N_clamp(const double v, const double a, const double b)
138	138	{
139		double ret = v;
140		if (ret > m_VS.Value() - a)
141		ret = m_VS.Value() - a;
142		if (ret < b)
143		ret = b;
144		return ret;
	139	double ret = v;
	140	if (ret > m_VS.Value() - a)
	141	ret = m_VS.Value() - a;
	142	if (ret < b)
	143	ret = b;
	144	return ret;
145	145	}
146	146
147	147	NETLIB_UPDATE_PARAM(nicNE555N_MSTABLE)
r26736	r26737
150	150
151	151	NETLIB_UPDATE(nicNE555N_MSTABLE)
152	152	{
153		update_param(); // FIXME : m_CV should be on a sub device ...
	153	update_param(); // FIXME : m_CV should be on a sub device ...
154	154
155		double vt = nicNE555N_clamp(nicNE555N_cv(), 0.7, 1.4);
156		bool bthresh = (INPANALOG(m_THRESHOLD) > vt);
157		bool btrig = (INPANALOG(m_trigger) > nicNE555N_clamp(nicNE555N_cv() * 0.5, 0.7, 1.4));
158		bool out = m_last;
	155	double vt = nicNE555N_clamp(nicNE555N_cv(), 0.7, 1.4);
	156	bool bthresh = (INPANALOG(m_THRESHOLD) > vt);
	157	bool btrig = (INPANALOG(m_trigger) > nicNE555N_clamp(nicNE555N_cv() * 0.5, 0.7, 1.4));
	158	bool out = m_last;
159	159
160		if (!btrig)
161		{
162		out = true;
163		}
164		else if (bthresh)
165		{
166		out = false;
167		}
	160	if (!btrig)
	161	{
	162	out = true;
	163	}
	164	else if (bthresh)
	165	{
	166	out = false;
	167	}
168	168
169		if (!m_last && out)
170		{
171		double vl = m_VL.Value();
172		double time;
	169	if (!m_last && out)
	170	{
	171	double vl = m_VL.Value();
	172	double time;
173	173
174		// FIXME : m_CV should be on a sub device ...
	174	// FIXME : m_CV should be on a sub device ...
175	175
176		// TI datasheet states minimum pulse of 10 us
177		if (vt<vl)
178		time = 10;
179		else
180		{
181		time = - log((m_VS.Value()-vt)/(m_VS.Value()-vl)) * m_R.Value() * m_C.Value() * 1.0e6; // in us
182		if (time < 10.0)
183		time = 10.0;
184		}
	176	// TI datasheet states minimum pulse of 10 us
	177	if (vt<vl)
	178	time = 10;
	179	else
	180	{
	181	time = - log((m_VS.Value()-vt)/(m_VS.Value()-vl)) * m_R.Value() * m_C.Value() * 1.0e6; // in us
	182	if (time < 10.0)
	183	time = 10.0;
	184	}
185	185
186		OUTANALOG(m_Q, m_VS.Value() * 0.7, NLTIME_FROM_NS(100));
187		OUTANALOG(m_THRESHOLD_OUT, m_VS.Value(), NLTIME_FROM_US(time ));
188		}
189		else if (m_last && !out)
190		{
191		OUTANALOG(m_Q, 0.25, NLTIME_FROM_NS(100));
192		OUTANALOG(m_THRESHOLD_OUT, 0.0, NLTIME_FROM_NS(1));
193		}
194		m_last = out;
	186	OUTANALOG(m_Q, m_VS.Value() * 0.7, NLTIME_FROM_NS(100));
	187	OUTANALOG(m_THRESHOLD_OUT, m_VS.Value(), NLTIME_FROM_US(time ));
	188	}
	189	else if (m_last && !out)
	190	{
	191	OUTANALOG(m_Q, 0.25, NLTIME_FROM_NS(100));
	192	OUTANALOG(m_THRESHOLD_OUT, 0.0, NLTIME_FROM_NS(1));
	193	}
	194	m_last = out;
195	195	}

trunk/src/emu/netlist/devices/nld_7483.c
r26736	r26737
7	7
8	8	NETLIB_START(7483)
9	9	{
10		m_lastr = 0;
	10	m_lastr = 0;
11	11
12		register_input("A1", m_A1);
13		register_input("A2", m_A2);
14		register_input("A3", m_A3);
15		register_input("A4", m_A4);
16		register_input("B1", m_B1);
17		register_input("B2", m_B2);
18		register_input("B3", m_B3);
19		register_input("B4", m_B4);
20		register_input("C0", m_C0);
	12	register_input("A1", m_A1);
	13	register_input("A2", m_A2);
	14	register_input("A3", m_A3);
	15	register_input("A4", m_A4);
	16	register_input("B1", m_B1);
	17	register_input("B2", m_B2);
	18	register_input("B3", m_B3);
	19	register_input("B4", m_B4);
	20	register_input("C0", m_C0);
21	21
22		register_output("SA", m_SA);
23		register_output("SB", m_SB);
24		register_output("SC", m_SC);
25		register_output("SD", m_SD);
26		register_output("C4", m_C4);
	22	register_output("SA", m_SA);
	23	register_output("SB", m_SB);
	24	register_output("SC", m_SC);
	25	register_output("SD", m_SD);
	26	register_output("C4", m_C4);
27	27
28		save(NAME(m_lastr));
	28	save(NAME(m_lastr));
29	29	}
30	30
31	31	NETLIB_UPDATE(7483)
32	32	{
33		UINT8 a = (INPLOGIC(m_A1) << 0) \| (INPLOGIC(m_A2) << 1) \| (INPLOGIC(m_A3) << 2) \| (INPLOGIC(m_A4) << 3);
34		UINT8 b = (INPLOGIC(m_B1) << 0) \| (INPLOGIC(m_B2) << 1) \| (INPLOGIC(m_B3) << 2) \| (INPLOGIC(m_B4) << 3);
	33	UINT8 a = (INPLOGIC(m_A1) << 0) \| (INPLOGIC(m_A2) << 1) \| (INPLOGIC(m_A3) << 2) \| (INPLOGIC(m_A4) << 3);
	34	UINT8 b = (INPLOGIC(m_B1) << 0) \| (INPLOGIC(m_B2) << 1) \| (INPLOGIC(m_B3) << 2) \| (INPLOGIC(m_B4) << 3);
35	35
36		UINT8 r = a + b + INPLOGIC(m_C0);
	36	UINT8 r = a + b + INPLOGIC(m_C0);
37	37
38		if (r != m_lastr)
39		{
40		m_lastr = r;
41		OUTLOGIC(m_SA, (r >> 0) & 1, NLTIME_FROM_NS(23));
42		OUTLOGIC(m_SB, (r >> 1) & 1, NLTIME_FROM_NS(23));
43		OUTLOGIC(m_SC, (r >> 2) & 1, NLTIME_FROM_NS(23));
44		OUTLOGIC(m_SD, (r >> 3) & 1, NLTIME_FROM_NS(23));
45		OUTLOGIC(m_C4, (r >> 4) & 1, NLTIME_FROM_NS(23));
46		}
	38	if (r != m_lastr)
	39	{
	40	m_lastr = r;
	41	OUTLOGIC(m_SA, (r >> 0) & 1, NLTIME_FROM_NS(23));
	42	OUTLOGIC(m_SB, (r >> 1) & 1, NLTIME_FROM_NS(23));
	43	OUTLOGIC(m_SC, (r >> 2) & 1, NLTIME_FROM_NS(23));
	44	OUTLOGIC(m_SD, (r >> 3) & 1, NLTIME_FROM_NS(23));
	45	OUTLOGIC(m_C4, (r >> 4) & 1, NLTIME_FROM_NS(23));
	46	}
47	47	}
48

trunk/src/emu/netlist/devices/nld_twoterm.h
r26736	r26737
40	40	// ----------------------------------------------------------------------------------------
41	41
42	42	#define NETDEV_R(_name, _R) \
43		NET_REGISTER_DEV(R, _name) \
44		NETDEV_PARAMI(_name, R, _R)
	43	NET_REGISTER_DEV(R, _name) \
	44	NETDEV_PARAMI(_name, R, _R)
45	45
46	46	#define NETDEV_POT(_name, _R) \
47		NET_REGISTER_DEV(POT, _name) \
48		NETDEV_PARAMI(_name, R, _R)
	47	NET_REGISTER_DEV(POT, _name) \
	48	NETDEV_PARAMI(_name, R, _R)
49	49
50	50
51	51	#define NETDEV_C(_name, _C) \
52		NET_REGISTER_DEV(C, _name) \
53		NETDEV_PARAMI(_name, C, _C)
	52	NET_REGISTER_DEV(C, _name) \
	53	NETDEV_PARAMI(_name, C, _C)
54	54
55	55	/* Generic Diode */
56	56	#define NETDEV_D(_name, _model) \
57		NET_REGISTER_DEV(D, _name) \
58		NETDEV_PARAMI(_name, model, # _model)
	57	NET_REGISTER_DEV(D, _name) \
	58	NETDEV_PARAMI(_name, model, # _model)
59	59
60	60	#define NETDEV_QPNP(_name, _model) \
61		NET_REGISTER_DEV(QPNP_switch, _name) \
62		NETDEV_PARAMI(_name, model, # _model)
	61	NET_REGISTER_DEV(QPNP_switch, _name) \
	62	NETDEV_PARAMI(_name, model, # _model)
63	63
64	64	#define NETDEV_QNPN(_name, _model) \
65		NET_REGISTER_DEV(QNPN_switch, _name) \
66		NETDEV_PARAMI(_name, model, # _model)
	65	NET_REGISTER_DEV(QNPN_switch, _name) \
	66	NETDEV_PARAMI(_name, model, # _model)
67	67
68	68	// ----------------------------------------------------------------------------------------
69	69	// Implementation
r26736	r26737
76	76	class NETLIB_NAME(twoterm) : public netlist_device_t
77	77	{
78	78	public:
79		ATTR_COLD NETLIB_NAME(twoterm)(const family_t afamily);
	79	ATTR_COLD NETLIB_NAME(twoterm)(const family_t afamily);
80	80
81		netlist_terminal_t m_P;
82		netlist_terminal_t m_N;
	81	netlist_terminal_t m_P;
	82	netlist_terminal_t m_N;
83	83
84		virtual NETLIB_UPDATE_TERMINALS()
85		{
86		}
	84	virtual NETLIB_UPDATE_TERMINALS()
	85	{
	86	}
87	87
88		ATTR_HOT inline void set(const double G, const double V, const double I)
89		{
90		m_P.m_go = m_N.m_go = m_P.m_gt = m_N.m_gt = G;
91		m_N.m_Idr = ( -V) * G + I;
92		m_P.m_Idr = ( V) * G - I;
93		}
	88	ATTR_HOT inline void set(const double G, const double V, const double I)
	89	{
	90	m_P.m_go = m_N.m_go = m_P.m_gt = m_N.m_gt = G;
	91	m_N.m_Idr = ( -V) * G + I;
	92	m_P.m_Idr = ( V) * G - I;
	93	}
94	94	protected:
95		ATTR_COLD virtual void start();
96		ATTR_HOT ATTR_ALIGN void update();
	95	ATTR_COLD virtual void start();
	96	ATTR_HOT ATTR_ALIGN void update();
97	97
98	98	private:
99	99	};
r26736	r26737
105	105	class NETLIB_NAME(R_base) : public NETLIB_NAME(twoterm)
106	106	{
107	107	public:
108		ATTR_COLD NETLIB_NAME(R_base)() : NETLIB_NAME(twoterm)(RESISTOR) { }
	108	ATTR_COLD NETLIB_NAME(R_base)() : NETLIB_NAME(twoterm)(RESISTOR) { }
109	109
110		inline void set_R(const double R) { set(1.0 / R, 0.0, 0.0); }
	110	inline void set_R(const double R) { set(1.0 / R, 0.0, 0.0); }
111	111
112	112	protected:
113		ATTR_COLD virtual void start();
114		ATTR_HOT ATTR_ALIGN void update();
	113	ATTR_COLD virtual void start();
	114	ATTR_HOT ATTR_ALIGN void update();
115	115	};
116	116
117	117	NETLIB_DEVICE_WITH_PARAMS_DERIVED(R, R_base,
118		netlist_param_double_t m_R;
	118	netlist_param_double_t m_R;
119	119	);
120	120
121	121	// ----------------------------------------------------------------------------------------
r26736	r26737
123	123	// ----------------------------------------------------------------------------------------
124	124
125	125	NETLIB_DEVICE_WITH_PARAMS(POT,
126		NETLIB_NAME(R_base) m_R1;
127		NETLIB_NAME(R_base) m_R2;
	126	NETLIB_NAME(R_base) m_R1;
	127	NETLIB_NAME(R_base) m_R2;
128	128
129		netlist_param_double_t m_R;
130		netlist_param_double_t m_Dial;
	129	netlist_param_double_t m_R;
	130	netlist_param_double_t m_Dial;
131	131	);
132	132
133	133
r26736	r26737
138	138	class NETLIB_NAME(C) : public NETLIB_NAME(twoterm)
139	139	{
140	140	public:
141		ATTR_COLD NETLIB_NAME(C)() : NETLIB_NAME(twoterm)(CAPACITOR) { }
	141	ATTR_COLD NETLIB_NAME(C)() : NETLIB_NAME(twoterm)(CAPACITOR) { }
142	142
143		ATTR_HOT void step_time(const double st)
144		{
145		double G = m_C.Value() / st;
146		double I = -G * (m_P.net().Q_Analog()- m_N.net().Q_Analog());
147		set(G, 0.0, I);
148		}
	143	ATTR_HOT void step_time(const double st)
	144	{
	145	double G = m_C.Value() / st;
	146	double I = -G * (m_P.net().Q_Analog()- m_N.net().Q_Analog());
	147	set(G, 0.0, I);
	148	}
149	149
150	150	protected:
151		ATTR_COLD virtual void start();
152		ATTR_COLD virtual void update_param();
153		ATTR_HOT ATTR_ALIGN void update();
	151	ATTR_COLD virtual void start();
	152	ATTR_COLD virtual void update_param();
	153	ATTR_HOT ATTR_ALIGN void update();
154	154
155		netlist_param_double_t m_C;
	155	netlist_param_double_t m_C;
156	156
157	157	};
158	158
r26736	r26737
167	167	#if 0
168	168	inline double fastexp_h(const double x)
169	169	{
170		static const double ln2r = 1.442695040888963387;
171		static const double ln2 = 0.693147180559945286;
172		//static const double c3 = 0.166666666666666667;
	170	static const double ln2r = 1.442695040888963387;
	171	static const double ln2 = 0.693147180559945286;
	172	//static const double c3 = 0.166666666666666667;
173	173
174		const double y = x * ln2r;
175		const unsigned int t = y;
176		const double z = (x - ln2 * (double) t);
177		const double zz = z * z;
178		//const double zzz = zz * z;
	174	const double y = x * ln2r;
	175	const unsigned int t = y;
	176	const double z = (x - ln2 * (double) t);
	177	const double zz = z * z;
	178	//const double zzz = zz * z;
179	179
180		return (double)(1 << t)(1.0 + z + 0.5 zz); // + c3*zzz;
	180	return (double)(1 << t)(1.0 + z + 0.5 zz); // + c3*zzz;
181	181	}
182	182
183	183	inline double fastexp(const double x)
184	184	{
185		if (x<0)
186		return 1.0 / fastexp_h(-x);
187		else
188		return fastexp_h(x);
	185	if (x<0)
	186	return 1.0 / fastexp_h(-x);
	187	else
	188	return fastexp_h(x);
189	189	}
190	190	#endif
191	191
192	192	class NETLIB_NAME(D) : public NETLIB_NAME(twoterm)
193	193	{
194	194	public:
195		ATTR_COLD NETLIB_NAME(D)() : NETLIB_NAME(twoterm)(DIODE) { }
	195	ATTR_COLD NETLIB_NAME(D)() : NETLIB_NAME(twoterm)(DIODE) { }
196	196
197		NETLIB_UPDATE_TERMINALS()
198		{
199		const double nVd = m_P.net().Q_Analog()- m_N.net().Q_Analog();
	197	NETLIB_UPDATE_TERMINALS()
	198	{
	199	const double nVd = m_P.net().Q_Analog()- m_N.net().Q_Analog();
200	200
201		//FIXME: Optimize cutoff case
	201	//FIXME: Optimize cutoff case
202	202
203		double Id;
204		double G;
	203	double Id;
	204	double G;
205	205
206		if (nVd < -5.0 * m_Vt)
207		{
208		m_Vd = nVd;
209		G = NETLIST_GMIN;
210		Id = - m_Is;
211		}
212		else if (nVd < m_Vcrit)
213		{
214		m_Vd = nVd;
	206	if (nVd < -5.0 * m_Vt)
	207	{
	208	m_Vd = nVd;
	209	G = NETLIST_GMIN;
	210	Id = - m_Is;
	211	}
	212	else if (nVd < m_Vcrit)
	213	{
	214	m_Vd = nVd;
215	215
216		const double eVDVt = exp(m_Vd * m_VtInv);
217		Id = m_Is * (eVDVt - 1.0);
218		G = m_Is * m_VtInv * eVDVt;
219		}
220		else
221		{
	216	const double eVDVt = exp(m_Vd * m_VtInv);
	217	Id = m_Is * (eVDVt - 1.0);
	218	G = m_Is * m_VtInv * eVDVt;
	219	}
	220	else
	221	{
222	222	#if defined(_MSC_VER) && _MSC_VER < 1800
223		m_Vd = m_Vd + log((nVd - m_Vd) * m_VtInv + 1.0) * m_Vt;
	223	m_Vd = m_Vd + log((nVd - m_Vd) * m_VtInv + 1.0) * m_Vt;
224	224	#else
225		m_Vd = m_Vd + log1p((nVd - m_Vd) * m_VtInv) * m_Vt;
	225	m_Vd = m_Vd + log1p((nVd - m_Vd) * m_VtInv) * m_Vt;
226	226	#endif
227		const double eVDVt = exp(m_Vd * m_VtInv);
228		Id = m_Is * (eVDVt - 1.0);
	227	const double eVDVt = exp(m_Vd * m_VtInv);
	228	Id = m_Is * (eVDVt - 1.0);
229	229
230		G = m_Is * m_VtInv * eVDVt;
231		}
	230	G = m_Is * m_VtInv * eVDVt;
	231	}
232	232
233		double I = (Id - m_Vd * G);
234		set(G, 0.0, I);
235		}
	233	double I = (Id - m_Vd * G);
	234	set(G, 0.0, I);
	235	}
236	236
237	237	protected:
238		ATTR_COLD virtual void start();
239		ATTR_COLD virtual void update_param();
240		ATTR_HOT ATTR_ALIGN void update();
	238	ATTR_COLD virtual void start();
	239	ATTR_COLD virtual void update_param();
	240	ATTR_HOT ATTR_ALIGN void update();
241	241
242		netlist_param_model_t m_model;
	242	netlist_param_model_t m_model;
243	243
244		double m_Vt;
245		double m_Is;
246		double m_n;
	244	double m_Vt;
	245	double m_Is;
	246	double m_n;
247	247
248		double m_VtInv;
249		double m_Vcrit;
250		double m_Vd;
	248	double m_VtInv;
	249	double m_Vcrit;
	250	double m_Vd;
251	251
252	252	};
253	253
r26736	r26737
269	269	class NETLIB_NAME(Q) : public netlist_device_t
270	270	{
271	271	public:
272		enum q_type {
273		BJT_NPN,
274		BJT_PNP
275		};
	272	enum q_type {
	273	BJT_NPN,
	274	BJT_PNP
	275	};
276	276
277		ATTR_COLD NETLIB_NAME(Q)(const q_type atype, const family_t afamily)
278		: netlist_device_t(afamily)
279		, m_qtype(atype) { }
	277	ATTR_COLD NETLIB_NAME(Q)(const q_type atype, const family_t afamily)
	278	: netlist_device_t(afamily)
	279	, m_qtype(atype) { }
280	280
281		inline q_type qtype() const { return m_qtype; }
282		inline bool is_qtype(q_type atype) const { return m_qtype == atype; }
	281	inline q_type qtype() const { return m_qtype; }
	282	inline bool is_qtype(q_type atype) const { return m_qtype == atype; }
283	283	protected:
284		ATTR_COLD virtual void start();
285		ATTR_HOT ATTR_ALIGN void update();
	284	ATTR_COLD virtual void start();
	285	ATTR_HOT ATTR_ALIGN void update();
286	286
287		netlist_param_model_t m_model;
	287	netlist_param_model_t m_model;
288	288	private:
289		q_type m_qtype;
	289	q_type m_qtype;
290	290	};
291	291
292	292	class NETLIB_NAME(QBJT) : public NETLIB_NAME(Q)
293	293	{
294	294	public:
295	295
296		ATTR_COLD NETLIB_NAME(QBJT)(const q_type atype, const family_t afamily)
297		: NETLIB_NAME(Q)(atype, afamily) { }
	296	ATTR_COLD NETLIB_NAME(QBJT)(const q_type atype, const family_t afamily)
	297	: NETLIB_NAME(Q)(atype, afamily) { }
298	298
299	299	protected:
300	300
r26736	r26737
306	306	class NETLIB_NAME(QBJT_switch) : public NETLIB_NAME(QBJT)
307	307	{
308	308	public:
309		ATTR_COLD NETLIB_NAME(QBJT_switch)()
310		: NETLIB_NAME(QBJT)(_type, BJT_SWITCH), m_gB(NETLIST_GMIN), m_gC(NETLIST_GMIN), m_V(0.0), m_state_on(0) { }
	309	ATTR_COLD NETLIB_NAME(QBJT_switch)()
	310	: NETLIB_NAME(QBJT)(_type, BJT_SWITCH), m_gB(NETLIST_GMIN), m_gC(NETLIST_GMIN), m_V(0.0), m_state_on(0) { }
311	311
312		NETLIB_UPDATEI()
313		{
314		double vE = INPANALOG(m_EV);
315		double vB = INPANALOG(m_BV);
	312	NETLIB_UPDATEI()
	313	{
	314	double vE = INPANALOG(m_EV);
	315	double vB = INPANALOG(m_BV);
316	316
317		int new_state = (vB - vE > m_V ) ? 1 : 0;
318		if (m_state_on ^ new_state)
319		{
320		double gb = m_gB;
321		double gc = m_gC;
322		double v = m_V;
323		if (!new_state )
324		{
325		// not conducting
326		gb = NETLIST_GMIN;
327		v = 0;
328		gc = NETLIST_GMIN;
329		}
330		m_RB.set(gb, v, 0.0);
331		m_RC.set(gc, 0.0, 0.0);
332		m_state_on = new_state;
333		m_RB.update_dev();
334		m_RC.update_dev();
335		}
	317	int new_state = (vB - vE > m_V ) ? 1 : 0;
	318	if (m_state_on ^ new_state)
	319	{
	320	double gb = m_gB;
	321	double gc = m_gC;
	322	double v = m_V;
	323	if (!new_state )
	324	{
	325	// not conducting
	326	gb = NETLIST_GMIN;
	327	v = 0;
	328	gc = NETLIST_GMIN;
	329	}
	330	m_RB.set(gb, v, 0.0);
	331	m_RC.set(gc, 0.0, 0.0);
	332	m_state_on = new_state;
	333	m_RB.update_dev();
	334	m_RC.update_dev();
	335	}
336	336
337		}
	337	}
338	338
339		NETLIB_NAME(R) m_RB;
340		NETLIB_NAME(R) m_RC;
	339	NETLIB_NAME(R) m_RB;
	340	NETLIB_NAME(R) m_RC;
341	341
342		netlist_analog_input_t m_BV;
343		netlist_analog_input_t m_EV;
	342	netlist_analog_input_t m_BV;
	343	netlist_analog_input_t m_EV;
344	344
345	345	protected:
346	346
347		ATTR_COLD virtual void start();
348		ATTR_COLD void update_param();
	347	ATTR_COLD virtual void start();
	348	ATTR_COLD void update_param();
349	349
350		double m_gB; // base conductance / switch on
351		double m_gC; // collector conductance / switch on
352		double m_V; // internal voltage source
353		UINT8 m_state_on;
	350	double m_gB; // base conductance / switch on
	351	double m_gC; // collector conductance / switch on
	352	double m_V; // internal voltage source
	353	UINT8 m_state_on;
354	354
355	355	private:
356	356	};
r26736	r26737
380	380	*/
381	381
382	382	#define NETDEV_VCCS(_name) \
383		NET_REGISTER_DEV(VCCS, _name) \
384
	383	NET_REGISTER_DEV(VCCS, _name)
385	384	//NETDEV_PARAMI(_name, model, _model)
386	385
387	386	class NETLIB_NAME(VCCS) : public netlist_device_t
388	387	{
389	388	public:
390		ATTR_COLD NETLIB_NAME(VCCS)()
391		: netlist_device_t(VCCS) { }
392		ATTR_COLD NETLIB_NAME(VCCS)(const family_t afamily)
393		: netlist_device_t(afamily) { }
	389	ATTR_COLD NETLIB_NAME(VCCS)()
	390	: netlist_device_t(VCCS) { }
	391	ATTR_COLD NETLIB_NAME(VCCS)(const family_t afamily)
	392	: netlist_device_t(afamily) { }
394	393
395	394	protected:
396		ATTR_COLD virtual void start();
397		ATTR_COLD virtual void update_param();
398		ATTR_HOT ATTR_ALIGN void update();
	395	ATTR_COLD virtual void start();
	396	ATTR_COLD virtual void update_param();
	397	ATTR_HOT ATTR_ALIGN void update();
399	398
400		ATTR_COLD void configure(const double Gfac, const double GI);
	399	ATTR_COLD void configure(const double Gfac, const double GI);
401	400
402		netlist_terminal_t m_OP;
403		netlist_terminal_t m_ON;
	401	netlist_terminal_t m_OP;
	402	netlist_terminal_t m_ON;
404	403
405		netlist_terminal_t m_IP;
406		netlist_terminal_t m_IN;
	404	netlist_terminal_t m_IP;
	405	netlist_terminal_t m_IN;
407	406
408		netlist_terminal_t m_OP1;
409		netlist_terminal_t m_ON1;
	407	netlist_terminal_t m_OP1;
	408	netlist_terminal_t m_ON1;
410	409
411		netlist_param_double_t m_G;
	410	netlist_param_double_t m_G;
412	411	};
413	412
414	413	// ----------------------------------------------------------------------------------------
r26736	r26737
439	438	*/
440	439
441	440	#define NETDEV_VCVS(_name) \
442		NET_REGISTER_DEV(VCVS, _name) \
443
	441	NET_REGISTER_DEV(VCVS, _name)
444	442	//NETDEV_PARAMI(_name, model, _model)
445	443
446	444
447	445	class NETLIB_NAME(VCVS) : public NETLIB_NAME(VCCS)
448	446	{
449	447	public:
450		ATTR_COLD NETLIB_NAME(VCVS)()
451		: NETLIB_NAME(VCCS)(VCVS) { }
	448	ATTR_COLD NETLIB_NAME(VCVS)()
	449	: NETLIB_NAME(VCCS)(VCVS) { }
452	450
453	451	protected:
454		ATTR_COLD virtual void start();
455		ATTR_COLD virtual void update_param();
456		//ATTR_HOT ATTR_ALIGN void update();
	452	ATTR_COLD virtual void start();
	453	ATTR_COLD virtual void update_param();
	454	//ATTR_HOT ATTR_ALIGN void update();
457	455
458		netlist_terminal_t m_OP2;
459		netlist_terminal_t m_ON2;
	456	netlist_terminal_t m_OP2;
	457	netlist_terminal_t m_ON2;
460	458
461		double m_mult;
	459	double m_mult;
462	460
463		netlist_param_double_t m_RO;
	461	netlist_param_double_t m_RO;
464	462	};
465	463
466	464

trunk/src/emu/netlist/devices/nld_ne555.h
r26736	r26737
23	23	#include "nld_twoterm.h"
24	24
25	25	#define NETDEV_NE555(_name) \
26		NET_REGISTER_DEV(NE555, _name) \
27
	26	NET_REGISTER_DEV(NE555, _name)
28	27	NETLIB_DEVICE(NE555,
29		NETLIB_NAME(R) m_R1;
30		NETLIB_NAME(R) m_R2;
31		NETLIB_NAME(R) m_R3;
32		NETLIB_NAME(R) m_RDIS;
	28	NETLIB_NAME(R) m_R1;
	29	NETLIB_NAME(R) m_R2;
	30	NETLIB_NAME(R) m_R3;
	31	NETLIB_NAME(R) m_RDIS;
33	32
34		netlist_logic_input_t m_RESET;
35		netlist_analog_input_t m_THRES;
36		netlist_analog_input_t m_TRIG;
37		netlist_analog_output_t m_OUT;
	33	netlist_logic_input_t m_RESET;
	34	netlist_analog_input_t m_THRES;
	35	netlist_analog_input_t m_TRIG;
	36	netlist_analog_output_t m_OUT;
38	37
39		bool m_last_out;
	38	bool m_last_out;
40	39
41		double clamp(const double v, const double a, const double b);
	40	double clamp(const double v, const double a, const double b);
42	41
43	42	);
44	43

trunk/src/emu/netlist/devices/nld_7425.h
r26736	r26737
39	39	#include "nld_signal.h"
40	40
41	41	#define TTL_7425_NOR(_name, _I1, _I2, _I3, _I4) \
42		NET_REGISTER_DEV(7425, _name) \
43		NET_CONNECT(_name, A, _I1) \
44		NET_CONNECT(_name, B, _I2) \
45		NET_CONNECT(_name, C, _I3) \
46		NET_CONNECT(_name, D, _I4)
	42	NET_REGISTER_DEV(7425, _name) \
	43	NET_CONNECT(_name, A, _I1) \
	44	NET_CONNECT(_name, B, _I2) \
	45	NET_CONNECT(_name, C, _I3) \
	46	NET_CONNECT(_name, D, _I4)
47	47
48	48
49	49	NETLIB_SIGNAL(7425, 4, 1, 0);

trunk/src/emu/netlist/devices/nld_7486.c
r26736	r26737
7	7
8	8	NETLIB_START(7486)
9	9	{
10		register_input("A", m_A);
11		register_input("B", m_B);
12		register_output("Q", m_Q);
	10	register_input("A", m_A);
	11	register_input("B", m_B);
	12	register_output("Q", m_Q);
13	13	}
14	14
15	15	NETLIB_UPDATE(7486)
16	16	{
17		static const netlist_time delay[2] = { NLTIME_FROM_NS(15), NLTIME_FROM_NS(22) };
18		UINT8 t = INPLOGIC(m_A) ^ INPLOGIC(m_B);
19		OUTLOGIC(m_Q, t, delay[t]);
	17	static const netlist_time delay[2] = { NLTIME_FROM_NS(15), NLTIME_FROM_NS(22) };
	18	UINT8 t = INPLOGIC(m_A) ^ INPLOGIC(m_B);
	19	OUTLOGIC(m_Q, t, delay[t]);
20	20	}
21

trunk/src/emu/netlist/devices/nld_7427.h
r26736	r26737
35	35	#include "nld_signal.h"
36	36
37	37	#define TTL_7427_NOR(_name, _I1, _I2, _I3) \
38		NET_REGISTER_DEV(7427, _name) \
39		NET_CONNECT(_name, A, _I1) \
40		NET_CONNECT(_name, B, _I2) \
41		NET_CONNECT(_name, C, _I3)
	38	NET_REGISTER_DEV(7427, _name) \
	39	NET_CONNECT(_name, A, _I1) \
	40	NET_CONNECT(_name, B, _I2) \
	41	NET_CONNECT(_name, C, _I3)
42	42
43	43	NETLIB_SIGNAL(7427, 3, 1, 0);
44	44

trunk/src/emu/netlist/devices/nld_legacy.h
r26736	r26737
20	20	// ----------------------------------------------------------------------------------------
21	21
22	22	#define NETDEV_RSFF(_name, _S, _R) \
23		NET_REGISTER_DEV(nicRSFF, _name) \
24		NET_CONNECT(_name, S, _S) \
25		NET_CONNECT(_name, R, _R)
	23	NET_REGISTER_DEV(nicRSFF, _name) \
	24	NET_CONNECT(_name, S, _S) \
	25	NET_CONNECT(_name, R, _R)
26	26
27	27
28	28	#define NE555N_MSTABLE(_name, _TRIG, _CV) \
29		NET_REGISTER_DEV(nicNE555N_MSTABLE, _name) \
30		NET_CONNECT(_name, TRIG, _TRIG) \
31		NET_CONNECT(_name, CV, _CV)
	29	NET_REGISTER_DEV(nicNE555N_MSTABLE, _name) \
	30	NET_CONNECT(_name, TRIG, _TRIG) \
	31	NET_CONNECT(_name, CV, _CV)
32	32
33	33	#define NETDEV_MIXER3(_name, _I1, _I2, _I3) \
34		NET_REGISTER_DEV(nicMixer8, _name) \
35		NET_CONNECT(_name, I1, _I1) \
36		NET_CONNECT(_name, I2, _I2) \
37		NET_CONNECT(_name, I3, _I3)
	34	NET_REGISTER_DEV(nicMixer8, _name) \
	35	NET_CONNECT(_name, I1, _I1) \
	36	NET_CONNECT(_name, I2, _I2) \
	37	NET_CONNECT(_name, I3, _I3)
38	38
39	39	#define NETDEV_SWITCH2(_name, _i1, _i2) \
40		NET_REGISTER_DEV(nicMultiSwitch, _name) \
41		NET_CONNECT(_name, i1, _i1) \
42		NET_CONNECT(_name, i2, _i2)
	40	NET_REGISTER_DEV(nicMultiSwitch, _name) \
	41	NET_CONNECT(_name, i1, _i1) \
	42	NET_CONNECT(_name, i2, _i2)
43	43
44	44	// ----------------------------------------------------------------------------------------
45	45	// Devices ...
46	46	// ----------------------------------------------------------------------------------------
47	47
48	48	NETLIB_DEVICE(nicRSFF,
49		netlist_ttl_input_t m_S;
50		netlist_ttl_input_t m_R;
	49	netlist_ttl_input_t m_S;
	50	netlist_ttl_input_t m_R;
51	51
52		netlist_ttl_output_t m_Q;
53		netlist_ttl_output_t m_QQ;
	52	netlist_ttl_output_t m_Q;
	53	netlist_ttl_output_t m_QQ;
54	54	);
55	55
56	56	NETLIB_DEVICE_WITH_PARAMS(nicMixer8,
57		netlist_analog_input_t m_I[8];
	57	netlist_analog_input_t m_I[8];
58	58
59		netlist_analog_output_t m_Q;
60		netlist_analog_output_t m_low;
	59	netlist_analog_output_t m_Q;
	60	netlist_analog_output_t m_low;
61	61
62		netlist_param_double_t m_R[8];
	62	netlist_param_double_t m_R[8];
63	63
64		double m_w[8];
	64	double m_w[8];
65	65	);
66	66
67	67	NETLIB_DEVICE_WITH_PARAMS(nicNE555N_MSTABLE,
68	68
69		//ATTR_HOT void timer_cb(INT32 timer_id);
	69	//ATTR_HOT void timer_cb(INT32 timer_id);
70	70
71		netlist_analog_input_t m_trigger;
72		netlist_analog_input_t m_CV;
73		netlist_analog_input_t m_THRESHOLD; /* internal */
	71	netlist_analog_input_t m_trigger;
	72	netlist_analog_input_t m_CV;
	73	netlist_analog_input_t m_THRESHOLD; /* internal */
74	74
75		bool m_last;
	75	bool m_last;
76	76
77		netlist_analog_output_t m_Q;
78		netlist_analog_output_t m_THRESHOLD_OUT; /* internal */
	77	netlist_analog_output_t m_Q;
	78	netlist_analog_output_t m_THRESHOLD_OUT; /* internal */
79	79
80		//netlist_base_timer_t *m_timer;
81		netlist_param_double_t m_R;
82		netlist_param_double_t m_C;
83		netlist_param_double_t m_VS;
84		netlist_param_double_t m_VL;
	80	//netlist_base_timer_t *m_timer;
	81	netlist_param_double_t m_R;
	82	netlist_param_double_t m_C;
	83	netlist_param_double_t m_VS;
	84	netlist_param_double_t m_VL;
85	85
86		double nicNE555N_cv();
87		double nicNE555N_clamp(const double v, const double a, const double b);
	86	double nicNE555N_cv();
	87	double nicNE555N_clamp(const double v, const double a, const double b);
88	88
89	89	);
90	90
91	91	NETLIB_DEVICE_WITH_PARAMS(nicMultiSwitch,
92		netlist_analog_input_t m_I[8];
	92	netlist_analog_input_t m_I[8];
93	93
94		netlist_analog_output_t m_Q;
95		netlist_analog_output_t m_low;
	94	netlist_analog_output_t m_Q;
	95	netlist_analog_output_t m_low;
96	96
97		netlist_param_int_t m_POS;
	97	netlist_param_int_t m_POS;
98	98
99		int m_position;
	99	int m_position;
100	100	);
101	101
102	102

trunk/src/emu/netlist/devices/nld_7483.h
r26736	r26737
7	7	*
8	8	* +--------------+
9	9	* A4 \|1 ++ 16\| B4
10		* Ʃ3 \|2 15\| Ʃ3
	10	* ??3 \|2 15\| ??3
11	11	* A3 \|3 14\| C4
12	12	* B3 \|4 7483 13\| C0
13	13	* VCC \|5 12\| GND
14		* Ʃ3 \|6 11\| B1
	14	* ??3 \|6 11\| B1
15	15	* B2 \|7 10\| A1
16		* A2 \|8 9\| Ʃ3
	16	* A2 \|8 9\| ??3
17	17	* +--------------+
18	18	*
19		* Ʃ = (A + B + C) & 0x0f
	19	* ?? = (A + B + C) & 0x0f
20	20	*
21	21	* C4 = (A + B + C) > 15 ? 1 : 0
22	22	*
r26736	r26737
30	30	#include "../nl_base.h"
31	31
32	32	#define TTL_7483(_name, _A1, _A2, _A3, _A4, _B1, _B2, _B3, _B4, _CI) \
33		NET_REGISTER_DEV(7483, _name) \
34		NET_CONNECT(_name, A1, _A1) \
35		NET_CONNECT(_name, A2, _A2) \
36		NET_CONNECT(_name, A3, _A3) \
37		NET_CONNECT(_name, A4, _A4) \
38		NET_CONNECT(_name, B1, _B1) \
39		NET_CONNECT(_name, B2, _B2) \
40		NET_CONNECT(_name, B3, _B3) \
41		NET_CONNECT(_name, B4, _B4) \
42		NET_CONNECT(_name, C0, _CI)
	33	NET_REGISTER_DEV(7483, _name) \
	34	NET_CONNECT(_name, A1, _A1) \
	35	NET_CONNECT(_name, A2, _A2) \
	36	NET_CONNECT(_name, A3, _A3) \
	37	NET_CONNECT(_name, A4, _A4) \
	38	NET_CONNECT(_name, B1, _B1) \
	39	NET_CONNECT(_name, B2, _B2) \
	40	NET_CONNECT(_name, B3, _B3) \
	41	NET_CONNECT(_name, B4, _B4) \
	42	NET_CONNECT(_name, C0, _CI)
43	43
44	44	NETLIB_DEVICE(7483,
45		netlist_ttl_input_t m_C0;
46		netlist_ttl_input_t m_A1;
47		netlist_ttl_input_t m_A2;
48		netlist_ttl_input_t m_A3;
49		netlist_ttl_input_t m_A4;
50		netlist_ttl_input_t m_B1;
51		netlist_ttl_input_t m_B2;
52		netlist_ttl_input_t m_B3;
53		netlist_ttl_input_t m_B4;
	45	netlist_ttl_input_t m_C0;
	46	netlist_ttl_input_t m_A1;
	47	netlist_ttl_input_t m_A2;
	48	netlist_ttl_input_t m_A3;
	49	netlist_ttl_input_t m_A4;
	50	netlist_ttl_input_t m_B1;
	51	netlist_ttl_input_t m_B2;
	52	netlist_ttl_input_t m_B3;
	53	netlist_ttl_input_t m_B4;
54	54
55		UINT8 m_lastr;
	55	UINT8 m_lastr;
56	56
57		netlist_ttl_output_t m_SA;
58		netlist_ttl_output_t m_SB;
59		netlist_ttl_output_t m_SC;
60		netlist_ttl_output_t m_SD;
61		netlist_ttl_output_t m_C4;
	57	netlist_ttl_output_t m_SA;
	58	netlist_ttl_output_t m_SB;
	59	netlist_ttl_output_t m_SC;
	60	netlist_ttl_output_t m_SD;
	61	netlist_ttl_output_t m_C4;
62	62
63	63	);
64	64

trunk/src/emu/netlist/devices/nld_7486.h
r26736	r26737
35	35	#include "nld_signal.h"
36	36
37	37	#define TTL_7486_XOR(_name, _A, _B) \
38		NET_REGISTER_DEV(7486, _name) \
39		NET_CONNECT(_name, A, _A) \
40		NET_CONNECT(_name, B, _B)
	38	NET_REGISTER_DEV(7486, _name) \
	39	NET_CONNECT(_name, A, _A) \
	40	NET_CONNECT(_name, B, _B)
41	41
42	42	NETLIB_DEVICE(7486,
43		netlist_ttl_input_t m_A;
44		netlist_ttl_input_t m_B;
45		netlist_ttl_output_t m_Q;
	43	netlist_ttl_input_t m_A;
	44	netlist_ttl_input_t m_B;
	45	netlist_ttl_output_t m_Q;
46	46	);
47	47	#endif /* NLD_7486_H_ */

trunk/src/emu/netlist/devices/net_lib.c
r26736	r26737
53	53
54	54	NETLIB_START(nic7448)
55	55	{
56		register_sub(sub, "sub");
	56	register_sub(sub, "sub");
57	57
58		register_subalias("A0", sub.m_A0);
59		register_subalias("A1", sub.m_A1);
60		register_subalias("A2", sub.m_A2);
61		register_subalias("A3", sub.m_A3);
62		register_input("LTQ", m_LTQ);
63		register_input("BIQ", m_BIQ);
64		register_subalias("RBIQ",sub.m_RBIQ);
	58	register_subalias("A0", sub.m_A0);
	59	register_subalias("A1", sub.m_A1);
	60	register_subalias("A2", sub.m_A2);
	61	register_subalias("A3", sub.m_A3);
	62	register_input("LTQ", m_LTQ);
	63	register_input("BIQ", m_BIQ);
	64	register_subalias("RBIQ",sub.m_RBIQ);
65	65
66		register_subalias("a", sub.m_a);
67		register_subalias("b", sub.m_b);
68		register_subalias("c", sub.m_c);
69		register_subalias("d", sub.m_d);
70		register_subalias("e", sub.m_e);
71		register_subalias("f", sub.m_f);
72		register_subalias("g", sub.m_g);
	66	register_subalias("a", sub.m_a);
	67	register_subalias("b", sub.m_b);
	68	register_subalias("c", sub.m_c);
	69	register_subalias("d", sub.m_d);
	70	register_subalias("e", sub.m_e);
	71	register_subalias("f", sub.m_f);
	72	register_subalias("g", sub.m_g);
73	73	}
74	74
75	75	NETLIB_UPDATE(nic7448)
76	76	{
77		if (INPLOGIC(m_BIQ) && !INPLOGIC(m_LTQ))
78		{
79		sub.update_outputs(8);
80		}
81		else if (!INPLOGIC(m_BIQ))
82		{
83		sub.update_outputs(15);
84		}
	77	if (INPLOGIC(m_BIQ) && !INPLOGIC(m_LTQ))
	78	{
	79	sub.update_outputs(8);
	80	}
	81	else if (!INPLOGIC(m_BIQ))
	82	{
	83	sub.update_outputs(15);
	84	}
85	85
86		if (!INPLOGIC(m_BIQ) \|\| (INPLOGIC(m_BIQ) && !INPLOGIC(m_LTQ)))
87		{
88		sub.m_A0.inactivate();
89		sub.m_A1.inactivate();
90		sub.m_A2.inactivate();
91		sub.m_A3.inactivate();
92		sub.m_RBIQ.inactivate();
93		} else {
94		sub.m_RBIQ.activate();
95		sub.m_A3.activate();
96		sub.m_A2.activate();
97		sub.m_A1.activate();
98		sub.m_A0.activate();
99		sub.update();
100		}
	86	if (!INPLOGIC(m_BIQ) \|\| (INPLOGIC(m_BIQ) && !INPLOGIC(m_LTQ)))
	87	{
	88	sub.m_A0.inactivate();
	89	sub.m_A1.inactivate();
	90	sub.m_A2.inactivate();
	91	sub.m_A3.inactivate();
	92	sub.m_RBIQ.inactivate();
	93	} else {
	94	sub.m_RBIQ.activate();
	95	sub.m_A3.activate();
	96	sub.m_A2.activate();
	97	sub.m_A1.activate();
	98	sub.m_A0.activate();
	99	sub.update();
	100	}
101	101
102	102	}
103	103
104	104	NETLIB_START(nic7448_sub)
105	105	{
106		m_state = 0;
	106	m_state = 0;
107	107
108		register_input("A0", m_A0);
109		register_input("A1", m_A1);
110		register_input("A2", m_A2);
111		register_input("A3", m_A3);
112		register_input("RBIQ", m_RBIQ);
	108	register_input("A0", m_A0);
	109	register_input("A1", m_A1);
	110	register_input("A2", m_A2);
	111	register_input("A3", m_A3);
	112	register_input("RBIQ", m_RBIQ);
113	113
114		register_output("a", m_a);
115		register_output("b", m_b);
116		register_output("c", m_c);
117		register_output("d", m_d);
118		register_output("e", m_e);
119		register_output("f", m_f);
120		register_output("g", m_g);
	114	register_output("a", m_a);
	115	register_output("b", m_b);
	116	register_output("c", m_c);
	117	register_output("d", m_d);
	118	register_output("e", m_e);
	119	register_output("f", m_f);
	120	register_output("g", m_g);
121	121
122		save(NAME(m_state));
	122	save(NAME(m_state));
123	123	}
124	124
125	125	NETLIB_UPDATE(nic7448_sub)
126	126	{
127		UINT8 v;
	127	UINT8 v;
128	128
129		v = (INPLOGIC(m_A0) << 0) \| (INPLOGIC(m_A1) << 1) \| (INPLOGIC(m_A2) << 2) \| (INPLOGIC(m_A3) << 3);
130		if ((!INPLOGIC(m_RBIQ) && (v==0)))
131		v = 15;
132		update_outputs(v);
	129	v = (INPLOGIC(m_A0) << 0) \| (INPLOGIC(m_A1) << 1) \| (INPLOGIC(m_A2) << 2) \| (INPLOGIC(m_A3) << 3);
	130	if ((!INPLOGIC(m_RBIQ) && (v==0)))
	131	v = 15;
	132	update_outputs(v);
133	133	}
134	134
135	135	NETLIB_FUNC_VOID(nic7448_sub, update_outputs, (UINT8 v))
136	136	{
137		assert(v<16);
138		if (v != m_state)
139		{
140		OUTLOGIC(m_a, tab7448[v][0], NLTIME_FROM_NS(100));
141		OUTLOGIC(m_b, tab7448[v][1], NLTIME_FROM_NS(100));
142		OUTLOGIC(m_c, tab7448[v][2], NLTIME_FROM_NS(100));
143		OUTLOGIC(m_d, tab7448[v][3], NLTIME_FROM_NS(100));
144		OUTLOGIC(m_e, tab7448[v][4], NLTIME_FROM_NS(100));
145		OUTLOGIC(m_f, tab7448[v][5], NLTIME_FROM_NS(100));
146		OUTLOGIC(m_g, tab7448[v][6], NLTIME_FROM_NS(100));
147		m_state = v;
148		}
	137	assert(v<16);
	138	if (v != m_state)
	139	{
	140	OUTLOGIC(m_a, tab7448[v][0], NLTIME_FROM_NS(100));
	141	OUTLOGIC(m_b, tab7448[v][1], NLTIME_FROM_NS(100));
	142	OUTLOGIC(m_c, tab7448[v][2], NLTIME_FROM_NS(100));
	143	OUTLOGIC(m_d, tab7448[v][3], NLTIME_FROM_NS(100));
	144	OUTLOGIC(m_e, tab7448[v][4], NLTIME_FROM_NS(100));
	145	OUTLOGIC(m_f, tab7448[v][5], NLTIME_FROM_NS(100));
	146	OUTLOGIC(m_g, tab7448[v][6], NLTIME_FROM_NS(100));
	147	m_state = v;
	148	}
149	149	}
150	150
151	151	const UINT8 NETLIB_NAME(nic7448_sub)::tab7448[16][7] =
152	152	{
153		{ 1, 1, 1, 1, 1, 1, 0 }, /* 00 - not blanked ! */
154		{ 0, 1, 1, 0, 0, 0, 0 }, /* 01 */
155		{ 1, 1, 0, 1, 1, 0, 1 }, /* 02 */
156		{ 1, 1, 1, 1, 0, 0, 1 }, /* 03 */
157		{ 0, 1, 1, 0, 0, 1, 1 }, /* 04 */
158		{ 1, 0, 1, 1, 0, 1, 1 }, /* 05 */
159		{ 0, 0, 1, 1, 1, 1, 1 }, /* 06 */
160		{ 1, 1, 1, 0, 0, 0, 0 }, /* 07 */
161		{ 1, 1, 1, 1, 1, 1, 1 }, /* 08 */
162		{ 1, 1, 1, 0, 0, 1, 1 }, /* 09 */
163		{ 0, 0, 0, 1, 1, 0, 1 }, /* 10 */
164		{ 0, 0, 1, 1, 0, 0, 1 }, /* 11 */
165		{ 0, 1, 0, 0, 0, 1, 1 }, /* 12 */
166		{ 1, 0, 0, 1, 0, 1, 1 }, /* 13 */
167		{ 0, 0, 0, 1, 1, 1, 1 }, /* 14 */
168		{ 0, 0, 0, 0, 0, 0, 0 }, /* 15 */
	153	{ 1, 1, 1, 1, 1, 1, 0 }, /* 00 - not blanked ! */
	154	{ 0, 1, 1, 0, 0, 0, 0 }, /* 01 */
	155	{ 1, 1, 0, 1, 1, 0, 1 }, /* 02 */
	156	{ 1, 1, 1, 1, 0, 0, 1 }, /* 03 */
	157	{ 0, 1, 1, 0, 0, 1, 1 }, /* 04 */
	158	{ 1, 0, 1, 1, 0, 1, 1 }, /* 05 */
	159	{ 0, 0, 1, 1, 1, 1, 1 }, /* 06 */
	160	{ 1, 1, 1, 0, 0, 0, 0 }, /* 07 */
	161	{ 1, 1, 1, 1, 1, 1, 1 }, /* 08 */
	162	{ 1, 1, 1, 0, 0, 1, 1 }, /* 09 */
	163	{ 0, 0, 0, 1, 1, 0, 1 }, /* 10 */
	164	{ 0, 0, 1, 1, 0, 0, 1 }, /* 11 */
	165	{ 0, 1, 0, 0, 0, 1, 1 }, /* 12 */
	166	{ 1, 0, 0, 1, 0, 1, 1 }, /* 13 */
	167	{ 0, 0, 0, 1, 1, 1, 1 }, /* 14 */
	168	{ 0, 0, 0, 0, 0, 0, 0 }, /* 15 */
169	169	};
170	170
171	171	NETLIB_START(nic7450)
172	172	{
173		register_input("I1", m_I0);
174		register_input("I2", m_I1);
175		register_input("I3", m_I2);
176		register_input("I4", m_I3);
177		register_output("Q", m_Q);
	173	register_input("I1", m_I0);
	174	register_input("I2", m_I1);
	175	register_input("I3", m_I2);
	176	register_input("I4", m_I3);
	177	register_output("Q", m_Q);
178	178	}
179	179
180	180	NETLIB_UPDATE(nic7450)
181	181	{
182		m_I0.activate();
183		m_I1.activate();
184		m_I2.activate();
185		m_I3.activate();
186		UINT8 t1 = INPLOGIC(m_I0) & INPLOGIC(m_I1);
187		UINT8 t2 = INPLOGIC(m_I2) & INPLOGIC(m_I3);
	182	m_I0.activate();
	183	m_I1.activate();
	184	m_I2.activate();
	185	m_I3.activate();
	186	UINT8 t1 = INPLOGIC(m_I0) & INPLOGIC(m_I1);
	187	UINT8 t2 = INPLOGIC(m_I2) & INPLOGIC(m_I3);
188	188	#if 0
189		UINT8 t = (t1 \| t2) ^ 1;
190		OUTLOGIC(m_Q, t, t ? NLTIME_FROM_NS(22) : NLTIME_FROM_NS(15));
	189	UINT8 t = (t1 \| t2) ^ 1;
	190	OUTLOGIC(m_Q, t, t ? NLTIME_FROM_NS(22) : NLTIME_FROM_NS(15));
191	191	#else
192		const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
	192	const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
193	193
194		UINT8 res = 0;
195		if (t1 ^ 1)
196		{
197		if (t2 ^ 1)
198		{
199		res = 1;
200		}
201		else
202		{
203		m_I0.inactivate();
204		m_I1.inactivate();
205		}
206		} else {
207		if (t2 ^ 1)
208		{
209		m_I2.inactivate();
210		m_I3.inactivate();
211		}
212		}
213		OUTLOGIC(m_Q, res, times[1 - res]);// ? 22000 : 15000);
	194	UINT8 res = 0;
	195	if (t1 ^ 1)
	196	{
	197	if (t2 ^ 1)
	198	{
	199	res = 1;
	200	}
	201	else
	202	{
	203	m_I0.inactivate();
	204	m_I1.inactivate();
	205	}
	206	} else {
	207	if (t2 ^ 1)
	208	{
	209	m_I2.inactivate();
	210	m_I3.inactivate();
	211	}
	212	}
	213	OUTLOGIC(m_Q, res, times[1 - res]);// ? 22000 : 15000);
214	214
215	215	#endif
216	216	}
r26736	r26737
221	221
222	222	NETLIB_START(nic74107Asub)
223	223	{
224		register_input("CLK", m_clk, netlist_input_t::STATE_INP_HL);
225		register_output("Q", m_Q);
226		register_output("QQ", m_QQ);
	224	register_input("CLK", m_clk, netlist_input_t::STATE_INP_HL);
	225	register_output("Q", m_Q);
	226	register_output("QQ", m_QQ);
227	227
228		m_Q.initial(0);
229		m_QQ.initial(1);
	228	m_Q.initial(0);
	229	m_QQ.initial(1);
230	230
231		save(NAME(m_Q1));
232		save(NAME(m_Q2));
233		save(NAME(m_F));
	231	save(NAME(m_Q1));
	232	save(NAME(m_Q2));
	233	save(NAME(m_F));
234	234	}
235	235
236	236	NETLIB_START(nic74107A)
237	237	{
238		register_sub(sub, "sub");
	238	register_sub(sub, "sub");
239	239
240		register_subalias("CLK", sub.m_clk);
241		register_input("J", m_J);
242		register_input("K", m_K);
243		register_input("CLRQ", m_clrQ);
244		register_subalias("Q", sub.m_Q);
245		register_subalias("QQ", sub.m_QQ);
	240	register_subalias("CLK", sub.m_clk);
	241	register_input("J", m_J);
	242	register_input("K", m_K);
	243	register_input("CLRQ", m_clrQ);
	244	register_subalias("Q", sub.m_Q);
	245	register_subalias("QQ", sub.m_QQ);
246	246
247		sub.m_Q.initial(0);
248		sub.m_QQ.initial(1);
	247	sub.m_Q.initial(0);
	248	sub.m_QQ.initial(1);
249	249	}
250	250
251	251	ATTR_HOT inline void NETLIB_NAME(nic74107Asub)::newstate(const netlist_sig_t state)
252	252	{
253		const netlist_time delay[2] = { NLTIME_FROM_NS(40), NLTIME_FROM_NS(25) };
	253	const netlist_time delay[2] = { NLTIME_FROM_NS(40), NLTIME_FROM_NS(25) };
254	254	#if 1
255		OUTLOGIC(m_Q, state, delay[state ^ 1]);
256		OUTLOGIC(m_QQ, state ^ 1, delay[state]);
	255	OUTLOGIC(m_Q, state, delay[state ^ 1]);
	256	OUTLOGIC(m_QQ, state ^ 1, delay[state]);
257	257	#else
258		if (state != Q.new_Q())
259		{
260		Q.setToNoCheck(state, delay[1-state]);
261		QQ.setToNoCheck(1-state, delay[state]);
262		}
	258	if (state != Q.new_Q())
	259	{
	260	Q.setToNoCheck(state, delay[1-state]);
	261	QQ.setToNoCheck(1-state, delay[state]);
	262	}
263	263	#endif
264	264	}
265	265
266	266	NETLIB_UPDATE(nic74107Asub)
267	267	{
268		{
269		const netlist_sig_t t = m_Q.net().new_Q();
270		newstate((!t & m_Q1) \| (t & m_Q2) \| m_F);
271		if (!m_Q1)
272		m_clk.inactivate();
273		}
	268	{
	269	const netlist_sig_t t = m_Q.net().new_Q();
	270	newstate((!t & m_Q1) \| (t & m_Q2) \| m_F);
	271	if (!m_Q1)
	272	m_clk.inactivate();
	273	}
274	274	}
275	275
276	276	NETLIB_UPDATE(nic74107A)
277	277	{
278		if (INPLOGIC(m_J) & INPLOGIC(m_K))
279		{
280		sub.m_Q1 = 1;
281		sub.m_Q2 = 0;
282		sub.m_F = 0;
283		}
284		else if (!INPLOGIC(m_J) & INPLOGIC(m_K))
285		{
286		sub.m_Q1 = 0;
287		sub.m_Q2 = 0;
288		sub.m_F = 0;
289		}
290		else if (INPLOGIC(m_J) & !INPLOGIC(m_K))
291		{
292		sub.m_Q1 = 0;
293		sub.m_Q2 = 0;
294		sub.m_F = 1;
295		}
296		else
297		{
298		sub.m_Q1 = 0;
299		sub.m_Q2 = 1;
300		sub.m_F = 0;
301		sub.m_clk.inactivate();
302		}
303		if (!INPLOGIC(m_clrQ))
304		{
305		sub.m_clk.inactivate();
306		sub.newstate(0);
307		}
308		else if (!sub.m_Q2)
309		sub.m_clk.activate_hl();
310		//if (!sub.m_Q2 & INPLOGIC(m_clrQ))
311		// sub.m_clk.activate_hl();
	278	if (INPLOGIC(m_J) & INPLOGIC(m_K))
	279	{
	280	sub.m_Q1 = 1;
	281	sub.m_Q2 = 0;
	282	sub.m_F = 0;
	283	}
	284	else if (!INPLOGIC(m_J) & INPLOGIC(m_K))
	285	{
	286	sub.m_Q1 = 0;
	287	sub.m_Q2 = 0;
	288	sub.m_F = 0;
	289	}
	290	else if (INPLOGIC(m_J) & !INPLOGIC(m_K))
	291	{
	292	sub.m_Q1 = 0;
	293	sub.m_Q2 = 0;
	294	sub.m_F = 1;
	295	}
	296	else
	297	{
	298	sub.m_Q1 = 0;
	299	sub.m_Q2 = 1;
	300	sub.m_F = 0;
	301	sub.m_clk.inactivate();
	302	}
	303	if (!INPLOGIC(m_clrQ))
	304	{
	305	sub.m_clk.inactivate();
	306	sub.newstate(0);
	307	}
	308	else if (!sub.m_Q2)
	309	sub.m_clk.activate_hl();
	310	//if (!sub.m_Q2 & INPLOGIC(m_clrQ))
	311	// sub.m_clk.activate_hl();
312	312	}
313	313
314	314	NETLIB_START(nic74153)
315	315	{
316		register_input("A1", m_I[0]);
317		register_input("A2", m_I[1]);
318		register_input("A3", m_I[2]);
319		register_input("A4", m_I[3]);
320		register_input("A", m_A);
321		register_input("B", m_B);
322		register_input("GA", m_GA);
	316	register_input("A1", m_I[0]);
	317	register_input("A2", m_I[1]);
	318	register_input("A3", m_I[2]);
	319	register_input("A4", m_I[3]);
	320	register_input("A", m_A);
	321	register_input("B", m_B);
	322	register_input("GA", m_GA);
323	323
324		register_output("AY", m_AY);
	324	register_output("AY", m_AY);
325	325	}
326	326
327	327	NETLIB_UPDATE(nic74153)
328	328	{
329		const netlist_time delay[2] = { NLTIME_FROM_NS(23), NLTIME_FROM_NS(18) };
330		if (!INPLOGIC(m_GA))
331		{
332		UINT8 chan = (INPLOGIC(m_A) \| (INPLOGIC(m_B)<<1));
333		UINT8 t = INPLOGIC(m_I[chan]);
334		OUTLOGIC(m_AY, t, delay[t] ); /* data to y only, FIXME */
335		}
336		else
337		{
338		OUTLOGIC(m_AY, 0, delay[0]);
339		}
	329	const netlist_time delay[2] = { NLTIME_FROM_NS(23), NLTIME_FROM_NS(18) };
	330	if (!INPLOGIC(m_GA))
	331	{
	332	UINT8 chan = (INPLOGIC(m_A) \| (INPLOGIC(m_B)<<1));
	333	UINT8 t = INPLOGIC(m_I[chan]);
	334	OUTLOGIC(m_AY, t, delay[t] ); /* data to y only, FIXME */
	335	}
	336	else
	337	{
	338	OUTLOGIC(m_AY, 0, delay[0]);
	339	}
340	340	}
341	341
342	342
r26736	r26737
346	346
347	347	netlist_factory::netlist_factory()
348	348	{
349
350	349	}
351	350
352	351	netlist_factory::~netlist_factory()
353	352	{
354		for (list_t::entry_t *e = m_list.first(); e != NULL; e = m_list.next(e))
355		{
356		net_device_t_base_factory *p = e->object();
357		delete p;
358		}
359		m_list.reset();
	353	for (list_t::entry_t *e = m_list.first(); e != NULL; e = m_list.next(e))
	354	{
	355	net_device_t_base_factory *p = e->object();
	356	delete p;
	357	}
	358	m_list.reset();
360	359	}
361	360
362	361	void netlist_factory::initialize()
363	362	{
364		ENTRY(R, NETDEV_R)
365		ENTRY(POT, NETDEV_POT)
366		ENTRY(C, NETDEV_C)
367		ENTRY(D, NETDEV_D)
368		ENTRY(VCVS, NETDEV_VCVS)
369		ENTRY(VCCS, NETDEV_VCCS)
370		ENTRY(QPNP_switch, NETDEV_QPNP)
371		ENTRY(QNPN_switch, NETDEV_QNPN)
372		ENTRY(ttl_const, NETDEV_TTL_CONST)
373		ENTRY(analog_const, NETDEV_ANALOG_CONST)
374		ENTRY(logic_input, NETDEV_LOGIC_INPUT)
375		ENTRY(analog_input, NETDEV_ANALOG_INPUT)
376		ENTRY(log, NETDEV_LOG)
377		ENTRY(logD, NETDEV_LOGD)
378		ENTRY(clock, NETDEV_CLOCK)
379		ENTRY(mainclock, NETDEV_MAINCLOCK)
380		ENTRY(solver, NETDEV_SOLVER)
381		ENTRY(nicMultiSwitch, NETDEV_SWITCH2)
382		ENTRY(nicRSFF, NETDEV_RSFF)
383		ENTRY(nicMixer8, NETDEV_MIXER)
384		ENTRY(7400, TTL_7400_NAND)
385		ENTRY(7402, TTL_7402_NOR)
386		ENTRY(nic7404, TTL_7404_INVERT)
387		ENTRY(7410, TTL_7410_NAND)
388		ENTRY(7420, TTL_7420_NAND)
389		ENTRY(7425, TTL_7425_NOR)
390		ENTRY(7427, TTL_7427_NOR)
391		ENTRY(7430, TTL_7430_NAND)
392		ENTRY(nic7450, TTL_7450_ANDORINVERT)
393		ENTRY(7486, TTL_7486_XOR)
394		ENTRY(nic7448, TTL_7448)
395		ENTRY(7474, TTL_7474)
396		ENTRY(7483, TTL_7483)
397		ENTRY(7490, TTL_7490)
398		ENTRY(7493, TTL_7493)
399		ENTRY(nic74107, TTL_74107)
400		ENTRY(nic74107A, TTL_74107A)
401		ENTRY(nic74153, TTL_74153)
402		ENTRY(9316, TTL_9316)
403		ENTRY(NE555, NETDEV_NE555)
404		ENTRY(nicNE555N_MSTABLE, NE555N_MSTABLE)
	363	ENTRY(R, NETDEV_R)
	364	ENTRY(POT, NETDEV_POT)
	365	ENTRY(C, NETDEV_C)
	366	ENTRY(D, NETDEV_D)
	367	ENTRY(VCVS, NETDEV_VCVS)
	368	ENTRY(VCCS, NETDEV_VCCS)
	369	ENTRY(QPNP_switch, NETDEV_QPNP)
	370	ENTRY(QNPN_switch, NETDEV_QNPN)
	371	ENTRY(ttl_const, NETDEV_TTL_CONST)
	372	ENTRY(analog_const, NETDEV_ANALOG_CONST)
	373	ENTRY(logic_input, NETDEV_LOGIC_INPUT)
	374	ENTRY(analog_input, NETDEV_ANALOG_INPUT)
	375	ENTRY(log, NETDEV_LOG)
	376	ENTRY(logD, NETDEV_LOGD)
	377	ENTRY(clock, NETDEV_CLOCK)
	378	ENTRY(mainclock, NETDEV_MAINCLOCK)
	379	ENTRY(solver, NETDEV_SOLVER)
	380	ENTRY(nicMultiSwitch, NETDEV_SWITCH2)
	381	ENTRY(nicRSFF, NETDEV_RSFF)
	382	ENTRY(nicMixer8, NETDEV_MIXER)
	383	ENTRY(7400, TTL_7400_NAND)
	384	ENTRY(7402, TTL_7402_NOR)
	385	ENTRY(nic7404, TTL_7404_INVERT)
	386	ENTRY(7410, TTL_7410_NAND)
	387	ENTRY(7420, TTL_7420_NAND)
	388	ENTRY(7425, TTL_7425_NOR)
	389	ENTRY(7427, TTL_7427_NOR)
	390	ENTRY(7430, TTL_7430_NAND)
	391	ENTRY(nic7450, TTL_7450_ANDORINVERT)
	392	ENTRY(7486, TTL_7486_XOR)
	393	ENTRY(nic7448, TTL_7448)
	394	ENTRY(7474, TTL_7474)
	395	ENTRY(7483, TTL_7483)
	396	ENTRY(7490, TTL_7490)
	397	ENTRY(7493, TTL_7493)
	398	ENTRY(nic74107, TTL_74107)
	399	ENTRY(nic74107A, TTL_74107A)
	400	ENTRY(nic74153, TTL_74153)
	401	ENTRY(9316, TTL_9316)
	402	ENTRY(NE555, NETDEV_NE555)
	403	ENTRY(nicNE555N_MSTABLE, NE555N_MSTABLE)
405	404	}
406	405
407	406	netlist_device_t *netlist_factory::new_device_by_classname(const pstring &classname, netlist_setup_t &setup) const
408	407	{
409		for (list_t::entry_t *e = m_list.first(); e != NULL; e = m_list.next(e))
410		{
411		net_device_t_base_factory *p = e->object();
412		if (strcmp(p->classname(), classname) == 0)
413		{
414		netlist_device_t *ret = p->Create();
415		return ret;
416		}
417		p++;
418		}
419		setup.netlist().xfatalerror("Class %s not found!\n", classname.cstr());
420		return NULL; // appease code analysis
	408	for (list_t::entry_t *e = m_list.first(); e != NULL; e = m_list.next(e))
	409	{
	410	net_device_t_base_factory *p = e->object();
	411	if (strcmp(p->classname(), classname) == 0)
	412	{
	413	netlist_device_t *ret = p->Create();
	414	return ret;
	415	}
	416	p++;
	417	}
	418	setup.netlist().xfatalerror("Class %s not found!\n", classname.cstr());
	419	return NULL; // appease code analysis
421	420	}
422	421
423	422	netlist_device_t *netlist_factory::new_device_by_name(const pstring &name, netlist_setup_t &setup) const
424	423	{
425		for (list_t::entry_t *e = m_list.first(); e != NULL; e = m_list.next(e))
426		{
427		net_device_t_base_factory *p = e->object();
428		if (strcmp(p->name(), name) == 0)
429		{
430		netlist_device_t *ret = p->Create();
431		return ret;
432		}
433		p++;
434		}
435		setup.netlist().xfatalerror("Class %s not found!\n", name.cstr());
436		return NULL; // appease code analysis
	424	for (list_t::entry_t *e = m_list.first(); e != NULL; e = m_list.next(e))
	425	{
	426	net_device_t_base_factory *p = e->object();
	427	if (strcmp(p->name(), name) == 0)
	428	{
	429	netlist_device_t *ret = p->Create();
	430	return ret;
	431	}
	432	p++;
	433	}
	434	setup.netlist().xfatalerror("Class %s not found!\n", name.cstr());
	435	return NULL; // appease code analysis
437	436	}
438

trunk/src/emu/netlist/devices/nld_system.c
r26736	r26737
12	12
13	13	NETLIB_START(ttl_const)
14	14	{
15		register_output("Q", m_Q);
16		register_param("CONST", m_const, 0);
	15	register_output("Q", m_Q);
	16	register_param("CONST", m_const, 0);
17	17	}
18	18
19	19	NETLIB_UPDATE(ttl_const)
r26736	r26737
22	22
23	23	NETLIB_UPDATE_PARAM(ttl_const)
24	24	{
25		OUTLOGIC(m_Q, m_const.Value(), NLTIME_IMMEDIATE);
	25	OUTLOGIC(m_Q, m_const.Value(), NLTIME_IMMEDIATE);
26	26	}
27	27
28	28	NETLIB_START(analog_const)
29	29	{
30		register_output("Q", m_Q);
31		register_param("CONST", m_const, 0.0);
	30	register_output("Q", m_Q);
	31	register_param("CONST", m_const, 0.0);
32	32	}
33	33
34	34	NETLIB_UPDATE(analog_const)
r26736	r26737
37	37
38	38	NETLIB_UPDATE_PARAM(analog_const)
39	39	{
40		m_Q.initial(m_const.Value());
	40	m_Q.initial(m_const.Value());
41	41	}
42	42
43	43	// ----------------------------------------------------------------------------------------
r26736	r26737
46	46
47	47	NETLIB_START(clock)
48	48	{
49		register_output("Q", m_Q);
50		//register_input("FB", m_feedback);
	49	register_output("Q", m_Q);
	50	//register_input("FB", m_feedback);
51	51
52		register_param("FREQ", m_freq, 7159000.0 * 5.0);
53		m_inc = netlist_time::from_hz(m_freq.Value()*2);
	52	register_param("FREQ", m_freq, 7159000.0 * 5.0);
	53	m_inc = netlist_time::from_hz(m_freq.Value()*2);
54	54
55		register_link_internal(m_feedback, m_Q, netlist_input_t::STATE_INP_ACTIVE);
	55	register_link_internal(m_feedback, m_Q, netlist_input_t::STATE_INP_ACTIVE);
56	56
57	57	}
58	58
59	59	NETLIB_UPDATE_PARAM(clock)
60	60	{
61		m_inc = netlist_time::from_hz(m_freq.Value()*2);
	61	m_inc = netlist_time::from_hz(m_freq.Value()*2);
62	62	}
63	63
64	64	NETLIB_UPDATE(clock)
65	65	{
66		OUTLOGIC(m_Q, !m_Q.net().new_Q(), m_inc );
	66	OUTLOGIC(m_Q, !m_Q.net().new_Q(), m_inc );
67	67	}
68	68
69	69	// ----------------------------------------------------------------------------------------
r26736	r26737
72	72
73	73	NETLIB_START(logic_input)
74	74	{
75		register_output("Q", m_Q);
	75	register_output("Q", m_Q);
76	76	}
77	77
78	78	NETLIB_UPDATE(logic_input)
r26736	r26737
85	85
86	86	NETLIB_START(analog_input)
87	87	{
88		register_output("Q", m_Q);
	88	register_output("Q", m_Q);
89	89	}
90	90
91	91	NETLIB_UPDATE(analog_input)

trunk/src/emu/netlist/devices/net_lib.h
r26736	r26737
136	136	*/
137	137
138	138	NETLIB_SUBDEVICE(nic74107Asub,
139		netlist_ttl_input_t m_clk;
	139	netlist_ttl_input_t m_clk;
140	140
141	141	netlist_ttl_output_t m_Q;
142	142	netlist_ttl_output_t m_QQ;

trunk/src/emu/netlist/devices/nld_system.h
r26736	r26737
25	25	NETDEV_PARAM(_name.CONST, _v)
26	26
27	27	#define NETDEV_MAINCLOCK(_name) \
28		NET_REGISTER_DEV(mainclock, _name)
	28	NET_REGISTER_DEV(mainclock, _name)
29	29
30	30	#define NETDEV_CLOCK(_name) \
31		NET_REGISTER_DEV(clock, _name)
	31	NET_REGISTER_DEV(clock, _name)
32	32
33	33	#define NETDEV_LOGIC_INPUT(_name) \
34		NET_REGISTER_DEV(logic_input, _name)
	34	NET_REGISTER_DEV(logic_input, _name)
35	35
36	36	#define NETDEV_ANALOG_INPUT(_name) \
37		NET_REGISTER_DEV(analog_input, _name)
	37	NET_REGISTER_DEV(analog_input, _name)
38	38
39	39	// ----------------------------------------------------------------------------------------
40	40	// netdev_*_const
r26736	r26737
56	56
57	57	NETLIB_DEVICE_WITH_PARAMS(mainclock,
58	58	public:
59		netlist_ttl_output_t m_Q;
	59	netlist_ttl_output_t m_Q;
60	60
61	61	netlist_param_double_t m_freq;
62	62	netlist_time m_inc;
r26736	r26737
69	69	// ----------------------------------------------------------------------------------------
70	70
71	71	NETLIB_DEVICE_WITH_PARAMS(clock,
72		netlist_ttl_input_t m_feedback;
73		netlist_ttl_output_t m_Q;
	72	netlist_ttl_input_t m_feedback;
	73	netlist_ttl_output_t m_Q;
74	74
75		netlist_param_double_t m_freq;
76		netlist_time m_inc;
	75	netlist_param_double_t m_freq;
	76	netlist_time m_inc;
77	77	);
78	78
79	79
r26736	r26737
82	82	// ----------------------------------------------------------------------------------------
83	83
84	84	NETLIB_DEVICE(logic_input,
85		netlist_ttl_output_t m_Q;
	85	netlist_ttl_output_t m_Q;
86	86	);
87	87
88	88	NETLIB_DEVICE(analog_input,
89		netlist_analog_output_t m_Q;
	89	netlist_analog_output_t m_Q;
90	90	);
91	91
92	92

trunk/src/emu/netlist/devices/nld_7410.h
r26736	r26737
35	35	#include "nld_signal.h"
36	36
37	37	#define TTL_7410_NAND(_name, _I1, _I2, _I3) \
38		NET_REGISTER_DEV(7410, _name) \
39		NET_CONNECT(_name, A, _I1) \
40		NET_CONNECT(_name, B, _I2) \
41		NET_CONNECT(_name, C, _I3)
	38	NET_REGISTER_DEV(7410, _name) \
	39	NET_CONNECT(_name, A, _I1) \
	40	NET_CONNECT(_name, B, _I2) \
	41	NET_CONNECT(_name, C, _I3)
42	42
43	43	NETLIB_SIGNAL(7410, 3, 0, 0);
44	44

trunk/src/emu/netlist/devices/nld_9316.c
r26736	r26737
7	7
8	8	NETLIB_START(9316)
9	9	{
10		register_sub(sub, "sub");
	10	register_sub(sub, "sub");
11	11
12		register_subalias("CLK", sub.m_clk);
	12	register_subalias("CLK", sub.m_clk);
13	13
14		register_input("ENP", m_ENP);
15		register_input("ENT", m_ENT);
16		register_input("CLRQ", m_CLRQ);
17		register_input("LOADQ", m_LOADQ);
	14	register_input("ENP", m_ENP);
	15	register_input("ENT", m_ENT);
	16	register_input("CLRQ", m_CLRQ);
	17	register_input("LOADQ", m_LOADQ);
18	18
19		register_subalias("A", sub.m_A);
20		register_subalias("B", sub.m_B);
21		register_subalias("C", sub.m_C);
22		register_subalias("D", sub.m_D);
	19	register_subalias("A", sub.m_A);
	20	register_subalias("B", sub.m_B);
	21	register_subalias("C", sub.m_C);
	22	register_subalias("D", sub.m_D);
23	23
24		register_subalias("QA", sub.m_QA);
25		register_subalias("QB", sub.m_QB);
26		register_subalias("QC", sub.m_QC);
27		register_subalias("QD", sub.m_QD);
28		register_subalias("RC", sub.m_RC);
	24	register_subalias("QA", sub.m_QA);
	25	register_subalias("QB", sub.m_QB);
	26	register_subalias("QC", sub.m_QC);
	27	register_subalias("QD", sub.m_QD);
	28	register_subalias("RC", sub.m_RC);
29	29
30	30	}
31	31
32	32	NETLIB_START(9316_sub)
33	33	{
34		m_cnt = 0;
35		m_loadq = 1;
36		m_ent = 1;
	34	m_cnt = 0;
	35	m_loadq = 1;
	36	m_ent = 1;
37	37
38		register_input("CLK", m_clk, netlist_input_t::STATE_INP_LH);
	38	register_input("CLK", m_clk, netlist_input_t::STATE_INP_LH);
39	39
40		register_input("A", m_A, netlist_input_t::STATE_INP_PASSIVE);
41		register_input("B", m_B, netlist_input_t::STATE_INP_PASSIVE);
42		register_input("C", m_C, netlist_input_t::STATE_INP_PASSIVE);
43		register_input("D", m_D, netlist_input_t::STATE_INP_PASSIVE);
	40	register_input("A", m_A, netlist_input_t::STATE_INP_PASSIVE);
	41	register_input("B", m_B, netlist_input_t::STATE_INP_PASSIVE);
	42	register_input("C", m_C, netlist_input_t::STATE_INP_PASSIVE);
	43	register_input("D", m_D, netlist_input_t::STATE_INP_PASSIVE);
44	44
45		register_output("QA", m_QA);
46		register_output("QB", m_QB);
47		register_output("QC", m_QC);
48		register_output("QD", m_QD);
49		register_output("RC", m_RC);
	45	register_output("QA", m_QA);
	46	register_output("QB", m_QB);
	47	register_output("QC", m_QC);
	48	register_output("QD", m_QD);
	49	register_output("RC", m_RC);
50	50
51		save(NAME(m_cnt));
52		save(NAME(m_loadq));
53		save(NAME(m_ent));
	51	save(NAME(m_cnt));
	52	save(NAME(m_loadq));
	53	save(NAME(m_ent));
54	54	}
55	55
56	56	NETLIB_UPDATE(9316_sub)
57	57	{
58		UINT8 cnt = m_cnt;
59		if (m_loadq)
60		{
61		cnt = ( cnt + 1) & 0x0f;
62		update_outputs(cnt);
63		if (cnt == 0x0f)
64		OUTLOGIC(m_RC, m_ent, NLTIME_FROM_NS(20));
65		else if (cnt == 0)
66		OUTLOGIC(m_RC, 0, NLTIME_FROM_NS(20));
67		}
68		else
69		{
70		cnt = (INPLOGIC_PASSIVE(m_D) << 3) \| (INPLOGIC_PASSIVE(m_C) << 2) \| (INPLOGIC_PASSIVE(m_B) << 1) \| (INPLOGIC_PASSIVE(m_A) << 0);
71		update_outputs_all(cnt);
72		OUTLOGIC(m_RC, m_ent & (cnt == 0x0f), NLTIME_FROM_NS(20));
73		}
74		m_cnt = cnt;
	58	UINT8 cnt = m_cnt;
	59	if (m_loadq)
	60	{
	61	cnt = ( cnt + 1) & 0x0f;
	62	update_outputs(cnt);
	63	if (cnt == 0x0f)
	64	OUTLOGIC(m_RC, m_ent, NLTIME_FROM_NS(20));
	65	else if (cnt == 0)
	66	OUTLOGIC(m_RC, 0, NLTIME_FROM_NS(20));
	67	}
	68	else
	69	{
	70	cnt = (INPLOGIC_PASSIVE(m_D) << 3) \| (INPLOGIC_PASSIVE(m_C) << 2) \| (INPLOGIC_PASSIVE(m_B) << 1) \| (INPLOGIC_PASSIVE(m_A) << 0);
	71	update_outputs_all(cnt);
	72	OUTLOGIC(m_RC, m_ent & (cnt == 0x0f), NLTIME_FROM_NS(20));
	73	}
	74	m_cnt = cnt;
75	75	}
76	76
77	77	NETLIB_UPDATE(9316)
78	78	{
79		sub.m_loadq = INPLOGIC(m_LOADQ);
80		sub.m_ent = INPLOGIC(m_ENT);
81		const netlist_sig_t clrq = INPLOGIC(m_CLRQ);
	79	sub.m_loadq = INPLOGIC(m_LOADQ);
	80	sub.m_ent = INPLOGIC(m_ENT);
	81	const netlist_sig_t clrq = INPLOGIC(m_CLRQ);
82	82
83		if ((!sub.m_loadq \|\| (sub.m_ent & INPLOGIC(m_ENP))) & clrq)
84		{
85		sub.m_clk.activate_lh();
86		}
87		else
88		{
89		sub.m_clk.inactivate();
90		if (!clrq & (sub.m_cnt>0))
91		{
92		sub.m_cnt = 0;
93		sub.update_outputs(sub.m_cnt);
94		OUTLOGIC(sub.m_RC, 0, NLTIME_FROM_NS(20));
95		return;
96		}
97		}
98		OUTLOGIC(sub.m_RC, sub.m_ent & (sub.m_cnt == 0x0f), NLTIME_FROM_NS(20));
	83	if ((!sub.m_loadq \|\| (sub.m_ent & INPLOGIC(m_ENP))) & clrq)
	84	{
	85	sub.m_clk.activate_lh();
	86	}
	87	else
	88	{
	89	sub.m_clk.inactivate();
	90	if (!clrq & (sub.m_cnt>0))
	91	{
	92	sub.m_cnt = 0;
	93	sub.update_outputs(sub.m_cnt);
	94	OUTLOGIC(sub.m_RC, 0, NLTIME_FROM_NS(20));
	95	return;
	96	}
	97	}
	98	OUTLOGIC(sub.m_RC, sub.m_ent & (sub.m_cnt == 0x0f), NLTIME_FROM_NS(20));
99	99	}
100	100
101	101	inline NETLIB_FUNC_VOID(9316_sub, update_outputs_all, (const UINT8 cnt))
102	102	{
103		const netlist_time out_delay = NLTIME_FROM_NS(20);
104		OUTLOGIC(m_QA, (cnt >> 0) & 1, out_delay);
105		OUTLOGIC(m_QB, (cnt >> 1) & 1, out_delay);
106		OUTLOGIC(m_QC, (cnt >> 2) & 1, out_delay);
107		OUTLOGIC(m_QD, (cnt >> 3) & 1, out_delay);
	103	const netlist_time out_delay = NLTIME_FROM_NS(20);
	104	OUTLOGIC(m_QA, (cnt >> 0) & 1, out_delay);
	105	OUTLOGIC(m_QB, (cnt >> 1) & 1, out_delay);
	106	OUTLOGIC(m_QC, (cnt >> 2) & 1, out_delay);
	107	OUTLOGIC(m_QD, (cnt >> 3) & 1, out_delay);
108	108	}
109	109
110	110	inline NETLIB_FUNC_VOID(9316_sub, update_outputs, (const UINT8 cnt))
111	111	{
112		const netlist_time out_delay = NLTIME_FROM_NS(20);
	112	const netlist_time out_delay = NLTIME_FROM_NS(20);
113	113	#if 0
114	114	// for (int i=0; i<4; i++)
115	115	// OUTLOGIC(m_Q[i], (cnt >> i) & 1, delay[i]);
116		OUTLOGIC(m_QA, (cnt >> 0) & 1, out_delay);
117		OUTLOGIC(m_QB, (cnt >> 1) & 1, out_delay);
118		OUTLOGIC(m_QC, (cnt >> 2) & 1, out_delay);
119		OUTLOGIC(m_QD, (cnt >> 3) & 1, out_delay);
	116	OUTLOGIC(m_QA, (cnt >> 0) & 1, out_delay);
	117	OUTLOGIC(m_QB, (cnt >> 1) & 1, out_delay);
	118	OUTLOGIC(m_QC, (cnt >> 2) & 1, out_delay);
	119	OUTLOGIC(m_QD, (cnt >> 3) & 1, out_delay);
120	120	#else
121		if ((cnt & 1) == 1)
122		OUTLOGIC(m_QA, 1, out_delay);
123		else
124		{
125		OUTLOGIC(m_QA, 0, out_delay);
126		switch (cnt)
127		{
128		case 0x00:
129		OUTLOGIC(m_QB, 0, out_delay);
130		OUTLOGIC(m_QC, 0, out_delay);
131		OUTLOGIC(m_QD, 0, out_delay);
132		break;
133		case 0x02:
134		case 0x06:
135		case 0x0A:
136		case 0x0E:
137		OUTLOGIC(m_QB, 1, out_delay);
138		break;
139		case 0x04:
140		case 0x0C:
141		OUTLOGIC(m_QB, 0, out_delay);
142		OUTLOGIC(m_QC, 1, out_delay);
143		break;
144		case 0x08:
145		OUTLOGIC(m_QB, 0, out_delay);
146		OUTLOGIC(m_QC, 0, out_delay);
147		OUTLOGIC(m_QD, 1, out_delay);
148		break;
149		}
	121	if ((cnt & 1) == 1)
	122	OUTLOGIC(m_QA, 1, out_delay);
	123	else
	124	{
	125	OUTLOGIC(m_QA, 0, out_delay);
	126	switch (cnt)
	127	{
	128	case 0x00:
	129	OUTLOGIC(m_QB, 0, out_delay);
	130	OUTLOGIC(m_QC, 0, out_delay);
	131	OUTLOGIC(m_QD, 0, out_delay);
	132	break;
	133	case 0x02:
	134	case 0x06:
	135	case 0x0A:
	136	case 0x0E:
	137	OUTLOGIC(m_QB, 1, out_delay);
	138	break;
	139	case 0x04:
	140	case 0x0C:
	141	OUTLOGIC(m_QB, 0, out_delay);
	142	OUTLOGIC(m_QC, 1, out_delay);
	143	break;
	144	case 0x08:
	145	OUTLOGIC(m_QB, 0, out_delay);
	146	OUTLOGIC(m_QC, 0, out_delay);
	147	OUTLOGIC(m_QD, 1, out_delay);
	148	break;
	149	}
150	150
151		}
	151	}
152	152	#endif
153	153	}
154

trunk/src/emu/netlist/devices/nld_7430.h
r26736	r26737
40	40	#include "nld_signal.h"
41	41
42	42	#define TTL_7430_NAND(_name, _I1, _I2, _I3, _I4, _I5, _I6, _I7, _I8) \
43		NET_REGISTER_DEV(7430, _name) \
44		NET_CONNECT(_name, A, _I1) \
45		NET_CONNECT(_name, B, _I2) \
46		NET_CONNECT(_name, C, _I3) \
47		NET_CONNECT(_name, D, _I4) \
48		NET_CONNECT(_name, E, _I5) \
49		NET_CONNECT(_name, F, _I6) \
50		NET_CONNECT(_name, G, _I7) \
51		NET_CONNECT(_name, H, _I8)
	43	NET_REGISTER_DEV(7430, _name) \
	44	NET_CONNECT(_name, A, _I1) \
	45	NET_CONNECT(_name, B, _I2) \
	46	NET_CONNECT(_name, C, _I3) \
	47	NET_CONNECT(_name, D, _I4) \
	48	NET_CONNECT(_name, E, _I5) \
	49	NET_CONNECT(_name, F, _I6) \
	50	NET_CONNECT(_name, G, _I7) \
	51	NET_CONNECT(_name, H, _I8)
52	52
53	53
54	54	NETLIB_SIGNAL(7430, 8, 0, 0);

trunk/src/emu/netlist/devices/nld_7490.c
r26736	r26737
7	7
8	8	NETLIB_START(7490)
9	9	{
10		m_cnt = 0;
	10	m_cnt = 0;
11	11
12		register_input("CLK", m_clk);
13		register_input("R1", m_R1);
14		register_input("R2", m_R2);
15		register_input("R91", m_R91);
16		register_input("R92", m_R92);
	12	register_input("CLK", m_clk);
	13	register_input("R1", m_R1);
	14	register_input("R2", m_R2);
	15	register_input("R91", m_R91);
	16	register_input("R92", m_R92);
17	17
18		register_output("QA", m_Q[0]);
19		register_output("QB", m_Q[1]);
20		register_output("QC", m_Q[2]);
21		register_output("QD", m_Q[3]);
	18	register_output("QA", m_Q[0]);
	19	register_output("QB", m_Q[1]);
	20	register_output("QC", m_Q[2]);
	21	register_output("QD", m_Q[3]);
22	22
23		save(NAME(m_cnt));
	23	save(NAME(m_cnt));
24	24
25	25	}
26	26
27	27	NETLIB_UPDATE(7490)
28	28	{
29		if (INPLOGIC(m_R91) & INPLOGIC(m_R92))
30		{
31		m_cnt = 9;
32		update_outputs();
33		}
34		else if (INPLOGIC(m_R1) & INPLOGIC(m_R2))
35		{
36		m_cnt = 0;
37		update_outputs();
38		}
39		else if (INP_HL(m_clk))
40		{
41		m_cnt++;
42		if (m_cnt >= 10)
43		m_cnt = 0;
44		update_outputs();
45		}
	29	if (INPLOGIC(m_R91) & INPLOGIC(m_R92))
	30	{
	31	m_cnt = 9;
	32	update_outputs();
	33	}
	34	else if (INPLOGIC(m_R1) & INPLOGIC(m_R2))
	35	{
	36	m_cnt = 0;
	37	update_outputs();
	38	}
	39	else if (INP_HL(m_clk))
	40	{
	41	m_cnt++;
	42	if (m_cnt >= 10)
	43	m_cnt = 0;
	44	update_outputs();
	45	}
46	46	}
47	47
48	48	NETLIB_FUNC_VOID(7490, update_outputs, (void))
49	49	{
50		const netlist_time delay[4] = { NLTIME_FROM_NS(18), NLTIME_FROM_NS(36), NLTIME_FROM_NS(54), NLTIME_FROM_NS(72) };
51		for (int i=0; i<4; i++)
52		OUTLOGIC(m_Q[i], (m_cnt >> i) & 1, delay[i]);
	50	const netlist_time delay[4] = { NLTIME_FROM_NS(18), NLTIME_FROM_NS(36), NLTIME_FROM_NS(54), NLTIME_FROM_NS(72) };
	51	for (int i=0; i<4; i++)
	52	OUTLOGIC(m_Q[i], (m_cnt >> i) & 1, delay[i]);
53	53	}

trunk/src/emu/netlist/devices/nld_7474.c
r26736	r26737
7	7
8	8	ATTR_HOT inline void NETLIB_NAME(7474sub)::newstate(const UINT8 state)
9	9	{
10		static const netlist_time delay[2] = { NLTIME_FROM_NS(25), NLTIME_FROM_NS(40) };
11		OUTLOGIC(m_Q, state, delay[state]);
12		OUTLOGIC(m_QQ, !state, delay[!state]);
	10	static const netlist_time delay[2] = { NLTIME_FROM_NS(25), NLTIME_FROM_NS(40) };
	11	OUTLOGIC(m_Q, state, delay[state]);
	12	OUTLOGIC(m_QQ, !state, delay[!state]);
13	13	}
14	14
15	15	NETLIB_UPDATE(7474sub)
16	16	{
17		//if (!INP_LAST(m_clk) & INP(m_clk))
18		{
19		newstate(m_nextD);
20		m_clk.inactivate();
21		}
	17	//if (!INP_LAST(m_clk) & INP(m_clk))
	18	{
	19	newstate(m_nextD);
	20	m_clk.inactivate();
	21	}
22	22	}
23	23
24	24	NETLIB_UPDATE(7474)
25	25	{
26		if (!INPLOGIC(m_preQ))
27		{
28		sub.newstate(1);
29		sub.m_clk.inactivate();
30		m_D.inactivate();
31		}
32		else if (!INPLOGIC(m_clrQ))
33		{
34		sub.newstate(0);
35		sub.m_clk.inactivate();
36		m_D.inactivate();
37		}
38		else
39		{
40		m_D.activate();
41		sub.m_nextD = INPLOGIC(m_D);
42		sub.m_clk.activate_lh();
43		}
	26	if (!INPLOGIC(m_preQ))
	27	{
	28	sub.newstate(1);
	29	sub.m_clk.inactivate();
	30	m_D.inactivate();
	31	}
	32	else if (!INPLOGIC(m_clrQ))
	33	{
	34	sub.newstate(0);
	35	sub.m_clk.inactivate();
	36	m_D.inactivate();
	37	}
	38	else
	39	{
	40	m_D.activate();
	41	sub.m_nextD = INPLOGIC(m_D);
	42	sub.m_clk.activate_lh();
	43	}
44	44	}
45	45
46	46	NETLIB_START(7474)
47	47	{
48		register_sub(sub, "sub");
	48	register_sub(sub, "sub");
49	49
50		register_subalias("CLK", sub.m_clk);
51		register_input("D", m_D);
52		register_input("CLRQ", m_clrQ);
53		register_input("PREQ", m_preQ);
	50	register_subalias("CLK", sub.m_clk);
	51	register_input("D", m_D);
	52	register_input("CLRQ", m_clrQ);
	53	register_input("PREQ", m_preQ);
54	54
55		register_subalias("Q", sub.m_Q);
56		register_subalias("QQ", sub.m_QQ);
	55	register_subalias("Q", sub.m_Q);
	56	register_subalias("QQ", sub.m_QQ);
57	57
58	58	}
59	59
60	60	NETLIB_START(7474sub)
61	61	{
62		register_input("CLK", m_clk, netlist_input_t::STATE_INP_LH);
	62	register_input("CLK", m_clk, netlist_input_t::STATE_INP_LH);
63	63
64		register_output("Q", m_Q);
65		register_output("QQ", m_QQ);
	64	register_output("Q", m_Q);
	65	register_output("QQ", m_QQ);
66	66
67		m_Q.initial(1);
68		m_QQ.initial(0);
	67	m_Q.initial(1);
	68	m_QQ.initial(0);
69	69	}

trunk/src/emu/netlist/devices/nld_7493.c
r26736	r26737
7	7
8	8	NETLIB_START(7493)
9	9	{
10		register_sub(A, "A");
11		register_sub(B, "B");
12		register_sub(C, "C");
13		register_sub(D, "D");
	10	register_sub(A, "A");
	11	register_sub(B, "B");
	12	register_sub(C, "C");
	13	register_sub(D, "D");
14	14
15		register_subalias("CLKA", A.m_I);
16		register_subalias("CLKB", B.m_I);
17		register_input("R1", m_R1);
18		register_input("R2", m_R2);
	15	register_subalias("CLKA", A.m_I);
	16	register_subalias("CLKB", B.m_I);
	17	register_input("R1", m_R1);
	18	register_input("R2", m_R2);
19	19
20		register_subalias("QA", A.m_Q);
21		register_subalias("QB", B.m_Q);
22		register_subalias("QC", C.m_Q);
23		register_subalias("QD", D.m_Q);
	20	register_subalias("QA", A.m_Q);
	21	register_subalias("QB", B.m_Q);
	22	register_subalias("QC", C.m_Q);
	23	register_subalias("QD", D.m_Q);
24	24
25		register_link_internal(C, C.m_I, B.m_Q, netlist_input_t::STATE_INP_HL);
26		register_link_internal(D, D.m_I, C.m_Q, netlist_input_t::STATE_INP_HL);
	25	register_link_internal(C, C.m_I, B.m_Q, netlist_input_t::STATE_INP_HL);
	26	register_link_internal(D, D.m_I, C.m_Q, netlist_input_t::STATE_INP_HL);
27	27	}
28	28
29	29	NETLIB_START(7493ff)
30	30	{
31		m_reset = 0;
	31	m_reset = 0;
32	32
33		register_input("CLK", m_I, netlist_input_t::STATE_INP_HL);
34		register_output("Q", m_Q);
	33	register_input("CLK", m_I, netlist_input_t::STATE_INP_HL);
	34	register_output("Q", m_Q);
35	35
36		save(NAME(m_reset));
	36	save(NAME(m_reset));
37	37	}
38	38
39	39	NETLIB_UPDATE(7493ff)
40	40	{
41		if (m_reset == 0)
42		OUTLOGIC(m_Q, !m_Q.net().new_Q(), NLTIME_FROM_NS(18));
	41	if (m_reset == 0)
	42	OUTLOGIC(m_Q, !m_Q.net().new_Q(), NLTIME_FROM_NS(18));
43	43	}
44	44
45	45	NETLIB_UPDATE(7493)
46	46	{
47		netlist_sig_t r = INPLOGIC(m_R1) & INPLOGIC(m_R2);
	47	netlist_sig_t r = INPLOGIC(m_R1) & INPLOGIC(m_R2);
48	48
49		if (r)
50		{
51		A.m_reset = B.m_reset = C.m_reset = D.m_reset = 1;
52		A.m_I.inactivate();
53		B.m_I.inactivate();
54		OUTLOGIC(A.m_Q, 0, NLTIME_FROM_NS(40));
55		OUTLOGIC(B.m_Q, 0, NLTIME_FROM_NS(40));
56		OUTLOGIC(C.m_Q, 0, NLTIME_FROM_NS(40));
57		OUTLOGIC(D.m_Q, 0, NLTIME_FROM_NS(40));
58		}
59		else
60		{
61		A.m_reset = B.m_reset = C.m_reset = D.m_reset = 0;
62		A.m_I.activate_hl();
63		B.m_I.activate_hl();
64		}
	49	if (r)
	50	{
	51	A.m_reset = B.m_reset = C.m_reset = D.m_reset = 1;
	52	A.m_I.inactivate();
	53	B.m_I.inactivate();
	54	OUTLOGIC(A.m_Q, 0, NLTIME_FROM_NS(40));
	55	OUTLOGIC(B.m_Q, 0, NLTIME_FROM_NS(40));
	56	OUTLOGIC(C.m_Q, 0, NLTIME_FROM_NS(40));
	57	OUTLOGIC(D.m_Q, 0, NLTIME_FROM_NS(40));
	58	}
	59	else
	60	{
	61	A.m_reset = B.m_reset = C.m_reset = D.m_reset = 0;
	62	A.m_I.activate_hl();
	63	B.m_I.activate_hl();
	64	}
65	65	}

trunk/src/emu/netlist/devices/nld_9316.h
r26736	r26737
52	52	#include "../nl_base.h"
53	53
54	54	#define TTL_9316(_name, _CLK, _ENP, _ENT, _CLRQ, _LOADQ, _A, _B, _C, _D) \
55		NET_REGISTER_DEV(9316, _name) \
56		NET_CONNECT(_name, CLK, _CLK) \
57		NET_CONNECT(_name, ENP, _ENP) \
58		NET_CONNECT(_name, ENT, _ENT) \
59		NET_CONNECT(_name, CLRQ, _CLRQ) \
60		NET_CONNECT(_name, LOADQ,_LOADQ) \
61		NET_CONNECT(_name, A, _A) \
62		NET_CONNECT(_name, B, _B) \
63		NET_CONNECT(_name, C, _C) \
64		NET_CONNECT(_name, D, _D)
	55	NET_REGISTER_DEV(9316, _name) \
	56	NET_CONNECT(_name, CLK, _CLK) \
	57	NET_CONNECT(_name, ENP, _ENP) \
	58	NET_CONNECT(_name, ENT, _ENT) \
	59	NET_CONNECT(_name, CLRQ, _CLRQ) \
	60	NET_CONNECT(_name, LOADQ,_LOADQ) \
	61	NET_CONNECT(_name, A, _A) \
	62	NET_CONNECT(_name, B, _B) \
	63	NET_CONNECT(_name, C, _C) \
	64	NET_CONNECT(_name, D, _D)
65	65
66	66	NETLIB_SUBDEVICE(9316_sub,
67		ATTR_HOT void update_outputs_all(const UINT8 cnt);
68		ATTR_HOT void update_outputs(const UINT8 cnt);
	67	ATTR_HOT void update_outputs_all(const UINT8 cnt);
	68	ATTR_HOT void update_outputs(const UINT8 cnt);
69	69
70		netlist_ttl_input_t m_clk;
	70	netlist_ttl_input_t m_clk;
71	71
72		netlist_ttl_input_t m_A;
73		netlist_ttl_input_t m_B;
74		netlist_ttl_input_t m_C;
75		netlist_ttl_input_t m_D;
	72	netlist_ttl_input_t m_A;
	73	netlist_ttl_input_t m_B;
	74	netlist_ttl_input_t m_C;
	75	netlist_ttl_input_t m_D;
76	76
77		UINT8 m_cnt;
78		netlist_sig_t m_loadq;
79		netlist_sig_t m_ent;
	77	UINT8 m_cnt;
	78	netlist_sig_t m_loadq;
	79	netlist_sig_t m_ent;
80	80
81		netlist_ttl_output_t m_QA;
82		netlist_ttl_output_t m_QB;
83		netlist_ttl_output_t m_QC;
84		netlist_ttl_output_t m_QD;
85		netlist_ttl_output_t m_RC;
	81	netlist_ttl_output_t m_QA;
	82	netlist_ttl_output_t m_QB;
	83	netlist_ttl_output_t m_QC;
	84	netlist_ttl_output_t m_QD;
	85	netlist_ttl_output_t m_RC;
86	86	);
87	87
88	88	NETLIB_DEVICE(9316,
89		NETLIB_NAME(9316_sub) sub;
90		netlist_ttl_input_t m_ENP;
91		netlist_ttl_input_t m_ENT;
92		netlist_ttl_input_t m_CLRQ;
93		netlist_ttl_input_t m_LOADQ;
	89	NETLIB_NAME(9316_sub) sub;
	90	netlist_ttl_input_t m_ENP;
	91	netlist_ttl_input_t m_ENT;
	92	netlist_ttl_input_t m_CLRQ;
	93	netlist_ttl_input_t m_LOADQ;
94	94	);
95	95
96	96	#endif /* NLD_9316_H_ */

trunk/src/emu/netlist/devices/nld_7490.h
r26736	r26737
58	58	#include "../nl_base.h"
59	59
60	60	#define TTL_7490(_name, _CLK, _R1, _R2, _R91, _R92) \
61		NET_REGISTER_DEV(7490, _name) \
62		NET_CONNECT(_name, CLK, _CLK) \
63		NET_CONNECT(_name, R1, _R1) \
64		NET_CONNECT(_name, R2, _R2) \
65		NET_CONNECT(_name, R91, _R91) \
66		NET_CONNECT(_name, R92, _R92)
	61	NET_REGISTER_DEV(7490, _name) \
	62	NET_CONNECT(_name, CLK, _CLK) \
	63	NET_CONNECT(_name, R1, _R1) \
	64	NET_CONNECT(_name, R2, _R2) \
	65	NET_CONNECT(_name, R91, _R91) \
	66	NET_CONNECT(_name, R92, _R92)
67	67
68	68
69	69	NETLIB_DEVICE(7490,
70		ATTR_HOT void update_outputs();
	70	ATTR_HOT void update_outputs();
71	71
72		netlist_ttl_input_t m_R1;
73		netlist_ttl_input_t m_R2;
74		netlist_ttl_input_t m_R91;
75		netlist_ttl_input_t m_R92;
76		netlist_ttl_input_t m_clk;
	72	netlist_ttl_input_t m_R1;
	73	netlist_ttl_input_t m_R2;
	74	netlist_ttl_input_t m_R91;
	75	netlist_ttl_input_t m_R92;
	76	netlist_ttl_input_t m_clk;
77	77
78		UINT8 m_cnt;
	78	UINT8 m_cnt;
79	79
80		netlist_ttl_output_t m_Q[4];
	80	netlist_ttl_output_t m_Q[4];
81	81	);
82	82
83	83	#endif /* NLD_7490_H_ */

trunk/src/emu/netlist/devices/nld_7474.h
r26736	r26737
45	45	#include "nld_signal.h"
46	46
47	47	#define TTL_7474(_name, _CLK, _D, _CLRQ, _PREQ) \
48		NET_REGISTER_DEV(7474, _name) \
49		NET_CONNECT(_name, CLK, _CLK) \
50		NET_CONNECT(_name, D, _D) \
51		NET_CONNECT(_name, CLRQ, _CLRQ) \
52		NET_CONNECT(_name, PREQ, _PREQ)
	48	NET_REGISTER_DEV(7474, _name) \
	49	NET_CONNECT(_name, CLK, _CLK) \
	50	NET_CONNECT(_name, D, _D) \
	51	NET_CONNECT(_name, CLRQ, _CLRQ) \
	52	NET_CONNECT(_name, PREQ, _PREQ)
53	53
54	54	NETLIB_SUBDEVICE(7474sub,
55		netlist_ttl_input_t m_clk;
	55	netlist_ttl_input_t m_clk;
56	56
57		UINT8 m_nextD;
58		netlist_ttl_output_t m_Q;
59		netlist_ttl_output_t m_QQ;
	57	UINT8 m_nextD;
	58	netlist_ttl_output_t m_Q;
	59	netlist_ttl_output_t m_QQ;
60	60
61		ATTR_HOT inline void newstate(const UINT8 state);
	61	ATTR_HOT inline void newstate(const UINT8 state);
62	62	);
63	63
64	64	NETLIB_DEVICE(7474,
65		NETLIB_NAME(7474sub) sub;
	65	NETLIB_NAME(7474sub) sub;
66	66
67		netlist_ttl_input_t m_D;
68		netlist_ttl_input_t m_clrQ;
69		netlist_ttl_input_t m_preQ;
	67	netlist_ttl_input_t m_D;
	68	netlist_ttl_input_t m_clrQ;
	69	netlist_ttl_input_t m_preQ;
70	70	);
71	71
72	72

trunk/src/emu/netlist/devices/nld_solver.c
r26736	r26737
15	15
16	16	ATTR_COLD void netlist_matrix_solver_t::setup(netlist_net_t::list_t &nets, NETLIB_NAME(solver) &aowner)
17	17	{
18		m_owner = &aowner;
19		for (netlist_net_t::list_t::entry_t *pn = nets.first(); pn != NULL; pn = nets.next(pn))
20		{
21		NL_VERBOSE_OUT(("setting up net\n"));
	18	m_owner = &aowner;
	19	for (netlist_net_t::list_t::entry_t *pn = nets.first(); pn != NULL; pn = nets.next(pn))
	20	{
	21	NL_VERBOSE_OUT(("setting up net\n"));
22	22
23		m_nets.add(pn->object());
24		pn->object()->m_solver = this;
	23	m_nets.add(pn->object());
	24	pn->object()->m_solver = this;
25	25
26		for (netlist_core_terminal_t *p = pn->object()->m_head; p != NULL; p = p->m_update_list_next)
27		{
28		switch (p->type())
29		{
30		case netlist_terminal_t::TERMINAL:
31		switch (p->netdev().family())
32		{
33		case netlist_device_t::CAPACITOR:
34		if (!m_steps.contains(&p->netdev()))
35		m_steps.add(&p->netdev());
36		break;
37		case netlist_device_t::DIODE:
38		//case netlist_device_t::VCVS:
39		//case netlist_device_t::BJT_SWITCH:
40		if (!m_dynamic.contains(&p->netdev()))
41		m_dynamic.add(&p->netdev());
42		break;
43		default:
44		break;
45		}
46		pn->object()->m_terms.add(static_cast<netlist_terminal_t *>(p));
47		NL_VERBOSE_OUT(("Added terminal\n"));
48		break;
49		case netlist_terminal_t::INPUT:
50		if (!m_inps.contains(&p->netdev()))
51		m_inps.add(&p->netdev());
52		NL_VERBOSE_OUT(("Added input\n"));
53		break;
54		default:
55		owner().netlist().xfatalerror("unhandled element found\n");
56		break;
57		}
58		}
59		}
	26	for (netlist_core_terminal_t *p = pn->object()->m_head; p != NULL; p = p->m_update_list_next)
	27	{
	28	switch (p->type())
	29	{
	30	case netlist_terminal_t::TERMINAL:
	31	switch (p->netdev().family())
	32	{
	33	case netlist_device_t::CAPACITOR:
	34	if (!m_steps.contains(&p->netdev()))
	35	m_steps.add(&p->netdev());
	36	break;
	37	case netlist_device_t::DIODE:
	38	//case netlist_device_t::VCVS:
	39	//case netlist_device_t::BJT_SWITCH:
	40	if (!m_dynamic.contains(&p->netdev()))
	41	m_dynamic.add(&p->netdev());
	42	break;
	43	default:
	44	break;
	45	}
	46	pn->object()->m_terms.add(static_cast<netlist_terminal_t *>(p));
	47	NL_VERBOSE_OUT(("Added terminal\n"));
	48	break;
	49	case netlist_terminal_t::INPUT:
	50	if (!m_inps.contains(&p->netdev()))
	51	m_inps.add(&p->netdev());
	52	NL_VERBOSE_OUT(("Added input\n"));
	53	break;
	54	default:
	55	owner().netlist().xfatalerror("unhandled element found\n");
	56	break;
	57	}
	58	}
	59	}
60	60	}
61	61
62	62	ATTR_HOT inline void netlist_matrix_solver_t::step(const netlist_time delta)
63	63	{
64		const double dd = delta.as_double();
65		for (dev_list_t::entry_t *p = m_steps.first(); p != NULL; p = m_steps.next(p))
66		p->object()->step_time(dd);
	64	const double dd = delta.as_double();
	65	for (dev_list_t::entry_t *p = m_steps.first(); p != NULL; p = m_steps.next(p))
	66	p->object()->step_time(dd);
67	67	}
68	68
69	69	ATTR_HOT inline void netlist_matrix_solver_t::update_inputs()
70	70	{
71		for (dev_list_t::entry_t *p = m_inps.first(); p != NULL; p = m_inps.next(p))
72		p->object()->update_dev();
	71	for (dev_list_t::entry_t *p = m_inps.first(); p != NULL; p = m_inps.next(p))
	72	p->object()->update_dev();
73	73	}
74	74
75	75
76	76	ATTR_HOT inline bool netlist_matrix_solver_t::solve()
77	77	{
78		bool resched = false;
	78	bool resched = false;
79	79
80		/* update all non-linear devices */
81		for (dev_list_t::entry_t *p = m_dynamic.first(); p != NULL; p = m_dynamic.next(p))
82		switch (p->object()->family())
83		{
84		case netlist_device_t::DIODE:
85		static_cast<NETLIB_NAME(D) *>(p->object())->update_terminals();
86		break;
87		default:
88		p->object()->update_terminals();
89		break;
90		}
	80	/* update all non-linear devices */
	81	for (dev_list_t::entry_t *p = m_dynamic.first(); p != NULL; p = m_dynamic.next(p))
	82	switch (p->object()->family())
	83	{
	84	case netlist_device_t::DIODE:
	85	static_cast<NETLIB_NAME(D) *>(p->object())->update_terminals();
	86	break;
	87	default:
	88	p->object()->update_terminals();
	89	break;
	90	}
91	91
92		for (netlist_net_t::list_t::entry_t *pn = m_nets.first(); pn != NULL; pn = m_nets.next(pn))
93		{
94		netlist_net_t *net = pn->object();
	92	for (netlist_net_t::list_t::entry_t *pn = m_nets.first(); pn != NULL; pn = m_nets.next(pn))
	93	{
	94	netlist_net_t *net = pn->object();
95	95
96		double gtot = 0;
97		double gabs = 0;
98		double iIdr = 0;
99		const netlist_net_t::terminal_list_t &terms = net->m_terms;
	96	double gtot = 0;
	97	double gabs = 0;
	98	double iIdr = 0;
	99	const netlist_net_t::terminal_list_t &terms = net->m_terms;
100	100	#if 1
101		switch (terms.count())
102		{
103		case 1:
104		{
105		const netlist_terminal_t *pt = terms.first()->object();
106		gtot = pt->m_gt;
107		gabs = fabs(pt->m_go);
108		iIdr = pt->m_Idr + pt->m_go * pt->m_otherterm->net().Q_Analog();
109		}
110		break;
111		case 2:
112		{
113		const netlist_terminal_t *pt1 = terms[0];
114		const netlist_terminal_t *pt2 = terms[1];
115		gtot = pt1->m_gt + pt2->m_gt;
116		gabs = fabs(pt1->m_go) + fabs(pt2->m_go);
117		iIdr = pt1->m_Idr + pt1->m_go * pt1->m_otherterm->net().Q_Analog()
118		+ pt2->m_Idr + pt2->m_go * pt2->m_otherterm->net().Q_Analog();
119		}
120		break;
121		case 3:
122		{
123		const netlist_terminal_t *pt1 = terms[0];
124		const netlist_terminal_t *pt2 = terms[1];
125		const netlist_terminal_t *pt3 = terms[2];
126		gtot = pt1->m_gt + pt2->m_gt + pt3->m_gt;
127		gabs = fabs(pt1->m_go) + fabs(pt2->m_go) + fabs(pt3->m_go);
128		iIdr = pt1->m_Idr + pt1->m_go * pt1->m_otherterm->net().Q_Analog()
129		+ pt2->m_Idr + pt2->m_go * pt2->m_otherterm->net().Q_Analog()
130		+ pt3->m_Idr + pt3->m_go * pt3->m_otherterm->net().Q_Analog();
131		}
132		break;
133		default:
134		for (netlist_net_t::terminal_list_t::entry_t *e = terms.first(); e != NULL; e = terms.next(e))
135		{
136		netlist_terminal_t *pt = e->object();
137		gtot += pt->m_gt;
138		gabs += fabs(pt->m_go);
139		iIdr += pt->m_Idr + pt->m_go * pt->m_otherterm->net().Q_Analog();
140		}
141		break;
142		}
	101	switch (terms.count())
	102	{
	103	case 1:
	104	{
	105	const netlist_terminal_t *pt = terms.first()->object();
	106	gtot = pt->m_gt;
	107	gabs = fabs(pt->m_go);
	108	iIdr = pt->m_Idr + pt->m_go * pt->m_otherterm->net().Q_Analog();
	109	}
	110	break;
	111	case 2:
	112	{
	113	const netlist_terminal_t *pt1 = terms[0];
	114	const netlist_terminal_t *pt2 = terms[1];
	115	gtot = pt1->m_gt + pt2->m_gt;
	116	gabs = fabs(pt1->m_go) + fabs(pt2->m_go);
	117	iIdr = pt1->m_Idr + pt1->m_go * pt1->m_otherterm->net().Q_Analog()
	118	+ pt2->m_Idr + pt2->m_go * pt2->m_otherterm->net().Q_Analog();
	119	}
	120	break;
	121	case 3:
	122	{
	123	const netlist_terminal_t *pt1 = terms[0];
	124	const netlist_terminal_t *pt2 = terms[1];
	125	const netlist_terminal_t *pt3 = terms[2];
	126	gtot = pt1->m_gt + pt2->m_gt + pt3->m_gt;
	127	gabs = fabs(pt1->m_go) + fabs(pt2->m_go) + fabs(pt3->m_go);
	128	iIdr = pt1->m_Idr + pt1->m_go * pt1->m_otherterm->net().Q_Analog()
	129	+ pt2->m_Idr + pt2->m_go * pt2->m_otherterm->net().Q_Analog()
	130	+ pt3->m_Idr + pt3->m_go * pt3->m_otherterm->net().Q_Analog();
	131	}
	132	break;
	133	default:
	134	for (netlist_net_t::terminal_list_t::entry_t *e = terms.first(); e != NULL; e = terms.next(e))
	135	{
	136	netlist_terminal_t *pt = e->object();
	137	gtot += pt->m_gt;
	138	gabs += fabs(pt->m_go);
	139	iIdr += pt->m_Idr + pt->m_go * pt->m_otherterm->net().Q_Analog();
	140	}
	141	break;
	142	}
143	143	#else
144		for (netlist_net_t::terminal_list_t::entry_t *e = terms.first(); e != NULL; e = terms.next(e))
145		{
146		netlist_terminal_t *pt = e->object();
147		gtot += pt->m_gt;
148		gabs += fabs(pt->m_go);
149		iIdr += pt->m_Idr + pt->m_go * pt->m_otherterm->net().Q_Analog();
150		}
	144	for (netlist_net_t::terminal_list_t::entry_t *e = terms.first(); e != NULL; e = terms.next(e))
	145	{
	146	netlist_terminal_t *pt = e->object();
	147	gtot += pt->m_gt;
	148	gabs += fabs(pt->m_go);
	149	iIdr += pt->m_Idr + pt->m_go * pt->m_otherterm->net().Q_Analog();
	150	}
151	151	#endif
152		double new_val;
153		gabs *= m_convergence_factor;
154		if (gabs > gtot)
155		new_val = (net->m_cur.Analog * gabs + iIdr) / (gtot + gabs);
156		else
157		new_val = iIdr / gtot;
	152	double new_val;
	153	gabs *= m_convergence_factor;
	154	if (gabs > gtot)
	155	new_val = (net->m_cur.Analog * gabs + iIdr) / (gtot + gabs);
	156	else
	157	new_val = iIdr / gtot;
158	158
159		if (fabs(new_val - net->m_cur.Analog) > m_accuracy)
160		resched = true;
161		net->m_cur.Analog = net->m_new.Analog = new_val;
	159	if (fabs(new_val - net->m_cur.Analog) > m_accuracy)
	160	resched = true;
	161	net->m_cur.Analog = net->m_new.Analog = new_val;
162	162
163		NL_VERBOSE_OUT(("Info: %d\n", pn->object()->m_num_cons));
164		//NL_VERBOSE_OUT(("New: %lld %f %f\n", netlist().time().as_raw(), netlist().time().as_double(), new_val));
165		}
166		return resched;
	163	NL_VERBOSE_OUT(("Info: %d\n", pn->object()->m_num_cons));
	164	//NL_VERBOSE_OUT(("New: %lld %f %f\n", netlist().time().as_raw(), netlist().time().as_double(), new_val));
	165	}
	166	return resched;
167	167	}
168	168
169	169	// ----------------------------------------------------------------------------------------
r26736	r26737
174	174
175	175	static bool already_processed(net_groups_t groups, int &cur_group, netlist_net_t *net)
176	176	{
177		if (net->isRailNet())
178		return true;
179		for (int i = 0; i <= cur_group; i++)
180		{
181		if (groups[i].contains(net))
182		return true;
183		}
184		return false;
	177	if (net->isRailNet())
	178	return true;
	179	for (int i = 0; i <= cur_group; i++)
	180	{
	181	if (groups[i].contains(net))
	182	return true;
	183	}
	184	return false;
185	185	}
186	186
187	187	static void process_net(net_groups_t groups, int &cur_group, netlist_net_t *net)
188	188	{
189		/* add the net */
190		if (net->m_head == NULL)
191		return;
192		groups[cur_group].add(net);
193		for (netlist_core_terminal_t *p = net->m_head; p != NULL; p = p->m_update_list_next)
194		{
195		if (p->isType(netlist_terminal_t::TERMINAL))
196		{
197		netlist_terminal_t pt = static_cast<netlist_terminal_t >(p);
198		netlist_net_t *nnet = &pt->m_otherterm->net();
199		if (!already_processed(groups, cur_group, nnet))
200		process_net(groups, cur_group, nnet);
201		}
202		}
	189	/* add the net */
	190	if (net->m_head == NULL)
	191	return;
	192	groups[cur_group].add(net);
	193	for (netlist_core_terminal_t *p = net->m_head; p != NULL; p = p->m_update_list_next)
	194	{
	195	if (p->isType(netlist_terminal_t::TERMINAL))
	196	{
	197	netlist_terminal_t pt = static_cast<netlist_terminal_t >(p);
	198	netlist_net_t *nnet = &pt->m_otherterm->net();
	199	if (!already_processed(groups, cur_group, nnet))
	200	process_net(groups, cur_group, nnet);
	201	}
	202	}
203	203	}
204	204
205	205
206	206	NETLIB_START(solver)
207	207	{
208		register_output("Q_sync", m_Q_sync);
209		register_output("Q_step", m_Q_step);
210		//register_input("FB", m_feedback);
	208	register_output("Q_sync", m_Q_sync);
	209	register_output("Q_step", m_Q_step);
	210	//register_input("FB", m_feedback);
211	211
212		register_param("SYNC_DELAY", m_sync_delay, NLTIME_FROM_NS(10).as_double());
213		m_nt_sync_delay = m_sync_delay.Value();
	212	register_param("SYNC_DELAY", m_sync_delay, NLTIME_FROM_NS(10).as_double());
	213	m_nt_sync_delay = m_sync_delay.Value();
214	214
215		register_param("FREQ", m_freq, 48000.0);
216		m_inc = netlist_time::from_hz(m_freq.Value());
	215	register_param("FREQ", m_freq, 48000.0);
	216	m_inc = netlist_time::from_hz(m_freq.Value());
217	217
218		register_param("ACCURACY", m_accuracy, 1e-3);
219		register_param("CONVERG", m_convergence, 0.3);
	218	register_param("ACCURACY", m_accuracy, 1e-3);
	219	register_param("CONVERG", m_convergence, 0.3);
220	220
221		// internal staff
	221	// internal staff
222	222
223		register_input("FB_sync", m_fb_sync, netlist_input_t::STATE_INP_ACTIVE);
224		register_input("FB_step", m_fb_step, netlist_input_t::STATE_INP_ACTIVE);
	223	register_input("FB_sync", m_fb_sync, netlist_input_t::STATE_INP_ACTIVE);
	224	register_input("FB_step", m_fb_step, netlist_input_t::STATE_INP_ACTIVE);
225	225
226		setup().connect(m_fb_sync, m_Q_sync);
227		setup().connect(m_fb_step, m_Q_step);
	226	setup().connect(m_fb_sync, m_Q_sync);
	227	setup().connect(m_fb_step, m_Q_step);
228	228
229		m_last_step = netlist_time::zero;
	229	m_last_step = netlist_time::zero;
230	230
231		save(NAME(m_last_step));
	231	save(NAME(m_last_step));
232	232
233	233	}
234	234
235	235	NETLIB_UPDATE_PARAM(solver)
236	236	{
237		m_inc = netlist_time::from_hz(m_freq.Value());
	237	m_inc = netlist_time::from_hz(m_freq.Value());
238	238	}
239	239
240	240	NETLIB_NAME(solver)::~NETLIB_NAME(solver)()
241	241	{
242		netlist_matrix_solver_t::list_t::entry_t *e = m_mat_solvers.first();
243		while (e != NULL)
244		{
245		netlist_matrix_solver_t::list_t::entry_t *en = m_mat_solvers.next(e);
246		delete e->object();
247		e = en;
248		}
	242	netlist_matrix_solver_t::list_t::entry_t *e = m_mat_solvers.first();
	243	while (e != NULL)
	244	{
	245	netlist_matrix_solver_t::list_t::entry_t *en = m_mat_solvers.next(e);
	246	delete e->object();
	247	e = en;
	248	}
249	249
250	250	}
251	251
252	252	NETLIB_FUNC_VOID(solver, post_start, ())
253	253	{
254		netlist_net_t::list_t groups[100];
255		int cur_group = -1;
	254	netlist_net_t::list_t groups[100];
	255	int cur_group = -1;
256	256
257		SOLVER_VERBOSE_OUT(("Scanning net groups ...\n"));
258		// determine net groups
259		for (netlist_net_t::list_t::entry_t *pn = netlist().m_nets.first(); pn != NULL; pn = netlist().m_nets.next(pn))
260		{
261		if (!already_processed(groups, cur_group, pn->object()))
262		{
263		cur_group++;
264		process_net(groups, cur_group, pn->object());
265		}
266		}
	257	SOLVER_VERBOSE_OUT(("Scanning net groups ...\n"));
	258	// determine net groups
	259	for (netlist_net_t::list_t::entry_t *pn = netlist().m_nets.first(); pn != NULL; pn = netlist().m_nets.next(pn))
	260	{
	261	if (!already_processed(groups, cur_group, pn->object()))
	262	{
	263	cur_group++;
	264	process_net(groups, cur_group, pn->object());
	265	}
	266	}
267	267
268		// setup the solvers
269		SOLVER_VERBOSE_OUT(("Found %d net groups in %d nets\n", cur_group + 1, m_nets.count()));
270		for (int i = 0; i <= cur_group; i++)
271		{
272		netlist_matrix_solver_t *ms = new netlist_matrix_solver_t();
273		ms->m_accuracy = m_accuracy.Value();
274		ms->m_convergence_factor = m_convergence.Value();
275		ms->setup(groups[i], *this);
276		m_mat_solvers.add(ms);
277		SOLVER_VERBOSE_OUT(("%d ==> %d nets %s\n", i, groups[i].count(), groups[i].first()->object()->m_head->name().cstr()));
278		SOLVER_VERBOSE_OUT((" has %s elements\n", ms->is_dynamic() ? "dynamic" : "no dynamic"));
279		}
	268	// setup the solvers
	269	SOLVER_VERBOSE_OUT(("Found %d net groups in %d nets\n", cur_group + 1, m_nets.count()));
	270	for (int i = 0; i <= cur_group; i++)
	271	{
	272	netlist_matrix_solver_t *ms = new netlist_matrix_solver_t();
	273	ms->m_accuracy = m_accuracy.Value();
	274	ms->m_convergence_factor = m_convergence.Value();
	275	ms->setup(groups[i], *this);
	276	m_mat_solvers.add(ms);
	277	SOLVER_VERBOSE_OUT(("%d ==> %d nets %s\n", i, groups[i].count(), groups[i].first()->object()->m_head->name().cstr()));
	278	SOLVER_VERBOSE_OUT((" has %s elements\n", ms->is_dynamic() ? "dynamic" : "no dynamic"));
	279	}
280	280
281	281	}
282	282
283	283	NETLIB_UPDATE(solver)
284	284	{
285		//m_Q.setToNoCheck(!m_Q.new_Q(), m_inc );
286		//OUTLOGIC(m_Q, !m_Q.net().new_Q(), m_inc );
	285	//m_Q.setToNoCheck(!m_Q.new_Q(), m_inc );
	286	//OUTLOGIC(m_Q, !m_Q.net().new_Q(), m_inc );
287	287
288		bool resched = false;
289		int resched_cnt = 0;
290		netlist_time now = netlist().time();
291		netlist_time delta = now - m_last_step;
	288	bool resched = false;
	289	int resched_cnt = 0;
	290	netlist_time now = netlist().time();
	291	netlist_time delta = now - m_last_step;
292	292
293		if (delta >= m_inc)
294		{
295		NL_VERBOSE_OUT(("Step!\n"));
296		/* update all terminals for new time step */
297		m_last_step = now;
298		for (netlist_matrix_solver_t::list_t::entry_t *e = m_mat_solvers.first(); e != NULL; e = m_mat_solvers.next(e))
299		{
300		e->object()->step(delta);
301		}
302		}
303		bool global_resched = false;
304		for (netlist_matrix_solver_t::list_t::entry_t *e = m_mat_solvers.first(); e != NULL; e = m_mat_solvers.next(e))
305		{
306		resched_cnt = (e->object()->is_dynamic() ? 0 : 1);
307		do {
308		resched = e->object()->solve();
309		resched_cnt++;
310		} while ((resched && (resched_cnt < 5)) \|\| (resched_cnt <= 1));
311		global_resched = global_resched \|\| resched;
312		}
313		//if (global_resched)
314		// printf("rescheduled\n");
315		if (global_resched)
316		{
317		schedule();
318		}
319		else
320		{
321		/* update all inputs connected */
322		for (netlist_matrix_solver_t::list_t::entry_t *e = m_mat_solvers.first(); e != NULL; e = m_mat_solvers.next(e))
323		{
324		e->object()->update_inputs();
325		}
	293	if (delta >= m_inc)
	294	{
	295	NL_VERBOSE_OUT(("Step!\n"));
	296	/* update all terminals for new time step */
	297	m_last_step = now;
	298	for (netlist_matrix_solver_t::list_t::entry_t *e = m_mat_solvers.first(); e != NULL; e = m_mat_solvers.next(e))
	299	{
	300	e->object()->step(delta);
	301	}
	302	}
	303	bool global_resched = false;
	304	for (netlist_matrix_solver_t::list_t::entry_t *e = m_mat_solvers.first(); e != NULL; e = m_mat_solvers.next(e))
	305	{
	306	resched_cnt = (e->object()->is_dynamic() ? 0 : 1);
	307	do {
	308	resched = e->object()->solve();
	309	resched_cnt++;
	310	} while ((resched && (resched_cnt < 5)) \|\| (resched_cnt <= 1));
	311	global_resched = global_resched \|\| resched;
	312	}
	313	//if (global_resched)
	314	// printf("rescheduled\n");
	315	if (global_resched)
	316	{
	317	schedule();
	318	}
	319	else
	320	{
	321	/* update all inputs connected */
	322	for (netlist_matrix_solver_t::list_t::entry_t *e = m_mat_solvers.first(); e != NULL; e = m_mat_solvers.next(e))
	323	{
	324	e->object()->update_inputs();
	325	}
326	326
327		/* step circuit */
328		if (!m_Q_step.net().is_queued())
329		m_Q_step.net().push_to_queue(m_inc);
330		}
	327	/* step circuit */
	328	if (!m_Q_step.net().is_queued())
	329	m_Q_step.net().push_to_queue(m_inc);
	330	}
331	331
332	332	}
333

trunk/src/emu/netlist/devices/nld_7493.h
r26736	r26737
60	60	#include "../nl_base.h"
61	61
62	62	#define TTL_7493(_name, _CLKA, _CLKB, _R1, _R2) \
63		NET_REGISTER_DEV(7493, _name) \
64		NET_CONNECT(_name, CLKA, _CLKA) \
65		NET_CONNECT(_name, CLKB, _CLKB) \
66		NET_CONNECT(_name, R1, _R1) \
67		NET_CONNECT(_name, R2, _R2)
	63	NET_REGISTER_DEV(7493, _name) \
	64	NET_CONNECT(_name, CLKA, _CLKA) \
	65	NET_CONNECT(_name, CLKB, _CLKB) \
	66	NET_CONNECT(_name, R1, _R1) \
	67	NET_CONNECT(_name, R2, _R2)
68	68
69	69	NETLIB_SUBDEVICE(7493ff,
70		netlist_ttl_input_t m_I;
71		netlist_ttl_output_t m_Q;
	70	netlist_ttl_input_t m_I;
	71	netlist_ttl_output_t m_Q;
72	72
73		UINT8 m_reset;
	73	UINT8 m_reset;
74	74	);
75	75
76	76	NETLIB_DEVICE(7493,
77		netlist_ttl_input_t m_R1;
78		netlist_ttl_input_t m_R2;
	77	netlist_ttl_input_t m_R1;
	78	netlist_ttl_input_t m_R2;
79	79
80		NETLIB_NAME(7493ff) A;
81		NETLIB_NAME(7493ff) B;
82		NETLIB_NAME(7493ff) C;
83		NETLIB_NAME(7493ff) D;
	80	NETLIB_NAME(7493ff) A;
	81	NETLIB_NAME(7493ff) B;
	82	NETLIB_NAME(7493ff) C;
	83	NETLIB_NAME(7493ff) D;
84	84	);
85	85
86	86	#endif /* NLD_7493_H_ */

trunk/src/emu/netlist/devices/nld_solver.h
r26736	r26737
14	14	// ----------------------------------------------------------------------------------------
15	15
16	16	#define NETDEV_SOLVER(_name) \
17		NET_REGISTER_DEV(solver, _name)
	17	NET_REGISTER_DEV(solver, _name)
18	18
19	19	// ----------------------------------------------------------------------------------------
20	20	// solver
r26736	r26737
25	25	class netlist_matrix_solver_t
26	26	{
27	27	public:
28		typedef netlist_list_t<netlist_matrix_solver_t *> list_t;
29		typedef netlist_core_device_t::list_t dev_list_t;
	28	typedef netlist_list_t<netlist_matrix_solver_t *> list_t;
	29	typedef netlist_core_device_t::list_t dev_list_t;
30	30
31		ATTR_COLD void setup(netlist_net_t::list_t &nets, NETLIB_NAME(solver) &owner);
	31	ATTR_COLD void setup(netlist_net_t::list_t &nets, NETLIB_NAME(solver) &owner);
32	32
33		// return true if a reschedule is needed ...
34		ATTR_HOT bool solve();
35		ATTR_HOT void step(const netlist_time delta);
36		ATTR_HOT void update_inputs();
	33	// return true if a reschedule is needed ...
	34	ATTR_HOT bool solve();
	35	ATTR_HOT void step(const netlist_time delta);
	36	ATTR_HOT void update_inputs();
37	37
38		ATTR_HOT inline bool is_dynamic() { return m_dynamic.count() > 0; }
	38	ATTR_HOT inline bool is_dynamic() { return m_dynamic.count() > 0; }
39	39
40		inline const NETLIB_NAME(solver) &owner() const;
	40	inline const NETLIB_NAME(solver) &owner() const;
41	41
42		double m_accuracy;
43		double m_convergence_factor;
	42	double m_accuracy;
	43	double m_convergence_factor;
44	44
45	45	private:
46		netlist_net_t::list_t m_nets;
47		dev_list_t m_dynamic;
48		dev_list_t m_inps;
49		dev_list_t m_steps;
	46	netlist_net_t::list_t m_nets;
	47	dev_list_t m_dynamic;
	48	dev_list_t m_inps;
	49	dev_list_t m_steps;
50	50
51		NETLIB_NAME(solver) *m_owner;
	51	NETLIB_NAME(solver) *m_owner;
52	52	};
53	53
54	54	NETLIB_DEVICE_WITH_PARAMS(solver,
55		typedef netlist_core_device_t::list_t dev_list_t;
	55	typedef netlist_core_device_t::list_t dev_list_t;
56	56
57		netlist_ttl_input_t m_fb_sync;
58		netlist_ttl_output_t m_Q_sync;
	57	netlist_ttl_input_t m_fb_sync;
	58	netlist_ttl_output_t m_Q_sync;
59	59
60		netlist_ttl_input_t m_fb_step;
61		netlist_ttl_output_t m_Q_step;
	60	netlist_ttl_input_t m_fb_step;
	61	netlist_ttl_output_t m_Q_step;
62	62
63		netlist_param_double_t m_freq;
64		netlist_param_double_t m_sync_delay;
65		netlist_param_double_t m_accuracy;
66		netlist_param_double_t m_convergence;
	63	netlist_param_double_t m_freq;
	64	netlist_param_double_t m_sync_delay;
	65	netlist_param_double_t m_accuracy;
	66	netlist_param_double_t m_convergence;
67	67
68		netlist_time m_inc;
69		netlist_time m_last_step;
70		netlist_time m_nt_sync_delay;
	68	netlist_time m_inc;
	69	netlist_time m_last_step;
	70	netlist_time m_nt_sync_delay;
71	71
72		netlist_matrix_solver_t::list_t m_mat_solvers;
	72	netlist_matrix_solver_t::list_t m_mat_solvers;
73	73	public:
74	74
75		~NETLIB_NAME(solver)();
	75	~NETLIB_NAME(solver)();
76	76
77		ATTR_HOT inline void schedule();
	77	ATTR_HOT inline void schedule();
78	78
79		ATTR_COLD void post_start();
	79	ATTR_COLD void post_start();
80	80	);
81	81
82	82	inline void NETLIB_NAME(solver)::schedule()
83	83	{
84		// FIXME: time should be parameter;
85		if (!m_Q_sync.net().is_queued())
86		m_Q_sync.net().push_to_queue(m_nt_sync_delay);
	84	// FIXME: time should be parameter;
	85	if (!m_Q_sync.net().is_queued())
	86	m_Q_sync.net().push_to_queue(m_nt_sync_delay);
87	87	}
88	88
89	89	inline const NETLIB_NAME(solver) &netlist_matrix_solver_t::owner() const
90	90	{
91		return *m_owner;
	91	return *m_owner;
92	92	}
93	93
94	94

trunk/src/emu/netlist/devices/nld_log.c
r26736	r26737
10	10
11	11	NETLIB_START(log)
12	12	{
13		register_input("I", m_I);
	13	register_input("I", m_I);
14	14
15		pstring filename = "netlist_" + name() + ".log";
16		m_file = fopen(filename, "w");
	15	pstring filename = "netlist_" + name() + ".log";
	16	m_file = fopen(filename, "w");
17	17	}
18	18
19	19	NETLIB_UPDATE(log)
20	20	{
21		fprintf(m_file, "%e %e\n", netlist().time().as_double(), INPANALOG(m_I));
	21	fprintf(m_file, "%e %e\n", netlist().time().as_double(), INPANALOG(m_I));
22	22	}
23	23
24	24	NETLIB_NAME(log)::~NETLIB_NAME(log)()
25	25	{
26		fclose(m_file);
	26	fclose(m_file);
27	27	}
28	28
29	29	NETLIB_START(logD)
30	30	{
31		NETLIB_NAME(log)::start();
32		register_input("I2", m_I2);
	31	NETLIB_NAME(log)::start();
	32	register_input("I2", m_I2);
33	33	}
34	34
35	35	NETLIB_UPDATE(logD)
36	36	{
37		fprintf(m_file, "%e %e\n", netlist().time().as_double(), INPANALOG(m_I) - INPANALOG(m_I2));
	37	fprintf(m_file, "%e %e\n", netlist().time().as_double(), INPANALOG(m_I) - INPANALOG(m_I2));
38	38	}
39	39
40	40	// FIXME: Implement wav later, this must be clock triggered device where the input to be written
r26736	r26737
42	42	#if 0
43	43	NETLIB_START(wav)
44	44	{
45		register_input("I", m_I);
	45	register_input("I", m_I);
46	46
47		pstring filename = "netlist_" + name() + ".wav";
48		m_file = wav_open(filename, sample_rate(), active_inputs()/2)
	47	pstring filename = "netlist_" + name() + ".wav";
	48	m_file = wav_open(filename, sample_rate(), active_inputs()/2)
49	49	}
50	50
51	51	NETLIB_UPDATE(wav)
52	52	{
53		fprintf(m_file, "%e %e\n", netlist().time().as_double(), INPANALOG(m_I));
	53	fprintf(m_file, "%e %e\n", netlist().time().as_double(), INPANALOG(m_I));
54	54	}
55	55
56	56	NETLIB_NAME(log)::~NETLIB_NAME(wav)()
57	57	{
58		fclose(m_file);
	58	fclose(m_file);
59	59	}
60	60	#endif

trunk/src/emu/netlist/nl_config.h
r26736	r26737
65	65
66	66	// prevent implicit copying
67	67	#define NETLIST_PREVENT_COPYING(_name) \
68		private: \
69		_name(const _name &); \
70		_name &operator=(const _name &); \
71
	68	private: \
	69	_name(const _name &); \
	70	_name &operator=(const _name &);
72	71	#if NL_KEEP_STATISTICS
73	72	#define add_to_stat(v,x) do { v += (x); } while (0)
74	73	#define inc_stat(v) add_to_stat(v, 1)

trunk/src/emu/netlist/nl_base.c
r26736	r26737
22	22
23	23	ATTR_COLD netlist_object_t::~netlist_object_t()
24	24	{
25		//delete m_name;
	25	//delete m_name;
26	26	}
27	27
28	28	ATTR_COLD void netlist_object_t::init_object(netlist_base_t &nl, const pstring &aname)
29	29	{
30		m_netlist = &nl;
31		m_name = aname;
32		save_register();
	30	m_netlist = &nl;
	31	m_name = aname;
	32	save_register();
33	33	}
34	34
35	35	ATTR_COLD const pstring &netlist_object_t::name() const
36	36	{
37		if (m_name == "")
38		netlist().xfatalerror("object not initialized");
39		return m_name;
	37	if (m_name == "")
	38	netlist().xfatalerror("object not initialized");
	39	return m_name;
40	40	}
41	41
42	42	// ----------------------------------------------------------------------------------------
r26736	r26737
44	44	// ----------------------------------------------------------------------------------------
45	45
46	46	ATTR_COLD netlist_owned_object_t::netlist_owned_object_t(const type_t atype,
47		const family_t afamily)
	47	const family_t afamily)
48	48	: netlist_object_t(atype, afamily)
49	49	, m_netdev(NULL)
50	50	{
51	51	}
52	52
53	53	ATTR_COLD void netlist_owned_object_t::init_object(netlist_core_device_t &dev,
54		const pstring &aname)
	54	const pstring &aname)
55	55	{
56		netlist_object_t::init_object(dev.netlist(), aname);
57		m_netdev = &dev;
	56	netlist_object_t::init_object(dev.netlist(), aname);
	57	m_netdev = &dev;
58	58	}
59	59
60	60	// ----------------------------------------------------------------------------------------
r26736	r26737
62	62	// ----------------------------------------------------------------------------------------
63	63
64	64	netlist_base_t::netlist_base_t()
65		: netlist_object_t(NETLIST, GENERIC),
66		m_time_ps(netlist_time::zero),
67		m_rem(0),
68		m_div(NETLIST_DIV),
69		m_mainclock(NULL),
70		m_solver(NULL)
	65	: netlist_object_t(NETLIST, GENERIC),
	66	m_time_ps(netlist_time::zero),
	67	m_rem(0),
	68	m_div(NETLIST_DIV),
	69	m_mainclock(NULL),
	70	m_solver(NULL)
71	71	{
72	72	}
73	73
74	74	template <class T>
75	75	static void tagmap_free_entries(T &tm)
76	76	{
77		for (typename T::entry_t *entry = tm.first(); entry != NULL; entry = tm.next(entry))
78		{
79		delete entry->object();
80		}
81		tm.reset();
	77	for (typename T::entry_t *entry = tm.first(); entry != NULL; entry = tm.next(entry))
	78	{
	79	delete entry->object();
	80	}
	81	tm.reset();
82	82	}
83	83
84	84	netlist_base_t::~netlist_base_t()
85	85	{
86		tagmap_free_entries<tagmap_devices_t>(m_devices);
	86	tagmap_free_entries<tagmap_devices_t>(m_devices);
87	87
88		netlist_net_t::list_t::entry_t *p = m_nets.first();
89		while (p != NULL)
90		{
91		netlist_net_t::list_t::entry_t *pn = m_nets.next(p);
92		if (!p->object()->isRailNet())
93		delete p->object();
94		p = pn;
95		}
	88	netlist_net_t::list_t::entry_t *p = m_nets.first();
	89	while (p != NULL)
	90	{
	91	netlist_net_t::list_t::entry_t *pn = m_nets.next(p);
	92	if (!p->object()->isRailNet())
	93	delete p->object();
	94	p = pn;
	95	}
96	96
97		m_nets.reset();
98		pstring::resetmem();
	97	m_nets.reset();
	98	pstring::resetmem();
99	99	}
100	100
101	101	ATTR_COLD netlist_net_t *netlist_base_t::find_net(const pstring &name)
102	102	{
103		for (netlist_net_t::list_t::entry_t *p = m_nets.first(); p != NULL; p = m_nets.next(p))
104		{
105		if (p->object()->name() == name)
106		return p->object();
107		}
108		return NULL;
	103	for (netlist_net_t::list_t::entry_t *p = m_nets.first(); p != NULL; p = m_nets.next(p))
	104	{
	105	if (p->object()->name() == name)
	106	return p->object();
	107	}
	108	return NULL;
109	109	}
110	110
111	111	ATTR_COLD void netlist_base_t::set_mainclock_dev(NETLIB_NAME(mainclock) *dev)
112	112	{
113		m_mainclock = dev;
	113	m_mainclock = dev;
114	114	}
115	115
116	116	ATTR_COLD void netlist_base_t::set_solver_dev(NETLIB_NAME(solver) *dev)
117	117	{
118		m_solver = dev;
	118	m_solver = dev;
119	119	}
120	120
121	121	ATTR_COLD void netlist_base_t::reset()
122	122	{
123		m_time_ps = netlist_time::zero;
124		m_rem = 0;
125		m_queue.clear();
126		if (m_mainclock != NULL)
127		m_mainclock->m_Q.net().set_time(netlist_time::zero);
	123	m_time_ps = netlist_time::zero;
	124	m_rem = 0;
	125	m_queue.clear();
	126	if (m_mainclock != NULL)
	127	m_mainclock->m_Q.net().set_time(netlist_time::zero);
128	128
129		// FIXME: some const devices rely on this
130		/* make sure params are set now .. */
131		for (tagmap_devices_t::entry_t *entry = m_devices.first(); entry != NULL; entry = m_devices.next(entry))
132		{
133		entry->object()->update_param();
134		}
	129	// FIXME: some const devices rely on this
	130	/* make sure params are set now .. */
	131	for (tagmap_devices_t::entry_t *entry = m_devices.first(); entry != NULL; entry = m_devices.next(entry))
	132	{
	133	entry->object()->update_param();
	134	}
135	135
136		// Step all devices once !
137		for (tagmap_devices_t::entry_t *entry = m_devices.first(); entry != NULL; entry = m_devices.next(entry))
138		{
139		netlist_device_t *dev = entry->object();
140		dev->update_dev();
141		}
	136	// Step all devices once !
	137	for (tagmap_devices_t::entry_t *entry = m_devices.first(); entry != NULL; entry = m_devices.next(entry))
	138	{
	139	netlist_device_t *dev = entry->object();
	140	dev->update_dev();
	141	}
142	142	}
143	143
144	144	void netlist_base_t::set_clock_freq(UINT64 clockfreq)
145	145	{
146		m_div = netlist_time::from_hz(clockfreq).as_raw();
147		m_rem = 0;
148		assert_always(m_div == NETLIST_DIV, "netlist: illegal clock!");
149		NL_VERBOSE_OUT(("Setting clock %" I64FMT "d and divisor %d\n", clockfreq, m_div));
	146	m_div = netlist_time::from_hz(clockfreq).as_raw();
	147	m_rem = 0;
	148	assert_always(m_div == NETLIST_DIV, "netlist: illegal clock!");
	149	NL_VERBOSE_OUT(("Setting clock %" I64FMT "d and divisor %d\n", clockfreq, m_div));
150	150	}
151	151
152	152	ATTR_HOT ATTR_ALIGN inline void netlist_base_t::update_time(const netlist_time t, INT32 &atime)
153	153	{
154		if (NETLIST_DIV_BITS == 0)
155		{
156		const netlist_time delta = t - m_time_ps;
157		m_time_ps = t;
158		atime -= delta.as_raw();
159		} else {
160		const netlist_time delta = t - m_time_ps + netlist_time::from_raw(m_rem);
161		m_time_ps = t;
162		m_rem = delta.as_raw() & NETLIST_MASK;
163		atime -= (delta.as_raw() >> NETLIST_DIV_BITS);
	154	if (NETLIST_DIV_BITS == 0)
	155	{
	156	const netlist_time delta = t - m_time_ps;
	157	m_time_ps = t;
	158	atime -= delta.as_raw();
	159	} else {
	160	const netlist_time delta = t - m_time_ps + netlist_time::from_raw(m_rem);
	161	m_time_ps = t;
	162	m_rem = delta.as_raw() & NETLIST_MASK;
	163	atime -= (delta.as_raw() >> NETLIST_DIV_BITS);
164	164
165		// The folling is suitable for non-power of 2 m_divs ...
166		// atime -= divu_64x32_rem(delta.as_raw(), m_div, &m_rem);
167		}
	165	// The folling is suitable for non-power of 2 m_divs ...
	166	// atime -= divu_64x32_rem(delta.as_raw(), m_div, &m_rem);
	167	}
168	168	}
169	169
170	170	ATTR_HOT ATTR_ALIGN void netlist_base_t::process_queue(INT32 &atime)
171	171	{
172		if (m_mainclock == NULL)
173		{
174		while ( (atime > 0) && (m_queue.is_not_empty()))
175		{
176		const queue_t::entry_t &e = m_queue.pop();
177		update_time(e.time(), atime);
	172	if (m_mainclock == NULL)
	173	{
	174	while ( (atime > 0) && (m_queue.is_not_empty()))
	175	{
	176	const queue_t::entry_t &e = m_queue.pop();
	177	update_time(e.time(), atime);
178	178
179		//if (FATAL_ERROR_AFTER_NS)
180		// NL_VERBOSE_OUT(("%s\n", e.object().netdev()->name().cstr());
	179	//if (FATAL_ERROR_AFTER_NS)
	180	// NL_VERBOSE_OUT(("%s\n", e.object().netdev()->name().cstr());
181	181
182		e.object().update_devs();
	182	e.object().update_devs();
183	183
184		add_to_stat(m_perf_out_processed, 1);
	184	add_to_stat(m_perf_out_processed, 1);
185	185
186		if (FATAL_ERROR_AFTER_NS)
187		if (time() > NLTIME_FROM_NS(FATAL_ERROR_AFTER_NS))
188		xfatalerror("Stopped");
189		}
	186	if (FATAL_ERROR_AFTER_NS)
	187	if (time() > NLTIME_FROM_NS(FATAL_ERROR_AFTER_NS))
	188	xfatalerror("Stopped");
	189	}
190	190
191		if (atime > 0)
192		{
193		m_time_ps += netlist_time::from_raw(atime * m_div);
194		atime = 0;
195		}
196		} else {
197		netlist_net_t &mcQ = m_mainclock->m_Q.net();
198		const netlist_time inc = m_mainclock->m_inc;
	191	if (atime > 0)
	192	{
	193	m_time_ps += netlist_time::from_raw(atime * m_div);
	194	atime = 0;
	195	}
	196	} else {
	197	netlist_net_t &mcQ = m_mainclock->m_Q.net();
	198	const netlist_time inc = m_mainclock->m_inc;
199	199
200		while (atime > 0)
201		{
202		if (m_queue.is_not_empty())
203		{
204		while (m_queue.peek().time() > mcQ.time())
205		{
206		update_time(mcQ.time(), atime);
	200	while (atime > 0)
	201	{
	202	if (m_queue.is_not_empty())
	203	{
	204	while (m_queue.peek().time() > mcQ.time())
	205	{
	206	update_time(mcQ.time(), atime);
207	207
208		NETLIB_NAME(mainclock)::mc_update(mcQ, time() + inc);
	208	NETLIB_NAME(mainclock)::mc_update(mcQ, time() + inc);
209	209
210		}
211		const queue_t::entry_t &e = m_queue.pop();
	210	}
	211	const queue_t::entry_t &e = m_queue.pop();
212	212
213		update_time(e.time(), atime);
	213	update_time(e.time(), atime);
214	214
215		e.object().update_devs();
	215	e.object().update_devs();
216	216
217		} else {
218		update_time(mcQ.time(), atime);
	217	} else {
	218	update_time(mcQ.time(), atime);
219	219
220		NETLIB_NAME(mainclock)::mc_update(mcQ, time() + inc);
221		}
222		if (FATAL_ERROR_AFTER_NS)
223		if (time() > NLTIME_FROM_NS(FATAL_ERROR_AFTER_NS))
224		xfatalerror("Stopped");
	220	NETLIB_NAME(mainclock)::mc_update(mcQ, time() + inc);
	221	}
	222	if (FATAL_ERROR_AFTER_NS)
	223	if (time() > NLTIME_FROM_NS(FATAL_ERROR_AFTER_NS))
	224	xfatalerror("Stopped");
225	225
226		add_to_stat(m_perf_out_processed, 1);
227		}
	226	add_to_stat(m_perf_out_processed, 1);
	227	}
228	228
229		if (atime > 0)
230		{
231		m_time_ps += netlist_time::from_raw(atime * m_div);
232		atime = 0;
233		}
234		}
	229	if (atime > 0)
	230	{
	231	m_time_ps += netlist_time::from_raw(atime * m_div);
	232	atime = 0;
	233	}
	234	}
235	235	}
236	236
237	237	ATTR_COLD void netlist_base_t::xfatalerror(const char *format, ...) const
238	238	{
239		va_list ap;
240		va_start(ap, format);
241		//emu_fatalerror error(format, ap);
242		vfatalerror(format, ap);
243		va_end(ap);
244		//throw error;
	239	va_list ap;
	240	va_start(ap, format);
	241	//emu_fatalerror error(format, ap);
	242	vfatalerror(format, ap);
	243	va_end(ap);
	244	//throw error;
245	245	}
246	246
247	247
r26736	r26737
267	267
268	268	ATTR_COLD void netlist_core_device_t::init(netlist_base_t &anetlist, const pstring &name)
269	269	{
270		init_object(anetlist, name);
	270	init_object(anetlist, name);
271	271
272	272	#if USE_DELEGATES
273	273	#if USE_PMFDELEGATES
274		void (netlist_core_device_t::* pFunc)() = &netlist_core_device_t::update;
275		static_update = reinterpret_cast<net_update_delegate>((this->*pFunc));
	274	void (netlist_core_device_t::* pFunc)() = &netlist_core_device_t::update;
	275	static_update = reinterpret_cast<net_update_delegate>((this->*pFunc));
276	276	#else
277		static_update = net_update_delegate(&netlist_core_device_t::update, "update", this);
278		// get the pointer to the member function
	277	static_update = net_update_delegate(&netlist_core_device_t::update, "update", this);
	278	// get the pointer to the member function
279	279	#endif
280	280	#endif
281	281
r26736	r26737
287	287
288	288	ATTR_HOT ATTR_ALIGN const netlist_sig_t netlist_core_device_t::INPLOGIC_PASSIVE(netlist_logic_input_t &inp)
289	289	{
290		if (inp.state() == netlist_input_t::STATE_INP_PASSIVE)
291		{
292		inp.activate();
293		const netlist_sig_t ret = inp.Q();
294		inp.inactivate();
295		return ret;
296		}
297		else
298		return inp.Q();
	290	if (inp.state() == netlist_input_t::STATE_INP_PASSIVE)
	291	{
	292	inp.activate();
	293	const netlist_sig_t ret = inp.Q();
	294	inp.inactivate();
	295	return ret;
	296	}
	297	else
	298	return inp.Q();
299	299
300	300	}
301	301
r26736	r26737
304	304	// ----------------------------------------------------------------------------------------
305	305
306	306	netlist_device_t::netlist_device_t()
307		: netlist_core_device_t(),
308		m_terminals(20)
	307	: netlist_core_device_t(),
	308	m_terminals(20)
309	309	{
310	310	}
311	311
312	312	netlist_device_t::netlist_device_t(const family_t afamily)
313		: netlist_core_device_t(afamily),
314		m_terminals(20){
	313	: netlist_core_device_t(afamily),
	314	m_terminals(20){
315	315	}
316	316
317	317	netlist_device_t::~netlist_device_t()
318	318	{
319		//NL_VERBOSE_OUT(("~net_device_t\n");
	319	//NL_VERBOSE_OUT(("~net_device_t\n");
320	320	}
321	321
322	322	ATTR_COLD netlist_setup_t &netlist_device_t::setup()
323	323	{
324		return netlist().setup();
	324	return netlist().setup();
325	325	}
326	326
327	327	ATTR_COLD void netlist_device_t::init(netlist_base_t &anetlist, const pstring &name)
328	328	{
329		netlist_core_device_t::init(anetlist, name);
330		start();
	329	netlist_core_device_t::init(anetlist, name);
	330	start();
331	331	}
332	332
333	333
334	334	ATTR_COLD void netlist_device_t::register_sub(netlist_device_t &dev, const pstring &name)
335	335	{
336		dev.init(netlist(), this->name() + "." + name);
	336	dev.init(netlist(), this->name() + "." + name);
337	337	}
338	338
339	339	ATTR_COLD void netlist_device_t::register_subalias(const pstring &name, const netlist_core_terminal_t &term)
340	340	{
341		pstring alias = this->name() + "." + name;
	341	pstring alias = this->name() + "." + name;
342	342
343		setup().register_alias(alias, term.name());
	343	setup().register_alias(alias, term.name());
344	344
345		if (term.isType(netlist_terminal_t::INPUT))
346		m_terminals.add(name);
	345	if (term.isType(netlist_terminal_t::INPUT))
	346	m_terminals.add(name);
347	347	}
348	348
349	349	ATTR_COLD void netlist_device_t::register_terminal(const pstring &name, netlist_terminal_t &port)
350	350	{
351		setup().register_object(this,this,name, port, netlist_terminal_t::STATE_INP_ACTIVE);
	351	setup().register_object(this,this,name, port, netlist_terminal_t::STATE_INP_ACTIVE);
352	352	}
353	353
354	354	ATTR_COLD void netlist_device_t::register_output(const pstring &name, netlist_output_t &port)
355	355	{
356		setup().register_object(this,this,name, port, netlist_terminal_t::STATE_OUT);
	356	setup().register_object(this,this,name, port, netlist_terminal_t::STATE_OUT);
357	357	}
358	358
359	359	ATTR_COLD void netlist_device_t::register_input(const pstring &name, netlist_input_t &inp, netlist_input_t::state_e type)
360	360	{
361		m_terminals.add(name);
362		setup().register_object(this, this, name, inp, type);
	361	m_terminals.add(name);
	362	setup().register_object(this, this, name, inp, type);
363	363	}
364	364
365	365	//FIXME: Get rid of this
366	366	static void init_term(netlist_core_device_t &dev, netlist_core_terminal_t &term, netlist_input_t::state_e aState)
367	367	{
368		if (!term.isInitalized())
369		{
370		switch (term.type())
371		{
372		case netlist_terminal_t::OUTPUT:
373		dynamic_cast<netlist_output_t &>(term).init_object(dev, dev.name() + ".INTOUT");
374		break;
375		case netlist_terminal_t::INPUT:
376		dynamic_cast<netlist_input_t &>(term).init_object(dev, dev.name() + ".INTINP", aState);
377		break;
378		case netlist_terminal_t::TERMINAL:
379		dynamic_cast<netlist_terminal_t &>(term).init_object(dev, dev.name() + ".INTTERM", aState);
380		break;
381		default:
382		dev.netlist().xfatalerror("Unknown terminal type");
383		break;
384		}
385		}
	368	if (!term.isInitalized())
	369	{
	370	switch (term.type())
	371	{
	372	case netlist_terminal_t::OUTPUT:
	373	dynamic_cast<netlist_output_t &>(term).init_object(dev, dev.name() + ".INTOUT");
	374	break;
	375	case netlist_terminal_t::INPUT:
	376	dynamic_cast<netlist_input_t &>(term).init_object(dev, dev.name() + ".INTINP", aState);
	377	break;
	378	case netlist_terminal_t::TERMINAL:
	379	dynamic_cast<netlist_terminal_t &>(term).init_object(dev, dev.name() + ".INTTERM", aState);
	380	break;
	381	default:
	382	dev.netlist().xfatalerror("Unknown terminal type");
	383	break;
	384	}
	385	}
386	386	}
387	387
388	388	// FIXME: Revise internal links ...
389	389	//FIXME: Get rid of this
390	390	ATTR_COLD void netlist_device_t::register_link_internal(netlist_core_device_t &dev, netlist_input_t &in, netlist_output_t &out, const netlist_input_t::state_e aState)
391	391	{
392		init_term(dev, in, aState);
393		init_term(dev, out, aState);
394		setup().connect(in, out);
	392	init_term(dev, in, aState);
	393	init_term(dev, out, aState);
	394	setup().connect(in, out);
395	395	}
396	396
397	397	ATTR_COLD void netlist_device_t::register_link_internal(netlist_input_t &in, netlist_output_t &out, const netlist_input_t::state_e aState)
398	398	{
399		register_link_internal(*this, in, out, aState);
	399	register_link_internal(*this, in, out, aState);
400	400	}
401	401
402	402	template <class C, class T>
403	403	ATTR_COLD void netlist_device_t::register_param(netlist_core_device_t &dev, const pstring &sname, C &param, const T initialVal)
404	404	{
405		pstring fullname = dev.name() + "." + sname;
406		param.init_object(dev, fullname);
407		param.initial(initialVal);
408		//FIXME: pass fullname from above
409		setup().register_object(this, this, fullname, param, netlist_terminal_t::STATE_NONEX);
	405	pstring fullname = dev.name() + "." + sname;
	406	param.init_object(dev, fullname);
	407	param.initial(initialVal);
	408	//FIXME: pass fullname from above
	409	setup().register_object(this, this, fullname, param, netlist_terminal_t::STATE_NONEX);
410	410	}
411	411
412	412	template ATTR_COLD void netlist_device_t::register_param(netlist_core_device_t &dev, const pstring &sname, netlist_param_double_t &param, const double initialVal);
r26736	r26737
422	422	// ----------------------------------------------------------------------------------------
423	423
424	424	ATTR_COLD netlist_net_t::netlist_net_t(const type_t atype, const family_t afamily)
425		: netlist_object_t(atype, afamily)
426		, m_head(NULL)
427		, m_num_cons(0)
428		, m_time(netlist_time::zero)
429		, m_active(0)
430		, m_in_queue(2)
431		, m_railterminal(NULL)
	425	: netlist_object_t(atype, afamily)
	426	, m_head(NULL)
	427	, m_num_cons(0)
	428	, m_time(netlist_time::zero)
	429	, m_active(0)
	430	, m_in_queue(2)
	431	, m_railterminal(NULL)
432	432	{
433	433	};
434	434
435	435	ATTR_COLD void netlist_net_t::init_object(netlist_base_t &nl, const pstring &aname)
436	436	{
437		netlist_object_t::init_object(nl, aname);
438		nl.m_nets.add(this);
	437	netlist_object_t::init_object(nl, aname);
	438	nl.m_nets.add(this);
439	439	}
440	440
441	441	ATTR_COLD void netlist_net_t::register_railterminal(netlist_output_t &mr)
442	442	{
443		assert(m_railterminal == NULL);
444		m_railterminal = &mr;
	443	assert(m_railterminal == NULL);
	444	m_railterminal = &mr;
445	445	}
446	446
447	447	ATTR_COLD void netlist_net_t::merge_net(netlist_net_t *othernet)
448	448	{
449		NL_VERBOSE_OUT(("merging nets ...\n"));
450		if (othernet == NULL)
451		return; // Nothing to do
	449	NL_VERBOSE_OUT(("merging nets ...\n"));
	450	if (othernet == NULL)
	451	return; // Nothing to do
452	452
453		if (this->isRailNet() && othernet->isRailNet())
454		netlist().xfatalerror("Trying to merge to rail nets\n");
	453	if (this->isRailNet() && othernet->isRailNet())
	454	netlist().xfatalerror("Trying to merge to rail nets\n");
455	455
456		if (othernet->isRailNet())
457		{
458		NL_VERBOSE_OUT(("othernet is railnet\n"));
459		othernet->merge_net(this);
460		}
461		else
462		{
463		netlist_core_terminal_t *p = othernet->m_head;
464		while (p != NULL)
465		{
466		netlist_core_terminal_t *pn = p->m_update_list_next;
467		register_con(*p);
468		p = pn;
469		}
	456	if (othernet->isRailNet())
	457	{
	458	NL_VERBOSE_OUT(("othernet is railnet\n"));
	459	othernet->merge_net(this);
	460	}
	461	else
	462	{
	463	netlist_core_terminal_t *p = othernet->m_head;
	464	while (p != NULL)
	465	{
	466	netlist_core_terminal_t *pn = p->m_update_list_next;
	467	register_con(*p);
	468	p = pn;
	469	}
470	470
471		othernet->m_head = NULL; // FIXME: othernet needs to be free'd from memory
472		}
	471	othernet->m_head = NULL; // FIXME: othernet needs to be free'd from memory
	472	}
473	473	}
474	474
475	475	ATTR_COLD void netlist_net_t::register_con(netlist_core_terminal_t &terminal)
476	476	{
477		terminal.set_net(*this);
	477	terminal.set_net(*this);
478	478
479		terminal.m_update_list_next = m_head;
480		m_head = &terminal;
481		m_num_cons++;
	479	terminal.m_update_list_next = m_head;
	480	m_head = &terminal;
	481	m_num_cons++;
482	482
483		if (terminal.state() != netlist_input_t::STATE_INP_PASSIVE)
484		m_active++;
	483	if (terminal.state() != netlist_input_t::STATE_INP_PASSIVE)
	484	m_active++;
485	485	}
486	486
487	487	ATTR_HOT inline void netlist_net_t::update_dev(const netlist_core_terminal_t *inp, const UINT32 mask) const
488	488	{
489		if ((inp->state() & mask) != 0)
490		{
491		netlist_core_device_t &netdev = inp->netdev();
492		begin_timing(netdev.total_time);
493		inc_stat(netdev.stat_count);
494		netdev.update_dev();
495		end_timing(netdev().total_time);
496		}
	489	if ((inp->state() & mask) != 0)
	490	{
	491	netlist_core_device_t &netdev = inp->netdev();
	492	begin_timing(netdev.total_time);
	493	inc_stat(netdev.stat_count);
	494	netdev.update_dev();
	495	end_timing(netdev().total_time);
	496	}
497	497	}
498	498
499	499	ATTR_HOT inline void netlist_net_t::update_devs()
500	500	{
501		assert(m_num_cons != 0);
	501	assert(m_num_cons != 0);
502	502
503		assert(this->isRailNet());
504		{
	503	assert(this->isRailNet());
	504	{
	505	const UINT32 masks[4] = { 1, 5, 3, 1 };
	506	m_cur = m_new;
	507	m_in_queue = 2; /* mark as taken ... */
505	508
506		const UINT32 masks[4] = { 1, 5, 3, 1 };
507		m_cur = m_new;
508		m_in_queue = 2; /* mark as taken ... */
	509	const UINT32 mask = masks[ (m_last.Q << 1) \| m_cur.Q ];
509	510
510		const UINT32 mask = masks[ (m_last.Q << 1) \| m_cur.Q ];
511
512		netlist_core_terminal_t *p = m_head;
513		switch (m_num_cons)
514		{
515		case 2:
516		update_dev(p, mask);
517		p = p->m_update_list_next;
518		case 1:
519		update_dev(p, mask);
520		break;
521		default:
522		do
523		{
524		update_dev(p, mask);
525		p = p->m_update_list_next;
526		} while (p != NULL);
527		break;
528		}
529		m_last = m_cur;
530		}
	511	netlist_core_terminal_t *p = m_head;
	512	switch (m_num_cons)
	513	{
	514	case 2:
	515	update_dev(p, mask);
	516	p = p->m_update_list_next;
	517	case 1:
	518	update_dev(p, mask);
	519	break;
	520	default:
	521	do
	522	{
	523	update_dev(p, mask);
	524	p = p->m_update_list_next;
	525	} while (p != NULL);
	526	break;
	527	}
	528	m_last = m_cur;
	529	}
531	530	}
532	531
533	532	// ----------------------------------------------------------------------------------------
r26736	r26737
540	539	, m_net(NULL)
541	540	, m_state(STATE_NONEX)
542	541	{
543
544	542	}
545	543
546	544	ATTR_COLD netlist_terminal_t::netlist_terminal_t()
r26736	r26737
549	547	, m_go(NETLIST_GMIN)
550	548	, m_gt(NETLIST_GMIN)
551	549	{
552
553	550	}
554	551
555	552	ATTR_COLD void netlist_core_terminal_t::init_object(netlist_core_device_t &dev, const pstring &aname, const state_e astate)
556	553	{
557		set_state(astate);
558		netlist_owned_object_t::init_object(dev, aname);
	554	set_state(astate);
	555	netlist_owned_object_t::init_object(dev, aname);
559	556	}
560	557
561	558	ATTR_COLD void netlist_core_terminal_t::set_net(netlist_net_t &anet)
562	559	{
563		m_net = &anet;
	560	m_net = &anet;
564	561	}
565	562
566	563	// ----------------------------------------------------------------------------------------
r26736	r26737
572	569	// ----------------------------------------------------------------------------------------
573	570
574	571	netlist_output_t::netlist_output_t(const type_t atype, const family_t afamily)
575		: netlist_core_terminal_t(atype, afamily)
576		, m_low_V(0.0)
577		, m_high_V(0.0)
578		, m_my_net(NET, afamily)
	572	: netlist_core_terminal_t(atype, afamily)
	573	, m_low_V(0.0)
	574	, m_high_V(0.0)
	575	, m_my_net(NET, afamily)
579	576	{
580		//m_net = new net_net_t(NET_DIGITAL);
581		this->set_net(m_my_net);
	577	//m_net = new net_net_t(NET_DIGITAL);
	578	this->set_net(m_my_net);
582	579	}
583	580
584	581	ATTR_COLD void netlist_output_t::init_object(netlist_core_device_t &dev, const pstring &aname)
585	582	{
586		netlist_core_terminal_t::init_object(dev, aname, STATE_OUT);
587		net().init_object(dev.netlist(), aname + ".net");
588		net().register_railterminal(*this);
	583	netlist_core_terminal_t::init_object(dev, aname, STATE_OUT);
	584	net().init_object(dev.netlist(), aname + ".net");
	585	net().register_railterminal(*this);
589	586	}
590	587
591	588	ATTR_COLD void netlist_logic_output_t::initial(const netlist_sig_t val)
592	589	{
593		net().m_cur.Q = val;
594		net().m_new.Q = val;
595		net().m_last.Q = !val;
	590	net().m_cur.Q = val;
	591	net().m_new.Q = val;
	592	net().m_last.Q = !val;
596	593	}
597	594
598	595	ATTR_COLD netlist_logic_output_t::netlist_logic_output_t()
599		: netlist_output_t(OUTPUT, LOGIC)
	596	: netlist_output_t(OUTPUT, LOGIC)
600	597	{
601		// Default to TTL
602		m_low_V = 0.1; // these depend on sinked/sourced current. Values should be suitable for typical applications.
603		m_high_V = 4.8;
	598	// Default to TTL
	599	m_low_V = 0.1; // these depend on sinked/sourced current. Values should be suitable for typical applications.
	600	m_high_V = 4.8;
604	601	}
605	602
606	603	ATTR_COLD void netlist_logic_output_t::set_levels(const double low, const double high)
607	604	{
608		m_low_V = low;
609		m_high_V = high;
	605	m_low_V = low;
	606	m_high_V = high;
610	607	}
611	608
612	609	// ----------------------------------------------------------------------------------------
r26736	r26737
614	611	// ----------------------------------------------------------------------------------------
615	612
616	613	ATTR_COLD netlist_ttl_output_t::netlist_ttl_output_t()
617		: netlist_logic_output_t()
	614	: netlist_logic_output_t()
618	615	{
619		set_levels(0.3, 3.4);
	616	set_levels(0.3, 3.4);
620	617	}
621	618
622	619	// ----------------------------------------------------------------------------------------
r26736	r26737
624	621	// ----------------------------------------------------------------------------------------
625	622
626	623	ATTR_COLD netlist_analog_output_t::netlist_analog_output_t()
627		: netlist_output_t(OUTPUT, ANALOG)
	624	: netlist_output_t(OUTPUT, ANALOG)
628	625	{
629		net().m_cur.Analog = 0.0;
630		net().m_new.Analog = 99.0;
	626	net().m_cur.Analog = 0.0;
	627	net().m_new.Analog = 99.0;
631	628	}
632	629
633	630	ATTR_COLD void netlist_analog_output_t::initial(const double val)
634	631	{
635		net().m_cur.Analog = val;
636		net().m_new.Analog = 99.0;
	632	net().m_cur.Analog = val;
	633	net().m_new.Analog = 99.0;
637	634	}
638	635
639	636	// ----------------------------------------------------------------------------------------
r26736	r26737
641	638	// ----------------------------------------------------------------------------------------
642	639
643	640	ATTR_COLD netlist_param_t::netlist_param_t(const param_type_t atype)
644		: netlist_owned_object_t(PARAM, ANALOG)
645		, m_param_type(atype)
	641	: netlist_owned_object_t(PARAM, ANALOG)
	642	, m_param_type(atype)
646	643	{
647	644	}
648	645
649	646	ATTR_COLD netlist_param_double_t::netlist_param_double_t()
650		: netlist_param_t(DOUBLE)
651		, m_param(0.0)
	647	: netlist_param_t(DOUBLE)
	648	, m_param(0.0)
652	649	{
653	650	}
654	651
655	652	ATTR_COLD netlist_param_int_t::netlist_param_int_t()
656		: netlist_param_t(INTEGER)
657		, m_param(0)
	653	: netlist_param_t(INTEGER)
	654	, m_param(0)
658	655	{
659	656	}
660	657
661	658	ATTR_COLD netlist_param_logic_t::netlist_param_logic_t()
662		: netlist_param_int_t()
	659	: netlist_param_int_t()
663	660	{
664	661	}
665	662
666	663	ATTR_COLD netlist_param_str_t::netlist_param_str_t()
667		: netlist_param_t(STRING)
668		, m_param("")
	664	: netlist_param_t(STRING)
	665	, m_param("")
669	666	{
670	667	}
671	668
672	669	ATTR_COLD netlist_param_model_t::netlist_param_model_t()
673		: netlist_param_t(MODEL)
674		, m_param("")
	670	: netlist_param_t(MODEL)
	671	, m_param("")
675	672	{
676	673	}
677	674
678	675	ATTR_COLD double netlist_param_model_t::dValue(const pstring &entity, const double defval) const
679	676	{
680		pstring tmp = this->Value();
681		// .model 1N914 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)
682		int p = tmp.ucase().find(entity.ucase() + "=");
683		if (p>=0)
684		{
685		int pblank = tmp.find(" ", p);
686		if (pblank < 0) pblank = tmp.len() + 1;
687		tmp = tmp.substr(p, pblank - p);
688		int pequal = tmp.find("=", 0);
689		if (pequal < 0)
690		netlist().xfatalerror("parameter %s misformat in model %s temp %s\n", entity.cstr(), Value().cstr(), tmp.cstr());
691		tmp = tmp.substr(pequal+1);
692		double factor = 1.0;
693		switch (*(tmp.right(1).cstr()))
694		{
695		case 'm': factor = 1e-3; break;
696		case 'u': factor = 1e-6; break;
697		case 'n': factor = 1e-9; break;
698		case 'p': factor = 1e-12; break;
699		case 'f': factor = 1e-15; break;
700		case 'a': factor = 1e-18; break;
	677	pstring tmp = this->Value();
	678	// .model 1N914 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)
	679	int p = tmp.ucase().find(entity.ucase() + "=");
	680	if (p>=0)
	681	{
	682	int pblank = tmp.find(" ", p);
	683	if (pblank < 0) pblank = tmp.len() + 1;
	684	tmp = tmp.substr(p, pblank - p);
	685	int pequal = tmp.find("=", 0);
	686	if (pequal < 0)
	687	netlist().xfatalerror("parameter %s misformat in model %s temp %s\n", entity.cstr(), Value().cstr(), tmp.cstr());
	688	tmp = tmp.substr(pequal+1);
	689	double factor = 1.0;
	690	switch (*(tmp.right(1).cstr()))
	691	{
	692	case 'm': factor = 1e-3; break;
	693	case 'u': factor = 1e-6; break;
	694	case 'n': factor = 1e-9; break;
	695	case 'p': factor = 1e-12; break;
	696	case 'f': factor = 1e-15; break;
	697	case 'a': factor = 1e-18; break;
701	698
702		}
703		if (factor != 1.0)
704		tmp = tmp.left(tmp.len() - 1);
705		return atof(tmp.cstr()) * factor;
706		}
707		else
708		return defval;
	699	}
	700	if (factor != 1.0)
	701	tmp = tmp.left(tmp.len() - 1);
	702	return atof(tmp.cstr()) * factor;
	703	}
	704	else
	705	return defval;
709	706	}
710	707
711	708
r26736	r26737
715	712
716	713	ATTR_HOT inline void NETLIB_NAME(mainclock)::mc_update(netlist_net_t &net, const netlist_time curtime)
717	714	{
718		net.m_new.Q = !net.m_new.Q;
719		net.set_time(curtime);
720		net.update_devs();
	715	net.m_new.Q = !net.m_new.Q;
	716	net.set_time(curtime);
	717	net.update_devs();
721	718	}
722	719
723	720	NETLIB_START(mainclock)
724	721	{
725		register_output("Q", m_Q);
	722	register_output("Q", m_Q);
726	723
727		register_param("FREQ", m_freq, 7159000.0 * 5);
728		m_inc = netlist_time::from_hz(m_freq.Value()*2);
	724	register_param("FREQ", m_freq, 7159000.0 * 5);
	725	m_inc = netlist_time::from_hz(m_freq.Value()*2);
729	726	}
730	727
731	728	NETLIB_UPDATE_PARAM(mainclock)
732	729	{
733		m_inc = netlist_time::from_hz(m_freq.Value()*2);
	730	m_inc = netlist_time::from_hz(m_freq.Value()*2);
734	731	}
735	732
736	733	NETLIB_UPDATE(mainclock)
737	734	{
738		netlist_net_t &net = m_Q.net();
739		// this is only called during setup ...
740		net.m_new.Q = !net.m_new.Q;
741		net.set_time(netlist().time() + m_inc);
	735	netlist_net_t &net = m_Q.net();
	736	// this is only called during setup ...
	737	net.m_new.Q = !net.m_new.Q;
	738	net.set_time(netlist().time() + m_inc);
742	739	}

trunk/src/emu/netlist/pstate.h
r26736	r26737
16	16	// ----------------------------------------------------------------------------------------
17	17
18	18	#define PSTATE_INTERFACE(manager, module) \
19		template<class C> ATTR_COLD void save(C &state, const pstring &stname) \
20		{ \
21		dynamic_cast<pstate_manager_t &>(manager).save_manager(state, module + "." + stname); \
22		}
	19	template<class C> ATTR_COLD void save(C &state, const pstring &stname) \
	20	{ \
	21	dynamic_cast<pstate_manager_t &>(manager).save_manager(state, module + "." + stname); \
	22	}
23	23
24	24	enum netlist_data_type_e {
25		NOT_SUPPORTED,
26		DT_DOUBLE,
27		DT_INT64,
28		DT_INT8,
29		DT_INT,
30		DT_BOOLEAN
	25	NOT_SUPPORTED,
	26	DT_DOUBLE,
	27	DT_INT64,
	28	DT_INT8,
	29	DT_INT,
	30	DT_BOOLEAN
31	31	};
32	32
33	33	template<typename _ItemType> struct nl_datatype { static const netlist_data_type_e type = netlist_data_type_e(NOT_SUPPORTED); };
r26736	r26737
46	46
47	47	struct pstate_entry_t
48	48	{
49		typedef netlist_list_t<pstate_entry_t *> list_t;
	49	typedef netlist_list_t<pstate_entry_t *> list_t;
50	50
51		pstate_entry_t(const pstring &stname, const netlist_data_type_e dt, const int size, const int count, void *ptr) :
52		m_name(stname), m_dt(dt), m_size(size), m_count(count), m_ptr(ptr) { }
53		pstring m_name;
54		netlist_data_type_e m_dt;
55		int m_size;
56		int m_count;
57		void *m_ptr;
	51	pstate_entry_t(const pstring &stname, const netlist_data_type_e dt, const int size, const int count, void *ptr) :
	52	m_name(stname), m_dt(dt), m_size(size), m_count(count), m_ptr(ptr) { }
	53	pstring m_name;
	54	netlist_data_type_e m_dt;
	55	int m_size;
	56	int m_count;
	57	void *m_ptr;
58	58	};
59	59
60	60	class pstate_manager_t
61	61	{
62	62	public:
63	63
64		ATTR_COLD ~pstate_manager_t();
	64	ATTR_COLD ~pstate_manager_t();
65	65
66		template<class C> ATTR_COLD void save_manager(C &state, const pstring &stname)
67		{
68		save_state_ptr(stname, nl_datatype<C>::type, sizeof(C), 1, &state);
69		}
	66	template<class C> ATTR_COLD void save_manager(C &state, const pstring &stname)
	67	{
	68	save_state_ptr(stname, nl_datatype<C>::type, sizeof(C), 1, &state);
	69	}
70	70
71		template<class C> ATTR_COLD void save_manager(C *state, const pstring &stname, const int count)
72		{
73		save_state_ptr(stname, nl_datatype<C>::type, sizeof(C), count, state);
74		}
	71	template<class C> ATTR_COLD void save_manager(C *state, const pstring &stname, const int count)
	72	{
	73	save_state_ptr(stname, nl_datatype<C>::type, sizeof(C), count, state);
	74	}
75	75
76		template<class C, std::size_t N> ATTR_COLD void save_manager(C (&state)[N], const pstring &stname)
77		{
78		save_state_ptr(stname, nl_datatype<C>::type, sizeof(C), N, &(state[0]));
79		}
	76	template<class C, std::size_t N> ATTR_COLD void save_manager(C (&state)[N], const pstring &stname)
	77	{
	78	save_state_ptr(stname, nl_datatype<C>::type, sizeof(C), N, &(state[0]));
	79	}
80	80
81		inline const pstate_entry_t::list_t &save_list() const { return m_save; }
	81	inline const pstate_entry_t::list_t &save_list() const { return m_save; }
82	82
83	83	protected:
84		ATTR_COLD void save_state_ptr(const pstring &stname, const netlist_data_type_e, const int size, const int count, void *ptr);
	84	ATTR_COLD void save_state_ptr(const pstring &stname, const netlist_data_type_e, const int size, const int count, void *ptr);
85	85
86	86	private:
87		pstate_entry_t::list_t m_save;
	87	pstate_entry_t::list_t m_save;
88	88	};
89	89
90	90	template<> ATTR_COLD inline void pstate_manager_t::save_manager(netlist_time &nlt, const pstring &stname)
91	91	{
92		save_state_ptr(stname, DT_INT64, sizeof(netlist_time::INTERNALTYPE), 1, nlt.get_internaltype_ptr());
	92	save_state_ptr(stname, DT_INT64, sizeof(netlist_time::INTERNALTYPE), 1, nlt.get_internaltype_ptr());
93	93	}
94	94
95	95

trunk/src/emu/netlist/nl_base.h
r26736	r26737
192	192	#define NETLIB_UPDATEI() ATTR_HOT ATTR_ALIGN inline void update(void)
193	193
194	194	#define NETLIB_DEVICE_BASE(_name, _pclass, _extra, _priv) \
195		class _name : public _pclass \
196		{ \
197		public: \
198		_name() \
199		: _pclass() { } \
200		protected: \
201		_extra \
202		ATTR_HOT void update(); \
203		ATTR_HOT void start(); \
204		_priv \
205		}
	195	class _name : public _pclass \
	196	{ \
	197	public: \
	198	_name() \
	199	: _pclass() { } \
	200	protected: \
	201	_extra \
	202	ATTR_HOT void update(); \
	203	ATTR_HOT void start(); \
	204	_priv \
	205	}
206	206
207	207	#define NETLIB_DEVICE_DERIVED(_name, _pclass, _priv) \
208	208	NETLIB_DEVICE_BASE(NETLIB_NAME(_name), NETLIB_NAME(_pclass), , _priv)
r26736	r26737
211	211	NETLIB_DEVICE_BASE(NETLIB_NAME(_name), netlist_device_t, , _priv)
212	212
213	213	#define NETLIB_SUBDEVICE(_name, _priv) \
214		class NETLIB_NAME(_name) : public netlist_device_t \
215		{ \
216		public: \
217		NETLIB_NAME(_name) () \
218		: netlist_device_t() \
219		{ } \
220		/protected:/ \
221		ATTR_HOT void update(); \
222		ATTR_HOT void start(); \
223		public: \
224		_priv \
225		}
	214	class NETLIB_NAME(_name) : public netlist_device_t \
	215	{ \
	216	public: \
	217	NETLIB_NAME(_name) () \
	218	: netlist_device_t() \
	219	{ } \
	220	/protected:/ \
	221	ATTR_HOT void update(); \
	222	ATTR_HOT void start(); \
	223	public: \
	224	_priv \
	225	}
226	226
227	227	#define NETLIB_DEVICE_WITH_PARAMS(_name, _priv) \
228		NETLIB_DEVICE_BASE(NETLIB_NAME(_name), netlist_device_t, \
229		ATTR_HOT void update_param(); \
230		, _priv)
	228	NETLIB_DEVICE_BASE(NETLIB_NAME(_name), netlist_device_t, \
	229	ATTR_HOT void update_param(); \
	230	, _priv)
231	231
232	232	#define NETLIB_DEVICE_WITH_PARAMS_DERIVED(_name, _pclass, _priv) \
233		NETLIB_DEVICE_BASE(NETLIB_NAME(_name), NETLIB_NAME(_pclass), \
234		ATTR_HOT void update_param(); \
235		, _priv)
	233	NETLIB_DEVICE_BASE(NETLIB_NAME(_name), NETLIB_NAME(_pclass), \
	234	ATTR_HOT void update_param(); \
	235	, _priv)
236	236
237	237	// ----------------------------------------------------------------------------------------
238	238	// forward definitions
r26736	r26737
253	253
254	254	class netlist_object_t
255	255	{
256		NETLIST_PREVENT_COPYING(netlist_object_t)
	256	NETLIST_PREVENT_COPYING(netlist_object_t)
257	257	public:
258	258	enum type_t {
259		TERMINAL = 0,
	259	TERMINAL = 0,
260	260	INPUT = 1,
261	261	OUTPUT = 2,
262	262	PARAM = 3,
263	263	NET = 4,
264		DEVICE = 5,
265		NETLIST = 6,
	264	DEVICE = 5,
	265	NETLIST = 6,
266	266	};
267		enum family_t {
268		// Terminal families
269		LOGIC = 1,
270		ANALOG = 2,
271		// Device families
272		GENERIC = 3, // <== devices usually fall into this category
273		RESISTOR = 4, // Resistor
274		CAPACITOR = 5, // Capacitor
275		DIODE = 6, // Diode
276		BJT_SWITCH = 7, // BJT(Switch)
277		VCVS = 8, // Voltage controlled voltage source
278		VCCS = 9, // Voltage controlled voltage source
279		};
	267	enum family_t {
	268	// Terminal families
	269	LOGIC = 1,
	270	ANALOG = 2,
	271	// Device families
	272	GENERIC = 3, // <== devices usually fall into this category
	273	RESISTOR = 4, // Resistor
	274	CAPACITOR = 5, // Capacitor
	275	DIODE = 6, // Diode
	276	BJT_SWITCH = 7, // BJT(Switch)
	277	VCVS = 8, // Voltage controlled voltage source
	278	VCCS = 9, // Voltage controlled voltage source
	279	};
280	280
281	281	ATTR_COLD netlist_object_t(const type_t atype, const family_t afamily);
282	282
283	283	virtual ~netlist_object_t();
284	284
285	285	ATTR_COLD void init_object(netlist_base_t &nl, const pstring &aname);
286		ATTR_COLD bool isInitalized() { return (m_netlist != NULL); }
	286	ATTR_COLD bool isInitalized() { return (m_netlist != NULL); }
287	287
288		ATTR_COLD const pstring &name() const;
	288	ATTR_COLD const pstring &name() const;
289	289
290		PSTATE_INTERFACE(*m_netlist, name())
	290	PSTATE_INTERFACE(*m_netlist, name())
291	291
292	292	#if 0
293		template<class C> ATTR_COLD void save(C &state, const pstring &stname)
294		{
295		save_state_ptr(stname, nl_datatype<C>::type, sizeof(C), &state);
296		}
	293	template<class C> ATTR_COLD void save(C &state, const pstring &stname)
	294	{
	295	save_state_ptr(stname, nl_datatype<C>::type, sizeof(C), &state);
	296	}
297	297	#endif
298	298
299	299	ATTR_HOT inline const type_t type() const { return m_objtype; }
300		ATTR_HOT inline const family_t family() const { return m_family; }
	300	ATTR_HOT inline const family_t family() const { return m_family; }
301	301
302	302	ATTR_HOT inline const bool isType(const type_t atype) const { return (m_objtype == atype); }
303		ATTR_HOT inline const bool isFamily(const family_t afamily) const { return (m_family == afamily); }
	303	ATTR_HOT inline const bool isFamily(const family_t afamily) const { return (m_family == afamily); }
304	304
305		ATTR_HOT inline netlist_base_t & RESTRICT netlist() { return *m_netlist; }
306		ATTR_HOT inline const netlist_base_t & RESTRICT netlist() const { return *m_netlist; }
	305	ATTR_HOT inline netlist_base_t & RESTRICT netlist() { return *m_netlist; }
	306	ATTR_HOT inline const netlist_base_t & RESTRICT netlist() const { return *m_netlist; }
307	307
308	308	protected:
309	309
310	310	#if 0
311		// pstate_interface virtual
312		ATTR_COLD virtual void save_state_ptr(const pstring &stname, const netlist_data_type_e, const int size, const int count, void *ptr);
	311	// pstate_interface virtual
	312	ATTR_COLD virtual void save_state_ptr(const pstring &stname, const netlist_data_type_e, const int size, const int count, void *ptr);
313	313	#endif
314	314
315		// must call parent save_register !
316		ATTR_COLD virtual void save_register() { };
	315	// must call parent save_register !
	316	ATTR_COLD virtual void save_register() { };
317	317
318	318	private:
319		pstring m_name;
	319	pstring m_name;
320	320	const type_t m_objtype;
321		const family_t m_family;
322		netlist_base_t * RESTRICT m_netlist;
	321	const family_t m_family;
	322	netlist_base_t * RESTRICT m_netlist;
323	323	};
324	324
325	325	// ----------------------------------------------------------------------------------------
r26736	r26737
328	328
329	329	class netlist_owned_object_t : public netlist_object_t
330	330	{
331		NETLIST_PREVENT_COPYING(netlist_owned_object_t)
	331	NETLIST_PREVENT_COPYING(netlist_owned_object_t)
332	332	public:
333		ATTR_COLD netlist_owned_object_t(const type_t atype, const family_t afamily);
	333	ATTR_COLD netlist_owned_object_t(const type_t atype, const family_t afamily);
334	334
335		ATTR_COLD void init_object(netlist_core_device_t &dev, const pstring &aname);
	335	ATTR_COLD void init_object(netlist_core_device_t &dev, const pstring &aname);
336	336
337		ATTR_HOT inline netlist_core_device_t & RESTRICT netdev() const { return *m_netdev; }
	337	ATTR_HOT inline netlist_core_device_t & RESTRICT netdev() const { return *m_netdev; }
338	338	private:
339		netlist_core_device_t * RESTRICT m_netdev;
	339	netlist_core_device_t * RESTRICT m_netdev;
340	340	};
341	341
342	342	// ----------------------------------------------------------------------------------------
r26736	r26737
345	345
346	346	class netlist_core_terminal_t : public netlist_owned_object_t
347	347	{
348		NETLIST_PREVENT_COPYING(netlist_core_terminal_t)
	348	NETLIST_PREVENT_COPYING(netlist_core_terminal_t)
349	349	public:
350	350
351		/* needed here ... */
	351	/* needed here ... */
352	352
353		enum state_e {
354		STATE_INP_PASSIVE = 0,
355		STATE_INP_ACTIVE = 1,
356		STATE_INP_HL = 2,
357		STATE_INP_LH = 4,
358		STATE_OUT = 128,
359		STATE_NONEX = 256
360		};
	353	enum state_e {
	354	STATE_INP_PASSIVE = 0,
	355	STATE_INP_ACTIVE = 1,
	356	STATE_INP_HL = 2,
	357	STATE_INP_LH = 4,
	358	STATE_OUT = 128,
	359	STATE_NONEX = 256
	360	};
361	361
362	362
363	363	ATTR_COLD netlist_core_terminal_t(const type_t atype, const family_t afamily);
364	364
365	365	ATTR_COLD void init_object(netlist_core_device_t &dev, const pstring &aname, const state_e astate);
366	366
367		ATTR_COLD void set_net(netlist_net_t &anet);
368		ATTR_COLD inline bool has_net() const { return (m_net != NULL); }
369		ATTR_HOT inline const netlist_net_t & RESTRICT net() const { return *m_net;}
370		ATTR_HOT inline netlist_net_t & RESTRICT net() { return *m_net;}
	367	ATTR_COLD void set_net(netlist_net_t &anet);
	368	ATTR_COLD inline bool has_net() const { return (m_net != NULL); }
	369	ATTR_HOT inline const netlist_net_t & RESTRICT net() const { return *m_net;}
	370	ATTR_HOT inline netlist_net_t & RESTRICT net() { return *m_net;}
371	371
372		ATTR_HOT inline const bool is_state(const state_e astate) const { return (m_state == astate); }
373		ATTR_HOT inline const state_e state() const { return m_state; }
374		ATTR_HOT inline void set_state(const state_e astate)
375		{
376		assert(astate != STATE_NONEX);
377		m_state = astate;
378		}
	372	ATTR_HOT inline const bool is_state(const state_e astate) const { return (m_state == astate); }
	373	ATTR_HOT inline const state_e state() const { return m_state; }
	374	ATTR_HOT inline void set_state(const state_e astate)
	375	{
	376	assert(astate != STATE_NONEX);
	377	m_state = astate;
	378	}
379	379
380		netlist_core_terminal_t *m_update_list_next;
	380	netlist_core_terminal_t *m_update_list_next;
381	381
382	382	protected:
383		ATTR_COLD virtual void save_register() { save(NAME(m_state)); netlist_owned_object_t::save_register(); }
	383	ATTR_COLD virtual void save_register() { save(NAME(m_state)); netlist_owned_object_t::save_register(); }
384	384
385	385	private:
386		netlist_net_t * RESTRICT m_net;
387		state_e m_state;
	386	netlist_net_t * RESTRICT m_net;
	387	state_e m_state;
388	388	};
389	389
390	390	NETLIST_SAVE_TYPE(netlist_core_terminal_t::state_e, DT_INT);
r26736	r26737
392	392
393	393	class netlist_terminal_t : public netlist_core_terminal_t
394	394	{
395		NETLIST_PREVENT_COPYING(netlist_terminal_t)
	395	NETLIST_PREVENT_COPYING(netlist_terminal_t)
396	396	public:
397		ATTR_COLD netlist_terminal_t();
	397	ATTR_COLD netlist_terminal_t();
398	398
399		double m_Idr; // drive current
400		double m_go; // conductance for Voltage from other term
401		double m_gt; // conductance for total conductance
	399	double m_Idr; // drive current
	400	double m_go; // conductance for Voltage from other term
	401	double m_gt; // conductance for total conductance
402	402
403		ATTR_HOT inline void set(const double G)
404		{
405		m_Idr = 0;
406		m_go = m_gt = G;
407		}
	403	ATTR_HOT inline void set(const double G)
	404	{
	405	m_Idr = 0;
	406	m_go = m_gt = G;
	407	}
408	408
409		ATTR_HOT inline void set(const double GO, const double GT)
410		{
411		m_Idr = 0;
412		m_go = GO;
413		m_gt = GT;
414		}
	409	ATTR_HOT inline void set(const double GO, const double GT)
	410	{
	411	m_Idr = 0;
	412	m_go = GO;
	413	m_gt = GT;
	414	}
415	415
416		ATTR_HOT inline void set(const double GO, const double GT, const double I)
417		{
418		m_Idr = I;
419		m_go = GO;
420		m_gt = GT;
421		}
	416	ATTR_HOT inline void set(const double GO, const double GT, const double I)
	417	{
	418	m_Idr = I;
	419	m_go = GO;
	420	m_gt = GT;
	421	}
422	422
423	423
424		netlist_terminal_t *m_otherterm;
	424	netlist_terminal_t *m_otherterm;
425	425
426	426	protected:
427		ATTR_COLD virtual void save_register()
428		{
429		save(NAME(m_Idr));
430		save(NAME(m_go));
431		save(NAME(m_gt));
432		netlist_core_terminal_t::save_register();
433		}
	427	ATTR_COLD virtual void save_register()
	428	{
	429	save(NAME(m_Idr));
	430	save(NAME(m_go));
	431	save(NAME(m_gt));
	432	netlist_core_terminal_t::save_register();
	433	}
434	434
435	435	};
436	436
r26736	r26737
446	446
447	447	ATTR_COLD netlist_input_t(const type_t atype, const family_t afamily)
448	448	: netlist_core_terminal_t(atype, afamily)
449		, m_low_thresh_V(0)
450		, m_high_thresh_V(0)
	449	, m_low_thresh_V(0)
	450	, m_high_thresh_V(0)
451	451	{
452		set_state(STATE_INP_ACTIVE);
	452	set_state(STATE_INP_ACTIVE);
453	453	}
454	454
455	455	ATTR_HOT inline void inactivate();
r26736	r26737
521	521
522	522	class netlist_net_t : public netlist_object_t
523	523	{
524		NETLIST_PREVENT_COPYING(netlist_net_t)
	524	NETLIST_PREVENT_COPYING(netlist_net_t)
525	525	public:
526	526
527		typedef netlist_list_t<netlist_net_t *> list_t;
	527	typedef netlist_list_t<netlist_net_t *> list_t;
528	528
529		friend class NETLIB_NAME(mainclock);
530		friend class netlist_matrix_solver_t;
531		friend class netlist_logic_output_t;
532		friend class netlist_analog_output_t;
	529	friend class NETLIB_NAME(mainclock);
	530	friend class netlist_matrix_solver_t;
	531	friend class netlist_logic_output_t;
	532	friend class netlist_analog_output_t;
533	533
534		// FIXME: union does not work
535		struct hybrid_t
536		{
537		inline hybrid_t() : Q(0), Analog(0.0) {}
538		netlist_sig_t Q;
539		double Analog;
540		};
	534	// FIXME: union does not work
	535	struct hybrid_t
	536	{
	537	inline hybrid_t() : Q(0), Analog(0.0) {}
	538	netlist_sig_t Q;
	539	double Analog;
	540	};
541	541
542		ATTR_COLD netlist_net_t(const type_t atype, const family_t afamily);
543		ATTR_COLD void init_object(netlist_base_t &nl, const pstring &aname);
	542	ATTR_COLD netlist_net_t(const type_t atype, const family_t afamily);
	543	ATTR_COLD void init_object(netlist_base_t &nl, const pstring &aname);
544	544
545		ATTR_COLD void register_con(netlist_core_terminal_t &terminal);
546		ATTR_COLD void merge_net(netlist_net_t *othernet);
547		ATTR_COLD void register_railterminal(netlist_output_t &mr);
	545	ATTR_COLD void register_con(netlist_core_terminal_t &terminal);
	546	ATTR_COLD void merge_net(netlist_net_t *othernet);
	547	ATTR_COLD void register_railterminal(netlist_output_t &mr);
548	548
549		/* inline not always works out */
550		ATTR_HOT inline void update_devs();
	549	/* inline not always works out */
	550	ATTR_HOT inline void update_devs();
551	551
552		ATTR_HOT inline const netlist_time time() const { return m_time; }
553		ATTR_HOT inline void set_time(const netlist_time ntime) { m_time = ntime; }
	552	ATTR_HOT inline const netlist_time time() const { return m_time; }
	553	ATTR_HOT inline void set_time(const netlist_time ntime) { m_time = ntime; }
554	554
555		ATTR_HOT inline bool isRailNet() const { return !(m_railterminal == NULL); }
556		ATTR_HOT inline const netlist_core_terminal_t & RESTRICT railterminal() const { return *m_railterminal; }
	555	ATTR_HOT inline bool isRailNet() const { return !(m_railterminal == NULL); }
	556	ATTR_HOT inline const netlist_core_terminal_t & RESTRICT railterminal() const { return *m_railterminal; }
557	557
558		/* Everything below is used by the logic subsystem */
	558	/* Everything below is used by the logic subsystem */
559	559
560		ATTR_HOT inline void inc_active();
561		ATTR_HOT inline void dec_active();
	560	ATTR_HOT inline void inc_active();
	561	ATTR_HOT inline void dec_active();
562	562
563		ATTR_HOT inline const int active_count() const { return m_active; }
	563	ATTR_HOT inline const int active_count() const { return m_active; }
564	564
565		ATTR_HOT inline const netlist_sig_t Q() const
566		{
567		assert(family() == LOGIC);
568		return m_cur.Q;
569		}
	565	ATTR_HOT inline const netlist_sig_t Q() const
	566	{
	567	assert(family() == LOGIC);
	568	return m_cur.Q;
	569	}
570	570
571		ATTR_HOT inline const netlist_sig_t last_Q() const
572		{
573		assert(family() == LOGIC);
574		return m_last.Q;
575		}
	571	ATTR_HOT inline const netlist_sig_t last_Q() const
	572	{
	573	assert(family() == LOGIC);
	574	return m_last.Q;
	575	}
576	576
577		ATTR_HOT inline const netlist_sig_t new_Q() const
578		{
579		assert(family() == LOGIC);
580		return m_new.Q;
581		}
	577	ATTR_HOT inline const netlist_sig_t new_Q() const
	578	{
	579	assert(family() == LOGIC);
	580	return m_new.Q;
	581	}
582	582
583		ATTR_HOT inline const double Q_Analog() const
584		{
585		//assert(object_type(SIGNAL_MASK) == SIGNAL_ANALOG);
586		assert(family() == ANALOG);
587		return m_cur.Analog;
588		}
	583	ATTR_HOT inline const double Q_Analog() const
	584	{
	585	//assert(object_type(SIGNAL_MASK) == SIGNAL_ANALOG);
	586	assert(family() == ANALOG);
	587	return m_cur.Analog;
	588	}
589	589
590		ATTR_HOT inline void push_to_queue(const netlist_time &delay);
591		ATTR_HOT bool is_queued() { return m_in_queue == 1; }
	590	ATTR_HOT inline void push_to_queue(const netlist_time &delay);
	591	ATTR_HOT bool is_queued() { return m_in_queue == 1; }
592	592
593		// m_terms is only used by analog subsystem
594		typedef netlist_list_t<netlist_terminal_t *> terminal_list_t;
	593	// m_terms is only used by analog subsystem
	594	typedef netlist_list_t<netlist_terminal_t *> terminal_list_t;
595	595
596		terminal_list_t m_terms;
597		netlist_matrix_solver_t *m_solver;
	596	terminal_list_t m_terms;
	597	netlist_matrix_solver_t *m_solver;
598	598
599		netlist_core_terminal_t *m_head;
	599	netlist_core_terminal_t *m_head;
600	600
601	601	protected:
602	602
603	603
604		hybrid_t m_last;
605		hybrid_t m_cur;
606		hybrid_t m_new;
	604	hybrid_t m_last;
	605	hybrid_t m_cur;
	606	hybrid_t m_new;
607	607
608		UINT32 m_num_cons;
	608	UINT32 m_num_cons;
609	609
610	610	protected:
611		ATTR_COLD virtual void save_register()
612		{
613		save(NAME(m_last.Analog));
614		save(NAME(m_cur.Analog));
615		save(NAME(m_new.Analog));
616		save(NAME(m_last.Q));
617		save(NAME(m_cur.Q));
618		save(NAME(m_new.Q));
619		save(NAME(m_time));
620		save(NAME(m_active));
621		save(NAME(m_in_queue));
622		netlist_object_t::save_register();
623		}
	611	ATTR_COLD virtual void save_register()
	612	{
	613	save(NAME(m_last.Analog));
	614	save(NAME(m_cur.Analog));
	615	save(NAME(m_new.Analog));
	616	save(NAME(m_last.Q));
	617	save(NAME(m_cur.Q));
	618	save(NAME(m_new.Q));
	619	save(NAME(m_time));
	620	save(NAME(m_active));
	621	save(NAME(m_in_queue));
	622	netlist_object_t::save_register();
	623	}
624	624
625	625	private:
626		ATTR_HOT void update_dev(const netlist_core_terminal_t *inp, const UINT32 mask) const;
	626	ATTR_HOT void update_dev(const netlist_core_terminal_t *inp, const UINT32 mask) const;
627	627
628		netlist_time m_time;
629		INT32 m_active;
630		UINT32 m_in_queue; /* 0: not in queue, 1: in queue, 2: last was taken */
	628	netlist_time m_time;
	629	INT32 m_active;
	630	UINT32 m_in_queue; /* 0: not in queue, 1: in queue, 2: last was taken */
631	631
632		netlist_core_terminal_t * RESTRICT m_railterminal;
	632	netlist_core_terminal_t * RESTRICT m_railterminal;
633	633	};
634	634
635	635
r26736	r26737
639	639
640	640	class netlist_output_t : public netlist_core_terminal_t
641	641	{
642		NETLIST_PREVENT_COPYING(netlist_output_t)
	642	NETLIST_PREVENT_COPYING(netlist_output_t)
643	643	public:
644	644
645	645	ATTR_COLD netlist_output_t(const type_t atype, const family_t afamily);
646	646
647		ATTR_COLD void init_object(netlist_core_device_t &dev, const pstring &aname);
	647	ATTR_COLD void init_object(netlist_core_device_t &dev, const pstring &aname);
648	648
649	649	double m_low_V;
650	650	double m_high_V;
r26736	r26737
658	658
659	659	class netlist_logic_output_t : public netlist_output_t
660	660	{
661		NETLIST_PREVENT_COPYING(netlist_logic_output_t)
	661	NETLIST_PREVENT_COPYING(netlist_logic_output_t)
662	662	public:
663	663
664	664	ATTR_COLD netlist_logic_output_t();
665	665
666	666	ATTR_COLD void initial(const netlist_sig_t val);
667		ATTR_COLD void set_levels(const double low, const double high);
	667	ATTR_COLD void set_levels(const double low, const double high);
668	668
669	669	ATTR_HOT inline void set_Q(const netlist_sig_t newQ, const netlist_time &delay)
670	670	{
671		netlist_net_t &anet = net();
	671	netlist_net_t &anet = net();
672	672
673	673	if (EXPECTED(newQ != anet.m_new.Q))
674	674	{
675		anet.m_new.Q = newQ;
	675	anet.m_new.Q = newQ;
676	676	if (anet.m_num_cons)
677		anet.push_to_queue(delay);
	677	anet.push_to_queue(delay);
678	678	}
679	679	}
680	680	};
r26736	r26737
689	689
690	690	class netlist_analog_output_t : public netlist_output_t
691	691	{
692		NETLIST_PREVENT_COPYING(netlist_analog_output_t)
	692	NETLIST_PREVENT_COPYING(netlist_analog_output_t)
693	693	public:
694	694
695	695	ATTR_COLD netlist_analog_output_t();
696	696
697		ATTR_COLD void initial(const double val);
	697	ATTR_COLD void initial(const double val);
698	698
699		ATTR_HOT inline void set_Q(const double newQ, const netlist_time &delay)
	699	ATTR_HOT inline void set_Q(const double newQ, const netlist_time &delay)
700	700	{
701	701	if (newQ != net().m_new.Analog)
702	702	{
703		net().m_new.Analog = newQ;
704		net().push_to_queue(delay);
	703	net().m_new.Analog = newQ;
	704	net().push_to_queue(delay);
705	705	}
706	706	}
707	707
r26736	r26737
713	713
714	714	class netlist_param_t : public netlist_owned_object_t
715	715	{
716		NETLIST_PREVENT_COPYING(netlist_param_t)
	716	NETLIST_PREVENT_COPYING(netlist_param_t)
717	717	public:
718	718
719		enum param_type_t {
720		MODEL,
721		STRING,
722		DOUBLE,
723		INTEGER,
724		LOGIC
725		};
	719	enum param_type_t {
	720	MODEL,
	721	STRING,
	722	DOUBLE,
	723	INTEGER,
	724	LOGIC
	725	};
726	726
727		ATTR_COLD netlist_param_t(const param_type_t atype);
	727	ATTR_COLD netlist_param_t(const param_type_t atype);
728	728
729		ATTR_HOT inline const param_type_t param_type() const { return m_param_type; }
	729	ATTR_HOT inline const param_type_t param_type() const { return m_param_type; }
730	730
731	731	private:
732		const param_type_t m_param_type;
	732	const param_type_t m_param_type;
733	733	};
734	734
735	735	class netlist_param_double_t : public netlist_param_t
736	736	{
737		NETLIST_PREVENT_COPYING(netlist_param_double_t)
	737	NETLIST_PREVENT_COPYING(netlist_param_double_t)
738	738	public:
739		ATTR_COLD netlist_param_double_t();
	739	ATTR_COLD netlist_param_double_t();
740	740
741		ATTR_HOT inline void setTo(const double param);
742		ATTR_COLD inline void initial(const double val) { m_param = val; }
743		ATTR_HOT inline const double Value() const { return m_param; }
	741	ATTR_HOT inline void setTo(const double param);
	742	ATTR_COLD inline void initial(const double val) { m_param = val; }
	743	ATTR_HOT inline const double Value() const { return m_param; }
744	744
745	745	protected:
746		ATTR_COLD virtual void save_register()
747		{
748		save(NAME(m_param));
749		netlist_param_t::save_register();
750		}
	746	ATTR_COLD virtual void save_register()
	747	{
	748	save(NAME(m_param));
	749	netlist_param_t::save_register();
	750	}
751	751
752	752	private:
753		double m_param;
	753	double m_param;
754	754	};
755	755
756	756	class netlist_param_int_t : public netlist_param_t
757	757	{
758		NETLIST_PREVENT_COPYING(netlist_param_int_t)
	758	NETLIST_PREVENT_COPYING(netlist_param_int_t)
759	759	public:
760		ATTR_COLD netlist_param_int_t();
	760	ATTR_COLD netlist_param_int_t();
761	761
762		ATTR_HOT inline void setTo(const int param);
763		ATTR_COLD inline void initial(const int val) { m_param = val; }
	762	ATTR_HOT inline void setTo(const int param);
	763	ATTR_COLD inline void initial(const int val) { m_param = val; }
764	764
765		ATTR_HOT inline const int Value() const { return m_param; }
	765	ATTR_HOT inline const int Value() const { return m_param; }
766	766
767	767	protected:
768		ATTR_COLD virtual void save_register()
769		{
770		save(NAME(m_param));
771		netlist_param_t::save_register();
772		}
	768	ATTR_COLD virtual void save_register()
	769	{
	770	save(NAME(m_param));
	771	netlist_param_t::save_register();
	772	}
773	773
774	774	private:
775		int m_param;
	775	int m_param;
776	776	};
777	777
778	778	class netlist_param_logic_t : public netlist_param_int_t
779	779	{
780		NETLIST_PREVENT_COPYING(netlist_param_logic_t)
	780	NETLIST_PREVENT_COPYING(netlist_param_logic_t)
781	781	public:
782		ATTR_COLD netlist_param_logic_t();
	782	ATTR_COLD netlist_param_logic_t();
783	783	};
784	784
785	785	class netlist_param_str_t : public netlist_param_t
786	786	{
787		NETLIST_PREVENT_COPYING(netlist_param_str_t)
	787	NETLIST_PREVENT_COPYING(netlist_param_str_t)
788	788	public:
789		ATTR_COLD netlist_param_str_t();
	789	ATTR_COLD netlist_param_str_t();
790	790
791		ATTR_HOT inline void setTo(const pstring &param);
792		ATTR_COLD inline void initial(const pstring &val) { m_param = val; }
	791	ATTR_HOT inline void setTo(const pstring &param);
	792	ATTR_COLD inline void initial(const pstring &val) { m_param = val; }
793	793
794		ATTR_HOT inline const pstring &Value() const { return m_param; }
	794	ATTR_HOT inline const pstring &Value() const { return m_param; }
795	795
796	796	private:
797		pstring m_param;
	797	pstring m_param;
798	798	};
799	799
800	800	class netlist_param_model_t : public netlist_param_t
801	801	{
802		NETLIST_PREVENT_COPYING(netlist_param_model_t)
	802	NETLIST_PREVENT_COPYING(netlist_param_model_t)
803	803	public:
804		ATTR_COLD netlist_param_model_t();
	804	ATTR_COLD netlist_param_model_t();
805	805
806		ATTR_COLD inline void initial(const pstring &val) { m_param = val; }
	806	ATTR_COLD inline void initial(const pstring &val) { m_param = val; }
807	807
808		ATTR_HOT inline const pstring &Value() const { return m_param; }
	808	ATTR_HOT inline const pstring &Value() const { return m_param; }
809	809
810		/* these should be cached! */
811		ATTR_COLD double dValue(const pstring &entity, const double defval = 0.0) const;
	810	/* these should be cached! */
	811	ATTR_COLD double dValue(const pstring &entity, const double defval = 0.0) const;
812	812
813	813	private:
814		pstring m_param;
	814	pstring m_param;
815	815	};
816	816
817	817	// ----------------------------------------------------------------------------------------
r26736	r26737
820	820
821	821	class netlist_core_device_t : public netlist_object_t
822	822	{
823		NETLIST_PREVENT_COPYING(netlist_core_device_t)
	823	NETLIST_PREVENT_COPYING(netlist_core_device_t)
824	824	public:
825	825
826		typedef netlist_list_t<netlist_core_device_t *> list_t;
	826	typedef netlist_list_t<netlist_core_device_t *> list_t;
827	827
828		ATTR_COLD netlist_core_device_t();
829		ATTR_COLD netlist_core_device_t(const family_t afamily);
	828	ATTR_COLD netlist_core_device_t();
	829	ATTR_COLD netlist_core_device_t(const family_t afamily);
830	830
831		ATTR_COLD virtual ~netlist_core_device_t();
	831	ATTR_COLD virtual ~netlist_core_device_t();
832	832
833	833	ATTR_COLD virtual void init(netlist_base_t &anetlist, const pstring &name);
834	834
r26736	r26737
848	848	#endif
849	849	}
850	850
851		ATTR_HOT const netlist_sig_t INPLOGIC_PASSIVE(netlist_logic_input_t &inp);
	851	ATTR_HOT const netlist_sig_t INPLOGIC_PASSIVE(netlist_logic_input_t &inp);
852	852
853	853	ATTR_HOT inline const netlist_sig_t INPLOGIC(const netlist_logic_input_t &inp) const
854	854	{
r26736	r26737
885	885	ATTR_HOT virtual void dec_active() { }
886	886
887	887	ATTR_HOT virtual void step_time(const double st) { }
888		ATTR_HOT virtual void update_terminals() { }
	888	ATTR_HOT virtual void update_terminals() { }
889	889
890	890	#if (NL_KEEP_STATISTICS)
891		/* stats */
	891	/* stats */
892	892	osd_ticks_t total_time;
893	893	INT32 stat_count;
894	894	#endif
r26736	r26737
908	908
909	909	class netlist_device_t : public netlist_core_device_t
910	910	{
911		NETLIST_PREVENT_COPYING(netlist_device_t)
	911	NETLIST_PREVENT_COPYING(netlist_device_t)
912	912	public:
913	913
914	914	ATTR_COLD netlist_device_t();
915		ATTR_COLD netlist_device_t(const family_t afamily);
	915	ATTR_COLD netlist_device_t(const family_t afamily);
916	916
917	917	ATTR_COLD virtual ~netlist_device_t();
918	918
r26736	r26737
921	921	ATTR_COLD netlist_setup_t &setup();
922	922
923	923	ATTR_COLD void register_sub(netlist_device_t &dev, const pstring &name);
924		ATTR_COLD void register_subalias(const pstring &name, const netlist_core_terminal_t &term);
	924	ATTR_COLD void register_subalias(const pstring &name, const netlist_core_terminal_t &term);
925	925
926		ATTR_COLD void register_terminal(const pstring &name, netlist_terminal_t &port);
	926	ATTR_COLD void register_terminal(const pstring &name, netlist_terminal_t &port);
927	927
928	928	ATTR_COLD void register_output(const pstring &name, netlist_output_t &out);
929	929
r26736	r26737
932	932	ATTR_COLD void register_link_internal(netlist_input_t &in, netlist_output_t &out, const netlist_input_t::state_e aState);
933	933	ATTR_COLD void register_link_internal(netlist_core_device_t &dev, netlist_input_t &in, netlist_output_t &out, const netlist_input_t::state_e aState);
934	934
935		/* driving logic outputs don't count in here */
	935	/* driving logic outputs don't count in here */
936	936	netlist_list_t<pstring, 20> m_terminals;
937	937
938	938	protected:
939	939
940	940	ATTR_HOT virtual void update() { }
941	941	ATTR_HOT virtual void start() { }
942		ATTR_HOT virtual void update_terminals() { }
	942	ATTR_HOT virtual void update_terminals() { }
943	943
944		template <class C, class T>
	944	template <class C, class T>
945	945	ATTR_COLD void register_param(const pstring &sname, C &param, const T initialVal)
946	946	{
947		register_param(*this, sname, param, initialVal);
	947	register_param(*this, sname, param, initialVal);
948	948	}
949	949
950	950	template <class C, class T>
951		ATTR_COLD void register_param(netlist_core_device_t &dev, const pstring &sname, C &param, const T initialVal);
	951	ATTR_COLD void register_param(netlist_core_device_t &dev, const pstring &sname, C &param, const T initialVal);
952	952
953	953	private:
954	954	};
r26736	r26737
962	962
963	963	class netlist_base_t : public netlist_object_t, public pstate_manager_t
964	964	{
965		NETLIST_PREVENT_COPYING(netlist_base_t)
	965	NETLIST_PREVENT_COPYING(netlist_base_t)
966	966	public:
967	967
968	968	typedef netlist_timed_queue<netlist_net_t, netlist_time, 512> queue_t;
r26736	r26737
970	970	netlist_base_t();
971	971	virtual ~netlist_base_t();
972	972
973		ATTR_HOT inline const queue_t &queue() const { return m_queue; }
974		ATTR_HOT inline queue_t &queue() { return m_queue; }
	973	ATTR_HOT inline const queue_t &queue() const { return m_queue; }
	974	ATTR_HOT inline queue_t &queue() { return m_queue; }
975	975
976	976	ATTR_HOT inline void push_to_queue(netlist_net_t &out, const netlist_time &attime)
977	977	{
r26736	r26737
984	984
985	985	ATTR_HOT inline const netlist_time &time() const { return m_time_ps; }
986	986
987		ATTR_COLD void set_mainclock_dev(NETLIB_NAME(mainclock) *dev);
988		ATTR_COLD void set_solver_dev(NETLIB_NAME(solver) *dev);
989		ATTR_COLD void set_setup(netlist_setup_t *asetup) { m_setup = asetup; }
	987	ATTR_COLD void set_mainclock_dev(NETLIB_NAME(mainclock) *dev);
	988	ATTR_COLD void set_solver_dev(NETLIB_NAME(solver) *dev);
	989	ATTR_COLD void set_setup(netlist_setup_t *asetup) { m_setup = asetup; }
990	990
991		ATTR_COLD netlist_net_t *find_net(const pstring &name);
	991	ATTR_COLD netlist_net_t *find_net(const pstring &name);
992	992
993		ATTR_COLD void set_clock_freq(UINT64 clockfreq);
	993	ATTR_COLD void set_clock_freq(UINT64 clockfreq);
994	994
995		ATTR_COLD netlist_setup_t &setup() { return *m_setup; }
	995	ATTR_COLD netlist_setup_t &setup() { return *m_setup; }
996	996	ATTR_COLD void reset();
997	997
998	998	ATTR_COLD void xfatalerror(const char *format, ...) const;
999	999
1000		tagmap_devices_t m_devices;
1001		netlist_net_t::list_t m_nets;
	1000	tagmap_devices_t m_devices;
	1001	netlist_net_t::list_t m_nets;
1002	1002
1003	1003	protected:
1004	1004
r26736	r26737
1006	1006	virtual void vfatalerror(const char *format, va_list ap) const = 0;
1007	1007
1008	1008	protected:
1009		ATTR_COLD virtual void save_register()
1010		{
1011		//queue_t m_queue;
1012		save(NAME(m_time_ps));
1013		save(NAME(m_rem));
1014		save(NAME(m_div));
1015		netlist_object_t::save_register();
1016		}
	1009	ATTR_COLD virtual void save_register()
	1010	{
	1011	//queue_t m_queue;
	1012	save(NAME(m_time_ps));
	1013	save(NAME(m_rem));
	1014	save(NAME(m_div));
	1015	netlist_object_t::save_register();
	1016	}
1017	1017
1018	1018	#if (NL_KEEP_STATISTICS)
1019	1019	// performance
r26736	r26737
1023	1023	#endif
1024	1024
1025	1025	private:
1026		ATTR_HOT void update_time(const netlist_time t, INT32 &atime);
	1026	ATTR_HOT void update_time(const netlist_time t, INT32 &atime);
1027	1027
1028		netlist_time m_time_ps;
1029		queue_t m_queue;
	1028	netlist_time m_time_ps;
	1029	queue_t m_queue;
1030	1030	UINT32 m_rem;
1031	1031	UINT32 m_div;
1032	1032
1033	1033	NETLIB_NAME(mainclock) * m_mainclock;
1034		NETLIB_NAME(solver) * m_solver;
	1034	NETLIB_NAME(solver) * m_solver;
1035	1035
1036		netlist_setup_t *m_setup;
	1036	netlist_setup_t *m_setup;
1037	1037	};
1038	1038
1039	1039	// ----------------------------------------------------------------------------------------
r26736	r26737
1060	1060	protected:
1061	1061	ATTR_COLD void start()
1062	1062	{
1063		register_input("I", m_I, netlist_terminal_t::STATE_INP_ACTIVE);
1064		register_output("Q", m_Q);
	1063	register_input("I", m_I, netlist_terminal_t::STATE_INP_ACTIVE);
	1064	register_output("Q", m_Q);
1065	1065	m_Q.initial(1);
1066	1066	}
1067	1067
r26736	r26737
1072	1072	else if (m_I.Q_Analog() < m_I.m_low_thresh_V)
1073	1073	OUTLOGIC(m_Q, 0, NLTIME_FROM_NS(1));
1074	1074	else
1075		OUTLOGIC(m_Q, m_Q.net().last_Q(), NLTIME_FROM_NS(1));
	1075	OUTLOGIC(m_Q, m_Q.net().last_Q(), NLTIME_FROM_NS(1));
1076	1076	}
1077	1077
1078	1078	};
r26736	r26737
1084	1084	class nld_d_to_a_proxy : public netlist_device_t
1085	1085	{
1086	1086	public:
1087		ATTR_COLD nld_d_to_a_proxy(netlist_output_t &out_proxied)
	1087	ATTR_COLD nld_d_to_a_proxy(netlist_output_t &out_proxied)
1088	1088	: netlist_device_t()
1089	1089	{
1090	1090	//assert(out_proxied.object_type(SIGNAL_MASK) == SIGNAL_DIGITAL);
r26736	r26737
1093	1093	m_high_V = out_proxied.m_high_V;
1094	1094	}
1095	1095
1096		ATTR_COLD virtual ~nld_d_to_a_proxy() {}
	1096	ATTR_COLD virtual ~nld_d_to_a_proxy() {}
1097	1097
1098	1098	netlist_ttl_input_t m_I;
1099	1099	netlist_analog_output_t m_Q;
r26736	r26737
1101	1101	protected:
1102	1102	ATTR_COLD void start()
1103	1103	{
1104		register_input("I", m_I, netlist_terminal_t::STATE_INP_ACTIVE);
1105		register_output("Q", m_Q);
	1104	register_input("I", m_I, netlist_terminal_t::STATE_INP_ACTIVE);
	1105	register_output("Q", m_Q);
1106	1106	m_Q.initial(0);
1107	1107	}
1108	1108
r26736	r26737
1122	1122
1123	1123	ATTR_HOT inline void netlist_param_str_t::setTo(const pstring &param)
1124	1124	{
1125		m_param = param;
1126		netdev().update_param();
	1125	m_param = param;
	1126	netdev().update_param();
1127	1127	}
1128	1128
1129	1129	ATTR_HOT inline void netlist_param_int_t::setTo(const int param)
1130	1130	{
1131		m_param = param;
1132		netdev().update_param();
	1131	m_param = param;
	1132	netdev().update_param();
1133	1133	}
1134	1134
1135	1135	ATTR_HOT inline void netlist_param_double_t::setTo(const double param)
1136	1136	{
1137		m_param = param;
1138		netdev().update_param();
	1137	m_param = param;
	1138	netdev().update_param();
1139	1139	}
1140	1140
1141	1141
r26736	r26737
1193	1193	m_active++;
1194	1194
1195	1195	if (USE_DEACTIVE_DEVICE)
1196		if (m_active == 1 && m_in_queue > 0)
1197		{
1198		m_last = m_cur;
1199		railterminal().netdev().inc_active();
1200		m_cur = m_new;
1201		}
	1196	if (m_active == 1 && m_in_queue > 0)
	1197	{
	1198	m_last = m_cur;
	1199	railterminal().netdev().inc_active();
	1200	m_cur = m_new;
	1201	}
1202	1202
1203	1203	if (EXPECTED(m_active == 1 && m_in_queue == 0))
1204	1204	{
r26736	r26737
1219	1219	{
1220	1220	m_active--;
1221	1221	if (USE_DEACTIVE_DEVICE)
1222		if (m_active == 0)
1223		railterminal().netdev().dec_active();
	1222	if (m_active == 0)
	1223	railterminal().netdev().dec_active();
1224	1224
1225	1225	}
1226	1226
r26736	r26737
1251	1251
1252	1252	class net_device_t_base_factory
1253	1253	{
1254		NETLIST_PREVENT_COPYING(net_device_t_base_factory)
	1254	NETLIST_PREVENT_COPYING(net_device_t_base_factory)
1255	1255	public:
1256	1256	net_device_t_base_factory(const pstring &name, const pstring &classname)
1257	1257	: m_name(name), m_classname(classname)
r26736	r26737
1271	1271	template <class C>
1272	1272	class net_device_t_factory : public net_device_t_base_factory
1273	1273	{
1274		NETLIST_PREVENT_COPYING(net_device_t_factory)
	1274	NETLIST_PREVENT_COPYING(net_device_t_factory)
1275	1275	public:
1276	1276	net_device_t_factory(const pstring &name, const pstring &classname)
1277	1277	: net_device_t_base_factory(name, classname) { }
r26736	r26737
1288	1288	{
1289	1289	public:
1290	1290
1291		netlist_factory();
1292		~netlist_factory();
	1291	netlist_factory();
	1292	~netlist_factory();
1293	1293
1294		void initialize();
	1294	void initialize();
1295	1295
1296		template<class _C>
1297		void register_device(const pstring &name, const pstring &classname)
1298		{
1299		m_list.add(new net_device_t_factory< _C >(name, classname) );
1300		}
	1296	template<class _C>
	1297	void register_device(const pstring &name, const pstring &classname)
	1298	{
	1299	m_list.add(new net_device_t_factory< _C >(name, classname) );
	1300	}
1301	1301
1302		netlist_device_t *new_device_by_classname(const pstring &classname, netlist_setup_t &setup) const;
1303		netlist_device_t *new_device_by_name(const pstring &name, netlist_setup_t &setup) const;
	1302	netlist_device_t *new_device_by_classname(const pstring &classname, netlist_setup_t &setup) const;
	1303	netlist_device_t *new_device_by_name(const pstring &name, netlist_setup_t &setup) const;
1304	1304
1305	1305	private:
1306		typedef netlist_list_t<net_device_t_base_factory *> list_t;
1307		list_t m_list;
	1306	typedef netlist_list_t<net_device_t_base_factory *> list_t;
	1307	list_t m_list;
1308	1308
1309	1309	};
1310	1310

trunk/src/emu/netlist/nl_util.h
r26736	r26737
13	13	{
14	14	// this is purely static
15	15	private:
16		nl_util() {};
	16	nl_util() {};
17	17
18	18	public:
19		typedef netlist_list_t<pstring, 10> pstring_list;
	19	typedef netlist_list_t<pstring, 10> pstring_list;
20	20
21		static pstring_list split(const pstring &str, const pstring &onstr)
22		{
23		pstring_list temp;
	21	static pstring_list split(const pstring &str, const pstring &onstr)
	22	{
	23	pstring_list temp;
24	24
25		int p = 0;
26		int pn;
	25	int p = 0;
	26	int pn;
27	27
28		pn = str.find(onstr, p);
29		while (pn>=0)
30		{
31		temp.add(str.substr(p, pn - p));
32		p = pn + onstr.len();
33		pn = str.find(onstr, p);
34		}
35		if (p<str.len())
36		temp.add(str.substr(p));
37		return temp;
38		}
	28	pn = str.find(onstr, p);
	29	while (pn>=0)
	30	{
	31	temp.add(str.substr(p, pn - p));
	32	p = pn + onstr.len();
	33	pn = str.find(onstr, p);
	34	}
	35	if (p<str.len())
	36	temp.add(str.substr(p));
	37	return temp;
	38	}
39	39	};
40	40
41	41	#endif /* NL_UTIL_H_ */

trunk/src/emu/cpu/z8/z8.c
r26736	r26737
163	163	***************************************************************************/
164	164
165	165	static ADDRESS_MAP_START( program_2kb, AS_PROGRAM, 8, z8_device )
166		AM_RANGE(0x0000, 0x07ff) AM_ROM
	166	AM_RANGE(0x0000, 0x07ff) AM_ROM
167	167	ADDRESS_MAP_END
168	168
169	169	static ADDRESS_MAP_START( program_4kb, AS_PROGRAM, 8, z8_device )
170		AM_RANGE(0x0000, 0x0fff) AM_ROM
	170	AM_RANGE(0x0000, 0x0fff) AM_ROM
171	171	ADDRESS_MAP_END
172	172
173	173
r26736	r26737
846	846
847	847	}
848	848	}
849

trunk/src/emu/cpu/tms57002/tms57002.c
r26736	r26737
682	682	for(;;) {
683	683	short ipc;
684	684	UINT32 opcode = program->read_dword(adr << 2);
685
	685
686	686	cs.inc = 0;
687	687
688	688	if((opcode & 0xfc0000) == 0xfc0000)
r26736	r26737
743	743	case 1:
744	744	++ca;
745	745	goto inst;
746
	746
747	747	case 2:
748	748	++id;
749	749	goto inst;
750
	750
751	751	case 3:
752	752	++ca, ++id;
753	753	goto inst;

trunk/src/emu/cpu/t11/t11.c
r26736	r26737
41	41	t11_device::t11_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
42	42	: cpu_device(mconfig, T11, "T11", tag, owner, clock, "t11", __FILE__)
43	43	, m_program_config("program", ENDIANNESS_LITTLE, 16, 16, 0)
44		, c_initial_mode(0)
	44	, c_initial_mode(0)
45	45	{
46	46	m_is_octal = true;
47	47	}
r26736	r26737
379	379	extern CPU_DISASSEMBLE( t11 );
380	380	return CPU_DISASSEMBLE_NAME(t11)(this, buffer, pc, oprom, opram, options);
381	381	}
382

trunk/src/emu/cpu/8x300/8x300.c
r26736	r26737
1	1	/*
2	2	* 8x300.c
3	3	*
4		* Implementation of the Scientific Micro Systems SMS300 / Signetics 8X300 CPU
	4	* Implementation of the Scientific Micro Systems SMS300 / Signetics 8X300 CPU
5	5	* Created on: 18/12/2013
6	6	*
7		* Written by Barry Rodewald
	7	* Written by Barry Rodewald
8	8	*/
9	9
10	10	#include "debugger.h"
r26736	r26737
56	56	case 0x05: m_R5 = val; break;
57	57	case 0x06: m_R6 = val; break;
58	58	case 0x07: m_IVL = val; break;
59		// OVF is read-only
	59	// OVF is read-only
60	60	case 0x09: m_R11 = val; break;
61	61	case 0x0f: m_IVR = val; break;
62	62	default: logerror("8X300: Invalid register %02x written to.\n",reg); break;
r26736	r26737
74	74	case 0x04: return m_R4;
75	75	case 0x05: return m_R5;
76	76	case 0x06: return m_R6;
77		// IVL is write-only
	77	// IVL is write-only
78	78	case 0x08: return m_OVF;
79	79	case 0x09: return m_R11;
80		// IVR is write-only
	80	// IVR is write-only
81	81	default: logerror("8X300: Invalid register %02x read.\n",reg); return 0;
82	82	}
83	83	return 0;
r26736	r26737
142	142	{
143	143	switch (entry.index())
144	144	{
145		// case STATE_GENFLAGS:
146		// string.printf("%c%c%c%c%c%c",
147		// break;
	145	// case STATE_GENFLAGS:
	146	// string.printf("%c%c%c%c%c%c",
	147	// break;
148	148	}
149	149	}
150	150
r26736	r26737
550	550	extern CPU_DISASSEMBLE( n8x300 );
551	551	return CPU_DISASSEMBLE_NAME(n8x300)(this, buffer, pc, oprom, opram, options);
552	552	}
553

trunk/src/emu/cpu/8x300/8x300.h
r26736	r26737
1	1	/*
2	2	* 8x300.h
3	3	*
4		* Implementation of the Scientific Micro Systems SMS300 / Signetics 8X300 Microcontroller
	4	* Implementation of the Scientific Micro Systems SMS300 / Signetics 8X300 Microcontroller
5	5	* Created on: 18/12/2013
6	6	*/
7	7

trunk/src/emu/cpu/8x300/8x300dasm.c
r26736	r26737
1	1	/*
2	2	* 8x300dasm.c
3		* Implementation of the Scientific Micro Systems SMS300 / Signetics 8X300 Microcontroller
	3	* Implementation of the Scientific Micro Systems SMS300 / Signetics 8X300 Microcontroller
4	4	*
5	5	* Created on: 18/12/2013
6	6	*/

trunk/src/emu/cpu/cpu.mak
r26736	r26737
77	77	DASMOBJS += $(CPUOBJ)/8x300/8x300dasm.o
78	78	endif
79	79
80		$(CPUOBJ)/8x300/8x300.o: $(CPUSRC)/8x300/8x300.c \
	80	$(CPUOBJ)/8x300/8x300.o: $(CPUSRC)/8x300/8x300.c \
81	81	$(CPUSRC)/8x300/8x300.h
82	82
83	83	#-------------------------------------------------

trunk/src/emu/video/v9938.c
r26736	r26737
1425	1425	for (x=0;x<64;x++)
1426	1426	{
1427	1427	int colour[4];
1428		int ind;
	1428	int ind;
1429	1429
1430	1430	colour[0] = m_vram_space->read_byte(((nametbl_addr&1) << 16) \| (nametbl_addr>>1));
1431	1431	nametbl_addr++;
r26736	r26737
1435	1435	nametbl_addr++;
1436	1436	colour[3] = m_vram_space->read_byte(((nametbl_addr&1) << 16) \| (nametbl_addr>>1));
1437	1437
1438		ind = (colour[0] & 7) << 11 \| (colour[1] & 7) << 14 \|
1439		(colour[2] & 7) << 5 \| (colour[3] & 7) << 8;
	1438	ind = (colour[0] & 7) << 11 \| (colour[1] & 7) << 14 \|
	1439	(colour[2] & 7) << 5 \| (colour[3] & 7) << 8;
1440	1440
1441	1441	*ln++ = s_pal_indYJK[ind \| ((colour[0] >> 3) & 31)];
1442	1442	if (_Width > 512)
r26736	r26737
1465	1465	for (x=0;x<64;x++)
1466	1466	{
1467	1467	int colour[4];
1468		int ind;
	1468	int ind;
1469	1469
1470	1470	colour[0] = m_vram_space->read_byte(((nametbl_addr&1) << 16) \| (nametbl_addr>>1));
1471	1471	nametbl_addr++;
r26736	r26737
1475	1475	nametbl_addr++;
1476	1476	colour[3] = m_vram_space->read_byte(((nametbl_addr&1) << 16) \| (nametbl_addr>>1));
1477	1477
1478		ind = (colour[0] & 7) << 11 \| (colour[1] & 7) << 14 \|
1479		(colour[2] & 7) << 5 \| (colour[3] & 7) << 8;
	1478	ind = (colour[0] & 7) << 11 \| (colour[1] & 7) << 14 \|
	1479	(colour[2] & 7) << 5 \| (colour[3] & 7) << 8;
1480	1480
1481	1481	*ln++ = colour[0] & 8 ? m_pal_ind16[colour[0] >> 4] : s_pal_indYJK[ind \| ((colour[0] >> 3) & 30)];
1482	1482	if (_Width > 512)

trunk/src/emu/video/mb_vcu.c
r26736	r26737
278	278	UINT8 pen = 0;
279	279	UINT8 cur_layer;
280	280
281		// cur_layer = (m_mode & 0x3);
	281	// cur_layer = (m_mode & 0x3);
282	282	cur_layer = 0;
283	283
284	284	switch(m_mode >> 2)

trunk/src/emu/video/fixfreq.c
r26736	r26737
114	114	//m_vblank_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(vga_device::vblank_timer_cb),this));
115	115	recompute_parameters(false);
116	116
117		save_item(NAME(m_vid));
118		save_item(NAME(m_last_x));
119		save_item(NAME(m_last_y));
120		save_item(NAME(m_last_time));
121		save_item(NAME(m_line_time));
122		save_item(NAME(m_last_hsync_time));
123		save_item(NAME(m_last_vsync_time));
124		save_item(NAME(m_refresh));
125		save_item(NAME(m_clock_period));
126		//save_item(NAME(m_bitmap[0]));
127		//save_item(NAME(m_bitmap[1]));
128		save_item(NAME(m_cur_bm));
	117	save_item(NAME(m_vid));
	118	save_item(NAME(m_last_x));
	119	save_item(NAME(m_last_y));
	120	save_item(NAME(m_last_time));
	121	save_item(NAME(m_line_time));
	122	save_item(NAME(m_last_hsync_time));
	123	save_item(NAME(m_last_vsync_time));
	124	save_item(NAME(m_refresh));
	125	save_item(NAME(m_clock_period));
	126	//save_item(NAME(m_bitmap[0]));
	127	//save_item(NAME(m_bitmap[1]));
	128	save_item(NAME(m_cur_bm));
129	129
130		/* sync separator */
131		save_item(NAME(m_vint));
132		save_item(NAME(m_int_trig));
133		save_item(NAME(m_mult));
	130	/* sync separator */
	131	save_item(NAME(m_vint));
	132	save_item(NAME(m_int_trig));
	133	save_item(NAME(m_mult));
134	134
135		save_item(NAME(m_sig_vsync));
136		save_item(NAME(m_sig_composite));
137		save_item(NAME(m_sig_field));
	135	save_item(NAME(m_sig_vsync));
	136	save_item(NAME(m_sig_composite));
	137	save_item(NAME(m_sig_field));
138	138
139	139
140	140
r26736	r26737
210	210	int ret = 0;
211	211
212	212	m_vint += ((double) last_comp - m_vint) * (1.0 - exp(-time.as_double() * m_mult));
213		m_sig_composite = (newval < m_sync_threshold) ? 1 : 0 ;
	213	m_sig_composite = (newval < m_sync_threshold) ? 1 : 0 ;
214	214
215	215	m_sig_vsync = (m_vint > m_int_trig) ? 1 : 0;
216	216

trunk/src/emu/diserial.h
r26736	r26737
37	37	{
38	38	CTS = 0x0001, /* Clear to Send. (INPUT) Other end of connection is ready to accept data */
39	39	RTS = 0x0002, /* Request to Send. (OUTPUT) This end is ready to send data, and requests if the other */
40		/* end is ready to accept it */
	40	/* end is ready to accept it */
41	41	DSR = 0x0004, /* Data Set ready. (INPUT) Other end of connection has data */
42	42	DTR = 0x0008, /* Data terminal Ready. (OUTPUT) TX contains new data. */
43	43	RX = 0x0010, /* Recieve data. (INPUT) */
r26736	r26737
159	159
160	160
161	161	class serial_source_device : public device_t,
162		public device_serial_interface
	162	public device_serial_interface
163	163	{
164	164	public:
165	165	// construction/destruction

trunk/src/lib/formats/abc800_dsk.c
r26736	r26737
79	79	2000, 16, 40, 1, 256, {}, 1, {}, 55, 22, 54
80	80	},
81	81
82		// track description
	82	// track description
83	83	// 55x4e 12x00 3xf5 fe 2x00 01 01 f7 22x4e 12x00 3xf5 fb 256xe5 f7
84	84	// 54x4e 12x00 3xf5 fe 2x00 02 01 f7 22x4e 12x00 3xf5 fb 256xe5 f7
85	85	// 54x4e 12x00 3xf5 fe 2x00 03 01 f7 22x4e 12x00 3xf5 fb 256xe5 f7

trunk/src/lib/formats/adam_dsk.c
r26736	r26737
45	45	floppy_image::FF_525, floppy_image::SSDD, floppy_image::MFM,
46	46	2000, 8, 40, 1, 512, {}, 1, {}, 100, 22, 100
47	47	},
48
	48
49	49	// Unverified gap sizes -->
50	50	{ /* 320K 5 1/4 inch double density */
51	51	floppy_image::FF_525, floppy_image::DSDD, floppy_image::MFM,

trunk/src/lib/formats/itt3030_dsk.c
r26736	r26737
6	6
7	7	ITT3030 560K disk image format
8	8
9
10	9
	10
11	11	*********************************************************************/
12	12
13	13	#include "emu.h"
r26736	r26737
44	44
45	45
46	46	const floppy_format_type FLOPPY_ITT3030_FORMAT = &floppy_image_format_creator<itt3030_format>;
47

trunk/src/version.c
r26736	r26737
9	9	***************************************************************************/
10	10
11	11	extern const char build_version[];
12		const char build_version[] = "0.151 ("__DATE__")";
	12	const char build_version[] = "0.152 ("__DATE__")";

trunk/src/mess/machine/dec_lk201.c
r26736	r26737
6	6	*/
7	7
8	8	/* LK201-AA keyboard matrix (8048 version with updates)
9		Source: VCB02 Technical Reference.
	9	Source: VCB02 Technical Reference.
10	10
11		KBD controller scan matrix (PORT 1): 8 x BCD IN => 18 DECIMAL OUT
	11	KBD controller scan matrix (PORT 1): 8 x BCD IN => 18 DECIMAL OUT
12	12
13	13	Keyboard itself:
14		18 x IN (KEYBOARD DRIVE) KBD 17... KBD 0 =>
15		8 OUT (keyboard data @ D7..D0)
16
	14	18 x IN (KEYBOARD DRIVE) KBD 17... KBD 0 =>
	15	8 OUT (keyboard data @ D7..D0)
	16
17	17	to => PORT 0 @ KBD controller.
18	18
19	19	________\|D7 \|D6 \|D5 \|D4 \|D3 \|D2 \|D1 \|D0
r26736	r26737
34	34	--------\|----\|----\|----\|---\|---\|---\|---\|---
35	35	..KBD13:\|Ins.\|--- \|'Do'\|Prev { \|" \|[R]\|[R]
36	36	........\|Here\|- \| Scrn\| [ \|' \| \|
37		........\|E17 \|E11 \|G16 \|D17\|D11\|C11\| \|
	37	........\|E17 \|E11 \|G16 \|D17\|D11\|C11\| \|
38	38	--------\|----\|----\|----\|---\|---\|---\|---\|---
39	39	..KBD12:\|Find\|+ \|Help\|Se-\| } \|Re-\|C:L\| \|
40	40	........\| \|= \| \|lect ] \|turn...\| \
r26736	r26737
45	45	........\|G14 \| E13\|....\|E10\|D10\|...\|C10\|B10
46	46	--------\|----\|----\|----\|---\|---\|---\|---\|---
47	47	..KBD10:\|[R] \|F12 \|[R] \|F13\| ( \|O \|L \| .
48		........\|....\|(BS)\| \|(LF) 9 \| \| \| .
	48	........\|....\|(BS)\| \|(LF) 9 \| \| \| .
49	49	........\|....\|G12 \|....\|G13\|E09\|D09\|C09\|B09
50	50	--------\|----\|----\|----\|---\|---\|---\|---\|---
51	51	..KBD_9:\|[R] \|F11 \|[R] \|[R]\|* \|I \|K \| ,
52	52	........\|....\|ESC \| \| \|8 \| \| \| ,
53	53	........\|....\|G11 \|....\|...\|E08\|D08\|C08\|B08
54	54	--------\|----\|----\|----\|---\|---\|---\|---\|---
55		..KBD_8:\|[R] \|Main\|[R] Exit\|& \|U \|J \|M
	55	..KBD_8:\|[R] \|Main\|[R] Exit\|& \|U \|J \|M
56	56	........\| \|Scrn\| \| \|7 \| \| \|
57	57	........\| \|G08 \| \|G09\|E07\|D07\|C07\|B07
58	58	--------\|----\|----\|----\|---\|---\|---\|---\|---
r26736	r26737
65	65	........\|....\|....\|....\|G05\|E05\|D05\|C05\|B05
66	66	--------\|----\|----\|----\|---\|---\|---\|---\|---
67	67	..KBD_5: F4 \|Break [R]\|$ \|R \|F \|V \|Space
68		........\|....\|....\|....\|4 \| \| \| \|
	68	........\|....\|....\|....\|4 \| \| \| \|
69	69	........ G02 \|G03 \|....\|E04 D04 C04 B04 A01-A09
70	70	--------\|----\|----\|----\|---\|---\|---\|---\|---
71	71	..KBD_4: [R] \|Prt.\|[R] \|Set\|# \|E \|D \|C
r26736	r26737
77	77	........\|G99 \|E02 \|....\|D00\|D02\|C02\|B02\|B00
78	78	--------\|----\|----\|----\|---\|---\|---\|---\|---
79	79	..KBD_2: [R] \|[R] \|[R] \|~ \|! \|Q \|A \|Z
80		........\|..............\|...\|1
	80	........\|..............\|...\|1
81	81	........\|..............\|E00 E01 D01 C01 B01
82	82	--------\|----\|----\|----\|---\|---\|---\|---\|---
83	83	..KBD_1: Ctrl\|Lock\|Comp\|[R]
r26736	r26737
93	93	Normally only the N0 keyswitch is implemented as a double-sized key.
94	94	NOTE 3) Return key occupies 2 positions that are
95	95	decoded as the Return (C13) key.
96
	96
97	97	C:D - Cursor down (B17)
98	98	C:U - Cursor up (C17)
99	99	C:R - Cursor right (B18)
100	100	C:L - Cursor left (B16)
101	101	*/
102
	102
103	103	#include "emu.h"
104	104	#include "dec_lk201.h"
105	105	#include "cpu/m6805/m6805.h"

trunk/src/mess/machine/kb_poisk1.h
r26736	r26737
18	18	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\r')
19	19	PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 8") PORT_CODE(KEYCODE_8_PAD) PORT_CODE(KEYCODE_UP)
20	20	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 2") PORT_CODE(KEYCODE_2_PAD) PORT_CODE(KEYCODE_DOWN)
21		/-12/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-12 - ?") /* PORT_CODE(KEYCODE_SLASH) PORT_CHAR('?') PORT_CHAR('/') */
	21	/-12/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-12 - ?") /* PORT_CODE(KEYCODE_SLASH) PORT_CHAR('?') PORT_CHAR('/') */
22	22	PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
23		/-11/ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-11 - %") /* PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') */
	23	/-11/ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-11 - %") /* PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') */
24	24	PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F11") PORT_CODE(KEYCODE_F11) PORT_CHAR(UCHAR_MAMEKEY(F11))
25	25
26	26	PORT_START("Y2")
27		/-15/ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-15 - !") /* PORT_CODE(KEYCODE_1) PORT_CHAR('!') PORT_CHAR('1') */
	27	/-15/ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-15 - !") /* PORT_CODE(KEYCODE_1) PORT_CHAR('!') PORT_CHAR('1') */
28	28	PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 4") PORT_CODE(KEYCODE_4_PAD) PORT_CODE(KEYCODE_LEFT)
29	29	PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 0") PORT_CODE(KEYCODE_0_PAD) PORT_CODE(KEYCODE_INSERT) /* ??? */
30	30	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F7") PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7))
31		/-13/ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-13 - ;") /* PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') */
	31	/-13/ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-13 - ;") /* PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') */
32	32	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_BACKSPACE)
33	33	PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 7") PORT_CODE(KEYCODE_7_PAD) PORT_CODE(KEYCODE_HOME)
34	34	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 1") PORT_CODE(KEYCODE_1_PAD) PORT_CODE(KEYCODE_END)
35		/-2/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-2 - .") /* PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') */
36		/-3/ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-3 - _") /* PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') */
	35	/-2/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-2 - .") /* PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') */
	36	/-3/ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-3 - _") /* PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') */
37	37	PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
38	38	PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') // 0x54
39	39
r26736	r26737
58	58	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F6") PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6))
59	59	PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2))
60	60	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1))
61		/-1/ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-1 - ") / PORT_CODE(KEYCODE_8) PORT_CHAR('') PORT_CHAR('8') /
	61	/-1/ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-1 - ") / PORT_CODE(KEYCODE_8) PORT_CHAR('') PORT_CHAR('8') /
62	62	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Esc") PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) /* ??2 */
63		/-9/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-9 - :") /* PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') */
64		/-10/ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-10 - ,") /* PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') */
	63	/-9/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-9 - :") /* PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') */
	64	/-10/ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-10 - ,") /* PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') */
65	65	PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5))
66	66	PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4))
67	67
68	68	PORT_START("Y5")
69	69	PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
70	70	PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_UNUSED )
71		/?/ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_MAMEKEY(RCONTROL))
	71	/?/ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_MAMEKEY(RCONTROL))
72	72	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
73	73	PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
74	74	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
r26736	r26737
82	82	PORT_START("Y6")
83	83	PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
84	84	PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad *") PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK))
85		/?/ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Alt") PORT_CODE(KEYCODE_RALT)
	85	/?/ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Alt") PORT_CODE(KEYCODE_RALT)
86	86	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
87	87	PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
88	88	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?dc?") // 0xdc = SHIFT2
r26736	r26737
108	108	PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F9") PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9))
109	109
110	110	PORT_START("Y8")
111		/-6/ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-6 - -") /* PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') */
	111	/-6/ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-6 - -") /* PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') */
112	112	PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad -") PORT_CODE(KEYCODE_MINUS_PAD)
113	113	PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') /* ??? */
114	114	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
115		/-7/ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-7 - )") /* PORT_CODE(KEYCODE_0) PORT_CHAR(')') PORT_CHAR('0') */
	115	/-7/ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-7 - )") /* PORT_CODE(KEYCODE_0) PORT_CHAR(')') PORT_CHAR('0') */
116	116	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Scroll Lock")
117		/-4/ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-4 - (") /* PORT_CODE(KEYCODE_9) PORT_CHAR('(') PORT_CHAR('9') */
	117	/-4/ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-4 - (") /* PORT_CODE(KEYCODE_9) PORT_CHAR('(') PORT_CHAR('9') */
118	118	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('\|')
119	119	PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_UNUSED )
120	120	PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
121		/-5/ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-5 - \"") /* PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('"') PORT_CHAR('\'') */
122		/-8/ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-8 - /") /* PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') */
	121	/-5/ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-5 - \"") /* PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('"') PORT_CHAR('\'') */
	122	/-8/ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-8 - /") /* PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') */
123	123
124	124	#if 0
125	125	PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Delete") PORT_CODE(KEYCODE_DEL_PAD)
r26736	r26737
130	130	PORT_BIT( 0x000, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^')
131	131	PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&')
132	132	PORT_BIT( 0x000, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~')
133		PORT_BIT( 0x000, IP_ACTIVE_LOW, IPT_KEYBOARD )
	133	PORT_BIT( 0x000, IP_ACTIVE_LOW, IPT_KEYBOARD )
134	134	#endif
135	135
136	136	INPUT_PORTS_END
r26736	r26737
227	227	PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_UNUSED )
228	228	PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("- / UKRAINIAN XXX") PORT_CODE(KEYCODE_MINUS_PAD)
229	229	PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F9") PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9))
230		PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Scroll Lock")
	230	PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Scroll Lock")
231	231	PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 6") PORT_CODE(KEYCODE_6_PAD) PORT_CODE(KEYCODE_RIGHT)
232	232	PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
233	233	PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F7") PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7))

trunk/src/mess/machine/p1_fdc.c
r26736	r26737
134	134
135	135	if(!BIT(data, 6))
136	136	m_fdc->reset();
137
	137
138	138	m_fdc->set_floppy(floppy);
139	139
140	140	floppy->ss_w(BIT(data, 4));
r26736	r26737
196	196	{
197	197	set_isa_device();
198	198	m_isa->install_rom(this, 0xe0000, 0xe07ff, 0, 0, "XXX", "p1_fdc");
199		m_isa->install_device(0x00c0, 0x00c3, 0, 0,
	199	m_isa->install_device(0x00c0, 0x00c3, 0, 0,
200	200	READ8_DEVICE_DELEGATE(m_fdc, fd1793_t, read),
201	201	WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_t, write) );
202	202	m_isa->install_device(this, 0x00c4, 0x00c7, 0, 0, FUNC(p1_FDC_r), FUNC(p1_FDC_w) );

trunk/src/mess/machine/mc1502_fdc.c
r26736	r26737
212	212	set_isa_device();
213	213
214	214	// BIOS 5.0, 5.2
215		m_isa->install_device(0x010c, 0x010f, 0, 0,
	215	m_isa->install_device(0x010c, 0x010f, 0, 0,
216	216	READ8_DEVICE_DELEGATE(m_fdc, fd1793_t, read),
217	217	WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_t, write) );
218	218	m_isa->install_device(this, 0x0100, 0x010b, 0, 0, FUNC(mc1502_FDC_r), FUNC(mc1502_FDC_w) );
219	219	// BIOS 5.31, 5.33
220	220	/*
221		m_isa->install_device(0x010c, 0x010f, 0, 0,
222		READ8_DEVICE_DELEGATE(m_fdc, fd1793_t, read),
223		WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_t, write) );
224		m_isa->install_device(this, 0x0100, 0x010b, 0, 0, FUNC(mc1502_FDC_r), FUNC(mc1502_FDC_w) );
	221	m_isa->install_device(0x010c, 0x010f, 0, 0,
	222	READ8_DEVICE_DELEGATE(m_fdc, fd1793_t, read),
	223	WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_t, write) );
	224	m_isa->install_device(this, 0x0100, 0x010b, 0, 0, FUNC(mc1502_FDC_r), FUNC(mc1502_FDC_w) );
225	225	*/
226	226	m_fdc->setup_drq_cb(fd1793_t::line_cb(FUNC(mc1502_fdc_device::mc1502_fdc_irq_drq), this));
227	227	m_fdc->setup_intrq_cb(fd1793_t::line_cb(FUNC(mc1502_fdc_device::mc1502_fdc_irq_drq), this));

trunk/src/mess/machine/prof80mmu.c
r26736	r26737
103	103	{
104	104	offset \|= 0xf0000;
105	105	}
106
	106
107	107	return this->space(AS_PROGRAM).read_byte(offset);
108	108	}
109	109
r26736	r26737
123	123	{
124	124	offset \|= 0xf0000;
125	125	}
126
	126
127	127	this->space(AS_PROGRAM).write_byte(offset, data);
128	128	}

trunk/src/mess/machine/prof80mmu.h
r26736	r26737
33	33	// ======================> prof80_mmu_device
34	34
35	35	class prof80_mmu_device : public device_t,
36		public device_memory_interface
	36	public device_memory_interface
37	37	{
38	38	public:
39	39	prof80_mmu_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock);

trunk/src/mess/machine/p1_hdc.c
r26736	r26737
28	28	} \
29	29	} while (0)
30	30
31		#define KM1809VG7_TAG "d17"
	31	#define KM1809VG7_TAG "d17"
32	32
33	33
34	34	//**************************************************************************
r26736	r26737
109	109	UINT8 data = 0x00;
110	110
111	111	switch (offset >> 8) {
112		case 8: data = m_hdc->read(space, offset & 255);
	112	case 8: data = m_hdc->read(space, offset & 255);
113	113	}
114	114	DBG_LOG(1,"hdc",("R $%04x == $%02x\n", offset, data));
115	115
r26736	r26737
120	120	{
121	121	DBG_LOG(1,"hdc",("W $%04x <- $%02x\n", offset, data));
122	122	switch (offset >> 8) {
123		case 8: m_hdc->write(space, offset & 255, data, 0);
	123	case 8: m_hdc->write(space, offset & 255, data, 0);
124	124	}
125	125	}
126	126
r26736	r26737
144	144	{
145	145	set_isa_device();
146	146	m_isa->install_rom(this, 0xe2000, 0xe27ff, 0, 0, "XXX", "p1_hdc");
147		m_isa->install_memory(0xd0000, 0xd0fff, 0, 0,
	147	m_isa->install_memory(0xd0000, 0xd0fff, 0, 0,
148	148	READ8_DELEGATE(p1_hdc_device, p1_HDC_r),
149	149	WRITE8_DELEGATE(p1_hdc_device, p1_HDC_w) );
150	150	}

trunk/src/mess/machine/xsu_cards.c
r26736	r26737
11	11
12	12	SLOT_INTERFACE_START( p1_isa8_cards )
13	13	SLOT_INTERFACE("rom", P1_ROM)
14		SLOT_INTERFACE("fdc", P1_FDC) // B504
15		SLOT_INTERFACE("hdc", P1_HDC) // B942
	14	SLOT_INTERFACE("fdc", P1_FDC) // B504
	15	SLOT_INTERFACE("hdc", P1_HDC) // B942
16	16	/*
17		SLOT_INTERFACE("comlpt", P1_COMLPT) // B620
18		SLOT_INTERFACE("joy", P1_JOY) // B621
19		SLOT_INTERFACE("mouse", P1_MOUSE) // B943
20		SLOT_INTERFACE("lan", P1_LAN) // B944
	17	SLOT_INTERFACE("comlpt", P1_COMLPT) // B620
	18	SLOT_INTERFACE("joy", P1_JOY) // B621
	19	SLOT_INTERFACE("mouse", P1_MOUSE) // B943
	20	SLOT_INTERFACE("lan", P1_LAN) // B944
21	21	*/
22	22	SLOT_INTERFACE("pccom", ISA8_COM)
23	23	SLOT_INTERFACE("pclpt", ISA8_LPT)
r26736	r26737
28	28	SLOT_INTERFACE("rom", MC1502_ROM)
29	29	SLOT_INTERFACE("fdc", MC1502_FDC)
30	30	/*
31		SLOT_INTERFACE("hdc", MC1502_HDC)
	31	SLOT_INTERFACE("hdc", MC1502_HDC)
32	32	*/
33	33	SLOT_INTERFACE("pccom", ISA8_COM)
34	34	SLOT_INTERFACE("pclpt", ISA8_LPT)

trunk/src/mess/machine/nes_mmc5.c
r26736	r26737
41	41
42	42
43	43	nes_exrom_device::nes_exrom_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
44		: nes_nrom_device(mconfig, NES_EXROM, "NES Cart ExROM (MMC-5) PCB", tag, owner, clock, "nes_exrom", __FILE__)
	44	: nes_nrom_device(mconfig, NES_EXROM, "NES Cart ExROM (MMC-5) PCB", tag, owner, clock, "nes_exrom", __FILE__)
45	45	{
46	46	}
47	47

trunk/src/mess/machine/mb8795.c
r26736	r26737
18	18
19	19	mb8795_device::mb8795_device(const machine_config &mconfig, const char tag, device_t owner, UINT32 clock)
20	20	: device_t(mconfig, MB8795, "Fujitsu MB8795", tag, owner, clock, "mb8795", __FILE__),
21		device_network_interface(mconfig, *this, 10)
	21	device_network_interface(mconfig, *this, 10)
22	22	{
23	23	}
24	24
r26736	r26737
205	205
206	206	if(eof) {
207	207	logerror("%s: send packet, dest=%02x.%02x.%02x.%02x.%02x.%02x len=%04x loopback=%s\n", tag(),
208		txbuf[0], txbuf[1], txbuf[2], txbuf[3], txbuf[4], txbuf[5],
209		txlen,
210		txmode & EN_TMD_LB_DISABLE ? "off" : "on");
	208	txbuf[0], txbuf[1], txbuf[2], txbuf[3], txbuf[4], txbuf[5],
	209	txlen,
	210	txmode & EN_TMD_LB_DISABLE ? "off" : "on");
211	211
212	212	if(txlen > 1500)
213	213	txlen = 1500; // Weird packet send on loopback test in the next

trunk/src/mess/includes/mc1502.h
r26736	r26737
77	77	DECLARE_WRITE8_MEMBER(mc1502_kppi_portb_w);
78	78	DECLARE_WRITE8_MEMBER(mc1502_kppi_portc_w);
79	79	/*
80		TIMER_CALLBACK_MEMBER(fdc_motor_callback);
81		static struct {
82		int fdc_motor_on;
83		emu_timer *fdc_motor_timer;
84		} m_motor;
	80	TIMER_CALLBACK_MEMBER(fdc_motor_callback);
	81	static struct {
	82	int fdc_motor_on;
	83	emu_timer *fdc_motor_timer;
	84	} m_motor;
85	85	*/
86	86	const char *m_cputag;
87	87	};

trunk/src/mess/includes/prof80.h
r26736	r26737
17	17	#include "machine/upd765.h"
18	18
19	19	#define Z80_TAG "z1"
20		#define MMU_TAG "mmu"
	20	#define MMU_TAG "mmu"
21	21	#define UPD765_TAG "z38"
22	22	#define UPD1990A_TAG "z43"
23	23	#define RS232_A_TAG "rs232a"

trunk/src/mess/includes/poisk1.h
r26736	r26737
16	16	#include "machine/xsu_cards.h"
17	17	#include "sound/speaker.h"
18	18
19		#define POISK1_UPDATE_ROW(name) \
	19	#define POISK1_UPDATE_ROW(name) \
20	20	void name(bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT8 *videoram, UINT16 ma, UINT8 ra, UINT8 stride)
21	21
22	22	class p1_state : public driver_device
r26736	r26737
49	49	DECLARE_MACHINE_RESET(poisk1);
50	50
51	51	IRQ_CALLBACK_MEMBER(p1_irq_callback);
52
	52
53	53	virtual void palette_init();
54	54	virtual void video_start();
55	55	UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);

trunk/src/mess/video/isa_cga.c
r26736	r26737
2151	2151	WRITE8_MEMBER( isa8_ec1841_0002_device::char_ram_write )
2152	2152	{
2153	2153	offset ^= BIT(offset, 12);
2154		// logerror("write char ram %04x %02x\n",offset,data);
	2154	// logerror("write char ram %04x %02x\n",offset,data);
2155	2155	m_chr_gen_base[offset + 0x0000] = data;
2156	2156	m_chr_gen_base[offset + 0x0800] = data;
2157	2157	m_chr_gen_base[offset + 0x1000] = data;

trunk/src/mess/video/isa_cga.h
r26736	r26737
18	18	public device_isa8_card_interface
19	19	{
20	20	friend class isa8_cga_superimpose_device;
21		// friend class isa8_ec1841_0002_device;
	21	// friend class isa8_ec1841_0002_device;
22	22	friend class isa8_cga_poisk2_device;
23	23	friend class isa8_cga_pc1512_device;
24	24

trunk/src/mess/video/vtvideo.c
r26736	r26737
12	12	Split & full screen modes exist. Scroll should be synced with beam or DMA.
13	13	See 4.7.4 and up in VT manual.
14	14
15		- TESTS REQUIRED : do line and character attributes (plus combinations) match real hardware?
	15	- TESTS REQUIRED : do line and character attributes (plus combinations) match real hardware?
16	16
17		- UNDOCUMENTED FEATURES of DC011 / DC012 (CLUES WANTED)
18		A. (VT 100): DEC VT terminals are said to have a feature that doubles the number of lines
19		(50 real lines or just interlaced mode with 500 instead of 250 scanlines?)
	17	- UNDOCUMENTED FEATURES of DC011 / DC012 (CLUES WANTED)
	18	A. (VT 100): DEC VT terminals are said to have a feature that doubles the number of lines
	19	(50 real lines or just interlaced mode with 500 instead of 250 scanlines?)
20	20
21		B. (DEC-100-B) fun PD program SQUEEZE.COM _compresses_ display to X/2 and Y/2
22		- so picture takes a quarter of the original screen. How does it accomplish this?
	21	B. (DEC-100-B) fun PD program SQUEEZE.COM _compresses_ display to X/2 and Y/2
	22	- so picture takes a quarter of the original screen. How does it accomplish this?
23	23
24	24	- IMPROVEMENTS:
25	25	- exact colors for different VR201 monitors ('paper white', green and amber)
r26736	r26737
201	201	// Also used by Rainbow-100 ************
202	202	WRITE8_MEMBER( vt100_video_device::dc012_w )
203	203	{
204		// TODO: writes to 10C/0C should be treated differently (emulation disables the watchdog too often).
	204	// TODO: writes to 10C/0C should be treated differently (emulation disables the watchdog too often).
205	205	if (data == 0) // MHFU is disabled by writing 00 to port 010C.
206		{
	206	{
207	207	//if (MHFU_FLAG == true)
208		// printf("MHFU * DISABLED * \n");
	208	// printf("MHFU * DISABLED * \n");
209	209	MHFU_FLAG = false;
210	210	MHFU_counter = 0;
211	211	}
212		else
213		{ // RESET
214		//if (MHFU_FLAG == false)
215		// printf("MHFU ___ENABLED___ \n");
	212	else
	213	{ // RESET
	214	//if (MHFU_FLAG == false)
	215	// printf("MHFU ___ENABLED___ \n");
216	216	MHFU_FLAG = true;
217	217
218	218	MHFU_counter = 0;
r26736	r26737
224	224	// The BIOS first writes the least significant bits, then the 2 most significant bits.
225	225
226	226	// If scrolling up (incrementing the scroll latch), the additional line is linked in at the bottom.
227		// When the scroll latch is incremented back to 0, the top line of the scrolling region must be unlinked.
	227	// When the scroll latch is incremented back to 0, the top line of the scrolling region must be unlinked.
228	228
229	229	// When scrolling down (decrementing the scroll latch), new lines must be linked in at the top of the scroll region
230		// and unlinked down at the bottom.
	230	// and unlinked down at the bottom.
231	231
232	232	// Note that the scroll latch value will be used during the next frame rather than the current frame.
233	233	// All line linking/unlinking is done during the vertical blanking interval (< 550ms).
r26736	r26737
267	267	m_reverse_field = 0;
268	268	break;
269	269
270		// Writing a 11XX bit combination clears the blink-flip flop (valid for 0x0C - 0x0F):
	270	// Writing a 11XX bit combination clears the blink-flip flop (valid for 0x0C - 0x0F):
271	271	case 0x0c:
272	272	// set basic attribute to underline / blink flip-flop off
273	273	m_blink_flip_flop = 0;
r26736	r26737
290	290
291	291	case 0x0e:
292	292	m_blink_flip_flop = 0; // 'unsupported' DC012 command. Turn blink flip-flop off.
293		break;
	293	break;
294	294
295		case 0x0f:
296		// (DEC Rainbow 100): reverse video with 48 lines / blink flip-flop off
	295	case 0x0f:
	296	// (DEC Rainbow 100): reverse video with 48 lines / blink flip-flop off
297	297	m_blink_flip_flop = 0;
298	298	m_basic_attribute = 1;
299	299
300		// 0x0f = 'reserved' on VT 100
	300	// 0x0f = 'reserved' on VT 100
301	301	// Abort on VT-100 for now.
302		if (m_height_MAX == 25) break;
	302	if (m_height_MAX == 25) break;
303	303
304	304	if (m_height != 48)
305	305	{
r26736	r26737
485	485	// 2) bold and reverse together give a background of normal intensity
486	486
487	487	// 3) blink controls intensity: normal chars vary between A) normal and dim (B) bold chars vary between bright and normal
488		// 4) blink applied to a
	488	// 4) blink applied to a
489	489	// A) reverse character causes it to alternate between normal and reverse video representation
490	490	// B) non-rev. " : alternate between usual intensity and the next lower intensity
491		// 5) underline causes the 9.th scan to be forced to
	491	// 5) underline causes the 9.th scan to be forced to
492	492	// A) white of the same intensity as the characters (for nonreversed characters),
493	493	// b) to black (for reverse characters)
494	494
r26736	r26737
499	499	UINT16 x_preset, d_x_preset;
500	500	if (m_columns == 132)
501	501	{ x_preset = x * 9;
502		d_x_preset = x * 18;
	502	d_x_preset = x * 18;
503	503	} else
504	504	{
505		x_preset = x * 10;
506		d_x_preset = x * 20;
	505	x_preset = x * 10;
	506	d_x_preset = x * 20;
507	507	}
508	508
509	509	UINT8 line = 0;
r26736	r26737
512	512	int back_intensity, back_default_intensity;
513	513
514	514	int invert = (display_type & 8) >> 3; // BIT 3 indicates REVERSE
515		int bold = (display_type & 16) >> 4; // BIT 4 indicates BOLD
	515	int bold = (display_type & 16) >> 4; // BIT 4 indicates BOLD
516	516	int blink = display_type & 32; // BIT 5 indicates BLINK
517	517	int underline = display_type & 64; // BIT 6 indicates UNDERLINE
518	518	bool blank = (display_type & 0x80) ? true : false; // BIT 7 indicates BLANK
519	519
520	520	display_type = display_type & 3;
521	521
522		// CASE 1 A)
	522	// CASE 1 A)
523	523	// SCREEN ATTRIBUTES (see VT-180 manual 6-30):
524	524	// 'reverse field' = reverse video over entire screen (identical on Rainbow-100)
525	525
526		// What does 'base attribute' do on Rainbow-100 ?
	526	// What does 'base attribute' do on Rainbow-100 ?
527	527	// VT-100 interpretation ('without AVO, eigth char.bit defines base attribute') most likely not correct!
528	528	// OR 'base attribute' = reverse or underline (depending on the selection of the cursor at SETUP) ??
529	529	// VT-100 manual 4-75 / 4-98 says: reverse = (reverse field H) XOR (reverse video H = base attribute input)
530	530
531	531	// For reference: a complete truth table can be taken from TABLE 4-6-4 / VT100 technical manual.
532		// Following simple IF statements implement it in full. Code should not be shuffled!
	532	// Following simple IF statements implement it in full. Code should not be shuffled!
533	533	invert = invert ^ m_reverse_field ^ m_basic_attribute;
534	534
535	535	fg_intensity = bold + 2; // FOREGROUND (FG): normal (2) or bright (3)
r26736	r26737
540	540
541	541	// INVERSION: background gets foreground intensity (reduced by 1).
542	542	// _RELIES ON_ on_ previous evaluation of the BLINK signal (fg_intensity).
543		if (invert != 0)
544		{
	543	if (invert != 0)
	544	{
545	545	back_intensity = fg_intensity - 1; // BG: normal => dim; dim => OFF; bright => normal
546	546
547	547	if (back_intensity != 0) // FG: avoid 'black on black'
548		fg_intensity = 0;
	548	fg_intensity = 0;
549	549	else
550		fg_intensity = fg_intensity + 1; // FG: dim => normal; normal => bright
	550	fg_intensity = fg_intensity + 1; // FG: dim => normal; normal => bright
551	551	}
552	552
553	553	// BG: DEFAULT for entire character (underline overrides this for 1 line) -
554	554	back_default_intensity = back_intensity;
555	555
556	556	bool double_width = (display_type != 3) ? true : false; // all except normal: double width
557		bool double_height = (display_type & 1) ? false : true; // 0,2 = double height
	557	bool double_height = (display_type & 1) ? false : true; // 0,2 = double height
558	558
559	559	for (int i = 0; i < 10; i++)
560	560	{
r26736	r26737
563	563	switch (display_type)
564	564	{
565	565	case 0 : // bottom half of 'double height, double width' char.
566		j = (i >> 1) + 5;
	566	j = (i >> 1) + 5;
567	567	break;
568	568
569	569	case 2 : // top half of 'double height, double width' char.
570		j = (i >> 1);
	570	j = (i >> 1);
571	571	break;
572	572
573		default : // 1: double width
574		// 3: normal
575		j = i;
576		break;
	573	default : // 1: double width
	574	// 3: normal
	575	j = i;
	576	break;
577	577	}
578	578
579	579	// modify line since that is how it is stored in rom
r26736	r26737
582	582	line = m_gfx[ (code << 4) + j]; // code * 16
583	583
584	584	// UNDERLINED CHARACTERS (CASE 5 - different in 1 line):
585		back_intensity = back_default_intensity; // 0, 1, 2
	585	back_intensity = back_default_intensity; // 0, 1, 2
586	586	if ( underline != 0 )
587	587	{
588		if ( i == 8 )
	588	if ( i == 8 )
589	589	{
590		if (invert == 0)
591		line = 0xff; // CASE 5 A)
592		else
593		{ line = 0x00; // CASE 5 B)
594		back_intensity = 0; // OVERRIDE: BLACK BACKGROUND
595		}
596		}
597		}
	590	if (invert == 0)
	591	line = 0xff; // CASE 5 A)
	592	else
	593	{ line = 0x00; // CASE 5 B)
	594	back_intensity = 0; // OVERRIDE: BLACK BACKGROUND
	595	}
	596	}
	597	}
598	598
599	599	for (int b = 0; b < 8; b++) // 0..7
600	600	{
601	601	if (blank)
602		{ bit = m_reverse_field ^ m_basic_attribute;
603		}
	602	{ bit = m_reverse_field ^ m_basic_attribute;
	603	}
604	604	else
605	605	{
606	606	bit = BIT((line << b), 7);
r26736	r26737
614	614	// Double, 'double_height + double_width', then normal.
615	615	if (double_width)
616	616	{
617		bitmap.pix16( y_preset, d_x_preset + (b << 1) + 1) = bit;
	617	bitmap.pix16( y_preset, d_x_preset + (b << 1) + 1) = bit;
618	618	bitmap.pix16( y_preset, d_x_preset + (b << 1) ) = bit;
619	619
620	620	if (double_height)
621	621	{
622		bitmap.pix16( 1 + y_preset, d_x_preset + (b << 1) + 1) = bit;
623		bitmap.pix16( 1 + y_preset, d_x_preset + (b << 1) ) = bit;
	622	bitmap.pix16( 1 + y_preset, d_x_preset + (b << 1) + 1) = bit;
	623	bitmap.pix16( 1 + y_preset, d_x_preset + (b << 1) ) = bit;
624	624	}
625	625	}
626	626	else
r26736	r26737
629	629	}
630	630	} // for (8 bit)
631	631
632
	632
633	633	// char interleave (X) is filled with last bit
634	634	if (double_width)
635		{
	635	{
636	636	// double chars: 18 or 20 bits
637	637	bitmap.pix16(y_preset, d_x_preset + 16) = bit;
638	638	bitmap.pix16(y_preset, d_x_preset + 17) = bit;
639	639
640		if (m_columns == 80)
641		{ bitmap.pix16(y_preset, d_x_preset + 18) = bit;
642		bitmap.pix16(y_preset, d_x_preset + 19) = bit;
	640	if (m_columns == 80)
	641	{ bitmap.pix16(y_preset, d_x_preset + 18) = bit;
	642	bitmap.pix16(y_preset, d_x_preset + 19) = bit;
643	643	}
644	644	}
645	645	else
646	646	{ // normal chars: 9 or 10 bits
647	647	bitmap.pix16(y_preset, x_preset + 8) = bit;
648	648
649		if (m_columns == 80)
	649	if (m_columns == 80)
650	650	bitmap.pix16(y_preset, x_preset + 9) = bit;
651	651	}
652	652
r26736	r26737
671	671	while (line < (m_height + m_skip_lines))
672	672	{
673	673	code = m_in_ram_func(addr + xpos);
674
675		if ( code == 0x00 ) // TODO: investigate side effect on regular zero character!
676		display_type \|= 0x80; // DEFAULT: filler chars (till end of line) and empty lines (00) will be blanked
	674
	675	if ( code == 0x00 ) // TODO: investigate side effect on regular zero character!
	676	display_type \|= 0x80; // DEFAULT: filler chars (till end of line) and empty lines (00) will be blanked
677	677	else
678		display_type &= 0x7f; // else activate display.
	678	display_type &= 0x7f; // else activate display.
679	679
680	680	if ( code == 0xff )
681	681	{
r26736	r26737
709	709	line++;
710	710	}
711	711	else
712		{
	712	{
713	713	// display regular char
714	714	if (line >= m_skip_lines)
715	715	{
r26736	r26737
722	722	// 0 = display char. w. BLINK (encoded as 32)
723	723	// 0 = display char. w. UNDERLINE (encoded as 64).
724	724	display_char(bitmap, code, xpos, ypos, scroll_region, display_type \| ( ( (temp & 1)) << 3 )
725		\| ( (2-(temp & 2)) << 3 )
726		\| ( (4-(temp & 4)) << 3 )
727		\| ( (8-(temp & 8)) << 3 )
	725	\| ( (2-(temp & 2)) << 3 )
	726	\| ( (4-(temp & 4)) << 3 )
	727	\| ( (8-(temp & 8)) << 3 )
728	728	);
729	729
730		}
	730	}
731	731	xpos++;
732	732
733	733	if (xpos > m_columns )
r26736	r26737
738	738	} // (else) valid char
739	739
740	740	} // while
741
742	741
	742
743	743	}
744	744
745
	745
746	746	void rainbow_video_device::palette_select ( int choice )
747	747	{
748	748	switch(choice)
749	749	{
750		default:
751		case 0x01:
	750	default:
	751	case 0x01:
752	752	palette_set_color_rgb(machine(), 1, 0xff-100, 0xff-100, 0xff-100); // WHITE (dim)
753	753	palette_set_color_rgb(machine(), 2, 0xff-50, 0xff-50, 0xff-50); // WHITE NORMAL
754		palette_set_color_rgb(machine(), 3, 0xff, 0xff, 0xff); // WHITE (brighter)
	754	palette_set_color_rgb(machine(), 3, 0xff, 0xff, 0xff); // WHITE (brighter)
755	755	break;
756	756
757	757	case 0x02:
758	758	palette_set_color_rgb(machine(), 1, 0 , 205 -50, 100 - 50); // GREEN (dim)
759		palette_set_color_rgb(machine(), 2, 0 , 205, 100 ); // GREEN (NORMAL)
	759	palette_set_color_rgb(machine(), 2, 0 , 205, 100 ); // GREEN (NORMAL)
760	760	palette_set_color_rgb(machine(), 3, 0, 205 +50, 100 + 50); // GREEN (brighter)
761	761	break;
762	762
763		case 0x03:
	763	case 0x03:
764	764	palette_set_color_rgb(machine(), 1, 213 - 47, 146 - 47, 82 - 47); // AMBER (dim)
765	765	palette_set_color_rgb(machine(), 2, 213, 146, 82 ); // AMBER (NORMAL)
766	766	palette_set_color_rgb(machine(), 3, 255, 193, 129 ); // AMBER (brighter)
r26736	r26737
772	772	void rainbow_video_device::video_blanking(bitmap_ind16 &bitmap, const rectangle &cliprect)
773	773	{
774	774	// 'In reverse screen mode, termination forces the beam to the screen background intensity'
775		// Background intensity means 'dim' (1) according to one source.
776		bitmap.fill( ((m_reverse_field ^ m_basic_attribute) ? 1 : 0) , cliprect);
	775	// Background intensity means 'dim' (1) according to one source.
	776	bitmap.fill( ((m_reverse_field ^ m_basic_attribute) ? 1 : 0) , cliprect);
777	777	}
778	778
779	779
r26736	r26737
781	781	int rainbow_video_device::MHFU(int ASK)
782	782	{
783	783	switch (ASK)
784		{
785		case 1: // "true": RETURN BOOLEAN (MHFU disabled or enabled?)
	784	{
	785	case 1: // "true": RETURN BOOLEAN (MHFU disabled or enabled?)
786	786	return MHFU_FLAG;
787	787
788		case -1: // -1: increment, return counter value (=> Rainbow.c)
789		if (MHFU_FLAG == true)
790		MHFU_counter++;
	788	case -1: // -1: increment, return counter value (=> Rainbow.c)
	789	if (MHFU_FLAG == true)
	790	MHFU_counter++;
791	791	return MHFU_counter;
792	792
793		case -100: // -100 : RESET and ENABLE MHFU counter
794		//printf("-100 MHFU * reset and ENABLE * \n");
	793	case -100: // -100 : RESET and ENABLE MHFU counter
	794	//printf("-100 MHFU * reset and ENABLE * \n");
795	795	MHFU_counter = 0;
796	796
797		//if (MHFU_FLAG == false)
798		// printf("-100 MHFU ___ENABLED___\n");
	797	//if (MHFU_FLAG == false)
	798	// printf("-100 MHFU ___ENABLED___\n");
799	799	MHFU_FLAG = true;
800	800
801	801	return -100;

trunk/src/mess/video/poisk1.c
r26736	r26737
82	82
83	83	// CGA emulator
84	84	/*
85		068h D42 0..2 R, G, B XXX Foreground/Background color
86		3 NMI DISABLE NMI trap 1: Disabled 0: Enabled
87		4 PALETTE XXX Colour palette 0: XXX 1: XXX
88		5 I (INTENS) XXX Foreground/Background color intensity
89		6 DISPLAY BANK XXX Video RAM page
90		7 HIRES 1: 640x200 0: 320x200
	85	068h D42 0..2 R, G, B XXX Foreground/Background color
	86	3 NMI DISABLE NMI trap 1: Disabled 0: Enabled
	87	4 PALETTE XXX Colour palette 0: XXX 1: XXX
	88	5 I (INTENS) XXX Foreground/Background color intensity
	89	6 DISPLAY BANK XXX Video RAM page
	90	7 HIRES 1: 640x200 0: 320x200
91	91	*/
92	92
93	93	WRITE8_MEMBER(p1_state::p1_ppi2_porta_w)
r26736	r26737
125	125	}
126	126
127	127	/*
128		06Ah Dxx 6 Enable/Disable color burst (?)
129		7 Enable/Disable D7H/D7L
	128	06Ah Dxx 6 Enable/Disable color burst (?)
	129	7 Enable/Disable D7H/D7L
130	130	*/
131	131
132	132	WRITE8_MEMBER(p1_state::p1_ppi_portc_w)
r26736	r26737
151	151	}
152	152	// B&W -- XXX
153	153	/*
154		if ( m_video.mode_control_6a & 0x40 )
155		{
156		m_video.palette_lut_2bpp[1] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) \| 3;
157		m_video.palette_lut_2bpp[2] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) \| 4;
158		m_video.palette_lut_2bpp[3] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) \| 7;
159		}
160		else
	154	if ( m_video.mode_control_6a & 0x40 )
	155	{
	156	m_video.palette_lut_2bpp[1] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) \| 3;
	157	m_video.palette_lut_2bpp[2] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) \| 4;
	158	m_video.palette_lut_2bpp[3] = ( ( m_video.color_select_68 & 0x20 ) >> 2 ) \| 7;
	159	}
	160	else
161	161	*/
162	162	{
163	163	// PALETTE

trunk/src/mess/video/pc_t1t.h
r26736	r26737
14	14	index = 0;
15	15	memset(&data, 0, sizeof(data));
16	16	}
17
	17
18	18	UINT8 index;
19	19	UINT8 data[0x20];
20	20	/* see vgadoc
r26736	r26737
35	35	pc_t1t_device(const machine_config &mconfig, device_type type, const char name, const char tag, device_t owner, UINT32 clock, const char shortname, const char *source);
36	36
37	37	DECLARE_PALETTE_INIT( pcjr );
38
39		DECLARE_WRITE_LINE_MEMBER( t1000_de_changed );
40	38
	39	DECLARE_WRITE_LINE_MEMBER( t1000_de_changed );
	40
41	41	required_device<mc6845_device> m_mc6845;
42	42	UINT8 m_mode_control, m_color_select;
43	43	UINT8 m_status;
r26736	r26737
60	60	UINT8 m_display_enable;
61	61	UINT8 m_vsync;
62	62	UINT8 m_palette_base;
63
	63
64	64	int mode_control_r(void);
65	65	void color_select_w(int data);
66	66	int color_select_r(void);
r26736	r26737
87	87	protected:
88	88	virtual machine_config_constructor device_mconfig_additions() const;
89	89	virtual void device_start();
90
	90
91	91	private:
92	92	UINT8 *m_t1_displayram;
93	93	void mode_switch( void );
94	94	void vga_data_w(int data);
95	95	void bank_w(int data);
96	96	void mode_control_w(int data);
97		};
	97	};
98	98
99	99	extern const device_type PCVIDEO_T1000;
100	100
101	101	#define MCFG_PCVIDEO_T1000_ADD(_tag) \
102	102	MCFG_DEVICE_ADD(_tag, PCVIDEO_T1000, 0)
103
	103
104	104	class pcvideo_pcjr_device : public pc_t1t_device
105	105	{
106	106	public:
r26736	r26737
109	109
110	110	DECLARE_WRITE8_MEMBER( write );
111	111	DECLARE_WRITE_LINE_MEMBER( pcjr_vsync_changed );
112
	112
113	113	UINT8 *m_jxkanji;
114	114
115	115	protected:

trunk/src/mess/mess.lst
r26736	r26737
177	177	sq1 // 1990 SQ-1
178	178	sqrack // 1990 SQ-Rack
179	179	sd132 // 1991 SD-1 32
180		asr10 // 1992 ASR-10
	180	asr10 // 1992 ASR-10
181	181	kt76 // 1996 KT-76
182	182	mr61 // 1996 MR-61
183	183	mrrack // 1996 MR-Rack
184		asrx // 1997 ASR-X
	184	asrx // 1997 ASR-X
185	185
186	186	// Fairchild
187	187	channelf // Fairchild Channel F VES - 1976
r26736	r26737
451	451	apple2c3 // Sep 1986 Apple //c (Original Mem. Exp.)
452	452	apple2c4 // ??? 198? Apple //c (rev 4)
453	453	apple2cp // Sep 1988 Apple //c+
454		apple2gsr0p // June 19, 1986 Apple IIgs ROM00 prototype
	454	apple2gsr0p // June 19, 1986 Apple IIgs ROM00 prototype
455	455	apple2gsr0 // Sep 1986 Apple IIgs ROM00
456	456	apple2gsr1 // Sep 1987 Apple IIgs ROM01
457	457	apple2gs // Aug 1989 Apple IIgs ROM03
r26736	r26737
1437	1437	dectalk // 1982 Digital Equipment Corporation
1438	1438	mc7105 // Elektronika MC7105
1439	1439	rainbow // DEC Rainbow 100B
1440		rainb190 // DEC Rainbow 190
	1440	rainb190 // DEC Rainbow 190
1441	1441
1442	1442	// Memotech
1443	1443	mtx512 // 1983 Memotech MTX 512
r26736	r26737
2311	2311	mkit09
2312	2312	cpu09
2313	2313	ivg09
2314

trunk/src/mess/layout/rainbow.lay
r26736	r26737
84	84	<color red="0.70" green="0.70" blue="0.70" />
85	85	</text>
86	86	</element>
87
	87
88	88	<element name="l8wait">
89	89	<text string="WAIT">
90	90	<color red="1.0" green="1.0" blue="1.0" />

trunk/src/mess/drivers/bullet.c
r26736	r26737
53	53	- memory banking is broken
54	54	- z80dart wait/ready
55	55	- IMI 7710 Winchester controller
56		chdman createhd -o imi7710.chd -chs 350,3,10 -ss 1024
	56	chdman createhd -o imi7710.chd -chs 350,3,10 -ss 1024
57	57	- revision E model
58	58
59	59	*/

trunk/src/mess/drivers/ec184x.c
r26736	r26737
223	223
224	224	static ADDRESS_MAP_START( ec1847_io, AS_IO, 8, ec184x_state )
225	225	ADDRESS_MAP_UNMAP_HIGH
226		// AM_RANGE(0x0210, 0x021f) AM_RAM // internal (non-standard?) bus extender
	226	// AM_RANGE(0x0210, 0x021f) AM_RAM // internal (non-standard?) bus extender
227	227	ADDRESS_MAP_END
228	228
229	229
r26736	r26737
251	251	MCFG_IBM5150_MOTHERBOARD_ADD("mb","maincpu")
252	252	MCFG_DEVICE_INPUT_DEFAULTS(ec1840)
253	253
254		MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "mda", false) // cga is? an option
	254	MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "mda", false) // cga is? an option
255	255	MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "fdc_xt", false)
256		MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, NULL, false) // native variant(s?) not emulated
257		MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, NULL, false) // native serial not emulated
258		MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false) // native mouse port not emulated
259		MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false) // game port is an option
	256	MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, NULL, false) // native variant(s?) not emulated
	257	MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, NULL, false) // native serial not emulated
	258	MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false) // native mouse port not emulated
	259	MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false) // game port is an option
260	260
261	261	MCFG_SOFTWARE_LIST_ADD("flop_list","ec1841")
262	262
r26736	r26737
271	271	MCFG_CPU_PROGRAM_MAP(ec1841_map)
272	272	MCFG_CPU_IO_MAP(ec1841_io)
273	273
274		// MCFG_MACHINE_START_OVERRIDE(ec184x_state, ec184x)
	274	// MCFG_MACHINE_START_OVERRIDE(ec184x_state, ec184x)
275	275	MCFG_MACHINE_RESET_OVERRIDE(ec184x_state, ec184x)
276	276
277	277	MCFG_EC1841_MOTHERBOARD_ADD("mb", "maincpu")
r26736	r26737
279	279
280	280	MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "cga_ec1841", false)// mda is an option
281	281	MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "fdc_xt", false)
282		MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, NULL, false) // native variants not emulated
283		MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, NULL, false) // native serial not emulated
284		MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false) // native mouse port not emulated
285		MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false) // game port is? an option
	282	MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, NULL, false) // native variants not emulated
	283	MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, NULL, false) // native serial not emulated
	284	MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false) // native mouse port not emulated
	285	MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false) // game port is? an option
286	286
287	287	MCFG_SOFTWARE_LIST_ADD("flop_list","ec1841")
288	288
r26736	r26737
290	290
291	291	MCFG_RAM_ADD(RAM_TAG)
292	292	MCFG_RAM_DEFAULT_SIZE("512K")
293		MCFG_RAM_EXTRA_OPTIONS("1024K,1576K,2048K") // 640K variant not emulated
	293	MCFG_RAM_EXTRA_OPTIONS("1024K,1576K,2048K") // 640K variant not emulated
294	294	MACHINE_CONFIG_END
295	295
296	296	// XXX verify everything
r26736	r26737
302	302	MCFG_IBM5160_MOTHERBOARD_ADD("mb","maincpu")
303	303	MCFG_DEVICE_INPUT_DEFAULTS(ec1847)
304	304
305		MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "hercules", false) // cga, ega and vga(?) are options too
	305	MCFG_ISA8_SLOT_ADD("mb:isa", "isa1", pc_isa8_cards, "hercules", false) // cga, ega and vga(?) are options too
306	306	MCFG_ISA8_SLOT_ADD("mb:isa", "isa2", pc_isa8_cards, "fdc_xt", false)
307		MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, NULL, false) // native variant (wd1010 + z80) not emulated
308		MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, NULL, false) // native serial (2x8251) not emulated
	307	MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, NULL, false) // native variant (wd1010 + z80) not emulated
	308	MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, NULL, false) // native serial (2x8251) not emulated
309	309	MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false)
310	310	MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false)
311	311

trunk/src/mess/drivers/a7800.c
r26736	r26737
70	70
71	71	2013/11/03 Robert Tuccitto Fixed correctly typo under 26.7 7$.
72	72
73		2014/11/23 Robert Tuccitto Added NTSC Palette Notes
	73	2014/11/23 Robert Tuccitto Added NTSC Palette Notes
74	74	***************************************************************************/
75	75
76	76	#include "emu.h"
r26736	r26737
159	159	/***************************************************************************
160	160	Atari 7800 NTSC Palette Notes:
161	161
162		Palette on a modern flat panel display (LCD, LED, Plasma, etc.) appears
163		different from a traditional CRT. The most outstanding difference is Hue 1x,
164		the hue begin point. Hue 1x looks very 'green' (~-60 to -45 degrees -
165		depending on how poor or well it handles the signal conversion and its
166		calibration) on a modern flat panel display, as opposed to 'gold' (~-33
167		degrees) on a CRT.
	162	Palette on a modern flat panel display (LCD, LED, Plasma, etc.) appears
	163	different from a traditional CRT. The most outstanding difference is Hue 1x,
	164	the hue begin point. Hue 1x looks very 'green' (~-60 to -45 degrees -
	165	depending on how poor or well it handles the signal conversion and its
	166	calibration) on a modern flat panel display, as opposed to 'gold' (~-33
	167	degrees) on a CRT.
168	168
169		The system's pot adjustment manually manipulates the ratio of blue to
170		green/blue to red, while the system 'warming-up' causes the palette phase
	169	The system's pot adjustment manually manipulates the ratio of blue to
	170	green/blue to red, while the system 'warming-up' causes the palette phase
171	171	shift to go higher in degrees.
172	172
173		At power on, the system's phase shift appears as low as ~23 degrees and
174		after a considerable consistent runtime, can be as high as ~28 degrees.
175
176		In general, the low end of ~23 degrees lasts for maybe several seconds,
177		whereas higher values such as ~25-27 degrees is the most dominant during
178		system run time. 180 degrees colorburst takes place at ~25.7 degrees (A
179		near exact match of Hue 1x and 15x - To the naked eye they appear to be
180		the same).
181
182		However, if the system is adjusted within the first several minutes of
183		running, the warm up, consistent system run time, causes Hue 15x (F$) to
184		become stronger/darker gold (More brown then ultimately red-brown); as well
185		as leans Hue 14x (E$) more brown than green. Once achieving a phase shift
186		of 27.7, Hue 14x (E$) and Hue 15x (F$) near-exact match Hue 1x and 2x
187		respectively.
188
189		Therefore, an ideal phase shift while accounting for the reality of
190		shifting while warming up, as well as maintaining differences between 1x,
191		2x and 14x, 15x, would likely fall between a 25.7 and 27.7. Phase shifts
192		26.2 degrees and 26.7 degrees places Hue 15x (F$) between Hue 1x and
193		Hue 2x, having 26.2 degrees leaning closer to Hue 1x and 26.7 degrees
	173	At power on, the system's phase shift appears as low as ~23 degrees and
	174	after a considerable consistent runtime, can be as high as ~28 degrees.
	175
	176	In general, the low end of ~23 degrees lasts for maybe several seconds,
	177	whereas higher values such as ~25-27 degrees is the most dominant during
	178	system run time. 180 degrees colorburst takes place at ~25.7 degrees (A
	179	near exact match of Hue 1x and 15x - To the naked eye they appear to be
	180	the same).
	181
	182	However, if the system is adjusted within the first several minutes of
	183	running, the warm up, consistent system run time, causes Hue 15x (F$) to
	184	become stronger/darker gold (More brown then ultimately red-brown); as well
	185	as leans Hue 14x (E$) more brown than green. Once achieving a phase shift
	186	of 27.7, Hue 14x (E$) and Hue 15x (F$) near-exact match Hue 1x and 2x
	187	respectively.
	188
	189	Therefore, an ideal phase shift while accounting for the reality of
	190	shifting while warming up, as well as maintaining differences between 1x,
	191	2x and 14x, 15x, would likely fall between a 25.7 and 27.7. Phase shifts
	192	26.2 degrees and 26.7 degrees places Hue 15x (F$) between Hue 1x and
	193	Hue 2x, having 26.2 degrees leaning closer to Hue 1x and 26.7 degrees
194	194	leaning closer to Hue 2x.
195	195
196		The above notion would also harmonize with what has been documented for
197		the colors of 1x, 2x, 14x, 15x on the 7800. 1x = Gold, 2x = Orange,
198		14x (E$) = Orange-Green. 15x (F$) = Light Orange. Color descriptions are
199		best measured in the middle of the brightness scale. It should be
	196	The above notion would also harmonize with what has been documented for
	197	the colors of 1x, 2x, 14x, 15x on the 7800. 1x = Gold, 2x = Orange,
	198	14x (E$) = Orange-Green. 15x (F$) = Light Orange. Color descriptions are
	199	best measured in the middle of the brightness scale. It should be
200	200	mentioned that Green-Yellow is referenced at Hue 13x (D$), nowhere near
201		Hue 1x. A Green-Yellow Hue 1x is how the palette is manipulated and
	201	Hue 1x. A Green-Yellow Hue 1x is how the palette is manipulated and
202	202	modified (in part) under a modern flat panel display.
203	203
204		Additionally, the blue to red (And consequently blue to green) ratio
205		proportions may appear different on a modern flat panel display than a CRT
206		in some instances for the Atari 7800 system. Furthermore, you may have
	204	Additionally, the blue to red (And consequently blue to green) ratio
	205	proportions may appear different on a modern flat panel display than a CRT
	206	in some instances for the Atari 7800 system. Furthermore, you may have
207	207	some variation of proportions even within the same display type.
208
209		One side effect of this on the console's palette is that some values of
210		red may appear too pinkish - Too much blue to red. This is not the same
211		as a traditional tint-hue control adjustment; rather, can be demonstrated
	208
	209	One side effect of this on the console's palette is that some values of
	210	red may appear too pinkish - Too much blue to red. This is not the same
	211	as a traditional tint-hue control adjustment; rather, can be demonstrated
212	212	by changing the blue ratio values via MESS HLSL settings.
213	213
214		Lastly, the Atari 2600 & 5200 NTSC color palettes hold the same hue
215		structure order and have similar appearance differences that are dependent
	214	Lastly, the Atari 2600 & 5200 NTSC color palettes hold the same hue
	215	structure order and have similar appearance differences that are dependent
216	216	upon display type.
217	217	***************************************************************************/
218	218	/***************************************************************************

trunk/src/mess/drivers/ht68k.c
r26736	r26737
87	87	memcpy((UINT8*)m_p_ram.target(),user1,0x8000);
88	88
89	89	m_maincpu->reset();
90
	90
91	91	m_fdc->reset();
92	92	m_fdc->set_floppy(NULL);
93	93	}

trunk/src/mess/drivers/pc.c
r26736	r26737
1075	1075	MCFG_CPU_PROGRAM_MAP(tandy1000_map) \
1076	1076	MCFG_CPU_IO_MAP(tandy1000_io) \
1077	1077	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", pc_state, pc_frame_interrupt, "pcvideo_t1000:screen", 0, 1) //with this line commented out, it boots further though keyboard doesn't work, obviously
1078
	1078
1079	1079	MCFG_MACHINE_START_OVERRIDE(tandy_pc_state,pc)
1080	1080	MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
1081	1081
r26736	r26737
1144	1144	MCFG_CPU_PROGRAM_MAP(tandy1000_16_map) \
1145	1145	MCFG_CPU_IO_MAP(tandy1000_16_io) \
1146	1146	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", pc_state, pc_frame_interrupt, "pcvideo_t1000:screen", 0, 1)
1147
1148
	1147
	1148
1149	1149	MCFG_MACHINE_START_OVERRIDE(tandy_pc_state,pc)
1150	1150	MCFG_MACHINE_RESET_OVERRIDE(tandy_pc_state,tandy1000rl)
1151	1151
r26736	r26737
1215	1215	MCFG_CPU_PROGRAM_MAP(tandy1000_286_map) \
1216	1216	MCFG_CPU_IO_MAP(tandy1000_286_io) \
1217	1217	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", pc_state, pc_frame_interrupt, "pcvideo_t1000:screen", 0, 1)
1218
1219
	1218
	1219
1220	1220	MCFG_MACHINE_START_OVERRIDE(pc_state,pc)
1221	1221	MCFG_MACHINE_RESET_OVERRIDE(pc_state,pc)
1222	1222
r26736	r26737
1302	1302	MCFG_CPU_PROGRAM_MAP(ibmpcjr_map) \
1303	1303	MCFG_CPU_IO_MAP(ibmpcjr_io) \
1304	1304	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", pc_state, pcjr_frame_interrupt, "pcvideo_pcjr:screen", 0, 1) //with this line commented out, it boots further though keyboard doesn't work, obviously
1305
	1305
1306	1306	MCFG_MACHINE_START_OVERRIDE(pc_state,pcjr)
1307	1307	MCFG_MACHINE_RESET_OVERRIDE(pc_state,pcjr)
1308	1308

trunk/src/mess/drivers/myvision.c
r26736	r26737
17	17	- Add clickable artwork
18	18	- Verify sound chip model
19	19	- Verify exact TMS9918 model
20		- Verify clock crystal(s)
21		- Verify size of vram
	20	- Verify clock crystal(s)
	21	- Verify size of vram
22	22
23	23	****************************************************************************/
24	24
r26736	r26737
225	225
226	226	static const ay8910_interface myvision_ay8910_interface =
227	227	{
228		AY8910_LEGACY_OUTPUT,
229		AY8910_DEFAULT_LOADS,
230		DEVCB_DRIVER_MEMBER(myvision_state, ay_port_a_r),
231		DEVCB_DRIVER_MEMBER(myvision_state, ay_port_b_r),
232		DEVCB_DRIVER_MEMBER(myvision_state, ay_port_a_w),
233		DEVCB_DRIVER_MEMBER(myvision_state, ay_port_b_w)
	228	AY8910_LEGACY_OUTPUT,
	229	AY8910_DEFAULT_LOADS,
	230	DEVCB_DRIVER_MEMBER(myvision_state, ay_port_a_r),
	231	DEVCB_DRIVER_MEMBER(myvision_state, ay_port_b_r),
	232	DEVCB_DRIVER_MEMBER(myvision_state, ay_port_a_w),
	233	DEVCB_DRIVER_MEMBER(myvision_state, ay_port_b_w)
234	234	};
235	235
236	236
r26736	r26737
271	271
272	272	/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
273	273	COMP( 1983, myvision, 0, 0, myvision, myvision, driver_device, 0, "Nichibutsu", "My Vision (KH-1000)", 0 )
274

trunk/src/mess/drivers/mkit09.c
r26736	r26737
142	142	sprintf(kbdrow,"X%d",m_keydata);
143	143	return ioport(kbdrow)->read();
144	144	}
145
	145
146	146	return 0xff;
147	147	}
148	148

trunk/src/mess/drivers/apple2gs.c
r26736	r26737
511	511	ROM_REGION(0x20000, "es5503", ROMREGION_ERASE00)
512	512	ROM_END
513	513
514		ROM_START(apple2gsr0p) // 6/19/1986 Cortland prototype
	514	ROM_START(apple2gsr0p) // 6/19/1986 Cortland prototype
515	515	ROM_REGION(0xc00,"m50740",0)
516	516	ROM_LOAD( "341s0345.bin", 0x000000, 0x000c00, CRC(48cd5779) SHA1(97e421f5247c00a0ca34cd08b6209df573101480) )
517	517
r26736	r26737
535	535	COMP( 1987, apple2gsr1, apple2gs, 0, apple2gsr1, apple2gs, driver_device, 0, "Apple Computer", "Apple IIgs (ROM01)", GAME_SUPPORTS_SAVE )
536	536	COMP( 1986, apple2gsr0, apple2gs, 0, apple2gsr1, apple2gs, driver_device, 0, "Apple Computer", "Apple IIgs (ROM00)", GAME_SUPPORTS_SAVE )
537	537	COMP( 1986, apple2gsr0p,apple2gs, 0, apple2gsr1, apple2gs, driver_device, 0, "Apple Computer", "Apple IIgs (ROM00 prototype 6/19/1986)", GAME_SUPPORTS_SAVE )
538

trunk/src/mess/drivers/iskr103x.c
r26736	r26737
83	83	MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false)
84	84
85	85	MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_EC_1841)
86		// MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_ISKR_1030)
	86	// MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_ISKR_1030)
87	87
88	88	MCFG_RAM_ADD(RAM_TAG)
89	89	MCFG_RAM_DEFAULT_SIZE("640K")
r26736	r26737
105	105	MCFG_ISA8_SLOT_ADD("mb:isa", "isa5", pc_isa8_cards, NULL, false)
106	106	MCFG_ISA8_SLOT_ADD("mb:isa", "isa6", pc_isa8_cards, NULL, false)
107	107
108		// MCFG_SOFTWARE_LIST_ADD("flop_list", "iskr1031")
	108	// MCFG_SOFTWARE_LIST_ADD("flop_list", "iskr1031")
109	109
110	110	MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_EC_1841)
111		// MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_ISKR_1030)
	111	// MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_ISKR_1030)
112	112
113	113	MCFG_RAM_ADD(RAM_TAG)
114	114	MCFG_RAM_DEFAULT_SIZE("640K")

trunk/src/mess/drivers/esqkt.c
r26736	r26737
291	291	}
292	292
293	293	CONS( 1996, kt76, 0, 0, kt, kt, esqkt_state, kt, "Ensoniq", "KT-76", GAME_NOT_WORKING )
294

trunk/src/mess/drivers/v6809.c
r26736	r26737
317	317
318	318	WRITE_LINE_MEMBER( v6809_state::speaker_w )
319	319	{
320		// if (m_speaker_en)
321		// m_speaker->level_w(state);
	320	// if (m_speaker_en)
	321	// m_speaker->level_w(state);
322	322	}
323	323
324	324	static const ptm6840_interface mc6840_intf =

trunk/src/mess/drivers/wicat.c
r26736	r26737
690	690	MCFG_CPU_ADD("floppycpu",N8X300,XTAL_8MHz)
691	691	MCFG_CPU_PROGRAM_MAP(wicat_flop_mem)
692	692	MCFG_CPU_IO_MAP(wicat_flop_io)
693		// MCFG_FD1795_ADD("fdc")
	693	// MCFG_FD1795_ADD("fdc")
694	694
695	695	MACHINE_CONFIG_END
696	696

trunk/src/mess/drivers/xerox820.c
r26736	r26737
14	14
15	15	- Xerox 820
16	16	- floppy format has 3xcd at the end of track data
17		:u109: write track 0
18		:u109: track description 16xff ... 109xff 3xcd
	17	:u109: write track 0
	18	:u109: track description 16xff ... 109xff 3xcd
19	19	- Xerox 820-II
20	20	- floppy (read/write to FDC triggers Z80 WAIT)
21	21	- Winchester

trunk/src/mess/drivers/cbm2.c
r26736	r26737
2166	2166	MCFG_PLS100_ADD(PLA2_TAG)
2167	2167	MCFG_TPI6525_ADD(MOS6525_1_TAG, p500_tpi1_intf)
2168	2168	MCFG_TPI6525_ADD(MOS6525_2_TAG, p500_tpi2_intf)
2169
	2169
2170	2170	MCFG_DEVICE_ADD(MOS6551A_TAG, MOS6551, XTAL_1_8432MHz)
2171	2171	MCFG_MOS6551_IRQ_HANDLER(DEVWRITELINE(MOS6525_1_TAG, tpi6525_device, i4_w))
2172	2172	MCFG_MOS6551_TXD_HANDLER(DEVWRITELINE(RS232_TAG, rs232_port_device, tx))

trunk/src/mess/drivers/v1050.c
r26736	r26737
142	142
143	143	TODO:
144	144
145		- floppy 1 is broken
	145	- floppy 1 is broken
146	146	- write to banked RAM at 0x0000-0x1fff when ROM is active
147	147	- real keyboard w/i8049
148	148	- keyboard beeper (NE555 wired in strange mix of astable/monostable modes)

trunk/src/mess/drivers/atari400.c
r26736	r26737
28	28	- Clean up the whole driver + cart + floppy structure
29	29
30	30	2013-11-06 Robert Tuccitto:
31		Updated Palette per 'CGIA D020577' and 'GTIA C014805', including
	31	Updated Palette per 'CGIA D020577' and 'GTIA C014805', including
32	32	normalized grayscale with proper color gradient. Added Phase Shift
33		values 24.7 thru 27.7 degrees in 0.5 degree increments. Enabled
	33	values 24.7 thru 27.7 degrees in 0.5 degree increments. Enabled
34	34	Phase Shift 26.2 degrees as default.
35	35
36	36	2013-11-23 Robert Tuccitto:
37		Added palette notes
	37	Added palette notes
38	38
39	39	******************************************************************************/
40	40
r26736	r26737
754	754
755	755	INPUT_PORTS_END
756	756	/***************************************************************
757		Atari 5200 Palette Notes:
	757	Atari 5200 Palette Notes:
758	758
759		Palette on a modern flat panel display (LCD, LED, Plasma, etc.)
760		appears different from a traditional CRT. The most outstanding
761		difference is Hue 1x, the hue begin point. Hue 1x looks very
762		'green' (~-60 to -45 degrees - depending on how poor or well it
763		handles the signal conversion and its calibration) on a modern
764		flat panel display, as opposed to 'gold' (~-33 degrees) on a
765		CRT. The official technical document, "GTIA C014805 NTSC"
	759	Palette on a modern flat panel display (LCD, LED, Plasma, etc.)
	760	appears different from a traditional CRT. The most outstanding
	761	difference is Hue 1x, the hue begin point. Hue 1x looks very
	762	'green' (~-60 to -45 degrees - depending on how poor or well it
	763	handles the signal conversion and its calibration) on a modern
	764	flat panel display, as opposed to 'gold' (~-33 degrees) on a
	765	CRT. The official technical document, "GTIA C014805 NTSC"
766	766	stipulates Hue 1x as gold.
767	767
768		The "Atari 5200 Field Service Manual" provides two different
769		sets of instructions in harmony with utilizing the "PAM
770		Diagnostic SALT Cartridge v1.1". In one account it states the
771		color just below and above the reference bar to be within one
772		shade of each other.
	768	The "Atari 5200 Field Service Manual" provides two different
	769	sets of instructions in harmony with utilizing the "PAM
	770	Diagnostic SALT Cartridge v1.1". In one account it states the
	771	color just below and above the reference bar to be within one
	772	shade of each other.
773	773
774		Under the same reference document, directions are given for it
775		to be the same color. Phase Shift 25.7 degrees matches Hue 1x,
	774	Under the same reference document, directions are given for it
	775	to be the same color. Phase Shift 25.7 degrees matches Hue 1x,
776	776	15x and the color below the reference bar.
777	777
778		However, if the system is adjusted within the first several
779		minutes of running, the warm up, consistent system run time,
780		causes Hue 15x (F$) to become stronger/darker gold (More brown
781		then ultimately red-brown); as well as leans Hue 14x (E$) more
782		brown than green. Once achieving a phase shift of 27.7,
783		Hue 14x (E$) and Hue 15x (F$) near-exact match Hue 1x and 2x
784		respectively.
	778	However, if the system is adjusted within the first several
	779	minutes of running, the warm up, consistent system run time,
	780	causes Hue 15x (F$) to become stronger/darker gold (More brown
	781	then ultimately red-brown); as well as leans Hue 14x (E$) more
	782	brown than green. Once achieving a phase shift of 27.7,
	783	Hue 14x (E$) and Hue 15x (F$) near-exact match Hue 1x and 2x
	784	respectively.
785	785
786		Accounting for system 'warm-up', phase shifting, as well as the
787		instructions for it to be within one shade of each other, would
788		make Phase Shift 26.2 degrees or 26.7 degrees a realistic
	786	Accounting for system 'warm-up', phase shifting, as well as the
	787	instructions for it to be within one shade of each other, would
	788	make Phase Shift 26.2 degrees or 26.7 degrees a realistic
789	789	logical choice.
790	790
791		It also collaborates with the official "GTIA C014805 NTSC"
792		document for color order: Hue 1x = Gold, Hue 2x = Orange,
793		Hue 15x (F$) = Light-Orange; Phase Shift 26.2 places
794		Hue 15x (F$) between Hue 1x, Gold and Hue 2x, Orange;
795		a Light Orange in color. Color descriptions are best measured
796		in the middle of the brightness scale.
	791	It also collaborates with the official "GTIA C014805 NTSC"
	792	document for color order: Hue 1x = Gold, Hue 2x = Orange,
	793	Hue 15x (F$) = Light-Orange; Phase Shift 26.2 places
	794	Hue 15x (F$) between Hue 1x, Gold and Hue 2x, Orange;
	795	a Light Orange in color. Color descriptions are best measured
	796	in the middle of the brightness scale.
797	797
798		It should be mentioned that Green-Yellow is referenced at
799		Hue 13x (D$), nowhere near Hue 1x. A Green-Yellow Hue 1x is
800		how the palette is manipulated and modified (in part) under
	798	It should be mentioned that Green-Yellow is referenced at
	799	Hue 13x (D$), nowhere near Hue 1x. A Green-Yellow Hue 1x is
	800	how the palette is manipulated and modified (in part) under
801	801	a modern flat panel display.
802	802
803		Note though, even a properly calibrated console, at power on,
804		the phase shift appears as low as ~23 degrees and after a
805		considerable consistent runtime, can be as high as ~28 degrees.
806		In general, the low end of ~23 degrees lasts for maybe several
807		seconds, whereas higher values such as ~25-27 degrees is the
808		most dominant during system run time.
	803	Note though, even a properly calibrated console, at power on,
	804	the phase shift appears as low as ~23 degrees and after a
	805	considerable consistent runtime, can be as high as ~28 degrees.
	806	In general, the low end of ~23 degrees lasts for maybe several
	807	seconds, whereas higher values such as ~25-27 degrees is the
	808	most dominant during system run time.
809	809
810		Additionally, the blue to red (And consequently blue to green)
811		ratio proportions may appear different on a modern flat panel
812		display than a CRT in some instances for the Atari 5200 system.
813		Furthermore, you may have some variation of proportions even
	810	Additionally, the blue to red (And consequently blue to green)
	811	ratio proportions may appear different on a modern flat panel
	812	display than a CRT in some instances for the Atari 5200 system.
	813	Furthermore, you may have some variation of proportions even
814	814	within the same display type.
815
816		One side effect of this on the console's palette is that some
817		values of red may appear too pinkish - Too much blue to red.
818		This is not the same as a traditional tint-hue control
819		adjustment; rather, can be demonstrated by changing the blue
	815
	816	One side effect of this on the console's palette is that some
	817	values of red may appear too pinkish - Too much blue to red.
	818	This is not the same as a traditional tint-hue control
	819	adjustment; rather, can be demonstrated by changing the blue
820	820	ratio values via MESS HLSL settings.
821	821
822		Lastly, the Atari 2600 & 7800 NTSC color palettes hold the same
823		hue structure order and have similar appearance differences
	822	Lastly, the Atari 2600 & 7800 NTSC color palettes hold the same
	823	hue structure order and have similar appearance differences
824	824	dependent upon display type.
825	825	***************************************************************/
826	826	/**************************************************************
r26736	r26737
832	832	static const UINT8 atari_palette[256*3] =
833	833	{
834	834	/* Grey */
835		0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
836		0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
837		0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
838		0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
	835	0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
	836	0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
	837	0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
	838	0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
839	839	/* Gold */
840		0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
841		0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
842		0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
	840	0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
	841	0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
	842	0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
843	843	0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xF7,0x97,
844	844	/* Orange */
845		0x31,0x00,0x00, 0x42,0x06,0x00, 0x53,0x17,0x00, 0x64,0x28,0x00,
846		0x75,0x39,0x00, 0x86,0X4A,0x00, 0x97,0x5B,0x0B, 0xA8,0x6C,0x1C,
847		0xB9,0x7D,0x2D, 0xCA,0x8E,0x3E, 0xDB,0x9F,0x4F, 0xEC,0xB0,0x60,
848		0xFD,0xC1,0x71, 0xFF,0xD2,0x86, 0xFF,0xE3,0x9D, 0xFF,0xF4,0xB3,
	845	0x31,0x00,0x00, 0x42,0x06,0x00, 0x53,0x17,0x00, 0x64,0x28,0x00,
	846	0x75,0x39,0x00, 0x86,0X4A,0x00, 0x97,0x5B,0x0B, 0xA8,0x6C,0x1C,
	847	0xB9,0x7D,0x2D, 0xCA,0x8E,0x3E, 0xDB,0x9F,0x4F, 0xEC,0xB0,0x60,
	848	0xFD,0xC1,0x71, 0xFF,0xD2,0x86, 0xFF,0xE3,0x9D, 0xFF,0xF4,0xB3,
849	849	/* Red-Orange */
850		0x3E,0x00,0x00, 0x4F,0x00,0x00, 0x60,0x08,0x00, 0x71,0x19,0x00,
851		0x82,0x2A,0x0F, 0x93,0x3B,0x20, 0xA4,0x4C,0x31, 0xB5,0x5D,0x42,
852		0xC6,0x6E,0x53, 0xD7,0x7F,0x64, 0xE8,0x90,0x75, 0xF9,0xA1,0x86,
	850	0x3E,0x00,0x00, 0x4F,0x00,0x00, 0x60,0x08,0x00, 0x71,0x19,0x00,
	851	0x82,0x2A,0x0F, 0x93,0x3B,0x20, 0xA4,0x4C,0x31, 0xB5,0x5D,0x42,
	852	0xC6,0x6E,0x53, 0xD7,0x7F,0x64, 0xE8,0x90,0x75, 0xF9,0xA1,0x86,
853	853	0xFF,0xB2,0x9A, 0xFF,0xC3,0xB0, 0xFF,0xD4,0xC6, 0xFF,0xE5,0xDC,
854	854	/* Pink */
855		0x3E,0x00,0x06, 0x4F,0x00,0x12, 0x60,0x00,0x1E, 0x71,0x0E,0x2E,
856		0x82,0x1F,0x3F, 0x93,0x30,0x50, 0xA4,0x41,0x61, 0xB5,0x52,0x72,
857		0xC6,0x63,0x83, 0xD7,0x74,0x94, 0xE8,0x85,0xA5, 0xF9,0x96,0xB6,
	855	0x3E,0x00,0x06, 0x4F,0x00,0x12, 0x60,0x00,0x1E, 0x71,0x0E,0x2E,
	856	0x82,0x1F,0x3F, 0x93,0x30,0x50, 0xA4,0x41,0x61, 0xB5,0x52,0x72,
	857	0xC6,0x63,0x83, 0xD7,0x74,0x94, 0xE8,0x85,0xA5, 0xF9,0x96,0xB6,
858	858	0xFF,0xA7,0xCB, 0xFF,0xB8,0xE1, 0xFF,0xC9,0xEF, 0xFF,0xDA,0xF4,
859	859	/* Purple */
860		0x32,0x00,0x38, 0x43,0x00,0x44, 0x54,0x00,0x50, 0x65,0x0C,0x5F,
861		0x76,0x1D,0x70, 0x87,0x2E,0x81, 0x98,0x3F,0x92, 0xA9,0x50,0xA3,
862		0xBA,0x61,0xB4, 0xCB,0x72,0xC5, 0xDC,0x83,0xD6, 0xED,0x94,0xE4,
	860	0x32,0x00,0x38, 0x43,0x00,0x44, 0x54,0x00,0x50, 0x65,0x0C,0x5F,
	861	0x76,0x1D,0x70, 0x87,0x2E,0x81, 0x98,0x3F,0x92, 0xA9,0x50,0xA3,
	862	0xBA,0x61,0xB4, 0xCB,0x72,0xC5, 0xDC,0x83,0xD6, 0xED,0x94,0xE4,
863	863	0xFE,0xA5,0xE4, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
864	864	/* Purple-Blue */
865		0x1B,0x00,0x5F, 0x2C,0x00,0x6B, 0x3D,0x00,0x77, 0x4E,0x11,0x88,
866		0x5F,0x22,0x99, 0x70,0x33,0xAA, 0x81,0x44,0xBB, 0x92,0x55,0xCC,
867		0xA3,0x66,0xDD, 0xB4,0x77,0xED, 0xC5,0x88,0xED, 0xD6,0x99,0xED,
	865	0x1B,0x00,0x5F, 0x2C,0x00,0x6B, 0x3D,0x00,0x77, 0x4E,0x11,0x88,
	866	0x5F,0x22,0x99, 0x70,0x33,0xAA, 0x81,0x44,0xBB, 0x92,0x55,0xCC,
	867	0xA3,0x66,0xDD, 0xB4,0x77,0xED, 0xC5,0x88,0xED, 0xD6,0x99,0xED,
868	868	0xE7,0xAA,0xED, 0xF8,0xBB,0xED, 0xFF,0xCC,0xF0, 0xFF,0xDD,0xF5,
869	869	/* Blue 1 */
870		0x00,0x00,0x72, 0x10,0x00,0x7E, 0x21,0x0D,0x8E, 0x32,0x1E,0x9F,
871		0x43,0x2F,0xB0, 0x54,0x40,0xC1, 0x65,0x51,0xD2, 0x76,0x62,0xE3,
872		0x87,0x73,0xF4, 0x98,0x84,0xF9, 0xA9,0x95,0xF9, 0xBA,0xA6,0xF9,
	870	0x00,0x00,0x72, 0x10,0x00,0x7E, 0x21,0x0D,0x8E, 0x32,0x1E,0x9F,
	871	0x43,0x2F,0xB0, 0x54,0x40,0xC1, 0x65,0x51,0xD2, 0x76,0x62,0xE3,
	872	0x87,0x73,0xF4, 0x98,0x84,0xF9, 0xA9,0x95,0xF9, 0xBA,0xA6,0xF9,
873	873	0xCB,0xB7,0xF9, 0xDC,0xC8,0xF9, 0xED,0xD9,0xF9, 0xFE,0xEA,0xF9,
874	874	/* Blue 2 */
875		0x00,0x00,0x65, 0x00,0x0C,0x7A, 0x05,0x1D,0x8E, 0x16,0x2E,0x9F,
876		0x27,0x3F,0xB0, 0x38,0x50,0xC1, 0x49,0x61,0xD2, 0x5A,0x72,0xE3,
877		0x6B,0x83,0xF4, 0x7C,0x94,0xFF, 0x8D,0xA5,0xFF, 0x9E,0xB6,0xFF,
	875	0x00,0x00,0x65, 0x00,0x0C,0x7A, 0x05,0x1D,0x8E, 0x16,0x2E,0x9F,
	876	0x27,0x3F,0xB0, 0x38,0x50,0xC1, 0x49,0x61,0xD2, 0x5A,0x72,0xE3,
	877	0x6B,0x83,0xF4, 0x7C,0x94,0xFF, 0x8D,0xA5,0xFF, 0x9E,0xB6,0xFF,
878	878	0xAF,0xC7,0xFF, 0xC0,0xD8,0xFF, 0xD1,0xE9,0xFF, 0xE2,0xFA,0xFF,
879	879	/* Light-Blue */
880		0x00,0x0D,0x48, 0x00,0x1E,0x5E, 0x00,0x2F,0x74, 0x00,0x40,0x8A,
881		0x11,0x51,0x9B, 0x22,0x62,0xAC, 0x33,0x73,0xBD, 0x44,0x84,0xCE,
882		0x55,0x95,0xDF, 0x66,0xA6,0xF0, 0x77,0xB7,0xFF, 0x88,0xC8,0xFF,
	880	0x00,0x0D,0x48, 0x00,0x1E,0x5E, 0x00,0x2F,0x74, 0x00,0x40,0x8A,
	881	0x11,0x51,0x9B, 0x22,0x62,0xAC, 0x33,0x73,0xBD, 0x44,0x84,0xCE,
	882	0x55,0x95,0xDF, 0x66,0xA6,0xF0, 0x77,0xB7,0xFF, 0x88,0xC8,0xFF,
883	883	0x99,0xD9,0xFF, 0xAA,0xEA,0xFF, 0xBB,0xFB,0xFF, 0xCC,0xFF,0xFF,
884	884	/* Turquoise */
885		0x00,0x1C,0x1C, 0x00,0x2D,0x32, 0x00,0x3E,0x49, 0x00,0x4F,0x5F,
886		0x05,0x60,0x73, 0x16,0x71,0x84, 0x27,0x82,0x95, 0x38,0x93,0xA6,
887		0x49,0xA4,0xB7, 0x5A,0xB5,0xC8, 0x6B,0xC6,0xD9, 0x7C,0xD7,0xEA,
	885	0x00,0x1C,0x1C, 0x00,0x2D,0x32, 0x00,0x3E,0x49, 0x00,0x4F,0x5F,
	886	0x05,0x60,0x73, 0x16,0x71,0x84, 0x27,0x82,0x95, 0x38,0x93,0xA6,
	887	0x49,0xA4,0xB7, 0x5A,0xB5,0xC8, 0x6B,0xC6,0xD9, 0x7C,0xD7,0xEA,
888	888	0x8D,0xE8,0xFB, 0x9E,0xF9,0xFF, 0xAF,0xFF,0xFF, 0xC0,0xFF,0xFF,
889	889	/* Green-Blue */
890		0x00,0x25,0x0B, 0x00,0x36,0x10, 0x00,0x47,0x18, 0x00,0x58,0x2E,
891		0x07,0x69,0x42, 0x18,0x7A,0x53, 0x29,0x8B,0x64, 0x3A,0x9C,0x75,
892		0x4B,0xAD,0x86, 0x5C,0xBE,0x97, 0x6D,0xCF,0xA8, 0x7E,0xE0,0xB9,
	890	0x00,0x25,0x0B, 0x00,0x36,0x10, 0x00,0x47,0x18, 0x00,0x58,0x2E,
	891	0x07,0x69,0x42, 0x18,0x7A,0x53, 0x29,0x8B,0x64, 0x3A,0x9C,0x75,
	892	0x4B,0xAD,0x86, 0x5C,0xBE,0x97, 0x6D,0xCF,0xA8, 0x7E,0xE0,0xB9,
893	893	0x8F,0xF1,0xCA, 0xA0,0xFF,0xDA, 0xB1,0xFF,0xE6, 0xC2,0xFF,0xF2,
894	894	/* Green */
895		0x00,0x27,0x0C, 0x00,0x38,0x11, 0x00,0x49,0x16, 0x04,0x5A,0x1A,
896		0x15,0x6B,0x1A, 0x26,0x7C,0x22, 0x37,0x8D,0x33, 0x48,0x9E,0x44,
897		0x59,0xAF,0x55, 0x6A,0xC0,0x66, 0x7B,0xD1,0x77, 0x8C,0xE2,0x88,
	895	0x00,0x27,0x0C, 0x00,0x38,0x11, 0x00,0x49,0x16, 0x04,0x5A,0x1A,
	896	0x15,0x6B,0x1A, 0x26,0x7C,0x22, 0x37,0x8D,0x33, 0x48,0x9E,0x44,
	897	0x59,0xAF,0x55, 0x6A,0xC0,0x66, 0x7B,0xD1,0x77, 0x8C,0xE2,0x88,
898	898	0x9D,0xF3,0x99, 0xAE,0xFF,0xA8, 0xBF,0xFF,0xB4, 0xD0,0xFF,0xC0,
899	899	/* Yellow-Green */
900		0x00,0x21,0x0A, 0x00,0x32,0x0F, 0x0A,0x43,0x11, 0x1B,0x54,0x11,
901		0x2C,0x65,0x11, 0x3D,0x76,0x11, 0x4E,0x87,0x11, 0x5F,0x98,0x1E,
902		0x70,0xA9,0x2F, 0x81,0xBA,0x40, 0x92,0xCB,0x51, 0xA3,0xDC,0x62,
	900	0x00,0x21,0x0A, 0x00,0x32,0x0F, 0x0A,0x43,0x11, 0x1B,0x54,0x11,
	901	0x2C,0x65,0x11, 0x3D,0x76,0x11, 0x4E,0x87,0x11, 0x5F,0x98,0x1E,
	902	0x70,0xA9,0x2F, 0x81,0xBA,0x40, 0x92,0xCB,0x51, 0xA3,0xDC,0x62,
903	903	0xB4,0xED,0x73, 0xC5,0xFE,0x84, 0xD6,0xFF,0x90, 0xE7,0xFF,0x9C,
904	904	/* Orange-Green */
905		0x05,0x13,0x04, 0x16,0x24,0x04, 0x27,0x35,0x04, 0x38,0x46,0x04,
906		0x49,0x57,0x04, 0x5A,0x68,0x04, 0x6B,0x79,0x04, 0x7C,0x8A,0x09,
907		0x8D,0x9B,0x1A, 0x9E,0xAC,0x2B, 0xAF,0xBD,0x3C, 0xC0,0xCE,0x4D,
	905	0x05,0x13,0x04, 0x16,0x24,0x04, 0x27,0x35,0x04, 0x38,0x46,0x04,
	906	0x49,0x57,0x04, 0x5A,0x68,0x04, 0x6B,0x79,0x04, 0x7C,0x8A,0x09,
	907	0x8D,0x9B,0x1A, 0x9E,0xAC,0x2B, 0xAF,0xBD,0x3C, 0xC0,0xCE,0x4D,
908	908	0xD1,0xDF,0x5E, 0xE2,0xF0,0x6F, 0xF3,0xFF,0x80, 0xFF,0xFF,0x8D,
909	909	/* Light-Orange */
910		0x21,0x02,0x00, 0x32,0x13,0x00, 0x43,0x24,0x00, 0x54,0x35,0x00,
911		0x65,0x46,0x00, 0x76,0x57,0x00, 0x87,0x68,0x00, 0x98,0x79,0x0C,
912		0xA9,0x8A,0x1D, 0xBA,0x9B,0x2E, 0xCB,0xAC,0x3F, 0xDC,0xBD,0x50,
	910	0x21,0x02,0x00, 0x32,0x13,0x00, 0x43,0x24,0x00, 0x54,0x35,0x00,
	911	0x65,0x46,0x00, 0x76,0x57,0x00, 0x87,0x68,0x00, 0x98,0x79,0x0C,
	912	0xA9,0x8A,0x1D, 0xBA,0x9B,0x2E, 0xCB,0xAC,0x3F, 0xDC,0xBD,0x50,
913	913	0xED,0xCE,0x61, 0xFE,0xDF,0x72, 0xFF,0xF0,0x87, 0xFF,0xFF,0x9D
914	914	};
915	915
r26736	r26737
928	928	PALETTE - PHASE 24.7 SHIFT
929	929
930	930	GREY
931		0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
932		0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
933		0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
934		0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
	931	0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
	932	0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
	933	0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
	934	0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
935	935
936	936	GOLD
937		0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
938		0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
939		0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
940		0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xF7,0x97,
	937	0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
	938	0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
	939	0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
	940	0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xF7,0x97,
941	941
942	942	ORANGE
943		0x30,0x00,0x00, 0x41,0x07,0x00, 0x52,0x18,0x00, 0x63,0x29,0x00,
944		0x74,0x3A,0x00, 0x85,0x4B,0x00, 0x96,0x5C,0x0A, 0xA7,0x6D,0x1B,
945		0xB8,0x7E,0x2C, 0xC9,0x8F,0x3D, 0xDA,0xA0,0x4E, 0xEB,0xB1,0x5F,
946		0xFC,0xC2,0x70, 0xFF,0xD3,0x85, 0xFF,0xE4,0x9B, 0xFF,0xF5,0xB1,
	943	0x30,0x00,0x00, 0x41,0x07,0x00, 0x52,0x18,0x00, 0x63,0x29,0x00,
	944	0x74,0x3A,0x00, 0x85,0x4B,0x00, 0x96,0x5C,0x0A, 0xA7,0x6D,0x1B,
	945	0xB8,0x7E,0x2C, 0xC9,0x8F,0x3D, 0xDA,0xA0,0x4E, 0xEB,0xB1,0x5F,
	946	0xFC,0xC2,0x70, 0xFF,0xD3,0x85, 0xFF,0xE4,0x9B, 0xFF,0xF5,0xB1,
947	947
948	948	RED-ORANGE
949		0x3D,0x00,0x00, 0x4E,0x00,0x00, 0x5F,0x09,0x00, 0x70,0x1A,0x00,
950		0x81,0x2B,0x09, 0x92,0x3C,0x1A, 0xA3,0x4D,0x2B, 0xB4,0x5E,0x3C,
951		0xC5,0x6F,0x4D, 0xD6,0x80,0x5E, 0xE7,0x91,0x6F, 0xF8,0xA2,0x80,
952		0xFF,0xB3,0x94, 0xFF,0xC4,0xAA, 0xFF,0xD5,0xC0, 0xFF,0xE6,0xD6,
	949	0x3D,0x00,0x00, 0x4E,0x00,0x00, 0x5F,0x09,0x00, 0x70,0x1A,0x00,
	950	0x81,0x2B,0x09, 0x92,0x3C,0x1A, 0xA3,0x4D,0x2B, 0xB4,0x5E,0x3C,
	951	0xC5,0x6F,0x4D, 0xD6,0x80,0x5E, 0xE7,0x91,0x6F, 0xF8,0xA2,0x80,
	952	0xFF,0xB3,0x94, 0xFF,0xC4,0xAA, 0xFF,0xD5,0xC0, 0xFF,0xE6,0xD6,
953	953
954	954	PINK
955		0x3F,0x00,0x00, 0x50,0x00,0x09, 0x61,0x00,0x15, 0x72,0x10,0x26,
956		0x83,0x21,0x37, 0x94,0x32,0x48, 0xA5,0x43,0x59, 0xB6,0x54,0x6A,
957		0xC7,0x65,0x7B, 0xD8,0x76,0x8C, 0xE9,0x87,0x9D, 0xFA,0x98,0xAE,
958		0xFF,0xA9,0xC2, 0xFF,0xBA,0xD8, 0xFF,0xCB,0xEE, 0xFF,0xDC,0xF4,
	955	0x3F,0x00,0x00, 0x50,0x00,0x09, 0x61,0x00,0x15, 0x72,0x10,0x26,
	956	0x83,0x21,0x37, 0x94,0x32,0x48, 0xA5,0x43,0x59, 0xB6,0x54,0x6A,
	957	0xC7,0x65,0x7B, 0xD8,0x76,0x8C, 0xE9,0x87,0x9D, 0xFA,0x98,0xAE,
	958	0xFF,0xA9,0xC2, 0xFF,0xBA,0xD8, 0xFF,0xCB,0xEE, 0xFF,0xDC,0xF4,
959	959
960	960	PURPLE
961		0x36,0x00,0x2E, 0x47,0x00,0x3A, 0x58,0x00,0x46, 0x69,0x0C,0x55,
962		0x7A,0x1D,0x66, 0x8B,0x2E,0x77, 0x9C,0x3F,0x88, 0xAD,0x50,0x99,
963		0xBE,0x61,0xAA, 0xCF,0x72,0xBB, 0xE0,0x83,0xCC, 0xF1,0x94,0xDD,
964		0xFF,0xA5,0xE4, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
	961	0x36,0x00,0x2E, 0x47,0x00,0x3A, 0x58,0x00,0x46, 0x69,0x0C,0x55,
	962	0x7A,0x1D,0x66, 0x8B,0x2E,0x77, 0x9C,0x3F,0x88, 0xAD,0x50,0x99,
	963	0xBE,0x61,0xAA, 0xCF,0x72,0xBB, 0xE0,0x83,0xCC, 0xF1,0x94,0xDD,
	964	0xFF,0xA5,0xE4, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
965	965
966	966	PURPLE-BLUE
967		0x23,0x00,0x55, 0x34,0x00,0x61, 0x45,0x00,0x6D, 0x56,0x0F,0x7E,
968		0x67,0x20,0x8F, 0x78,0x31,0xA0, 0x89,0x42,0xB1, 0x9A,0x53,0xC2,
969		0xAB,0x64,0xD3, 0xBC,0x75,0xE4, 0xCD,0x86,0xEA, 0xDE,0x97,0xEA,
970		0xEF,0xA8,0xEA, 0xFF,0xB9,0xEA, 0xFF,0xCA,0xEF, 0xFF,0xDB,0xF4,
	967	0x23,0x00,0x55, 0x34,0x00,0x61, 0x45,0x00,0x6D, 0x56,0x0F,0x7E,
	968	0x67,0x20,0x8F, 0x78,0x31,0xA0, 0x89,0x42,0xB1, 0x9A,0x53,0xC2,
	969	0xAB,0x64,0xD3, 0xBC,0x75,0xE4, 0xCD,0x86,0xEA, 0xDE,0x97,0xEA,
	970	0xEF,0xA8,0xEA, 0xFF,0xB9,0xEA, 0xFF,0xCA,0xEF, 0xFF,0xDB,0xF4,
971	971
972	972	BLUE1
973		0x09,0x00,0x6E, 0x1A,0x00,0x7A, 0x2B,0x08,0x88, 0x3C,0x19,0x99,
974		0x4D,0x2A,0xAA, 0x5E,0x3B,0xBB, 0x6F,0x4C,0xCC, 0x80,0x5D,0xDD,
975		0x91,0x6E,0xEE, 0xA2,0x7F,0xF4, 0xB3,0x90,0xF4, 0xC4,0xA1,0xF4,
976		0xD5,0xB2,0xF4, 0xE6,0xC3,0xF4, 0xF7,0xD4,0xF4, 0xFF,0xE5,0xF7,
	973	0x09,0x00,0x6E, 0x1A,0x00,0x7A, 0x2B,0x08,0x88, 0x3C,0x19,0x99,
	974	0x4D,0x2A,0xAA, 0x5E,0x3B,0xBB, 0x6F,0x4C,0xCC, 0x80,0x5D,0xDD,
	975	0x91,0x6E,0xEE, 0xA2,0x7F,0xF4, 0xB3,0x90,0xF4, 0xC4,0xA1,0xF4,
	976	0xD5,0xB2,0xF4, 0xE6,0xC3,0xF4, 0xF7,0xD4,0xF4, 0xFF,0xE5,0xF7,
977	977
978	978	BLUE2
979		0x00,0x00,0x6D, 0x00,0x05,0x80, 0x10,0x16,0x91, 0x21,0x27,0xA2,
980		0x32,0x38,0xB3, 0x43,0x49,0xC4, 0x54,0x5A,0xD5, 0x65,0x6B,0xE6,
981		0x76,0x7C,0xF7, 0x87,0x8D,0xFF, 0x98,0x9E,0xFF, 0xA9,0xAF,0xFF,
982		0xBA,0xC0,0xFF, 0xCB,0xD1,0xFF, 0xDC,0xE2,0xFF, 0xED,0xF3,0xFF
	979	0x00,0x00,0x6D, 0x00,0x05,0x80, 0x10,0x16,0x91, 0x21,0x27,0xA2,
	980	0x32,0x38,0xB3, 0x43,0x49,0xC4, 0x54,0x5A,0xD5, 0x65,0x6B,0xE6,
	981	0x76,0x7C,0xF7, 0x87,0x8D,0xFF, 0x98,0x9E,0xFF, 0xA9,0xAF,0xFF,
	982	0xBA,0xC0,0xFF, 0xCB,0xD1,0xFF, 0xDC,0xE2,0xFF, 0xED,0xF3,0xFF
983	983
984	984	LIGHT-BLUE
985		0x00,0x05,0x57, 0x00,0x16,0x6E, 0x00,0x27,0x84, 0x09,0x38,0x97,
986		0x1A,0x49,0xA8, 0x2B,0x5A,0xB9, 0x3C,0x6B,0xCA, 0x4D,0x7C,0xDB,
987		0x5E,0x8D,0xEC, 0x6F,0x9E,0xFD, 0x80,0xAF,0xFF, 0x91,0xC0,0xFF,
988		0xA2,0xD1,0xFF, 0xB3,0xE2,0xFF, 0xC4,0xF3,0xFF, 0xD5,0xFF,0xFF,
	985	0x00,0x05,0x57, 0x00,0x16,0x6E, 0x00,0x27,0x84, 0x09,0x38,0x97,
	986	0x1A,0x49,0xA8, 0x2B,0x5A,0xB9, 0x3C,0x6B,0xCA, 0x4D,0x7C,0xDB,
	987	0x5E,0x8D,0xEC, 0x6F,0x9E,0xFD, 0x80,0xAF,0xFF, 0x91,0xC0,0xFF,
	988	0xA2,0xD1,0xFF, 0xB3,0xE2,0xFF, 0xC4,0xF3,0xFF, 0xD5,0xFF,0xFF,
989	989
990	990	TURQUOISE
991		0x00,0x15,0x34, 0x00,0x26,0x4A, 0x00,0x37,0x60, 0x00,0x48,0x77,
992		0x0A,0x59,0x8A, 0x1B,0x6A,0x9B, 0x2C,0x7B,0xAC, 0x3D,0x8C,0xBD,
993		0x4E,0x9D,0xCE, 0x5F,0xAE,0xDF, 0x70,0xBF,0xF0, 0x81,0xD0,0xFF,
994		0x92,0xE1,0xFF, 0xA3,0xF2,0xFF, 0xB4,0xFF,0xFF, 0xC5,0xFF,0xFF
	991	0x00,0x15,0x34, 0x00,0x26,0x4A, 0x00,0x37,0x60, 0x00,0x48,0x77,
	992	0x0A,0x59,0x8A, 0x1B,0x6A,0x9B, 0x2C,0x7B,0xAC, 0x3D,0x8C,0xBD,
	993	0x4E,0x9D,0xCE, 0x5F,0xAE,0xDF, 0x70,0xBF,0xF0, 0x81,0xD0,0xFF,
	994	0x92,0xE1,0xFF, 0xA3,0xF2,0xFF, 0xB4,0xFF,0xFF, 0xC5,0xFF,0xFF
995	995
996	996	GREEN-BLUE
997		0x00,0x21,0x0A, 0x00,0x32,0x1F, 0x00,0x43,0x35, 0x00,0x54,0x4B,
998		0x04,0x65,0x60, 0x15,0x76,0x71, 0x26,0x87,0x82, 0x37,0x98,0x93,
999		0x48,0xA9,0xA4, 0x59,0xBA,0xB5, 0x6A,0xCB,0xC6, 0x7B,0xDC,0xD7,
1000		0x8C,0xED,0xE8, 0x9D,0xFE,0xF9, 0xAE,0xFF,0xFF, 0xBF,0xFF,0xFF,
	997	0x00,0x21,0x0A, 0x00,0x32,0x1F, 0x00,0x43,0x35, 0x00,0x54,0x4B,
	998	0x04,0x65,0x60, 0x15,0x76,0x71, 0x26,0x87,0x82, 0x37,0x98,0x93,
	999	0x48,0xA9,0xA4, 0x59,0xBA,0xB5, 0x6A,0xCB,0xC6, 0x7B,0xDC,0xD7,
	1000	0x8C,0xED,0xE8, 0x9D,0xFE,0xF9, 0xAE,0xFF,0xFF, 0xBF,0xFF,0xFF,
1001	1001
1002	1002	GREEN
1003		0x00,0x27,0x0C, 0x00,0x38,0x11, 0x00,0x49,0x16, 0x00,0x5A,0x1D,
1004		0x0A,0x6B,0x30, 0x1B,0x7C,0x41, 0x2C,0x8D,0x52, 0x3D,0x9E,0x63,
1005		0x4E,0xAF,0x74, 0x5F,0xC0,0x85, 0x70,0xD1,0x96, 0x81,0xE2,0xA7,
1006		0x92,0xF3,0xB8, 0xA3,0xFF,0xC8, 0xB4,0xFF,0xD3, 0xC5,0xFF,0xDF,
	1003	0x00,0x27,0x0C, 0x00,0x38,0x11, 0x00,0x49,0x16, 0x00,0x5A,0x1D,
	1004	0x0A,0x6B,0x30, 0x1B,0x7C,0x41, 0x2C,0x8D,0x52, 0x3D,0x9E,0x63,
	1005	0x4E,0xAF,0x74, 0x5F,0xC0,0x85, 0x70,0xD1,0x96, 0x81,0xE2,0xA7,
	1006	0x92,0xF3,0xB8, 0xA3,0xFF,0xC8, 0xB4,0xFF,0xD3, 0xC5,0xFF,0xDF,
1007	1007
1008	1008	YELLOW-GREEN
1009		0x00,0x26,0x0B, 0x00,0x37,0x10, 0x00,0x48,0x16, 0x0A,0x59,0x18,
1010		0x1B,0x6A,0x18, 0x2C,0x7B,0x18, 0x3D,0x8C,0x27, 0x4E,0x9D,0x38,
1011		0x5F,0xAE,0x49, 0x70,0xBF,0x5A, 0x81,0xD0,0x6B, 0x92,0xE1,0x7C,
1012		0xA3,0xF2,0x8D, 0xB4,0xFF,0x9C, 0xC5,0xFF,0xA8, 0xD6,0xFF,0xB4,
	1009	0x00,0x26,0x0B, 0x00,0x37,0x10, 0x00,0x48,0x16, 0x0A,0x59,0x18,
	1010	0x1B,0x6A,0x18, 0x2C,0x7B,0x18, 0x3D,0x8C,0x27, 0x4E,0x9D,0x38,
	1011	0x5F,0xAE,0x49, 0x70,0xBF,0x5A, 0x81,0xD0,0x6B, 0x92,0xE1,0x7C,
	1012	0xA3,0xF2,0x8D, 0xB4,0xFF,0x9C, 0xC5,0xFF,0xA8, 0xD6,0xFF,0xB4,
1013	1013
1014	1014	ORANGE-GREEN
1015		0x00,0x1E,0x09, 0x00,0x2F,0x0E, 0x11,0x40,0x0E, 0x22,0x51,0x0E,
1016		0x33,0x62,0x0E, 0x44,0x73,0x0E, 0x55,0x84,0x0E, 0x66,0x95,0x17,
1017		0x77,0xA6,0x28, 0x88,0xB7,0x39, 0x99,0xC8,0x4A, 0xAA,0xD9,0x5B,
1018		0xBB,0xEA,0x6C, 0xCC,0xFB,0x7D, 0xDD,0xFF,0x8A, 0xEE,0xFF,0x96,
	1015	0x00,0x1E,0x09, 0x00,0x2F,0x0E, 0x11,0x40,0x0E, 0x22,0x51,0x0E,
	1016	0x33,0x62,0x0E, 0x44,0x73,0x0E, 0x55,0x84,0x0E, 0x66,0x95,0x17,
	1017	0x77,0xA6,0x28, 0x88,0xB7,0x39, 0x99,0xC8,0x4A, 0xAA,0xD9,0x5B,
	1018	0xBB,0xEA,0x6C, 0xCC,0xFB,0x7D, 0xDD,0xFF,0x8A, 0xEE,0xFF,0x96,
1019	1019
1020	1020	LIGHT-ORANGE
1021		0x0A,0x11,0x02, 0x1B,0x22,0x02, 0x2C,0x33,0x02, 0x3D,0x44,0x02,
1022		0x4E,0x55,0x02, 0x5F,0x66,0x02, 0x70,0x77,0x02, 0x81,0x88,0x09,
1023		0x92,0x99,0x1A, 0xA3,0xAA,0x2B, 0xB4,0xBB,0x3C, 0xC5,0xCC,0x4D,
1024		0xD6,0xDD,0x5E, 0xE7,0xEE,0x6F, 0xF8,0xFF,0x80, 0xFF,0xFF,0x8F,
	1021	0x0A,0x11,0x02, 0x1B,0x22,0x02, 0x2C,0x33,0x02, 0x3D,0x44,0x02,
	1022	0x4E,0x55,0x02, 0x5F,0x66,0x02, 0x70,0x77,0x02, 0x81,0x88,0x09,
	1023	0x92,0x99,0x1A, 0xA3,0xAA,0x2B, 0xB4,0xBB,0x3C, 0xC5,0xCC,0x4D,
	1024	0xD6,0xDD,0x5E, 0xE7,0xEE,0x6F, 0xF8,0xFF,0x80, 0xFF,0xFF,0x8F,
1025	1025	*******************************************************************
1026	1026
1027	1027	*******************************************************************
1028	1028	PALETTE - PHASE 25.2 SHIFT
1029	1029
1030	1030	GREY
1031		0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
1032		0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
1033		0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
1034		0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
	1031	0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
	1032	0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
	1033	0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
	1034	0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
1035	1035
1036	1036	GOLD
1037		0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
1038		0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
1039		0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
1040		0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xF7,0x97,
	1037	0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
	1038	0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
	1039	0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
	1040	0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xF7,0x97,
1041	1041
1042	1042	ORANGE
1043		0x30,0x00,0x00, 0x41,0x07,0x00, 0x52,0x18,0x00, 0x63,0x29,0x00,
1044		0x74,0x3A,0x00, 0x85,0x4B,0x00, 0x96,0x5C,0x0A, 0xA7,0x6D,0x1B,
1045		0xB8,0x7E,0x2C, 0xC9,0x8F,0x3D, 0xDA,0xA0,0x4E, 0xEB,0xB1,0x5F,
1046		0xFC,0xC2,0x70, 0xFF,0xD3,0x85, 0xFF,0xE4,0x9B, 0xFF,0xF5,0xB1,
	1043	0x30,0x00,0x00, 0x41,0x07,0x00, 0x52,0x18,0x00, 0x63,0x29,0x00,
	1044	0x74,0x3A,0x00, 0x85,0x4B,0x00, 0x96,0x5C,0x0A, 0xA7,0x6D,0x1B,
	1045	0xB8,0x7E,0x2C, 0xC9,0x8F,0x3D, 0xDA,0xA0,0x4E, 0xEB,0xB1,0x5F,
	1046	0xFC,0xC2,0x70, 0xFF,0xD3,0x85, 0xFF,0xE4,0x9B, 0xFF,0xF5,0xB1,
1047	1047
1048	1048	RED-ORANGE
1049		0x3E,0x00,0x00, 0x4F,0x00,0x00, 0x60,0x09,0x00, 0x71,0x1A,0x00,
1050		0x82,0x2B,0x0B, 0x93,0x3C,0x1C, 0xA4,0x4D,0x2D, 0xB5,0x5E,0x3E,
1051		0xC6,0x6F,0x4F, 0xD7,0x80,0x60, 0xE8,0x91,0x71, 0xF9,0xA2,0x82,
1052		0xFF,0xB3,0x96, 0xFF,0xC4,0xAC, 0xFF,0xD5,0xC2, 0xFF,0xE6,0xD8,
	1049	0x3E,0x00,0x00, 0x4F,0x00,0x00, 0x60,0x09,0x00, 0x71,0x1A,0x00,
	1050	0x82,0x2B,0x0B, 0x93,0x3C,0x1C, 0xA4,0x4D,0x2D, 0xB5,0x5E,0x3E,
	1051	0xC6,0x6F,0x4F, 0xD7,0x80,0x60, 0xE8,0x91,0x71, 0xF9,0xA2,0x82,
	1052	0xFF,0xB3,0x96, 0xFF,0xC4,0xAC, 0xFF,0xD5,0xC2, 0xFF,0xE6,0xD8,
1053	1053
1054	1054	PINK
1055		0x3F,0x00,0x00, 0x50,0x00,0x0C, 0x61,0x00,0x18, 0x72,0x0F,0x28,
1056		0x83,0x20,0x39, 0x94,0x31,0x4A, 0xA5,0x42,0x5B, 0xB6,0x53,0x6C,
1057		0xC7,0x64,0x7D, 0xD8,0x75,0x8E, 0xE9,0x86,0x9F, 0xFA,0x97,0xB0,
1058		0xFF,0xA8,0xC5, 0xFF,0xB9,0xDB, 0xFF,0xCA,0xEF, 0xFF,0xDB,0xF4,
	1055	0x3F,0x00,0x00, 0x50,0x00,0x0C, 0x61,0x00,0x18, 0x72,0x0F,0x28,
	1056	0x83,0x20,0x39, 0x94,0x31,0x4A, 0xA5,0x42,0x5B, 0xB6,0x53,0x6C,
	1057	0xC7,0x64,0x7D, 0xD8,0x75,0x8E, 0xE9,0x86,0x9F, 0xFA,0x97,0xB0,
	1058	0xFF,0xA8,0xC5, 0xFF,0xB9,0xDB, 0xFF,0xCA,0xEF, 0xFF,0xDB,0xF4,
1059	1059
1060	1060	PURPLE
1061		0x35,0x00,0x31, 0x46,0x00,0x3D, 0x57,0x00,0x49, 0x68,0x0C,0x58,
1062		0x79,0x1D,0x69, 0x8A,0x2E,0x7A, 0x9B,0x3F,0x8B, 0xAC,0x50,0x9C,
1063		0xBD,0x61,0xAD, 0xCE,0x72,0xBE, 0xDF,0x83,0xCF, 0xF0,0x94,0xE0,
1064		0xFF,0xA5,0xE4, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
	1061	0x35,0x00,0x31, 0x46,0x00,0x3D, 0x57,0x00,0x49, 0x68,0x0C,0x58,
	1062	0x79,0x1D,0x69, 0x8A,0x2E,0x7A, 0x9B,0x3F,0x8B, 0xAC,0x50,0x9C,
	1063	0xBD,0x61,0xAD, 0xCE,0x72,0xBE, 0xDF,0x83,0xCF, 0xF0,0x94,0xE0,
	1064	0xFF,0xA5,0xE4, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
1065	1065
1066	1066	PURPLE-BLUE
1067		0x20,0x00,0x59, 0x31,0x00,0x65, 0x42,0x00,0x71, 0x53,0x10,0x82,
1068		0x64,0x21,0x93, 0x75,0x32,0xA4, 0x86,0x43,0xB5, 0x97,0x54,0xC6,
1069		0xA8,0x65,0xD7, 0xB9,0x76,0xE8, 0xCA,0x87,0xEB, 0xDB,0x98,0xEB,
1070		0xEC,0xA9,0xEB, 0xFD,0xBA,0xEB, 0xFF,0xCB,0xEF, 0xFF,0xDC,0xF4,
	1067	0x20,0x00,0x59, 0x31,0x00,0x65, 0x42,0x00,0x71, 0x53,0x10,0x82,
	1068	0x64,0x21,0x93, 0x75,0x32,0xA4, 0x86,0x43,0xB5, 0x97,0x54,0xC6,
	1069	0xA8,0x65,0xD7, 0xB9,0x76,0xE8, 0xCA,0x87,0xEB, 0xDB,0x98,0xEB,
	1070	0xEC,0xA9,0xEB, 0xFD,0xBA,0xEB, 0xFF,0xCB,0xEF, 0xFF,0xDC,0xF4,
1071	1071
1072	1072	BLUE1
1073		0x05,0x00,0x70, 0x16,0x00,0x7C, 0x27,0x09,0x8B, 0x38,0x1A,0x9C,
1074		0x49,0x2B,0xAD, 0x5A,0x3C,0xBE, 0x6B,0x4D,0xCF, 0x7C,0x5E,0xE0,
1075		0X8D,0x6F,0xF1, 0x9E,0x80,0xF6, 0xAF,0x91,0xF6, 0xC0,0xA2,0xF6,
1076		0xD1,0xB3,0xF6, 0xE2,0xC4,0xF6, 0xF3,0xD5,0xF6, 0xFF,0xE6,0xF7,
	1073	0x05,0x00,0x70, 0x16,0x00,0x7C, 0x27,0x09,0x8B, 0x38,0x1A,0x9C,
	1074	0x49,0x2B,0xAD, 0x5A,0x3C,0xBE, 0x6B,0x4D,0xCF, 0x7C,0x5E,0xE0,
	1075	0X8D,0x6F,0xF1, 0x9E,0x80,0xF6, 0xAF,0x91,0xF6, 0xC0,0xA2,0xF6,
	1076	0xD1,0xB3,0xF6, 0xE2,0xC4,0xF6, 0xF3,0xD5,0xF6, 0xFF,0xE6,0xF7,
1077	1077
1078	1078	BLUE2
1079		0x00,0x00,0x6B, 0x00,0x08,0x7E, 0x0C,0x19,0x91, 0x1D,0x2A,0xA2,
1080		0x2E,0x3B,0xB3, 0x3F,0x4C,0xC4, 0x50,0x5D,0xD5, 0x61,0x6E,0xE6,
1081		0x72,0x7F,0xF7, 0x83,0x90,0xFF, 0x94,0xA1,0xFF, 0xA5,0xB2,0xFF,
1082		0xB6,0xC3,0xFF, 0xC7,0xD4,0xFF, 0xD8,0xE5,0xFF, 0xE9,0xF6,0xFF,
	1079	0x00,0x00,0x6B, 0x00,0x08,0x7E, 0x0C,0x19,0x91, 0x1D,0x2A,0xA2,
	1080	0x2E,0x3B,0xB3, 0x3F,0x4C,0xC4, 0x50,0x5D,0xD5, 0x61,0x6E,0xE6,
	1081	0x72,0x7F,0xF7, 0x83,0x90,0xFF, 0x94,0xA1,0xFF, 0xA5,0xB2,0xFF,
	1082	0xB6,0xC3,0xFF, 0xC7,0xD4,0xFF, 0xD8,0xE5,0xFF, 0xE9,0xF6,0xFF,
1083	1083
1084	1084	LIGHT-BLUE
1085		0x00,0x08,0x52, 0x00,0x19,0x68, 0x00,0x2A,0x7F, 0x05,0x3B,0x93,
1086		0x16,0x4C,0xA4, 0x27,0x5D,0xB5, 0x38,0x6E,0xC6, 0x49,0x7F,0xD7,
1087		0x5A,0x90,0xE8, 0x6B,0xA1,0xF9, 0x7C,0xB2,0xFF, 0x8D,0xC3,0xFF,
1088		0x9E,0xD4,0xFF, 0xAF,0xE5,0xFF, 0xC0,0xF6,0xFF, 0xD1,0xFF,0xFF,
	1085	0x00,0x08,0x52, 0x00,0x19,0x68, 0x00,0x2A,0x7F, 0x05,0x3B,0x93,
	1086	0x16,0x4C,0xA4, 0x27,0x5D,0xB5, 0x38,0x6E,0xC6, 0x49,0x7F,0xD7,
	1087	0x5A,0x90,0xE8, 0x6B,0xA1,0xF9, 0x7C,0xB2,0xFF, 0x8D,0xC3,0xFF,
	1088	0x9E,0xD4,0xFF, 0xAF,0xE5,0xFF, 0xC0,0xF6,0xFF, 0xD1,0xFF,0xFF,
1089	1089
1090	1090	TURQUOISE
1091		0x00,0x17,0x2D, 0x00,0x28,0x43, 0x00,0x39,0x59, 0x00,0x4A,0x6F,
1092		0x08,0x5B,0x83, 0x19,0x6C,0x94, 0x2A,0x7D,0xA5, 0x3B,0x8E,0xB6,
1093		0x4C,0x9F,0xC7, 0x5D,0xB0,0xD8, 0x6E,0xC1,0xE9, 0x7F,0xD2,0xFA,
1094		0x90,0xE3,0xFF, 0xA1,0xF4,0xFF, 0xB2,0xFF,0xFF, 0xC3,0xFF,0xFF,
	1091	0x00,0x17,0x2D, 0x00,0x28,0x43, 0x00,0x39,0x59, 0x00,0x4A,0x6F,
	1092	0x08,0x5B,0x83, 0x19,0x6C,0x94, 0x2A,0x7D,0xA5, 0x3B,0x8E,0xB6,
	1093	0x4C,0x9F,0xC7, 0x5D,0xB0,0xD8, 0x6E,0xC1,0xE9, 0x7F,0xD2,0xFA,
	1094	0x90,0xE3,0xFF, 0xA1,0xF4,0xFF, 0xB2,0xFF,0xFF, 0xC3,0xFF,0xFF,
1095	1095
1096	1096	GREEN-BLUE
1097		0x00,0x23,0x0A, 0x00,0x34,0x15, 0x00,0x45,0x2B, 0x00,0x56,0x41,
1098		0x04,0x67,0x56, 0x15,0x78,0x67, 0x26,0x89,0x78, 0x37,0x9A,0x89,
1099		0x48,0xAB,0x9A, 0x59,0xBC,0xAB, 0x6A,0xCD,0xBC, 0x7B,0xDE,0xCD,
1100		0x8C,0xEF,0xDE, 0x9D,0xFF,0xEE, 0xAE,0xFF,0xFA, 0xBF,0xFF,0xFF,
	1097	0x00,0x23,0x0A, 0x00,0x34,0x15, 0x00,0x45,0x2B, 0x00,0x56,0x41,
	1098	0x04,0x67,0x56, 0x15,0x78,0x67, 0x26,0x89,0x78, 0x37,0x9A,0x89,
	1099	0x48,0xAB,0x9A, 0x59,0xBC,0xAB, 0x6A,0xCD,0xBC, 0x7B,0xDE,0xCD,
	1100	0x8C,0xEF,0xDE, 0x9D,0xFF,0xEE, 0xAE,0xFF,0xFA, 0xBF,0xFF,0xFF,
1101	1101
1102	1102	GREEN
1103		0x00,0x27,0x0C, 0x00,0x38,0x11, 0x00,0x49,0x16, 0x00,0x5A,0x1B,
1104		0x0D,0x6B,0x25, 0x1E,0x7C,0x36, 0x2F,0x8D,0x47, 0x40,0x9E,0x58,
1105		0x51,0xAF,0x69, 0x62,0xC0,0x7A, 0x73,0xD1,0x8B, 0x84,0xE2,0x9C,
1106		0x95,0xF3,0xAD, 0xA6,0xFF,0xBD, 0xB7,0xFF,0xC9, 0xC8,0xFF,0xD4,
	1103	0x00,0x27,0x0C, 0x00,0x38,0x11, 0x00,0x49,0x16, 0x00,0x5A,0x1B,
	1104	0x0D,0x6B,0x25, 0x1E,0x7C,0x36, 0x2F,0x8D,0x47, 0x40,0x9E,0x58,
	1105	0x51,0xAF,0x69, 0x62,0xC0,0x7A, 0x73,0xD1,0x8B, 0x84,0xE2,0x9C,
	1106	0x95,0xF3,0xAD, 0xA6,0xFF,0xBD, 0xB7,0xFF,0xC9, 0xC8,0xFF,0xD4,
1107	1107
1108	1108	YELLOW-GREEN
1109		0x00,0x24,0x0B, 0x00,0x35,0x10, 0x00,0x46,0x15, 0x10,0x57,0x15,
1110		0x21,0x68,0x15, 0x32,0x79,0x15, 0x43,0x8A,0x1C, 0x54,0x9B,0x2D,
1111		0x65,0xAC,0x3E, 0x76,0xBD,0x4F, 0x87,0xCE,0x60, 0x98,0xDF,0x71,
1112		0xA9,0xF0,0x82, 0xBA,0xFF,0x93, 0xCB,0xFF,0x9F, 0xDC,0xFF,0xAA,
	1109	0x00,0x24,0x0B, 0x00,0x35,0x10, 0x00,0x46,0x15, 0x10,0x57,0x15,
	1110	0x21,0x68,0x15, 0x32,0x79,0x15, 0x43,0x8A,0x1C, 0x54,0x9B,0x2D,
	1111	0x65,0xAC,0x3E, 0x76,0xBD,0x4F, 0x87,0xCE,0x60, 0x98,0xDF,0x71,
	1112	0xA9,0xF0,0x82, 0xBA,0xFF,0x93, 0xCB,0xFF,0x9F, 0xDC,0xFF,0xAA,
1113	1113
1114	1114	ORANGE-GREEN
1115		0x00,0x1B,0x08, 0x08,0x2C,0x0B, 0x19,0x3D,0x0B, 0x2A,0x4E,0x0B,
1116		0x3B,0x5F,0x0B, 0x4C,0x70,0x0B, 0x5D,0x81,0x0B, 0x6E,0x92,0x11,
1117		0x7F,0xA3,0x22, 0x90,0xB4,0x33, 0xA1,0xC5,0x44, 0xB2,0xD6,0x55,
1118		0xC3,0xE7,0x66, 0xD4,0xF8,0x77, 0xE5,0xFF,0x85, 0xF6,0xFF,0x91,
	1115	0x00,0x1B,0x08, 0x08,0x2C,0x0B, 0x19,0x3D,0x0B, 0x2A,0x4E,0x0B,
	1116	0x3B,0x5F,0x0B, 0x4C,0x70,0x0B, 0x5D,0x81,0x0B, 0x6E,0x92,0x11,
	1117	0x7F,0xA3,0x22, 0x90,0xB4,0x33, 0xA1,0xC5,0x44, 0xB2,0xD6,0x55,
	1118	0xC3,0xE7,0x66, 0xD4,0xF8,0x77, 0xE5,0xFF,0x85, 0xF6,0xFF,0x91,
1119	1119
1120	1120	LIGHT-ORANGE
1121		0x12,0x0C,0x00, 0x23,0x1D,0x00, 0x34,0x2E,0x00, 0x45,0x3F,0x00,
1122		0x56,0x50,0x00, 0x67,0x61,0x00, 0x78,0x72,0x00, 0x89,0x83,0x08,
1123		0x9A,0x94,0x19, 0xAB,0xA5,0x2A, 0xBC,0xB6,0x3B, 0xCD,0xC7,0x4C,
1124		0xDE,0xD8,0x5D, 0xEF,0xE9,0x6E, 0xFF,0xFA,0x80, 0xFF,0xFF,0x92,
	1121	0x12,0x0C,0x00, 0x23,0x1D,0x00, 0x34,0x2E,0x00, 0x45,0x3F,0x00,
	1122	0x56,0x50,0x00, 0x67,0x61,0x00, 0x78,0x72,0x00, 0x89,0x83,0x08,
	1123	0x9A,0x94,0x19, 0xAB,0xA5,0x2A, 0xBC,0xB6,0x3B, 0xCD,0xC7,0x4C,
	1124	0xDE,0xD8,0x5D, 0xEF,0xE9,0x6E, 0xFF,0xFA,0x80, 0xFF,0xFF,0x92,
1125	1125	*******************************************************************
1126	1126
1127	1127	*******************************************************************
1128	1128	PALETTE - PHASE 25.7 SHIFT
1129	1129	GREY
1130		0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
1131		0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
1132		0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
1133		0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
	1130	0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
	1131	0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
	1132	0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
	1133	0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
1134	1134
1135	1135	GOLD
1136		0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
1137		0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
1138		0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
1139		0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xF7,0x97,
	1136	0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
	1137	0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
	1138	0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
	1139	0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xF7,0x97,
1140	1140
1141	1141	ORANGE
1142		0x31,0x00,0x00, 0x42,0x06,0x00, 0x53,0x17,0x00, 0x64,0x28,0x00,
1143		0x75,0x39,0x00, 0x86,0X4A,0x00, 0x97,0x5B,0x0A, 0xA8,0x6C,0x1B,
1144		0xB9,0x7D,0x2C, 0xCA,0x8E,0x3D, 0xDB,0x9F,0x4E, 0xEC,0xB0,0x5F,
1145		0xFD,0xC1,0x70, 0xFF,0xD2,0x85, 0xFF,0xE3,0x9C, 0xFF,0xF4,0xB2,
	1142	0x31,0x00,0x00, 0x42,0x06,0x00, 0x53,0x17,0x00, 0x64,0x28,0x00,
	1143	0x75,0x39,0x00, 0x86,0X4A,0x00, 0x97,0x5B,0x0A, 0xA8,0x6C,0x1B,
	1144	0xB9,0x7D,0x2C, 0xCA,0x8E,0x3D, 0xDB,0x9F,0x4E, 0xEC,0xB0,0x5F,
	1145	0xFD,0xC1,0x70, 0xFF,0xD2,0x85, 0xFF,0xE3,0x9C, 0xFF,0xF4,0xB2,
1146	1146
1147	1147	RED-ORANGE
1148		0x3E,0x00,0x00, 0x4F,0x00,0x00, 0x60,0x08,0x00, 0x71,0x19,0x00,
1149		0x82,0x2A,0x0D, 0x93,0x3B,0x1E, 0xA4,0x4C,0x2F, 0xB5,0x5D,0x40,
1150		0xC6,0x6E,0x51, 0xD7,0x7F,0x62, 0xE8,0x90,0x73, 0xF9,0xA1,0x83,
1151		0xFF,0xB2,0x98, 0xFF,0xC3,0xAE, 0xFF,0xD4,0xC4, 0xFF,0xE5,0xDA,
	1148	0x3E,0x00,0x00, 0x4F,0x00,0x00, 0x60,0x08,0x00, 0x71,0x19,0x00,
	1149	0x82,0x2A,0x0D, 0x93,0x3B,0x1E, 0xA4,0x4C,0x2F, 0xB5,0x5D,0x40,
	1150	0xC6,0x6E,0x51, 0xD7,0x7F,0x62, 0xE8,0x90,0x73, 0xF9,0xA1,0x83,
	1151	0xFF,0xB2,0x98, 0xFF,0xC3,0xAE, 0xFF,0xD4,0xC4, 0xFF,0xE5,0xDA,
1152	1152
1153	1153	PINK
1154		0x3F,0x00,0x03, 0x50,0x00,0x0F, 0x61,0x00,0x1B, 0x72,0x0F,0x2B,
1155		0x83,0x20,0x3C, 0x94,0x31,0x4D, 0xA5,0x42,0x5E, 0xB6,0x53,0x6F,
1156		0xC7,0x64,0x80, 0xD8,0x75,0x91, 0xE9,0x86,0xA2, 0xFA,0x97,0xB3,
1157		0xFF,0xA8,0xC8, 0xFF,0xB9,0xDE, 0xFF,0xCA,0xEF, 0xFF,0xDB,0xF4,
	1154	0x3F,0x00,0x03, 0x50,0x00,0x0F, 0x61,0x00,0x1B, 0x72,0x0F,0x2B,
	1155	0x83,0x20,0x3C, 0x94,0x31,0x4D, 0xA5,0x42,0x5E, 0xB6,0x53,0x6F,
	1156	0xC7,0x64,0x80, 0xD8,0x75,0x91, 0xE9,0x86,0xA2, 0xFA,0x97,0xB3,
	1157	0xFF,0xA8,0xC8, 0xFF,0xB9,0xDE, 0xFF,0xCA,0xEF, 0xFF,0xDB,0xF4,
1158	1158
1159	1159	PURPLE
1160		0x33,0x00,0x35, 0x44,0x00,0x41, 0x55,0x00,0x4C, 0x66,0x0C,0x5C,
1161		0x77,0x1D,0x6D, 0x88,0x2E,0x7E, 0x99,0x3F,0x8F, 0xAA,0x50,0xA0,
1162		0xBB,0x61,0xB1, 0xCC,0x72,0xC2, 0xDD,0x83,0xD3, 0xEE,0x94,0xE4,
1163		0xFF,0xA5,0xE4, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
	1160	0x33,0x00,0x35, 0x44,0x00,0x41, 0x55,0x00,0x4C, 0x66,0x0C,0x5C,
	1161	0x77,0x1D,0x6D, 0x88,0x2E,0x7E, 0x99,0x3F,0x8F, 0xAA,0x50,0xA0,
	1162	0xBB,0x61,0xB1, 0xCC,0x72,0xC2, 0xDD,0x83,0xD3, 0xEE,0x94,0xE4,
	1163	0xFF,0xA5,0xE4, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
1164	1164
1165	1165	PURPLE-BLUE
1166		0x1D,0x00,0x5C, 0x2E,0x00,0x68, 0x40,0x00,0x74, 0x51,0x10,0x84,
1167		0x62,0x21,0x95, 0x73,0x32,0xA6, 0x84,0x43,0xB7, 0x95,0x54,0xC8,
1168		0xA6,0x65,0xD9, 0xB7,0x76,0xEA, 0xC8,0x87,0xEB, 0xD9,0x98,0xEB,
1169		0xE9,0xA9,0xEC, 0xFB,0xBA,0xEB, 0xFF,0xCB,0xEF, 0xFF,0xDC,0xF4,
	1166	0x1D,0x00,0x5C, 0x2E,0x00,0x68, 0x40,0x00,0x74, 0x51,0x10,0x84,
	1167	0x62,0x21,0x95, 0x73,0x32,0xA6, 0x84,0x43,0xB7, 0x95,0x54,0xC8,
	1168	0xA6,0x65,0xD9, 0xB7,0x76,0xEA, 0xC8,0x87,0xEB, 0xD9,0x98,0xEB,
	1169	0xE9,0xA9,0xEC, 0xFB,0xBA,0xEB, 0xFF,0xCB,0xEF, 0xFF,0xDC,0xF4,
1170	1170
1171	1171	BLUE1
1172		0x02,0x00,0x71, 0x13,0x00,0x7D, 0x24,0x0B,0x8C, 0x35,0x1C,0x9D,
1173		0x46,0x2D,0xAE, 0x57,0x3E,0xBF, 0x68,0x4F,0xD0, 0x79,0x60,0xE1,
1174		0x8A,0x71,0xF2, 0x9B,0x82,0xF7, 0xAC,0x93,0xF7, 0xBD,0xA4,0xF7,
1175		0xCE,0xB5,0xF7, 0xDF,0xC6,0xF7, 0xF0,0xD7,0xF7, 0xFF,0xE8,0xF8,
	1172	0x02,0x00,0x71, 0x13,0x00,0x7D, 0x24,0x0B,0x8C, 0x35,0x1C,0x9D,
	1173	0x46,0x2D,0xAE, 0x57,0x3E,0xBF, 0x68,0x4F,0xD0, 0x79,0x60,0xE1,
	1174	0x8A,0x71,0xF2, 0x9B,0x82,0xF7, 0xAC,0x93,0xF7, 0xBD,0xA4,0xF7,
	1175	0xCE,0xB5,0xF7, 0xDF,0xC6,0xF7, 0xF0,0xD7,0xF7, 0xFF,0xE8,0xF8,
1176	1176
1177	1177	BLUE2
1178		0x00,0x00,0x68, 0x00,0x0A,0x7C, 0x08,0x1B,0x90, 0x19,0x2C,0xA1,
1179		0x2A,0x3D,0xB2, 0x3B,0x4E,0xC3, 0x4C,0x5F,0xD4, 0x5D,0x70,0xE5,
1180		0x6E,0x81,0xF6, 0x7F,0x92,0xFF, 0x90,0xA3,0xFF, 0xA1,0xB4,0xFF,
1181		0xB2,0xC5,0xFF, 0xC3,0xD6,0xFF, 0xD4,0xE7,0xFF, 0xE5,0xF8,0xFF,
	1178	0x00,0x00,0x68, 0x00,0x0A,0x7C, 0x08,0x1B,0x90, 0x19,0x2C,0xA1,
	1179	0x2A,0x3D,0xB2, 0x3B,0x4E,0xC3, 0x4C,0x5F,0xD4, 0x5D,0x70,0xE5,
	1180	0x6E,0x81,0xF6, 0x7F,0x92,0xFF, 0x90,0xA3,0xFF, 0xA1,0xB4,0xFF,
	1181	0xB2,0xC5,0xFF, 0xC3,0xD6,0xFF, 0xD4,0xE7,0xFF, 0xE5,0xF8,0xFF,
1182	1182
1183	1183	LIGHT-BLUE
1184		0x00,0x0A,0x4D, 0x00,0x1B,0x63, 0x00,0x2C,0x79, 0x02,0x3D,0x8F,
1185		0x13,0x4E,0xA0, 0x24,0x5F,0xB1, 0x35,0x70,0xC2, 0x46,0x81,0xD3,
1186		0x57,0x92,0xE4, 0x68,0xA3,0xF5, 0x79,0xB4,0xFF, 0x8A,0xC5,0xFF,
1187		0x9B,0xD6,0xFF, 0xAC,0xE7,0xFF, 0xBD,0xF8,0xFF, 0xCE,0xFF,0xFF,
	1184	0x00,0x0A,0x4D, 0x00,0x1B,0x63, 0x00,0x2C,0x79, 0x02,0x3D,0x8F,
	1185	0x13,0x4E,0xA0, 0x24,0x5F,0xB1, 0x35,0x70,0xC2, 0x46,0x81,0xD3,
	1186	0x57,0x92,0xE4, 0x68,0xA3,0xF5, 0x79,0xB4,0xFF, 0x8A,0xC5,0xFF,
	1187	0x9B,0xD6,0xFF, 0xAC,0xE7,0xFF, 0xBD,0xF8,0xFF, 0xCE,0xFF,0xFF,
1188	1188
1189	1189	TURQUOISE
1190		0x00,0x1A,0x26, 0x00,0x2B,0x3C, 0x00,0x3C,0x52, 0x00,0x4D,0x68,
1191		0x06,0x5E,0x7C, 0x17,0x6F,0x8D, 0x28,0x80,0x9E, 0x39,0x91,0xAF,
1192		0x4A,0xA2,0xC0, 0x5B,0xB3,0xD1, 0x6C,0xC4,0xE2, 0x7D,0xD5,0xF3,
1193		0x8E,0xE6,0xFF, 0x9F,0xF7,0xFF, 0xB0,0xFF,0xFF, 0xC1,0xFF,0xFF,
	1190	0x00,0x1A,0x26, 0x00,0x2B,0x3C, 0x00,0x3C,0x52, 0x00,0x4D,0x68,
	1191	0x06,0x5E,0x7C, 0x17,0x6F,0x8D, 0x28,0x80,0x9E, 0x39,0x91,0xAF,
	1192	0x4A,0xA2,0xC0, 0x5B,0xB3,0xD1, 0x6C,0xC4,0xE2, 0x7D,0xD5,0xF3,
	1193	0x8E,0xE6,0xFF, 0x9F,0xF7,0xFF, 0xB0,0xFF,0xFF, 0xC1,0xFF,0xFF,
1194	1194
1195	1195	GREEN-BLUE
1196		0x00,0x24,0x0B, 0x00,0x35,0x10, 0x00,0x46,0x22, 0x00,0x57,0x38,
1197		0x05,0x68,0x4D, 0x16,0x79,0x5E, 0x27,0x8A,0x6F, 0x38,0x9B,0x80,
1198		0x49,0xAC,0x91, 0x5A,0xBD,0xA2, 0x6B,0xCE,0xB3, 0x7C,0xDF,0xC4,
1199		0x8D,0xF0,0xD5, 0x9E,0xFF,0xE5, 0xAF,0xFF,0xF1, 0xC0,0xFF,0xFD,
	1196	0x00,0x24,0x0B, 0x00,0x35,0x10, 0x00,0x46,0x22, 0x00,0x57,0x38,
	1197	0x05,0x68,0x4D, 0x16,0x79,0x5E, 0x27,0x8A,0x6F, 0x38,0x9B,0x80,
	1198	0x49,0xAC,0x91, 0x5A,0xBD,0xA2, 0x6B,0xCE,0xB3, 0x7C,0xDF,0xC4,
	1199	0x8D,0xF0,0xD5, 0x9E,0xFF,0xE5, 0xAF,0xFF,0xF1, 0xC0,0xFF,0xFD,
1200	1200
1201	1201	GREEN
1202		0x00,0x27,0x0C, 0x00,0x38,0x11, 0x00,0x49,0x16, 0x00,0x5A,0x1B,
1203		0x10,0x6B,0x1B, 0x21,0x7C,0x2C, 0x32,0x8D,0x3D, 0x43,0x9E,0x4E,
1204		0x54,0xAF,0x5F, 0x65,0xC0,0x70, 0x76,0xD1,0x81, 0x87,0xE2,0x92,
1205		0x98,0xF3,0xA3, 0xA9,0xFF,0xB3, 0xBA,0xFF,0xBF, 0xCB,0xFF,0xCB,
	1202	0x00,0x27,0x0C, 0x00,0x38,0x11, 0x00,0x49,0x16, 0x00,0x5A,0x1B,
	1203	0x10,0x6B,0x1B, 0x21,0x7C,0x2C, 0x32,0x8D,0x3D, 0x43,0x9E,0x4E,
	1204	0x54,0xAF,0x5F, 0x65,0xC0,0x70, 0x76,0xD1,0x81, 0x87,0xE2,0x92,
	1205	0x98,0xF3,0xA3, 0xA9,0xFF,0xB3, 0xBA,0xFF,0xBF, 0xCB,0xFF,0xCB,
1206	1206
1207	1207	YELLOW-GREEN
1208		0x00,0x23,0x0A, 0x00,0x34,0x10, 0x04,0x45,0x13, 0x15,0x56,0x13,
1209		0x26,0x67,0x13, 0x37,0x78,0x13, 0x48,0x89,0x14, 0x59,0x9A,0x25,
1210		0x6A,0xAB,0x36, 0x7B,0xBC,0x47, 0x8C,0xCD,0x58, 0x9D,0xDE,0x69,
1211		0xAE,0xEF,0x7A, 0xBF,0xFF,0x8B, 0xD0,0xFF,0x97, 0xE1,0xFF,0xA3,
	1208	0x00,0x23,0x0A, 0x00,0x34,0x10, 0x04,0x45,0x13, 0x15,0x56,0x13,
	1209	0x26,0x67,0x13, 0x37,0x78,0x13, 0x48,0x89,0x14, 0x59,0x9A,0x25,
	1210	0x6A,0xAB,0x36, 0x7B,0xBC,0x47, 0x8C,0xCD,0x58, 0x9D,0xDE,0x69,
	1211	0xAE,0xEF,0x7A, 0xBF,0xFF,0x8B, 0xD0,0xFF,0x97, 0xE1,0xFF,0xA3,
1212	1212
1213	1213	ORANGE-GREEN
1214		0x00,0x17,0x07, 0x0E,0x28,0x08, 0x1F,0x39,0x08, 0x30,0x4A,0x08,
1215		0x41,0x5B,0x08, 0x52,0x6C,0x08, 0x63,0x7D,0x08, 0x74,0x8E,0x0D,
1216		0x85,0x9F,0x1E, 0x96,0xB0,0x2F, 0xA7,0xC1,0x40, 0xB8,0xD2,0x51,
1217		0xC9,0xE3,0x62, 0xDA,0xF4,0x73, 0xEB,0xFF,0x82, 0xFC,0xFF,0x8E,
	1214	0x00,0x17,0x07, 0x0E,0x28,0x08, 0x1F,0x39,0x08, 0x30,0x4A,0x08,
	1215	0x41,0x5B,0x08, 0x52,0x6C,0x08, 0x63,0x7D,0x08, 0x74,0x8E,0x0D,
	1216	0x85,0x9F,0x1E, 0x96,0xB0,0x2F, 0xA7,0xC1,0x40, 0xB8,0xD2,0x51,
	1217	0xC9,0xE3,0x62, 0xDA,0xF4,0x73, 0xEB,0xFF,0x82, 0xFC,0xFF,0x8E,
1218	1218
1219	1219	LIGHT-ORANGE
1220		0x19,0x07,0x00, 0x2A,0x18,0x00, 0x3B,0x29,0x00, 0x4C,0x3A,0x00,
1221		0x5D,0x4B,0x00, 0x6E,0x5C,0x00, 0x7F,0x6D,0x00, 0x90,0x7E,0x09,
1222		0xA1,0x8F,0x1A, 0xB2,0xA0,0x2B, 0xC3,0xB1,0x3C, 0xD4,0xC2,0x4D,
1223		0xE5,0xD3,0x5E, 0xF6,0xE4,0x6F, 0xFF,0xF5,0x82, 0xFF,0xFF,0x96,
	1220	0x19,0x07,0x00, 0x2A,0x18,0x00, 0x3B,0x29,0x00, 0x4C,0x3A,0x00,
	1221	0x5D,0x4B,0x00, 0x6E,0x5C,0x00, 0x7F,0x6D,0x00, 0x90,0x7E,0x09,
	1222	0xA1,0x8F,0x1A, 0xB2,0xA0,0x2B, 0xC3,0xB1,0x3C, 0xD4,0xC2,0x4D,
	1223	0xE5,0xD3,0x5E, 0xF6,0xE4,0x6F, 0xFF,0xF5,0x82, 0xFF,0xFF,0x96,
1224	1224	*******************************************************************
1225	1225
1226	1226	*******************************************************************
1227	1227	PALETTE - PHASE 26.7 SHIFT
1228	1228
1229	1229	GREY
1230		0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
1231		0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
1232		0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
1233		0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
	1230	0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
	1231	0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
	1232	0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
	1233	0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
1234	1234
1235	1235	GOLD
1236		0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
1237		0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
1238		0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
1239		0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xFF,0x97,
	1236	0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
	1237	0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
	1238	0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
	1239	0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xFF,0x97,
1240	1240
1241	1241	ORANGE
1242		0x32,0x00,0x00, 0x43,0x06,0x00, 0x54,0x17,0x00, 0x65,0x28,0x00,
1243		0x79,0x39,0x00, 0x87,0x4A,0x00, 0x98,0x5B,0x0C, 0xA9,0x6C,0x1D,
1244		0xBA,0x7D,0x2E, 0xCB,0x8E,0x3F, 0xDC,0x9F,0x50, 0xED,0xB0,0x61,
1245		0xFE,0xC1,0x72, 0xFF,0xD2,0x87, 0xFF,0xE3,0x9E, 0xFF,0xF4,0xB4,
	1242	0x32,0x00,0x00, 0x43,0x06,0x00, 0x54,0x17,0x00, 0x65,0x28,0x00,
	1243	0x79,0x39,0x00, 0x87,0x4A,0x00, 0x98,0x5B,0x0C, 0xA9,0x6C,0x1D,
	1244	0xBA,0x7D,0x2E, 0xCB,0x8E,0x3F, 0xDC,0x9F,0x50, 0xED,0xB0,0x61,
	1245	0xFE,0xC1,0x72, 0xFF,0xD2,0x87, 0xFF,0xE3,0x9E, 0xFF,0xF4,0xB4,
1246	1246
1247	1247	RED-ORANGE
1248		0x3E,0x00,0x00, 0x4F,0x00,0x00, 0x60,0x07,0x00, 0x71,0x18,0x00,
1249		0x82,0x29,0x10, 0x93,0x3A,0x21, 0xA4,0x4B,0x32, 0xB5,0x5C,0x43,
1250		0xC6,0x6D,0x54, 0xD7,0x7E,0x65, 0xE8,0x8F,0x76, 0xF9,0xA0,0x87,
1251		0xFF,0xB1,0x9C, 0xFF,0xC2,0xB2, 0xFF,0xD3,0xC8, 0xFF,0xE4,0xDE,
	1248	0x3E,0x00,0x00, 0x4F,0x00,0x00, 0x60,0x07,0x00, 0x71,0x18,0x00,
	1249	0x82,0x29,0x10, 0x93,0x3A,0x21, 0xA4,0x4B,0x32, 0xB5,0x5C,0x43,
	1250	0xC6,0x6D,0x54, 0xD7,0x7E,0x65, 0xE8,0x8F,0x76, 0xF9,0xA0,0x87,
	1251	0xFF,0xB1,0x9C, 0xFF,0xC2,0xB2, 0xFF,0xD3,0xC8, 0xFF,0xE4,0xDE,
1252	1252
1253	1253	PINK
1254		0x3E,0x00,0x09, 0x4F,0x00,0x15, 0x60,0x00,0x21, 0x71,0x0E,0x31,
1255		0x82,0x1F,0x42, 0x93,0x30,0x53, 0xA4,0x41,0x64, 0xB5,0x52,0x75,
1256		0xC6,0x63,0x86, 0xD7,0x74,0x97, 0xE8,0x85,0xA8, 0xF9,0x96,0xB9,
1257		0xFF,0xA7,0xCE, 0xFF,0xB8,0xE4, 0xFF,0xC9,0xEF, 0xFF,0xDA,0xF4,
	1254	0x3E,0x00,0x09, 0x4F,0x00,0x15, 0x60,0x00,0x21, 0x71,0x0E,0x31,
	1255	0x82,0x1F,0x42, 0x93,0x30,0x53, 0xA4,0x41,0x64, 0xB5,0x52,0x75,
	1256	0xC6,0x63,0x86, 0xD7,0x74,0x97, 0xE8,0x85,0xA8, 0xF9,0x96,0xB9,
	1257	0xFF,0xA7,0xCE, 0xFF,0xB8,0xE4, 0xFF,0xC9,0xEF, 0xFF,0xDA,0xF4,
1258	1258
1259	1259	PURPLE
1260		0x30,0x00,0x3D, 0x41,0x00,0x48, 0x52,0x00,0x54, 0x63,0x0C,0x64,
1261		0x74,0x1D,0x75, 0x85,0x2E,0x86, 0x96,0x3F,0x97, 0xA7,0x50,0xA8,
1262		0xB8,0x61,0xB9, 0xC9,0x72,0xCA, 0xDA,0x83,0xDB, 0xEB,0x94,0xE5,
1263		0xFC,0xA5,0xE5, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
	1260	0x30,0x00,0x3D, 0x41,0x00,0x48, 0x52,0x00,0x54, 0x63,0x0C,0x64,
	1261	0x74,0x1D,0x75, 0x85,0x2E,0x86, 0x96,0x3F,0x97, 0xA7,0x50,0xA8,
	1262	0xB8,0x61,0xB9, 0xC9,0x72,0xCA, 0xDA,0x83,0xDB, 0xEB,0x94,0xE5,
	1263	0xFC,0xA5,0xE5, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
1264	1264
1265	1265	PURPLE-BLUE
1266		0x18,0x00,0x62, 0x29,0x00,0x6E, 0x3A,0x01,0x7A, 0x4B,0x12,0x8B,
1267		0x5C,0x23,0x9C, 0x6D,0x34,0xAD, 0x7E,0x45,0xBE, 0x8F,0x56,0xCF,
1268		0xA0,0x67,0xE0, 0xB1,0x78,0xEE, 0xC2,0x89,0xEE, 0xD3,0x9A,0xEE,
1269		0xE4,0xAB,0xEE, 0xF5,0xBC,0xEE, 0xFF,0xCD,0xE0, 0xFF,0xDE,0xF5,
	1266	0x18,0x00,0x62, 0x29,0x00,0x6E, 0x3A,0x01,0x7A, 0x4B,0x12,0x8B,
	1267	0x5C,0x23,0x9C, 0x6D,0x34,0xAD, 0x7E,0x45,0xBE, 0x8F,0x56,0xCF,
	1268	0xA0,0x67,0xE0, 0xB1,0x78,0xEE, 0xC2,0x89,0xEE, 0xD3,0x9A,0xEE,
	1269	0xE4,0xAB,0xEE, 0xF5,0xBC,0xEE, 0xFF,0xCD,0xE0, 0xFF,0xDE,0xF5,
1270	1270
1271	1271	BLUE1
1272		0x00,0x00,0x72, 0x0C,0x00,0x7F, 0x1D,0x0E,0x8F, 0x2E,0x1F,0xA0,
1273		0x3F,0x30,0xB1, 0x50,0x41,0xC2, 0x61,0x52,0xD3, 0x72,0x63,0xE4,
1274		0x83,0x74,0xF5, 0x94,0x85,0xFA, 0xA5,0x96,0xFA, 0xB6,0xA7,0xFA,
1275		0xC7,0xB8,0xFA, 0xD8,0xC9,0xFA, 0xE9,0xDA,0xFA, 0xFA,0xE8,0xFA,
	1272	0x00,0x00,0x72, 0x0C,0x00,0x7F, 0x1D,0x0E,0x8F, 0x2E,0x1F,0xA0,
	1273	0x3F,0x30,0xB1, 0x50,0x41,0xC2, 0x61,0x52,0xD3, 0x72,0x63,0xE4,
	1274	0x83,0x74,0xF5, 0x94,0x85,0xFA, 0xA5,0x96,0xFA, 0xB6,0xA7,0xFA,
	1275	0xC7,0xB8,0xFA, 0xD8,0xC9,0xFA, 0xE9,0xDA,0xFA, 0xFA,0xE8,0xFA,
1276	1276
1277	1277	BLUE2
1278		0x00,0x00,0x62, 0x00,0x0F,0x77, 0x01,0x20,0x8D, 0x12,0x31,0x9E,
1279		0x23,0x42,0xAF, 0x34,0x53,0xC0, 0x45,0x64,0xD1, 0x56,0x75,0xE2,
1280		0x67,0x86,0xF3, 0x78,0x97,0xFF, 0x89,0xA8,0xFF, 0x9A,0xB9,0xFF,
1281		0xAB,0xCA,0xFF, 0xBC,0xDB,0xFF, 0xCD,0xEC,0xFF, 0xDE,0xFD,0xFF,
	1278	0x00,0x00,0x62, 0x00,0x0F,0x77, 0x01,0x20,0x8D, 0x12,0x31,0x9E,
	1279	0x23,0x42,0xAF, 0x34,0x53,0xC0, 0x45,0x64,0xD1, 0x56,0x75,0xE2,
	1280	0x67,0x86,0xF3, 0x78,0x97,0xFF, 0x89,0xA8,0xFF, 0x9A,0xB9,0xFF,
	1281	0xAB,0xCA,0xFF, 0xBC,0xDB,0xFF, 0xCD,0xEC,0xFF, 0xDE,0xFD,0xFF,
1282	1282
1283	1283	LIGHT-BLUE
1284		0x00,0x10,0x42, 0x00,0x21,0x58, 0x00,0x32,0x6E, 0x00,0x43,0x84,
1285		0x0E,0x54,0x96, 0x1F,0x65,0xA7, 0x30,0x76,0xB8, 0x41,0x87,0xC9,
1286		0x52,0x98,0xDA, 0x63,0xA9,0xEB, 0x74,0xBA,0xFC, 0x85,0xCB,0xFF,
1287		0x96,0xDC,0xFF, 0xA7,0xED,0xFF, 0xB8,0xFE,0xFF, 0xC9,0xFF,0xFF,
	1284	0x00,0x10,0x42, 0x00,0x21,0x58, 0x00,0x32,0x6E, 0x00,0x43,0x84,
	1285	0x0E,0x54,0x96, 0x1F,0x65,0xA7, 0x30,0x76,0xB8, 0x41,0x87,0xC9,
	1286	0x52,0x98,0xDA, 0x63,0xA9,0xEB, 0x74,0xBA,0xFC, 0x85,0xCB,0xFF,
	1287	0x96,0xDC,0xFF, 0xA7,0xED,0xFF, 0xB8,0xFE,0xFF, 0xC9,0xFF,0xFF,
1288	1288
1289	1289	TURQUOISE
1290		0x00,0x1E,0x14, 0x00,0x2F,0x2A, 0x00,0x40,0x40, 0x00,0x51,0x56,
1291		0x04,0x62,0x6B, 0x15,0x73,0x7C, 0x26,0x84,0x8D, 0x37,0x95,0x9E,
1292		0x48,0xA6,0xAF, 0x59,0xB7,0xC0, 0x6A,0xC8,0xD1, 0x7B,0xD9,0xE2,
1293		0x8C,0xEA,0xF3, 0x9D,0xFB,0xFF, 0xAE,0xFF,0xFF, 0xBF,0xFF,0xFF,
	1290	0x00,0x1E,0x14, 0x00,0x2F,0x2A, 0x00,0x40,0x40, 0x00,0x51,0x56,
	1291	0x04,0x62,0x6B, 0x15,0x73,0x7C, 0x26,0x84,0x8D, 0x37,0x95,0x9E,
	1292	0x48,0xA6,0xAF, 0x59,0xB7,0xC0, 0x6A,0xC8,0xD1, 0x7B,0xD9,0xE2,
	1293	0x8C,0xEA,0xF3, 0x9D,0xFB,0xFF, 0xAE,0xFF,0xFF, 0xBF,0xFF,0xFF,
1294	1294
1295	1295	GREEN-BLUE
1296		0x00,0x26,0x0B, 0x00,0x37,0x10, 0x00,0x48,0x16, 0x00,0x59,0x25,
1297		0x08,0x6A,0x38, 0x19,0x7B,0x49, 0x2A,0x8C,0x5A, 0x3B,0x9D,0x6B,
1298		0x4C,0xAE,0x7C, 0x5D,0xBF,0x8D, 0x6E,0xD0,0x9E, 0x7F,0xE1,0xAF,
1299		0x90,0xF2,0xC0, 0xA1,0xFF,0xD0, 0xB2,0xFF,0xDC, 0xC3,0xFF,0xE8,
	1296	0x00,0x26,0x0B, 0x00,0x37,0x10, 0x00,0x48,0x16, 0x00,0x59,0x25,
	1297	0x08,0x6A,0x38, 0x19,0x7B,0x49, 0x2A,0x8C,0x5A, 0x3B,0x9D,0x6B,
	1298	0x4C,0xAE,0x7C, 0x5D,0xBF,0x8D, 0x6E,0xD0,0x9E, 0x7F,0xE1,0xAF,
	1299	0x90,0xF2,0xC0, 0xA1,0xFF,0xD0, 0xB2,0xFF,0xDC, 0xC3,0xFF,0xE8,
1300	1300
1301	1301	GREEN
1302		0x00,0x26,0x0B, 0x00,0x37,0x10, 0x00,0x48,0x16, 0x08,0x59,0x18,
1303		0x19,0x6A,0x18, 0x2A,0x7B,0x18, 0x3B,0x8C,0x29, 0x4C,0x9D,0x3A,
1304		0x5D,0xAE,0x4B, 0x6E,0xBF,0x5C, 0x7F,0xD0,0x6D, 0x90,0xE1,0x7E,
1305		0xA1,0xF2,0x8F, 0xB2,0xFF,0x9F, 0xC3,0xFF,0xAB, 0xD4,0xFF,0xB7,
	1302	0x00,0x26,0x0B, 0x00,0x37,0x10, 0x00,0x48,0x16, 0x08,0x59,0x18,
	1303	0x19,0x6A,0x18, 0x2A,0x7B,0x18, 0x3B,0x8C,0x29, 0x4C,0x9D,0x3A,
	1304	0x5D,0xAE,0x4B, 0x6E,0xBF,0x5C, 0x7F,0xD0,0x6D, 0x90,0xE1,0x7E,
	1305	0xA1,0xF2,0x8F, 0xB2,0xFF,0x9F, 0xC3,0xFF,0xAB, 0xD4,0xFF,0xB7,
1306	1306
1307	1307	YELLOW-GREEN
1308		0x00,0x1E,0x09, 0x00,0x2F,0x0E, 0x11,0x40,0x0E, 0x22,0x51,0x0E,
1309		0x33,0x62,0x0E, 0x44,0x73,0x0E, 0x55,0x84,0x0E, 0x66,0x95,0x17,
1310		0x77,0xA6,0x28, 0x88,0xB7,0x39, 0x99,0xC8,0x4A, 0xAA,0xD9,0x5B,
1311		0xBB,0xEA,0x6C, 0xCC,0xFB,0x7D, 0xDD,0xFF,0x8A, 0xEE,0xFF,0x96,
	1308	0x00,0x1E,0x09, 0x00,0x2F,0x0E, 0x11,0x40,0x0E, 0x22,0x51,0x0E,
	1309	0x33,0x62,0x0E, 0x44,0x73,0x0E, 0x55,0x84,0x0E, 0x66,0x95,0x17,
	1310	0x77,0xA6,0x28, 0x88,0xB7,0x39, 0x99,0xC8,0x4A, 0xAA,0xD9,0x5B,
	1311	0xBB,0xEA,0x6C, 0xCC,0xFB,0x7D, 0xDD,0xFF,0x8A, 0xEE,0xFF,0x96,
1312	1312
1313	1313	ORANGE-GREEN
1314		0x0D,0x0F,0x01, 0x1E,0x20,0x01, 0x2F,0x31,0x01, 0x40,0x42,0x01,
1315		0x51,0x53,0x01, 0x62,0x64,0x01, 0x73,0x75,0x01, 0x84,0x86,0x08,
1316		0x95,0x97,0x19, 0xA6,0xA8,0x2A, 0xB7,0xB9,0x3B, 0xC8,0xCA,0x4C,
1317		0xD9,0xDB,0x5D, 0xEA,0xEC,0x6E, 0xFB,0xFD,0x7F, 0xFF,0xFF,0x8F,
	1314	0x0D,0x0F,0x01, 0x1E,0x20,0x01, 0x2F,0x31,0x01, 0x40,0x42,0x01,
	1315	0x51,0x53,0x01, 0x62,0x64,0x01, 0x73,0x75,0x01, 0x84,0x86,0x08,
	1316	0x95,0x97,0x19, 0xA6,0xA8,0x2A, 0xB7,0xB9,0x3B, 0xC8,0xCA,0x4C,
	1317	0xD9,0xDB,0x5D, 0xEA,0xEC,0x6E, 0xFB,0xFD,0x7F, 0xFF,0xFF,0x8F,
1318	1318
1319	1319	LIGHT-ORANGE
1320		0x28,0x00,0x00, 0x39,0x0E,0x00, 0x4A,0x1F,0x00, 0x5B,0x30,0x00,
1321		0x6C,0x41,0x00, 0x7D,0x52,0x00, 0x8E,0x63,0x00, 0x9F,0x74,0x10,
1322		0xB0,0x85,0x21, 0xC1,0x96,0x32, 0xD2,0xA7,0x43, 0xE3,0xB8,0x54,
1323		0xF4,0xC9,0x65, 0xFF,0xDA,0x78, 0xFF,0xEB,0x8E, 0xFF,0xFC,0xA4,
	1320	0x28,0x00,0x00, 0x39,0x0E,0x00, 0x4A,0x1F,0x00, 0x5B,0x30,0x00,
	1321	0x6C,0x41,0x00, 0x7D,0x52,0x00, 0x8E,0x63,0x00, 0x9F,0x74,0x10,
	1322	0xB0,0x85,0x21, 0xC1,0x96,0x32, 0xD2,0xA7,0x43, 0xE3,0xB8,0x54,
	1323	0xF4,0xC9,0x65, 0xFF,0xDA,0x78, 0xFF,0xEB,0x8E, 0xFF,0xFC,0xA4,
1324	1324	*******************************************************************
1325	1325
1326	1326	*******************************************************************
r26736	r26737
1328	1328
1329	1329
1330	1330	GREY
1331		0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
1332		0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
1333		0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
1334		0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
	1331	0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
	1332	0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
	1333	0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
	1334	0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
1335	1335
1336	1336	GOLD
1337		0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
1338		0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
1339		0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
1340		0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xF7,0x97,
	1337	0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
	1338	0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
	1339	0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
	1340	0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xF7,0x97,
1341	1341
1342	1342	ORANGE
1343		0x32,0x00,0x00, 0x43,0x05,0x00, 0x54,0x16,0x00, 0x65,0x27,0x00,
1344		0x76,0x38,0x00, 0x87,0X49,0x00, 0x98,0x5A,0x0C, 0xA9,0x6B,0x1D,
1345		0xBA,0x7C,0x2E, 0xCB,0x8D,0x3F, 0xDC,0x9E,0x50, 0xED,0xAF,0x61,
1346		0xFE,0xC0,0x72, 0xFF,0xD1,0x88, 0xFF,0xE2,0x9E, 0xFF,0xF3,0xB4,
	1343	0x32,0x00,0x00, 0x43,0x05,0x00, 0x54,0x16,0x00, 0x65,0x27,0x00,
	1344	0x76,0x38,0x00, 0x87,0X49,0x00, 0x98,0x5A,0x0C, 0xA9,0x6B,0x1D,
	1345	0xBA,0x7C,0x2E, 0xCB,0x8D,0x3F, 0xDC,0x9E,0x50, 0xED,0xAF,0x61,
	1346	0xFE,0xC0,0x72, 0xFF,0xD1,0x88, 0xFF,0xE2,0x9E, 0xFF,0xF3,0xB4,
1347	1347
1348	1348	RED-ORANGE
1349		0x3F,0x00,0x00, 0x50,0x00,0x00, 0x61,0x07,0x00, 0x72,0x18,0x01,
1350		0x83,0x29,0x12, 0x94,0x3A,0x23, 0xA5,0x4B,0x34, 0xB6,0x5C,0x45,
1351		0xC7,0x6D,0x56, 0xD8,0x7E,0x67, 0xE9,0x8F,0x78, 0xFA,0xA0,0x89,
1352		0xFF,0xB1,0x9E, 0xFF,0xC2,0xB4, 0xFF,0xD3,0xCA, 0xFF,0xE4,0xE0,
	1349	0x3F,0x00,0x00, 0x50,0x00,0x00, 0x61,0x07,0x00, 0x72,0x18,0x01,
	1350	0x83,0x29,0x12, 0x94,0x3A,0x23, 0xA5,0x4B,0x34, 0xB6,0x5C,0x45,
	1351	0xC7,0x6D,0x56, 0xD8,0x7E,0x67, 0xE9,0x8F,0x78, 0xFA,0xA0,0x89,
	1352	0xFF,0xB1,0x9E, 0xFF,0xC2,0xB4, 0xFF,0xD3,0xCA, 0xFF,0xE4,0xE0,
1353	1353
1354	1354	PINK
1355		0x3E,0x00,0x0C, 0x4F,0x00,0x18, 0x60,0x00,0x24, 0x71,0x0E,0x34,
1356		0x82,0x1F,0x45, 0x93,0x30,0x56, 0xA4,0x41,0x67, 0xB5,0x52,0x78,
1357		0xC6,0x63,0x89, 0xD7,0x74,0x9A, 0xE8,0x85,0xAB, 0xF9,0x96,0xB6,
1358		0xFF,0xA7,0xD1, 0xFF,0xB8,0xE7, 0xFF,0xC9,0xEF, 0xFF,0xDA,0xF4,
	1355	0x3E,0x00,0x0C, 0x4F,0x00,0x18, 0x60,0x00,0x24, 0x71,0x0E,0x34,
	1356	0x82,0x1F,0x45, 0x93,0x30,0x56, 0xA4,0x41,0x67, 0xB5,0x52,0x78,
	1357	0xC6,0x63,0x89, 0xD7,0x74,0x9A, 0xE8,0x85,0xAB, 0xF9,0x96,0xB6,
	1358	0xFF,0xA7,0xD1, 0xFF,0xB8,0xE7, 0xFF,0xC9,0xEF, 0xFF,0xDA,0xF4,
1359	1359
1360	1360	PURPLE
1361		0x2F,0x00,0x3F, 0x40,0x00,0x4B, 0x51,0x00,0x57, 0x62,0x0C,0x66,
1362		0x73,0x1D,0x77, 0x84,0x2E,0x88, 0x95,0x3F,0x99, 0xA6,0x50,0xAA,
1363		0xB7,0x61,0xBB, 0xC8,0x72,0xCC, 0xD9,0x83,0xDD, 0xEA,0x94,0xE5,
1364		0xFB,0xA5,0xE5, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
	1361	0x2F,0x00,0x3F, 0x40,0x00,0x4B, 0x51,0x00,0x57, 0x62,0x0C,0x66,
	1362	0x73,0x1D,0x77, 0x84,0x2E,0x88, 0x95,0x3F,0x99, 0xA6,0x50,0xAA,
	1363	0xB7,0x61,0xBB, 0xC8,0x72,0xCC, 0xD9,0x83,0xDD, 0xEA,0x94,0xE5,
	1364	0xFB,0xA5,0xE5, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
1365	1365
1366	1366	PURPLE-BLUE
1367		0x16,0x00,0x64, 0x27,0x00,0x70, 0x38,0x02,0x7D, 0x49,0x13,0x8E,
1368		0x5A,0x24,0x9F, 0x6B,0x35,0xB0, 0x7C,0x46,0xC1, 0x8D,0x57,0xD2,
1369		0x9E,0x68,0xE3, 0xAF,0x79,0xEF, 0xC0,0x8A,0xEF, 0xD1,0x9D,0xEF,
1370		0xE2,0xAC,0xEF, 0xF3,0xBD,0xEF, 0xFF,0xCE,0xF0, 0xFF,0xDF,0xF5,
	1367	0x16,0x00,0x64, 0x27,0x00,0x70, 0x38,0x02,0x7D, 0x49,0x13,0x8E,
	1368	0x5A,0x24,0x9F, 0x6B,0x35,0xB0, 0x7C,0x46,0xC1, 0x8D,0x57,0xD2,
	1369	0x9E,0x68,0xE3, 0xAF,0x79,0xEF, 0xC0,0x8A,0xEF, 0xD1,0x9D,0xEF,
	1370	0xE2,0xAC,0xEF, 0xF3,0xBD,0xEF, 0xFF,0xCE,0xF0, 0xFF,0xDF,0xF5,
1371	1371
1372	1372	BLUE1
1373		0x00,0x00,0x71, 0x09,0x00,0x7F, 0x1A,0x10,0x90, 0x2B,0x21,0xA1,
1374		0x3C,0x32,0xB2, 0x4D,0x43,0xC3, 0x5E,0x54,0xD4, 0x6F,0x65,0xE5,
1375		0x80,0x76,0xF6, 0x91,0x87,0xFC, 0xA2,0x98,0xFC, 0xB3,0xA9,0xFC,
1376		0xC4,0xBA,0xFC, 0xD5,0xCB,0xFC, 0xE6,0xDC,0xFC, 0xF7,0xED,0xFC,
	1373	0x00,0x00,0x71, 0x09,0x00,0x7F, 0x1A,0x10,0x90, 0x2B,0x21,0xA1,
	1374	0x3C,0x32,0xB2, 0x4D,0x43,0xC3, 0x5E,0x54,0xD4, 0x6F,0x65,0xE5,
	1375	0x80,0x76,0xF6, 0x91,0x87,0xFC, 0xA2,0x98,0xFC, 0xB3,0xA9,0xFC,
	1376	0xC4,0xBA,0xFC, 0xD5,0xCB,0xFC, 0xE6,0xDC,0xFC, 0xF7,0xED,0xFC,
1377	1377
1378	1378	BLUE2
1379		0x00,0x00,0x5E, 0x00,0x11,0x74, 0x00,0x22,0x8A, 0x0F,0x33,0x9C,
1380		0x20,0x44,0xAD, 0x31,0x55,0xBE, 0x42,0x66,0xCF, 0x53,0x77,0xE0,
1381		0x64,0x88,0xF1, 0x75,0x99,0xFF, 0x86,0xAA,0xFF, 0x97,0xBB,0xFF,
1382		0xA8,0xCC,0xFF, 0xB9,0xDD,0xFF, 0xCA,0xEE,0xFF, 0xDB,0xFF,0xFF,
	1379	0x00,0x00,0x5E, 0x00,0x11,0x74, 0x00,0x22,0x8A, 0x0F,0x33,0x9C,
	1380	0x20,0x44,0xAD, 0x31,0x55,0xBE, 0x42,0x66,0xCF, 0x53,0x77,0xE0,
	1381	0x64,0x88,0xF1, 0x75,0x99,0xFF, 0x86,0xAA,0xFF, 0x97,0xBB,0xFF,
	1382	0xA8,0xCC,0xFF, 0xB9,0xDD,0xFF, 0xCA,0xEE,0xFF, 0xDB,0xFF,0xFF,
1383	1383
1384	1384	LIGHT-BLUE
1385		0x00,0x12,0x3B, 0x00,0x23,0x51, 0x00,0x34,0x68, 0x00,0x45,0x7E,
1386		0x0C,0x56,0x90, 0x1D,0x67,0xA1, 0x2E,0x78,0xB2, 0x3F,0x89,0xC3,
1387		0x50,0x9A,0xD4, 0x61,0xAB,0xE5, 0x72,0xBC,0xF6, 0x83,0xCD,0xFF,
1388		0x94,0xDE,0xFF, 0xA5,0xEF,0xFF, 0xB6,0xFF,0xFF, 0xC7,0xFF,0xFF,
	1385	0x00,0x12,0x3B, 0x00,0x23,0x51, 0x00,0x34,0x68, 0x00,0x45,0x7E,
	1386	0x0C,0x56,0x90, 0x1D,0x67,0xA1, 0x2E,0x78,0xB2, 0x3F,0x89,0xC3,
	1387	0x50,0x9A,0xD4, 0x61,0xAB,0xE5, 0x72,0xBC,0xF6, 0x83,0xCD,0xFF,
	1388	0x94,0xDE,0xFF, 0xA5,0xEF,0xFF, 0xB6,0xFF,0xFF, 0xC7,0xFF,0xFF,
1389	1389
1390	1390	TURQUOISE
1391		0x00,0x20,0x0C, 0x00,0x31,0x22, 0x00,0x42,0x38, 0x00,0x53,0x4E,
1392		0x04,0x64,0x63, 0x15,0x75,0x74, 0x26,0x86,0x85, 0x37,0x97,0x96,
1393		0x48,0xA8,0xA7, 0x59,0xB9,0xB8, 0x6A,0xCA,0xC9, 0x7B,0xDB,0xDA,
1394		0x8C,0xEC,0xEB, 0x9D,0xFD,0xFC, 0xAE,0xFF,0xFF, 0xBF,0xFF,0xFF,
	1391	0x00,0x20,0x0C, 0x00,0x31,0x22, 0x00,0x42,0x38, 0x00,0x53,0x4E,
	1392	0x04,0x64,0x63, 0x15,0x75,0x74, 0x26,0x86,0x85, 0x37,0x97,0x96,
	1393	0x48,0xA8,0xA7, 0x59,0xB9,0xB8, 0x6A,0xCA,0xC9, 0x7B,0xDB,0xDA,
	1394	0x8C,0xEC,0xEB, 0x9D,0xFD,0xFC, 0xAE,0xFF,0xFF, 0xBF,0xFF,0xFF,
1395	1395
1396	1396	GREEN-BLUE
1397		0x00,0x27,0x0C, 0x00,0x38,0x11, 0x00,0x49,0x16, 0x00,0x5A,0x1C,
1398		0x0B,0x6B,0x2F, 0x1C,0x7C,0x40, 0x2D,0x8D,0x51, 0x3E,0x9E,0x62,
1399		0x4F,0xAF,0x73, 0x60,0xC0,0x84, 0x71,0xD1,0x95, 0x82,0xE2,0xA6,
1400		0x93,0xF3,0xB7, 0xA4,0xFF,0xC6, 0xB5,0xFF,0xD2, 0xC6,0xFF,0xDE,
	1397	0x00,0x27,0x0C, 0x00,0x38,0x11, 0x00,0x49,0x16, 0x00,0x5A,0x1C,
	1398	0x0B,0x6B,0x2F, 0x1C,0x7C,0x40, 0x2D,0x8D,0x51, 0x3E,0x9E,0x62,
	1399	0x4F,0xAF,0x73, 0x60,0xC0,0x84, 0x71,0xD1,0x95, 0x82,0xE2,0xA6,
	1400	0x93,0xF3,0xB7, 0xA4,0xFF,0xC6, 0xB5,0xFF,0xD2, 0xC6,0xFF,0xDE,
1401	1401
1402	1402	GREEN
1403		0x00,0x25,0x0B, 0x00,0x36,0x10, 0x00,0x47,0x15, 0x0D,0x58,0x16,
1404		0x1E,0x69,0x16, 0x2F,0x7A,0x16, 0x40,0x8B,0x21, 0x51,0x9C,0x32,
1405		0x62,0xAD,0x43, 0x73,0xBE,0x54, 0x84,0xCF,0x65, 0x95,0xE0,0x76,
1406		0xA6,0xF1,0x87, 0xB7,0xFF,0x98, 0xC8,0xFF,0xA3, 0xD9,0xFF,0xAF,
	1403	0x00,0x25,0x0B, 0x00,0x36,0x10, 0x00,0x47,0x15, 0x0D,0x58,0x16,
	1404	0x1E,0x69,0x16, 0x2F,0x7A,0x16, 0x40,0x8B,0x21, 0x51,0x9C,0x32,
	1405	0x62,0xAD,0x43, 0x73,0xBE,0x54, 0x84,0xCF,0x65, 0x95,0xE0,0x76,
	1406	0xA6,0xF1,0x87, 0xB7,0xFF,0x98, 0xC8,0xFF,0xA3, 0xD9,0xFF,0xAF,
1407	1407
1408	1408	YELLOW-GREEN
1409		0x00,0x1B,0x08, 0x06,0x2C,0x0B, 0x17,0x3D,0x0B, 0x28,0x4E,0x0B,
1410		0x39,0x5F,0x0B, 0x4A,0x70,0x0B, 0x5B,0x81,0x0B, 0x6C,0x92,0x12,
1411		0x7D,0xA3,0x23, 0x8E,0xB4,0x34, 0x9F,0xC5,0x45, 0xB0,0xD6,0x56,
1412		0xC1,0xE7,0x67, 0xD2,0xF8,0x78, 0xE3,0xFF,0x86, 0xF4,0xFF,0x92,
	1409	0x00,0x1B,0x08, 0x06,0x2C,0x0B, 0x17,0x3D,0x0B, 0x28,0x4E,0x0B,
	1410	0x39,0x5F,0x0B, 0x4A,0x70,0x0B, 0x5B,0x81,0x0B, 0x6C,0x92,0x12,
	1411	0x7D,0xA3,0x23, 0x8E,0xB4,0x34, 0x9F,0xC5,0x45, 0xB0,0xD6,0x56,
	1412	0xC1,0xE7,0x67, 0xD2,0xF8,0x78, 0xE3,0xFF,0x86, 0xF4,0xFF,0x92,
1413	1413
1414	1414	ORANGE-GREEN
1415		0x13,0x0B,0x00, 0x24,0x1C,0x00, 0x35,0x2D,0x00, 0x46,0x3E,0x00,
1416		0x57,0x4F,0x00, 0x68,0x60,0x00, 0x79,0x71,0x00, 0x8A,0x82,0x08,
1417		0x9B,0x93,0x19, 0xAC,0xA4,0x2A, 0xBD,0xB5,0x3B, 0xCE,0xC6,0x4C,
1418		0xDF,0xD7,0x5D, 0xF0,0xE8,0x6E, 0xFF,0xF9,0x7F, 0xFF,0xFF,0x92,
	1415	0x13,0x0B,0x00, 0x24,0x1C,0x00, 0x35,0x2D,0x00, 0x46,0x3E,0x00,
	1416	0x57,0x4F,0x00, 0x68,0x60,0x00, 0x79,0x71,0x00, 0x8A,0x82,0x08,
	1417	0x9B,0x93,0x19, 0xAC,0xA4,0x2A, 0xBD,0xB5,0x3B, 0xCE,0xC6,0x4C,
	1418	0xDF,0xD7,0x5D, 0xF0,0xE8,0x6E, 0xFF,0xF9,0x7F, 0xFF,0xFF,0x92,
1419	1419
1420	1420	LIGHT-ORANGE
1421		0x2D,0x00,0x00, 0x3E,0x0A,0x00, 0x4F,0x1B,0x00, 0x60,0x2C,0x00,
1422		0x71,0x3D,0x00, 0x82,0x4E,0x00, 0x93,0x5F,0x05, 0xA4,0x70,0x16,
1423		0xB5,0x81,0x27, 0xC4,0x90,0x37, 0xD7,0xA3,0x49, 0xE8,0xB4,0x5A,
1424		0xF9,0xC5,0x6B, 0xFF,0xD6,0x80, 0xFF,0xE7,0x96, 0xFF,0xF8,0xAC,
	1421	0x2D,0x00,0x00, 0x3E,0x0A,0x00, 0x4F,0x1B,0x00, 0x60,0x2C,0x00,
	1422	0x71,0x3D,0x00, 0x82,0x4E,0x00, 0x93,0x5F,0x05, 0xA4,0x70,0x16,
	1423	0xB5,0x81,0x27, 0xC4,0x90,0x37, 0xD7,0xA3,0x49, 0xE8,0xB4,0x5A,
	1424	0xF9,0xC5,0x6B, 0xFF,0xD6,0x80, 0xFF,0xE7,0x96, 0xFF,0xF8,0xAC,
1425	1425	*******************************************************************
1426	1426
1427	1427	*******************************************************************
1428	1428	PALETTE - 27.7 PHASE SHIFT
1429	1429
1430	1430	GREY
1431		0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
1432		0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
1433		0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
1434		0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
	1431	0x00,0x00,0x00, 0x11,0x11,0x11, 0x22,0x22,0x22, 0x33,0x33,0x33,
	1432	0x44,0x44,0x44, 0x55,0x55,0x55, 0x66,0x66,0x66, 0x77,0x77,0x77,
	1433	0x88,0x88,0x88, 0x99,0x99,0x99, 0xAA,0xAA,0xAA, 0xBB,0xBB,0xBB,
	1434	0xCC,0xCC,0xCC, 0xDD,0xDD,0xDD, 0xEE,0xEE,0xEE, 0xFF,0xFF,0xFF,
1435	1435
1436	1436	GOLD
1437		0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
1438		0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
1439		0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
1440		0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xFF,0x97,
	1437	0x1A,0x07,0x00, 0x2B,0x18,0x00, 0x3C,0x29,0x00, 0x4D,0x3A,0x00,
	1438	0x5E,0x4B,0x00, 0x6F,0x5C,0x00, 0x80,0x6D,0x00, 0x91,0x7E,0x09,
	1439	0xA2,0x8F,0x1A, 0xB3,0xA0,0x2B, 0xC4,0xB1,0x3C, 0xD5,0xC2,0x4D,
	1440	0xE6,0xD3,0x5E, 0xF7,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xFF,0x97,
1441	1441
1442	1442	ORANGE
1443		0x32,0x00,0x00, 0x43,0x05,0x00, 0x54,0x16,0x00, 0x65,0x27,0x00,
1444		0x76,0x38,0x00, 0x87,0x49,0x00, 0x98,0x5A,0x0C, 0xA9,0x6B,0x1D,
1445		0xBA,0x7C,0x2E, 0xCB,0x8D,0x3F, 0xDC,0x9E,0x50, 0xED,0xAF,0x61,
1446		0xFE,0xC0,0x72, 0xFF,0xD1,0x88, 0xFF,0xE2,0x9E, 0xFF,0xF3,0xB4,
	1443	0x32,0x00,0x00, 0x43,0x05,0x00, 0x54,0x16,0x00, 0x65,0x27,0x00,
	1444	0x76,0x38,0x00, 0x87,0x49,0x00, 0x98,0x5A,0x0C, 0xA9,0x6B,0x1D,
	1445	0xBA,0x7C,0x2E, 0xCB,0x8D,0x3F, 0xDC,0x9E,0x50, 0xED,0xAF,0x61,
	1446	0xFE,0xC0,0x72, 0xFF,0xD1,0x88, 0xFF,0xE2,0x9E, 0xFF,0xF3,0xB4,
1447	1447
1448	1448	RED-ORANGE
1449		0x3F,0x00,0x00, 0x50,0x00,0x00, 0x61,0x06,0x00, 0x72,0x17,0x03,
1450		0x83,0x28,0x14, 0x94,0x39,0x25, 0xA5,0x4A,0x36, 0xB6,0x5B,0x47,
1451		0xC7,0x6C,0x58, 0xD8,0x7D,0x69, 0xE9,0x8E,0x7A, 0xFA,0x9F,0x8B,
1452		0xFF,0xB0,0x9F, 0xFF,0xC1,0xB5, 0xFF,0xD2,0xCB, 0xFF,0xE3,0xE1,
	1449	0x3F,0x00,0x00, 0x50,0x00,0x00, 0x61,0x06,0x00, 0x72,0x17,0x03,
	1450	0x83,0x28,0x14, 0x94,0x39,0x25, 0xA5,0x4A,0x36, 0xB6,0x5B,0x47,
	1451	0xC7,0x6C,0x58, 0xD8,0x7D,0x69, 0xE9,0x8E,0x7A, 0xFA,0x9F,0x8B,
	1452	0xFF,0xB0,0x9F, 0xFF,0xC1,0xB5, 0xFF,0xD2,0xCB, 0xFF,0xE3,0xE1,
1453	1453
1454	1454	PINK
1455		0x3D,0x00,0x10, 0x4E,0x00,0x1C, 0x5F,0x00,0x27, 0x70,0x0D,0x37,
1456		0x81,0x1E,0x48, 0x92,0x2F,0x59, 0xA3,0x40,0x6A, 0xB4,0x51,0x7B,
1457		0xC5,0x62,0x8C, 0xD6,0x73,0x9D, 0xE7,0x84,0xAE, 0xF8,0x95,0xBF,
1458		0xFF,0xA6,0xD3, 0xFF,0xB7,0xE9, 0xFF,0xC8,0xEE, 0xFF,0xD9,0xF4,
	1455	0x3D,0x00,0x10, 0x4E,0x00,0x1C, 0x5F,0x00,0x27, 0x70,0x0D,0x37,
	1456	0x81,0x1E,0x48, 0x92,0x2F,0x59, 0xA3,0x40,0x6A, 0xB4,0x51,0x7B,
	1457	0xC5,0x62,0x8C, 0xD6,0x73,0x9D, 0xE7,0x84,0xAE, 0xF8,0x95,0xBF,
	1458	0xFF,0xA6,0xD3, 0xFF,0xB7,0xE9, 0xFF,0xC8,0xEE, 0xFF,0xD9,0xF4,
1459	1459
1460	1460	PURPLE
1461		0x2D,0x00,0x42, 0x3E,0x00,0x4E, 0x4F,0x00,0x5A, 0x60,0x0C,0x6A,
1462		0x71,0x1D,0x7B, 0x82,0x2E,0x8C, 0x93,0x3F,0x9D, 0xA4,0x50,0xAE,
1463		0xB5,0x61,0xBF, 0xC6,0x72,0xD0, 0xD7,0x83,0xE1, 0xE8,0x94,0xE6,
1464		0xF9,0xA5,0xE6, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
	1461	0x2D,0x00,0x42, 0x3E,0x00,0x4E, 0x4F,0x00,0x5A, 0x60,0x0C,0x6A,
	1462	0x71,0x1D,0x7B, 0x82,0x2E,0x8C, 0x93,0x3F,0x9D, 0xA4,0x50,0xAE,
	1463	0xB5,0x61,0xBF, 0xC6,0x72,0xD0, 0xD7,0x83,0xE1, 0xE8,0x94,0xE6,
	1464	0xF9,0xA5,0xE6, 0xFF,0xB6,0xE9, 0xFF,0xC7,0xEE, 0xFF,0xD8,0xF3,
1465	1465
1466	1466	PURPLE-BLUE
1467		0x13,0x00,0x67, 0x24,0x00,0x73, 0x35,0x03,0x80, 0x46,0x14,0x91,
1468		0x57,0x25,0xA2, 0x68,0x36,0xB3, 0x79,0x47,0xC4, 0x8A,0x58,0xD5,
1469		0x9B,0x69,0xE6, 0xAC,0x7A,0xF0, 0xBD,0x8B,0xF0, 0xCE,0x9C,0xF0,
1470		0xDF,0xAD,0xF0, 0xF0,0xBE,0xF0, 0xFF,0xCF,0xF1, 0xFF,0xE0,0xF6,
	1467	0x13,0x00,0x67, 0x24,0x00,0x73, 0x35,0x03,0x80, 0x46,0x14,0x91,
	1468	0x57,0x25,0xA2, 0x68,0x36,0xB3, 0x79,0x47,0xC4, 0x8A,0x58,0xD5,
	1469	0x9B,0x69,0xE6, 0xAC,0x7A,0xF0, 0xBD,0x8B,0xF0, 0xCE,0x9C,0xF0,
	1470	0xDF,0xAD,0xF0, 0xF0,0xBE,0xF0, 0xFF,0xCF,0xF1, 0xFF,0xE0,0xF6,
1471	1471
1472	1472	BLUE1
1473		0x00,0x00,0x70, 0x05,0x01,0x80, 0x16,0x12,0x91, 0x27,0x23,0xA2,
1474		0x38,0x34,0xB3, 0x49,0x45,0xC4, 0x5A,0x56,0xD5, 0x6B,0x67,0xE6,
1475		0x7C,0x78,0xF7, 0x8D,0x89,0xFE, 0x9E,0x9A,0xFE, 0xAF,0xAB,0xFE,
1476		0xC0,0xBC,0xFE, 0xD1,0xCD,0xFE, 0xE2,0xDE,0xFE, 0xF3,0xEF,0xFE,
	1473	0x00,0x00,0x70, 0x05,0x01,0x80, 0x16,0x12,0x91, 0x27,0x23,0xA2,
	1474	0x38,0x34,0xB3, 0x49,0x45,0xC4, 0x5A,0x56,0xD5, 0x6B,0x67,0xE6,
	1475	0x7C,0x78,0xF7, 0x8D,0x89,0xFE, 0x9E,0x9A,0xFE, 0xAF,0xAB,0xFE,
	1476	0xC0,0xBC,0xFE, 0xD1,0xCD,0xFE, 0xE2,0xDE,0xFE, 0xF3,0xEF,0xFE,
1477	1477
1478	1478	BLUE2
1479		0x00,0x03,0x5B, 0x00,0x14,0x71, 0x00,0x25,0x87, 0x0C,0x36,0x9A,
1480		0x1D,0x47,0xAB, 0x2E,0x58,0xBC, 0x3F,0x69,0xCD, 0x50,0x7A,0xDE,
1481		0x61,0x8B,0xEF, 0x72,0x9C,0xFF, 0x83,0xAD,0xFF, 0x94,0xBE,0xFF,
1482		0xA5,0xCF,0xFF, 0xB6,0xE0,0xFF, 0xC7,0xF1,0xFF, 0xD8,0xFF,0xFF,
	1479	0x00,0x03,0x5B, 0x00,0x14,0x71, 0x00,0x25,0x87, 0x0C,0x36,0x9A,
	1480	0x1D,0x47,0xAB, 0x2E,0x58,0xBC, 0x3F,0x69,0xCD, 0x50,0x7A,0xDE,
	1481	0x61,0x8B,0xEF, 0x72,0x9C,0xFF, 0x83,0xAD,0xFF, 0x94,0xBE,0xFF,
	1482	0xA5,0xCF,0xFF, 0xB6,0xE0,0xFF, 0xC7,0xF1,0xFF, 0xD8,0xFF,0xFF,
1483	1483
1484	1484	LIGHT-BLUE
1485		0x00,0x15,0x35, 0x00,0x26,0x4B, 0x00,0x37,0x61, 0x00,0x48,0x78,
1486		0x0A,0x59,0x8B, 0x1B,0x6A,0x9C, 0x2C,0x7B,0xAD, 0x3D,0x8C,0xBE,
1487		0x4E,0x9D,0xCF, 0x5F,0xAE,0xE0, 0x70,0xBF,0xF1, 0x81,0xD0,0xFF,
1488		0x92,0xE1,0xFF, 0xA3,0xF2,0xFF, 0xB4,0xFF,0xFF, 0xC5,0xFF,0xFF,
	1485	0x00,0x15,0x35, 0x00,0x26,0x4B, 0x00,0x37,0x61, 0x00,0x48,0x78,
	1486	0x0A,0x59,0x8B, 0x1B,0x6A,0x9C, 0x2C,0x7B,0xAD, 0x3D,0x8C,0xBE,
	1487	0x4E,0x9D,0xCF, 0x5F,0xAE,0xE0, 0x70,0xBF,0xF1, 0x81,0xD0,0xFF,
	1488	0x92,0xE1,0xFF, 0xA3,0xF2,0xFF, 0xB4,0xFF,0xFF, 0xC5,0xFF,0xFF,
1489	1489
1490	1490	TURQUOISE
1491		0x00,0x22,0x0A, 0x00,0x33,0x19, 0x00,0x44,0x2F, 0x00,0x55,0x45,
1492		0x04,0x66,0x5A, 0x15,0x77,0x6B, 0x26,0x88,0x7C, 0x37,0x99,0x8D,
1493		0x48,0xAA,0x9E, 0x59,0xBB,0xAF, 0x6A,0xCC,0xC0, 0x7B,0xDD,0xD1,
1494		0x8C,0xEE,0xE2, 0x9D,0xFF,0xF3, 0xAE,0xFF,0xFF, 0xBF,0xFF,0xFF,
	1491	0x00,0x22,0x0A, 0x00,0x33,0x19, 0x00,0x44,0x2F, 0x00,0x55,0x45,
	1492	0x04,0x66,0x5A, 0x15,0x77,0x6B, 0x26,0x88,0x7C, 0x37,0x99,0x8D,
	1493	0x48,0xAA,0x9E, 0x59,0xBB,0xAF, 0x6A,0xCC,0xC0, 0x7B,0xDD,0xD1,
	1494	0x8C,0xEE,0xE2, 0x9D,0xFF,0xF3, 0xAE,0xFF,0xFF, 0xBF,0xFF,0xFF,
1495	1495
1496	1496	GREEN-BLUE
1497		0x00,0x27,0x0C, 0x00,0x38,0x11, 0x00,0x49,0x16, 0x00,0x5A,0x1B,
1498		0x0D,0x6B,0x25, 0x1E,0x7C,0x36, 0x2F,0x8D,0x47, 0x40,0x9E,0x58,
1499		0x51,0xAF,0x69, 0x62,0xC0,0x7A, 0x73,0xD1,0x8B, 0x84,0xE2,0x9C,
1500		0x95,0xF3,0xAD, 0xA6,0xFF,0xBD, 0xB7,0xFF,0xC9, 0xC8,0xFF,0xD4,
	1497	0x00,0x27,0x0C, 0x00,0x38,0x11, 0x00,0x49,0x16, 0x00,0x5A,0x1B,
	1498	0x0D,0x6B,0x25, 0x1E,0x7C,0x36, 0x2F,0x8D,0x47, 0x40,0x9E,0x58,
	1499	0x51,0xAF,0x69, 0x62,0xC0,0x7A, 0x73,0xD1,0x8B, 0x84,0xE2,0x9C,
	1500	0x95,0xF3,0xAD, 0xA6,0xFF,0xBD, 0xB7,0xFF,0xC9, 0xC8,0xFF,0xD4,
1501	1501
1502	1502	GREEN
1503		0x00,0x24,0x0B, 0x00,0x35,0x10, 0x01,0x46,0x15, 0x12,0x57,0x15,
1504		0x23,0x68,0x15, 0x34,0x79,0x15, 0x45,0x8A,0x19, 0x56,0x9B,0x2A,
1505		0x67,0xAC,0x3B, 0x78,0xBD,0x4C, 0x89,0xCE,0x5D, 0x9A,0xDF,0x6E,
1506		0xAB,0xF0,0x7F, 0xBC,0xFF,0x8F, 0xCD,0xFF,0x9B, 0xDE,0xFF,0xA7,
	1503	0x00,0x24,0x0B, 0x00,0x35,0x10, 0x01,0x46,0x15, 0x12,0x57,0x15,
	1504	0x23,0x68,0x15, 0x34,0x79,0x15, 0x45,0x8A,0x19, 0x56,0x9B,0x2A,
	1505	0x67,0xAC,0x3B, 0x78,0xBD,0x4C, 0x89,0xCE,0x5D, 0x9A,0xDF,0x6E,
	1506	0xAB,0xF0,0x7F, 0xBC,0xFF,0x8F, 0xCD,0xFF,0x9B, 0xDE,0xFF,0xA7,
1507	1507
1508	1508	YELLOW-GREEN
1509		0x00,0x18,0x07, 0x00,0x29,0x0C, 0x1E,0x3A,0x08, 0x2F,0x4B,0x08,
1510		0x40,0x5C,0x08, 0x51,0x6D,0x08, 0x62,0x7E,0x08, 0x73,0x8F,0x0D,
1511		0x84,0xA0,0x1E, 0x95,0xB1,0x2F, 0xA6,0xC2,0x40, 0xB7,0xD3,0x51,
1512		0xC8,0xE4,0x62, 0xD9,0xF5,0x73, 0xEA,0xFF,0x82, 0xFB,0xFF,0x8E,
	1509	0x00,0x18,0x07, 0x00,0x29,0x0C, 0x1E,0x3A,0x08, 0x2F,0x4B,0x08,
	1510	0x40,0x5C,0x08, 0x51,0x6D,0x08, 0x62,0x7E,0x08, 0x73,0x8F,0x0D,
	1511	0x84,0xA0,0x1E, 0x95,0xB1,0x2F, 0xA6,0xC2,0x40, 0xB7,0xD3,0x51,
	1512	0xC8,0xE4,0x62, 0xD9,0xF5,0x73, 0xEA,0xFF,0x82, 0xFB,0xFF,0x8E,
1513	1513
1514	1514	ORANGE-GREEN
1515		0x1B,0x07,0x00, 0x2C,0x18,0x00, 0x3D,0x29,0x00, 0x4E,0x3A,0x00,
1516		0x5F,0x4B,0x00, 0x70,0x5C,0x00, 0x81,0x6D,0x00, 0x92,0x7E,0x09,
1517		0xA3,0x8F,0x1A, 0xB4,0xA0,0x2B, 0xC5,0xB1,0x3C, 0xD6,0xC2,0x4D,
1518		0xE7,0xD3,0x5E, 0xF8,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xFF,0x97,
	1515	0x1B,0x07,0x00, 0x2C,0x18,0x00, 0x3D,0x29,0x00, 0x4E,0x3A,0x00,
	1516	0x5F,0x4B,0x00, 0x70,0x5C,0x00, 0x81,0x6D,0x00, 0x92,0x7E,0x09,
	1517	0xA3,0x8F,0x1A, 0xB4,0xA0,0x2B, 0xC5,0xB1,0x3C, 0xD6,0xC2,0x4D,
	1518	0xE7,0xD3,0x5E, 0xF8,0xE4,0x6F, 0xFF,0xF5,0x83, 0xFF,0xFF,0x97,
1519	1519
1520	1520	LIGHT-ORANGE
1521		0x33,0x00,0x00, 0x44,0x05,0x00, 0x55,0x16,0x00, 0x66,0x27,0x00,
1522		0x77,0x38,0x00, 0x88,0x49,0x00, 0x99,0x5A,0x0D, 0xAA,0x6B,0x1E,
1523		0xBB,0x7C,0x2F, 0xCC,0x8D,0x40, 0xDD,0x9E,0x51, 0xEE,0xAF,0x62,
1524		0xFF,0xC0,0x73, 0xFF,0xD1,0x89, 0xFF,0xE2,0x9F, 0xFF,0xF3,0xB5
	1521	0x33,0x00,0x00, 0x44,0x05,0x00, 0x55,0x16,0x00, 0x66,0x27,0x00,
	1522	0x77,0x38,0x00, 0x88,0x49,0x00, 0x99,0x5A,0x0D, 0xAA,0x6B,0x1E,
	1523	0xBB,0x7C,0x2F, 0xCC,0x8D,0x40, 0xDD,0x9E,0x51, 0xEE,0xAF,0x62,
	1524	0xFF,0xC0,0x73, 0xFF,0xD1,0x89, 0xFF,0xE2,0x9F, 0xFF,0xF3,0xB5
1525	1525	*******************************************************************/
1526	1526
1527	1527	/**************************************************************

trunk/src/mess/drivers/c80.c
r26736	r26737
20	20	M : MEMory manipulation
21	21	G : GO
22	22	F10 : RESet
23		ESC : BRK
	23	ESC : BRK
24	24
25	25	Functions (press F1 then the indicated number):
26	26	0 : FILL

trunk/src/mess/drivers/mc1502.c
r26736	r26737
83	83	key \|= ioport("Y10")->read();
84	84	key \|= ioport("Y11")->read();
85	85	key \|= ioport("Y12")->read();
86		// DBG_LOG(1,"mc1502_k_s_c",("= %02X (%d) %s\n", key, m_kbd.pulsing,
87		// (key \|\| m_kbd.pulsing) ? " will IRQ" : ""));
	86	// DBG_LOG(1,"mc1502_k_s_c",("= %02X (%d) %s\n", key, m_kbd.pulsing,
	87	// (key \|\| m_kbd.pulsing) ? " will IRQ" : ""));
88	88
89	89	/*
90	90	If a key is pressed and we're not pulsing yet, start pulsing the IRQ1;
r26736	r26737
110	110
111	111	WRITE8_MEMBER(mc1502_state::mc1502_ppi_portb_w)
112	112	{
113		// DBG_LOG(2,"mc1502_ppi_portb_w",("( %02X )\n", data));
	113	// DBG_LOG(2,"mc1502_ppi_portb_w",("( %02X )\n", data));
114	114	m_ppi_portb = data;
115	115	machine().device<pit8253_device>("pit8253")->gate2_w(BIT(data, 0));
116		// mc1502_speaker_set_spkrdata(BIT(data, 1));
	116	// mc1502_speaker_set_spkrdata(BIT(data, 1));
117	117	m_centronics->strobe_w(BIT(data, 2));
118	118	m_centronics->autofeed_w(BIT(data, 3));
119	119	m_centronics->init_prime_w(BIT(data, 4));
r26736	r26737
124	124	// bit 3: i8251 SYNDET pin triggers NMI (default = 1 = no)
125	125	WRITE8_MEMBER(mc1502_state::mc1502_ppi_portc_w)
126	126	{
127		// DBG_LOG(2,"mc1502_ppi_portc_w",("( %02X )\n", data));
	127	// DBG_LOG(2,"mc1502_ppi_portc_w",("( %02X )\n", data));
128	128	m_ppi_portc = data & 15;
129	129	}
130	130
r26736	r26737
154	154	data = ( data & ~0x20 ) \| ( timer2_output ? 0x20 : 0x00 );
155	155	data = ( data & ~0x10 ) \| ( (BIT(m_ppi_portb, 1) && timer2_output) ? 0x10 : 0x00 );
156	156
157		// DBG_LOG(2,"mc1502_ppi_portc_r",("= %02X (tap_val %f t2out %d) at %s\n",
158		// data, tap_val, timer2_output, machine().describe_context()));
	157	// DBG_LOG(2,"mc1502_ppi_portc_r",("= %02X (tap_val %f t2out %d) at %s\n",
	158	// data, tap_val, timer2_output, machine().describe_context()));
159	159	return data;
160	160	}
161	161
r26736	r26737
176	176	if (m_kbd.mask & 0x0400) { key \|= ioport("Y11")->read(); }
177	177	if (m_kbd.mask & 0x0800) { key \|= ioport("Y12")->read(); }
178	178	key ^= 0xff;
179		// DBG_LOG(2,"mc1502_kppi_porta_r",("= %02X\n", key));
	179	// DBG_LOG(2,"mc1502_kppi_porta_r",("= %02X\n", key));
180	180	return key;
181	181	}
182	182
r26736	r26737
188	188	m_kbd.mask \|= 1 << 11;
189	189	else
190	190	m_kbd.mask &= ~(1 << 11);
191		// DBG_LOG(2,"mc1502_kppi_portb_w",("( %02X -> %04X )\n", data, m_kbd.mask));
	191	// DBG_LOG(2,"mc1502_kppi_portb_w",("( %02X -> %04X )\n", data, m_kbd.mask));
192	192	}
193	193
194	194	WRITE8_MEMBER(mc1502_state::mc1502_kppi_portc_w)
195	195	{
196	196	m_kbd.mask &= ~(7 << 8);
197	197	m_kbd.mask \|= ((data ^ 7) & 7) << 8;
198		// DBG_LOG(2,"mc1502_kppi_portc_w",("( %02X -> %04X )\n", data, m_kbd.mask));
	198	// DBG_LOG(2,"mc1502_kppi_portc_w",("( %02X -> %04X )\n", data, m_kbd.mask));
199	199	}
200	200
201	201	I8255_INTERFACE( mc1502_ppi8255_interface_1 )
r26736	r26737
244	244
245	245	WRITE_LINE_MEMBER(mc1502_state::mc1502_pit8253_out2_changed)
246	246	{
247		// mc1502_speaker_set_input( state );
	247	// mc1502_speaker_set_input( state );
248	248	m_cassette->output(state ? 1 : -1);
249	249	}
250	250
r26736	r26737
311	311
312	312	static ADDRESS_MAP_START( mc1502_map, AS_PROGRAM, 8, mc1502_state )
313	313	ADDRESS_MAP_UNMAP_HIGH
314		AM_RANGE(0x00000, 0x97fff) AM_RAM /* 96K on mainboard + 512K on extension card */
	314	AM_RANGE(0x00000, 0x97fff) AM_RAM /* 96K on mainboard + 512K on extension card */
315	315	AM_RANGE(0xc0000, 0xfbfff) AM_NOP
316		// AM_RANGE(0xe8000, 0xeffff) AM_ROM /* BASIC */
	316	// AM_RANGE(0xe8000, 0xeffff) AM_ROM /* BASIC */
317	317	AM_RANGE(0xfc000, 0xfffff) AM_ROM
318	318	ADDRESS_MAP_END
319	319
r26736	r26737
379	379	MCFG_CASSETTE_ADD( "cassette", mc1502_cassette_interface )
380	380
381	381	MCFG_SOFTWARE_LIST_ADD("flop_list","mc1502_flop")
382		// MCFG_SOFTWARE_LIST_ADD("cass_list","mc1502_cass")
	382	// MCFG_SOFTWARE_LIST_ADD("cass_list","mc1502_cass")
383	383
384	384	/* internal ram */
385	385	MCFG_RAM_ADD(RAM_TAG)

trunk/src/mess/drivers/prof80.c
r26736	r26737
15	15
16	16	TODO:
17	17
18		- floppy Err on A: Select
	18	- floppy Err on A: Select
19	19	- NE555 timeout is 10x too high
20	20	- grip31 does not work
21	21	- UNIO card (Z80-STI, Z80-SIO, 2x centronics)

trunk/src/mess/drivers/poisk1.c
r26736	r26737
99	99	if (m_kbpoll_mask & 0x40) { key &= ioport("Y7")->read(); }
100	100	if (m_kbpoll_mask & 0x80) { key &= ioport("Y8")->read(); }
101	101	ret = key & 0xff;
102		// DBG_LOG(1,"p1_ppi_portb_r",("= %02X\n", ret));
	102	// DBG_LOG(1,"p1_ppi_portb_r",("= %02X\n", ret));
103	103	return ret;
104	104	}
105	105
r26736	r26737
143	143
144	144	I8255_INTERFACE( p1_ppi8255_interface_1 )
145	145	{
146		/60H/ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_porta_r),
	146	/60H/ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_porta_r),
147	147	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_porta_w),
148		/69H/ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_portb_r),
	148	/69H/ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_portb_r),
149	149	DEVCB_NULL,
150		/6AH/ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_portc_r),
	150	/6AH/ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_portc_r),
151	151	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi_portc_w)
152	152	};
153	153
154	154	I8255_INTERFACE( p1_ppi8255_interface_2 )
155	155	{
156		/68H/ DEVCB_NULL,
	156	/68H/ DEVCB_NULL,
157	157	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi2_porta_w),
158		/61H/ DEVCB_NULL,
	158	/61H/ DEVCB_NULL,
159	159	DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi2_portb_w),
160		/62H/ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi2_portc_r),
	160	/62H/ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, p1_state, p1_ppi2_portc_r),
161	161	DEVCB_NULL
162	162	};
163	163
164	164	READ8_MEMBER(p1_state::p1_ppi_r)
165	165	{
166		// DBG_LOG(1,"p1ppi",("R %.2x\n", 0x60+offset));
	166	// DBG_LOG(1,"p1ppi",("R %.2x\n", 0x60+offset));
167	167	switch (offset) {
168	168	case 0:
169	169	return m_ppi8255n1->read(space, 0);
r26736	r26737
185	185
186	186	WRITE8_MEMBER(p1_state::p1_ppi_w)
187	187	{
188		// DBG_LOG(1,"p1ppi",("W %.2x $%02x\n", 0x60+offset, data));
	188	// DBG_LOG(1,"p1ppi",("W %.2x $%02x\n", 0x60+offset, data));
189	189	switch (offset) {
190	190	case 0:
191	191	return m_ppi8255n1->write(space, 0, data);

trunk/src/mess/drivers/rainbow.c
r26736	r26737
2	2	DEC Rainbow 100
3	3
4	4	Driver-in-progress by R. Belmont and Miodrag Milanovic.
5		Portions (2013) by Karl-Ludwig Deisenhofer (VT video, floppy, preliminary keyboard, DIP switches).
	5	Portions (2013) by Karl-Ludwig Deisenhofer (VT video, floppy, preliminary keyboard, DIP switches).
6	6
7	7	STATE AS OF DECEMBER 2013
8	8	--------------------------
9		- FLOPPY TIMING: 'wd17xx_complete_command' * must * be hard wired to about 13 usecs.
10		Line 1063 in 'wd17xx.c' has to be changed (until legacy code here is removed):
11		- w->timer_cmd->adjust(attotime::from_usec(usecs));
12		+ w->timer_cmd->adjust(attotime::from_usec(13));
	9	- FLOPPY TIMING: 'wd17xx_complete_command' * must * be hard wired to about 13 usecs.
	10	Line 1063 in 'wd17xx.c' has to be changed (until legacy code here is removed):
	11	- w->timer_cmd->adjust(attotime::from_usec(usecs));
	12	+ w->timer_cmd->adjust(attotime::from_usec(13));
13	13
14	14	- WORKAROUND AVAILABLE: keyboard emulation incomplete (inhibits the system from booting with ERROR 50 on cold or ERROR 13 on warm boot).
15		- NOT WORKING: serial (ERROR 60).
	15	- NOT WORKING: serial (ERROR 60).
16	16	- NOT WORKING: printer interface (ERROR 40). Like error 60 not mission-critical.
17	17
18	18	- NON-CRITICAL: watchdog logic (triggered after 108 ms without interrupts on original machine) still does not work as intended.
19	19
20		Timer is reset by TWO sources: the VERT INT L from the DC012, or the MHFU ENB L from the enable flip-flop.
21		The MHFU gets active if the 8088 has not acknowledged a video processor interrupt within approx. 108 milliseconds.
22
23		BIOS assumes a power-up reset if MHFU detection is disabled - and assumes a MHFU reset if MHFU detection is ENABLED.
24
25		As there is no reset switch, only a limited software reset exists on a real DEC-100 (CTRL-SETUP within SETUP).
	20	Timer is reset by TWO sources: the VERT INT L from the DC012, or the MHFU ENB L from the enable flip-flop.
	21	The MHFU gets active if the 8088 has not acknowledged a video processor interrupt within approx. 108 milliseconds.
26	22
	23	BIOS assumes a power-up reset if MHFU detection is disabled - and assumes a MHFU reset if MHFU detection is ENABLED.
	24
	25	As there is no reset switch, only a limited software reset exists on a real DEC-100 (CTRL-SETUP within SETUP).
	26
27	27	- TO BE IMPLEMENTED AS SLOT DEVICES (for now, DIP settings affect 'system_parameter_r' only and are disabled):
28	28	* Color graphics option (uses NEC upd7220 GDC)
29	29	* Extended communication option (same as BUNDLE_OPTION ?)
30	30
31	31	- OTHER UPGRADES (NEC_V20 should be easy, the TURBOW is harder to come by)
32		* Suitable Solutions TURBOW286: 12 Mhz, 68-pin, low power AMD N80L286-12 and WAYLAND/EDSUN EL286-88-10-B ( 80286 to 8088 Processor Signal Converter )
33		plus DC 7174 or DT 7174 (barely readable). Add-on card, replaces main 8088 cpu (via ribbon cable). Altered BOOT ROM labeled 'TBSS1.3 - 3ED4'.
	32	* Suitable Solutions TURBOW286: 12 Mhz, 68-pin, low power AMD N80L286-12 and WAYLAND/EDSUN EL286-88-10-B ( 80286 to 8088 Processor Signal Converter )
	33	plus DC 7174 or DT 7174 (barely readable). Add-on card, replaces main 8088 cpu (via ribbon cable). Altered BOOT ROM labeled 'TBSS1.3 - 3ED4'.
34	34
35		* NEC_V20 (requires modded BOOT ROM because of - at least 2 - hard coded timing loops):
36		100A: 100B/100+: 100B+ ALTERNATE RECOMMENDATION (fixes RAM size auto-detection problems when V20 is in place.
37		Tested on a 30+ year old live machine. Your mileage may vary)
	35	* NEC_V20 (requires modded BOOT ROM because of - at least 2 - hard coded timing loops):
	36	100A: 100B/100+: 100B+ ALTERNATE RECOMMENDATION (fixes RAM size auto-detection problems when V20 is in place.
	37	Tested on a 30+ year old live machine. Your mileage may vary)
38	38
39		Location Data Location Data Loc.\|Data
40		.... .. .... .. ------------------ 00C6 46 [ increases 'wait for Z80' from approx. 27,5 ms (old value 40) to 30,5 ms ]
41		.... .. .... .. ------------------ 0303 00 [ disable CHECKSUM ]
42		043F 64 072F 64 <-----------------> 072F 73 [ increases minimum cycle time from 2600 (64) to 3000 ms (73) ]
43		067D 20 0B36 20 <-----------------> 0B36 20 [ USE A VALUE OF 20 FOR THE NEC - as in the initial patch! CHANGES CAUSE VFR-ERROR 10 ]
44		1FFE 2B 3FFE 1B (BIOS CHECKSUM)
45		1FFF 70 3FFF 88 (BIOS CHECKSUM)
	39	Location Data Location Data Loc.\|Data
	40	.... .. .... .. ------------------ 00C6 46 [ increases 'wait for Z80' from approx. 27,5 ms (old value 40) to 30,5 ms ]
	41	.... .. .... .. ------------------ 0303 00 [ disable CHECKSUM ]
	42	043F 64 072F 64 <-----------------> 072F 73 [ increases minimum cycle time from 2600 (64) to 3000 ms (73) ]
	43	067D 20 0B36 20 <-----------------> 0B36 20 [ USE A VALUE OF 20 FOR THE NEC - as in the initial patch! CHANGES CAUSE VFR-ERROR 10 ]
	44	1FFE 2B 3FFE 1B (BIOS CHECKSUM)
	45	1FFF 70 3FFF 88 (BIOS CHECKSUM)
46	46
47		=> the 'leaked' DOS 3.10 Beta -for Rainbow- 'should not be used' on rigs with NEC V20. It possibly wasn't tested, but boots and runs well.
48		=> on the NEC, auto detection (of option RAM) fails with the original V20 patch (above, left)
49		Expect RAM related system crashes after swapping CPUs and altering physical RAM _afterwards_.
50		Hard coded CPU loops are to blame. Try values from the alternate patch (right).
51		=> AAD/AAM - Intel 8088 honors the second byte (operand), NEC V20 ignores it and always uses base 0Ah (10).
52		=> UNDOCUMENTED: NEC V20 does not have "POP CS" (opcode 0F). There are more differences (opcode D6; the 2 byte POP: 8F Cx; FF Fx instructions)
53		Commercial programs had to be patched back then (as was the case with Loderunner for PC).
54		=> NEW OPCODES: REPC, REPNC, CHKIND, PREPARE, DISPOSE; BCD string operations (ADD4S, CMP4S, SUB4S), bit-ops (NOT, SET, TEST, ROL4, ROR4)
55		WARNING: undoc'd opcodes, INS, EXT and 8080 behaviour are unemulated yet! MESS' CPU source has up-to-date info.
	47	=> the 'leaked' DOS 3.10 Beta -for Rainbow- 'should not be used' on rigs with NEC V20. It possibly wasn't tested, but boots and runs well.
	48	=> on the NEC, auto detection (of option RAM) fails with the original V20 patch (above, left)
	49	Expect RAM related system crashes after swapping CPUs and altering physical RAM _afterwards_.
	50	Hard coded CPU loops are to blame. Try values from the alternate patch (right).
	51	=> AAD/AAM - Intel 8088 honors the second byte (operand), NEC V20 ignores it and always uses base 0Ah (10).
	52	=> UNDOCUMENTED: NEC V20 does not have "POP CS" (opcode 0F). There are more differences (opcode D6; the 2 byte POP: 8F Cx; FF Fx instructions)
	53	Commercial programs had to be patched back then (as was the case with Loderunner for PC).
	54	=> NEW OPCODES: REPC, REPNC, CHKIND, PREPARE, DISPOSE; BCD string operations (ADD4S, CMP4S, SUB4S), bit-ops (NOT, SET, TEST, ROL4, ROR4)
	55	WARNING: undoc'd opcodes, INS, EXT and 8080 behaviour are unemulated yet! MESS' CPU source has up-to-date info.
56	56
57	57	Meaning of Diagnostics LEDs (from PC100ESV1.PDF found, e.g.,
58	58	on ftp://ftp.update.uu.se/pub/rainbow/doc/rainbow-docs/
r26736	r26737
138	138	\| ROM (4K) ...J7... \| ...J9 = RX50 \|
139	139	\|------------PCB# 5416206 / 5016205-01C1-------------\|
140	140	NOTES
141		W5 + W6 are out when 16K x 8 EPROMS are used
	141	W5 + W6 are out when 16K x 8 EPROMS are used
142	142	/ W5 + W6 installed => 32 K x 8 EPROMs (pin 27 = A14)
143	143
144	144	W13, W14, W15, W18 = for manufacturing tests.
r26736	r26737
146	146	=> W18 pulls DSR to ground and affects 8251A - port $11 (bit 7)
147	147
148	148	!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
149		!! DO NOT SHORT JUMPER / CONNECTOR [W90] ON LIVE HARDWARE !!
150		!! !!
	149	!! DO NOT SHORT JUMPER / CONNECTOR [W90] ON LIVE HARDWARE !!
	150	!! !!
151	151	!! WARNING: CIRCUIT DAMAGE could occur if this jumper is !!
152		!! set by end users. See PDF document AA-V523A-TV. !!
153		!! !!
154		!! W90 connects to pin 2 (Voltage Bias on PWR connector J8)!!
	152	!! set by end users. See PDF document AA-V523A-TV. !!
	153	!! !!
	154	!! W90 connects to pin 2 (Voltage Bias on PWR connector J8)!!
155	155	!! and is designed FOR ===> FACTORY TESTS OF THE PSU <=== !!
156	156	!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
157	157
r26736	r26737
161	161	****************************************************************************/
162	162
163	163	// Workarounds DO NOT APPLY to the 190-B ROM. Only enable when compiling the 'rainbow' driver -
164		//#define FORCE_RAINBOW_100_LOGO
165		#define KBD_DELAY 875 // (debounce delay). Recommended: 875.
	164	//#define FORCE_RAINBOW_100_LOGO
	165	#define KBD_DELAY 875 // (debounce delay). Recommended: 875.
166	166
167	167	#include "emu.h"
168	168	#include "cpu/i86/i86.h"
r26736	r26737
310	310
311	311
312	312	void rainbow_state::machine_start()
313		{
	313	{
314	314	m_image[0] = subdevice(FLOPPY_0);
315	315	m_image[1] = subdevice(FLOPPY_1);
316	316	m_image[2] = subdevice(FLOPPY_2);
r26736	r26737
329	329
330	330	UINT8 *rom = memregion("maincpu")->base();
331	331
332
	332
333	333	#ifdef FORCE_RAINBOW_100_LOGO
334		rom[0xf4174]=0xeb; // jmps RAINBOW100_LOGO__loc_33D
335		rom[0xf4175]=0x08;
	334	rom[0xf4174]=0xeb; // jmps RAINBOW100_LOGO__loc_33D
	335	rom[0xf4175]=0x08;
336	336
337		rom[0xf4000 + 0x364a]= 0x0a;
338		rom[0xf4384]=0xeb; // JMPS => BOOT80
	337	rom[0xf4000 + 0x364a]= 0x0a;
	338	rom[0xf4384]=0xeb; // JMPS => BOOT80
339	339	#endif
340	340
341	341	// Enables PORT90_W + PORT91_W via BIOS call (offset +$21 in HIGH ROM)
r26736	r26737
382	382	// - ED000 - ED0FF is the area the _DEC-100-B BIOS_ accesses - and checks.
383	383
384	384	// - Specs say that the CPU has direct access to volatile RAM only.
385		// So NVRAM is hidden now and loads & saves are triggered within the
	385	// So NVRAM is hidden now and loads & saves are triggered within the
386	386	// 'diagnostic_w' handler (similar to real hardware).
387	387
388		// - Address bits 8-12 are ignored (-> AM_MIRROR).
389		AM_RANGE(0xed000, 0xed0ff) AM_RAM AM_SHARE("vol_ram") AM_MIRROR(0x1f00)
390		AM_RANGE(0xed100, 0xed1ff) AM_RAM AM_SHARE("nvram")
	388	// - Address bits 8-12 are ignored (-> AM_MIRROR).
	389	AM_RANGE(0xed000, 0xed0ff) AM_RAM AM_SHARE("vol_ram") AM_MIRROR(0x1f00)
	390	AM_RANGE(0xed100, 0xed1ff) AM_RAM AM_SHARE("nvram")
391	391
392	392	AM_RANGE(0xee000, 0xeffff) AM_RAM AM_SHARE("p_ram")
393	393	AM_RANGE(0xf0000, 0xfffff) AM_ROM
r26736	r26737
410	410
411	411	AM_RANGE (0x0a, 0x0a) AM_READWRITE(diagnostic_r, diagnostic_w)
412	412
413		// 0x0C Video processor DC012
414		AM_RANGE (0x0c, 0x0c) AM_DEVWRITE("vt100_video", rainbow_video_device, dc012_w)
	413	// 0x0C Video processor DC012
	414	AM_RANGE (0x0c, 0x0c) AM_DEVWRITE("vt100_video", rainbow_video_device, dc012_w)
415	415
416	416	// TODO: unmapped [0e] : PRINTER BIT RATE REGISTER (WO)
417	417
r26736	r26737
420	420
421	421	// UNMAPPED:
422	422	// 0x20 - 0x2f ***** EXTENDED COMM. OPTION (option select 1)- for example:
423		// 0x27 (RESET EXTENDED COMM OPTION) - OUT 27 @ offset 1EA7
	423	// 0x27 (RESET EXTENDED COMM OPTION) - OUT 27 @ offset 1EA7
424	424
425	425	// 0x40 COMMUNICATIONS DATA REGISTER (MPSC)
426	426	// 0x41 PRINTER DATA REGISTER (MPSC)
r26736	r26737
428	428	// 0x43 PRINTER CONTROL / STATUS REGISTER (MPSC)
429	429
430	430	// 0x50 - 0xf ***** OPTIONAL COLOR GRAPHICS - for example:
431		// 0x50 (RESET_GRAPH. OPTION) - OUT 50 @ offsets F5EB5 + F5EB9
	431	// 0x50 (RESET_GRAPH. OPTION) - OUT 50 @ offsets F5EB5 + F5EB9
432	432
433	433	// ===========================================================
434		// TODO: hard disc emulation!
435		// ------ Rainbow uses 'WD 1010 AL' (Western Digital 1983)
436		// Register compatible to WD2010 (present in MESS)
437		// R/W REGISTERS 60 - 68 (?)
	434	// TODO: hard disc emulation!
	435	// ------ Rainbow uses 'WD 1010 AL' (Western Digital 1983)
	436	// Register compatible to WD2010 (present in MESS)
	437	// R/W REGISTERS 60 - 68 (?)
438	438	// ===========================================================
439	439	// HARD DISC SIZES AND LIMITS
440		// HARDWARE:
441		// Controller has a built-in limit of 8 heads / 1024 cylinders (67 MB). Standard geometry is 4 surfaces.
442		// SOFTWARE: the DEC boot loader (and FDISK from DOS 3.10) initially allowed a maximum hard disc size of 20 MB.
443		// - DOS 3 has a 1024 cylinder limit (32 MB).
444		// - the custom boot loader that comes with 'WUTIL 3.2' allows 117 MB and 8 surfaces.
	440	// HARDWARE:
	441	// Controller has a built-in limit of 8 heads / 1024 cylinders (67 MB). Standard geometry is 4 surfaces.
	442	// SOFTWARE: the DEC boot loader (and FDISK from DOS 3.10) initially allowed a maximum hard disc size of 20 MB.
	443	// - DOS 3 has a 1024 cylinder limit (32 MB).
	444	// - the custom boot loader that comes with 'WUTIL 3.2' allows 117 MB and 8 surfaces.
445	445	AM_RANGE (0x68, 0x68) AM_READ(hd_status_68_r)
446	446
447	447	AM_RANGE (0x90, 0x90) AM_WRITE(PORT90_W)
r26736	r26737
472	472	static INPUT_PORTS_START( rainbow100b_in )
473	473	/* DIP switches */
474	474	PORT_START("MONITOR TYPE")
475		PORT_DIPNAME( 0x03, 0x03, "MONOCHROME MONITOR")
	475	PORT_DIPNAME( 0x03, 0x03, "MONOCHROME MONITOR")
476	476	PORT_DIPSETTING( 0x01, "PAPER WHITE" )
477	477	PORT_DIPSETTING( 0x02, "GREEN" )
478	478	PORT_DIPSETTING( 0x03, "AMBER" )
r26736	r26737
516	516	PORT_DIPNAME( 0x08, 0x08, "W15 (FACTORY TEST C, LEAVE OFF)") PORT_TOGGLE
517	517	PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
518	518	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
519		// DSR = 1 when switch is OFF - see i8251.c (status_r)
	519	// DSR = 1 when switch is OFF - see i8251.c (status_r)
520	520	PORT_START("W18")
521		PORT_DIPNAME( 0x01, 0x00, "W18 (FACTORY TEST D, LEAVE OFF) (8251A: DSR)") PORT_TOGGLE
	521	PORT_DIPNAME( 0x01, 0x00, "W18 (FACTORY TEST D, LEAVE OFF) (8251A: DSR)") PORT_TOGGLE
522	522	PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
523	523	PORT_DIPSETTING( 0x01, DEF_STR( On ) )
524	524	PORT_WRITE_LINE_DEVICE_MEMBER("kbdser", i8251_device, write_dsr)
525	525
526		// J17 jumper on FDC controller board shifts drive select (experimental) -
527		PORT_START("FLOPPY CONTROLLER")
	526	// J17 jumper on FDC controller board shifts drive select (experimental) -
	527	PORT_START("FLOPPY CONTROLLER")
528	528	PORT_DIPNAME( 0x02, 0x00, "J17 DRIVE SELECT (A => C and B => D)") PORT_TOGGLE
529	529	PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
530	530	PORT_DIPSETTING( 0x02, DEF_STR( On ) )
531	531	INPUT_PORTS_END
532	532
533		// 800K native format (80 * 10). Also reads VT-180 disks and PC-DOS 360 k disks
	533	// 800K native format (80 * 10). Also reads VT-180 disks and PC-DOS 360 k disks
534	534	// ( both: 512 byte sectors, single sided, 9 sectors per track, 40 tracks )
535	535	static LEGACY_FLOPPY_OPTIONS_START( dec100_floppy )
536		LEGACY_FLOPPY_OPTION( dec100_floppy, "td0", "Teledisk floppy disk image", td0_dsk_identify, td0_dsk_construct, td0_dsk_destruct, NULL )
537		LEGACY_FLOPPY_OPTION( dec100_floppy, "img", "DEC Rainbow 100", basicdsk_identify_default, basicdsk_construct_default, NULL,
	536	LEGACY_FLOPPY_OPTION( dec100_floppy, "td0", "Teledisk floppy disk image", td0_dsk_identify, td0_dsk_construct, td0_dsk_destruct, NULL )
	537	LEGACY_FLOPPY_OPTION( dec100_floppy, "img", "DEC Rainbow 100", basicdsk_identify_default, basicdsk_construct_default, NULL,
538	538	HEADS([1])
539	539	TRACKS(40/[80])
540	540	SECTORS(9/[10])
r26736	r26737
543	543	FIRST_SECTOR_ID([1])
544	544	)
545	545	LEGACY_FLOPPY_OPTIONS_END
546
	546
547	547	void rainbow_state::machine_reset()
548	548	{
549	549	if (COLD_BOOT == 1)
r26736	r26737
595	595	m_crtc->palette_select( m_inp9->read() );
596	596
597	597	if ( m_SCREEN_BLANK )
598		m_crtc->video_blanking(bitmap, cliprect);
599		else
600		m_crtc->video_update(bitmap, cliprect);
	598	m_crtc->video_blanking(bitmap, cliprect);
	599	else
	600	m_crtc->video_update(bitmap, cliprect);
601	601	return 0;
602	602	}
603	603
r26736	r26737
606	606
607	607	// Unexpected low RAM sizes are an indication of option RAM (at worst: 128 K on board) failure.
608	608	// While motherboard errors often render the system unbootable, bad option RAM (> 128 K)
609		// can be narrowed down with the Diagnostic Disk and codes from the 'Pocket Service Guide'
	609	// can be narrowed down with the Diagnostic Disk and codes from the 'Pocket Service Guide'
610	610	// EK-PC100-PS-002 (APPENDIX B.2.2); pc100ps2.pdf
611	611	// ================================================================
612	612	// - Simulate floating bus for initial RAM detection -
613	613	// FIXME: code valid ONLY within ROM section F4Exxx.
614		//
	614	//
615	615	// NOTE: MS-DOS 2.x unfortunately probes RAM in a similar way.
616	616	// => SET OPTION RAM to 896 K for unknown applications (and DOS) <=
617	617	// ================================================================
r26736	r26737
619	619	{
620	620	int pc = space.device().safe_pc();
621	621
622		if ( ((pc & 0xFFF00) == 0xF4E00) &&
623		( m_maincpu->state_int(I8086_DS) >= m_inp8->read() )
624		)
	622	if ( ((pc & 0xFFF00) == 0xF4E00) &&
	623	( m_maincpu->state_int(I8086_DS) >= m_inp8->read() )
	624	)
625	625	{
626	626	return (offset>>16) + 2;
627		}
	627	}
628	628	else
629	629	return space.read_byte(offset);
630	630	}
r26736	r26737
694	694	// Until a full-blown hard-disc emulation evolves, deliver an error message:
695	695	READ8_MEMBER(rainbow_state::hd_status_68_r)
696	696	{
697		// Top 3 bits = status / error code
	697	// Top 3 bits = status / error code
698	698	// SEE -> W_INCHESTER__loc_80E
699	699
700	700	// return 0xa0; // A0 : OK, DRIVE IS READY (!)
701
	701
702	702	return 0xe0; // => 21 DRIVE NOT READY (BIOS; when W is pressed on boot screen)
703	703	}
704	704
r26736	r26737
712	712	( 1 means NOT present )
713	713	*/
714	714	// Hard coded value 0x2000 - see DIP switch setup!
715		return 0x0f - m_inp5->read()
716		- 0 // floppy is hard coded in emulator.
717		- m_inp7->read()
	715	return 0x0f - m_inp5->read()
	716	- 0 // floppy is hard coded in emulator.
	717	- m_inp7->read()
718	718	- ((m_inp8->read() > 0x2000) ? 8 : 0);
719	719	}
720	720
721	721	READ8_MEMBER(rainbow_state::comm_control_r)
722		{
723		/* [02] COMMUNICATIONS STATUS REGISTER - PAGE 154 (** READ ** )
724		Used to read status of SERIAL port, IRQ line of each CPU, and MHFU logic enable signal.
	722	{
	723	/* [02] COMMUNICATIONS STATUS REGISTER - PAGE 154 (** READ ** )
	724	Used to read status of SERIAL port, IRQ line of each CPU, and MHFU logic enable signal.
725	725
726	726	// What the specs says on how MHFU detection is disabled:
727		// 1. by first disabling interrupts with CLI
728		// 2. by writing 0x00 to port 0x10C (handled by 'dc012_w' in vtvideo)
729		// (3.) MHFU is re-enabled by writing to 0x0c (or automatically after STI - when under BIOS control ?)
730		*/
	727	// 1. by first disabling interrupts with CLI
	728	// 2. by writing 0x00 to port 0x10C (handled by 'dc012_w' in vtvideo)
	729	// (3.) MHFU is re-enabled by writing to 0x0c (or automatically after STI - when under BIOS control ?)
	730	*/
731	731	// During boot phase 2, do not consider MHFU ENABLE. Prevents ERROR 16.
732	732	int data;
733	733	if (COLD_BOOT == 2)
r26736	r26737
736	736	data = m_crtc->MHFU(1);
737	737
738	738	return ( ( (data > 0) ? 0x00 : 0x20) \|// (L): status of MHFU flag => bit pos.5
739		( (INT88) ? 0x00 : 0x40 ) \| // (L)
740		( (INTZ80) ? 0x00 : 0x80 ) // (L)
741		);
	739	( (INT88) ? 0x00 : 0x40 ) \| // (L)
	740	( (INTZ80) ? 0x00 : 0x80 ) // (L)
	741	);
742	742	}
743	743
744	744	WRITE8_MEMBER(rainbow_state::comm_control_w)
r26736	r26737
765	765
766	766	m_KBD = 0; // reset previous command.
767	767
768		if(MOTOR_DISABLE_counter == 0)
769		{
770
	768	if(MOTOR_DISABLE_counter == 0)
	769	{
771	770	if (data == LK_CMD_POWER_UP) { // Powerup (beep)
772	771	//m_beep->set_state(1);
773	772	//m_beep_counter=600; // BELL = 125 ms
r26736	r26737
800	799	m_KBD = data;
801	800	}
802	801
803		} // prevent beeps during disk load operations
	802	} // prevent beeps during disk load operations
804	803	}
805	804
806	805	WRITE8_MEMBER(rainbow_state::PORT91_W)
r26736	r26737
823	822
824	823	// NVRAM offet $A8 : BELL VOLUME (=> ENABLE BELL 0x23)
825	824	if ( (m_KBD == LK_CMD_BELL) \|\| (m_KBD == LK_CMD_ENB_BELL) ) /* BOTH sound or enable bell have a parameter */
826		{ /* max volume is 0, lowest is 0x7 */
827		// printf("\n%02x BELL CMD has bell volume = %02x\n", m_KBD, 8 - (data & 7));
	825	{ /* max volume is 0, lowest is 0x7 */
	826	// printf("\n%02x BELL CMD has bell volume = %02x\n", m_KBD, 8 - (data & 7));
828	827	m_KBD = 0; // reset previous command.
829	828	}
830	829
831	830	// NVRAM offet $A9 = KEYCLICK VOLUME (=> ENABLE CLK 0x1b)
832	831	// NVRAM offset $8C = KEYCLICK ENABLE / DISABLE (0/1)
833		if ( ( m_KBD == LK_CMD_ENB_KEYCLK ) \|\| ( m_KBD == LK_CMD_SOUND_CLK ) ) /* BOTH keyclick cmds have a parameter */
834		{ // max volume is 0, lowest is 0x7 - 87 (BELL VOL:1) and 80 (BELL VOL:8)
835		// printf("\n%02x CLICK CMD - keyclick volume = %02x\n", m_KBD, 8 - (data & 7));
	832	if ( ( m_KBD == LK_CMD_ENB_KEYCLK ) \|\| ( m_KBD == LK_CMD_SOUND_CLK ) ) /* BOTH keyclick cmds have a parameter */
	833	{ // max volume is 0, lowest is 0x7 - 87 (BELL VOL:1) and 80 (BELL VOL:8)
	834	// printf("\n%02x CLICK CMD - keyclick volume = %02x\n", m_KBD, 8 - (data & 7));
836	835	m_KBD = 0; // reset previous command.
837	836	}
838	837
839		if (m_KBD > 0)
	838	if (m_KBD > 0)
840	839	printf("UNHANDLED PARAM FOR MODE: %02x / KBD PARAM %02x to AH (91) \n", m_KBD, data);
841	840
842	841	}
r26736	r26737
846	845	// printf("Read %02x from 8088 mailbox\n", m_8088_mailbox);
847	846	m_i8088->set_input_line(INPUT_LINE_INT0, CLEAR_LINE);
848	847
849		INT88 = false; // BISLANG: INTZ80 = false; //
	848	INT88 = false; // BISLANG: INTZ80 = false; //
850	849	return m_8088_mailbox;
851	850	}
852	851
r26736	r26737
857	856	m_z80->set_input_line_and_vector(0, ASSERT_LINE, 0xf7);
858	857	m_z80_mailbox = data;
859	858
860		INTZ80 = true; //
	859	INTZ80 = true; //
861	860	}
862	861
863	862	// Z80 reads port 0x00
r26736	r26737
867	866	// printf("Read %02x from Z80 mailbox\n", m_z80_mailbox);
868	867	m_z80->set_input_line(0, CLEAR_LINE);
869	868
870		INTZ80 = false; // BISLANG: INT88 = false;
	869	INTZ80 = false; // BISLANG: INT88 = false;
871	870	return m_z80_mailbox;
872	871	}
873	872
r26736	r26737
879	878	m_i8088->set_input_line_and_vector(INPUT_LINE_INT0, ASSERT_LINE, 0x27);
880	879	m_8088_mailbox = data;
881	880
882		INT88 = true;
	881	INT88 = true;
883	882	}
884	883
885	884	// WRITE to 0x20
r26736	r26737
891	890	// (Z80) : PORT 21H _READ_
892	891	READ8_MEMBER(rainbow_state::z80_generalstat_r)
893	892	{
894		/*
	893	/*
895	894	General / diag.status register Z80 / see page 157 (table 4-18).
896	895
897	896	D7 : STEP L : reflects status of STEP signal _FROM FDC_
r26736	r26737
910	909	NOTES: ALL LOW ACTIVE - EXCEPT TR00
911	910	*/
912	911	// * TRACK 00 * signal for current drive
913		int tk00 = ( floppy_tk00_r( m_image[m_unit] ) == CLEAR_LINE ) ? 0x20 : 0x00;
	912	int tk00 = ( floppy_tk00_r( m_image[m_unit] ) == CLEAR_LINE ) ? 0x20 : 0x00;
914	913
915		int fdc_ready = floppy_drive_get_flag_state( m_image[m_unit] , FLOPPY_DRIVE_READY);
	914	int fdc_ready = floppy_drive_get_flag_state( m_image[m_unit] , FLOPPY_DRIVE_READY);
916	915
917	916	int data=( 0x80 \| // (STEP L)
918		// ( (fdc_write_gate) ) \|
919		( (tk00) ) \|
920		// ( fdc_direction) \|
921		( (fdc_ready)? 0x00 : 0x08 ) \|
922		( (INT88) ? 0x00 : 0x04 ) \|
923		( (INTZ80) ? 0x00 : 0x02 ) \|
924		( (m_zflip) ? 0x00 : 0x01 )
	917	// ( (fdc_write_gate) ) \|
	918	( (tk00) ) \|
	919	// ( fdc_direction) \|
	920	( (fdc_ready)? 0x00 : 0x08 ) \|
	921	( (INT88) ? 0x00 : 0x04 ) \|
	922	( (INTZ80) ? 0x00 : 0x02 ) \|
	923	( (m_zflip) ? 0x00 : 0x01 )
925	924	);
926
	925
927	926	return data;
928	927	}
929	928
r26736	r26737
945	944	// (Z80) : PORT 40H _READ_
946	945
947	946	// **********************************************************************
948		// POLARITY OF _DRQ_ AND _IRQ_ (depends on controller type!)
	947	// POLARITY OF _DRQ_ AND _IRQ_ (depends on controller type!)
949	948	// **********************************************************************
950	949	READ8_MEMBER(rainbow_state::z80_diskstatus_r)
951	950	{
952	951	static int last_track;
953	952	int track = wd17xx_track_r(m_fdc, space, 0);
954	953
955		if (track != last_track)
	954	if (track != last_track)
956	955	printf("\n%02d",track);
957	956	last_track = track;
958	957
r26736	r26737
960	959
961	960	// AND 00111011 - return what was WRITTEN to D5-D3, D1, D0 previously
962	961	// (except D7,D6,D2)
963		int data = m_z80_diskcontrol && 0x3b;
	962	int data = m_z80_diskcontrol && 0x3b;
964	963
965		// D7: DRQ: reflects status of DATA REQUEST signal from FDC.
	964	// D7: DRQ: reflects status of DATA REQUEST signal from FDC.
966	965	// '1' indicates that FDC has read data OR requires new write data.
967		data \|= wd17xx_drq_r(m_fdc) ? 0x80 : 0x00;
	966	data \|= wd17xx_drq_r(m_fdc) ? 0x80 : 0x00;
968	967
969		// D6: IRQ: indicates INTERRUPT REQUEST signal from FDC. Indicates that a
970		// status bit has changed. Set to 1 at the completion of any
	968	// D6: IRQ: indicates INTERRUPT REQUEST signal from FDC. Indicates that a
	969	// status bit has changed. Set to 1 at the completion of any
971	970	// command (.. see page 207 or 5-25).
972		data \|= wd17xx_intrq_r(m_fdc) ? 0x40 : 0x00;
	971	data \|= wd17xx_intrq_r(m_fdc) ? 0x40 : 0x00;
973	972
974		// D5: SIDE 0H: status of side select signal at J2 + J3 of RX50 controller.
975		// For 1 sided drives, this bit will always read low (0).
	973	// D5: SIDE 0H: status of side select signal at J2 + J3 of RX50 controller.
	974	// For 1 sided drives, this bit will always read low (0).
976	975
977	976	// D4: MOTOR 1 ON L: 0 = indicates MOTOR 1 ON bit is set in drive control reg.
978		// D3: MOTOR 0 ON L: 0 = indicates MOTOR 0 ON bit is set in drive "
	977	// D3: MOTOR 0 ON L: 0 = indicates MOTOR 0 ON bit is set in drive "
979	978
980	979	// D2: TG43 L : 0 = INDICATES TRACK > 43 SIGNAL FROM FDC TO DISK DRIVE.
981		data \|= ( track > 43) ? 0x00 : 0x04;
	980	data \|= ( track > 43) ? 0x00 : 0x04;
982	981
983	982	// D1: DS1 H: reflect status of bits 0 and 1 form disk.control reg.
984		// D0: DS0 H: "
985		return data;
	983	// D0: DS0 H: "
	984	return data;
986	985	}
987	986
988	987	// (Z80) : PORT 40H * WRITE *
r26736	r26737
1006	1005	int selected_drive = 255;
1007	1006
1008	1007	if (flopimg_get_image( floppy_get_device( machine(), drive ) ) != NULL)
1009		{ selected_drive = drive;
	1008	{ selected_drive = drive;
1010	1009	wd17xx_set_drive(m_fdc, selected_drive);
1011	1010	}
1012	1011
1013	1012	// WD emulation (wd17xx.c) will ignore 'side select' if set to WD1793.
1014	1013	// Is it safe to * always assume * single sided 400 K disks?
1015		wd17xx_set_side(m_fdc, (data & 20) ? 1 : 0);
	1014	wd17xx_set_side(m_fdc, (data & 20) ? 1 : 0);
1016	1015
1017	1016	wd17xx_dden_w(m_fdc, 0); /* SEE 'WRITE_TRACK' : 1 = SD; 0 = DD; enable double density */
1018	1017
1019		output_set_value("driveled0", (selected_drive == 0) ? 1 : 0 );
1020		output_set_value("driveled1", (selected_drive == 1) ? 1 : 0 );
	1018	output_set_value("driveled0", (selected_drive == 0) ? 1 : 0 );
	1019	output_set_value("driveled1", (selected_drive == 1) ? 1 : 0 );
1021	1020
1022		output_set_value("driveled2", (selected_drive == 2) ? 1 : 0 );
1023		output_set_value("driveled3", (selected_drive == 3) ? 1 : 0 );
	1021	output_set_value("driveled2", (selected_drive == 2) ? 1 : 0 );
	1022	output_set_value("driveled3", (selected_drive == 3) ? 1 : 0 );
1024	1023
1025		if (selected_drive < 4)
1026		{
1027		m_unit = selected_drive;
	1024	if (selected_drive < 4)
	1025	{
	1026	m_unit = selected_drive;
1028	1027
1029	1028	// MOTOR ON flags 1+2 proved to be unreliable in this context.
1030	1029	// So this timeout only disables LEDs.
r26736	r26737
1037	1036	floppy_mon_w(m_image[f_num], (f_num == selected_drive) ? CLEAR_LINE : ASSERT_LINE);
1038	1037
1039	1038	// Parameters: DRIVE, STATE, FLAG
1040		floppy_drive_set_ready_state( m_image[f_num],
1041		(f_num == selected_drive) ? 1 : 0,
1042		(f_num == selected_drive) ? force_ready : 0
	1039	floppy_drive_set_ready_state( m_image[f_num],
	1040	(f_num == selected_drive) ? 1 : 0,
	1041	(f_num == selected_drive) ? force_ready : 0
1043	1042	);
1044		}
	1043	}
1045	1044	}
1046	1045
1047		m_z80_diskcontrol = data;
	1046	m_z80_diskcontrol = data;
1048	1047	}
1049	1048
1050	1049	READ8_MEMBER( rainbow_state::read_video_ram_r )
r26736	r26737
1068	1067
1069	1068	return ( (m_diagnostic & (0xf1)) \| ( m_inp1->read() \|
1070	1069	m_inp2->read() \|
1071		m_inp3->read()
1072		)
	1070	m_inp3->read()
	1071	)
1073	1072	);
1074	1073	}
1075	1074
r26736	r26737
1078	1077	// printf("%02x to diag port (PC=%x)\n", data, space.device().safe_pc());
1079	1078	m_SCREEN_BLANK = (data & 2) ? false : true;
1080	1079
1081		// SAVE / PROGRAM NVM: transfer data from volatile memory to NVM
1082		if ( !(data & 0x40) && (m_diagnostic & 0x40) )
1083		memcpy( m_p_nvram, m_p_vol_ram, 256);
	1080	// SAVE / PROGRAM NVM: transfer data from volatile memory to NVM
	1081	if ( !(data & 0x40) && (m_diagnostic & 0x40) )
	1082	memcpy( m_p_nvram, m_p_vol_ram, 256);
1084	1083
1085		// READ / RECALL NVM: transfer data from NVM to volatile memory
1086		if ( (data & 0x80) && !(m_diagnostic & 0x80) )
	1084	// READ / RECALL NVM: transfer data from NVM to volatile memory
	1085	if ( (data & 0x80) && !(m_diagnostic & 0x80) )
1087	1086	memcpy( m_p_vol_ram, m_p_nvram, 256);
1088
	1087
1089	1088	if (!(data & 1))
1090	1089	{
1091	1090	m_z80->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
r26736	r26737
1100	1099	m_z80->reset();
1101	1100	}
1102	1101
1103		/* Page 197 or 5-13 of formatter description:
1104		ZRESET L : this low input from the 8088 diagnostic write register
1105		resets the formatter controller, loads 03H into the command register,
1106		and resets the not ready (status bit 7).
	1102	/* Page 197 or 5-13 of formatter description:
	1103	ZRESET L : this low input from the 8088 diagnostic write register
	1104	resets the formatter controller, loads 03H into the command register,
	1105	and resets the not ready (status bit 7).
1107	1106
1108		When ZRESET goes high (1), a restore command is executed regardless
1109		of the state of the ready signal from the diskette drive and
1110		01H is loaded into the sector register.
	1107	When ZRESET goes high (1), a restore command is executed regardless
	1108	of the state of the ready signal from the diskette drive and
	1109	01H is loaded into the sector register.
1111	1110	*/
1112
	1111
1113	1112	// reset device when going from high to low,
1114	1113	// restore command when going from low to high :
1115	1114	wd17xx_mr_w(m_fdc, (data & 1) ? 1 : 0);
r26736	r26737
1156	1155	m_kbd8251->transmit_clock();
1157	1156	m_kbd8251->receive_clock();
1158	1157
1159		if (MOTOR_DISABLE_counter)
	1158	if (MOTOR_DISABLE_counter)
1160	1159	MOTOR_DISABLE_counter--;
1161	1160
1162	1161	if (MOTOR_DISABLE_counter == 1)
r26736	r26737
1167	1166	output_set_value("driveled3", 0); // DRIVE 3 (D)
1168	1167	}
1169	1168
1170		if ( m_crtc->MHFU(1) ) // MHFU ENABLED ?
1171		{
1172		/* int data = m_crtc->MHFU(-1); // increment MHFU, return new value
	1169	if ( m_crtc->MHFU(1) ) // MHFU ENABLED ?
	1170	{
	1171	/* int data = m_crtc->MHFU(-1); // increment MHFU, return new value
1173	1172	// if (data > 480) ...
1174		// m_crtc->MHFU(-100);
1175		// machine().schedule_hard_reset(); // not exactly a proper watchdog reset
1176		*/
	1173	// m_crtc->MHFU(-100);
	1174	// machine().schedule_hard_reset(); // not exactly a proper watchdog reset
	1175	*/
1177	1176	}
1178	1177
1179	1178	if (m_beep_counter > 1)
r26736	r26737
1274	1273	MCFG_SOUND_ROUTE(ALL_OUTPUTS,"mono",0.50)
1275	1274
1276	1275	MCFG_FD1793_ADD("wd1793", rainbow_wd17xx_interface )
1277		MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(floppy_intf)
	1276	MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(floppy_intf)
1278	1277	MCFG_SOFTWARE_LIST_ADD("flop_list","rainbow")
1279	1278
1280	1279	MCFG_I8251_ADD("kbdser", i8251_intf)
r26736	r26737
1286	1285
1287	1286
1288	1287
1289		// ROM definition for 100-B
	1288	// ROM definition for 100-B
1290	1289	ROM_START( rainbow )
1291	1290	ROM_REGION(0x100000,"maincpu", 0)
1292	1291	ROM_LOAD( "23-022e5-00.bin", 0xf0000, 0x4000, CRC(9d1332b4) SHA1(736306d2a36bd44f95a39b36ebbab211cc8fea6e))
r26736	r26737
1304	1303	// 'Rainbow 190 B' (announced March 1985) is identical hardware with alternate ROM v5.05
1305	1304	// According to an article in Wall Street Journal, it came with a 10 MB HD and 640 K RAM.
1306	1305
1307		// We have no version history. The BOOT 2.4 README reveals 'recent ROM changes for MASS 11'
1308		// in January 1985. These were not contained in the older version 04.03.11 (for PC-100-A)
	1306	// We have no version history. The BOOT 2.4 README reveals 'recent ROM changes for MASS 11'
	1307	// in January 1985. These were not contained in the older version 04.03.11 (for PC-100-A)
1309	1308	// and also not present in version 05.03 (from PC-100B / PC100B+).
1310	1309
1311	1310	// A first glance:
r26736	r26737
1316	1315	ROM_REGION(0x100000,"maincpu", 0)
1317	1316	ROM_LOAD( "dec190rom0.bin", 0xf0000, 0x4000, CRC(FAC191D2) )
1318	1317	ROM_RELOAD(0xf4000,0x4000)
1319		ROM_LOAD( "dec190rom1.bin", 0xf8000, 0x4000, CRC(5CE59632) )
	1318	ROM_LOAD( "dec190rom1.bin", 0xf8000, 0x4000, CRC(5CE59632) )
1320	1319
1321	1320	ROM_RELOAD(0xfc000,0x4000)
1322	1321	ROM_REGION(0x1000, "chargen", 0)
r26736	r26737
1327	1326
1328	1327	/* YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS */
1329	1328	COMP( 1983, rainbow , 0 , 0, rainbow, rainbow100b_in, driver_device, 0, "Digital Equipment Corporation", "Rainbow 100-B", GAME_NOT_WORKING \| GAME_IMPERFECT_COLORS)
1330		COMP( 1985, rainb190, rainbow, 0, rainbow, rainbow100b_in, driver_device, 0, "Digital Equipment Corporation", "Rainbow 190-B", GAME_NOT_WORKING \| GAME_IMPERFECT_COLORS)
		No newline at end of file
	1329	COMP( 1985, rainb190, rainbow, 0, rainbow, rainbow100b_in, driver_device, 0, "Digital Equipment Corporation", "Rainbow 190-B", GAME_NOT_WORKING \| GAME_IMPERFECT_COLORS)

trunk/src/mess/drivers/isbc.c
r26736	r26737
360	360	ROM_REGION( 0x20000, "user1", ROMREGION_ERASEFF )
361	361	ROM_LOAD16_BYTE( "u79.bin", 0x00001, 0x10000, CRC(144182ea) SHA1(4620ca205a6ac98fe2636183eaead7c4bfaf7a72))
362	362	ROM_LOAD16_BYTE( "u36.bin", 0x00000, 0x10000, CRC(22db075f) SHA1(fd29ea77f5fc0697c8f8b66aca549aad5b9db3ea))
363		// ROM_REGION( 0x4000, "isbc215", ROMREGION_ERASEFF )
364		// ROM_LOAD16_BYTE( "174581.001.bin", 0x0000, 0x2000, CRC(ccdbc7ab) SHA1(5c2ebdde1b0252124177221ba9cacdb6d925a24d))
365		// ROM_LOAD16_BYTE( "174581.002.bin", 0x0001, 0x2000, CRC(6190fa67) SHA1(295dd4e75f699aaf93227cc4876cee8accae383a))
	363	// ROM_REGION( 0x4000, "isbc215", ROMREGION_ERASEFF )
	364	// ROM_LOAD16_BYTE( "174581.001.bin", 0x0000, 0x2000, CRC(ccdbc7ab) SHA1(5c2ebdde1b0252124177221ba9cacdb6d925a24d))
	365	// ROM_LOAD16_BYTE( "174581.002.bin", 0x0001, 0x2000, CRC(6190fa67) SHA1(295dd4e75f699aaf93227cc4876cee8accae383a))
366	366	ROM_END
367	367
368	368	ROM_START( isbc2861 )

trunk/src/mess/drivers/sh4robot.c
r26736	r26737
1	1	/***************************************************************************
2
	2
3	3	SH4 Robot
4	4
5		http://perso.telecom-paristech.fr/~polti/robot/
6
	5	http://perso.telecom-paristech.fr/~polti/robot/
	6
7	7	27/11/2013 Skeleton driver.
8	8
9
10		0x0000 0000 - 0x7FFF FFFF : P0 area, cachable
11		0x8000 0000 - 0x9FFF FFFF : P1 area, cachable
12		0xA000 0000 - 0xBFFF FFFF : P2 area, non-cachable
13		0xC000 0000 - 0xDFFF FFFF : P3 area, cachable
14		0xE000 0000 - 0xFFFF FFFF : P4 area, non-cachable
15	9
16
17		0x0000 0000 - 0x03FF FFFF : Area 0 (boot, ROM)
18		0x0400 0000 - 0x07FF FFFF : Area 1 (FPGA)
19		0x0800 0000 - 0x08FF FFFF : Area 2 (SDRAM 1, 16M)
20		0x0C00 0000 - 0x0CFF FFFF : Area 3 (SDRAM 2, 16M)
21		0x1000 0000 - 0x13FF FFFF : Area 4 (FPGA)
22		0x1400 0000 - 0x17FF FFFF : Area 5 (FPGA)
23		0x1800 0000 - 0x1BFF FFFF : Area 6 (FPGA)
24		0x1C00 0000 - 0x1FFF FFFF : Area 7 (reserved)
25
	10	0x0000 0000 - 0x7FFF FFFF : P0 area, cachable
	11	0x8000 0000 - 0x9FFF FFFF : P1 area, cachable
	12	0xA000 0000 - 0xBFFF FFFF : P2 area, non-cachable
	13	0xC000 0000 - 0xDFFF FFFF : P3 area, cachable
	14	0xE000 0000 - 0xFFFF FFFF : P4 area, non-cachable
	15
	16
	17	0x0000 0000 - 0x03FF FFFF : Area 0 (boot, ROM)
	18	0x0400 0000 - 0x07FF FFFF : Area 1 (FPGA)
	19	0x0800 0000 - 0x08FF FFFF : Area 2 (SDRAM 1, 16M)
	20	0x0C00 0000 - 0x0CFF FFFF : Area 3 (SDRAM 2, 16M)
	21	0x1000 0000 - 0x13FF FFFF : Area 4 (FPGA)
	22	0x1400 0000 - 0x17FF FFFF : Area 5 (FPGA)
	23	0x1800 0000 - 0x1BFF FFFF : Area 6 (FPGA)
	24	0x1C00 0000 - 0x1FFF FFFF : Area 7 (reserved)
	25
26	26	****************************************************************************/
27	27
28	28	#include "emu.h"
r26736	r26737
57	57	static const struct sh4_config sh4cpu_config = { 1, 0, 1, 0, 0, 0, 1, 1, 0, 200000000 };
58	58
59	59	static MACHINE_CONFIG_START( sh4robot, sh4robot_state )
60		/* basic machine hardware */
61		MCFG_CPU_ADD("maincpu", SH4LE, 200000000) // SH7750
	60	/* basic machine hardware */
	61	MCFG_CPU_ADD("maincpu", SH4LE, 200000000) // SH7750
62	62	MCFG_CPU_CONFIG(sh4cpu_config)
63		MCFG_CPU_PROGRAM_MAP(sh4robot_mem)
	63	MCFG_CPU_PROGRAM_MAP(sh4robot_mem)
64	64	MCFG_CPU_IO_MAP(sh4robot_io)
65
	65
66	66	MACHINE_CONFIG_END
67	67
68	68	/* ROM definition */
69	69	ROM_START( sh4robot )
70		ROM_REGION( 0x1000, "maincpu", ROMREGION_ERASEFF )
71		ROM_LOAD( "bootloader.bin", 0x0000, 0x0882, CRC(d2ea0b7d) SHA1(7dd566c5e325d1ce1156a0bcbd7e10d011e9d35f))
72
	70	ROM_REGION( 0x1000, "maincpu", ROMREGION_ERASEFF )
	71	ROM_LOAD( "bootloader.bin", 0x0000, 0x0882, CRC(d2ea0b7d) SHA1(7dd566c5e325d1ce1156a0bcbd7e10d011e9d35f))
	72
73	73	// FLASH TC58128AFT
74	74	// flash blocks 1 till 199 (132512 till 19932512)
75		//ROM_LOAD( "vmlinux-nand_img_with_oob-2.6.10-v1.0", 0x0000, 0x149be0, CRC(eec69ef5) SHA1(524e26d2c2c28061911f4726646b18596d134736))
	75	//ROM_LOAD( "vmlinux-nand_img_with_oob-2.6.10-v1.0", 0x0000, 0x149be0, CRC(eec69ef5) SHA1(524e26d2c2c28061911f4726646b18596d134736))
76	76	// Root FS at flash blocks from 201 till end (20132512)
77	77	//ROM_LOAD( "shix-linux-v1.0.yaffs", 0x0000, 0x7e9e40, CRC(7a7fdb04) SHA1(0b761e2d179335398399cb046de4e591157cb72f))
78	78	ROM_END
r26736	r26737
80	80	/* Driver */
81	81
82	82	/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT CONFIG COMPANY FULLNAME FLAGS */
83		COMP( ????, sh4robot, 0, 0, sh4robot, sh4robot, driver_device, 0, "", "Robot", GAME_NOT_WORKING \| GAME_NO_SOUND)
		No newline at end of file
	83	COMP( ????, sh4robot, 0, 0, sh4robot, sh4robot, driver_device, 0, "", "Robot", GAME_NOT_WORKING \| GAME_NO_SOUND)

trunk/src/mess/drivers/xavix.c
r26736	r26737
2	2	// copyright-holders: ?
3	3	/***************************************************************************
4	4
5		Skeleton driver for XaviX TV PNP console and childs (Let's! Play TV Classic)
	5	Skeleton driver for XaviX TV PNP console and childs (Let's! Play TV Classic)
6	6
7		CPU is M6502 derivative, almost likely to be a G65816
	7	CPU is M6502 derivative, almost likely to be a G65816
8	8
9		TODO:
10		- understand how to map ROM at 0x800000-0x9fffff / 0xc00000 / 0xdfffff
11		banks (granted that we have the ROM for that, of course)
	9	TODO:
	10	- understand how to map ROM at 0x800000-0x9fffff / 0xc00000 / 0xdfffff
	11	banks (granted that we have the ROM for that, of course)
12	12
13	13	***************************************************************************/
14	14

trunk/src/mess/drivers/esqasr.c
r26736	r26737
8	8	CPU: 68302 MCU
9	9	Sound: ES5506
10	10	Effects: ES5510
11		FDC: NEC uPD72069
12		DUART: 2681
13
	11	FDC: NEC uPD72069
	12	DUART: 2681
	13
14	14	Memory map:
15	15	0x000000-0x03ffff OS ROM
16	16	0xfb0000-0xfcffff OS RAM
17
18
	17
	18
19	19	ASR-X hardware:
20		CPU: 68340 MCU
	20	CPU: 68340 MCU
21	21	Sound: ES5506
22	22	Effects: ES5511
23		FDC: NEC uPD72069
24
25		http://www.gweep.net/~shifty/music/asrxhack/
26
	23	FDC: NEC uPD72069
	24
	25	http://www.gweep.net/~shifty/music/asrxhack/
	26
27	27	Memory map:
28	28	0x00000000-0x000fffff OS ROM
29	29	0x00800000-0x008000ff ESP2 5511?
30	30	0x00f00000-0x00f007ff Unknown
31	31	0x08000000-0x08200000 RAM
32	32	0x0be00000-0x0befffff RAM (size unknown)
33
	33
34	34	These may want to be separated when they run more.
35
	35
36	36	***************************************************************************/
37	37
38	38	#include "emu.h"
r26736	r26737
99	99	};
100	100
101	101	static MACHINE_CONFIG_START( asr, esqasr_state )
102		MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz) // actually MC68302
	102	MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz) // actually MC68302
103	103	MCFG_CPU_PROGRAM_MAP(asr_map)
104	104
105	105	MCFG_CPU_ADD("esp", ES5510, XTAL_10MHz)
r26736	r26737
115	115	MACHINE_CONFIG_END
116	116
117	117	static MACHINE_CONFIG_START( asrx, esqasr_state )
118		MCFG_CPU_ADD("maincpu", M68020, XTAL_16MHz) // unknown, possibly 68340?
	118	MCFG_CPU_ADD("maincpu", M68020, XTAL_16MHz) // unknown, possibly 68340?
119	119	MCFG_CPU_PROGRAM_MAP(asrx_map)
120	120
121	121	MCFG_CPU_ADD("esp", ES5510, XTAL_10MHz)
r26736	r26737
135	135
136	136	ROM_START( asr10 )
137	137	ROM_REGION(0x100000, "maincpu", 0)
138		ROM_LOAD16_BYTE( "asr-648c-lo-1.5b.bin", 0x000001, 0x020000, CRC(8e437843) SHA1(418f042acbc5323f5b59cbbd71fdc8b2d851f7d0) )
139		ROM_LOAD16_BYTE( "asr-65e0-hi-1.5b.bin", 0x000000, 0x020000, CRC(b37cd3b6) SHA1(c4371848428a628b5e5a50e99be602d7abfc7904) )
	138	ROM_LOAD16_BYTE( "asr-648c-lo-1.5b.bin", 0x000001, 0x020000, CRC(8e437843) SHA1(418f042acbc5323f5b59cbbd71fdc8b2d851f7d0) )
	139	ROM_LOAD16_BYTE( "asr-65e0-hi-1.5b.bin", 0x000000, 0x020000, CRC(b37cd3b6) SHA1(c4371848428a628b5e5a50e99be602d7abfc7904) )
140	140
141	141	ROM_REGION(0x200000, "waverom", ROMREGION_ERASE00)
142	142	ROM_REGION(0x200000, "waverom2", ROMREGION_ERASE00)
r26736	r26737
146	146
147	147	ROM_START( asrx )
148	148	ROM_REGION(0x100000, "maincpu", 0)
149		ROM_LOAD16_BYTE( "asr267lo.bin", 0x000001, 0x080000, CRC(7408d441) SHA1(0113f84b6d224bf1423ad62c173f32a0c95ca715) )
150		ROM_LOAD16_BYTE( "asr267hi.bin", 0x000000, 0x080000, CRC(7df14ea7) SHA1(895b99013c0f924edb52612eb93c3e6babb9f053) )
	149	ROM_LOAD16_BYTE( "asr267lo.bin", 0x000001, 0x080000, CRC(7408d441) SHA1(0113f84b6d224bf1423ad62c173f32a0c95ca715) )
	150	ROM_LOAD16_BYTE( "asr267hi.bin", 0x000000, 0x080000, CRC(7df14ea7) SHA1(895b99013c0f924edb52612eb93c3e6babb9f053) )
151	151
152	152	ROM_REGION(0x200000, "waverom", ROMREGION_ERASE00)
153	153	ROM_REGION(0x200000, "waverom2", ROMREGION_ERASE00)

trunk/src/mess/drivers/next.c
r26736	r26737
966	966	// devices
967	967	MCFG_NSCSI_BUS_ADD("scsibus")
968	968	MCFG_MCCS1850_ADD("rtc", XTAL_32_768kHz,
969		line_cb_t(), line_cb_t(), line_cb_t())
	969	line_cb_t(), line_cb_t(), line_cb_t())
970	970	MCFG_SCC8530_ADD("scc", XTAL_25MHz, line_cb_t(FUNC(next_state::scc_irq), static_cast<next_state *>(owner)))
971	971	MCFG_NEXTKBD_ADD("keyboard",
972	972	line_cb_t(FUNC(next_state::keyboard_irq), static_cast<next_state *>(owner)),

trunk/src/mess/drivers/tiki100.c
r26736	r26737
14	14
15	15	TODO:
16	16
17		- 3 expansion slots
	17	- 3 expansion slots
18	18	- palette RAM should be written during HBLANK
19	19	- DART clocks
20	20	- winchester hard disk
r26736	r26737
240	240	AM_RANGE(0x17, 0x17) AM_DEVREADWRITE(AY8912_TAG, ay8910_device, data_r, data_w)
241	241	AM_RANGE(0x18, 0x1b) AM_DEVREADWRITE(Z80CTC_TAG, z80ctc_device, read, write)
242	242	AM_RANGE(0x1c, 0x1c) AM_MIRROR(0x03) AM_WRITE(system_w)
243		// AM_RANGE(0x20, 0x27) AM_NOP // winchester controller
	243	// AM_RANGE(0x20, 0x27) AM_NOP // winchester controller
244	244	// AM_RANGE(0x60, 0x6f) analog I/O (SINTEF)
245	245	// AM_RANGE(0x60, 0x67) digital I/O (RVO)
246	246	// AM_RANGE(0x70, 0x77) analog/digital I/O
r26736	r26737
491	491	READ8_MEMBER( tiki100_state::pio_pb_r )
492	492	{
493	493	/*
494
	494
495	495	bit description
496
497		0
498		1
499		2
500		3
	496
	497	0
	498	1
	499	2
	500	3
501	501	4 ACK
502	502	5 BUSY
503	503	6 NO PAPER
504	504	7 UNIT SELECT, tape in
505
	505
506	506	*/
507	507
508	508	UINT8 data = 0;
r26736	r26737
521	521	WRITE8_MEMBER( tiki100_state::pio_pb_w )
522	522	{
523	523	/*
524
	524
525	525	bit description
526
	526
527	527	0 STRB
528		1
529		2
530		3
531		4
532		5
	528	1
	529	2
	530	3
	531	4
	532	5
533	533	6 tape out
534		7
535
	534	7
	535
536	536	*/
537	537
538	538	// centronics

trunk/src/mess/drivers/itt3030.c
r26736	r26737
2	2
3	3	ITT 3030
4	4
5
6		ToDo:
7		- Check Beeper
8		- finish hooking up keyboard
9		- According to the manual, the keyboard is based on a 8278 ... it's nowhere to be found. The keyboard / video card has a 8741 instead of which a ROM dump exists
10		- serial port
11		- daisy chain
12		- ...
13
14	5
15		CPU Board, all ICs shown:
16
17		\|-----------------------------------------------------------------\|
18		\| \|
19		\| 74LS640N Z80_Combo 74LS138N \|
20		\| 74LS00N \|
21		\| 74LS240N 74LS74AN \|
22		\| 74LS00N \|
23		\|C 74LS240N Z80_CPU 74LS240N C\|
24		\|N 74LS74AN N\|
25		\|1 74LS241N 74LS240N 2\|
26		\| ROM_1 74LS20N 74LS38N \|
27		\| 74LS240N 74LS240N \|
28		\| 74LS04N 74LS02N \|
29		\| 74LS138N 74LS74AN \|
30		\| 74LS175N \|
31		\| 75154N 74LS156N 74LS00N \|
32		\| 74LS123N \|
33		\| 75150P 75150P 74LS175N X1 74LS00N 74LS132N \|
34		\|-----------------------------------------------------------------\|
35
36		Z80_Combo: Mostek MK3886 Z80 Combo Chip, Serial, Timer, 256 bytes RAM, Interrupt Controller
37		Z80_CPU: Zilog Z80A CPU
38		ROM_1: NEC D2716D marked "BOOTV1.2"
39		X1: Crystal 4,194 MHz
40		CN1: Bus Connector
41		CN2: Memory Board Connector
42
	6	ToDo:
	7	- Check Beeper
	8	- finish hooking up keyboard
	9	- According to the manual, the keyboard is based on a 8278 ... it's nowhere to be found. The keyboard / video card has a 8741 instead of which a ROM dump exists
	10	- serial port
	11	- daisy chain
	12	- ...
	13
	14
	15	CPU Board, all ICs shown:
	16
	17	\|-----------------------------------------------------------------\|
	18	\| \|
	19	\| 74LS640N Z80_Combo 74LS138N \|
	20	\| 74LS00N \|
	21	\| 74LS240N 74LS74AN \|
	22	\| 74LS00N \|
	23	\|C 74LS240N Z80_CPU 74LS240N C\|
	24	\|N 74LS74AN N\|
	25	\|1 74LS241N 74LS240N 2\|
	26	\| ROM_1 74LS20N 74LS38N \|
	27	\| 74LS240N 74LS240N \|
	28	\| 74LS04N 74LS02N \|
	29	\| 74LS138N 74LS74AN \|
	30	\| 74LS175N \|
	31	\| 75154N 74LS156N 74LS00N \|
	32	\| 74LS123N \|
	33	\| 75150P 75150P 74LS175N X1 74LS00N 74LS132N \|
	34	\|-----------------------------------------------------------------\|
	35
	36	Z80_Combo: Mostek MK3886 Z80 Combo Chip, Serial, Timer, 256 bytes RAM, Interrupt Controller
	37	Z80_CPU: Zilog Z80A CPU
	38	ROM_1: NEC D2716D marked "BOOTV1.2"
	39	X1: Crystal 4,194 MHz
	40	CN1: Bus Connector
	41	CN2: Memory Board Connector
	42
43	43	----------------------------------------------------------------------------------
44
45		Video / Keyboard Combination board, all ICs shown:
46
47		\|-----------------------------------------------------------------\|
48		\| \|
49		\| X1 74276N MCU_1 74LS85N \|
50		\| \|
51		\| 74LS138N 74LS240 74LS240N \|
52		\| 75LS257AN 74LS166AN \|
53		\| 74LS08N 74LS85N 74LS241N \|
54		\| 75LS257AN ROM_1 C\|
55		\| 74LS132N 74LS32N 74LS240N N\|
56		\| 75LS257AN 1\|
57		\| 74LS10N 74LS08N 74LS240N \|
58		\| 75LS257AN RAM_1 \|
59		\| 74LS163AN 74LS173AN 74LS374N \|
60		\| \|
61		\| 74LS86N 74LS240N 74LS640N \|
62		\| Video_1 \|
63		\| 74LS74AN 74LS240N 74LS640N \|
64		\|-----------------------------------------------------------------\|
65
66		X1: Crystal 6 MHz
67		MCU_1: NEC D8741AD marked "V1.1 3030"
68		ROM_1: MBM 2716 marked "GB 136-0"
69		RAM_1: NEC D4016D
70		Video_1 Video-IC SND5027E, compatible with TMS9927
71	44
	45	Video / Keyboard Combination board, all ICs shown:
	46
	47	\|-----------------------------------------------------------------\|
	48	\| \|
	49	\| X1 74276N MCU_1 74LS85N \|
	50	\| \|
	51	\| 74LS138N 74LS240 74LS240N \|
	52	\| 75LS257AN 74LS166AN \|
	53	\| 74LS08N 74LS85N 74LS241N \|
	54	\| 75LS257AN ROM_1 C\|
	55	\| 74LS132N 74LS32N 74LS240N N\|
	56	\| 75LS257AN 1\|
	57	\| 74LS10N 74LS08N 74LS240N \|
	58	\| 75LS257AN RAM_1 \|
	59	\| 74LS163AN 74LS173AN 74LS374N \|
	60	\| \|
	61	\| 74LS86N 74LS240N 74LS640N \|
	62	\| Video_1 \|
	63	\| 74LS74AN 74LS240N 74LS640N \|
	64	\|-----------------------------------------------------------------\|
	65
	66	X1: Crystal 6 MHz
	67	MCU_1: NEC D8741AD marked "V1.1 3030"
	68	ROM_1: MBM 2716 marked "GB 136-0"
	69	RAM_1: NEC D4016D
	70	Video_1 Video-IC SND5027E, compatible with TMS9927
	71
72	72	----------------------------------------------------------------------------------
73
74		Floppy Controller board, all ICs shown
75	73
76		\|-----------------------------------------------------------------\|
77		\| \|
	74	Floppy Controller board, all ICs shown
	75
	76	\|-----------------------------------------------------------------\|
	77	\| \|
78	78	\| X1 74LS51N F 74LS74AN 74LS02N MC4044P \|
79	79	\| D 567 \|
80	80	\| 74LS04N C 74LS00N 74LS01N ::: MC4024P \|
81		\| \|
82		\| 74LS00N 1 74LS74AN 74LS74AN 74LS14N C\|
	81	\| \|
	82	\| 74LS00N 1 74LS74AN 74LS74AN 74LS14N C\|
83	83	\| 7 N\|
84	84	\| 74LS240N 9 74LS161N 74LS393N 74LS74AN 1\|
85	85	\| 1 \|
r26736	r26737
88	88	\| 74LS123N 74LS04N 74LS163N 74LS14N 74LS241N \|
89	89	\| \|
90	90	\| 74LS393N 74LS138 74LS175N 74LS85N 74LS645N \|
91		\| \|
92		\|-----------------------------------------------------------------\|
93
94		X1: Crystal 8 MHz
95		FDC: Siemens SAB1791-02P
96		567: Jumper Pad (emtpy)
	91	\| \|
	92	\|-----------------------------------------------------------------\|
97	93
	94	X1: Crystal 8 MHz
	95	FDC: Siemens SAB1791-02P
	96	567: Jumper Pad (emtpy)
	97
98	98	----------------------------------------------------------------------------------
99
100		256K RAM board, all ICs shown:
101
102		\|-----------------------------------------------------------------\|
103		\| \|
104		\| HM4864P HM4864P HM4864P HM4864P 74LS245N \|
105		\| \|
106		\| HM4864P HM4864P HM4864P HM4864P P 74LS14N \|
107		\| R \|
108		\| HM4864P HM4864P HM4864P HM4864P M 74LS00N \|
109		\| C\|
110		\| HM4864P HM4864P HM4864P HM4864P AM A N\|
111		\| 29 M 1\|
112		\| HM4864P HM4864P HM4864P HM4864P 66 2 \|
113		\| PC 9 \|
114		\| HM4864P HM4864P HM4864P HM4864P 6 \|
115		\| AM 4 \|
116		\| HM4864P HM4864P HM4864P HM4864P 29 8 \|
117		\| 66 P \|
118		\| HM4864P HM4864P HM4864P HM4864P PC C \|
119		\| SN7474N \|
120		\|-----------------------------------------------------------------\|
121
122		PRM: N82S129F 1K Bipolar PROM
123		AM2966PC: Octal Dynamic Memory Drivers with Three-State Outputs
124		AM29648PC
125		CN1: Connector to CN2 of Z80 CPU card
126
	99
	100	256K RAM board, all ICs shown:
	101
	102	\|-----------------------------------------------------------------\|
	103	\| \|
	104	\| HM4864P HM4864P HM4864P HM4864P 74LS245N \|
	105	\| \|
	106	\| HM4864P HM4864P HM4864P HM4864P P 74LS14N \|
	107	\| R \|
	108	\| HM4864P HM4864P HM4864P HM4864P M 74LS00N \|
	109	\| C\|
	110	\| HM4864P HM4864P HM4864P HM4864P AM A N\|
	111	\| 29 M 1\|
	112	\| HM4864P HM4864P HM4864P HM4864P 66 2 \|
	113	\| PC 9 \|
	114	\| HM4864P HM4864P HM4864P HM4864P 6 \|
	115	\| AM 4 \|
	116	\| HM4864P HM4864P HM4864P HM4864P 29 8 \|
	117	\| 66 P \|
	118	\| HM4864P HM4864P HM4864P HM4864P PC C \|
	119	\| SN7474N \|
	120	\|-----------------------------------------------------------------\|
	121
	122	PRM: N82S129F 1K Bipolar PROM
	123	AM2966PC: Octal Dynamic Memory Drivers with Three-State Outputs
	124	AM29648PC
	125	CN1: Connector to CN2 of Z80 CPU card
	126
127	127	----------------------------------------------------------------------------------
128
129		Parallel I/O board, all ICs shown:
130
131		\|-------------------------------------\| \|
132		\| \|
133		\| 74 74 \|
134		\| LS LS Z80A PIO \|
135		\| 00 14 \|
136		\| N N \|
137		\| \|
138		\| \|
139		\| 74 74 74 74 D4 74 \|
140		\| LS LS LS LS I3 LS \|
141		\| 13 14 24 85 P2 64 \|
142		\| 2N N 1N N 1 0N \|
143		\| \|
	128
	129	Parallel I/O board, all ICs shown:
	130
	131	\|-------------------------------------\| \|
	132	\| \|
	133	\| 74 74 \|
	134	\| LS LS Z80A PIO \|
	135	\| 00 14 \|
	136	\| N N \|
	137	\| \|
	138	\| \|
	139	\| 74 74 74 74 D4 74 \|
	140	\| LS LS LS LS I3 LS \|
	141	\| 13 14 24 85 P2 64 \|
	142	\| 2N N 1N N 1 0N \|
	143	\| \|
144	144	\| CN1 \|
145		\| \|
146		\| 74LS00N \|
147		\|-------------------------------------\|
	145	\| \|
	146	\| 74LS00N \|
	147	\|-------------------------------------\|
148	148
149		CN1: Bus connector
150		DIP: 4x DIP current setting: off-on-on-off, sets the address for the parallel port
151
	149	CN1: Bus connector
	150	DIP: 4x DIP current setting: off-on-on-off, sets the address for the parallel port
	151
152	152	----------------------------------------------------------------------------------
153	153
154	154	Beeper Circuit, all ICs shown:
155	155
156		\|---------------------------\| \|
157		\| \|
158		\| BEEP 74LS132N \|
159		\| R1 \|
	156	\|---------------------------\| \|
	157	\| \|
	158	\| BEEP 74LS132N \|
	159	\| R1 \|
160	160	\| 74LS14N \|
161	161	\| \|
162	162	\| 74LS132N 74LS193N \|
163		\| \|
164		\| 74LS74AN 74LS165N \|
165		\| CN1 \|
166		\|---------------------------\|
167
168		CN1: Connector to mainboard
169		R1: looks like a potentiometer
170		BEEP: Beeper ... touted in the manual as "Hupe" ... i.e. "horn" :)
171
	163	\| \|
	164	\| 74LS74AN 74LS165N \|
	165	\| CN1 \|
	166	\|---------------------------\|
	167
	168	CN1: Connector to mainboard
	169	R1: looks like a potentiometer
	170	BEEP: Beeper ... touted in the manual as "Hupe" ... i.e. "horn" :)
	171
172	172	----------------------------------------------------------------------------------
173
174		Other boards and extensions mentioned in the manual:
175		- S100 bus adapter board
176		- IEEE 488 bus adapter board
177		- 64K memory board
178		- 8086 CPU board
179		- external harddisk
180		- TV adapter B/W (TV, Save/Load from Audio Cassette) with PROM/RAM/BASIC-Module with 16K or 32K RAM
181		- TV adapter color with connection to Video / Keyboard combination card
182		- Monitor adapters B/W and color
183		- Video / Keyboard interface 2 with grayscale, 8 colors, loadable character set, blinking
184		- Graphics Adapter with 16 colours, hi-res 512x256 pixels
185		- RTC
186		- Arithmetics chip
187
	173
	174	Other boards and extensions mentioned in the manual:
	175	- S100 bus adapter board
	176	- IEEE 488 bus adapter board
	177	- 64K memory board
	178	- 8086 CPU board
	179	- external harddisk
	180	- TV adapter B/W (TV, Save/Load from Audio Cassette) with PROM/RAM/BASIC-Module with 16K or 32K RAM
	181	- TV adapter color with connection to Video / Keyboard combination card
	182	- Monitor adapters B/W and color
	183	- Video / Keyboard interface 2 with grayscale, 8 colors, loadable character set, blinking
	184	- Graphics Adapter with 16 colours, hi-res 512x256 pixels
	185	- RTC
	186	- Arithmetics chip
	187
188	188	***************************************************************************/
189	189
190	190
r26736	r26737
194	194	#include "machine/bankdev.h"
195	195	#include "machine/ram.h"
196	196	#include "formats/itt3030_dsk.h"
197		#include "video/tms9927.h" //Display hardware
	197	#include "video/tms9927.h" //Display hardware
198	198	#include "sound/beep.h"
199		#include "cpu/mcs48/mcs48.h" //Keyboard MCU ... talks to the 8278 on the keyboard circuit
	199	#include "cpu/mcs48/mcs48.h" //Keyboard MCU ... talks to the 8278 on the keyboard circuit
200	200
201	201
202	202	#define MAIN_CLOCK XTAL_4.194MHz
r26736	r26737
291	291
292	292	if (machine().primary_screen->vblank())
293	293	{
294		ret \|= 0xc0; // set both bits 6 and 7 if vblank
	294	ret \|= 0xc0; // set both bits 6 and 7 if vblank
295	295	}
296	296
297	297	if (machine().primary_screen->hblank())
298	298	{
299		ret \|= 0x80; // set only bit 7 if hblank
	299	ret \|= 0x80; // set only bit 7 if hblank
300	300	}
301	301
302	302	return ret;
r26736	r26737
317	317	int bank = 0;
318	318	m_bank = data>>4;
319	319
320		if (m_bank & 1) // bank 8
	320	if (m_bank & 1) // bank 8
321	321	{
322	322	bank = 8;
323	323	}
324	324	else
325	325	{
326		bank = m_bank >> 1;
	326	bank = m_bank >> 1;
327	327	}
328	328
329		// printf("bank_w: new value %02x, m_bank %x, bank %x\n", data, m_bank, bank);
	329	// printf("bank_w: new value %02x, m_bank %x, bank %x\n", data, m_bank, bank);
330	330
331	331	m_48kbank->set_bank(bank);
332	332	}
r26736	r26737
376	376	ADDRESS_MAP_END
377	377
378	378	static ADDRESS_MAP_START( lower48_map, AS_PROGRAM, 8, itt3030_state )
379		AM_RANGE(0x00000, 0x7ffff) AM_READWRITE(bankl_r, bankl_w) // pages 0-7
	379	AM_RANGE(0x00000, 0x7ffff) AM_READWRITE(bankl_r, bankl_w) // pages 0-7
380	380	AM_RANGE(0x80000, 0x807ff) AM_ROM AM_REGION("maincpu", 0) // begin "page 8"
381	381	AM_RANGE(0x80800, 0x80fff) AM_ROM AM_REGION("maincpu", 0)
382		AM_RANGE(0x81000, 0x810ff) AM_RAM AM_MIRROR(0x100) // only 256 bytes, but ROM also clears 11xx?
	382	AM_RANGE(0x81000, 0x810ff) AM_RAM AM_MIRROR(0x100) // only 256 bytes, but ROM also clears 11xx?
383	383	AM_RANGE(0x83000, 0x83fff) AM_RAM AM_SHARE("vram")
384	384	ADDRESS_MAP_END
385	385
r26736	r26737
396	396
397	397	READ8_MEMBER(itt3030_state::kbd_fifo_r)
398	398	{
399		return m_kbdmcu->upi41_master_r(space, 0); // offset 0 is data, 1 is status
	399	return m_kbdmcu->upi41_master_r(space, 0); // offset 0 is data, 1 is status
400	400	}
401	401
402	402	READ8_MEMBER(itt3030_state::kbd_matrix_r)
r26736	r26737
407	407	WRITE8_MEMBER(itt3030_state::kbd_matrix_w)
408	408	{
409	409	ioport_port *ports[16] = { m_keyrow1, m_keyrow2, m_keyrow3, m_keyrow4, m_keyrow5, m_keyrow6, m_keyrow7, m_keyrow8, m_keyrow9,
410		m_keyrow10, m_keyrow11, m_keyrow12, m_keyrow13, m_keyrow14, m_keyrow15, m_keyrow16 };
	410	m_keyrow10, m_keyrow11, m_keyrow12, m_keyrow13, m_keyrow14, m_keyrow15, m_keyrow16 };
411	411	int col_masks[8] = { 1, 2, 4, 8, 0x10, 0x20, 0x40, 0x80 };
412	412	int tmp_read;
413	413
r26736	r26737
424	424	}
425	425
426	426	// Schematics say:
427		// Port 1 goes to the keyboard matrix.
	427	// Port 1 goes to the keyboard matrix.
428	428	// bits 0-3 select matrix rows, bits 4-6 choose column to read, bit 7 clocks the process (rising edge strobes the row, falling edge reads the data)
429	429	// T0 is the key matrix return
430	430	// Port 2 bit 2 is shown as "IRQ" on the schematics, and the code does a lot with it as well (debug?)
r26736	r26737
451	451
452	452	PORT_START("ROW3")
453	453	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2))
454		PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') // actually UK pound symbol
	454	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') // actually UK pound symbol
455	455	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
456	456	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
457	457	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
r26736	r26737
499	499	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR(';')
500	500
501	501	PORT_START("ROW10")
502		PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_F9)
	502	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_F9)
503	503	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('=')
504	504	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
505	505	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
506	506	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR(':')
507	507
508	508	PORT_START("ROW11")
509		PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_F10)
	509	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(UTF8_RIGHT) PORT_CODE(KEYCODE_F10)
510	510	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('@') PORT_CHAR('?')
511	511	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('<') PORT_CHAR('>')
512	512	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR('[') PORT_CHAR('{')
513	513	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('-') PORT_CHAR('`')
514	514
515	515	PORT_START("ROW12")
516		PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Esc") PORT_CODE(KEYCODE_F11) PORT_CHAR(27)
	516	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Esc") PORT_CODE(KEYCODE_F11) PORT_CHAR(27)
517	517	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('/') PORT_CHAR('\\')
518	518	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('+') PORT_CHAR('*')
519	519	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(']') PORT_CHAR('}')
r26736	r26737
523	523	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("(R)") PORT_CODE(KEYCODE_F12) PORT_CHAR('=')
524	524	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('~')
525	525	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
526		PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_CHAR('^') // PC doesn't have 3 keys to the right of L, so we sub DEL for the 3rd one
	526	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_CHAR('^') // PC doesn't have 3 keys to the right of L, so we sub DEL for the 3rd one
527	527	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
528	528
529	529	PORT_START("ROW14")
530		PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("(CL)") PORT_CODE(KEYCODE_F13) PORT_CHAR(4) // produces control-D always
	530	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("(CL)") PORT_CODE(KEYCODE_F13) PORT_CHAR(4) // produces control-D always
531	531	PORT_BIT(0x001e, IP_ACTIVE_HIGH, IPT_UNUSED)
532	532
533	533	PORT_START("ROW15")
r26736	r26737
563	563	save_item(NAME(m_kbdclk));
564	564	save_item(NAME(m_kbdread));
565	565
566		m_kbdclk = 0; // must be initialized here b/c mcs48_reset() causes write of 0xff to all ports
	566	m_kbdclk = 0; // must be initialized here b/c mcs48_reset() causes write of 0xff to all ports
567	567	}
568	568
569	569	void itt3030_state::machine_reset()
r26736	r26737
576	576	}
577	577
578	578	FLOPPY_FORMATS_MEMBER( itt3030_state::itt3030_floppy_formats )
579		FLOPPY_ITT3030_FORMAT
	579	FLOPPY_ITT3030_FORMAT
580	580	FLOPPY_FORMATS_END
581	581
582	582
r26736	r26737
587	587
588	588	static struct tms9927_interface crtc_intf =
589	589	{
590		16, // pixels per video memory address
591		NULL // "self-load data"?
	590	16, // pixels per video memory address
	591	NULL // "self-load data"?
592	592	};
593	593
594	594	static MACHINE_CONFIG_START( itt3030, itt3030_state )
r26736	r26737
608	608	MCFG_SCREEN_UPDATE_DRIVER(itt3030_state, screen_update)
609	609	MCFG_SCREEN_SIZE(808, 2416)
610	610	MCFG_SCREEN_VISIBLE_AREA(0, 808-1, 0, 2416-1)
611
	611
612	612	/* devices */
613	613	MCFG_DEVICE_ADD("lowerbank", ADDRESS_MAP_BANK, 0)
614	614	MCFG_DEVICE_PROGRAM_MAP(lower48_map)
r26736	r26737
635	635	MCFG_SPEAKER_STANDARD_MONO( "mono" )
636	636	MCFG_SOUND_ADD( "beeper", BEEP, 0 )
637	637	MCFG_SOUND_ROUTE( ALL_OUTPUTS, "mono", 1.00 )
638
	638
639	639	MACHINE_CONFIG_END
640	640
641	641
r26736	r26737
655	655	ROM_END
656	656
657	657	GAME( 1982, itt3030, 0, itt3030, itt3030, driver_device, 0, ROT0, "ITT RFA", "ITT3030", GAME_NOT_WORKING \| GAME_NO_SOUND )
658

199869 Revisions