trunk/src/emu/dislot.h
| r26657 | r26658 | |
| 23 | 23 | #define MCFG_DEVICE_CARD_DEFAULT_BIOS(_option, _default_bios) MCFG_SLOT_OPTION_DEFAULT_BIOS(_option, _default_bios) |
| 24 | 24 | #define MCFG_DEVICE_CARD_MACHINE_CONFIG(_option, _machine_config_name) MCFG_SLOT_OPTION_MACHINE_CONFIG(_option, _machine_config_name) |
| 25 | 25 | #define MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS(_option, _dev_inp_def) MCFG_SLOT_OPTION_DEVICE_INPUT_DEFAULTS(_option, _dev_inp_def) |
| 26 | | #define MCFG_DEVICE_CARD_CONFIG(_option, _config) MCFG_SLOT_OPTION_CONFIG(_option, _config) |
| 27 | 26 | #define MCFG_DEVICE_CARD_CLOCK(_option, _clock) MCFG_SLOT_OPTION_CLOCK(_option, _clock) |
| 28 | 27 | |
| 29 | 28 | |
| r26657 | r26658 | |
| 55 | 54 | #define MCFG_SLOT_OPTION_DEVICE_INPUT_DEFAULTS(_option, _dev_inp_def) \ |
| 56 | 55 | device_slot_interface::static_set_option_device_input_defaults(*device, _option, DEVICE_INPUT_DEFAULTS_NAME(_dev_inp_def)); |
| 57 | 56 | |
| 58 | | #define MCFG_SLOT_OPTION_CONFIG(_option, _config) \ |
| 59 | | device_slot_interface::static_set_option_config(*device, _option, _config); |
| 60 | | |
| 61 | 57 | #define MCFG_SLOT_OPTION_CLOCK(_option, _clock) \ |
| 62 | 58 | device_slot_interface::static_set_option_clock(*device, _option, _clock); |
| 63 | 59 | |
| r26657 | r26658 | |
| 83 | 79 | const char *default_bios() const { return m_default_bios; } |
| 84 | 80 | machine_config_constructor machine_config() const { return m_machine_config; } |
| 85 | 81 | const input_device_default *input_device_defaults() const { return m_input_device_defaults; } |
| 86 | | const void *static_config() const { return m_config; } |
| 87 | 82 | UINT32 clock() const { return m_clock; } |
| 88 | 83 | |
| 89 | 84 | private: |
| r26657 | r26658 | |
| 95 | 90 | const char *m_default_bios; |
| 96 | 91 | machine_config_constructor m_machine_config; |
| 97 | 92 | const input_device_default *m_input_device_defaults; |
| 98 | | const void *m_config; |
| 99 | 93 | UINT32 m_clock; |
| 100 | 94 | }; |
| 101 | 95 | |
| r26657 | r26658 | |
| 117 | 111 | static void static_set_option_default_bios(device_t &device, const char *option, const char *default_bios) { static_option(device, option)->m_default_bios = default_bios; } |
| 118 | 112 | static void static_set_option_machine_config(device_t &device, const char *option, const machine_config_constructor machine_config) { static_option(device, option)->m_machine_config = machine_config; } |
| 119 | 113 | static void static_set_option_device_input_defaults(device_t &device, const char *option, const input_device_default *default_input) { static_option(device, option)->m_input_device_defaults = default_input; } |
| 120 | | static void static_set_option_config(device_t &device, const char *option, const void *config) { static_option(device, option)->m_config = config; } |
| 121 | 114 | static void static_set_option_clock(device_t &device, const char *option, UINT32 default_clock) { static_option(device, option)->m_clock = default_clock; } |
| 122 | 115 | const bool fixed() const { return m_fixed; } |
| 123 | 116 | const char *default_option() const { return m_default_option; } |
trunk/src/mess/machine/mpc105.c
| r26657 | r26658 | |
| 30 | 30 | mpc105_device::mpc105_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 31 | 31 | : device_t(mconfig, MPC105, "MPC105", tag, owner, clock, "mpc105", __FILE__), |
| 32 | 32 | pci_device_interface( mconfig, *this ), |
| 33 | | m_maincpu(NULL) |
| 33 | m_cpu_tag(NULL), |
| 34 | m_bank_base_default(0) |
| 34 | 35 | { |
| 35 | 36 | } |
| 36 | 37 | |
| r26657 | r26658 | |
| 40 | 41 | |
| 41 | 42 | void mpc105_device::device_start() |
| 42 | 43 | { |
| 43 | | m_maincpu = machine().device<cpu_device>(m_cputag); |
| 44 | m_maincpu = machine().device<cpu_device>(m_cpu_tag); |
| 44 | 45 | } |
| 45 | 46 | |
| 46 | 47 | //------------------------------------------------- |
| r26657 | r26658 | |
| 55 | 56 | } |
| 56 | 57 | |
| 57 | 58 | //------------------------------------------------- |
| 58 | | // device_config_complete - perform any |
| 59 | | // operations now that the configuration is |
| 60 | | // complete |
| 61 | | //------------------------------------------------- |
| 62 | | |
| 63 | | void mpc105_device::device_config_complete() |
| 64 | | { |
| 65 | | // inherit a copy of the static data |
| 66 | | const mpc105_interface *intf = reinterpret_cast<const mpc105_interface *>(static_config()); |
| 67 | | if (intf != NULL) |
| 68 | | { |
| 69 | | *static_cast<mpc105_interface *>(this) = *intf; |
| 70 | | } |
| 71 | | |
| 72 | | // or initialize to defaults if none provided |
| 73 | | else |
| 74 | | { |
| 75 | | memset(&m_cputag, 0, sizeof(m_cputag)); |
| 76 | | m_bank_base_default = 0; |
| 77 | | |
| 78 | | } |
| 79 | | } |
| 80 | | |
| 81 | | //------------------------------------------------- |
| 82 | 59 | // update_memory - MMU update |
| 83 | 60 | //------------------------------------------------- |
| 84 | 61 | |
trunk/src/mess/machine/mpc105.h
| r26657 | r26658 | |
| 13 | 13 | |
| 14 | 14 | #define MPC105_MEMORYBANK_COUNT 8 |
| 15 | 15 | |
| 16 | | // ======================> mpc105_interface |
| 16 | #define MCFG_MPC105_CPU( _tag ) \ |
| 17 | mpc105_device::static_set_cpu(*device, _tag); |
| 17 | 18 | |
| 18 | | struct mpc105_interface |
| 19 | | { |
| 20 | | const char *m_cputag; |
| 21 | | int m_bank_base_default; |
| 22 | | }; |
| 19 | #define MCFG_MPC105_BANK_BASE_DEFAULT( bank_base_default ) \ |
| 20 | mpc105_device::static_set_bank_base_default(*device, bank_base_default); |
| 23 | 21 | |
| 24 | 22 | // ======================> mpc105_device |
| 25 | 23 | |
| 26 | 24 | class mpc105_device : public device_t, |
| 27 | | public pci_device_interface, |
| 28 | | public mpc105_interface |
| 25 | public pci_device_interface |
| 29 | 26 | { |
| 30 | 27 | public: |
| 31 | 28 | // construction/destruction |
| 32 | 29 | mpc105_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 33 | 30 | |
| 31 | static void static_set_cpu(device_t &device, const char *tag) { dynamic_cast<mpc105_device &>(device).m_cpu_tag = tag; } |
| 32 | static void static_set_bank_base_default(device_t &device, int bank_base_default) { dynamic_cast<mpc105_device &>(device).m_bank_base_default = bank_base_default; } |
| 33 | |
| 34 | 34 | virtual UINT32 pci_read(pci_bus_device *pcibus, int function, int offset, UINT32 mem_mask); |
| 35 | 35 | virtual void pci_write(pci_bus_device *pcibus, int function, int offset, UINT32 data, UINT32 mem_mask); |
| 36 | 36 | |
| r26657 | r26658 | |
| 38 | 38 | // device-level overrides |
| 39 | 39 | virtual void device_start(); |
| 40 | 40 | virtual void device_reset(); |
| 41 | | virtual void device_config_complete(); |
| 42 | 41 | |
| 43 | 42 | void update_memory(); |
| 44 | 43 | |
| 45 | 44 | private: |
| 45 | const char *m_cpu_tag; |
| 46 | int m_bank_base_default; |
| 46 | 47 | int m_bank_base; |
| 47 | 48 | UINT8 m_bank_enable; |
| 48 | 49 | UINT32 m_bank_registers[8]; |
trunk/src/mess/machine/i82439tx.c
| r26657 | r26658 | |
| 15 | 15 | |
| 16 | 16 | |
| 17 | 17 | i82439tx_device::i82439tx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 18 | | : northbridge_device(mconfig, I82439TX, "Intel 82439TX", tag, owner, clock, "i82439tx", __FILE__), |
| 19 | | pci_device_interface( mconfig, *this ) |
| 18 | : northbridge_device(mconfig, I82439TX, "Intel 82439TX", tag, owner, clock, "i82439tx", __FILE__), |
| 19 | pci_device_interface( mconfig, *this ), |
| 20 | m_cpu_tag( NULL ), |
| 21 | m_region_tag( NULL ) |
| 20 | 22 | { |
| 21 | 23 | } |
| 22 | 24 | |
| r26657 | r26658 | |
| 251 | 253 | } |
| 252 | 254 | } |
| 253 | 255 | |
| 254 | | |
| 255 | 256 | //------------------------------------------------- |
| 256 | | // device_config_complete - perform any |
| 257 | | // operations now that the configuration is |
| 258 | | // complete |
| 259 | | //------------------------------------------------- |
| 260 | | |
| 261 | | void i82439tx_device::device_config_complete() |
| 262 | | { |
| 263 | | // inherit a copy of the static data |
| 264 | | const i82439tx_interface *intf = reinterpret_cast<const i82439tx_interface *>(static_config()); |
| 265 | | if (intf != NULL) |
| 266 | | { |
| 267 | | *static_cast<i82439tx_interface *>(this) = *intf; |
| 268 | | } |
| 269 | | |
| 270 | | // or initialize to defaults if none provided |
| 271 | | else |
| 272 | | { |
| 273 | | memset(&m_cputag, 0, sizeof(m_cputag)); |
| 274 | | memset(&m_rom_region, 0, sizeof(m_rom_region)); |
| 275 | | } |
| 276 | | } |
| 277 | | |
| 278 | | //------------------------------------------------- |
| 279 | 257 | // device_start - device-specific startup |
| 280 | 258 | //------------------------------------------------- |
| 281 | 259 | |
| r26657 | r26658 | |
| 283 | 261 | { |
| 284 | 262 | northbridge_device::device_start(); |
| 285 | 263 | /* get address space we are working on */ |
| 286 | | device_t *cpu = machine().device(m_cputag); |
| 264 | device_t *cpu = machine().device(m_cpu_tag); |
| 287 | 265 | assert(cpu != NULL); |
| 288 | 266 | |
| 289 | 267 | m_space = &cpu->memory().space(AS_PROGRAM); |
| 290 | 268 | |
| 291 | 269 | /* get rom region */ |
| 292 | | m_rom = machine().root_device().memregion(m_rom_region)->base(); |
| 270 | m_rom = machine().root_device().memregion(m_region_tag)->base(); |
| 293 | 271 | |
| 294 | 272 | /* setup save states */ |
| 295 | 273 | save_item(NAME(m_regs)); |
trunk/src/mess/machine/i82439tx.h
| r26657 | r26658 | |
| 12 | 12 | #include "machine/pci.h" |
| 13 | 13 | #include "machine/northbridge.h" |
| 14 | 14 | |
| 15 | | // ======================> i82439tx_interface |
| 15 | #define MCFG_I82439TX_CPU( _tag ) \ |
| 16 | i82439tx_device::static_set_cpu(*device, _tag); |
| 16 | 17 | |
| 17 | | struct i82439tx_interface |
| 18 | | { |
| 19 | | const char *m_cputag; |
| 20 | | const char *m_rom_region; |
| 21 | | }; |
| 18 | #define MCFG_I82439TX_REGION( _tag ) \ |
| 19 | i82439tx_device::static_set_region(*device, _tag); |
| 22 | 20 | |
| 23 | 21 | // ======================> i82439tx_device |
| 24 | 22 | |
| 25 | 23 | class i82439tx_device : public northbridge_device, |
| 26 | | public pci_device_interface, |
| 27 | | public i82439tx_interface |
| 24 | public pci_device_interface |
| 28 | 25 | { |
| 29 | 26 | public: |
| 30 | 27 | // construction/destruction |
| 31 | 28 | i82439tx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 32 | 29 | |
| 30 | static void static_set_cpu(device_t &device, const char *tag) { dynamic_cast<i82439tx_device &>(device).m_cpu_tag = tag; } |
| 31 | static void static_set_region(device_t &device, const char *tag) { dynamic_cast<i82439tx_device &>(device).m_region_tag = tag; } |
| 32 | |
| 33 | 33 | virtual UINT32 pci_read(pci_bus_device *pcibus, int function, int offset, UINT32 mem_mask); |
| 34 | 34 | virtual void pci_write(pci_bus_device *pcibus, int function, int offset, UINT32 data, UINT32 mem_mask); |
| 35 | 35 | |
| r26657 | r26658 | |
| 37 | 37 | // device-level overrides |
| 38 | 38 | virtual void device_start(); |
| 39 | 39 | virtual void device_reset(); |
| 40 | | virtual void device_config_complete(); |
| 41 | 40 | |
| 42 | 41 | void i82439tx_configure_memory(UINT8 val, offs_t begin, offs_t end); |
| 43 | 42 | |
| 44 | 43 | private: |
| 44 | const char *m_cpu_tag; |
| 45 | const char *m_region_tag; |
| 46 | |
| 45 | 47 | address_space *m_space; |
| 46 | 48 | UINT8 *m_rom; |
| 47 | 49 | |
| 48 | 50 | UINT32 m_regs[8]; |
| 49 | 51 | UINT32 m_bios_ram[0x40000 / 4]; |
| 50 | | |
| 51 | 52 | }; |
| 52 | 53 | |
| 53 | 54 | // device type definition |
trunk/src/mess/drivers/at.c
| r26657 | r26658 | |
| 601 | 601 | MACHINE_CONFIG_END |
| 602 | 602 | |
| 603 | 603 | |
| 604 | | const struct i82439tx_interface tx_config = |
| 605 | | { |
| 606 | | "maincpu", |
| 607 | | "isa" |
| 608 | | }; |
| 604 | static MACHINE_CONFIG_FRAGMENT( tx_config ) |
| 605 | MCFG_I82439TX_CPU( "maincpu" ) |
| 606 | MCFG_I82439TX_REGION( "isa" ) |
| 607 | MACHINE_CONFIG_END |
| 609 | 608 | |
| 610 | 609 | static SLOT_INTERFACE_START( pci_devices ) |
| 611 | 610 | SLOT_INTERFACE_INTERNAL("i82439tx", I82439TX) |
| r26657 | r26658 | |
| 625 | 624 | |
| 626 | 625 | MCFG_PCI_BUS_ADD("pcibus", 0) |
| 627 | 626 | MCFG_PCI_BUS_DEVICE("pcibus:0", pci_devices, "i82439tx", true) |
| 628 | | MCFG_DEVICE_CARD_CONFIG("i82439tx", &tx_config) |
| 627 | MCFG_SLOT_OPTION_MACHINE_CONFIG("i82439tx", tx_config) |
| 629 | 628 | |
| 630 | 629 | MCFG_PCI_BUS_DEVICE("pcibus:1", pci_devices, "i82371ab", true) |
| 631 | 630 | |
| r26657 | r26658 | |
| 648 | 647 | |
| 649 | 648 | MCFG_PCI_BUS_ADD("pcibus", 0) |
| 650 | 649 | MCFG_PCI_BUS_DEVICE("pcibus:0", pci_devices, "i82439tx", true) |
| 651 | | MCFG_DEVICE_CARD_CONFIG("i82439tx", &tx_config) |
| 650 | MCFG_SLOT_OPTION_MACHINE_CONFIG("i82439tx", tx_config) |
| 652 | 651 | |
| 653 | 652 | MCFG_PCI_BUS_DEVICE("pcibus:1", pci_devices, "i82371sb", true) |
| 654 | 653 | |
trunk/src/mess/drivers/bebox.c
| r26657 | r26658 | |
| 137 | 137 | SLOT_INTERFACE( "35hd", FLOPPY_35_HD ) |
| 138 | 138 | SLOT_INTERFACE_END |
| 139 | 139 | |
| 140 | | const struct mpc105_interface mpc105_config = |
| 141 | | { |
| 142 | | "ppc1", |
| 143 | | 0 |
| 144 | | }; |
| 140 | static MACHINE_CONFIG_FRAGMENT( mpc105_config ) |
| 141 | MCFG_MPC105_CPU( "ppc1" ) |
| 142 | MCFG_MPC105_BANK_BASE_DEFAULT( 0 ) |
| 143 | MACHINE_CONFIG_END |
| 145 | 144 | |
| 146 | 145 | |
| 147 | 146 | /************************************* |
| r26657 | r26658 | |
| 224 | 223 | /* pci */ |
| 225 | 224 | MCFG_PCI_BUS_ADD("pcibus", 0) |
| 226 | 225 | MCFG_PCI_BUS_DEVICE("pcibus:0", pci_devices, "mpc105", true) |
| 227 | | MCFG_DEVICE_CARD_CONFIG("mpc105", &mpc105_config) |
| 226 | MCFG_SLOT_OPTION_MACHINE_CONFIG("mpc105", mpc105_config) |
| 228 | 227 | |
| 229 | 228 | MCFG_PCI_BUS_DEVICE("pcibus:1", pci_devices, "cirrus", true) |
| 230 | 229 | |