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r26523 Saturday 7th December, 2013 at 03:41:43 UTC by Barry Rodewald
wicat: added the VIA, RTC and the 7 UARTs.
[src/mess/drivers]wicat.c

trunk/src/mess/drivers/wicat.c
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1111#include "emu.h"
1212#include "cpu/m68000/m68000.h"
1313#include "machine/terminal.h"
14#include "machine/6522via.h"
15#include "machine/mm58274c.h"
16#include "machine/mc2661.h"
1417#include "wicat.lh"
1518
1619class wicat_state : public driver_device
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2124//      , m_p_base(*this, "rambase")
2225      , m_maincpu(*this, "maincpu")
2326      , m_terminal(*this, TERMINAL_TAG)
27      , m_rtc(*this, "rtc")
28      , m_uart0(*this,"uart0")
29      , m_uart1(*this,"uart1")
30      , m_uart2(*this,"uart2")
31      , m_uart3(*this,"uart3")
32      , m_uart4(*this,"uart4")
33      , m_uart5(*this,"uart5")
34      , m_uart6(*this,"uart6")
2435   { }
2536
26   DECLARE_WRITE8_MEMBER(kbd_put);
37   //DECLARE_WRITE8_MEMBER(kbd_put);
2738   DECLARE_READ16_MEMBER(invalid_r);
2839   DECLARE_WRITE16_MEMBER(invalid_w);
2940   DECLARE_WRITE16_MEMBER(serial_w);
3041   DECLARE_WRITE16_MEMBER(parallel_led_w);
42   DECLARE_READ8_MEMBER(via_a_r);
43   DECLARE_READ8_MEMBER(via_b_r);
44   DECLARE_WRITE8_MEMBER(via_a_w);
45   DECLARE_WRITE8_MEMBER(via_b_w);
3146private:
3247   UINT8 m_term_data;
3348   virtual void machine_start();
3449   virtual void machine_reset();
3550//   required_shared_ptr<UINT16> m_p_base;
3651   required_device<cpu_device> m_maincpu;
37   required_device<generic_terminal_device> m_terminal;
52   required_device<serial_terminal_device> m_terminal;
53   required_device<mm58274c_device> m_rtc;
54   required_device<mc2661_device> m_uart0;
55   required_device<mc2661_device> m_uart1;
56   required_device<mc2661_device> m_uart2;
57   required_device<mc2661_device> m_uart3;
58   required_device<mc2661_device> m_uart4;
59   required_device<mc2661_device> m_uart5;
60   required_device<mc2661_device> m_uart6;
61
62   UINT8 m_portA;
63   UINT8 m_portB;
3864};
3965
4066
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4470//   AM_RANGE(0x000000, 0x01efff) AM_RAM AM_SHARE("rambase")
4571   AM_RANGE(0x000000, 0x001fff) AM_ROM AM_REGION("c2", 0x0000)
4672   AM_RANGE(0x020000, 0x1fffff) AM_RAM
47   AM_RANGE(0x200000, 0x3fffff) AM_RAM
48   AM_RANGE(0x400000, 0xdfffff) AM_READWRITE(invalid_r,invalid_w)
49   AM_RANGE(0xeff800, 0xefffff) AM_RAM  // memory mapping SRAM, used during boot sequence for the stack (TODO)
50   AM_RANGE(0xf00000, 0xf0002f) AM_WRITE(serial_w)  // UARTs
73   AM_RANGE(0x200000, 0x2fffff) AM_RAM
74   AM_RANGE(0x300000, 0xdfffff) AM_READWRITE(invalid_r,invalid_w)
75   AM_RANGE(0xeff800, 0xeffbff) AM_RAM  // memory mapping SRAM, used during boot sequence for the stack (TODO)
76   AM_RANGE(0xf00000, 0xf00007) AM_DEVREADWRITE8("uart0",mc2661_device,read,write,0xff00)  // UARTs
77   AM_RANGE(0xf00008, 0xf0000f) AM_DEVREADWRITE8("uart1",mc2661_device,read,write,0xff00)
78   AM_RANGE(0xf00010, 0xf00017) AM_DEVREADWRITE8("uart2",mc2661_device,read,write,0xff00)
79   AM_RANGE(0xf00018, 0xf0001f) AM_DEVREADWRITE8("uart3",mc2661_device,read,write,0xff00)
80   AM_RANGE(0xf00020, 0xf00027) AM_DEVREADWRITE8("uart4",mc2661_device,read,write,0xff00)
81   AM_RANGE(0xf00028, 0xf0002f) AM_DEVREADWRITE8("uart5",mc2661_device,read,write,0xff00)
82   AM_RANGE(0xf00030, 0xf00037) AM_DEVREADWRITE8("uart6",mc2661_device,read,write,0xff00)
83   AM_RANGE(0xf00040, 0xf0005f) AM_DEVREADWRITE8("via",via6522_device,read,write,0xff00)
84   AM_RANGE(0xf00060, 0xf0007f) AM_DEVREADWRITE8("rtc",mm58274c_device,read,write,0xff00)
5185   AM_RANGE(0xf000d0, 0xf000d1) AM_WRITE(parallel_led_w)
86   AM_RANGE(0xf00f00, 0xf00fff) AM_READWRITE(invalid_r,invalid_w)
5287ADDRESS_MAP_END
5388
5489
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65100{
66101}
67102
68WRITE8_MEMBER( wicat_state::kbd_put )
69{
70   m_term_data = data;
71}
103//WRITE8_MEMBER( wicat_state::kbd_put )
104//{
105//   m_term_data = data;
106//}
72107
73108WRITE16_MEMBER( wicat_state::serial_w )
74109{
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76111   {
77112      switch(offset)
78113      {
79      case 0x00:
80      case 0x02:
81      case 0x04:
82      case 0x06:
83         m_terminal->write(space,0,data);
114      //case 0x00:
115      //case 0x01:
116      //case 0x02:
117      //case 0x03:
118         //m_terminal->write(space,0,data >> 8);
84119      default:
85120         logerror("Serial: Unused serial port write %02x to offset %02x\n",data,offset);
86121      }
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99134   output_set_value("led6",(~data) & 0x8000);
100135}
101136
137READ8_MEMBER( wicat_state::via_a_r )
138{
139   return m_portA;
140}
141
142READ8_MEMBER( wicat_state::via_b_r )
143{
144   return m_portB;
145}
146
147WRITE8_MEMBER( wicat_state::via_a_w )
148{
149   m_portA = data;
150   logerror("VIA: write %02x to port A\n",data);
151}
152
153WRITE8_MEMBER( wicat_state::via_b_w )
154{
155   m_portB = data;
156   logerror("VIA: write %02x to port B\n",data);
157}
158
102159READ16_MEMBER( wicat_state::invalid_r )
103160{
104161   m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
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112169   m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
113170}
114171
115static GENERIC_TERMINAL_INTERFACE( terminal_intf )
172static serial_terminal_interface terminal_intf =
116173{
117   DEVCB_DRIVER_MEMBER(wicat_state, kbd_put)
174   DEVCB_NULL
118175};
119176
177static mc2661_interface wicat_uart0_intf =
178{
179   0,  // RXC
180   0,  // TXC
181   DEVCB_NULL, //DEVCB_DEVICE_LINE_MEMBER(RS232_TAG, serial_port_device, rx),  // RXD in
182   DEVCB_NULL, //DEVCB_DEVICE_LINE_MEMBER(RS232_TAG, serial_port_device, tx),  // RXD out
183   DEVCB_CPU_INPUT_LINE("maincpu",M68K_IRQ_2),  // RXRDY out
184   DEVCB_NULL,  // TXRDY out
185   DEVCB_NULL, //DEVCB_DEVICE_LINE_MEMBER(RS232_TAG, rs232_port_device, rts_w),  // RTS out
186   DEVCB_NULL, //DEVCB_DEVICE_LINE_MEMBER(RS232_TAG, rs232_port_device, dtr_w),  // DTR out
187   DEVCB_CPU_INPUT_LINE("maincpu",M68K_IRQ_2),  // TXEMT out
188   DEVCB_NULL,  // BKDET out
189   DEVCB_NULL   // XSYNC out
190};
191
192static mc2661_interface wicat_unused_intf =
193{
194   0,
195   0,
196   DEVCB_NULL,
197   DEVCB_NULL,
198   DEVCB_NULL,
199   DEVCB_NULL,
200   DEVCB_NULL,
201   DEVCB_NULL,
202   DEVCB_NULL,
203   DEVCB_NULL,
204   DEVCB_NULL
205};
206
207static via6522_interface wicat_via_intf =
208{
209   DEVCB_DRIVER_MEMBER(wicat_state,via_a_r),  // Port A in
210   DEVCB_DRIVER_MEMBER(wicat_state,via_b_r),  // Port B in
211   DEVCB_NULL,  // CA1 in
212   DEVCB_NULL,  // CB1 in
213   DEVCB_NULL,  // CA2 in
214   DEVCB_NULL,  // CB2 in
215   DEVCB_DRIVER_MEMBER(wicat_state,via_a_w),  // Port A out
216   DEVCB_DRIVER_MEMBER(wicat_state,via_b_w),  // Port B out
217   DEVCB_NULL,  // CA1 out
218   DEVCB_NULL,  // CB1 out
219   DEVCB_NULL,  // CA2 out
220   DEVCB_NULL,  // CB2 out
221   DEVCB_CPU_INPUT_LINE("maincpu", M68K_IRQ_1)  // IRQ
222};
223
224static mm58274c_interface wicat_rtc_intf =
225{
226   0,  // 12 hour
227   1   // first day
228};
229
120230static MACHINE_CONFIG_START( wicat, wicat_state )
121231   /* basic machine hardware */
122   MCFG_CPU_ADD("maincpu", M68000, 8000000) // unknown clock
232   MCFG_CPU_ADD("maincpu", M68000, XTAL_8MHz) // unknown clock
123233   MCFG_CPU_PROGRAM_MAP(wicat_mem)
124234
125235   /* video hardware */
126   MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf)
236   MCFG_SERIAL_TERMINAL_ADD(TERMINAL_TAG, terminal_intf, XTAL_5_0688MHz)
127237
238   MCFG_VIA6522_ADD("via",XTAL_4MHz,wicat_via_intf)
239
240   MCFG_MM58274C_ADD("rtc",wicat_rtc_intf)  // actually an MM58174AN, but should be compatible
241
242   MCFG_MC2661_ADD("uart0", XTAL_5_0688MHz, wicat_uart0_intf)  // connected to terminal board (TODO)
243   MCFG_MC2661_ADD("uart1", XTAL_5_0688MHz, wicat_unused_intf)
244   MCFG_MC2661_ADD("uart2", XTAL_5_0688MHz, wicat_unused_intf)
245   MCFG_MC2661_ADD("uart3", XTAL_5_0688MHz, wicat_unused_intf)
246   MCFG_MC2661_ADD("uart4", XTAL_5_0688MHz, wicat_unused_intf)
247   MCFG_MC2661_ADD("uart5", XTAL_5_0688MHz, wicat_unused_intf)
248   MCFG_MC2661_ADD("uart6", XTAL_5_0688MHz, wicat_unused_intf)  // connected to modem port
249
128250   MCFG_DEFAULT_LAYOUT(layout_wicat)
129251MACHINE_CONFIG_END
130252
r26522r26523
142264   ROM_LOAD       ("cpu.8c",     0x00020, 0x0020, CRC(190a55ad) SHA1(de8a847bff8c343d69b853a215e6ee775ef2ef96) )
143265   ROM_LOAD       ("cpu.15c",    0x00040, 0x0020, CRC(ba2dd77d) SHA1(eb693d6d30aa6a9dba61c6c41a75614ed4e9e69a) )
144266
267   // System 150 CPU/MU board
145268   ROM_REGION16_BE(0x2000, "c2", 0)
146269   ROM_LOAD16_BYTE("boot156.a5", 0x00000, 0x0800, CRC(58510a52) SHA1(d2135b056a04ba830b0ae1cef539e4a9a1b58f82) )
147270   ROM_LOAD16_BYTE("boot156.a7", 0x00001, 0x0800, CRC(e53999f1) SHA1(9c6c6a3a56b5c16a35e1fe824f37c8ae739ebcb9) )
148271   ROM_LOAD16_BYTE("wd3_15.b5",  0x01000, 0x0800, CRC(a765899b) SHA1(8427c564029914b7dbc29768ce451604180e390f) )
149272   ROM_LOAD16_BYTE("wd3_15.b7",  0x01001, 0x0800, CRC(9d986585) SHA1(1ac7579c692f827b121c56dac0a77b15400caba1) )
150273
274   // Terminal CPU board (Graphical)
151275   ROM_REGION16_BE(0x8000, "g1", 0)
152276   ROM_LOAD16_BYTE("1term0.e",   0x00000, 0x0800, CRC(a9aade37) SHA1(644e9362d5a9523be5c6f39a650b574735dbd4a2) )
153277   ROM_LOAD16_BYTE("1term0.o",   0x00001, 0x0800, CRC(8026b5b7) SHA1(cb93e0595b321889694cbb87f497d244e6a2d648) )
r26522r26523
184308   ROM_LOAD16_BYTE("2term7.e",   0x07000, 0x0800, CRC(033ea830) SHA1(27c33eea2df812a1a96e2f47ba7993e2ca3675ad) )
185309   ROM_LOAD16_BYTE("2term7.o",   0x07001, 0x0800, CRC(e157c5d2) SHA1(3cd1ea0fb9df1358e8a358468a4df5e4eaaa86a2) )
186310
311   // Terminal Video board
187312   ROM_REGION(0x1000, "g2char", 0)
188313   ROM_LOAD       ("ascii.chr",  0x00000, 0x0800, CRC(43e26e37) SHA1(f3d5d16040c66f0e827f72a35d4694ca62950949) )
189314   ROM_LOAD       ("apl.chr",    0x00800, 0x0800, CRC(8c6d698e) SHA1(147dd9296fe2efc6140fa148a6edf673c33f9371) )

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