trunk/src/emu/cpu/i8089/i8089_dasm.c
| r26492 | r26493 | |
| 13 | 13 | |
| 14 | 14 | #include "emu.h" |
| 15 | 15 | |
| 16 | | INT16 displacement(offs_t &pc, int wb, const UINT8 *oprom) |
| 16 | INT16 displacement(offs_t &pc, int wb, const UINT8 *oprom, bool aa1) |
| 17 | 17 | { |
| 18 | 18 | INT16 result = 0; |
| 19 | 19 | |
| 20 | 20 | switch (wb) |
| 21 | 21 | { |
| 22 | 22 | case 1: |
| 23 | | return oprom[2]; |
| 23 | result = oprom[2 + aa1]; |
| 24 | 24 | pc += 1; |
| 25 | 25 | break; |
| 26 | 26 | case 2: |
| 27 | | return oprom[2] | (oprom[3] << 8); |
| 27 | result = oprom[2 + aa1] | (oprom[3 + aa1] << 8); |
| 28 | 28 | pc += 2; |
| 29 | 29 | break; |
| 30 | 30 | } |
| r26492 | r26493 | |
| 45 | 45 | } |
| 46 | 46 | } |
| 47 | 47 | |
| 48 | | UINT8 imm8(offs_t &pc, const UINT8 *oprom) |
| 48 | UINT8 imm8(offs_t &pc, const UINT8 *oprom, bool aa1) |
| 49 | 49 | { |
| 50 | 50 | pc += 1; |
| 51 | | return oprom[2]; |
| 51 | return oprom[2 + aa1]; |
| 52 | 52 | } |
| 53 | 53 | |
| 54 | | UINT16 imm16(offs_t &pc, const UINT8 *oprom) |
| 54 | UINT16 imm16(offs_t &pc, const UINT8 *oprom, bool aa1) |
| 55 | 55 | { |
| 56 | 56 | pc += 2; |
| 57 | | return oprom[2] | (oprom[3] << 8); |
| 57 | return oprom[2 + aa1] | (oprom[3 + aa1] << 8); |
| 58 | 58 | } |
| 59 | 59 | |
| 60 | 60 | #define BRP brp_name[brp] |
| 61 | | #define SDISP displacement(pc, wb, oprom) |
| 61 | #define SDISP displacement(pc, wb, oprom, (aa == 1)) |
| 62 | 62 | #define OFFSET(x) offset(x, pc, aa, mm, oprom) |
| 63 | | #define IMM8 imm8(pc, oprom) |
| 64 | | #define IMM16 imm16(pc, oprom) |
| 63 | #define IMM8 imm8(pc, oprom, (aa == 1)) |
| 64 | #define IMM16 imm16(pc, oprom, (aa == 1)) |
| 65 | 65 | |
| 66 | 66 | CPU_DISASSEMBLE( i8089 ) |
| 67 | 67 | { |
| r26492 | r26493 | |
| 107 | 107 | if (w) sprintf(buffer, "addi %s, %04x", BRP, IMM16); |
| 108 | 108 | else sprintf(buffer, "addbi %s, %02x", BRP, IMM8); |
| 109 | 109 | break; |
| 110 | case 0x09: |
| 111 | if (w) sprintf(buffer, "ori %s, %04x", BRP, IMM16); |
| 112 | else sprintf(buffer, "orbi %s, %02x", BRP, IMM8); |
| 113 | break; |
| 110 | 114 | case 0x0a: |
| 111 | 115 | if (w) sprintf(buffer, "andi %s, %04x", BRP, IMM16); |
| 112 | 116 | else sprintf(buffer, "andbi %s, %02x", BRP, IMM8); |
| 113 | 117 | break; |
| 118 | case 0x0b: |
| 119 | sprintf(buffer, "not %s", BRP); |
| 120 | break; |
| 114 | 121 | case 0x0c: |
| 115 | 122 | if (w) sprintf(buffer, "movi %s, %04x", BRP, IMM16); |
| 116 | 123 | else sprintf(buffer, "movbi %s, %02x", BRP, IMM8); |
| 117 | 124 | break; |
| 125 | case 0x0e: |
| 126 | sprintf(buffer, "inc %s", BRP); |
| 127 | break; |
| 118 | 128 | case 0x0f: |
| 119 | 129 | sprintf(buffer, "dec %s", BRP); |
| 120 | 130 | break; |
| 131 | case 0x10: |
| 132 | sprintf(buffer, "jnz %s, %06x", BRP, pc + SDISP); |
| 133 | break; |
| 134 | case 0x11: |
| 135 | sprintf(buffer, "jz %s, %06x", BRP, pc + SDISP); |
| 136 | break; |
| 121 | 137 | case 0x12: |
| 122 | 138 | sprintf(buffer, "hlt"); |
| 123 | 139 | break; |
| 140 | case 0x13: |
| 141 | OFFSET(o); |
| 142 | if (w) sprintf(buffer, "movi %s, %04x", o, IMM16); |
| 143 | else sprintf(buffer, "movbi %s, %02x", o, IMM8); |
| 144 | break; |
| 145 | case 0x20: |
| 146 | OFFSET(o); |
| 147 | if (w) sprintf(buffer, "mov %s, %s", BRP, o); |
| 148 | else sprintf(buffer, "movb %s, %s", BRP, o); |
| 149 | break; |
| 150 | case 0x21: |
| 151 | OFFSET(o); |
| 152 | if (w) sprintf(buffer, "mov %s, %s", o, BRP); |
| 153 | else sprintf(buffer, "movb %s, %s", o, BRP); |
| 154 | break; |
| 124 | 155 | case 0x22: |
| 125 | 156 | OFFSET(o); |
| 126 | 157 | sprintf(buffer, "lpd %s, %s", BRP, o); |
| 127 | 158 | break; |
| 159 | case 0x23: |
| 160 | OFFSET(o); |
| 161 | sprintf(buffer, "movp %s, %s", BRP, o); |
| 162 | break; |
| 163 | case 0x24: |
| 164 | { |
| 165 | char buf[20]; |
| 166 | OFFSET(o); |
| 167 | pc += cpu_disassemble_i8089(device, buf, pc, oprom + (pc - ppc), opram, options) & 0xffff; |
| 168 | if(w) sprintf(buffer, "mov %s, %s", buf, o); |
| 169 | else sprintf(buffer, "movb %s, %s", buf, o); |
| 170 | break; |
| 171 | } |
| 172 | case 0x26: |
| 173 | OFFSET(o); |
| 174 | sprintf(buffer, "movp %s, %s", o, BRP); |
| 175 | break; |
| 176 | case 0x27: |
| 177 | OFFSET(o); |
| 178 | sprintf(buffer, "call %s, %06x", o, pc + SDISP); |
| 179 | flags = DASMFLAG_STEP_OVER; |
| 180 | break; |
| 128 | 181 | case 0x28: |
| 129 | 182 | OFFSET(o); |
| 130 | 183 | if (w) sprintf(buffer, "add %s, %s", BRP, o); |
| 131 | 184 | else sprintf(buffer, "addb %s, %s", BRP, o); |
| 132 | 185 | break; |
| 186 | case 0x29: |
| 187 | OFFSET(o); |
| 188 | if (w) sprintf(buffer, "or %s, %s", BRP, o); |
| 189 | else sprintf(buffer, "orb %s, %s", BRP, o); |
| 190 | break; |
| 133 | 191 | case 0x2a: |
| 134 | 192 | OFFSET(o); |
| 135 | 193 | if (w) sprintf(buffer, "and %s, %s", BRP, o); |
| 136 | 194 | else sprintf(buffer, "andb %s, %s", BRP, o); |
| 137 | 195 | break; |
| 138 | | case 0x27: |
| 196 | case 0x2b: |
| 139 | 197 | OFFSET(o); |
| 140 | | sprintf(buffer, "call %s, %06x", o, ppc + SDISP); |
| 141 | | flags = DASMFLAG_STEP_OVER; |
| 198 | if(w) sprintf(buffer, "not %s, %s", BRP, o); |
| 199 | else sprintf(buffer, "notb %s, %s", BRP, o); |
| 142 | 200 | break; |
| 201 | case 0x2c: |
| 202 | OFFSET(o); |
| 203 | sprintf(buffer, "jmce %s, %06x", o, pc + SDISP); |
| 204 | break; |
| 205 | case 0x2d: |
| 206 | OFFSET(o); |
| 207 | sprintf(buffer, "jmcne %s, %06x", o, pc + SDISP); |
| 208 | break; |
| 209 | case 0x2e: |
| 210 | OFFSET(o); |
| 211 | sprintf(buffer, "jnbt %s, %d, %06x", o, brp, pc + SDISP); |
| 212 | break; |
| 213 | case 0x2f: |
| 214 | OFFSET(o); |
| 215 | sprintf(buffer, "jbt %s, %d, %06x", o, brp, pc + SDISP); |
| 216 | break; |
| 143 | 217 | case 0x30: |
| 144 | 218 | OFFSET(o); |
| 145 | 219 | if (w) sprintf(buffer, "addi %s, %04x", o, IMM16); |
| 146 | 220 | else sprintf(buffer, "addbi %s, %02x", o, IMM8); |
| 147 | 221 | break; |
| 222 | case 0x31: |
| 223 | OFFSET(o); |
| 224 | if (w) sprintf(buffer, "ori %s, %04x", o, IMM16); |
| 225 | else sprintf(buffer, "ori %s, %02x", o, IMM8); |
| 226 | break; |
| 148 | 227 | case 0x32: |
| 149 | 228 | OFFSET(o); |
| 150 | 229 | if (w) sprintf(buffer, "andi %s, %04x", o, IMM16); |
| 151 | 230 | else sprintf(buffer, "andbi %s, %02x", o, IMM8); |
| 152 | 231 | break; |
| 232 | case 0x33: |
| 233 | OFFSET(o); |
| 234 | sprintf(buffer, "%s", o); |
| 235 | break; |
| 153 | 236 | case 0x34: |
| 154 | 237 | OFFSET(o); |
| 155 | 238 | if (w) sprintf(buffer, "add %s, %s", o, BRP); |
| 156 | 239 | else sprintf(buffer, "addb %s, %s", o, BRP); |
| 157 | 240 | break; |
| 241 | case 0x35: |
| 242 | OFFSET(o); |
| 243 | if (w) sprintf(buffer, "or %s, %s", o, BRP); |
| 244 | else sprintf(buffer, "orb %s, %s", o, BRP); |
| 245 | break; |
| 158 | 246 | case 0x36: |
| 159 | 247 | OFFSET(o); |
| 160 | 248 | if (w) sprintf(buffer, "and %s, %s", o, BRP); |
| 161 | 249 | else sprintf(buffer, "andb %s, %s", o, BRP); |
| 162 | 250 | break; |
| 251 | case 0x37: |
| 252 | OFFSET(o); |
| 253 | if(w) sprintf(buffer, "not %s", o); |
| 254 | else sprintf(buffer, "notb %s", o); |
| 255 | break; |
| 256 | case 0x38: |
| 257 | OFFSET(o); |
| 258 | if(w) sprintf(buffer, "jnz %s, %06x", o, pc + SDISP); |
| 259 | else sprintf(buffer, "jnzb %s, %06x", o, pc + SDISP); |
| 260 | break; |
| 261 | case 0x39: |
| 262 | OFFSET(o); |
| 263 | if(w) sprintf(buffer, "jz %s, %06x", o, pc + SDISP); |
| 264 | else sprintf(buffer, "jzb %s, %06x", o, pc + SDISP); |
| 265 | break; |
| 266 | case 0x3a: |
| 267 | OFFSET(o); |
| 268 | if (w) sprintf(buffer, "inc %s", o); |
| 269 | else sprintf(buffer, "incb %s", o); |
| 270 | break; |
| 163 | 271 | case 0x3b: |
| 164 | 272 | OFFSET(o); |
| 165 | 273 | if (w) sprintf(buffer, "dec %s", o); |
| 166 | 274 | else sprintf(buffer, "decb %s", o); |
| 167 | 275 | break; |
| 276 | case 0x3d: |
| 277 | OFFSET(o); |
| 278 | sprintf(buffer, "set %s, %d", o, brp); |
| 279 | break; |
| 168 | 280 | case 0x3e: |
| 169 | 281 | OFFSET(o); |
| 170 | 282 | sprintf(buffer, "clr %s, %d", o, brp); |