trunk/src/mame/drivers/omegrace.c
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| 49 | 49 | |
| 50 | 50 | 1 - - 0 0 Vec RAM (4k) |
| 51 | 51 | 1 - - 0 1 |
| 52 | | 1 - - 1 0 Vec ROM (2k) E1 |
| 52 | 1 - - 1 0 Vec ROM (2k) E1 |
| 53 | 53 | 1 - - 1 1 Vec ROM (2k) F1 |
| 54 | 54 | |
| 55 | 55 | I/O Ports |
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| 61 | 61 | |
| 62 | 62 | 10 I DIP SW C4 (game ship settings) |
| 63 | 63 | |
| 64 | | 6 5 4 3 2 1 |
| 64 | 6 5 4 3 2 1 |
| 65 | 65 | 1st bonus ship at |
| 66 | 66 | | | | | 0 0 40,000 |
| 67 | 67 | | | | | 0 1 50,000 |
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| 79 | 79 | 1 1 1 credit = 3 ships / 2 credits = 7 ships |
| 80 | 80 | |
| 81 | 81 | 11 I 7 = Test |
| 82 | | 6 = P1 Fire |
| 83 | | 5 = P1 Thrust |
| 84 | | 4 = Tilt |
| 82 | 6 = P1 Fire |
| 83 | 5 = P1 Thrust |
| 84 | 4 = Tilt |
| 85 | 85 | |
| 86 | | 1 = Coin 2 |
| 87 | | 0 = Coin 1 |
| 86 | 1 = Coin 2 |
| 87 | 0 = Coin 1 |
| 88 | 88 | |
| 89 | 89 | 12 I 7 = 1P1CR |
| 90 | | 6 = 1P2CR |
| 90 | 6 = 1P2CR |
| 91 | 91 | |
| 92 | | 3 = 2P2CR -+ |
| 93 | | 2 = 2P1CR | |
| 94 | | 1 = P2Fire | |
| 95 | | 0 = P2Thr -+ cocktail only |
| 92 | 3 = 2P2CR -+ |
| 93 | 2 = 2P1CR | |
| 94 | 1 = P2Fire | |
| 95 | 0 = P2Thr -+ cocktail only |
| 96 | 96 | |
| 97 | | 13 O 7 = |
| 97 | 13 O 7 = |
| 98 | 98 | 6 = screen reverse |
| 99 | 99 | 5 = 2 player 2 credit start LED |
| 100 | 100 | 4 = 2 player 1 credit start LED |
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| 107 | 107 | |
| 108 | 108 | 15 I encoder 1 (d7-d2) |
| 109 | 109 | |
| 110 | | The encoder is a 64 position Grey Code encoder, or a |
| 111 | | pot and A to D converter. |
| 110 | The encoder is a 64 position Grey Code encoder, or a |
| 111 | pot and A to D converter. |
| 112 | 112 | |
| 113 | | Unlike the quadrature inputs on Atari and Sega games, |
| 113 | Unlike the quadrature inputs on Atari and Sega games, |
| 114 | 114 | Omega Race's controller is an absolute angle. |
| 115 | 115 | |
| 116 | | 0x00, 0x04, 0x14, 0x10, 0x18, 0x1c, 0x5c, 0x58, |
| 117 | | 0x50, 0x54, 0x44, 0x40, 0x48, 0x4c, 0x6c, 0x68, |
| 118 | | 0x60, 0x64, 0x74, 0x70, 0x78, 0x7c, 0xfc, 0xf8, |
| 119 | | 0xf0, 0xf4, 0xe4, 0xe0, 0xe8, 0xec, 0xcc, 0xc8, |
| 120 | | 0xc0, 0xc4, 0xd4, 0xd0, 0xd8, 0xdc, 0x9c, 0x98, |
| 121 | | 0x90, 0x94, 0x84, 0x80, 0x88, 0x8c, 0xac, 0xa8, |
| 122 | | 0xa0, 0xa4, 0xb4, 0xb0, 0xb8, 0xbc, 0x3c, 0x38, |
| 123 | | 0x30, 0x34, 0x24, 0x20, 0x28, 0x2c, 0x0c, 0x08 |
| 116 | 0x00, 0x04, 0x14, 0x10, 0x18, 0x1c, 0x5c, 0x58, |
| 117 | 0x50, 0x54, 0x44, 0x40, 0x48, 0x4c, 0x6c, 0x68, |
| 118 | 0x60, 0x64, 0x74, 0x70, 0x78, 0x7c, 0xfc, 0xf8, |
| 119 | 0xf0, 0xf4, 0xe4, 0xe0, 0xe8, 0xec, 0xcc, 0xc8, |
| 120 | 0xc0, 0xc4, 0xd4, 0xd0, 0xd8, 0xdc, 0x9c, 0x98, |
| 121 | 0x90, 0x94, 0x84, 0x80, 0x88, 0x8c, 0xac, 0xa8, |
| 122 | 0xa0, 0xa4, 0xb4, 0xb0, 0xb8, 0xbc, 0x3c, 0x38, |
| 123 | 0x30, 0x34, 0x24, 0x20, 0x28, 0x2c, 0x0c, 0x08 |
| 124 | 124 | |
| 125 | 125 | 16 I encoder 2 (d5-d0) |
| 126 | 126 | |
| 127 | | The inputs aren't scrambled as they are on the 1 player |
| 127 | The inputs aren't scrambled as they are on the 1 player |
| 128 | 128 | encoder |
| 129 | 129 | |
| 130 | 130 | 17 I DIP SW C6 (coin/cocktail settings) |
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| 199 | 199 | |
| 200 | 200 | I/O (write-only) |
| 201 | 201 | |
| 202 | | 0,1 8912 (K3) |
| 203 | | 2,3 8912 (J3) |
| 202 | 0,1 8912 (K3) |
| 203 | 2,3 8912 (J3) |
| 204 | 204 | |
| 205 | 205 | |
| 206 | 206 | I/O (read-only) |
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| 232 | 232 | m_maincpu(*this, "maincpu"), |
| 233 | 233 | m_audiocpu(*this, "audiocpu") { } |
| 234 | 234 | |
| 235 | required_device<cpu_device> m_maincpu; |
| 236 | required_device<cpu_device> m_audiocpu; |
| 237 | |
| 235 | 238 | DECLARE_READ8_MEMBER(omegrace_vg_go_r); |
| 236 | 239 | DECLARE_READ8_MEMBER(omegrace_spinner1_r); |
| 237 | 240 | DECLARE_WRITE8_MEMBER(omegrace_leds_w); |
| 238 | 241 | DECLARE_WRITE8_MEMBER(omegrace_soundlatch_w); |
| 239 | 242 | DECLARE_DRIVER_INIT(omegrace); |
| 240 | 243 | virtual void machine_reset(); |
| 241 | | required_device<cpu_device> m_maincpu; |
| 242 | | required_device<cpu_device> m_audiocpu; |
| 243 | 244 | }; |
| 244 | 245 | |
| 245 | 246 | |
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| 266 | 267 | |
| 267 | 268 | READ8_MEMBER(omegrace_state::omegrace_vg_go_r) |
| 268 | 269 | { |
| 269 | | avgdvg_go_w(space,0,0); |
| 270 | avgdvg_go_w(space, 0, 0); |
| 270 | 271 | return 0; |
| 271 | 272 | } |
| 272 | 273 | |
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| 493 | 494 | /* main CPU */ |
| 494 | 495 | /* XTAL101 Crystal @ 12mhz */ |
| 495 | 496 | /* through 74LS161, Pin 13 = divide by 4 */ |
| 496 | | MCFG_CPU_ADD("maincpu", Z80,12000000/4) |
| 497 | MCFG_CPU_ADD("maincpu", Z80, XTAL_12MHz/4) |
| 497 | 498 | MCFG_CPU_PROGRAM_MAP(main_map) |
| 498 | 499 | MCFG_CPU_IO_MAP(port_map) |
| 499 | 500 | MCFG_CPU_PERIODIC_INT_DRIVER(omegrace_state, irq0_line_hold, 250) |
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| 502 | 503 | /* XTAL101 Crystal @ 12mhz */ |
| 503 | 504 | /* through 74LS161, Pin 12 = divide by 8 */ |
| 504 | 505 | /* Fed to CPU as 1.5mhz though line J4-D */ |
| 505 | | MCFG_CPU_ADD("audiocpu", Z80,12000000/8) |
| 506 | MCFG_CPU_ADD("audiocpu", Z80, XTAL_12MHz/8) |
| 506 | 507 | MCFG_CPU_PROGRAM_MAP(sound_map) |
| 507 | 508 | MCFG_CPU_IO_MAP(sound_port) |
| 508 | 509 | MCFG_CPU_PERIODIC_INT_DRIVER(omegrace_state, nmi_line_pulse, 250) |
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| 524 | 525 | |
| 525 | 526 | /* XTAL101 Crystal @ 12mhz */ |
| 526 | 527 | /* through 74LS92, Pin 8 = divide by 12 */ |
| 527 | | MCFG_SOUND_ADD("ay1", AY8912, 12000000/12) |
| 528 | MCFG_SOUND_ADD("ay1", AY8912, XTAL_12MHz/12) |
| 528 | 529 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) |
| 529 | 530 | |
| 530 | | MCFG_SOUND_ADD("ay2", AY8912, 12000000/12) |
| 531 | MCFG_SOUND_ADD("ay2", AY8912, XTAL_12MHz/12) |
| 531 | 532 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25) |
| 532 | 533 | MACHINE_CONFIG_END |
| 533 | 534 | |