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r26473 Sunday 1st December, 2013 at 21:16:10 UTC by smf
finished modernising i2cmem [smf]
[src/emu/machine]i2cmem.c i2cmem.h
[src/mame/drivers]aristmk5.c cd32.c ertictac.c ghosteo.c peplus.c splus.c twinkle.c
[src/mame/includes]archimds.h cd32.h
[src/mame/machine]archimds.c cd32.c
[src/mess/drivers]a310.c cxhumax.c pokemini.c vii.c
[src/mess/includes]cxhumax.h
[src/mess/machine]md_eeprom.c md_jcart.c nes_bandai.c

trunk/src/emu/machine/i2cmem.c
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1// license:MAME
2// copyright-holders:smf
13/***************************************************************************
24
35I2C Memory
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7678   : device_t(mconfig, I2CMEM, "I2CMEM", tag, owner, clock, "i2cmem", __FILE__),
7779      device_memory_interface(mconfig, *this),
7880      device_nvram_interface(mconfig, *this),
81   m_slave_address( I2CMEM_SLAVE_ADDRESS ),
82   m_page_size( 0 ),
83   m_data_size( 0 ),
7984   m_scl( 0 ),
8085   m_sdaw( 0 ),
8186   m_e0( 0 ),
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96101
97102void i2cmem_device::device_config_complete()
98103{
99   // inherit a copy of the static data
100   const i2cmem_interface *intf = reinterpret_cast<const i2cmem_interface *>(static_config());
101   if (intf != NULL)
102   {
103      *static_cast<i2cmem_interface *>(this) = *intf;
104   }
105   else
106   {
107      m_slave_address = 0;
108      m_page_size = 0;
109      m_data_size = 0;
110   }
104   int address_bits = 0;
111105
112   m_address_bits = 0;
113
114106   int i = m_data_size - 1;
115107   while( i > 0 )
116108   {
117      m_address_bits++;
109      address_bits++;
118110      i >>= 1;
119111   }
120112
121   m_space_config = address_space_config( "i2cmem", ENDIANNESS_BIG, 8,  m_address_bits, 0, *ADDRESS_MAP_NAME( i2cmem_map8 ) );
113   m_space_config = address_space_config( "i2cmem", ENDIANNESS_BIG, 8,  address_bits, 0, *ADDRESS_MAP_NAME( i2cmem_map8 ) );
122114}
123115
124116
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251243//  READ/WRITE HANDLERS
252244//**************************************************************************
253245
254WRITE_LINE_DEVICE_HANDLER( i2cmem_e0_write )
246WRITE_LINE_MEMBER( i2cmem_device::write_e0 )
255247{
256   downcast<i2cmem_device *>( device )->set_e0_line( state );
257}
258
259void i2cmem_device::set_e0_line( int state )
260{
261248   state &= 1;
262249   if( m_e0 != state )
263250   {
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267254}
268255
269256
270WRITE_LINE_DEVICE_HANDLER( i2cmem_e1_write )
257WRITE_LINE_MEMBER( i2cmem_device::write_e1 )
271258{
272   downcast<i2cmem_device *>( device )->set_e1_line( state );
273}
274
275void i2cmem_device::set_e1_line( int state )
276{
277259   state &= 1;
278260   if( m_e1 != state )
279261   {
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283265}
284266
285267
286WRITE_LINE_DEVICE_HANDLER( i2cmem_e2_write )
268WRITE_LINE_MEMBER( i2cmem_device::write_e2 )
287269{
288   downcast<i2cmem_device *>( device )->set_e2_line( state );
289}
290
291void i2cmem_device::set_e2_line( int state )
292{
293270   state &= 1;
294271   if( m_e2 != state )
295272   {
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299276}
300277
301278
302WRITE_LINE_DEVICE_HANDLER( i2cmem_sda_write )
279WRITE_LINE_MEMBER( i2cmem_device::write_sda )
303280{
304   downcast<i2cmem_device *>( device )->set_sda_line( state );
305}
306
307void i2cmem_device::set_sda_line( int state )
308{
309281   state &= 1;
310282   if( m_sdaw != state )
311283   {
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331303   }
332304}
333305
334WRITE_LINE_DEVICE_HANDLER( i2cmem_scl_write )
306WRITE_LINE_MEMBER( i2cmem_device::write_scl )
335307{
336   downcast<i2cmem_device *>( device )->set_scl_line( state );
337}
338
339void i2cmem_device::set_scl_line( int state )
340{
341308   if( m_scl != state )
342309   {
343310      m_scl = state;
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497464}
498465
499466
500WRITE_LINE_DEVICE_HANDLER( i2cmem_wc_write )
467WRITE_LINE_MEMBER( i2cmem_device::write_wc )
501468{
502   downcast<i2cmem_device *>( device )->set_wc_line( state );
503}
504
505void i2cmem_device::set_wc_line( int state )
506{
507469   state &= 1;
508470   if( m_wc != state )
509471   {
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513475}
514476
515477
516READ_LINE_DEVICE_HANDLER( i2cmem_sda_read )
478READ_LINE_MEMBER( i2cmem_device::read_sda )
517479{
518   return downcast<i2cmem_device *>( device )->read_sda_line();
519}
520
521int i2cmem_device::read_sda_line()
522{
523480   int res = m_sdar & 1;
524481
525482   verboselog( this, 2, "read sda %d\n", res );
trunk/src/emu/machine/i2cmem.h
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2424//  INTERFACE CONFIGURATION MACROS
2525//**************************************************************************
2626
27#define MCFG_I2CMEM_ADD( _tag, _config ) \
28   MCFG_DEVICE_ADD( _tag, I2CMEM, 0 ) \
29   MCFG_DEVICE_CONFIG( _config )
27#define MCFG_I2CMEM_ADD( _tag ) \
28   MCFG_DEVICE_ADD( _tag, I2CMEM, 0 )
3029
30#define MCFG_I2CMEM_ADDRESS( address ) \
31   i2cmem_device::set_address(*device, address);
32#define MCFG_I2CMEM_PAGE_SIZE( page_size ) \
33   i2cmem_device::set_page_size(*device, page_size);
34#define MCFG_I2CMEM_DATA_SIZE(data_size) \
35   i2cmem_device::set_data_size(*device, data_size);
36#define MCFG_I2CMEM_E0(e0) \
37   i2cmem_device::set_e0(*device, e0);
38#define MCFG_I2CMEM_E1(e1) \
39   i2cmem_device::set_e1(*device, e1);
40#define MCFG_I2CMEM_E2(e2) \
41   i2cmem_device::set_e2(*device, e2);
42#define MCFG_I2CMEM_WC(wc) \
43   i2cmem_device::set_wc(*device, wc);
3144
45#define MCFG_X2404P_ADD( _tag ) \
46   MCFG_I2CMEM_ADD( _tag ) \
47   MCFG_I2CMEM_PAGE_SIZE(8) \
48   MCFG_I2CMEM_DATA_SIZE(0x200)
49
50#define MCFG_24C01_ADD( _tag ) \
51   MCFG_I2CMEM_ADD( _tag ) \
52   MCFG_I2CMEM_PAGE_SIZE(4) \
53   MCFG_I2CMEM_DATA_SIZE(0x80)
54
55#define MCFG_24C02_ADD( _tag ) \
56   MCFG_I2CMEM_ADD( _tag ) \
57   MCFG_I2CMEM_PAGE_SIZE(4) \
58   MCFG_I2CMEM_DATA_SIZE(0x100)
59
60#define MCFG_24C08_ADD( _tag ) \
61   MCFG_I2CMEM_ADD( _tag ) \
62   MCFG_I2CMEM_DATA_SIZE(0x400)
63
64#define MCFG_24C16_ADD( _tag ) \
65   MCFG_I2CMEM_ADD( _tag ) \
66   MCFG_I2CMEM_PAGE_SIZE(8) \
67   MCFG_I2CMEM_DATA_SIZE(0x800)
68
69#define MCFG_24C16A_ADD( _tag ) \
70   MCFG_I2CMEM_ADD( _tag ) \
71   MCFG_I2CMEM_DATA_SIZE(0x800)
72
73#define MCFG_24C64_ADD( _tag ) \
74   MCFG_I2CMEM_ADD( _tag ) \
75   MCFG_I2CMEM_PAGE_SIZE(8) \
76   MCFG_I2CMEM_DATA_SIZE(0x2000)
77
3278//**************************************************************************
3379//  TYPE DEFINITIONS
3480//**************************************************************************
3581
36// ======================> i2cmem_interface
37
38struct i2cmem_interface
39{
40   int m_slave_address;
41   int m_page_size;
42   int m_data_size;
43};
44
45
4682// ======================> i2cmem_device
4783
4884class i2cmem_device :
4985   public device_t,
5086   public device_memory_interface,
51   public device_nvram_interface,
52   public i2cmem_interface
87   public device_nvram_interface
5388{
5489public:
5590   // construction/destruction
5691   i2cmem_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock );
5792
93   static void set_address(device_t &device, int address) { downcast<i2cmem_device &>(device).m_slave_address = address; }
94   static void set_page_size(device_t &device, int page_size) { downcast<i2cmem_device &>(device).m_page_size = page_size; }
95   static void set_data_size(device_t &device, int data_size) { downcast<i2cmem_device &>(device).m_data_size = data_size; }
96   static void set_e0(device_t &device, int e0) { downcast<i2cmem_device &>(device).m_e0 = e0; }
97   static void set_e1(device_t &device, int e1) { downcast<i2cmem_device &>(device).m_e1 = e1; }
98   static void set_e2(device_t &device, int e2) { downcast<i2cmem_device &>(device).m_e2 = e2; }
99   static void set_wc(device_t &device, int wc) { downcast<i2cmem_device &>(device).m_wc = wc; }
100
58101   // I/O operations
59   void set_e0_line( int state );
60   void set_e1_line( int state );
61   void set_e2_line( int state );
62   void set_sda_line( int state );
63   void set_scl_line( int state );
64   void set_wc_line( int state );
65   int read_sda_line();
102   DECLARE_WRITE_LINE_MEMBER( write_e0 );
103   DECLARE_WRITE_LINE_MEMBER( write_e1 );
104   DECLARE_WRITE_LINE_MEMBER( write_e2 );
105   DECLARE_WRITE_LINE_MEMBER( write_sda );
106   DECLARE_WRITE_LINE_MEMBER( write_scl );
107   DECLARE_WRITE_LINE_MEMBER( write_wc );
108   DECLARE_READ_LINE_MEMBER( read_sda );
66109
67110protected:
68111   // device-level overrides
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85128
86129   // device-specific configuration
87130   address_space_config m_space_config;
88   int m_address_bits;
89131
90132   // internal state
133   int m_slave_address;
134   int m_page_size;
135   int m_data_size;
91136   int m_scl;
92137   int m_sdaw;
93138   int m_e0;
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108153// device type definition
109154extern const device_type I2CMEM;
110155
111
112//**************************************************************************
113//  READ/WRITE HANDLERS
114//**************************************************************************
115
116WRITE_LINE_DEVICE_HANDLER( i2cmem_e0_write );
117WRITE_LINE_DEVICE_HANDLER( i2cmem_e1_write );
118WRITE_LINE_DEVICE_HANDLER( i2cmem_e2_write );
119WRITE_LINE_DEVICE_HANDLER( i2cmem_sda_write );
120WRITE_LINE_DEVICE_HANDLER( i2cmem_scl_write );
121WRITE_LINE_DEVICE_HANDLER( i2cmem_wc_write );
122READ_LINE_DEVICE_HANDLER( i2cmem_sda_read );
123
124156#endif  /* __I2CMEM_H__ */
trunk/src/mess/drivers/a310.c
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270270   {FLOPPY_0, FLOPPY_1, FLOPPY_2, FLOPPY_3}
271271};
272272
273static const i2cmem_interface i2cmem_interface =
274{
275   I2CMEM_SLAVE_ADDRESS, 0, 0x100
276};
277
278273WRITE_LINE_MEMBER( archimedes_state::a310_kart_tx_w )
279274{
280275   if(state)
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303298   MCFG_CPU_PROGRAM_MAP(a310_mem)
304299
305300   MCFG_AAKART_ADD("kart", 8000000/128, kart_interface) // TODO: frequency
306   MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
301   MCFG_I2CMEM_ADD("i2cmem")
302   MCFG_I2CMEM_DATA_SIZE(0x100)
307303
308304   /* video hardware */
309305   MCFG_SCREEN_ADD("screen", RASTER)
trunk/src/mess/drivers/cxhumax.c
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624624   COMBINE_DATA(&m_i2c0_regs[offset]);
625625}
626626
627static UINT8 i2cmem_read_byte( device_t *machine, int last)
627UINT8 cxhumax_state::i2cmem_read_byte(int last)
628628{
629629   UINT8 data = 0;
630630   int i;
631   i2cmem_sda_write(machine, 1);
631   m_i2cmem->write_sda(1);
632632   for (i = 0; i < 8; i++)
633633   {
634      i2cmem_scl_write(machine, 1);
635      data = (data << 1) + (i2cmem_sda_read( machine ) ? 1 : 0);
636      i2cmem_scl_write(machine, 0);
634      m_i2cmem->write_scl(1);
635      data = (data << 1) + (m_i2cmem->read_sda() ? 1 : 0);
636      m_i2cmem->write_scl(0);
637637   }
638   i2cmem_sda_write(machine, last);
639   i2cmem_scl_write(machine, 1);
640   i2cmem_scl_write(machine, 0);
638   m_i2cmem->write_sda(last);
639   m_i2cmem->write_scl(1);
640   m_i2cmem->write_scl(0);
641641   return data;
642642}
643643
644static void i2cmem_write_byte( device_t *machine, UINT8 data)
644void cxhumax_state::i2cmem_write_byte(UINT8 data)
645645{
646646   int i;
647647   for (i = 0; i < 8; i++)
648648   {
649      i2cmem_sda_write(machine, (data & 0x80) ? 1 : 0);
649      m_i2cmem->write_sda((data & 0x80) ? 1 : 0);
650650      data = data << 1;
651      i2cmem_scl_write(machine, 1);
652      i2cmem_scl_write(machine, 0);
651      m_i2cmem->write_scl(1);
652      m_i2cmem->write_scl(0);
653653   }
654   i2cmem_sda_write(machine, 1); // ack bit
655   i2cmem_scl_write(machine, 1);
656   i2cmem_scl_write(machine, 0);
654   m_i2cmem->write_sda(1); // ack bit
655   m_i2cmem->write_scl(1);
656   m_i2cmem->write_scl(0);
657657}
658658
659static void i2cmem_start( device_t *machine )
659void cxhumax_state::i2cmem_start()
660660{
661   i2cmem_sda_write(machine, 1);
662   i2cmem_scl_write(machine, 1);
663   i2cmem_sda_write(machine, 0);
664   i2cmem_scl_write(machine, 0);
661   m_i2cmem->write_sda(1);
662   m_i2cmem->write_scl(1);
663   m_i2cmem->write_sda(0);
664   m_i2cmem->write_scl(0);
665665}
666666
667static void i2cmem_stop( device_t *machine )
667void cxhumax_state::i2cmem_stop()
668668{
669   i2cmem_sda_write(machine, 0);
670   i2cmem_scl_write(machine, 1);
671   i2cmem_sda_write(machine, 1);
672   i2cmem_scl_write(machine, 0);
669   m_i2cmem->write_sda(0);
670   m_i2cmem->write_scl(1);
671   m_i2cmem->write_sda(1);
672   m_i2cmem->write_scl(0);
673673}
674674
675675READ32_MEMBER( cxhumax_state::cx_i2c1_r )
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677677   UINT32 data=0;
678678   switch(offset) {
679679      case I2C_STAT_REG:
680         data |= i2cmem_sda_read(machine().device("eeprom"))<<3;
680         data |= m_i2cmem->read_sda()<<3;
681681         // fall
682682      default:
683683         data |= m_i2c1_regs[offset]; break;
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692692   switch(offset) {
693693      case I2C_CTRL_REG:
694694         if(data&0x10) {// START
695            i2cmem_start(machine().device("eeprom"));
695            i2cmem_start();
696696         }
697697         if((data&0x4) || ((data&3)==3)) // I2C READ
698698         {
699699            m_i2c1_regs[I2C_RDATA_REG] = 0;
700            if(data&0x10) i2cmem_write_byte(machine().device("eeprom"),(data>>24)&0xFF);
700            if(data&0x10) i2cmem_write_byte((data>>24)&0xFF);
701701            if(m_i2c1_regs[I2C_MODE_REG]&(1<<5)) // BYTE_ORDER
702702            {
703703               for(int i=0; i<(data&3); i++) {
704                  m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte(machine().device("eeprom"),0) << (i*8);
704                  m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte(0) << (i*8);
705705               }
706               m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte(machine().device("eeprom"),(data&0x20)?1:0) << ((data&3)*8);
706               m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte((data&0x20)?1:0) << ((data&3)*8);
707707            }
708708            else
709709            {
710710               for(int i=0; i<(data&3); i++) {
711                  m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte(machine().device("eeprom"),0);
711                  m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte(0);
712712                  m_i2c1_regs[I2C_RDATA_REG] <<= 8;
713713               }
714               m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte(machine().device("eeprom"),(data&0x20)?1:0);
714               m_i2c1_regs[I2C_RDATA_REG] |= i2cmem_read_byte((data&0x20)?1:0);
715715            }
716716         }
717717         else
718718         {
719719            for(int i=0; i<=(data&3); i++) {
720               i2cmem_write_byte(machine().device("eeprom"),(data>>(24-(i*8))&0xFF));
720               i2cmem_write_byte((data>>(24-(i*8))&0xFF));
721721            }
722722         }
723723         if(data&0x20) {// STOP
724            i2cmem_stop(machine().device("eeprom"));
724            i2cmem_stop();
725725         }
726726
727727         /* The interrupt status bit is set at the end of an I2C read or write operation. */
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978978
979979void cxhumax_state::machine_start()
980980{
981   m_i2cmem = machine().device("eeprom");
982981   int index = 0;
983982   for(index = 0; index < MAX_CX_TIMERS; index++)
984983   {
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10541053   DEVCB_NULL
10551054};
10561055
1057static const i2cmem_interface i2cmem_interface =
1058{
1059      I2CMEM_SLAVE_ADDRESS, 0, 0x2000
1060};
1061
10621056static MACHINE_CONFIG_START( cxhumax, cxhumax_state )
10631057   MCFG_CPU_ADD("maincpu", ARM920T, 180000000) // CX24175 (RevC up?)
10641058   MCFG_CPU_PROGRAM_MAP(cxhumax_map)
10651059
10661060
10671061   MCFG_INTEL_28F320J3D_ADD("flash")
1068   MCFG_I2CMEM_ADD("eeprom",i2cmem_interface)
1062   MCFG_I2CMEM_ADD("eeprom")
1063   MCFG_I2CMEM_DATA_SIZE(0x2000)
10691064
10701065   /* video hardware */
10711066   MCFG_SCREEN_ADD("screen", RASTER)
trunk/src/mess/drivers/pokemini.c
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13161316               Bit 7   R/W IR received bit (mirror, if device not selected: 0)
13171317            */
13181318      if ( m_pm_reg[0x60] & 0x04 )
1319         m_i2cmem->set_sda_line( ( data & 0x04 ) ? 1 : 0 );
1319         m_i2cmem->write_sda( ( data & 0x04 ) ? 1 : 0 );
13201320
13211321      if ( m_pm_reg[0x60] & 0x08 )
1322         m_i2cmem->set_scl_line( ( data & 0x08 ) ? 1 : 0 );
1322         m_i2cmem->write_scl( ( data & 0x08 ) ? 1 : 0 );
13231323      break;
13241324   case 0x70:  /* Sound related */
13251325      m_pm_reg[0x70] = data;
r26472r26473
14801480   case 0x61:
14811481      if ( ! ( m_pm_reg[0x60] & 0x04 ) )
14821482      {
1483         data = ( data & ~ 0x04 ) | ( m_i2cmem->read_sda_line() ? 0x04 : 0x00 );
1483         data = ( data & ~ 0x04 ) | ( m_i2cmem->read_sda() ? 0x04 : 0x00 );
14841484      }
14851485
14861486      if ( ! ( m_pm_reg[0x60] & 0x08 ) )
r26472r26473
17581758};
17591759
17601760
1761static const i2cmem_interface i2cmem_interface =
1762{
1763      I2CMEM_SLAVE_ADDRESS, 0, 0x2000
1764};
1765
1766
17671761void pokemini_state::video_start()
17681762{
17691763   machine().primary_screen->register_screen_bitmap(m_bitmap);
r26472r26473
17841778
17851779   MCFG_QUANTUM_TIME(attotime::from_hz(60))
17861780
1787   MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
1781   MCFG_I2CMEM_ADD("i2cmem")
1782   MCFG_I2CMEM_DATA_SIZE(0x2000)
17881783
17891784   /* This still needs to be improved to actually match the hardware */
17901785   MCFG_SCREEN_ADD("screen", LCD)
trunk/src/mess/drivers/vii.c
r26472r26473
11541154   MCFG_SOFTWARE_LIST_ADD("cart_list","vsmile_cart")
11551155MACHINE_CONFIG_END
11561156
1157static const i2cmem_interface i2cmem_interface =
1158{
1159   I2CMEM_SLAVE_ADDRESS, 0, 0x200
1160};
1161
11621157static MACHINE_CONFIG_START( batman, vii_state )
11631158
11641159   MCFG_CPU_ADD( "maincpu", UNSP, XTAL_27MHz)
r26472r26473
11661161   MCFG_CPU_VBLANK_INT_DRIVER("screen", vii_state,  vii_vblank)
11671162
11681163
1169   MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
1164   MCFG_I2CMEM_ADD("i2cmem")
1165   MCFG_I2CMEM_DATA_SIZE(0x200)
11701166
11711167   MCFG_SCREEN_ADD( "screen", RASTER )
11721168   MCFG_SCREEN_REFRESH_RATE(60)
trunk/src/mess/machine/md_eeprom.c
r26472r26473
107107//  SERIAL I2C DEVICE
108108//-------------------------------------------------
109109
110static const i2cmem_interface md_24c01_i2cmem_interface =
111{
112   I2CMEM_SLAVE_ADDRESS, 4, 0x80
113};
114110
115
116static const i2cmem_interface md_24c02_i2cmem_interface =
117{
118   I2CMEM_SLAVE_ADDRESS, 4, 0x100
119};
120
121
122static const i2cmem_interface md_24c16_i2cmem_interface =
123{
124   I2CMEM_SLAVE_ADDRESS, 8, 0x800
125};
126
127
128static const i2cmem_interface md_24c64_i2cmem_interface =
129{
130   I2CMEM_SLAVE_ADDRESS, 8, 0x2000
131};
132
133
134111// MD_STD_EEPROM & MD_EEPROM_NHLPA
135112MACHINE_CONFIG_FRAGMENT( md_i2c_24c01 )
136   MCFG_I2CMEM_ADD("i2cmem", md_24c01_i2cmem_interface)
113   MCFG_24C01_ADD("i2cmem")
137114MACHINE_CONFIG_END
138115
139116// MD_EEPROM_NBAJAM & MD_EEPROM_NBAJAMTE
140117MACHINE_CONFIG_FRAGMENT( md_i2c_24c02 )
141   MCFG_I2CMEM_ADD("i2cmem", md_24c02_i2cmem_interface)
118   MCFG_24C02_ADD("i2cmem")
142119MACHINE_CONFIG_END
143120
144121// MD_EEPROM_NFLQB
145122MACHINE_CONFIG_FRAGMENT( md_i2c_24c16 )
146   MCFG_I2CMEM_ADD("i2cmem", md_24c16_i2cmem_interface)
123   MCFG_24C16_ADD("i2cmem")
147124MACHINE_CONFIG_END
148125
149126// MD_EEPROM_CSLAM & MD_EEPROM_BLARA
150127MACHINE_CONFIG_FRAGMENT( md_i2c_24c64 )
151   MCFG_I2CMEM_ADD("i2cmem", md_24c64_i2cmem_interface)
128   MCFG_24C64_ADD("i2cmem")
152129MACHINE_CONFIG_END
153130
154131
r26472r26473
217194{
218195   if (offset == 0x200000/2)
219196   {
220      return i2cmem_sda_read(m_i2cmem);
197      return m_i2cmem->read_sda();
221198   }
222199   if (offset < 0x400000/2)
223200      return m_rom[MD_ADDR(offset)];
r26472r26473
231208   {
232209      m_i2c_clk = BIT(data, 1);
233210      m_i2c_mem = BIT(data, 0);
234      i2cmem_scl_write(m_i2cmem, m_i2c_clk);
235      i2cmem_sda_write(m_i2cmem, m_i2c_mem);
211      m_i2cmem->write_scl(m_i2c_clk);
212      m_i2cmem->write_sda(m_i2c_mem);
236213   }
237214}
238215
r26472r26473
240217{
241218   if (offset == 0x200000/2)
242219   {
243//      m_i2c_mem = i2cmem_sda_read(m_i2cmem);
244      return i2cmem_sda_read(m_i2cmem);
220//      m_i2c_mem = m_i2cmem->read_sda();
221      return m_i2cmem->read_sda();
245222   }
246223   if (offset < 0x400000/2)
247224      return m_rom[MD_ADDR(offset)];
r26472r26473
255232   {
256233      m_i2c_clk = BIT(data, 1);
257234      m_i2c_mem = BIT(data, 0);
258      i2cmem_scl_write(m_i2cmem, m_i2c_clk);
259      i2cmem_sda_write(m_i2cmem, m_i2c_mem);
235      m_i2cmem->write_scl(m_i2c_clk);
236      m_i2cmem->write_sda(m_i2c_mem);
260237   }
261238}
262239
r26472r26473
264241{
265242   if (offset == 0x200000/2)
266243   {
267//      m_i2c_mem = i2cmem_sda_read(m_i2cmem);
268      return i2cmem_sda_read(m_i2cmem);
244//      m_i2c_mem = m_i2cmem->read_sda();
245      return m_i2cmem->read_sda();
269246   }
270247   if (offset < 0x400000/2)
271248      return m_rom[MD_ADDR(offset)];
r26472r26473
280257      if(ACCESSING_BITS_8_15)
281258      {
282259         m_i2c_clk = BIT(data, 8);
283         i2cmem_scl_write(m_i2cmem, m_i2c_clk);
260         m_i2cmem->write_scl(m_i2c_clk);
284261      }
285262
286263      if(ACCESSING_BITS_0_7)
287264      {
288265         m_i2c_mem = BIT(data, 0);
289         i2cmem_sda_write(m_i2cmem, m_i2c_mem);
266         m_i2cmem->write_sda(m_i2c_mem);
290267      }
291268   }
292269}
r26472r26473
296273{
297274   if (offset == 0x200000/2)
298275   {
299//      m_i2c_mem = i2cmem_sda_read(m_i2cmem);
300      return i2cmem_sda_read(m_i2cmem);
276//      m_i2c_mem = m_i2cmem->read_sda();
277      return m_i2cmem->read_sda();
301278   }
302279   if (offset < 0x400000/2)
303280      return m_rom[MD_ADDR(offset)];
r26472r26473
312289      if(ACCESSING_BITS_8_15)
313290      {
314291         m_i2c_clk = BIT(data, 8);
315         i2cmem_scl_write(m_i2cmem, m_i2c_clk);
292         m_i2cmem->write_scl(m_i2c_clk);
316293      }
317294
318295      if(ACCESSING_BITS_0_7)
319296      {
320297         m_i2c_mem = BIT(data, 0);
321         i2cmem_sda_write(m_i2cmem, m_i2c_mem);
298         m_i2cmem->write_sda(m_i2c_mem);
322299      }
323300   }
324301}
r26472r26473
329306   if (offset == 0x200000/2)
330307   {
331308//      m_i2c_mem = i2cmem_sda_read(m_i2cmem);
332      return i2cmem_sda_read(m_i2cmem);
309      return m_i2cmem->read_sda();
333310   }
334311   if (offset < 0x400000/2)
335312      return m_rom[MD_ADDR(offset)];
r26472r26473
343320   {
344321      m_i2c_clk = BIT(data, 8);
345322      m_i2c_mem = BIT(data, 0);
346      i2cmem_scl_write(m_i2cmem, m_i2c_clk);
347      i2cmem_sda_write(m_i2cmem, m_i2c_mem);
323      m_i2cmem->write_scl(m_i2c_clk);
324      m_i2cmem->write_sda(m_i2c_mem);
348325   }
349326}
350327
r26472r26473
352329{
353330   if (offset == 0x200000/2)
354331   {
355//      m_i2c_mem = i2cmem_sda_read(m_i2cmem);
356      return (i2cmem_sda_read(m_i2cmem) & 1) << 7;
332//      m_i2c_mem = m_i2cmem->read_sda();
333      return (m_i2cmem->read_sda() & 1) << 7;
357334   }
358335   if (offset < 0x400000/2)
359336      return m_rom[MD_ADDR(offset)];
r26472r26473
367344   {
368345      m_i2c_clk = BIT(data, 6);
369346      m_i2c_mem = BIT(data, 7);
370      i2cmem_scl_write(m_i2cmem, m_i2c_clk);
371      i2cmem_sda_write(m_i2cmem, m_i2c_mem);
347      m_i2cmem->write_scl(m_i2c_clk);
348      m_i2cmem->write_sda(m_i2c_mem);
372349   }
373350}
374351
r26472r26473
376353{
377354   if (offset == 0x380000/2)
378355   {
379//      m_i2c_mem = i2cmem_sda_read(m_i2cmem);
380      return (i2cmem_sda_read(m_i2cmem) & 1) << 7;
356//      m_i2c_mem = m_i2cmem->read_sda();
357      return (m_i2cmem->read_sda() & 1) << 7;
381358   }
382359   if (offset < 0x400000/2)
383360      return m_rom[MD_ADDR(offset)];
r26472r26473
391368   {
392369      m_i2c_clk = BIT(data, 9);
393370      m_i2c_mem = BIT(data, 8);
394      i2cmem_scl_write(m_i2cmem, m_i2c_clk);
395      i2cmem_sda_write(m_i2cmem, m_i2c_mem);
371      m_i2cmem->write_scl(m_i2c_clk);
372      m_i2cmem->write_sda(m_i2c_mem);
396373   }
397374}
trunk/src/mess/machine/md_jcart.c
r26472r26473
7575//  SERIAL I2C DEVICE
7676//-------------------------------------------------
7777
78static const i2cmem_interface md_24c08_i2cmem_interface =
79{
80   I2CMEM_SLAVE_ADDRESS, 0, 0x400
81};
82
83static const i2cmem_interface md_24c16a_i2cmem_interface =
84{
85   I2CMEM_SLAVE_ADDRESS, 0, 0x800
86};
87
8878// MD_SEPROM_CODEMAST
8979MACHINE_CONFIG_FRAGMENT( md_i2c_24c08 )
90   MCFG_I2CMEM_ADD("i2cmem", md_24c08_i2cmem_interface)
80   MCFG_24C08_ADD("i2cmem")
9181MACHINE_CONFIG_END
9282
9383// MD_SEPROM_MM96
9484MACHINE_CONFIG_FRAGMENT( md_i2c_24c16a )
95   MCFG_I2CMEM_ADD("i2cmem", md_24c16a_i2cmem_interface)
85   MCFG_24C16A_ADD("i2cmem")
9686MACHINE_CONFIG_END
9787
9888
r26472r26473
219209{
220210   if (offset == 0x380000/2)
221211   {
222      m_i2c_mem = i2cmem_sda_read(m_i2cmem);
212      m_i2c_mem = m_i2cmem->read_sda();
223213      return (m_i2c_mem & 1) << 7;
224214   }
225215   if (offset == 0x38fffe/2)
r26472r26473
251241   {
252242      m_i2c_clk = BIT(data, 9);
253243      m_i2c_mem = BIT(data, 8);
254      i2cmem_scl_write(m_i2cmem, m_i2c_clk);
255      i2cmem_sda_write(m_i2cmem, m_i2c_mem);
244      m_i2cmem->write_scl(m_i2c_clk);
245      m_i2cmem->write_sda(m_i2c_mem);
256246   }
257247   if (offset == 0x38fffe/2)
258248   {
trunk/src/mess/machine/nes_bandai.c
r26472r26473
408408      case 0x0d:
409409         m_i2c_clk = BIT(data, 5);
410410         m_i2c_mem = BIT(data, 6);
411         i2cmem_scl_write(m_i2cmem, m_i2c_clk);
412         i2cmem_sda_write(m_i2cmem, m_i2c_mem);
411         m_i2cmem->write_scl(m_i2c_clk);
412         m_i2cmem->write_sda(m_i2c_mem);
413413         break;
414414      default:
415415         lz93d50_write(space, offset & 0x0f, data, mem_mask);
r26472r26473
420420READ8_MEMBER(nes_lz93d50_24c01_device::read_m)
421421{
422422   LOG_MMC(("lz93d50 EEPROM read, offset: %04x\n", offset));
423   return (i2cmem_sda_read(m_i2cmem) & 1) << 4;
423   return (m_i2cmem->read_sda() & 1) << 4;
424424}
425425
426426//-------------------------------------------------
427427//  SERIAL I2C DEVICE
428428//-------------------------------------------------
429429
430static const i2cmem_interface bandai_24c01_i2cmem_interface =
431{
432   I2CMEM_SLAVE_ADDRESS, 4, 0x80
433};
434
435430MACHINE_CONFIG_FRAGMENT( bandai_i2c_24c01 )
436   MCFG_I2CMEM_ADD("i2cmem", bandai_24c01_i2cmem_interface)
431   MCFG_24C01_ADD("i2cmem")
437432MACHINE_CONFIG_END
438433
439434machine_config_constructor nes_lz93d50_24c01_device::device_mconfig_additions() const
r26472r26473
443438
444439
445440
446static const i2cmem_interface bandai_24c02_i2cmem_interface =
447{
448   I2CMEM_SLAVE_ADDRESS, 4, 0x100
449};
450
451
452441MACHINE_CONFIG_FRAGMENT( bandai_i2c_24c02 )
453   MCFG_I2CMEM_ADD("i2cmem", bandai_24c02_i2cmem_interface)
442   MCFG_24C02_ADD("i2cmem")
454443MACHINE_CONFIG_END
455444
456445machine_config_constructor nes_lz93d50_24c02_device::device_mconfig_additions() const
trunk/src/mess/includes/cxhumax.h
r26472r26473
3232      m_maincpu(*this, "maincpu"),
3333      m_flash(*this, "flash"),
3434      m_ram(*this, "ram"),
35      m_terminal(*this, TERMINAL_TAG) { }
35      m_terminal(*this, TERMINAL_TAG),
36      m_i2cmem(*this, "eeprom")
37   {
38   }
3639
3740   required_device<cpu_device> m_maincpu;
3841   required_device<intel_28f320j3d_device> m_flash;
r26472r26473
135138
136139   UINT32 m_i2c0_regs[0x20/4];
137140   UINT32 m_i2c1_regs[0x20/4];
138   device_t *m_i2cmem;
141   required_device<i2cmem_device> m_i2cmem;
139142   UINT32 m_i2c2_regs[0x20/4];
140143
144   void i2cmem_start();
145   void i2cmem_stop();
146   UINT8 i2cmem_read_byte(int last);
147   void i2cmem_write_byte(UINT8 data);
148
141149   UINT32 m_mccfg_regs[0x0C/4];
142150
143151   UINT32 m_chipcontrol_regs[0x74/4];
trunk/src/mame/drivers/ertictac.c
r26472r26473
221221#define NVRAM_SIZE 256
222222#define NVRAM_PAGE_SIZE 0   /* max size of one write request */
223223
224static const i2cmem_interface i2cmem_interface =
225{
226   I2CMEM_SLAVE_ADDRESS, NVRAM_PAGE_SIZE, NVRAM_SIZE
227};
228
229224static MACHINE_CONFIG_START( ertictac, ertictac_state )
230225
231226   MCFG_CPU_ADD("maincpu", ARM, XTAL_24MHz/3) /* guess, 12MHz 8MHz or 6MHz, what's the correct divider 2, 3 or 4? */
232227   MCFG_CPU_PROGRAM_MAP(ertictac_map)
233228   MCFG_CPU_PERIODIC_INT_DRIVER(ertictac_state, ertictac_podule_irq, 60) // FIXME: timing of this
234229
235   MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
230   MCFG_I2CMEM_ADD("i2cmem")
231   MCFG_I2CMEM_PAGE_SIZE(NVRAM_PAGE_SIZE)
232   MCFG_I2CMEM_DATA_SIZE(NVRAM_SIZE)
236233//  MCFG_AAKART_ADD("kart", XTAL_24MHz/3) // TODO: frequency
237234
238235   MCFG_SCREEN_ADD("screen", RASTER)
trunk/src/mame/drivers/peplus.c
r26472r26473
197197      m_sd000_ram(*this, "sd000_ram"),
198198      m_sf000_ram(*this, "sf000_ram"),
199199      m_io_port(*this, "io_port"),
200      m_maincpu(*this, "maincpu") { }
200      m_maincpu(*this, "maincpu"),
201      m_i2cmem(*this, "i2cmem")
202   {
203   }
201204
202205   required_shared_ptr<UINT8> m_cmos_ram;
203206   required_shared_ptr<UINT8> m_program_ram;
r26472r26473
277280   void peplus_load_superdata(const char *bank_name);
278281   void peplus_init();
279282   required_device<cpu_device> m_maincpu;
283   required_device<i2cmem_device> m_i2cmem;
280284
281285protected:
282286   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
r26472r26473
291295#define SOUND_CLOCK         ((MASTER_CLOCK)/12)
292296
293297
294#define eeprom_NVRAM_SIZE   0x200 // 4k Bit
295
296/* EEPROM is a X2404P 4K-bit Serial I2C Bus */
297static const i2cmem_interface i2cmem_interface =
298{
299   I2CMEM_SLAVE_ADDRESS, 8, eeprom_NVRAM_SIZE
300};
301
302298/* prototypes */
303299
304300static MC6845_ON_UPDATE_ADDR_CHANGED(crtc_addr);
r26472r26473
529525
530526WRITE8_MEMBER(peplus_state::i2c_nvram_w)
531527{
532   device_t *device = machine().device("i2cmem");
533   i2cmem_scl_write(device,BIT(data, 2));
528   m_i2cmem->write_scl(BIT(data, 2));
534529   m_sda_dir = BIT(data, 1);
535   i2cmem_sda_write(device,BIT(data, 0));
530   m_i2cmem->write_sda(BIT(data, 0));
536531}
537532
538533
r26472r26473
855850
856851READ8_MEMBER(peplus_state::peplus_input_bank_a_r)
857852{
858   device_t *device = machine().device("i2cmem");
859853/*
860854        Bit 0 = COIN DETECTOR A
861855        Bit 1 = COIN DETECTOR B
r26472r26473
875869   UINT8 sda = 0;
876870   if(!m_sda_dir)
877871   {
878      sda = i2cmem_sda_read(device);
872      sda = m_i2cmem->read_sda();
879873   }
880874
881875   if ((ioport("SENSOR")->read_safe(0x00) & 0x01) == 0x01 && m_coin_state == 0) {
r26472r26473
13461340   MCFG_PALETTE_LENGTH(16*16*2)
13471341
13481342   MCFG_MC6845_ADD("crtc", R6545_1, "screen", MC6845_CLOCK, mc6845_intf)
1349   MCFG_I2CMEM_ADD("i2cmem", i2cmem_interface)
1343   MCFG_X2404P_ADD("i2cmem")
13501344
13511345
13521346   // sound hardware
trunk/src/mame/drivers/cd32.c
r26472r26473
3131#include "cpu/m68000/m68000.h"
3232#include "sound/cdda.h"
3333#include "machine/6526cia.h"
34#include "machine/i2cmem.h"
3534#include "includes/cd32.h"
3635#include "imagedev/chd_cd.h"
3736#include "machine/amigafdc.h"
r26472r26473
764763#define NVRAM_SIZE 1024
765764#define NVRAM_PAGE_SIZE 16  /* max size of one write request */
766765
767static const i2cmem_interface i2cmem_interface =
768{
769   I2CMEM_SLAVE_ADDRESS, NVRAM_PAGE_SIZE, NVRAM_SIZE
770};
771
772766static MACHINE_CONFIG_START( cd32base, cd32_state )
773767
774768   /* basic machine hardware */
r26472r26473
779773   MCFG_MACHINE_START_OVERRIDE(amiga_state, amiga )
780774   MCFG_MACHINE_RESET_OVERRIDE(amiga_state,amiga)
781775
782   MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
776   MCFG_I2CMEM_ADD("i2cmem")
777   MCFG_I2CMEM_PAGE_SIZE(NVRAM_PAGE_SIZE)
778   MCFG_I2CMEM_DATA_SIZE(NVRAM_SIZE)
783779
784780   /* video hardware */
785781   MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
trunk/src/mame/drivers/splus.c
r26472r26473
3838      m_program_ram(*this, "program_ram"),
3939      m_reel_ram(*this, "reel_ram"),
4040      m_io_port(*this, "io_port"),
41      m_maincpu(*this, "maincpu") {
41      m_maincpu(*this, "maincpu"),
42      m_i2cmem(*this, "i2cmem")
43   {
4244      m_sda_dir = 0;
4345      m_coin_state = 0;
4446      m_last_cycles = 0;
r26472r26473
103105   DECLARE_READ8_MEMBER(splus_reel_optics_r);
104106   DECLARE_DRIVER_INIT(splus);
105107   required_device<cpu_device> m_maincpu;
108   required_device<i2cmem_device> m_i2cmem;
106109};
107110
108111/* Static Variables */
r26472r26473
126129#define CPU_CLOCK           ((MASTER_CLOCK)/2)      /* divided by 2 - 7474 */
127130#define SOUND_CLOCK         ((MASTER_CLOCK)/12)
128131
129/* Static Variables */
130#define EEPROM_NVRAM_SIZE   0x200 // 4k Bit
131132
132/* EEPROM is a X2404P 4K-bit Serial I2C Bus */
133static const i2cmem_interface i2cmem_interface =
134{
135   I2CMEM_SLAVE_ADDRESS, 8, EEPROM_NVRAM_SIZE
136};
137
138133/*****************
139134* Write Handlers *
140135******************/
r26472r26473
357352
358353WRITE8_MEMBER(splus_state::i2c_nvram_w)
359354{
360   device_t *device = machine().device("i2cmem");
361   i2cmem_scl_write(device,BIT(data, 2));
355   m_i2cmem->write_scl(BIT(data, 2));
362356   m_sda_dir = BIT(data, 1);
363   i2cmem_sda_write(device,BIT(data, 0));
357   m_i2cmem->write_sda(BIT(data, 0));
364358}
365359
366360/****************
r26472r26473
539533
540534READ8_MEMBER(splus_state::splus_reel_optics_r)
541535{
542   device_t *device = machine().device("i2cmem");
543
544536/*
545537        Bit 0 = REEL #1
546538        Bit 1 = REEL #2
r26472r26473
559551
560552   if(!m_sda_dir)
561553   {
562      sda = i2cmem_sda_read(device);
554      sda = m_i2cmem->read_sda();
563555   }
564556
565557   reel_optics = reel_optics | 0x40 | (sda<<7);
r26472r26473
694686   MCFG_SCREEN_SIZE((52+1)*8, (31+1)*8)
695687   MCFG_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 25*8-1)
696688
697   MCFG_I2CMEM_ADD("i2cmem", i2cmem_interface)
689   MCFG_X2404P_ADD("i2cmem")
698690
699691   // sound hardware
700692   MCFG_SPEAKER_STANDARD_MONO("mono")
trunk/src/mame/drivers/twinkle.c
r26472r26473
273273   DECLARE_READ16_MEMBER(shared_68k_r);
274274   DECLARE_WRITE16_MEMBER(shared_68k_w);
275275   DECLARE_WRITE_LINE_MEMBER(ide_interrupt);
276   DECLARE_DRIVER_INIT(twinklei);
277276   required_device<cpu_device> m_maincpu;
278277   required_device<cpu_device> m_audiocpu;
279278
r26472r26473
854853   }
855854}
856855
857DRIVER_INIT_MEMBER(twinkle_state,twinklei)
858{
859   device_t *i2cmem = machine().device("security");
860   i2cmem_e0_write( i2cmem, 0 );
861   i2cmem_e1_write( i2cmem, 0 );
862   i2cmem_e2_write( i2cmem, 0 );
863   i2cmem_wc_write( i2cmem, 0 );
864}
865
866static const i2cmem_interface i2cmem_interface =
867{
868   I2CMEM_SLAVE_ADDRESS, 0, 0x100
869};
870
871856static const rtc65271_interface twinkle_rtc =
872857{
873858   DEVCB_NULL
r26472r26473
919904MACHINE_CONFIG_END
920905
921906static MACHINE_CONFIG_DERIVED( twinklei, twinkle )
922   MCFG_I2CMEM_ADD("security",i2cmem_interface)
907   MCFG_I2CMEM_ADD("security")
908   MCFG_I2CMEM_DATA_SIZE(0x100)
923909MACHINE_CONFIG_END
924910
925911static INPUT_PORTS_START( twinkle )
r26472r26473
976962   PORT_INCLUDE( twinkle )
977963
978964   PORT_MODIFY("OUTSEC")
979   PORT_BIT( 0x00000010, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("security", i2cmem_scl_write)
980   PORT_BIT( 0x00000008, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("security", i2cmem_sda_write)
965   PORT_BIT( 0x00000010, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("security", i2cmem_device, write_scl)
966   PORT_BIT( 0x00000008, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("security", i2cmem_device, write_sda)
981967
982968   PORT_MODIFY("INSEC")
983   PORT_BIT( 0x00001000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_READ_LINE_DEVICE("security", i2cmem_sda_read)
969   PORT_BIT( 0x00001000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_READ_LINE_DEVICE_MEMBER("security", i2cmem_device, read_sda)
984970INPUT_PORTS_END
985971
986972#define TWINKLE_BIOS    \
r26472r26473
12441230GAME( 1999, bmiidxca, bmiidxc, twinkle,  twinkle,  driver_device, 0,        ROT0, "Konami", "beatmania IIDX with DDR 2nd Club Version (896 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
12451231GAME( 1999, bmiidxs,  gq863,   twinkle,  twinkle,  driver_device, 0,        ROT0, "Konami", "beatmania IIDX Substream (983 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
12461232GAME( 1999, bmiidxc2, gq863,   twinkle,  twinkle,  driver_device, 0,        ROT0, "Konami", "Beatmania IIDX Substream with DDR 2nd Club Version 2 (984 A01 BM)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1247GAME( 1999, bmiidx2,  gq863,   twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 2nd style (GC985 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1248GAME( 2000, bmiidx3,  gq863,   twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAC)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1249GAME( 2000, bmiidx3a, bmiidx3, twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1250GAME( 2000, bmiidx4,  gq863,   twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 4th style (GCA03 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1251GAME( 2001, bmiidx5,  gq863,   twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 5th style (GCA17 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1252GAME( 2001, bmiidx6,  gq863,   twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAB)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1253GAME( 2001, bmiidx6a, bmiidx6, twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1254GAME( 2002, bmiidx7,  gq863,   twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 7th style (GCB44 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1255GAME( 2002, bmiidx8,  gq863,   twinklei, twinklei, twinkle_state, twinklei, ROT0, "Konami", "beatmania IIDX 8th style (GCC44 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1233GAME( 1999, bmiidx2,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 2nd style (GC985 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1234GAME( 2000, bmiidx3,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAC)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1235GAME( 2000, bmiidx3a, bmiidx3, twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 3rd style (GC992 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1236GAME( 2000, bmiidx4,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 4th style (GCA03 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1237GAME( 2001, bmiidx5,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 5th style (GCA17 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1238GAME( 2001, bmiidx6,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAB)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1239GAME( 2001, bmiidx6a, bmiidx6, twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 6th style (GCB4U JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1240GAME( 2002, bmiidx7,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 7th style (GCB44 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
1241GAME( 2002, bmiidx8,  gq863,   twinklei, twinklei, driver_device, 0,        ROT0, "Konami", "beatmania IIDX 8th style (GCC44 JAA)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING  )
trunk/src/mame/drivers/aristmk5.c
r26472r26473
412412#if 0
413413#define NVRAM_SIZE 256
414414#define NVRAM_PAGE_SIZE 0   /* max size of one write request */
415
416static const i2cmem_interface i2cmem_interface =
417{
418   I2CMEM_SLAVE_ADDRESS, NVRAM_PAGE_SIZE, NVRAM_SIZE
419};
420415#endif
421416
422417/* TODO: this isn't supposed to access a keyboard ... */
r26472r26473
431426   MCFG_CPU_PROGRAM_MAP(aristmk5_drame_map)
432427   MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(2))  /* 1.6 - 2 seconds */
433428
434//  MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
429//  MCFG_I2CMEM_ADD("i2cmem")
430//  MCFG_I2CMEM_PAGE_SIZE(NVRAM_PAGE_SIZE)
431//  MCFG_I2CMEM_DATA_SIZE(NVRAM_SIZE)
435432   MCFG_AAKART_ADD("kart", 12000000/128, kart_interface) // TODO: frequency
436433
437434   MCFG_SCREEN_ADD("screen", RASTER)
r26472r26473
475472   MCFG_CPU_PROGRAM_MAP(aristmk5_map)
476473   MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(2))  /* 1.6 - 2 seconds */
477474
478//  MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
475//  MCFG_I2CMEM_ADD("i2cmem")
476//  MCFG_I2CMEM_PAGE_SIZE(NVRAM_PAGE_SIZE)
477//  MCFG_I2CMEM_DATA_SIZE(NVRAM_SIZE)
479478   MCFG_AAKART_ADD("kart", 12000000/128, kart_interface) // TODO: frequency
480479
481480   MCFG_SCREEN_ADD("screen", RASTER)
trunk/src/mame/drivers/ghosteo.c
r26472r26473
346346WRITE_LINE_MEMBER(ghosteo_state::s3c2410_i2c_scl_w )
347347{
348348//  logerror( "s3c2410_i2c_scl_w %d\n", state ? 1 : 0);
349   i2cmem_scl_write( m_i2cmem, state);
349   m_i2cmem->write_scl(state);
350350}
351351
352352READ_LINE_MEMBER(ghosteo_state::s3c2410_i2c_sda_r )
353353{
354354   int state;
355   state = i2cmem_sda_read( m_i2cmem );
355   state = m_i2cmem->read_sda();
356356//  logerror( "s3c2410_i2c_sda_r %d\n", state ? 1 : 0);
357357   return state;
358358}
r26472r26473
360360WRITE_LINE_MEMBER(ghosteo_state::s3c2410_i2c_sda_w )
361361{
362362//  logerror( "s3c2410_i2c_sda_w %d\n", state ? 1 : 0);
363   i2cmem_sda_write( m_i2cmem, state);
363   m_i2cmem->write_sda(state);
364364}
365365
366366WRITE32_MEMBER(ghosteo_state::sound_w)
r26472r26473
556556   { DEVCB_DRIVER_MEMBER(ghosteo_state,s3c2410_nand_command_w), DEVCB_DRIVER_MEMBER(ghosteo_state,s3c2410_nand_address_w), DEVCB_DRIVER_MEMBER(ghosteo_state,s3c2410_nand_data_r), DEVCB_DRIVER_MEMBER(ghosteo_state,s3c2410_nand_data_w) }
557557};
558558
559static const i2cmem_interface bballoon_i2cmem_interface =
560{
561   I2CMEM_SLAVE_ADDRESS, 0, 256
562};
563559
564static const i2cmem_interface touryuu_i2cmem_interface =
565{
566   I2CMEM_SLAVE_ADDRESS, 0, 1024
567};
568560
569
570
571561READ32_MEMBER(ghosteo_state::bballoon_speedup_r)
572562{
573563   UINT32 ret = s3c2410_lcd_r(m_s3c2410, space, offset+0x10/4, mem_mask);
r26472r26473
630620static MACHINE_CONFIG_DERIVED( bballoon, ghosteo )
631621   MCFG_CPU_MODIFY("maincpu")
632622   MCFG_CPU_PROGRAM_MAP(bballoon_map)
633   MCFG_I2CMEM_ADD("i2cmem", bballoon_i2cmem_interface)
623   MCFG_I2CMEM_ADD("i2cmem")
624   MCFG_I2CMEM_DATA_SIZE(256)
634625MACHINE_CONFIG_END
635626
636627static MACHINE_CONFIG_DERIVED( touryuu, ghosteo )
637628   MCFG_CPU_MODIFY("maincpu")
638629   MCFG_CPU_PROGRAM_MAP(touryuu_map)
639   MCFG_I2CMEM_ADD("i2cmem", touryuu_i2cmem_interface)
630   MCFG_I2CMEM_ADD("i2cmem")
631   MCFG_I2CMEM_DATA_SIZE(1024)
640632MACHINE_CONFIG_END
641633
642634
trunk/src/mame/machine/archimds.c
r26472r26473
469469
470470         if ( m_i2cmem )
471471         {
472            i2c_data = (i2cmem_sda_read(m_i2cmem) & 1);
472            i2c_data = (m_i2cmem->read_sda() & 1);
473473         }
474474
475475         return (flyback) | (m_ioc_regs[CONTROL] & 0x7c) | (m_i2c_clk<<1) | i2c_data;
r26472r26473
537537         //logerror("IOC I2C: CLK %d DAT %d\n", (data>>1)&1, data&1);
538538         if ( m_i2cmem )
539539         {
540            i2cmem_sda_write(m_i2cmem, data & 0x01);
541            i2cmem_scl_write(m_i2cmem, (data & 0x02) >> 1);
540            m_i2cmem->write_sda(data & 0x01);
541            m_i2cmem->write_scl((data & 0x02) >> 1);
542542         }
543543         m_i2c_clk = (data & 2) >> 1;
544544         break;
trunk/src/mame/machine/cd32.c
r26472r26473
22#include "cdrom.h"
33#include "coreutil.h"
44#include "sound/cdda.h"
5#include "machine/i2cmem.h"
65#include "imagedev/chd_cd.h"
76#include "includes/cd32.h"
87
r26472r26473
213212   m_i2c_scl_dir = BIT(data,15);
214213   m_i2c_sda_dir = BIT(data,14);
215214
216   i2cmem_scl_write( m_i2cmem, m_i2c_scl_out );
217   i2cmem_sda_write( m_i2cmem, m_i2c_sda_out );
215   m_i2cmem->write_scl( m_i2c_scl_out );
216   m_i2cmem->write_sda( m_i2c_sda_out );
218217}
219218
220219UINT32 akiko_device::nvram_read()
r26472r26473
236235   }
237236   else
238237   {
239      v |= i2cmem_sda_read( m_i2cmem ) << 30;
238      v |= m_i2cmem->read_sda() << 30;
240239   }
241240
242241   v |= m_i2c_scl_dir << 15;
trunk/src/mame/includes/cd32.h
r26472r26473
1010#include "includes/amiga.h"
1111#include "machine/microtch.h"
1212#include "sound/cdda.h"
13#include "machine/i2cmem.h"
1314
1415class cd32_state : public amiga_state
1516{
r26472r26473
105106   UINT8 * m_cdrom_toc;
106107   emu_timer *m_dma_timer;
107108   emu_timer *m_frame_timer;
108   device_t *m_i2cmem;
109   i2cmem_device *m_i2cmem;
109110
110111   int m_cdrom_is_device;
111112
trunk/src/mame/includes/archimds.h
r26472r26473
8888
8989protected:
9090   required_device<cpu_device> m_maincpu;
91   optional_device<device_t> m_i2cmem;
91   optional_device<i2cmem_device> m_i2cmem;
9292   optional_device<device_t> m_wd1772;
9393   required_memory_region m_region_maincpu;
9494   required_memory_region m_region_vram;

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