trunk/src/emu/cpu/tms9900/tms9900.c
| r26452 | r26453 | |
| 703 | 703 | { |
| 704 | 704 | ALU_SHIFT, |
| 705 | 705 | MEMORY_READ, |
| 706 | ALU_SHIFT, // 2 cycles if count != 0, else 4 |
| 707 | MEMORY_READ, // skipped if count != 0 |
| 708 | ALU_SHIFT, // skipped if count != 0 (4 cycles) |
| 706 | 709 | ALU_SHIFT, |
| 707 | | MEMORY_READ, |
| 708 | | ALU_SHIFT, |
| 709 | 710 | MEMORY_WRITE, |
| 711 | ALU_NOP, |
| 710 | 712 | END |
| 711 | 713 | }; |
| 712 | 714 | |
| r26452 | r26453 | |
| 2455 | 2457 | { |
| 2456 | 2458 | case 0: |
| 2457 | 2459 | m_address = WP + ((IR & 0x000f)<<1); |
| 2460 | pulse_clock(2); |
| 2458 | 2461 | break; |
| 2459 | 2462 | case 1: |
| 2460 | 2463 | // we have the value of the register in m_current_value |
| r26452 | r26453 | |
| 2466 | 2469 | |
| 2467 | 2470 | if (m_current_value != 0) |
| 2468 | 2471 | { |
| 2469 | | // skip the next read operation |
| 2470 | | MPC++; |
| 2472 | // skip the next read and ALU operation |
| 2473 | MPC = MPC+2; |
| 2474 | m_state++; |
| 2471 | 2475 | } |
| 2472 | 2476 | else |
| 2473 | 2477 | { |
| 2474 | 2478 | if (TRACE_ALU) logerror("tms99xx: Shift operation gets count from R0\n"); |
| 2479 | pulse_clock(2); |
| 2475 | 2480 | } |
| 2481 | pulse_clock(2); |
| 2476 | 2482 | break; |
| 2477 | 2483 | case 2: |
| 2484 | // after READ |
| 2485 | pulse_clock(2); |
| 2486 | pulse_clock(2); |
| 2487 | break; |
| 2488 | case 3: |
| 2478 | 2489 | count = m_current_value & 0x000f; // from the instruction or from R0 |
| 2479 | 2490 | if (count==0) count = 16; |
| 2480 | 2491 | |
| r26452 | r26453 | |
| 2517 | 2528 | break; |
| 2518 | 2529 | } |
| 2519 | 2530 | m_state++; |
| 2520 | | pulse_clock(2); |
| 2521 | 2531 | } |
| 2522 | 2532 | |
| 2523 | 2533 | void tms99xx_device::alu_ai_ori() |