trunk/src/emu/machine/tmp68301.c
| r26426 | r26427 | |
| 18 | 18 | AM_RANGE(0x094,0x095) AM_READWRITE(imr_r,imr_w) |
| 19 | 19 | AM_RANGE(0x098,0x099) AM_READWRITE(iisr_r,iisr_w) |
| 20 | 20 | |
| 21 | | /* Serial */ |
| 21 | /* Parallel Port */ |
| 22 | AM_RANGE(0x10a,0x10b) AM_READWRITE(pdr_r,pdr_w) |
| 23 | |
| 24 | /* Serial Port */ |
| 22 | 25 | AM_RANGE(0x18e,0x18f) AM_READWRITE(scr_r,scr_w) |
| 23 | 26 | ADDRESS_MAP_END |
| 24 | 27 | |
| r26426 | r26427 | |
| 62 | 65 | m_scr &= 0xa1; |
| 63 | 66 | } |
| 64 | 67 | |
| 68 | /* TODO: bit direction */ |
| 69 | READ16_MEMBER(tmp68301_device::pdr_r) |
| 70 | { |
| 71 | return m_in_parallel_func(0); |
| 72 | } |
| 65 | 73 | |
| 74 | WRITE16_MEMBER(tmp68301_device::pdr_w) |
| 75 | { |
| 76 | m_out_parallel_func(0,data); |
| 77 | } |
| 78 | |
| 79 | |
| 66 | 80 | tmp68301_device::tmp68301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 67 | 81 | : device_t(mconfig, TMP68301, "TMP68301", tag, owner, clock, "tmp68301", __FILE__), |
| 68 | 82 | device_memory_interface(mconfig, *this), |
| r26426 | r26427 | |
| 78 | 92 | |
| 79 | 93 | void tmp68301_device::device_config_complete() |
| 80 | 94 | { |
| 95 | // inherit a copy of the static data |
| 96 | const tmp68301_interface *intf = reinterpret_cast<const tmp68301_interface *>(static_config()); |
| 97 | if (intf != NULL) |
| 98 | *static_cast<tmp68301_interface *>(this) = *intf; |
| 99 | |
| 100 | // or defaults to 0 if none provided |
| 101 | else |
| 102 | { |
| 103 | memset(&m_in_parallel_cb, 0, sizeof(m_in_parallel_cb)); |
| 104 | memset(&m_out_parallel_cb, 0, sizeof(m_out_parallel_cb)); |
| 105 | |
| 106 | } |
| 81 | 107 | } |
| 82 | 108 | |
| 83 | 109 | //------------------------------------------------- |
| r26426 | r26427 | |
| 89 | 115 | int i; |
| 90 | 116 | for (i = 0; i < 3; i++) |
| 91 | 117 | m_tmp68301_timer[i] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(tmp68301_device::timer_callback), this)); |
| 118 | |
| 119 | m_in_parallel_func.resolve(m_in_parallel_cb, *this); |
| 120 | m_out_parallel_func.resolve(m_out_parallel_cb, *this); |
| 92 | 121 | } |
| 93 | 122 | |
| 94 | 123 | //------------------------------------------------- |
trunk/src/emu/machine/tmp68301.h
| r26426 | r26427 | |
| 1 | 1 | #ifndef TMP68301_H |
| 2 | 2 | #define TMP68301_H |
| 3 | 3 | |
| 4 | //************************************************************************** |
| 5 | // INTERFACE CONFIGURATION MACROS |
| 6 | //************************************************************************** |
| 7 | |
| 8 | /* TODO: frequency & hook it up with m68k */ |
| 9 | #define MCFG_TMP68301_ADD(_tag, _config) \ |
| 10 | MCFG_DEVICE_ADD(_tag, TMP68301, 0) \ |
| 11 | MCFG_DEVICE_CONFIG(_config) |
| 12 | |
| 13 | #define MCFG_TMP68301_MODIFY(_tag, _config) \ |
| 14 | MCFG_DEVICE_MODIFY(_tag) \ |
| 15 | MCFG_DEVICE_CONFIG(_config) |
| 16 | |
| 17 | |
| 18 | #define TMP68301_INTERFACE(name) \ |
| 19 | const tmp68301_interface (name) = |
| 20 | |
| 21 | |
| 22 | //************************************************************************** |
| 23 | // TYPE DEFINITIONS |
| 24 | //************************************************************************** |
| 25 | |
| 26 | // ======================> mb_vcu_interface |
| 27 | |
| 28 | struct tmp68301_interface |
| 29 | { |
| 30 | devcb_read16 m_in_parallel_cb; |
| 31 | devcb_write16 m_out_parallel_cb; |
| 32 | // TODO: serial ports |
| 33 | }; |
| 34 | |
| 4 | 35 | class tmp68301_device : public device_t, |
| 5 | | public device_memory_interface |
| 36 | public device_memory_interface, |
| 37 | public tmp68301_interface |
| 6 | 38 | { |
| 7 | 39 | public: |
| 8 | 40 | tmp68301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| r26426 | r26427 | |
| 23 | 55 | DECLARE_WRITE16_MEMBER(iisr_w); |
| 24 | 56 | DECLARE_READ16_MEMBER(scr_r); |
| 25 | 57 | DECLARE_WRITE16_MEMBER(scr_w); |
| 58 | DECLARE_READ16_MEMBER(pdr_r); |
| 59 | DECLARE_WRITE16_MEMBER(pdr_w); |
| 26 | 60 | |
| 27 | 61 | protected: |
| 28 | 62 | // device-level overrides |
| r26426 | r26427 | |
| 31 | 65 | virtual void device_reset(); |
| 32 | 66 | virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const; |
| 33 | 67 | |
| 68 | devcb_resolved_read16 m_in_parallel_func; |
| 69 | devcb_resolved_write16 m_out_parallel_func; |
| 34 | 70 | private: |
| 35 | 71 | // internal state |
| 36 | 72 | UINT16 m_regs[0x400]; |
| r26426 | r26427 | |
| 56 | 92 | |
| 57 | 93 | extern const device_type TMP68301; |
| 58 | 94 | |
| 59 | | #define MCFG_TMP68301_ADD(_tag) \ |
| 60 | | MCFG_DEVICE_ADD(_tag, TMP68301, 0) |
| 61 | | |
| 62 | 95 | #endif |
trunk/src/mame/includes/niyanpai.h
| r26426 | r26427 | |
| 1 | 1 | #include "sound/dac.h" |
| 2 | #include "machine/tmp68301.h" |
| 2 | 3 | #define VRAM_MAX 3 |
| 3 | 4 | |
| 4 | 5 | class niyanpai_state : public driver_device |
| r26426 | r26427 | |
| 12 | 13 | niyanpai_state(const machine_config &mconfig, device_type type, const char *tag) |
| 13 | 14 | : driver_device(mconfig, type, tag) , |
| 14 | 15 | m_maincpu(*this, "maincpu"), |
| 16 | m_tmp68301(*this, "tmp68301"), |
| 15 | 17 | m_dac1(*this, "dac1"), |
| 16 | 18 | m_dac2(*this, "dac2") { } |
| 17 | 19 | |
| r26426 | r26427 | |
| 86 | 88 | DECLARE_WRITE16_MEMBER(niyanpai_clutsel_2_w); |
| 87 | 89 | DECLARE_CUSTOM_INPUT_MEMBER(musobana_outcoin_flag_r); |
| 88 | 90 | DECLARE_DRIVER_INIT(niyanpai); |
| 91 | DECLARE_WRITE16_MEMBER(tmp68301_parallel_port_w); |
| 92 | UINT8 m_motor_on; |
| 89 | 93 | virtual void machine_reset(); |
| 90 | 94 | virtual void video_start(); |
| 91 | 95 | UINT32 screen_update_niyanpai(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| r26426 | r26427 | |
| 99 | 103 | void niyanpai_gfxdraw(int vram); |
| 100 | 104 | void niyanpai_soundbank_w(int data); |
| 101 | 105 | required_device<cpu_device> m_maincpu; |
| 106 | required_device<tmp68301_device> m_tmp68301; |
| 102 | 107 | required_device<dac_device> m_dac1; |
| 103 | 108 | required_device<dac_device> m_dac2; |
| 104 | 109 | |
trunk/src/mame/drivers/niyanpai.c
| r26426 | r26427 | |
| 23 | 23 | /****************************************************************************** |
| 24 | 24 | Memo: |
| 25 | 25 | |
| 26 | | - TMP68301 emulation is not implemented (machine/m68kfmly.c, .h does nothing). |
| 27 | | |
| 28 | 26 | - niyanpai's 2p start does not mean 2p simultaneous or exchanging play. |
| 29 | 27 | Simply uses controls for 2p side. |
| 30 | 28 | |
| r26426 | r26427 | |
| 38 | 36 | #include "emu.h" |
| 39 | 37 | #include "cpu/z80/z80.h" |
| 40 | 38 | #include "cpu/m68000/m68000.h" |
| 41 | | #include "machine/m68kfmly.h" |
| 39 | #include "machine/tmp68301.h" |
| 42 | 40 | #include "machine/z80ctc.h" |
| 43 | 41 | #include "includes/nb1413m3.h" |
| 44 | 42 | #include "sound/dac.h" |
| r26426 | r26427 | |
| 306 | 304 | return (portdata); |
| 307 | 305 | } |
| 308 | 306 | |
| 309 | | CUSTOM_INPUT_MEMBER(niyanpai_state::musobana_outcoin_flag_r) |
| 307 | WRITE16_MEMBER(niyanpai_state::tmp68301_parallel_port_w) |
| 310 | 308 | { |
| 311 | | address_space &space = m_maincpu->space(AS_PROGRAM); |
| 312 | 309 | // tmp68301_parallel_interface[0x05] |
| 313 | 310 | // bit 0 coin counter |
| 314 | 311 | // bit 2 motor on |
| 315 | 312 | // bit 3 coin lock |
| 313 | // bit 8-9 video page select? |
| 316 | 314 | |
| 317 | | if (tmp68301_parallel_interface_r(space, 0x0005, 0x00ff) & 0x0004) m_musobana_outcoin_flag ^= 1; |
| 315 | m_motor_on = data & 4; |
| 316 | coin_counter_w(machine(),0,data & 1); |
| 317 | coin_lockout_w(machine(), 0,data & 0x08); |
| 318 | } |
| 319 | |
| 320 | CUSTOM_INPUT_MEMBER(niyanpai_state::musobana_outcoin_flag_r) |
| 321 | { |
| 322 | if (m_motor_on) m_musobana_outcoin_flag ^= 1; |
| 318 | 323 | else m_musobana_outcoin_flag = 1; |
| 319 | 324 | |
| 320 | 325 | return m_musobana_outcoin_flag & 0x01; |
| r26426 | r26427 | |
| 325 | 330 | m_musobana_inputport = data; |
| 326 | 331 | } |
| 327 | 332 | |
| 328 | | static ADDRESS_MAP_START( tmp68301_regs, AS_PROGRAM, 16, niyanpai_state ) |
| 329 | | AM_RANGE(0xfffc00, 0xfffc0f) AM_READWRITE_LEGACY(tmp68301_address_decoder_r,tmp68301_address_decoder_w) |
| 330 | | AM_RANGE(0xfffc80, 0xfffc9f) AM_READWRITE_LEGACY(tmp68301_interrupt_controller_r,tmp68301_interrupt_controller_w) |
| 331 | | AM_RANGE(0xfffd00, 0xfffd0f) AM_READWRITE_LEGACY(tmp68301_parallel_interface_r,tmp68301_parallel_interface_w) |
| 332 | | AM_RANGE(0xfffd80, 0xfffdaf) AM_READWRITE_LEGACY(tmp68301_serial_interface_r,tmp68301_serial_interface_w) |
| 333 | | AM_RANGE(0xfffe00, 0xfffe4f) AM_READWRITE_LEGACY(tmp68301_timer_r,tmp68301_timer_w) |
| 334 | | ADDRESS_MAP_END |
| 335 | | |
| 336 | 333 | static ADDRESS_MAP_START( niyanpai_map, AS_PROGRAM, 16, niyanpai_state ) |
| 337 | 334 | AM_RANGE(0x000000, 0x03ffff) AM_ROM |
| 338 | 335 | AM_RANGE(0x040000, 0x040fff) AM_RAM AM_SHARE("nvram") |
| r26426 | r26427 | |
| 365 | 362 | AM_RANGE(0x240c00, 0x240c01) AM_WRITE(niyanpai_clutsel_1_w) |
| 366 | 363 | AM_RANGE(0x240e00, 0x240e01) AM_WRITE(niyanpai_clutsel_2_w) |
| 367 | 364 | |
| 368 | | AM_IMPORT_FROM( tmp68301_regs ) |
| 365 | AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w) // TMP68301 Registers |
| 369 | 366 | ADDRESS_MAP_END |
| 370 | 367 | |
| 371 | 368 | static ADDRESS_MAP_START( musobana_map, AS_PROGRAM, 16, niyanpai_state ) |
| r26426 | r26427 | |
| 403 | 400 | AM_RANGE(0x280200, 0x280201) AM_READ(musobana_inputport_0_r) |
| 404 | 401 | AM_RANGE(0x280400, 0x280401) AM_READ_PORT("SYSTEM") |
| 405 | 402 | |
| 406 | | AM_IMPORT_FROM( tmp68301_regs ) |
| 403 | AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w) // TMP68301 Registers |
| 407 | 404 | ADDRESS_MAP_END |
| 408 | 405 | |
| 409 | 406 | static ADDRESS_MAP_START( mhhonban_map, AS_PROGRAM, 16, niyanpai_state ) |
| r26426 | r26427 | |
| 443 | 440 | AM_RANGE(0x280200, 0x280201) AM_READ(musobana_inputport_0_r) |
| 444 | 441 | AM_RANGE(0x280400, 0x280401) AM_READ_PORT("SYSTEM") |
| 445 | 442 | |
| 446 | | AM_IMPORT_FROM( tmp68301_regs ) |
| 443 | AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w) // TMP68301 Registers |
| 447 | 444 | ADDRESS_MAP_END |
| 448 | 445 | |
| 449 | 446 | static ADDRESS_MAP_START( zokumahj_map, AS_PROGRAM, 16, niyanpai_state ) |
| r26426 | r26427 | |
| 482 | 479 | AM_RANGE(0x280200, 0x280201) AM_READ(musobana_inputport_0_r) |
| 483 | 480 | AM_RANGE(0x280400, 0x280401) AM_READ_PORT("SYSTEM") |
| 484 | 481 | |
| 485 | | AM_IMPORT_FROM( tmp68301_regs ) |
| 482 | AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w) // TMP68301 Registers |
| 486 | 483 | ADDRESS_MAP_END |
| 487 | 484 | |
| 488 | 485 | |
| r26426 | r26427 | |
| 928 | 925 | |
| 929 | 926 | INTERRUPT_GEN_MEMBER(niyanpai_state::niyanpai_interrupt) |
| 930 | 927 | { |
| 931 | | device.execute().set_input_line_and_vector(1, HOLD_LINE,0x100/4); |
| 928 | m_tmp68301->external_interrupt_0(); |
| 932 | 929 | } |
| 933 | 930 | |
| 934 | 931 | static const z80_daisy_config daisy_chain_sound[] = |
| r26426 | r26427 | |
| 937 | 934 | { NULL } |
| 938 | 935 | }; |
| 939 | 936 | |
| 937 | static TMP68301_INTERFACE( tmp68301_interface ) |
| 938 | { |
| 939 | DEVCB_NULL, |
| 940 | DEVCB_DRIVER_MEMBER16(niyanpai_state,tmp68301_parallel_port_w) |
| 941 | }; |
| 940 | 942 | |
| 941 | 943 | static MACHINE_CONFIG_START( niyanpai, niyanpai_state ) |
| 942 | 944 | |
| r26426 | r26427 | |
| 945 | 947 | MCFG_CPU_PROGRAM_MAP(niyanpai_map) |
| 946 | 948 | MCFG_CPU_VBLANK_INT_DRIVER("screen", niyanpai_state, niyanpai_interrupt) |
| 947 | 949 | |
| 950 | MCFG_TMP68301_ADD("tmp68301",tmp68301_interface) |
| 951 | |
| 948 | 952 | MCFG_CPU_ADD("audiocpu", Z80, 8000000) /* TMPZ84C011, 8.00 MHz */ |
| 949 | 953 | MCFG_CPU_CONFIG(daisy_chain_sound) |
| 950 | 954 | MCFG_CPU_PROGRAM_MAP(niyanpai_sound_map) |
trunk/src/mame/drivers/seta2.c
| r26426 | r26427 | |
| 210 | 210 | AM_RANGE(0xc50000, 0xc5ffff) AM_RAM // cleared |
| 211 | 211 | AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_SHARE("vregs") // Video Registers |
| 212 | 212 | AM_RANGE(0xe00010, 0xe0001f) AM_WRITE(seta2_sound_bank_w) // Samples Banks |
| 213 | | AM_RANGE(0xfffd0a, 0xfffd0b) AM_READWRITE(gundamex_eeprom_r,gundamex_eeprom_w) // parallel data register |
| 214 | 213 | AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w) // TMP68301 Registers |
| 215 | 214 | ADDRESS_MAP_END |
| 216 | 215 | |
| r26426 | r26427 | |
| 442 | 441 | AM_RANGE(0xc00000, 0xc3ffff) AM_RAM AM_SHARE("spriteram") // Sprites |
| 443 | 442 | AM_RANGE(0xc40000, 0xc4ffff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram") // Palette |
| 444 | 443 | AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_SHARE("vregs") // Video Registers |
| 445 | | AM_RANGE(0xfffd0a, 0xfffd0b) AM_WRITE(reelquak_leds_w ) // parallel data register (leds) |
| 446 | 444 | AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w) // TMP68301 Registers |
| 447 | 445 | ADDRESS_MAP_END |
| 448 | 446 | |
| r26426 | r26427 | |
| 502 | 500 | |
| 503 | 501 | AM_RANGE( 0x900000, 0x903fff ) AM_DEVREADWRITE("x1snd", x1_010_device, word_r, word_w) // Sound |
| 504 | 502 | |
| 505 | | AM_RANGE( 0xfffd0a, 0xfffd0b ) AM_READ_PORT("DSW2") // parallel data register (DSW 2) |
| 506 | 503 | AM_RANGE( 0xfffc00, 0xffffff ) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w) // TMP68301 Registers |
| 507 | 504 | ADDRESS_MAP_END |
| 508 | 505 | |
| r26426 | r26427 | |
| 1990 | 1987 | 0x0000, /* address */ |
| 1991 | 1988 | }; |
| 1992 | 1989 | |
| 1990 | static TMP68301_INTERFACE( tmp68301_default_intf ) |
| 1991 | { |
| 1992 | DEVCB_NULL, |
| 1993 | DEVCB_NULL |
| 1994 | }; |
| 1995 | |
| 1996 | |
| 1997 | static TMP68301_INTERFACE( tmp68301_gundamex_intf ) |
| 1998 | { |
| 1999 | DEVCB_DRIVER_MEMBER16(seta2_state,gundamex_eeprom_r), |
| 2000 | DEVCB_DRIVER_MEMBER16(seta2_state,gundamex_eeprom_w) |
| 2001 | }; |
| 2002 | |
| 2003 | static TMP68301_INTERFACE( tmp68301_reelquak_intf ) |
| 2004 | { |
| 2005 | DEVCB_NULL, |
| 2006 | DEVCB_DRIVER_MEMBER16(seta2_state,reelquak_leds_w) |
| 2007 | }; |
| 2008 | |
| 2009 | static TMP68301_INTERFACE( tmp68301_samshoot_intf ) |
| 2010 | { |
| 2011 | DEVCB_INPUT_PORT("DSW2"), |
| 2012 | DEVCB_NULL |
| 2013 | }; |
| 2014 | |
| 1993 | 2015 | static MACHINE_CONFIG_START( seta2, seta2_state ) |
| 1994 | 2016 | MCFG_CPU_ADD("maincpu", M68301, XTAL_50MHz/3) // !! TMP68301 !! |
| 1995 | 2017 | MCFG_CPU_PROGRAM_MAP(mj4simai_map) |
| 1996 | 2018 | MCFG_CPU_VBLANK_INT_DRIVER("screen", seta2_state, seta2_interrupt) |
| 1997 | 2019 | |
| 1998 | | MCFG_TMP68301_ADD("tmp68301") |
| 2020 | MCFG_TMP68301_ADD("tmp68301", tmp68301_default_intf) |
| 1999 | 2021 | |
| 2000 | | |
| 2001 | 2022 | // video hardware |
| 2002 | 2023 | MCFG_SCREEN_ADD("screen", RASTER) |
| 2003 | 2024 | MCFG_SCREEN_REFRESH_RATE(60) |
| r26426 | r26427 | |
| 2036 | 2057 | MCFG_CPU_MODIFY("maincpu") |
| 2037 | 2058 | MCFG_CPU_PROGRAM_MAP(gundamex_map) |
| 2038 | 2059 | |
| 2060 | MCFG_TMP68301_MODIFY("tmp68301",tmp68301_gundamex_intf) |
| 2061 | |
| 2039 | 2062 | MCFG_EEPROM_SERIAL_93C46_ADD("eeprom") |
| 2040 | 2063 | |
| 2041 | 2064 | // video hardware |
| r26426 | r26427 | |
| 2102 | 2125 | MCFG_CPU_MODIFY("maincpu") |
| 2103 | 2126 | MCFG_CPU_PROGRAM_MAP(reelquak_map) |
| 2104 | 2127 | |
| 2128 | MCFG_TMP68301_MODIFY("tmp68301",tmp68301_reelquak_intf) |
| 2129 | |
| 2105 | 2130 | MCFG_NVRAM_ADD_0FILL("nvram") |
| 2106 | 2131 | MCFG_TICKET_DISPENSER_ADD("ticket", attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW) |
| 2107 | 2132 | |
| r26426 | r26427 | |
| 2118 | 2143 | MCFG_CPU_PROGRAM_MAP(samshoot_map) |
| 2119 | 2144 | MCFG_CPU_PERIODIC_INT_DRIVER(seta2_state, samshoot_interrupt, 60) |
| 2120 | 2145 | |
| 2146 | MCFG_TMP68301_MODIFY("tmp68301",tmp68301_samshoot_intf) |
| 2147 | |
| 2121 | 2148 | MCFG_NVRAM_ADD_0FILL("nvram") |
| 2122 | 2149 | |
| 2123 | 2150 | // video hardware |
| r26426 | r26427 | |
| 2240 | 2267 | MCFG_CPU_PROGRAM_MAP(namcostr_map) |
| 2241 | 2268 | MCFG_CPU_VBLANK_INT_DRIVER("screen", seta2_state, seta2_interrupt) |
| 2242 | 2269 | |
| 2243 | | MCFG_TMP68301_ADD("tmp68301") |
| 2270 | MCFG_TMP68301_ADD("tmp68301",tmp68301_reelquak_intf) |
| 2244 | 2271 | |
| 2245 | 2272 | |
| 2246 | 2273 | // video hardware |
trunk/src/mame/machine/m68kfmly.c
| r26426 | r26427 | |
| 1 | | /****************************************************************************** |
| 2 | | |
| 3 | | TMP68301 support (dummy) driver |
| 4 | | |
| 5 | | Driver by Takahiro Nogi <nogi@kt.rim.or.jp> 2000/12/23 - |
| 6 | | |
| 7 | | ******************************************************************************/ |
| 8 | | /****************************************************************************** |
| 9 | | Memo: |
| 10 | | |
| 11 | | ******************************************************************************/ |
| 12 | | |
| 13 | | #include "emu.h" |
| 14 | | #include "m68kfmly.h" |
| 15 | | #include "cpu/m68000/m68000.h" |
| 16 | | |
| 17 | | |
| 18 | | #define VERBOSE 0 |
| 19 | | #define LOG(x) do { if (VERBOSE) logerror x; } while (0) |
| 20 | | |
| 21 | | |
| 22 | | // TMP68301 System Memory Map |
| 23 | | // |
| 24 | | // 0xFFFC00 - 0xFFFC0F TMP68301 Address decoder |
| 25 | | // 0xFFFC80 - 0xFFFC9F TMP68301 Interrupt controller |
| 26 | | // 0xFFFD00 - 0xFFFD0F TMP68301 Parallel interface |
| 27 | | // 0xFFFD80 - 0xFFFDAF TMP68301 Serial interface |
| 28 | | // 0xFFFE00 - 0xFFFE4F TMP68301 Timer |
| 29 | | // |
| 30 | | // Address decoder |
| 31 | | // 15 7 |
| 32 | | // 0xFFFC00 AMAR0 AAMR0 |
| 33 | | // 0xFFFC02 - AACR0 |
| 34 | | // 0xFFFC04 AMAR1 AAMR1 |
| 35 | | // 0xFFFC06 - AACR1 |
| 36 | | // 0xFFFC08 - AACR2 |
| 37 | | // 0xFFFC0A - ATOR |
| 38 | | // 0xFFFC0C ARELR |
| 39 | | // 0xFFFC0E - - |
| 40 | | // |
| 41 | | // Interrupt controller |
| 42 | | // 15 7 |
| 43 | | // 0xFFFC80 - ICR0 |
| 44 | | // 0xFFFC82 - ICR1 |
| 45 | | // 0xFFFC84 - ICR2 |
| 46 | | // 0xFFFC86 - ICR3 |
| 47 | | // 0xFFFC88 - ICR4 |
| 48 | | // 0xFFFC8A - ICR5 |
| 49 | | // 0xFFFC8C - ICR6 |
| 50 | | // 0xFFFC8E - ICR7 |
| 51 | | // 0xFFFC90 - ICR8 |
| 52 | | // 0xFFFC92 - ICR9 |
| 53 | | // 0xFFFC94 IMR |
| 54 | | // 0xFFFC96 IPR |
| 55 | | // 0xFFFC98 IISR |
| 56 | | // 0xFFFC9A - IVNR |
| 57 | | // 0xFFFC9C - IEIR |
| 58 | | // 0xFFFC9E - - |
| 59 | | // |
| 60 | | // Parallel interface |
| 61 | | // 15 7 |
| 62 | | // 0xFFFD00 PDIR |
| 63 | | // 0xFFFD02 - PCR |
| 64 | | // 0xFFFD04 - PSR |
| 65 | | // 0xFFFD06 - PCMR |
| 66 | | // 0xFFFD08 - PMR |
| 67 | | // 0xFFFD0A PDR |
| 68 | | // 0xFFFD0C - PPR1 |
| 69 | | // 0xFFFD0E - PPR2 |
| 70 | | // |
| 71 | | // Serial interface |
| 72 | | // 15 7 |
| 73 | | // 0xFFFD80 - SMR0 |
| 74 | | // 0xFFFD82 - SCMR0 |
| 75 | | // 0xFFFD84 - SBRR0 |
| 76 | | // 0xFFFD86 - SSR0 |
| 77 | | // 0xFFFD88 - SDR0 |
| 78 | | // 0xFFFD8A - - |
| 79 | | // 0xFFFD8C - SPR |
| 80 | | // 0xFFFD8E - SCR |
| 81 | | // 0xFFFD90 - SMR1 |
| 82 | | // 0xFFFD92 - SCMR1 |
| 83 | | // 0xFFFD94 - SBRR1 |
| 84 | | // 0xFFFD96 - SSR1 |
| 85 | | // 0xFFFD98 - SDR1 |
| 86 | | // 0xFFFD9A - - |
| 87 | | // 0xFFFD9C - - |
| 88 | | // 0xFFFD9E - - |
| 89 | | // 0xFFFDA0 - SMR2 |
| 90 | | // 0xFFFDA2 - SCMR2 |
| 91 | | // 0xFFFDA4 - SBRR2 |
| 92 | | // 0xFFFDA6 - SSR2 |
| 93 | | // 0xFFFDA8 - SDR2 |
| 94 | | // 0xFFFDAA - - |
| 95 | | // 0xFFFDAC - - |
| 96 | | // 0xFFFDAE - - |
| 97 | | // |
| 98 | | // Timer |
| 99 | | // 15 7 |
| 100 | | // 0xFFFE00 TCR0 |
| 101 | | // 0xFFFE02 - - |
| 102 | | // 0xFFFE04 TMCR0 |
| 103 | | // 0xFFFE06 - - |
| 104 | | // 0xFFFE08 - - |
| 105 | | // 0xFFFE0A - - |
| 106 | | // 0xFFFE0C TCTR0 |
| 107 | | // 0xFFFE0E - - |
| 108 | | // 0xFFFE10 - - |
| 109 | | // 0xFFFE12 - - |
| 110 | | // 0xFFFE14 - - |
| 111 | | // 0xFFFE16 - - |
| 112 | | // 0xFFFE18 - - |
| 113 | | // 0xFFFE1A - - |
| 114 | | // 0xFFFE1C - - |
| 115 | | // 0xFFFE1E - - |
| 116 | | // 0xFFFE20 TCR1 |
| 117 | | // 0xFFFE22 - - |
| 118 | | // 0xFFFE24 TMCR11 |
| 119 | | // 0xFFFE26 - - |
| 120 | | // 0xFFFE28 TMCR12 |
| 121 | | // 0xFFFE2A - - |
| 122 | | // 0xFFFE2C TCTR1 |
| 123 | | // 0xFFFE2E - - |
| 124 | | // 0xFFFE30 - - |
| 125 | | // 0xFFFE32 - - |
| 126 | | // 0xFFFE34 - - |
| 127 | | // 0xFFFE36 - - |
| 128 | | // 0xFFFE38 - - |
| 129 | | // 0xFFFE3A - - |
| 130 | | // 0xFFFE3C - - |
| 131 | | // 0xFFFE3E - - |
| 132 | | // 0xFFFE40 TCR2 |
| 133 | | // 0xFFFE42 - - |
| 134 | | // 0xFFFE44 TMCR21 |
| 135 | | // 0xFFFE46 - - |
| 136 | | // 0xFFFE48 TMCR22 |
| 137 | | // 0xFFFE4A - - |
| 138 | | // 0xFFFE4C TCTR2 |
| 139 | | // 0xFFFE4E - - |
| 140 | | |
| 141 | | |
| 142 | | static UINT16 tmp68301_address_decoder[0x10]; |
| 143 | | static UINT16 tmp68301_interrupt_controller[0x20]; |
| 144 | | static UINT16 tmp68301_parallel_interface[0x10]; |
| 145 | | static UINT16 tmp68301_serial_interface[0x30]; |
| 146 | | static UINT16 tmp68301_timer[0x50]; |
| 147 | | |
| 148 | | |
| 149 | | READ16_HANDLER( tmp68301_address_decoder_r ) |
| 150 | | { |
| 151 | | LOG(("PC %08X: TMP68301_address_decoder_r (%08X)\n", space.device().safe_pc(), (0xfffc00 + (offset * 2)))); |
| 152 | | |
| 153 | | return tmp68301_address_decoder[offset]; |
| 154 | | } |
| 155 | | |
| 156 | | WRITE16_HANDLER( tmp68301_address_decoder_w ) |
| 157 | | { |
| 158 | | LOG(("PC %08X: TMP68301_address_decoder_w (%08X = %04X)\n", space.device().safe_pc(), (0xfffc00 + (offset * 2)), data)); |
| 159 | | |
| 160 | | tmp68301_address_decoder[offset] = data; |
| 161 | | } |
| 162 | | |
| 163 | | READ16_HANDLER( tmp68301_interrupt_controller_r ) |
| 164 | | { |
| 165 | | LOG(("PC %08X: TMP68301_interrupt_controller_r (%08X)\n", space.device().safe_pc(), (0xfffc80 + (offset * 2)))); |
| 166 | | |
| 167 | | return tmp68301_interrupt_controller[offset]; |
| 168 | | } |
| 169 | | |
| 170 | | WRITE16_HANDLER( tmp68301_interrupt_controller_w ) |
| 171 | | { |
| 172 | | LOG(("PC %08X: TMP68301_interrupt_controller_w (%08X = %04X)\n", space.device().safe_pc(), (0xfffc80 + (offset * 2)), data)); |
| 173 | | |
| 174 | | tmp68301_interrupt_controller[offset] = data; |
| 175 | | } |
| 176 | | |
| 177 | | READ16_HANDLER( tmp68301_parallel_interface_r ) |
| 178 | | { |
| 179 | | LOG(("PC %08X: TMP68301_parallel_interface_r (%08X)\n", space.device().safe_pc(), (0xfffd00 + (offset * 2)))); |
| 180 | | |
| 181 | | return tmp68301_parallel_interface[offset]; |
| 182 | | } |
| 183 | | |
| 184 | | WRITE16_HANDLER( tmp68301_parallel_interface_w ) |
| 185 | | { |
| 186 | | LOG(("PC %08X: TMP68301_parallel_interface_w (%08X = %04X)\n", space.device().safe_pc(), (0xfffd00 + (offset * 2)), data)); |
| 187 | | |
| 188 | | tmp68301_parallel_interface[offset] = data; |
| 189 | | } |
| 190 | | |
| 191 | | READ16_HANDLER( tmp68301_serial_interface_r ) |
| 192 | | { |
| 193 | | LOG(("PC %08X: TMP68301_serial_interface_r (%08X)\n", space.device().safe_pc(), (0xfffd80 + (offset * 2)))); |
| 194 | | |
| 195 | | return tmp68301_serial_interface[offset]; |
| 196 | | } |
| 197 | | |
| 198 | | WRITE16_HANDLER( tmp68301_serial_interface_w ) |
| 199 | | { |
| 200 | | LOG(("PC %08X: TMP68301_serial_interface_w (%08X = %04X)\n", space.device().safe_pc(), (0xfffd80 + (offset * 2)), data)); |
| 201 | | |
| 202 | | tmp68301_serial_interface[offset] = data; |
| 203 | | } |
| 204 | | |
| 205 | | READ16_HANDLER( tmp68301_timer_r ) |
| 206 | | { |
| 207 | | LOG(("PC %08X: TMP68301_timer_r (%08X)\n", space.device().safe_pc(), (0xfffe00 + (offset * 2)))); |
| 208 | | |
| 209 | | return tmp68301_timer[offset]; |
| 210 | | } |
| 211 | | |
| 212 | | WRITE16_HANDLER( tmp68301_timer_w ) |
| 213 | | { |
| 214 | | LOG(("PC %08X: TMP68301_timer_w (%08X = %04X)\n", space.device().safe_pc(), (0xfffe00 + (offset * 2)), data)); |
| 215 | | |
| 216 | | tmp68301_timer[offset] = data; |
| 217 | | } |