trunk/src/mame/drivers/csplayh5.c
| r26420 | r26421 | |
| 146 | 146 | |
| 147 | 147 | AM_RANGE(0x800000, 0xbfffff) AM_ROM AM_REGION("blit_gfx",0) // GFX ROM routes here |
| 148 | 148 | |
| 149 | AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w) // TMP68301 Registers |
| 150 | |
| 149 | 151 | AM_RANGE(0xc00000, 0xc7ffff) AM_RAM AM_SHARE("nvram") AM_MIRROR(0x380000) // work RAM |
| 150 | | |
| 151 | | AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w) // TMP68301 Registers |
| 152 | 152 | ADDRESS_MAP_END |
| 153 | 153 | |
| 154 | 154 | #if USE_H8 |
| r26420 | r26421 | |
| 611 | 611 | int scanline = param; |
| 612 | 612 | |
| 613 | 613 | if(scanline == 212*2) |
| 614 | | m_maincpu->set_input_line_and_vector(1, HOLD_LINE,0x100/4); |
| 614 | m_tmp68301->external_interrupt_0(); |
| 615 | 615 | |
| 616 | 616 | if((scanline % 2) == 0) |
| 617 | 617 | { |
trunk/src/emu/video/v9938.c
| r26420 | r26421 | |
| 217 | 217 | /* |
| 218 | 218 | About the colour burst registers: |
| 219 | 219 | |
| 220 | | The color burst registers will only have effect on the composite video outputfrom |
| 220 | The color burst registers will only have effect on the composite video output from |
| 221 | 221 | the V9938. but the output is only NTSC (Never The Same Color ,so the |
| 222 | 222 | effects are already present) . this system is not used in europe |
| 223 | 223 | the european machines use a separate PAL (Phase Alternating Line) encoder |
| r26420 | r26421 | |
| 1470 | 1470 | int colour[4]; |
| 1471 | 1471 | int ind; |
| 1472 | 1472 | |
| 1473 | | /* |
| 1474 | | pixel0 = (*data) & 8 ? pal_ind16[(*data) >> 4] : s_pal_indYJK[ind | (*data >> 3) & 30]; |
| 1475 | | pixel1 = *(data+1) & 8 ? pal_ind16[*(data+1) >> 4] : s_pal_indYJK[ind | *(data+1) >> 3) & 30]; |
| 1476 | | pixel2 = *(data+2) & 8 ? pal_ind16[*(data+2) >> 4] : s_pal_indYJK[ind | *(data+2) >> 3) & 30]; |
| 1477 | | pixel3 = *(data+3) & 8 ? pal_ind16[*(data+3) >> 4] : s_pal_indYJK[ind | *(data+3) >> 3) & 30]; |
| 1478 | | |
| 1479 | | */ |
| 1480 | | |
| 1481 | 1473 | colour[0] = m_vram_space->read_byte(((nametbl_addr&1) << 16) | (nametbl_addr>>1)); |
| 1482 | 1474 | nametbl_addr++; |
| 1483 | 1475 | colour[1] = m_vram_space->read_byte(((nametbl_addr&1) << 16) | (nametbl_addr>>1)); |
| r26420 | r26421 | |
| 1653 | 1645 | else |
| 1654 | 1646 | ln += m_offset_x; |
| 1655 | 1647 | |
| 1656 | | for (i=0;i<256;i++) |
| 1657 | 1648 | { |
| 1658 | | if (col[i] & 0x80) |
| 1649 | for (i=0;i<256;i++) |
| 1659 | 1650 | { |
| 1660 | | *ln++ = pens[g7_ind16[col[i]&0x0f]]; |
| 1661 | | if (_Width > 512) |
| 1651 | if (col[i] & 0x80) |
| 1652 | { |
| 1662 | 1653 | *ln++ = pens[g7_ind16[col[i]&0x0f]]; |
| 1663 | | } |
| 1664 | | else |
| 1665 | | { |
| 1666 | | if (_Width > 512) |
| 1667 | | ln += 2; |
| 1654 | if (_Width > 512) |
| 1655 | *ln++ = pens[g7_ind16[col[i]&0x0f]]; |
| 1656 | } |
| 1668 | 1657 | else |
| 1669 | | ln++; |
| 1658 | { |
| 1659 | if (_Width > 512) |
| 1660 | ln += 2; |
| 1661 | else |
| 1662 | ln++; |
| 1663 | } |
| 1670 | 1664 | } |
| 1671 | 1665 | } |
| 1672 | 1666 | } |
trunk/src/emu/machine/tmp68301.c
| r26420 | r26421 | |
| 13 | 13 | |
| 14 | 14 | const device_type TMP68301 = &device_creator<tmp68301_device>; |
| 15 | 15 | |
| 16 | static ADDRESS_MAP_START( tmp68301_regs, AS_0, 16, tmp68301_device ) |
| 17 | // AM_RANGE(0x000,0x3ff) AM_RAM |
| 18 | |
| 19 | ADDRESS_MAP_END |
| 20 | |
| 16 | 21 | tmp68301_device::tmp68301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 17 | | : device_t(mconfig, TMP68301, "TMP68301", tag, owner, clock, "tmp68301", __FILE__) |
| 22 | : device_t(mconfig, TMP68301, "TMP68301", tag, owner, clock, "tmp68301", __FILE__), |
| 23 | device_memory_interface(mconfig, *this), |
| 24 | m_space_config("regs", ENDIANNESS_LITTLE, 16, 10, 0, NULL, *ADDRESS_MAP_NAME(tmp68301_regs)) |
| 18 | 25 | { |
| 19 | 26 | } |
| 20 | 27 | |
| r26420 | r26421 | |
| 53 | 60 | machine().firstcpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(tmp68301_device::irq_callback),this)); |
| 54 | 61 | } |
| 55 | 62 | |
| 63 | //------------------------------------------------- |
| 64 | // memory_space_config - return a description of |
| 65 | // any address spaces owned by this device |
| 66 | //------------------------------------------------- |
| 56 | 67 | |
| 68 | const address_space_config *tmp68301_device::memory_space_config(address_spacenum spacenum) const |
| 69 | { |
| 70 | return (spacenum == AS_0) ? &m_space_config : NULL; |
| 71 | } |
| 72 | |
| 73 | //************************************************************************** |
| 74 | // INLINE HELPERS |
| 75 | //************************************************************************** |
| 76 | |
| 77 | //------------------------------------------------- |
| 78 | // read_byte - read a byte at the given address |
| 79 | //------------------------------------------------- |
| 80 | |
| 81 | inline UINT16 tmp68301_device::read_word(offs_t address) |
| 82 | { |
| 83 | return space(AS_0).read_word(address << 1); |
| 84 | } |
| 85 | |
| 86 | //------------------------------------------------- |
| 87 | // write_byte - write a byte at the given address |
| 88 | //------------------------------------------------- |
| 89 | |
| 90 | inline void tmp68301_device::write_word(offs_t address, UINT16 data) |
| 91 | { |
| 92 | space(AS_0).write_word(address << 1, data); |
| 93 | } |
| 94 | |
| 57 | 95 | IRQ_CALLBACK_MEMBER(tmp68301_device::irq_callback) |
| 58 | 96 | { |
| 59 | 97 | int vector = m_irq_vector[irqline]; |
| r26420 | r26421 | |
| 181 | 219 | { |
| 182 | 220 | COMBINE_DATA(&m_regs[offset]); |
| 183 | 221 | |
| 222 | write_word(offset,m_regs[offset]); |
| 223 | |
| 184 | 224 | if (!ACCESSING_BITS_0_7) return; |
| 185 | 225 | |
| 186 | 226 | // logerror("CPU #0 PC %06X: TMP68301 Reg %04X<-%04X & %04X\n",space.device().safe_pc(),offset*2,data,mem_mask^0xffff); |
trunk/src/emu/machine/tmp68301.h
| r26420 | r26421 | |
| 1 | 1 | #ifndef TMP68301_H |
| 2 | 2 | #define TMP68301_H |
| 3 | 3 | |
| 4 | | class tmp68301_device : public device_t |
| 4 | class tmp68301_device : public device_t, |
| 5 | public device_memory_interface |
| 5 | 6 | { |
| 6 | 7 | public: |
| 7 | 8 | tmp68301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| r26420 | r26421 | |
| 21 | 22 | virtual void device_config_complete(); |
| 22 | 23 | virtual void device_start(); |
| 23 | 24 | virtual void device_reset(); |
| 25 | virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const; |
| 24 | 26 | |
| 25 | 27 | private: |
| 26 | 28 | // internal state |
| r26420 | r26421 | |
| 29 | 31 | UINT8 m_IE[3]; // 3 External Interrupt Lines |
| 30 | 32 | emu_timer *m_tmp68301_timer[3]; // 3 Timers |
| 31 | 33 | |
| 32 | | int m_irq_vector[8]; |
| 34 | UINT16 m_irq_vector[8]; |
| 33 | 35 | |
| 34 | 36 | TIMER_CALLBACK_MEMBER( timer_callback ); |
| 35 | 37 | void update_timer( int i ); |
| 36 | 38 | IRQ_CALLBACK_MEMBER(irq_callback); |
| 37 | 39 | void update_irq_state(); |
| 40 | |
| 41 | inline UINT16 read_word(offs_t address); |
| 42 | inline void write_word(offs_t address, UINT16 data); |
| 43 | const address_space_config m_space_config; |
| 38 | 44 | }; |
| 39 | 45 | |
| 40 | 46 | extern const device_type TMP68301; |