trunk/src/emu/netlist/devices/nld_7474.c
| r0 | r26419 | |
| 1 | /* |
| 2 | * nld_7474.c |
| 3 | * |
| 4 | */ |
| 5 | |
| 6 | #include "nld_7474.h" |
| 7 | |
| 8 | ATTR_HOT inline void NETLIB_NAME(nic7474sub)::newstate(const UINT8 state) |
| 9 | { |
| 10 | static const netlist_time delay[2] = { NLTIME_FROM_NS(25), NLTIME_FROM_NS(40) }; |
| 11 | //printf("%s %d %d %d\n", "7474", state, Q.Q(), QQ.Q()); |
| 12 | OUTLOGIC(m_Q, state, delay[state]); |
| 13 | OUTLOGIC(m_QQ, !state, delay[!state]); |
| 14 | } |
| 15 | |
| 16 | NETLIB_UPDATE(nic7474sub) |
| 17 | { |
| 18 | //if (!INP_LAST(m_clk) & INP(m_clk)) |
| 19 | { |
| 20 | newstate(m_nextD); |
| 21 | m_clk.inactivate(); |
| 22 | } |
| 23 | } |
| 24 | |
| 25 | NETLIB_UPDATE(nic7474) |
| 26 | { |
| 27 | if (!INPLOGIC(m_preQ)) |
| 28 | { |
| 29 | sub.newstate(1); |
| 30 | sub.m_clk.inactivate(); |
| 31 | m_D.inactivate(); |
| 32 | } |
| 33 | else if (!INPLOGIC(m_clrQ)) |
| 34 | { |
| 35 | sub.newstate(0); |
| 36 | sub.m_clk.inactivate(); |
| 37 | m_D.inactivate(); |
| 38 | } |
| 39 | else |
| 40 | { |
| 41 | m_D.activate(); |
| 42 | sub.m_nextD = INPLOGIC(m_D); |
| 43 | sub.m_clk.activate_lh(); |
| 44 | } |
| 45 | } |
| 46 | |
| 47 | NETLIB_START(nic7474) |
| 48 | { |
| 49 | register_sub(sub, "sub"); |
| 50 | register_input(sub, "CLK", sub.m_clk, netlist_input_t::STATE_INP_LH); |
| 51 | register_input("D", m_D); |
| 52 | register_input("CLRQ", m_clrQ); |
| 53 | register_input("PREQ", m_preQ); |
| 54 | |
| 55 | register_output(sub, "Q", sub.m_Q); |
| 56 | register_output(sub, "QQ", sub.m_QQ); |
| 57 | |
| 58 | sub.m_Q.initial(1); |
| 59 | sub.m_QQ.initial(0); |
| 60 | } |
trunk/src/emu/netlist/devices/nld_7474.h
| r0 | r26419 | |
| 1 | // license:GPL-2.0+ |
| 2 | // copyright-holders:Couriersud |
| 3 | /* |
| 4 | * nld_7474.h |
| 5 | * |
| 6 | * DM7474: Dual Positive-Edge-Triggered D Flip-Flops |
| 7 | * with Preset Clear and Complementary Outputs |
| 8 | * |
| 9 | * +--------------+ |
| 10 | * CLR1 |1 ++ 14| VCC |
| 11 | * D1 |2 13| CLR2 |
| 12 | * CLK1 |3 12| D2 |
| 13 | * PR1 |4 7474 11| CLK2 |
| 14 | * Q1 |5 10| Q2 |
| 15 | * Q1Q |6 9| Q2Q |
| 16 | * GND |7 8| Y2 |
| 17 | * +--------------+ |
| 18 | * |
| 19 | * +-----+-----+-----+---++---+-----+ |
| 20 | * | PR | CLR | CLK | D || Q | QQ | |
| 21 | * +=====+=====+=====+===++===+=====+ |
| 22 | * | 0 | 1 | X | X || 1 | 0 | |
| 23 | * | 1 | 0 | X | X || 0 | 1 | |
| 24 | * | 0 | 0 | X | X || 1 | 1 | (*) |
| 25 | * | 1 | 1 | R | 1 || 1 | 0 | |
| 26 | * | 1 | 1 | R | 0 || 0 | 1 | |
| 27 | * | 1 | 1 | L | X || Q0| Q0Q | |
| 28 | * +-----+-----+-----+---++---+-----+ |
| 29 | * |
| 30 | * (*) his configuration is nonstable that is it will not persist |
| 31 | * when either the preset and or clear inputs return to their inactive (high) level |
| 32 | * |
| 33 | * Q0 The output logic level of Q before the indicated input conditions were established |
| 34 | * |
| 35 | * R: 0 --> 1 |
| 36 | * |
| 37 | * Naming conventions follow National Semiconductor datasheet |
| 38 | * |
| 39 | * FIXME: Check that (*) is emulated properly |
| 40 | */ |
| 41 | |
| 42 | #ifndef NLD_7474_H_ |
| 43 | #define NLD_7474_H_ |
| 44 | |
| 45 | #include "nld_signal.h" |
| 46 | |
| 47 | #define TTL_7474(_name, _CLK, _D, _CLRQ, _PREQ) \ |
| 48 | NET_REGISTER_DEV(nic7474, _name) \ |
| 49 | NET_CONNECT(_name, CLK, _CLK) \ |
| 50 | NET_CONNECT(_name, D, _D) \ |
| 51 | NET_CONNECT(_name, CLRQ, _CLRQ) \ |
| 52 | NET_CONNECT(_name, PREQ, _PREQ) |
| 53 | |
| 54 | NETLIB_SUBDEVICE(nic7474sub, |
| 55 | netlist_ttl_input_t m_clk; |
| 56 | |
| 57 | UINT8 m_nextD; |
| 58 | netlist_ttl_output_t m_Q; |
| 59 | netlist_ttl_output_t m_QQ; |
| 60 | |
| 61 | ATTR_HOT inline void newstate(const UINT8 state); |
| 62 | ); |
| 63 | |
| 64 | NETLIB_DEVICE(nic7474, |
| 65 | NETLIB_NAME(nic7474sub) sub; |
| 66 | |
| 67 | netlist_ttl_input_t m_D; |
| 68 | netlist_ttl_input_t m_clrQ; |
| 69 | netlist_ttl_input_t m_preQ; |
| 70 | ); |
| 71 | |
| 72 | |
| 73 | |
| 74 | NETLIB_SIGNAL(7474, 4, 0, 0); |
| 75 | |
| 76 | #endif /* NLD_7474_H_ */ |
trunk/src/emu/netlist/devices/net_lib.c
| r26418 | r26419 | |
| 266 | 266 | m_last = out; |
| 267 | 267 | } |
| 268 | 268 | |
| 269 | | NETLIB_START(nic7404) |
| 270 | | { |
| 271 | | register_input("I1", m_I); |
| 272 | | register_output("Q", m_Q); |
| 273 | | m_Q.initial(1); |
| 274 | | } |
| 275 | | |
| 276 | | NETLIB_UPDATE(nic7404) |
| 277 | | { |
| 278 | | static const netlist_time delay[2] = { NLTIME_FROM_NS(15), NLTIME_FROM_NS(22) }; |
| 279 | | UINT8 t = (INPLOGIC(m_I)) ^ 1; |
| 280 | | OUTLOGIC(m_Q, t, delay[t]); |
| 281 | | } |
| 282 | | |
| 283 | 269 | NETLIB_START(nic7448) |
| 284 | 270 | { |
| 285 | 271 | register_sub(sub, "sub"); |
| r26418 | r26419 | |
| 425 | 411 | #endif |
| 426 | 412 | } |
| 427 | 413 | |
| 428 | | ATTR_HOT inline void NETLIB_NAME(nic7474sub)::newstate(const UINT8 state) |
| 429 | | { |
| 430 | | static const netlist_time delay[2] = { NLTIME_FROM_NS(25), NLTIME_FROM_NS(40) }; |
| 431 | | //printf("%s %d %d %d\n", "7474", state, Q.Q(), QQ.Q()); |
| 432 | | OUTLOGIC(m_Q, state, delay[state]); |
| 433 | | OUTLOGIC(m_QQ, !state, delay[!state]); |
| 434 | | } |
| 435 | 414 | |
| 436 | | NETLIB_UPDATE(nic7474sub) |
| 437 | | { |
| 438 | | //if (!INP_LAST(m_clk) & INP(m_clk)) |
| 439 | | { |
| 440 | | newstate(m_nextD); |
| 441 | | m_clk.inactivate(); |
| 442 | | } |
| 443 | | } |
| 444 | | |
| 445 | | NETLIB_UPDATE(nic7474) |
| 446 | | { |
| 447 | | if (!INPLOGIC(m_preQ)) |
| 448 | | { |
| 449 | | sub.newstate(1); |
| 450 | | sub.m_clk.inactivate(); |
| 451 | | m_D.inactivate(); |
| 452 | | } |
| 453 | | else if (!INPLOGIC(m_clrQ)) |
| 454 | | { |
| 455 | | sub.newstate(0); |
| 456 | | sub.m_clk.inactivate(); |
| 457 | | m_D.inactivate(); |
| 458 | | } |
| 459 | | else |
| 460 | | { |
| 461 | | m_D.activate(); |
| 462 | | sub.m_nextD = INPLOGIC(m_D); |
| 463 | | sub.m_clk.activate_lh(); |
| 464 | | } |
| 465 | | } |
| 466 | | |
| 467 | | NETLIB_START(nic7474) |
| 468 | | { |
| 469 | | register_sub(sub, "sub"); |
| 470 | | register_input(sub, "CLK", sub.m_clk, netlist_input_t::STATE_INP_LH); |
| 471 | | register_input("D", m_D); |
| 472 | | register_input("CLRQ", m_clrQ); |
| 473 | | register_input("PREQ", m_preQ); |
| 474 | | |
| 475 | | register_output(sub, "Q", sub.m_Q); |
| 476 | | register_output(sub, "QQ", sub.m_QQ); |
| 477 | | |
| 478 | | sub.m_Q.initial(1); |
| 479 | | sub.m_QQ.initial(0); |
| 480 | | } |
| 481 | | |
| 482 | 415 | NETLIB_START(nic7483) |
| 483 | 416 | { |
| 484 | 417 | m_lastr = 0; |
trunk/src/emu/netlist/devices/net_lib.h
| r26418 | r26419 | |
| 56 | 56 | |
| 57 | 57 | #include "nld_7400.h" |
| 58 | 58 | #include "nld_7402.h" |
| 59 | #include "nld_7404.h" |
| 59 | 60 | #include "nld_7410.h" |
| 60 | 61 | #include "nld_7420.h" |
| 61 | 62 | #include "nld_7425.h" |
| 62 | 63 | #include "nld_7427.h" |
| 63 | 64 | #include "nld_7430.h" |
| 65 | #include "nld_7474.h" |
| 64 | 66 | #include "nld_7486.h" |
| 65 | 67 | |
| 66 | 68 | // this is a bad hack |
| r26418 | r26419 | |
| 99 | 101 | // TTL Logic chips |
| 100 | 102 | // ---------------------------------------------------------------------------------------- |
| 101 | 103 | |
| 102 | | #define TTL_7404_INVERT(_name, _I1) \ |
| 103 | | NET_REGISTER_DEV(nic7404, _name) \ |
| 104 | | NET_CONNECT(_name, I1, _I1) |
| 105 | | |
| 106 | 104 | #define TTL_7450_ANDORINVERT(_name, _I1, _I2, _I3, _I4) \ |
| 107 | 105 | NET_REGISTER_DEV(nic7450, _name) \ |
| 108 | 106 | NET_CONNECT(_name, I1, _I1) \ |
| r26418 | r26419 | |
| 120 | 118 | NET_CONNECT(_name, BIQ, _BIQ) \ |
| 121 | 119 | NET_CONNECT(_name, RBIQ, _RBIQ) |
| 122 | 120 | |
| 123 | | #define TTL_7474(_name, _CLK, _D, _CLRQ, _PREQ) \ |
| 124 | | NET_REGISTER_DEV(nic7474, _name) \ |
| 125 | | NET_CONNECT(_name, CLK, _CLK) \ |
| 126 | | NET_CONNECT(_name, D, _D) \ |
| 127 | | NET_CONNECT(_name, CLRQ, _CLRQ) \ |
| 128 | | NET_CONNECT(_name, PREQ, _PREQ) |
| 129 | | |
| 130 | 121 | #define TTL_7483(_name, _A1, _A2, _A3, _A4, _B1, _B2, _B3, _B4, _CI) \ |
| 131 | 122 | NET_REGISTER_DEV(nic7483, _name) \ |
| 132 | 123 | NET_CONNECT(_name, A1, _A1) \ |
| r26418 | r26419 | |
| 281 | 272 | |
| 282 | 273 | |
| 283 | 274 | |
| 284 | | NETLIB_DEVICE(nic7404, |
| 285 | | netlist_ttl_input_t m_I; |
| 286 | | netlist_ttl_output_t m_Q; |
| 287 | | ); |
| 288 | 275 | |
| 276 | |
| 289 | 277 | NETLIB_DEVICE(nic7450, |
| 290 | 278 | netlist_ttl_input_t m_I0; |
| 291 | 279 | netlist_ttl_input_t m_I1; |
| r26418 | r26419 | |
| 294 | 282 | netlist_ttl_output_t m_Q; |
| 295 | 283 | ); |
| 296 | 284 | |
| 297 | | NETLIB_SUBDEVICE(nic7474sub, |
| 298 | | netlist_ttl_input_t m_clk; |
| 299 | | |
| 300 | | UINT8 m_nextD; |
| 301 | | netlist_ttl_output_t m_Q; |
| 302 | | netlist_ttl_output_t m_QQ; |
| 303 | | |
| 304 | | ATTR_HOT inline void newstate(const UINT8 state); |
| 305 | | ); |
| 306 | | |
| 307 | | NETLIB_DEVICE(nic7474, |
| 308 | | NETLIB_NAME(nic7474sub) sub; |
| 309 | | |
| 310 | | netlist_ttl_input_t m_D; |
| 311 | | netlist_ttl_input_t m_clrQ; |
| 312 | | netlist_ttl_input_t m_preQ; |
| 313 | | ); |
| 314 | | |
| 315 | 285 | /* 74107 does latch data during high ! |
| 316 | 286 | * For modelling purposes, we assume 74107 and 74107A are the same |
| 317 | 287 | */ |