branches/alto2/src/emu/cpu/alto2/a2disk.c
| r26404 | r26405 | |
| 63 | 63 | #define GET_KCOM_SENDADR(kcom) X_RDBITS(kcom,16,5,5) //!< get send address flag from controller command (hardware command register) |
| 64 | 64 | #define PUT_KCOM_SENDADR(kcom,val) X_WRBITS(kcom,16,5,5,val) //!< put send address flag into controller command (hardware command register) |
| 65 | 65 | |
| 66 | | #define STATUS_DP0 50 |
| 67 | | #define STATUS_DP1 80 |
| 68 | | #define STATUS_KWRC 0, "%c" |
| 69 | | #define STATUS_CYL 2, "C%3d" |
| 70 | | #define STATUS_HEAD 7, "H%d" |
| 71 | | #define STATUS_SECT 10, "S%2d" |
| 72 | | #define STATUS_PAGE 14, "[%4d]" |
| 66 | #if defined(ALTO2_FAKE_STATUS_H) && (ALTO2_FAKE_STATUS_H > 0) |
| 67 | #define STATUS_DP0 48 |
| 68 | #define STATUS_DP1 78 |
| 69 | #define STATUS_RGATE 0, "%c" |
| 70 | #define STATUS_WGATE 1, "%c" |
| 71 | #define STATUS_KWRC 2, "%c" |
| 72 | #define STATUS_CYL 4, "C%-3d" |
| 73 | #define STATUS_HEAD 9, "H%d" |
| 74 | #define STATUS_SECT 12, "S%-2d" |
| 75 | #define STATUS_PAGE 16, "[%-4d]" |
| 76 | #define FAKE_STATUS(_unit,_which,...) do { \ |
| 77 | int x = (_unit) ? STATUS_DP1 : STATUS_DP0; \ |
| 78 | fake_status_printf(x + _which, __VA_ARGS__); \ |
| 79 | } while (0) |
| 80 | #endif |
| 73 | 81 | |
| 74 | 82 | /** @brief completion codes (only for documentation, since this is microcode defined) */ |
| 75 | 83 | enum { |
| r26404 | r26405 | |
| 759 | 767 | dhd->set_egate(m_dsk.egate = 1); |
| 760 | 768 | dhd->set_wrgate(m_dsk.wrgate = 1); |
| 761 | 769 | dhd->set_rdgate(m_dsk.rdgate = 1); |
| 770 | FAKE_STATUS(m_dsk.drive, STATUS_WGATE, '-'); |
| 771 | FAKE_STATUS(m_dsk.drive, STATUS_RGATE, '-'); |
| 762 | 772 | } else { |
| 763 | 773 | if (m_dsk.krwc & RWC_WRITE) { |
| 764 | 774 | if (m_dsk.ok_to_run) { |
| r26404 | r26405 | |
| 777 | 787 | // assert erase and write gates |
| 778 | 788 | dhd->set_egate(m_dsk.egate = 0); |
| 779 | 789 | dhd->set_wrgate(m_dsk.wrgate = 0); |
| 790 | FAKE_STATUS(m_dsk.drive, STATUS_WGATE, 'W'); |
| 780 | 791 | } |
| 781 | 792 | } else { |
| 782 | 793 | #if ALTO2_DEBUG |
| r26404 | r26405 | |
| 786 | 797 | #endif |
| 787 | 798 | // assert read gate |
| 788 | 799 | dhd->set_rdgate(m_dsk.rdgate = 0); |
| 800 | FAKE_STATUS(m_dsk.drive, STATUS_RGATE, 'R'); |
| 789 | 801 | } |
| 790 | 802 | } |
| 791 | 803 | |
| r26404 | r26405 | |
| 907 | 919 | } else { |
| 908 | 920 | m_dsk.strobon_timer->reset(); |
| 909 | 921 | } |
| 910 | | #if defined(ALTO2_FAKE_STATUS_H) && (ALTO2_FAKE_STATUS_H > 0) |
| 911 | | int x = unit ? STATUS_DP1 : STATUS_DP0; |
| 912 | | fake_status_printf(x + STATUS_CYL, dhd->get_cylinder()); |
| 913 | | fake_status_printf(x + STATUS_HEAD, dhd->get_head()); |
| 914 | | #endif |
| 922 | FAKE_STATUS(unit, STATUS_CYL, dhd->get_cylinder()); |
| 923 | FAKE_STATUS(unit, STATUS_HEAD, dhd->get_head()); |
| 915 | 924 | } |
| 916 | 925 | |
| 917 | 926 | /** @brief timer callback to change the READY monoflop 31a */ |
| r26404 | r26405 | |
| 1172 | 1181 | break; |
| 1173 | 1182 | } |
| 1174 | 1183 | // TODO: show disk indicator |
| 1175 | | #if defined(ALTO2_FAKE_STATUS_H) && (ALTO2_FAKE_STATUS_H > 0) |
| 1176 | | int x = m_dsk.drive ? STATUS_DP1 : STATUS_DP0; |
| 1177 | | fake_status_printf(x + STATUS_KWRC, "HPLD"[m_dsk.krecno]); |
| 1178 | | #endif |
| 1184 | FAKE_STATUS(m_dsk.drive, STATUS_KWRC, "HPLD"[m_dsk.krecno]); |
| 1179 | 1185 | } |
| 1180 | 1186 | |
| 1181 | 1187 | /** |
| r26404 | r26405 | |
| 1627 | 1633 | #if defined(ALTO2_FAKE_STATUS_H) && (ALTO2_FAKE_STATUS_H > 0) |
| 1628 | 1634 | if (debug_read_mem(0521) && unit == GET_KADDR_DRIVE(debug_read_mem(0523))) |
| 1629 | 1635 | { |
| 1630 | | int x = unit ? STATUS_DP1 : STATUS_DP0; |
| 1631 | | fake_status_printf(x + STATUS_SECT, dhd->get_sector()); |
| 1632 | | fake_status_printf(x + STATUS_PAGE, dhd->get_page()); |
| 1636 | FAKE_STATUS(unit, STATUS_SECT, dhd->get_sector()); |
| 1637 | FAKE_STATUS(unit, STATUS_PAGE, dhd->get_page()); |
| 1633 | 1638 | } |
| 1634 | 1639 | #endif |
| 1635 | 1640 | } |
| r26404 | r26405 | |
| 1761 | 1766 | m_dsk.ff_45b = JKFF_0; |
| 1762 | 1767 | |
| 1763 | 1768 | #if defined(ALTO2_FAKE_STATUS_H) && (ALTO2_FAKE_STATUS_H > 0) |
| 1764 | | int x = STATUS_DP0; |
| 1765 | | for (int i = 0; i < 2; i++) { |
| 1766 | | fake_status_printf(x + STATUS_KWRC, '-'); |
| 1767 | | fake_status_printf(x + STATUS_CYL, 0); |
| 1768 | | fake_status_printf(x + STATUS_HEAD, 0); |
| 1769 | | fake_status_printf(x + STATUS_SECT, 0); |
| 1770 | | fake_status_printf(x + STATUS_PAGE, 0); |
| 1771 | | x = STATUS_DP1; |
| 1769 | for (int unit = 0; unit < 2; unit++) { |
| 1770 | FAKE_STATUS(unit, STATUS_RGATE, '-'); |
| 1771 | FAKE_STATUS(unit, STATUS_WGATE, '-'); |
| 1772 | FAKE_STATUS(unit, STATUS_KWRC, '-'); |
| 1773 | FAKE_STATUS(unit, STATUS_CYL, 0); |
| 1774 | FAKE_STATUS(unit, STATUS_HEAD, 0); |
| 1775 | FAKE_STATUS(unit, STATUS_SECT, 0); |
| 1776 | FAKE_STATUS(unit, STATUS_PAGE, 0); |
| 1772 | 1777 | } |
| 1773 | 1778 | #endif |
| 1774 | 1779 | } |
branches/alto2/src/emu/cpu/alto2/a2disp.c
| r26404 | r26405 | |
| 532 | 532 | void alto2_cpu_device::init_disp() |
| 533 | 533 | { |
| 534 | 534 | memset(&m_dsp, 0, sizeof(m_dsp)); |
| 535 | save_item(NAME(m_dsp.hlc)); |
| 536 | save_item(NAME(m_dsp.a63)); |
| 537 | save_item(NAME(m_dsp.a66)); |
| 538 | save_item(NAME(m_dsp.setmode)); |
| 539 | save_item(NAME(m_dsp.inverse)); |
| 540 | save_item(NAME(m_dsp.halfclock)); |
| 541 | save_item(NAME(m_dsp.clr)); |
| 542 | save_item(NAME(m_dsp.fifo)); |
| 543 | save_item(NAME(m_dsp.fifo_wr)); |
| 544 | save_item(NAME(m_dsp.fifo_rd)); |
| 545 | save_item(NAME(m_dsp.dht_blocks)); |
| 546 | save_item(NAME(m_dsp.dwt_blocks)); |
| 547 | save_item(NAME(m_dsp.curt_blocks)); |
| 548 | save_item(NAME(m_dsp.curt_wakeup)); |
| 549 | save_item(NAME(m_dsp.vblank)); |
| 550 | save_item(NAME(m_dsp.xpreg)); |
| 551 | save_item(NAME(m_dsp.csr)); |
| 552 | save_item(NAME(m_dsp.curword)); |
| 553 | save_item(NAME(m_dsp.curdata)); |
| 535 | 554 | |
| 536 | 555 | m_disp_a38 = prom_load(machine(), &pl_displ_a38, memregion("displ_a38")->base()); |
| 537 | 556 | m_disp_a63 = prom_load(machine(), &pl_displ_a63, memregion("displ_a63")->base()); |
| r26404 | r26405 | |
| 555 | 574 | |
| 556 | 575 | void alto2_cpu_device::reset_disp() |
| 557 | 576 | { |
| 558 | | save_item(NAME(m_dsp.hlc)); |
| 559 | | save_item(NAME(m_dsp.a63)); |
| 560 | | save_item(NAME(m_dsp.a66)); |
| 561 | | save_item(NAME(m_dsp.setmode)); |
| 562 | | save_item(NAME(m_dsp.inverse)); |
| 563 | | save_item(NAME(m_dsp.halfclock)); |
| 564 | | save_item(NAME(m_dsp.clr)); |
| 565 | | save_item(NAME(m_dsp.fifo)); |
| 566 | | save_item(NAME(m_dsp.fifo_wr)); |
| 567 | | save_item(NAME(m_dsp.fifo_rd)); |
| 568 | | save_item(NAME(m_dsp.dht_blocks)); |
| 569 | | save_item(NAME(m_dsp.dwt_blocks)); |
| 570 | | save_item(NAME(m_dsp.curt_blocks)); |
| 571 | | save_item(NAME(m_dsp.curt_wakeup)); |
| 572 | | save_item(NAME(m_dsp.vblank)); |
| 573 | | save_item(NAME(m_dsp.xpreg)); |
| 574 | | save_item(NAME(m_dsp.csr)); |
| 575 | | save_item(NAME(m_dsp.curword)); |
| 576 | | save_item(NAME(m_dsp.curdata)); |
| 577 | | |
| 578 | 577 | m_dsp.state = 020; |
| 579 | 578 | m_dsp.hlc = ALTO2_DISPLAY_HLC_START; |
| 580 | 579 | m_dsp.a63 = 0; |
branches/alto2/src/emu/cpu/alto2/a2mem.c
| r26404 | r26405 | |
| 810 | 810 | void alto2_cpu_device::init_memory() |
| 811 | 811 | { |
| 812 | 812 | memset(&m_mem, 0, sizeof(m_mem)); |
| 813 | save_item(NAME(m_mem.mar)); |
| 814 | save_item(NAME(m_mem.rmdd)); |
| 815 | save_item(NAME(m_mem.wmdd)); |
| 816 | save_item(NAME(m_mem.md)); |
| 817 | save_item(NAME(m_mem.cycle)); |
| 818 | save_item(NAME(m_mem.access)); |
| 819 | save_item(NAME(m_mem.error)); |
| 820 | save_item(NAME(m_mem.mear)); |
| 821 | save_item(NAME(m_mem.mecr)); |
| 813 | 822 | } |
| 814 | 823 | |
| 815 | 824 | void alto2_cpu_device::exit_memory() |
| r26404 | r26405 | |
| 826 | 835 | |
| 827 | 836 | void alto2_cpu_device::reset_memory() |
| 828 | 837 | { |
| 829 | | save_item(NAME(m_mem.mar)); |
| 830 | | save_item(NAME(m_mem.rmdd)); |
| 831 | | save_item(NAME(m_mem.wmdd)); |
| 832 | | save_item(NAME(m_mem.md)); |
| 833 | | save_item(NAME(m_mem.cycle)); |
| 834 | | save_item(NAME(m_mem.access)); |
| 835 | | save_item(NAME(m_mem.error)); |
| 836 | | save_item(NAME(m_mem.mear)); |
| 837 | | save_item(NAME(m_mem.mecr)); |
| 838 | | |
| 839 | 838 | if (m_mem.ram) { |
| 840 | 839 | auto_free(machine(), m_mem.ram); |
| 841 | 840 | m_mem.ram = 0; |
branches/alto2/src/emu/cpu/alto2/a2ether.c
| r26404 | r26405 | |
| 571 | 571 | */ |
| 572 | 572 | void alto2_cpu_device::eth_startf() |
| 573 | 573 | { |
| 574 | #if 0 // FIXME: does not yet work |
| 574 | 575 | for (int sysclk = 0; sysclk < 2; sysclk++) |
| 575 | 576 | update_sysclk(sysclk); |
| 576 | 577 | PUT_ETH_OCMD(m_eth.status, m_eth.ff_35a & JKFF_Q ? 1 : 0); |
| 577 | 578 | PUT_ETH_ICMD(m_eth.status, m_eth.ff_35b & JKFF_Q ? 1 : 0); |
| 579 | #else |
| 580 | PUT_ETH_ICMD(m_eth.status, X_BIT(m_bus,16,14)); |
| 581 | PUT_ETH_OCMD(m_eth.status, X_BIT(m_bus,16,15)); |
| 582 | #endif |
| 578 | 583 | LOG((LOG_ETH,3, " STARTF; ICMD=%u OCMD=%u\n", GET_ETH_ICMD(m_eth.status), GET_ETH_ICMD(m_eth.status))); |
| 579 | 584 | eth_wakeup(); |
| 580 | 585 | } |
| r26404 | r26405 | |
| 1302 | 1307 | */ |
| 1303 | 1308 | void alto2_cpu_device::init_ether(int task) |
| 1304 | 1309 | { |
| 1310 | // intialize all ethernet variables |
| 1311 | memset(&m_eth, 0, sizeof(m_eth)); |
| 1305 | 1312 | save_item(NAME(m_eth.fifo)); |
| 1306 | 1313 | save_item(NAME(m_eth.fifo_rd)); |
| 1307 | 1314 | save_item(NAME(m_eth.fifo_wr)); |
| r26404 | r26405 | |
| 1312 | 1319 | save_item(NAME(m_eth.tx_count)); |
| 1313 | 1320 | save_item(NAME(m_eth.breath_of_life)); |
| 1314 | 1321 | |
| 1315 | | // intialize all ethernet variables |
| 1316 | | memset(&m_eth, 0, sizeof(m_eth)); |
| 1317 | | |
| 1318 | 1322 | m_ether_a41 = prom_load(machine(), &pl_enet_a41, memregion("ether_a41")->base()); |
| 1319 | 1323 | m_ether_a42 = prom_load(machine(), &pl_enet_a42, memregion("ether_a42")->base()); |
| 1320 | 1324 | m_ether_a49 = prom_load(machine(), &pl_enet_a49, memregion("ether_a49")->base()); |