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r26363 Friday 22nd November, 2013 at 15:29:39 UTC by Curt Coder
(MESS) prof80: Added a device for the MMU. [Curt Coder]
[src/mess]mess.mak
[src/mess/drivers]prof80.c
[src/mess/includes]prof80.h
[src/mess/machine]prof80mmu.c* prof80mmu.h*

trunk/src/mess/drivers/prof80.c
r26362r26363
1515
1616    TODO:
1717
18   - floppy Err on A: Select
1819    - NE555 timeout is 10x too high
1920    - grip31 does not work
2021    - UNIO card (Z80-STI, Z80-SIO, 2x centronics)
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2728#include "includes/prof80.h"
2829
2930
30//**************************************************************************
31//  MACROS / CONSTANTS
32//**************************************************************************
3331
34#define BLK_RAM1    0x0b
35#define BLK_RAM2    0x0a
36#define BLK_RAM3    0x03
37#define BLK_RAM4    0x02
38#define BLK_EPROM   0x00
39
40
41
4232//**************************************************************************
43//  MEMORY MANAGEMENT
44//**************************************************************************
45
46//-------------------------------------------------
47//  bankswitch -
48//-------------------------------------------------
49
50void prof80_state::bankswitch()
51{
52   address_space &program = m_maincpu->space(AS_PROGRAM);
53   UINT8 *ram = m_ram->pointer();
54   UINT8 *rom = m_rom->base();
55   int bank;
56
57   for (bank = 0; bank < 16; bank++)
58   {
59      UINT16 start_addr = bank * 0x1000;
60      UINT16 end_addr = start_addr + 0xfff;
61      int block = m_init ? m_mmu[bank] : BLK_EPROM;
62
63      switch (block)
64      {
65      case BLK_RAM1:
66         program.install_ram(start_addr, end_addr, ram + ((bank % 8) * 0x1000));
67         break;
68
69      case BLK_RAM2:
70         program.install_ram(start_addr, end_addr, ram + 0x8000 + ((bank % 8) * 0x1000));
71         break;
72
73      case BLK_RAM3:
74         program.install_ram(start_addr, end_addr, ram + 0x10000 + ((bank % 8) * 0x1000));
75         break;
76
77      case BLK_RAM4:
78         program.install_ram(start_addr, end_addr, ram + 0x18000 + ((bank % 8) * 0x1000));
79         break;
80
81      case BLK_EPROM:
82         program.install_rom(start_addr, end_addr, rom + ((bank % 2) * 0x1000));
83         break;
84
85      default:
86         program.unmap_readwrite(start_addr, end_addr);
87      }
88
89      //logerror("Segment %u address %04x-%04x block %u\n", bank, start_addr, end_addr, block);
90   }
91}
92
93
94
95//**************************************************************************
9633//  PERIPHERALS
9734//**************************************************************************
9835
9936//-------------------------------------------------
100//  floppy_motor_off -
37//  motor -
10138//-------------------------------------------------
10239
103void prof80_state::floppy_motor_off()
40void prof80_state::motor(int mon)
10441{
105   if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(1);
106   if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(1);
42   if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(mon);
43   if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(mon);
10744
108   m_motor = 0;
45   m_motor = mon;
10946}
11047
11148
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13471      break;
13572
13673   case 3: // READY
137      m_fdc->ready_w(fa);
74      if (m_ready != fa)
75      {
76         m_fdc->set_ready_line_connected(!fa);
77         m_fdc->ready_w(!fa);
78         m_ready = fa;
79      }
13880      break;
13981
14082   case 4: // TCK
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14284      break;
14385
14486   case 5: // IN USE
145      output_set_led_value(0, fa);
87      //m_floppy->inuse_w(fa);
14688      break;
14789
14890   case 6: // _MOTOR
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15698      else
15799      {
158100         // turn on floppy motor
159         if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(0);
160         if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(0);
101         motor(0);
161102
162         m_motor = 1;
163
164103         // reset floppy motor off NE555 timer
165104         timer_set(attotime::never, TIMER_ID_MOTOR);
166105      }
167106      break;
168107
169108   case 7: // SELECT
109      if (m_select != fa)
110      {
111         //m_fdc->set_select_lines_connected(fa);
112         m_select = fa;
113      }
170114      break;
171115   }
172116
173117   switch (sb)
174118   {
175119   case 0: // RESF
176      if (fb) m_fdc->reset();
120      if (fb) m_fdc->soft_reset();
177121      break;
178122
179123   case 1: // MINI
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190134   case 4: // _MSTOP
191135      if (!fb)
192136      {
193         // immediately turn off floppy motor
194         synchronize(TIMER_ID_MOTOR);
137         // turn off floppy motor
138         motor(1);
139
140         // reset floppy motor off NE555 timer
141         timer_set(attotime::never, TIMER_ID_MOTOR);
195142      }
196143      break;
197144
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204151      break;
205152
206153   case 7: // MME
207      //logerror("INIT %u\n", fb);
208      m_init = fb;
209      bankswitch();
154      m_mmu->mme_w(fb);
210155      break;
211156   }
212157}
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305250   int js4 = 0, js5 = 0;
306251
307252   // floppy motor
308   data |= !m_motor;
253   data |= m_motor;
309254
310255   // JS4
311256   switch (m_j4->read())
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337282   return data;
338283}
339284
340
341//-------------------------------------------------
342//  par_w -
343//-------------------------------------------------
344
345WRITE8_MEMBER( prof80_state::par_w )
346{
347   int bank = offset >> 12;
348
349   m_mmu[bank] = data & 0x0f;
350
351   //logerror("MMU bank %u block %u\n", bank, data & 0x0f);
352
353   bankswitch();
354}
355
356285// UNIO
357286/*
358287WRITE8_MEMBER( prof80_state::unio_ctrl_w )
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386315//-------------------------------------------------
387316
388317static ADDRESS_MAP_START( prof80_mem, AS_PROGRAM, 8, prof80_state )
318   AM_RANGE(0x0000, 0xffff) AM_DEVICE(MMU_TAG, prof80_mmu_device, z80_program_map)
389319ADDRESS_MAP_END
390320
391321
392322//-------------------------------------------------
323//  ADDRESS_MAP( prof80_mmu )
324//-------------------------------------------------
325
326static ADDRESS_MAP_START( prof80_mmu, AS_PROGRAM, 8, prof80_state )
327   AM_RANGE(0x40000, 0x5ffff) AM_RAM
328   AM_RANGE(0xc0000, 0xdffff) AM_RAM
329   AM_RANGE(0xf0000, 0xf1fff) AM_MIRROR(0xe000) AM_ROM AM_REGION(Z80_TAG, 0)
330ADDRESS_MAP_END
331
332
333//-------------------------------------------------
393334//  ADDRESS_MAP( prof80_io )
394335//-------------------------------------------------
395336
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407348   AM_RANGE(0xda, 0xda) AM_MIRROR(0xff00) AM_READ(status_r)
408349   AM_RANGE(0xdb, 0xdb) AM_MIRROR(0xff00) AM_READ(status2_r)
409350   AM_RANGE(0xdc, 0xdd) AM_MIRROR(0xff00) AM_DEVICE(UPD765_TAG, upd765a_device, map)
410   AM_RANGE(0xde, 0xde) AM_MIRROR(0xff01) AM_MASK(0xff00) AM_WRITE(par_w)
351   AM_RANGE(0xde, 0xde) AM_MIRROR(0xff01) AM_MASK(0xff00) AM_DEVWRITE(MMU_TAG, prof80_mmu_device, par_w)
411352ADDRESS_MAP_END
412353
413354
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538479   switch (id)
539480   {
540481   case TIMER_ID_MOTOR:
541      floppy_motor_off();
482      motor(1);
542483      break;
543484   }
544485}
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554495   m_rtc->cs_w(1);
555496   m_rtc->oe_w(1);
556497
557   // bank switch
558   bankswitch();
559
560498   // register for state saving
561499   save_item(NAME(m_c0));
562500   save_item(NAME(m_c1));
563501   save_item(NAME(m_c2));
564   save_item(NAME(m_mmu));
565   save_item(NAME(m_init));
566   save_item(NAME(m_fdc_index));
502   save_item(NAME(m_motor));
503   save_item(NAME(m_ready));
504   save_item(NAME(m_select));
567505}
568506
569507
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594532   MCFG_CPU_IO_MAP(prof80_io)
595533
596534   // devices
535   MCFG_PROF80_MMU_ADD(MMU_TAG, prof80_mmu)
597536   MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, NULL, NULL)
598   MCFG_UPD765A_ADD(UPD765_TAG, false, true)
537   MCFG_UPD765A_ADD(UPD765_TAG, true, true)
599538   MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", prof80_floppies, "525qd", floppy_image_device::default_floppy_formats)
600539   MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", prof80_floppies, "525qd", floppy_image_device::default_floppy_formats)
540   MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":2", prof80_floppies, NULL,    floppy_image_device::default_floppy_formats)
541   MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":3", prof80_floppies, NULL,    floppy_image_device::default_floppy_formats)
601542
602543   // ECB bus
603544   MCFG_ECBBUS_ADD(Z80_TAG, ecb_intf)
trunk/src/mess/mess.mak
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11191119
11201120$(MESSOBJ)/conitec.a:           \
11211121   $(MESS_DRIVERS)/prof80.o    \
1122   $(MESS_MACHINE)/prof80mmu.o \
11221123   $(MESS_DRIVERS)/prof180x.o  \
11231124
11241125$(MESSOBJ)/cybiko.a:            \
trunk/src/mess/machine/prof80mmu.c
r0r26363
1/**********************************************************************
2
3    Conitec PROF-80 Memory Management Unit emulation
4
5    Copyright MESS Team.
6    Visit http://mamedev.org for licensing and usage restrictions.
7
8**********************************************************************/
9
10#include "prof80mmu.h"
11
12
13
14//**************************************************************************
15//  DEVICE DEFINITIONS
16//**************************************************************************
17
18const device_type PROF80_MMU = &device_creator<prof80_mmu_device>;
19
20
21DEVICE_ADDRESS_MAP_START( z80_program_map, 8, prof80_mmu_device )
22   AM_RANGE(0x0000, 0xffff) AM_READWRITE(program_r, program_w)
23ADDRESS_MAP_END
24
25static ADDRESS_MAP_START( program_map, AS_PROGRAM, 8, prof80_mmu_device )
26ADDRESS_MAP_END
27
28
29
30//**************************************************************************
31//  LIVE DEVICE
32//**************************************************************************
33
34//-------------------------------------------------
35//  prof80_mmu_device - constructor
36//-------------------------------------------------
37
38prof80_mmu_device::prof80_mmu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
39   : device_t(mconfig, PROF80_MMU, "PROF80_MMU", tag, owner, clock, "prof80_mmu", __FILE__),
40      device_memory_interface(mconfig, *this),
41      m_program_space_config("program", ENDIANNESS_LITTLE, 8, 20, 0, *ADDRESS_MAP_NAME(program_map))
42{
43}
44
45
46//-------------------------------------------------
47//  device_start - device-specific startup
48//-------------------------------------------------
49
50void prof80_mmu_device::device_start()
51{
52   // state saving
53   save_item(NAME(m_blk));
54   save_item(NAME(m_enabled));
55}
56
57
58//-------------------------------------------------
59//  memory_space_config - return a description of
60//  any address spaces owned by this device
61//-------------------------------------------------
62
63const address_space_config *prof80_mmu_device::memory_space_config(address_spacenum spacenum) const
64{
65   return (spacenum == AS_PROGRAM) ? &m_program_space_config : NULL;
66}
67
68
69//-------------------------------------------------
70//  par_w -
71//-------------------------------------------------
72
73WRITE8_MEMBER( prof80_mmu_device::par_w )
74{
75   int bank = offset >> 12;
76
77   m_blk[bank] = (data & 0x0f) ^ 0x0f;
78}
79
80
81//-------------------------------------------------
82//  mme_w -
83//-------------------------------------------------
84
85WRITE_LINE_MEMBER( prof80_mmu_device::mme_w )
86{
87   m_enabled = (state == 1);
88}
89
90
91//-------------------------------------------------
92//  program_r - program space read
93//-------------------------------------------------
94
95READ8_MEMBER( prof80_mmu_device::program_r )
96{
97   if (m_enabled)
98   {
99      int bank = offset >> 12;
100      offset |= m_blk[bank] << 16;
101   }
102   else
103   {
104      offset |= 0xf0000;
105   }
106   
107   return this->space(AS_PROGRAM).read_byte(offset);
108}
109
110
111//-------------------------------------------------
112//  program_w - program space write
113//-------------------------------------------------
114
115WRITE8_MEMBER( prof80_mmu_device::program_w )
116{
117   if (m_enabled)
118   {
119      int bank = offset >> 12;
120      offset |= m_blk[bank] << 16;
121   }
122   else
123   {
124      offset |= 0xf0000;
125   }
126   
127   this->space(AS_PROGRAM).write_byte(offset, data);
128}
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trunk/src/mess/machine/prof80mmu.h
r0r26363
1/**********************************************************************
2
3    Conitec PROF-80 Memory Management Unit emulation
4
5    Copyright MESS Team.
6    Visit http://mamedev.org for licensing and usage restrictions.
7
8**********************************************************************/
9
10#pragma once
11
12#ifndef __PROF80_MMU__
13#define __PROF80_MMU__
14
15#include "emu.h"
16
17
18
19///*************************************************************************
20//  INTERFACE CONFIGURATION MACROS
21///*************************************************************************
22
23#define MCFG_PROF80_MMU_ADD(_tag, _program_map) \
24   MCFG_DEVICE_ADD(_tag, PROF80_MMU, 0) \
25   MCFG_DEVICE_ADDRESS_MAP(AS_PROGRAM, _program_map)
26
27
28
29///*************************************************************************
30//  TYPE DEFINITIONS
31///*************************************************************************
32
33// ======================> prof80_mmu_device
34
35class prof80_mmu_device : public device_t,
36                    public device_memory_interface
37{
38public:
39   prof80_mmu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
40
41   virtual DECLARE_ADDRESS_MAP(z80_program_map, 8);
42
43   DECLARE_WRITE8_MEMBER( par_w );
44   DECLARE_WRITE_LINE_MEMBER( mme_w );
45
46protected:
47   // device-level overrides
48   virtual void device_start();
49
50   // device_memory_interface overrides
51   virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
52
53   DECLARE_READ8_MEMBER( program_r );
54   DECLARE_WRITE8_MEMBER( program_w );
55
56private:
57   const address_space_config m_program_space_config;
58
59   UINT8 m_blk[16];
60   bool m_enabled;
61};
62
63
64// device type definition
65extern const device_type PROF80_MMU;
66
67
68
69#endif
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trunk/src/mess/includes/prof80.h
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99#include "bus/ecbbus/ecbbus.h"
1010#include "cpu/z80/z80.h"
1111#include "cpu/z80/z80daisy.h"
12#include "machine/prof80mmu.h"
1213#include "machine/ram.h"
1314#include "machine/rescap.h"
1415#include "machine/serial.h"
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1617#include "machine/upd765.h"
1718
1819#define Z80_TAG         "z1"
20#define MMU_TAG         "mmu"
1921#define UPD765_TAG      "z38"
2022#define UPD1990A_TAG    "z43"
2123#define RS232_A_TAG     "rs232a"
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3537   prof80_state(const machine_config &mconfig, device_type type, const char *tag)
3638      : driver_device(mconfig, type, tag),
3739         m_maincpu(*this, Z80_TAG),
40         m_mmu(*this, MMU_TAG),
3841         m_rtc(*this, UPD1990A_TAG),
3942         m_fdc(*this, UPD765_TAG),
4043         m_ram(*this, RAM_TAG),
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4952   { }
5053
5154   required_device<cpu_device> m_maincpu;
55   required_device<prof80_mmu_device> m_mmu;
5256   required_device<upd1990a_device> m_rtc;
5357   required_device<upd765a_device> m_fdc;
5458   required_device<ram_device> m_ram;
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6468   virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
6569   virtual void machine_start();
6670   virtual void machine_reset();
67   UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
6871
6972   enum
7073   {
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7477   DECLARE_WRITE8_MEMBER( flr_w );
7578   DECLARE_READ8_MEMBER( status_r );
7679   DECLARE_READ8_MEMBER( status2_r );
77   DECLARE_WRITE8_MEMBER( par_w );
78   DECLARE_WRITE_LINE_MEMBER( floppy_index_w );
7980
80   void bankswitch();
8181   void ls259_w(int fa, int sa, int fb, int sb);
82   void floppy_motor_off();
82   void motor(int mon);
8383
84   // memory state
85   UINT8 m_mmu[16];        // MMU block register
86   int m_init;             // MMU enable
87
8884   // RTC state
8985   int m_c0;
9086   int m_c1;
9187   int m_c2;
9288
9389   // floppy state
94   int m_fdc_index;        // floppy index hole sensor
95   int m_motor;            // floppy motor
90   int m_motor;
91   int m_ready;
92   int m_select;
9693
9794   // timers
9895   emu_timer   *m_floppy_motor_off_timer;

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